1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
74 #include "tree-pass.h"
81 #ifdef XCOFF_DEBUGGING_INFO
82 #include "xcoffout.h" /* Needed for external data
83 declarations for e.g. AIX 4.x. */
86 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
87 #include "dwarf2out.h"
90 #ifdef DBX_DEBUGGING_INFO
94 #ifdef SDB_DEBUGGING_INFO
98 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
99 null default for it to save conditionalization later. */
100 #ifndef CC_STATUS_INIT
101 #define CC_STATUS_INIT
104 /* How to start an assembler comment. */
105 #ifndef ASM_COMMENT_START
106 #define ASM_COMMENT_START ";#"
109 /* Is the given character a logical line separator for the assembler? */
110 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
111 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
114 #ifndef JUMP_TABLES_IN_TEXT_SECTION
115 #define JUMP_TABLES_IN_TEXT_SECTION 0
118 /* Bitflags used by final_scan_insn. */
121 #define SEEN_EMITTED 4
123 /* Last insn processed by final_scan_insn. */
124 static rtx debug_insn;
125 rtx current_output_insn;
127 /* Line number of last NOTE. */
128 static int last_linenum;
130 /* Highest line number in current block. */
131 static int high_block_linenum;
133 /* Likewise for function. */
134 static int high_function_linenum;
136 /* Filename of last NOTE. */
137 static const char *last_filename;
139 /* Whether to force emission of a line note before the next insn. */
140 static bool force_source_line = false;
142 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
144 /* Nonzero while outputting an `asm' with operands.
145 This means that inconsistencies are the user's fault, so don't die.
146 The precise value is the insn being output, to pass to error_for_asm. */
147 rtx this_is_asm_operands;
149 /* Number of operands of this insn, for an `asm' with operands. */
150 static unsigned int insn_noperands;
152 /* Compare optimization flag. */
154 static rtx last_ignored_compare = 0;
156 /* Assign a unique number to each insn that is output.
157 This can be used to generate unique local labels. */
159 static int insn_counter = 0;
162 /* This variable contains machine-dependent flags (defined in tm.h)
163 set and examined by output routines
164 that describe how to interpret the condition codes properly. */
168 /* During output of an insn, this contains a copy of cc_status
169 from before the insn. */
171 CC_STATUS cc_prev_status;
174 /* Nonzero means current function must be given a frame pointer.
175 Initialized in function.c to 0. Set only in reload1.c as per
176 the needs of the function. */
178 int frame_pointer_needed;
180 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
182 static int block_depth;
184 /* Nonzero if have enabled APP processing of our assembler output. */
188 /* If we are outputting an insn sequence, this contains the sequence rtx.
193 #ifdef ASSEMBLER_DIALECT
195 /* Number of the assembler dialect to use, starting at 0. */
196 static int dialect_number;
199 #ifdef HAVE_conditional_execution
200 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
201 rtx current_insn_predicate;
204 #ifdef HAVE_ATTR_length
205 static int asm_insn_count (rtx);
207 static void profile_function (FILE *);
208 static void profile_after_prologue (FILE *);
209 static bool notice_source_line (rtx);
210 static rtx walk_alter_subreg (rtx *, bool *);
211 static void output_asm_name (void);
212 static void output_alternate_entry_point (FILE *, rtx);
213 static tree get_mem_expr_from_op (rtx, int *);
214 static void output_asm_operand_names (rtx *, int *, int);
215 static void output_operand (rtx, int);
216 #ifdef LEAF_REGISTERS
217 static void leaf_renumber_regs (rtx);
220 static int alter_cond (rtx);
222 #ifndef ADDR_VEC_ALIGN
223 static int final_addr_vec_align (rtx);
225 #ifdef HAVE_ATTR_length
226 static int align_fuzz (rtx, rtx, int, unsigned);
229 /* Initialize data in final at the beginning of a compilation. */
232 init_final (const char *filename ATTRIBUTE_UNUSED)
237 #ifdef ASSEMBLER_DIALECT
238 dialect_number = ASSEMBLER_DIALECT;
242 /* Default target function prologue and epilogue assembler output.
244 If not overridden for epilogue code, then the function body itself
245 contains return instructions wherever needed. */
247 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
248 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
252 /* Default target hook that outputs nothing to a stream. */
254 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
258 /* Enable APP processing of subsequent output.
259 Used before the output from an `asm' statement. */
266 fputs (ASM_APP_ON, asm_out_file);
271 /* Disable APP processing of subsequent output.
272 Called from varasm.c before most kinds of output. */
279 fputs (ASM_APP_OFF, asm_out_file);
284 /* Return the number of slots filled in the current
285 delayed branch sequence (we don't count the insn needing the
286 delay slot). Zero if not in a delayed branch sequence. */
290 dbr_sequence_length (void)
292 if (final_sequence != 0)
293 return XVECLEN (final_sequence, 0) - 1;
299 /* The next two pages contain routines used to compute the length of an insn
300 and to shorten branches. */
302 /* Arrays for insn lengths, and addresses. The latter is referenced by
303 `insn_current_length'. */
305 static int *insn_lengths;
307 VEC(int,heap) *insn_addresses_;
309 /* Max uid for which the above arrays are valid. */
310 static int insn_lengths_max_uid;
312 /* Address of insn being processed. Used by `insn_current_length'. */
313 int insn_current_address;
315 /* Address of insn being processed in previous iteration. */
316 int insn_last_address;
318 /* known invariant alignment of insn being processed. */
319 int insn_current_align;
321 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
322 gives the next following alignment insn that increases the known
323 alignment, or NULL_RTX if there is no such insn.
324 For any alignment obtained this way, we can again index uid_align with
325 its uid to obtain the next following align that in turn increases the
326 alignment, till we reach NULL_RTX; the sequence obtained this way
327 for each insn we'll call the alignment chain of this insn in the following
330 struct label_alignment
336 static rtx *uid_align;
337 static int *uid_shuid;
338 static struct label_alignment *label_align;
340 /* Indicate that branch shortening hasn't yet been done. */
343 init_insn_lengths (void)
354 insn_lengths_max_uid = 0;
356 #ifdef HAVE_ATTR_length
357 INSN_ADDRESSES_FREE ();
366 /* Obtain the current length of an insn. If branch shortening has been done,
367 get its actual length. Otherwise, use FALLBACK_FN to calculate the
370 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
371 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
373 #ifdef HAVE_ATTR_length
378 if (insn_lengths_max_uid > INSN_UID (insn))
379 return insn_lengths[INSN_UID (insn)];
381 switch (GET_CODE (insn))
389 length = fallback_fn (insn);
393 body = PATTERN (insn);
394 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
396 /* Alignment is machine-dependent and should be handled by
400 length = fallback_fn (insn);
404 body = PATTERN (insn);
405 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
408 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
409 length = asm_insn_count (body) * fallback_fn (insn);
410 else if (GET_CODE (body) == SEQUENCE)
411 for (i = 0; i < XVECLEN (body, 0); i++)
412 length += get_attr_length (XVECEXP (body, 0, i));
414 length = fallback_fn (insn);
421 #ifdef ADJUST_INSN_LENGTH
422 ADJUST_INSN_LENGTH (insn, length);
425 #else /* not HAVE_ATTR_length */
427 #define insn_default_length 0
428 #define insn_min_length 0
429 #endif /* not HAVE_ATTR_length */
432 /* Obtain the current length of an insn. If branch shortening has been done,
433 get its actual length. Otherwise, get its maximum length. */
435 get_attr_length (rtx insn)
437 return get_attr_length_1 (insn, insn_default_length);
440 /* Obtain the current length of an insn. If branch shortening has been done,
441 get its actual length. Otherwise, get its minimum length. */
443 get_attr_min_length (rtx insn)
445 return get_attr_length_1 (insn, insn_min_length);
448 /* Code to handle alignment inside shorten_branches. */
450 /* Here is an explanation how the algorithm in align_fuzz can give
453 Call a sequence of instructions beginning with alignment point X
454 and continuing until the next alignment point `block X'. When `X'
455 is used in an expression, it means the alignment value of the
458 Call the distance between the start of the first insn of block X, and
459 the end of the last insn of block X `IX', for the `inner size of X'.
460 This is clearly the sum of the instruction lengths.
462 Likewise with the next alignment-delimited block following X, which we
465 Call the distance between the start of the first insn of block X, and
466 the start of the first insn of block Y `OX', for the `outer size of X'.
468 The estimated padding is then OX - IX.
470 OX can be safely estimated as
475 OX = round_up(IX, X) + Y - X
477 Clearly est(IX) >= real(IX), because that only depends on the
478 instruction lengths, and those being overestimated is a given.
480 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
481 we needn't worry about that when thinking about OX.
483 When X >= Y, the alignment provided by Y adds no uncertainty factor
484 for branch ranges starting before X, so we can just round what we have.
485 But when X < Y, we don't know anything about the, so to speak,
486 `middle bits', so we have to assume the worst when aligning up from an
487 address mod X to one mod Y, which is Y - X. */
490 #define LABEL_ALIGN(LABEL) align_labels_log
493 #ifndef LABEL_ALIGN_MAX_SKIP
494 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
498 #define LOOP_ALIGN(LABEL) align_loops_log
501 #ifndef LOOP_ALIGN_MAX_SKIP
502 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
505 #ifndef LABEL_ALIGN_AFTER_BARRIER
506 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
509 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
510 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
514 #define JUMP_ALIGN(LABEL) align_jumps_log
517 #ifndef JUMP_ALIGN_MAX_SKIP
518 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
521 #ifndef ADDR_VEC_ALIGN
523 final_addr_vec_align (rtx addr_vec)
525 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
527 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
528 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
529 return exact_log2 (align);
533 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
536 #ifndef INSN_LENGTH_ALIGNMENT
537 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
540 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
542 static int min_labelno, max_labelno;
544 #define LABEL_TO_ALIGNMENT(LABEL) \
545 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
547 #define LABEL_TO_MAX_SKIP(LABEL) \
548 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
550 /* For the benefit of port specific code do this also as a function. */
553 label_to_alignment (rtx label)
555 return LABEL_TO_ALIGNMENT (label);
558 #ifdef HAVE_ATTR_length
559 /* The differences in addresses
560 between a branch and its target might grow or shrink depending on
561 the alignment the start insn of the range (the branch for a forward
562 branch or the label for a backward branch) starts out on; if these
563 differences are used naively, they can even oscillate infinitely.
564 We therefore want to compute a 'worst case' address difference that
565 is independent of the alignment the start insn of the range end
566 up on, and that is at least as large as the actual difference.
567 The function align_fuzz calculates the amount we have to add to the
568 naively computed difference, by traversing the part of the alignment
569 chain of the start insn of the range that is in front of the end insn
570 of the range, and considering for each alignment the maximum amount
571 that it might contribute to a size increase.
573 For casesi tables, we also want to know worst case minimum amounts of
574 address difference, in case a machine description wants to introduce
575 some common offset that is added to all offsets in a table.
576 For this purpose, align_fuzz with a growth argument of 0 computes the
577 appropriate adjustment. */
579 /* Compute the maximum delta by which the difference of the addresses of
580 START and END might grow / shrink due to a different address for start
581 which changes the size of alignment insns between START and END.
582 KNOWN_ALIGN_LOG is the alignment known for START.
583 GROWTH should be ~0 if the objective is to compute potential code size
584 increase, and 0 if the objective is to compute potential shrink.
585 The return value is undefined for any other value of GROWTH. */
588 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
590 int uid = INSN_UID (start);
592 int known_align = 1 << known_align_log;
593 int end_shuid = INSN_SHUID (end);
596 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
598 int align_addr, new_align;
600 uid = INSN_UID (align_label);
601 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
602 if (uid_shuid[uid] > end_shuid)
604 known_align_log = LABEL_TO_ALIGNMENT (align_label);
605 new_align = 1 << known_align_log;
606 if (new_align < known_align)
608 fuzz += (-align_addr ^ growth) & (new_align - known_align);
609 known_align = new_align;
614 /* Compute a worst-case reference address of a branch so that it
615 can be safely used in the presence of aligned labels. Since the
616 size of the branch itself is unknown, the size of the branch is
617 not included in the range. I.e. for a forward branch, the reference
618 address is the end address of the branch as known from the previous
619 branch shortening pass, minus a value to account for possible size
620 increase due to alignment. For a backward branch, it is the start
621 address of the branch as known from the current pass, plus a value
622 to account for possible size increase due to alignment.
623 NB.: Therefore, the maximum offset allowed for backward branches needs
624 to exclude the branch size. */
627 insn_current_reference_address (rtx branch)
632 if (! INSN_ADDRESSES_SET_P ())
635 seq = NEXT_INSN (PREV_INSN (branch));
636 seq_uid = INSN_UID (seq);
637 if (!JUMP_P (branch))
638 /* This can happen for example on the PA; the objective is to know the
639 offset to address something in front of the start of the function.
640 Thus, we can treat it like a backward branch.
641 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
642 any alignment we'd encounter, so we skip the call to align_fuzz. */
643 return insn_current_address;
644 dest = JUMP_LABEL (branch);
646 /* BRANCH has no proper alignment chain set, so use SEQ.
647 BRANCH also has no INSN_SHUID. */
648 if (INSN_SHUID (seq) < INSN_SHUID (dest))
650 /* Forward branch. */
651 return (insn_last_address + insn_lengths[seq_uid]
652 - align_fuzz (seq, dest, length_unit_log, ~0));
656 /* Backward branch. */
657 return (insn_current_address
658 + align_fuzz (dest, seq, length_unit_log, ~0));
661 #endif /* HAVE_ATTR_length */
663 /* Compute branch alignments based on frequency information in the
667 compute_alignments (void)
669 int log, max_skip, max_log;
678 max_labelno = max_label_num ();
679 min_labelno = get_first_label_num ();
680 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
682 /* If not optimizing or optimizing for size, don't assign any alignments. */
683 if (! optimize || optimize_size)
688 rtx label = BB_HEAD (bb);
689 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
694 || probably_never_executed_bb_p (bb))
696 max_log = LABEL_ALIGN (label);
697 max_skip = LABEL_ALIGN_MAX_SKIP;
699 FOR_EACH_EDGE (e, ei, bb->preds)
701 if (e->flags & EDGE_FALLTHRU)
702 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
704 branch_frequency += EDGE_FREQUENCY (e);
707 /* There are two purposes to align block with no fallthru incoming edge:
708 1) to avoid fetch stalls when branch destination is near cache boundary
709 2) to improve cache efficiency in case the previous block is not executed
710 (so it does not need to be in the cache).
712 We to catch first case, we align frequently executed blocks.
713 To catch the second, we align blocks that are executed more frequently
714 than the predecessor and the predecessor is likely to not be executed
715 when function is called. */
718 && (branch_frequency > BB_FREQ_MAX / 10
719 || (bb->frequency > bb->prev_bb->frequency * 10
720 && (bb->prev_bb->frequency
721 <= ENTRY_BLOCK_PTR->frequency / 2))))
723 log = JUMP_ALIGN (label);
727 max_skip = JUMP_ALIGN_MAX_SKIP;
730 /* In case block is frequent and reached mostly by non-fallthru edge,
731 align it. It is most likely a first block of loop. */
733 && maybe_hot_bb_p (bb)
734 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
735 && branch_frequency > fallthru_frequency * 2)
737 log = LOOP_ALIGN (label);
741 max_skip = LOOP_ALIGN_MAX_SKIP;
744 LABEL_TO_ALIGNMENT (label) = max_log;
745 LABEL_TO_MAX_SKIP (label) = max_skip;
750 struct tree_opt_pass pass_compute_alignments =
754 compute_alignments, /* execute */
757 0, /* static_pass_number */
759 0, /* properties_required */
760 0, /* properties_provided */
761 0, /* properties_destroyed */
762 0, /* todo_flags_start */
763 0, /* todo_flags_finish */
768 /* Make a pass over all insns and compute their actual lengths by shortening
769 any branches of variable length if possible. */
771 /* shorten_branches might be called multiple times: for example, the SH
772 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
773 In order to do this, it needs proper length information, which it obtains
774 by calling shorten_branches. This cannot be collapsed with
775 shorten_branches itself into a single pass unless we also want to integrate
776 reorg.c, since the branch splitting exposes new instructions with delay
780 shorten_branches (rtx first ATTRIBUTE_UNUSED)
787 #ifdef HAVE_ATTR_length
788 #define MAX_CODE_ALIGN 16
790 int something_changed = 1;
791 char *varying_length;
794 rtx align_tab[MAX_CODE_ALIGN];
798 /* Compute maximum UID and allocate label_align / uid_shuid. */
799 max_uid = get_max_uid ();
801 /* Free uid_shuid before reallocating it. */
804 uid_shuid = XNEWVEC (int, max_uid);
806 if (max_labelno != max_label_num ())
808 int old = max_labelno;
812 max_labelno = max_label_num ();
814 n_labels = max_labelno - min_labelno + 1;
815 n_old_labels = old - min_labelno + 1;
817 label_align = xrealloc (label_align,
818 n_labels * sizeof (struct label_alignment));
820 /* Range of labels grows monotonically in the function. Failing here
821 means that the initialization of array got lost. */
822 gcc_assert (n_old_labels <= n_labels);
824 memset (label_align + n_old_labels, 0,
825 (n_labels - n_old_labels) * sizeof (struct label_alignment));
828 /* Initialize label_align and set up uid_shuid to be strictly
829 monotonically rising with insn order. */
830 /* We use max_log here to keep track of the maximum alignment we want to
831 impose on the next CODE_LABEL (or the current one if we are processing
832 the CODE_LABEL itself). */
837 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
841 INSN_SHUID (insn) = i++;
849 /* Merge in alignments computed by compute_alignments. */
850 log = LABEL_TO_ALIGNMENT (insn);
854 max_skip = LABEL_TO_MAX_SKIP (insn);
857 log = LABEL_ALIGN (insn);
861 max_skip = LABEL_ALIGN_MAX_SKIP;
863 next = next_nonnote_insn (insn);
864 /* ADDR_VECs only take room if read-only data goes into the text
866 if (JUMP_TABLES_IN_TEXT_SECTION
867 || readonly_data_section == text_section)
868 if (next && JUMP_P (next))
870 rtx nextbody = PATTERN (next);
871 if (GET_CODE (nextbody) == ADDR_VEC
872 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
874 log = ADDR_VEC_ALIGN (next);
878 max_skip = LABEL_ALIGN_MAX_SKIP;
882 LABEL_TO_ALIGNMENT (insn) = max_log;
883 LABEL_TO_MAX_SKIP (insn) = max_skip;
887 else if (BARRIER_P (insn))
891 for (label = insn; label && ! INSN_P (label);
892 label = NEXT_INSN (label))
895 log = LABEL_ALIGN_AFTER_BARRIER (insn);
899 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
905 #ifdef HAVE_ATTR_length
907 /* Allocate the rest of the arrays. */
908 insn_lengths = XNEWVEC (int, max_uid);
909 insn_lengths_max_uid = max_uid;
910 /* Syntax errors can lead to labels being outside of the main insn stream.
911 Initialize insn_addresses, so that we get reproducible results. */
912 INSN_ADDRESSES_ALLOC (max_uid);
914 varying_length = XCNEWVEC (char, max_uid);
916 /* Initialize uid_align. We scan instructions
917 from end to start, and keep in align_tab[n] the last seen insn
918 that does an alignment of at least n+1, i.e. the successor
919 in the alignment chain for an insn that does / has a known
921 uid_align = XCNEWVEC (rtx, max_uid);
923 for (i = MAX_CODE_ALIGN; --i >= 0;)
924 align_tab[i] = NULL_RTX;
925 seq = get_last_insn ();
926 for (; seq; seq = PREV_INSN (seq))
928 int uid = INSN_UID (seq);
930 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
931 uid_align[uid] = align_tab[0];
934 /* Found an alignment label. */
935 uid_align[uid] = align_tab[log];
936 for (i = log - 1; i >= 0; i--)
940 #ifdef CASE_VECTOR_SHORTEN_MODE
943 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
946 int min_shuid = INSN_SHUID (get_insns ()) - 1;
947 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
950 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
952 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
953 int len, i, min, max, insn_shuid;
955 addr_diff_vec_flags flags;
958 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
960 pat = PATTERN (insn);
961 len = XVECLEN (pat, 1);
962 gcc_assert (len > 0);
963 min_align = MAX_CODE_ALIGN;
964 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
966 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
967 int shuid = INSN_SHUID (lab);
978 if (min_align > LABEL_TO_ALIGNMENT (lab))
979 min_align = LABEL_TO_ALIGNMENT (lab);
981 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
982 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
983 insn_shuid = INSN_SHUID (insn);
984 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
985 memset (&flags, 0, sizeof (flags));
986 flags.min_align = min_align;
987 flags.base_after_vec = rel > insn_shuid;
988 flags.min_after_vec = min > insn_shuid;
989 flags.max_after_vec = max > insn_shuid;
990 flags.min_after_base = min > rel;
991 flags.max_after_base = max > rel;
992 ADDR_DIFF_VEC_FLAGS (pat) = flags;
995 #endif /* CASE_VECTOR_SHORTEN_MODE */
997 /* Compute initial lengths, addresses, and varying flags for each insn. */
998 for (insn_current_address = 0, insn = first;
1000 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1002 uid = INSN_UID (insn);
1004 insn_lengths[uid] = 0;
1008 int log = LABEL_TO_ALIGNMENT (insn);
1011 int align = 1 << log;
1012 int new_address = (insn_current_address + align - 1) & -align;
1013 insn_lengths[uid] = new_address - insn_current_address;
1017 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1019 if (NOTE_P (insn) || BARRIER_P (insn)
1022 if (INSN_DELETED_P (insn))
1025 body = PATTERN (insn);
1026 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1028 /* This only takes room if read-only data goes into the text
1030 if (JUMP_TABLES_IN_TEXT_SECTION
1031 || readonly_data_section == text_section)
1032 insn_lengths[uid] = (XVECLEN (body,
1033 GET_CODE (body) == ADDR_DIFF_VEC)
1034 * GET_MODE_SIZE (GET_MODE (body)));
1035 /* Alignment is handled by ADDR_VEC_ALIGN. */
1037 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1038 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1039 else if (GET_CODE (body) == SEQUENCE)
1042 int const_delay_slots;
1044 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1046 const_delay_slots = 0;
1048 /* Inside a delay slot sequence, we do not do any branch shortening
1049 if the shortening could change the number of delay slots
1051 for (i = 0; i < XVECLEN (body, 0); i++)
1053 rtx inner_insn = XVECEXP (body, 0, i);
1054 int inner_uid = INSN_UID (inner_insn);
1057 if (GET_CODE (body) == ASM_INPUT
1058 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1059 inner_length = (asm_insn_count (PATTERN (inner_insn))
1060 * insn_default_length (inner_insn));
1062 inner_length = insn_default_length (inner_insn);
1064 insn_lengths[inner_uid] = inner_length;
1065 if (const_delay_slots)
1067 if ((varying_length[inner_uid]
1068 = insn_variable_length_p (inner_insn)) != 0)
1069 varying_length[uid] = 1;
1070 INSN_ADDRESSES (inner_uid) = (insn_current_address
1071 + insn_lengths[uid]);
1074 varying_length[inner_uid] = 0;
1075 insn_lengths[uid] += inner_length;
1078 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1080 insn_lengths[uid] = insn_default_length (insn);
1081 varying_length[uid] = insn_variable_length_p (insn);
1084 /* If needed, do any adjustment. */
1085 #ifdef ADJUST_INSN_LENGTH
1086 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1087 if (insn_lengths[uid] < 0)
1088 fatal_insn ("negative insn length", insn);
1092 /* Now loop over all the insns finding varying length insns. For each,
1093 get the current insn length. If it has changed, reflect the change.
1094 When nothing changes for a full pass, we are done. */
1096 while (something_changed)
1098 something_changed = 0;
1099 insn_current_align = MAX_CODE_ALIGN - 1;
1100 for (insn_current_address = 0, insn = first;
1102 insn = NEXT_INSN (insn))
1105 #ifdef ADJUST_INSN_LENGTH
1110 uid = INSN_UID (insn);
1114 int log = LABEL_TO_ALIGNMENT (insn);
1115 if (log > insn_current_align)
1117 int align = 1 << log;
1118 int new_address= (insn_current_address + align - 1) & -align;
1119 insn_lengths[uid] = new_address - insn_current_address;
1120 insn_current_align = log;
1121 insn_current_address = new_address;
1124 insn_lengths[uid] = 0;
1125 INSN_ADDRESSES (uid) = insn_current_address;
1129 length_align = INSN_LENGTH_ALIGNMENT (insn);
1130 if (length_align < insn_current_align)
1131 insn_current_align = length_align;
1133 insn_last_address = INSN_ADDRESSES (uid);
1134 INSN_ADDRESSES (uid) = insn_current_address;
1136 #ifdef CASE_VECTOR_SHORTEN_MODE
1137 if (optimize && JUMP_P (insn)
1138 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1140 rtx body = PATTERN (insn);
1141 int old_length = insn_lengths[uid];
1142 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1143 rtx min_lab = XEXP (XEXP (body, 2), 0);
1144 rtx max_lab = XEXP (XEXP (body, 3), 0);
1145 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1146 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1147 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1150 addr_diff_vec_flags flags;
1152 /* Avoid automatic aggregate initialization. */
1153 flags = ADDR_DIFF_VEC_FLAGS (body);
1155 /* Try to find a known alignment for rel_lab. */
1156 for (prev = rel_lab;
1158 && ! insn_lengths[INSN_UID (prev)]
1159 && ! (varying_length[INSN_UID (prev)] & 1);
1160 prev = PREV_INSN (prev))
1161 if (varying_length[INSN_UID (prev)] & 2)
1163 rel_align = LABEL_TO_ALIGNMENT (prev);
1167 /* See the comment on addr_diff_vec_flags in rtl.h for the
1168 meaning of the flags values. base: REL_LAB vec: INSN */
1169 /* Anything after INSN has still addresses from the last
1170 pass; adjust these so that they reflect our current
1171 estimate for this pass. */
1172 if (flags.base_after_vec)
1173 rel_addr += insn_current_address - insn_last_address;
1174 if (flags.min_after_vec)
1175 min_addr += insn_current_address - insn_last_address;
1176 if (flags.max_after_vec)
1177 max_addr += insn_current_address - insn_last_address;
1178 /* We want to know the worst case, i.e. lowest possible value
1179 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1180 its offset is positive, and we have to be wary of code shrink;
1181 otherwise, it is negative, and we have to be vary of code
1183 if (flags.min_after_base)
1185 /* If INSN is between REL_LAB and MIN_LAB, the size
1186 changes we are about to make can change the alignment
1187 within the observed offset, therefore we have to break
1188 it up into two parts that are independent. */
1189 if (! flags.base_after_vec && flags.min_after_vec)
1191 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1192 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1195 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1199 if (flags.base_after_vec && ! flags.min_after_vec)
1201 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1202 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1205 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1207 /* Likewise, determine the highest lowest possible value
1208 for the offset of MAX_LAB. */
1209 if (flags.max_after_base)
1211 if (! flags.base_after_vec && flags.max_after_vec)
1213 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1214 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1217 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1221 if (flags.base_after_vec && ! flags.max_after_vec)
1223 max_addr += align_fuzz (max_lab, insn, 0, 0);
1224 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1227 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1229 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1230 max_addr - rel_addr,
1232 if (JUMP_TABLES_IN_TEXT_SECTION
1233 || readonly_data_section == text_section)
1236 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1237 insn_current_address += insn_lengths[uid];
1238 if (insn_lengths[uid] != old_length)
1239 something_changed = 1;
1244 #endif /* CASE_VECTOR_SHORTEN_MODE */
1246 if (! (varying_length[uid]))
1248 if (NONJUMP_INSN_P (insn)
1249 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1253 body = PATTERN (insn);
1254 for (i = 0; i < XVECLEN (body, 0); i++)
1256 rtx inner_insn = XVECEXP (body, 0, i);
1257 int inner_uid = INSN_UID (inner_insn);
1259 INSN_ADDRESSES (inner_uid) = insn_current_address;
1261 insn_current_address += insn_lengths[inner_uid];
1265 insn_current_address += insn_lengths[uid];
1270 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1274 body = PATTERN (insn);
1276 for (i = 0; i < XVECLEN (body, 0); i++)
1278 rtx inner_insn = XVECEXP (body, 0, i);
1279 int inner_uid = INSN_UID (inner_insn);
1282 INSN_ADDRESSES (inner_uid) = insn_current_address;
1284 /* insn_current_length returns 0 for insns with a
1285 non-varying length. */
1286 if (! varying_length[inner_uid])
1287 inner_length = insn_lengths[inner_uid];
1289 inner_length = insn_current_length (inner_insn);
1291 if (inner_length != insn_lengths[inner_uid])
1293 insn_lengths[inner_uid] = inner_length;
1294 something_changed = 1;
1296 insn_current_address += insn_lengths[inner_uid];
1297 new_length += inner_length;
1302 new_length = insn_current_length (insn);
1303 insn_current_address += new_length;
1306 #ifdef ADJUST_INSN_LENGTH
1307 /* If needed, do any adjustment. */
1308 tmp_length = new_length;
1309 ADJUST_INSN_LENGTH (insn, new_length);
1310 insn_current_address += (new_length - tmp_length);
1313 if (new_length != insn_lengths[uid])
1315 insn_lengths[uid] = new_length;
1316 something_changed = 1;
1319 /* For a non-optimizing compile, do only a single pass. */
1324 free (varying_length);
1326 #endif /* HAVE_ATTR_length */
1329 #ifdef HAVE_ATTR_length
1330 /* Given the body of an INSN known to be generated by an ASM statement, return
1331 the number of machine instructions likely to be generated for this insn.
1332 This is used to compute its length. */
1335 asm_insn_count (rtx body)
1337 const char *template;
1340 if (GET_CODE (body) == ASM_INPUT)
1341 template = XSTR (body, 0);
1343 template = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1345 for (; *template; template++)
1346 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1353 /* Output assembler code for the start of a function,
1354 and initialize some of the variables in this file
1355 for the new function. The label for the function and associated
1356 assembler pseudo-ops have already been output in `assemble_start_function'.
1358 FIRST is the first insn of the rtl for the function being compiled.
1359 FILE is the file to write assembler code to.
1360 OPTIMIZE is nonzero if we should eliminate redundant
1361 test and compare insns. */
1364 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1365 int optimize ATTRIBUTE_UNUSED)
1369 this_is_asm_operands = 0;
1371 last_filename = locator_file (prologue_locator);
1372 last_linenum = locator_line (prologue_locator);
1374 high_block_linenum = high_function_linenum = last_linenum;
1376 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1378 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1379 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1380 dwarf2out_begin_prologue (0, NULL);
1383 #ifdef LEAF_REG_REMAP
1384 if (current_function_uses_only_leaf_regs)
1385 leaf_renumber_regs (first);
1388 /* The Sun386i and perhaps other machines don't work right
1389 if the profiling code comes after the prologue. */
1390 #ifdef PROFILE_BEFORE_PROLOGUE
1391 if (current_function_profile)
1392 profile_function (file);
1393 #endif /* PROFILE_BEFORE_PROLOGUE */
1395 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1396 if (dwarf2out_do_frame ())
1397 dwarf2out_frame_debug (NULL_RTX, false);
1400 /* If debugging, assign block numbers to all of the blocks in this
1404 reemit_insn_block_notes ();
1405 number_blocks (current_function_decl);
1406 /* We never actually put out begin/end notes for the top-level
1407 block in the function. But, conceptually, that block is
1409 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1412 /* First output the function prologue: code to set up the stack frame. */
1413 targetm.asm_out.function_prologue (file, get_frame_size ());
1415 /* If the machine represents the prologue as RTL, the profiling code must
1416 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1417 #ifdef HAVE_prologue
1418 if (! HAVE_prologue)
1420 profile_after_prologue (file);
1424 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1426 #ifndef PROFILE_BEFORE_PROLOGUE
1427 if (current_function_profile)
1428 profile_function (file);
1429 #endif /* not PROFILE_BEFORE_PROLOGUE */
1433 profile_function (FILE *file ATTRIBUTE_UNUSED)
1435 #ifndef NO_PROFILE_COUNTERS
1436 # define NO_PROFILE_COUNTERS 0
1438 #if defined(ASM_OUTPUT_REG_PUSH)
1439 int sval = current_function_returns_struct;
1440 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1441 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1442 int cxt = cfun->static_chain_decl != NULL;
1444 #endif /* ASM_OUTPUT_REG_PUSH */
1446 if (! NO_PROFILE_COUNTERS)
1448 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1449 switch_to_section (data_section);
1450 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1451 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1452 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1455 switch_to_section (current_function_section ());
1457 #if defined(ASM_OUTPUT_REG_PUSH)
1458 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1459 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1462 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1464 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1466 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1469 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1474 FUNCTION_PROFILER (file, current_function_funcdef_no);
1476 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1478 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1480 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1483 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1488 #if defined(ASM_OUTPUT_REG_PUSH)
1489 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1490 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1494 /* Output assembler code for the end of a function.
1495 For clarity, args are same as those of `final_start_function'
1496 even though not all of them are needed. */
1499 final_end_function (void)
1503 (*debug_hooks->end_function) (high_function_linenum);
1505 /* Finally, output the function epilogue:
1506 code to restore the stack frame and return to the caller. */
1507 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1509 /* And debug output. */
1510 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1512 #if defined (DWARF2_UNWIND_INFO)
1513 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1514 && dwarf2out_do_frame ())
1515 dwarf2out_end_epilogue (last_linenum, last_filename);
1519 /* Output assembler code for some insns: all or part of a function.
1520 For description of args, see `final_start_function', above. */
1523 final (rtx first, FILE *file, int optimize)
1529 last_ignored_compare = 0;
1531 for (insn = first; insn; insn = NEXT_INSN (insn))
1533 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1534 max_uid = INSN_UID (insn);
1536 /* If CC tracking across branches is enabled, record the insn which
1537 jumps to each branch only reached from one place. */
1538 if (optimize && JUMP_P (insn))
1540 rtx lab = JUMP_LABEL (insn);
1541 if (lab && LABEL_NUSES (lab) == 1)
1543 LABEL_REFS (lab) = insn;
1553 /* Output the insns. */
1554 for (insn = first; insn;)
1556 #ifdef HAVE_ATTR_length
1557 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1559 /* This can be triggered by bugs elsewhere in the compiler if
1560 new insns are created after init_insn_lengths is called. */
1561 gcc_assert (NOTE_P (insn));
1562 insn_current_address = -1;
1565 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1566 #endif /* HAVE_ATTR_length */
1568 insn = final_scan_insn (insn, file, optimize, 0, &seen);
1573 get_insn_template (int code, rtx insn)
1575 switch (insn_data[code].output_format)
1577 case INSN_OUTPUT_FORMAT_SINGLE:
1578 return insn_data[code].output.single;
1579 case INSN_OUTPUT_FORMAT_MULTI:
1580 return insn_data[code].output.multi[which_alternative];
1581 case INSN_OUTPUT_FORMAT_FUNCTION:
1583 return (*insn_data[code].output.function) (recog_data.operand, insn);
1590 /* Emit the appropriate declaration for an alternate-entry-point
1591 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1592 LABEL_KIND != LABEL_NORMAL.
1594 The case fall-through in this function is intentional. */
1596 output_alternate_entry_point (FILE *file, rtx insn)
1598 const char *name = LABEL_NAME (insn);
1600 switch (LABEL_KIND (insn))
1602 case LABEL_WEAK_ENTRY:
1603 #ifdef ASM_WEAKEN_LABEL
1604 ASM_WEAKEN_LABEL (file, name);
1606 case LABEL_GLOBAL_ENTRY:
1607 targetm.asm_out.globalize_label (file, name);
1608 case LABEL_STATIC_ENTRY:
1609 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1610 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1612 ASM_OUTPUT_LABEL (file, name);
1621 /* The final scan for one insn, INSN.
1622 Args are same as in `final', except that INSN
1623 is the insn being scanned.
1624 Value returned is the next insn to be scanned.
1626 NOPEEPHOLES is the flag to disallow peephole processing (currently
1627 used for within delayed branch sequence output).
1629 SEEN is used to track the end of the prologue, for emitting
1630 debug information. We force the emission of a line note after
1631 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1632 at the beginning of the second basic block, whichever comes
1636 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1637 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
1646 /* Ignore deleted insns. These can occur when we split insns (due to a
1647 template of "#") while not optimizing. */
1648 if (INSN_DELETED_P (insn))
1649 return NEXT_INSN (insn);
1651 switch (GET_CODE (insn))
1654 switch (NOTE_KIND (insn))
1656 case NOTE_INSN_DELETED:
1659 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1660 in_cold_section_p = !in_cold_section_p;
1661 (*debug_hooks->switch_text_section) ();
1662 switch_to_section (current_function_section ());
1665 case NOTE_INSN_BASIC_BLOCK:
1666 #ifdef TARGET_UNWIND_INFO
1667 targetm.asm_out.unwind_emit (asm_out_file, insn);
1671 fprintf (asm_out_file, "\t%s basic block %d\n",
1672 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1674 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1676 *seen |= SEEN_EMITTED;
1677 force_source_line = true;
1684 case NOTE_INSN_EH_REGION_BEG:
1685 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1686 NOTE_EH_HANDLER (insn));
1689 case NOTE_INSN_EH_REGION_END:
1690 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1691 NOTE_EH_HANDLER (insn));
1694 case NOTE_INSN_PROLOGUE_END:
1695 targetm.asm_out.function_end_prologue (file);
1696 profile_after_prologue (file);
1698 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1700 *seen |= SEEN_EMITTED;
1701 force_source_line = true;
1708 case NOTE_INSN_EPILOGUE_BEG:
1709 targetm.asm_out.function_begin_epilogue (file);
1712 case NOTE_INSN_FUNCTION_BEG:
1714 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1716 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1718 *seen |= SEEN_EMITTED;
1719 force_source_line = true;
1726 case NOTE_INSN_BLOCK_BEG:
1727 if (debug_info_level == DINFO_LEVEL_NORMAL
1728 || debug_info_level == DINFO_LEVEL_VERBOSE
1729 || write_symbols == DWARF2_DEBUG
1730 || write_symbols == VMS_AND_DWARF2_DEBUG
1731 || write_symbols == VMS_DEBUG)
1733 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1737 high_block_linenum = last_linenum;
1739 /* Output debugging info about the symbol-block beginning. */
1740 (*debug_hooks->begin_block) (last_linenum, n);
1742 /* Mark this block as output. */
1743 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1747 case NOTE_INSN_BLOCK_END:
1748 if (debug_info_level == DINFO_LEVEL_NORMAL
1749 || debug_info_level == DINFO_LEVEL_VERBOSE
1750 || write_symbols == DWARF2_DEBUG
1751 || write_symbols == VMS_AND_DWARF2_DEBUG
1752 || write_symbols == VMS_DEBUG)
1754 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1758 /* End of a symbol-block. */
1760 gcc_assert (block_depth >= 0);
1762 (*debug_hooks->end_block) (high_block_linenum, n);
1766 case NOTE_INSN_DELETED_LABEL:
1767 /* Emit the label. We may have deleted the CODE_LABEL because
1768 the label could be proved to be unreachable, though still
1769 referenced (in the form of having its address taken. */
1770 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1773 case NOTE_INSN_VAR_LOCATION:
1774 (*debug_hooks->var_location) (insn);
1784 #if defined (DWARF2_UNWIND_INFO)
1785 if (dwarf2out_do_frame ())
1786 dwarf2out_frame_debug (insn, false);
1791 /* The target port might emit labels in the output function for
1792 some insn, e.g. sh.c output_branchy_insn. */
1793 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
1795 int align = LABEL_TO_ALIGNMENT (insn);
1796 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1797 int max_skip = LABEL_TO_MAX_SKIP (insn);
1800 if (align && NEXT_INSN (insn))
1802 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1803 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
1805 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1806 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
1808 ASM_OUTPUT_ALIGN (file, align);
1815 /* If this label is reached from only one place, set the condition
1816 codes from the instruction just before the branch. */
1818 /* Disabled because some insns set cc_status in the C output code
1819 and NOTICE_UPDATE_CC alone can set incorrect status. */
1820 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1822 rtx jump = LABEL_REFS (insn);
1823 rtx barrier = prev_nonnote_insn (insn);
1825 /* If the LABEL_REFS field of this label has been set to point
1826 at a branch, the predecessor of the branch is a regular
1827 insn, and that branch is the only way to reach this label,
1828 set the condition codes based on the branch and its
1830 if (barrier && BARRIER_P (barrier)
1831 && jump && JUMP_P (jump)
1832 && (prev = prev_nonnote_insn (jump))
1833 && NONJUMP_INSN_P (prev))
1835 NOTICE_UPDATE_CC (PATTERN (prev), prev);
1836 NOTICE_UPDATE_CC (PATTERN (jump), jump);
1841 if (LABEL_NAME (insn))
1842 (*debug_hooks->label) (insn);
1846 fputs (ASM_APP_OFF, file);
1850 next = next_nonnote_insn (insn);
1851 if (next != 0 && JUMP_P (next))
1853 rtx nextbody = PATTERN (next);
1855 /* If this label is followed by a jump-table,
1856 make sure we put the label in the read-only section. Also
1857 possibly write the label and jump table together. */
1859 if (GET_CODE (nextbody) == ADDR_VEC
1860 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1862 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1863 /* In this case, the case vector is being moved by the
1864 target, so don't output the label at all. Leave that
1865 to the back end macros. */
1867 if (! JUMP_TABLES_IN_TEXT_SECTION)
1871 switch_to_section (targetm.asm_out.function_rodata_section
1872 (current_function_decl));
1874 #ifdef ADDR_VEC_ALIGN
1875 log_align = ADDR_VEC_ALIGN (next);
1877 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
1879 ASM_OUTPUT_ALIGN (file, log_align);
1882 switch_to_section (current_function_section ());
1884 #ifdef ASM_OUTPUT_CASE_LABEL
1885 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
1888 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1894 if (LABEL_ALT_ENTRY_P (insn))
1895 output_alternate_entry_point (file, insn);
1897 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1902 rtx body = PATTERN (insn);
1903 int insn_code_number;
1904 const char *template;
1906 #ifdef HAVE_conditional_execution
1907 /* Reset this early so it is correct for ASM statements. */
1908 current_insn_predicate = NULL_RTX;
1910 /* An INSN, JUMP_INSN or CALL_INSN.
1911 First check for special kinds that recog doesn't recognize. */
1913 if (GET_CODE (body) == USE /* These are just declarations. */
1914 || GET_CODE (body) == CLOBBER)
1919 /* If there is a REG_CC_SETTER note on this insn, it means that
1920 the setting of the condition code was done in the delay slot
1921 of the insn that branched here. So recover the cc status
1922 from the insn that set it. */
1924 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1927 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
1928 cc_prev_status = cc_status;
1933 /* Detect insns that are really jump-tables
1934 and output them as such. */
1936 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1938 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1942 if (! JUMP_TABLES_IN_TEXT_SECTION)
1943 switch_to_section (targetm.asm_out.function_rodata_section
1944 (current_function_decl));
1946 switch_to_section (current_function_section ());
1950 fputs (ASM_APP_OFF, file);
1954 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1955 if (GET_CODE (body) == ADDR_VEC)
1957 #ifdef ASM_OUTPUT_ADDR_VEC
1958 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
1965 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
1966 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
1972 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
1973 for (idx = 0; idx < vlen; idx++)
1975 if (GET_CODE (body) == ADDR_VEC)
1977 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
1978 ASM_OUTPUT_ADDR_VEC_ELT
1979 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
1986 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
1987 ASM_OUTPUT_ADDR_DIFF_ELT
1990 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
1991 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
1997 #ifdef ASM_OUTPUT_CASE_END
1998 ASM_OUTPUT_CASE_END (file,
1999 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2004 switch_to_section (current_function_section ());
2008 /* Output this line note if it is the first or the last line
2010 if (notice_source_line (insn))
2012 (*debug_hooks->source_line) (last_linenum, last_filename);
2015 if (GET_CODE (body) == ASM_INPUT)
2017 const char *string = XSTR (body, 0);
2019 /* There's no telling what that did to the condition codes. */
2028 fputs (ASM_APP_ON, file);
2031 #ifdef USE_MAPPED_LOCATION
2032 loc = ASM_INPUT_SOURCE_LOCATION (body);
2034 loc.file = ASM_INPUT_SOURCE_FILE (body);
2035 loc.line = ASM_INPUT_SOURCE_LINE (body);
2037 if (*loc.file && loc.line)
2038 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2039 ASM_COMMENT_START, loc.line, loc.file);
2040 fprintf (asm_out_file, "\t%s\n", string);
2041 #if HAVE_AS_LINE_ZERO
2042 if (*loc.file && loc.line)
2043 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2049 /* Detect `asm' construct with operands. */
2050 if (asm_noperands (body) >= 0)
2052 unsigned int noperands = asm_noperands (body);
2053 rtx *ops = alloca (noperands * sizeof (rtx));
2057 /* There's no telling what that did to the condition codes. */
2060 /* Get out the operand values. */
2061 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2062 /* Inhibit dieing on what would otherwise be compiler bugs. */
2063 insn_noperands = noperands;
2064 this_is_asm_operands = insn;
2066 #ifdef FINAL_PRESCAN_INSN
2067 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2070 /* Output the insn using them. */
2075 fputs (ASM_APP_ON, file);
2078 if (loc.file && loc.line)
2079 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2080 ASM_COMMENT_START, loc.line, loc.file);
2081 output_asm_insn (string, ops);
2082 #if HAVE_AS_LINE_ZERO
2083 if (loc.file && loc.line)
2084 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2088 this_is_asm_operands = 0;
2094 fputs (ASM_APP_OFF, file);
2098 if (GET_CODE (body) == SEQUENCE)
2100 /* A delayed-branch sequence */
2103 final_sequence = body;
2105 /* Record the delay slots' frame information before the branch.
2106 This is needed for delayed calls: see execute_cfa_program(). */
2107 #if defined (DWARF2_UNWIND_INFO)
2108 if (dwarf2out_do_frame ())
2109 for (i = 1; i < XVECLEN (body, 0); i++)
2110 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
2113 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2114 force the restoration of a comparison that was previously
2115 thought unnecessary. If that happens, cancel this sequence
2116 and cause that insn to be restored. */
2118 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2119 if (next != XVECEXP (body, 0, 1))
2125 for (i = 1; i < XVECLEN (body, 0); i++)
2127 rtx insn = XVECEXP (body, 0, i);
2128 rtx next = NEXT_INSN (insn);
2129 /* We loop in case any instruction in a delay slot gets
2132 insn = final_scan_insn (insn, file, 0, 1, seen);
2133 while (insn != next);
2135 #ifdef DBR_OUTPUT_SEQEND
2136 DBR_OUTPUT_SEQEND (file);
2140 /* If the insn requiring the delay slot was a CALL_INSN, the
2141 insns in the delay slot are actually executed before the
2142 called function. Hence we don't preserve any CC-setting
2143 actions in these insns and the CC must be marked as being
2144 clobbered by the function. */
2145 if (CALL_P (XVECEXP (body, 0, 0)))
2152 /* We have a real machine instruction as rtl. */
2154 body = PATTERN (insn);
2157 set = single_set (insn);
2159 /* Check for redundant test and compare instructions
2160 (when the condition codes are already set up as desired).
2161 This is done only when optimizing; if not optimizing,
2162 it should be possible for the user to alter a variable
2163 with the debugger in between statements
2164 and the next statement should reexamine the variable
2165 to compute the condition codes. */
2170 && GET_CODE (SET_DEST (set)) == CC0
2171 && insn != last_ignored_compare)
2173 if (GET_CODE (SET_SRC (set)) == SUBREG)
2174 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2175 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2177 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2178 XEXP (SET_SRC (set), 0)
2179 = alter_subreg (&XEXP (SET_SRC (set), 0));
2180 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2181 XEXP (SET_SRC (set), 1)
2182 = alter_subreg (&XEXP (SET_SRC (set), 1));
2184 if ((cc_status.value1 != 0
2185 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2186 || (cc_status.value2 != 0
2187 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2189 /* Don't delete insn if it has an addressing side-effect. */
2190 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2191 /* or if anything in it is volatile. */
2192 && ! volatile_refs_p (PATTERN (insn)))
2194 /* We don't really delete the insn; just ignore it. */
2195 last_ignored_compare = insn;
2204 /* If this is a conditional branch, maybe modify it
2205 if the cc's are in a nonstandard state
2206 so that it accomplishes the same thing that it would
2207 do straightforwardly if the cc's were set up normally. */
2209 if (cc_status.flags != 0
2211 && GET_CODE (body) == SET
2212 && SET_DEST (body) == pc_rtx
2213 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2214 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2215 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2217 /* This function may alter the contents of its argument
2218 and clear some of the cc_status.flags bits.
2219 It may also return 1 meaning condition now always true
2220 or -1 meaning condition now always false
2221 or 2 meaning condition nontrivial but altered. */
2222 int result = alter_cond (XEXP (SET_SRC (body), 0));
2223 /* If condition now has fixed value, replace the IF_THEN_ELSE
2224 with its then-operand or its else-operand. */
2226 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2228 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2230 /* The jump is now either unconditional or a no-op.
2231 If it has become a no-op, don't try to output it.
2232 (It would not be recognized.) */
2233 if (SET_SRC (body) == pc_rtx)
2238 else if (GET_CODE (SET_SRC (body)) == RETURN)
2239 /* Replace (set (pc) (return)) with (return). */
2240 PATTERN (insn) = body = SET_SRC (body);
2242 /* Rerecognize the instruction if it has changed. */
2244 INSN_CODE (insn) = -1;
2247 /* If this is a conditional trap, maybe modify it if the cc's
2248 are in a nonstandard state so that it accomplishes the same
2249 thing that it would do straightforwardly if the cc's were
2251 if (cc_status.flags != 0
2252 && NONJUMP_INSN_P (insn)
2253 && GET_CODE (body) == TRAP_IF
2254 && COMPARISON_P (TRAP_CONDITION (body))
2255 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2257 /* This function may alter the contents of its argument
2258 and clear some of the cc_status.flags bits.
2259 It may also return 1 meaning condition now always true
2260 or -1 meaning condition now always false
2261 or 2 meaning condition nontrivial but altered. */
2262 int result = alter_cond (TRAP_CONDITION (body));
2264 /* If TRAP_CONDITION has become always false, delete the
2272 /* If TRAP_CONDITION has become always true, replace
2273 TRAP_CONDITION with const_true_rtx. */
2275 TRAP_CONDITION (body) = const_true_rtx;
2277 /* Rerecognize the instruction if it has changed. */
2279 INSN_CODE (insn) = -1;
2282 /* If this is a conditional trap, maybe modify it if the cc's
2283 are in a nonstandard state so that it accomplishes the same
2284 thing that it would do straightforwardly if the cc's were
2286 if (cc_status.flags != 0
2287 && NONJUMP_INSN_P (insn)
2288 && GET_CODE (body) == TRAP_IF
2289 && COMPARISON_P (TRAP_CONDITION (body))
2290 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2292 /* This function may alter the contents of its argument
2293 and clear some of the cc_status.flags bits.
2294 It may also return 1 meaning condition now always true
2295 or -1 meaning condition now always false
2296 or 2 meaning condition nontrivial but altered. */
2297 int result = alter_cond (TRAP_CONDITION (body));
2299 /* If TRAP_CONDITION has become always false, delete the
2307 /* If TRAP_CONDITION has become always true, replace
2308 TRAP_CONDITION with const_true_rtx. */
2310 TRAP_CONDITION (body) = const_true_rtx;
2312 /* Rerecognize the instruction if it has changed. */
2314 INSN_CODE (insn) = -1;
2317 /* Make same adjustments to instructions that examine the
2318 condition codes without jumping and instructions that
2319 handle conditional moves (if this machine has either one). */
2321 if (cc_status.flags != 0
2324 rtx cond_rtx, then_rtx, else_rtx;
2327 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2329 cond_rtx = XEXP (SET_SRC (set), 0);
2330 then_rtx = XEXP (SET_SRC (set), 1);
2331 else_rtx = XEXP (SET_SRC (set), 2);
2335 cond_rtx = SET_SRC (set);
2336 then_rtx = const_true_rtx;
2337 else_rtx = const0_rtx;
2340 switch (GET_CODE (cond_rtx))
2354 if (XEXP (cond_rtx, 0) != cc0_rtx)
2356 result = alter_cond (cond_rtx);
2358 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2359 else if (result == -1)
2360 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2361 else if (result == 2)
2362 INSN_CODE (insn) = -1;
2363 if (SET_DEST (set) == SET_SRC (set))
2375 #ifdef HAVE_peephole
2376 /* Do machine-specific peephole optimizations if desired. */
2378 if (optimize && !flag_no_peephole && !nopeepholes)
2380 rtx next = peephole (insn);
2381 /* When peepholing, if there were notes within the peephole,
2382 emit them before the peephole. */
2383 if (next != 0 && next != NEXT_INSN (insn))
2385 rtx note, prev = PREV_INSN (insn);
2387 for (note = NEXT_INSN (insn); note != next;
2388 note = NEXT_INSN (note))
2389 final_scan_insn (note, file, optimize, nopeepholes, seen);
2391 /* Put the notes in the proper position for a later
2392 rescan. For example, the SH target can do this
2393 when generating a far jump in a delayed branch
2395 note = NEXT_INSN (insn);
2396 PREV_INSN (note) = prev;
2397 NEXT_INSN (prev) = note;
2398 NEXT_INSN (PREV_INSN (next)) = insn;
2399 PREV_INSN (insn) = PREV_INSN (next);
2400 NEXT_INSN (insn) = next;
2401 PREV_INSN (next) = insn;
2404 /* PEEPHOLE might have changed this. */
2405 body = PATTERN (insn);
2409 /* Try to recognize the instruction.
2410 If successful, verify that the operands satisfy the
2411 constraints for the instruction. Crash if they don't,
2412 since `reload' should have changed them so that they do. */
2414 insn_code_number = recog_memoized (insn);
2415 cleanup_subreg_operands (insn);
2417 /* Dump the insn in the assembly for debugging. */
2418 if (flag_dump_rtl_in_asm)
2420 print_rtx_head = ASM_COMMENT_START;
2421 print_rtl_single (asm_out_file, insn);
2422 print_rtx_head = "";
2425 if (! constrain_operands_cached (1))
2426 fatal_insn_not_found (insn);
2428 /* Some target machines need to prescan each insn before
2431 #ifdef FINAL_PRESCAN_INSN
2432 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2435 #ifdef HAVE_conditional_execution
2436 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2437 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2441 cc_prev_status = cc_status;
2443 /* Update `cc_status' for this instruction.
2444 The instruction's output routine may change it further.
2445 If the output routine for a jump insn needs to depend
2446 on the cc status, it should look at cc_prev_status. */
2448 NOTICE_UPDATE_CC (body, insn);
2451 current_output_insn = debug_insn = insn;
2453 #if defined (DWARF2_UNWIND_INFO)
2454 if (CALL_P (insn) && dwarf2out_do_frame ())
2455 dwarf2out_frame_debug (insn, false);
2458 /* Find the proper template for this insn. */
2459 template = get_insn_template (insn_code_number, insn);
2461 /* If the C code returns 0, it means that it is a jump insn
2462 which follows a deleted test insn, and that test insn
2463 needs to be reinserted. */
2468 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2470 /* We have already processed the notes between the setter and
2471 the user. Make sure we don't process them again, this is
2472 particularly important if one of the notes is a block
2473 scope note or an EH note. */
2475 prev != last_ignored_compare;
2476 prev = PREV_INSN (prev))
2479 delete_insn (prev); /* Use delete_note. */
2485 /* If the template is the string "#", it means that this insn must
2487 if (template[0] == '#' && template[1] == '\0')
2489 rtx new = try_split (body, insn, 0);
2491 /* If we didn't split the insn, go away. */
2492 if (new == insn && PATTERN (new) == body)
2493 fatal_insn ("could not split insn", insn);
2495 #ifdef HAVE_ATTR_length
2496 /* This instruction should have been split in shorten_branches,
2497 to ensure that we would have valid length info for the
2505 #ifdef TARGET_UNWIND_INFO
2506 /* ??? This will put the directives in the wrong place if
2507 get_insn_template outputs assembly directly. However calling it
2508 before get_insn_template breaks if the insns is split. */
2509 targetm.asm_out.unwind_emit (asm_out_file, insn);
2512 /* Output assembler code from the template. */
2513 output_asm_insn (template, recog_data.operand);
2515 /* If necessary, report the effect that the instruction has on
2516 the unwind info. We've already done this for delay slots
2517 and call instructions. */
2518 #if defined (DWARF2_UNWIND_INFO)
2519 if (final_sequence == 0
2520 #if !defined (HAVE_prologue)
2521 && !ACCUMULATE_OUTGOING_ARGS
2523 && dwarf2out_do_frame ())
2524 dwarf2out_frame_debug (insn, true);
2527 current_output_insn = debug_insn = 0;
2530 return NEXT_INSN (insn);
2533 /* Return whether a source line note needs to be emitted before INSN. */
2536 notice_source_line (rtx insn)
2538 const char *filename = insn_file (insn);
2539 int linenum = insn_line (insn);
2542 && (force_source_line
2543 || filename != last_filename
2544 || last_linenum != linenum))
2546 force_source_line = false;
2547 last_filename = filename;
2548 last_linenum = linenum;
2549 high_block_linenum = MAX (last_linenum, high_block_linenum);
2550 high_function_linenum = MAX (last_linenum, high_function_linenum);
2556 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2557 directly to the desired hard register. */
2560 cleanup_subreg_operands (rtx insn)
2563 bool changed = false;
2564 extract_insn_cached (insn);
2565 for (i = 0; i < recog_data.n_operands; i++)
2567 /* The following test cannot use recog_data.operand when testing
2568 for a SUBREG: the underlying object might have been changed
2569 already if we are inside a match_operator expression that
2570 matches the else clause. Instead we test the underlying
2571 expression directly. */
2572 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2574 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2577 else if (GET_CODE (recog_data.operand[i]) == PLUS
2578 || GET_CODE (recog_data.operand[i]) == MULT
2579 || MEM_P (recog_data.operand[i]))
2580 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2583 for (i = 0; i < recog_data.n_dups; i++)
2585 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2587 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2590 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2591 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2592 || MEM_P (*recog_data.dup_loc[i]))
2593 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2596 df_insn_rescan (insn);
2599 /* If X is a SUBREG, replace it with a REG or a MEM,
2600 based on the thing it is a subreg of. */
2603 alter_subreg (rtx *xp)
2606 rtx y = SUBREG_REG (x);
2608 /* simplify_subreg does not remove subreg from volatile references.
2609 We are required to. */
2612 int offset = SUBREG_BYTE (x);
2614 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2615 contains 0 instead of the proper offset. See simplify_subreg. */
2617 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2619 int difference = GET_MODE_SIZE (GET_MODE (y))
2620 - GET_MODE_SIZE (GET_MODE (x));
2621 if (WORDS_BIG_ENDIAN)
2622 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2623 if (BYTES_BIG_ENDIAN)
2624 offset += difference % UNITS_PER_WORD;
2627 *xp = adjust_address (y, GET_MODE (x), offset);
2631 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2638 /* Simplify_subreg can't handle some REG cases, but we have to. */
2639 unsigned int regno = subreg_regno (x);
2640 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x));
2647 /* Do alter_subreg on all the SUBREGs contained in X. */
2650 walk_alter_subreg (rtx *xp, bool *changed)
2653 switch (GET_CODE (x))
2658 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2659 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
2664 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
2669 return alter_subreg (xp);
2680 /* Given BODY, the body of a jump instruction, alter the jump condition
2681 as required by the bits that are set in cc_status.flags.
2682 Not all of the bits there can be handled at this level in all cases.
2684 The value is normally 0.
2685 1 means that the condition has become always true.
2686 -1 means that the condition has become always false.
2687 2 means that COND has been altered. */
2690 alter_cond (rtx cond)
2694 if (cc_status.flags & CC_REVERSED)
2697 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2700 if (cc_status.flags & CC_INVERTED)
2703 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2706 if (cc_status.flags & CC_NOT_POSITIVE)
2707 switch (GET_CODE (cond))
2712 /* Jump becomes unconditional. */
2718 /* Jump becomes no-op. */
2722 PUT_CODE (cond, EQ);
2727 PUT_CODE (cond, NE);
2735 if (cc_status.flags & CC_NOT_NEGATIVE)
2736 switch (GET_CODE (cond))
2740 /* Jump becomes unconditional. */
2745 /* Jump becomes no-op. */
2750 PUT_CODE (cond, EQ);
2756 PUT_CODE (cond, NE);
2764 if (cc_status.flags & CC_NO_OVERFLOW)
2765 switch (GET_CODE (cond))
2768 /* Jump becomes unconditional. */
2772 PUT_CODE (cond, EQ);
2777 PUT_CODE (cond, NE);
2782 /* Jump becomes no-op. */
2789 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2790 switch (GET_CODE (cond))
2796 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2801 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2806 if (cc_status.flags & CC_NOT_SIGNED)
2807 /* The flags are valid if signed condition operators are converted
2809 switch (GET_CODE (cond))
2812 PUT_CODE (cond, LEU);
2817 PUT_CODE (cond, LTU);
2822 PUT_CODE (cond, GTU);
2827 PUT_CODE (cond, GEU);
2839 /* Report inconsistency between the assembler template and the operands.
2840 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2843 output_operand_lossage (const char *cmsgid, ...)
2847 const char *pfx_str;
2850 va_start (ap, cmsgid);
2852 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
2853 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
2854 vasprintf (&new_message, fmt_string, ap);
2856 if (this_is_asm_operands)
2857 error_for_asm (this_is_asm_operands, "%s", new_message);
2859 internal_error ("%s", new_message);
2866 /* Output of assembler code from a template, and its subroutines. */
2868 /* Annotate the assembly with a comment describing the pattern and
2869 alternative used. */
2872 output_asm_name (void)
2876 int num = INSN_CODE (debug_insn);
2877 fprintf (asm_out_file, "\t%s %d\t%s",
2878 ASM_COMMENT_START, INSN_UID (debug_insn),
2879 insn_data[num].name);
2880 if (insn_data[num].n_alternatives > 1)
2881 fprintf (asm_out_file, "/%d", which_alternative + 1);
2882 #ifdef HAVE_ATTR_length
2883 fprintf (asm_out_file, "\t[length = %d]",
2884 get_attr_length (debug_insn));
2886 /* Clear this so only the first assembler insn
2887 of any rtl insn will get the special comment for -dp. */
2892 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2893 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2894 corresponds to the address of the object and 0 if to the object. */
2897 get_mem_expr_from_op (rtx op, int *paddressp)
2905 return REG_EXPR (op);
2906 else if (!MEM_P (op))
2909 if (MEM_EXPR (op) != 0)
2910 return MEM_EXPR (op);
2912 /* Otherwise we have an address, so indicate it and look at the address. */
2916 /* First check if we have a decl for the address, then look at the right side
2917 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2918 But don't allow the address to itself be indirect. */
2919 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
2921 else if (GET_CODE (op) == PLUS
2922 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
2925 while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY
2926 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
2929 expr = get_mem_expr_from_op (op, &inner_addressp);
2930 return inner_addressp ? 0 : expr;
2933 /* Output operand names for assembler instructions. OPERANDS is the
2934 operand vector, OPORDER is the order to write the operands, and NOPS
2935 is the number of operands to write. */
2938 output_asm_operand_names (rtx *operands, int *oporder, int nops)
2943 for (i = 0; i < nops; i++)
2946 rtx op = operands[oporder[i]];
2947 tree expr = get_mem_expr_from_op (op, &addressp);
2949 fprintf (asm_out_file, "%c%s",
2950 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
2954 fprintf (asm_out_file, "%s",
2955 addressp ? "*" : "");
2956 print_mem_expr (asm_out_file, expr);
2959 else if (REG_P (op) && ORIGINAL_REGNO (op)
2960 && ORIGINAL_REGNO (op) != REGNO (op))
2961 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
2965 /* Output text from TEMPLATE to the assembler output file,
2966 obeying %-directions to substitute operands taken from
2967 the vector OPERANDS.
2969 %N (for N a digit) means print operand N in usual manner.
2970 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2971 and print the label name with no punctuation.
2972 %cN means require operand N to be a constant
2973 and print the constant expression with no punctuation.
2974 %aN means expect operand N to be a memory address
2975 (not a memory reference!) and print a reference
2977 %nN means expect operand N to be a constant
2978 and print a constant expression for minus the value
2979 of the operand, with no other punctuation. */
2982 output_asm_insn (const char *template, rtx *operands)
2986 #ifdef ASSEMBLER_DIALECT
2989 int oporder[MAX_RECOG_OPERANDS];
2990 char opoutput[MAX_RECOG_OPERANDS];
2993 /* An insn may return a null string template
2994 in a case where no assembler code is needed. */
2998 memset (opoutput, 0, sizeof opoutput);
3000 putc ('\t', asm_out_file);
3002 #ifdef ASM_OUTPUT_OPCODE
3003 ASM_OUTPUT_OPCODE (asm_out_file, p);
3010 if (flag_verbose_asm)
3011 output_asm_operand_names (operands, oporder, ops);
3012 if (flag_print_asm_name)
3016 memset (opoutput, 0, sizeof opoutput);
3018 putc (c, asm_out_file);
3019 #ifdef ASM_OUTPUT_OPCODE
3020 while ((c = *p) == '\t')
3022 putc (c, asm_out_file);
3025 ASM_OUTPUT_OPCODE (asm_out_file, p);
3029 #ifdef ASSEMBLER_DIALECT
3035 output_operand_lossage ("nested assembly dialect alternatives");
3039 /* If we want the first dialect, do nothing. Otherwise, skip
3040 DIALECT_NUMBER of strings ending with '|'. */
3041 for (i = 0; i < dialect_number; i++)
3043 while (*p && *p != '}' && *p++ != '|')
3052 output_operand_lossage ("unterminated assembly dialect alternative");
3059 /* Skip to close brace. */
3064 output_operand_lossage ("unterminated assembly dialect alternative");
3068 while (*p++ != '}');
3072 putc (c, asm_out_file);
3077 putc (c, asm_out_file);
3083 /* %% outputs a single %. */
3087 putc (c, asm_out_file);
3089 /* %= outputs a number which is unique to each insn in the entire
3090 compilation. This is useful for making local labels that are
3091 referred to more than once in a given insn. */
3095 fprintf (asm_out_file, "%d", insn_counter);
3097 /* % followed by a letter and some digits
3098 outputs an operand in a special way depending on the letter.
3099 Letters `acln' are implemented directly.
3100 Other letters are passed to `output_operand' so that
3101 the PRINT_OPERAND macro can define them. */
3102 else if (ISALPHA (*p))
3105 unsigned long opnum;
3108 opnum = strtoul (p, &endptr, 10);
3111 output_operand_lossage ("operand number missing "
3113 else if (this_is_asm_operands && opnum >= insn_noperands)
3114 output_operand_lossage ("operand number out of range");
3115 else if (letter == 'l')
3116 output_asm_label (operands[opnum]);
3117 else if (letter == 'a')
3118 output_address (operands[opnum]);
3119 else if (letter == 'c')
3121 if (CONSTANT_ADDRESS_P (operands[opnum]))
3122 output_addr_const (asm_out_file, operands[opnum]);
3124 output_operand (operands[opnum], 'c');
3126 else if (letter == 'n')
3128 if (GET_CODE (operands[opnum]) == CONST_INT)
3129 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3130 - INTVAL (operands[opnum]));
3133 putc ('-', asm_out_file);
3134 output_addr_const (asm_out_file, operands[opnum]);
3138 output_operand (operands[opnum], letter);
3140 if (!opoutput[opnum])
3141 oporder[ops++] = opnum;
3142 opoutput[opnum] = 1;
3147 /* % followed by a digit outputs an operand the default way. */
3148 else if (ISDIGIT (*p))
3150 unsigned long opnum;
3153 opnum = strtoul (p, &endptr, 10);
3154 if (this_is_asm_operands && opnum >= insn_noperands)
3155 output_operand_lossage ("operand number out of range");
3157 output_operand (operands[opnum], 0);
3159 if (!opoutput[opnum])
3160 oporder[ops++] = opnum;
3161 opoutput[opnum] = 1;
3166 /* % followed by punctuation: output something for that
3167 punctuation character alone, with no operand.
3168 The PRINT_OPERAND macro decides what is actually done. */
3169 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3170 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3171 output_operand (NULL_RTX, *p++);
3174 output_operand_lossage ("invalid %%-code");
3178 putc (c, asm_out_file);
3181 /* Write out the variable names for operands, if we know them. */
3182 if (flag_verbose_asm)
3183 output_asm_operand_names (operands, oporder, ops);
3184 if (flag_print_asm_name)
3187 putc ('\n', asm_out_file);
3190 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3193 output_asm_label (rtx x)
3197 if (GET_CODE (x) == LABEL_REF)
3201 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3202 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3204 output_operand_lossage ("'%%l' operand isn't a label");
3206 assemble_name (asm_out_file, buf);
3209 /* Print operand X using machine-dependent assembler syntax.
3210 The macro PRINT_OPERAND is defined just to control this function.
3211 CODE is a non-digit that preceded the operand-number in the % spec,
3212 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3213 between the % and the digits.
3214 When CODE is a non-letter, X is 0.
3216 The meanings of the letters are machine-dependent and controlled
3217 by PRINT_OPERAND. */
3220 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3222 if (x && GET_CODE (x) == SUBREG)
3223 x = alter_subreg (&x);
3225 /* X must not be a pseudo reg. */
3226 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3228 PRINT_OPERAND (asm_out_file, x, code);
3231 /* Print a memory reference operand for address X
3232 using machine-dependent assembler syntax.
3233 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3236 output_address (rtx x)
3238 bool changed = false;
3239 walk_alter_subreg (&x, &changed);
3240 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3243 /* Print an integer constant expression in assembler syntax.
3244 Addition and subtraction are the only arithmetic
3245 that may appear in these expressions. */
3248 output_addr_const (FILE *file, rtx x)
3253 switch (GET_CODE (x))
3260 if (SYMBOL_REF_DECL (x))
3261 mark_decl_referenced (SYMBOL_REF_DECL (x));
3262 #ifdef ASM_OUTPUT_SYMBOL_REF
3263 ASM_OUTPUT_SYMBOL_REF (file, x);
3265 assemble_name (file, XSTR (x, 0));
3273 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3274 #ifdef ASM_OUTPUT_LABEL_REF
3275 ASM_OUTPUT_LABEL_REF (file, buf);
3277 assemble_name (file, buf);
3282 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3286 /* This used to output parentheses around the expression,
3287 but that does not work on the 386 (either ATT or BSD assembler). */
3288 output_addr_const (file, XEXP (x, 0));
3292 if (GET_MODE (x) == VOIDmode)
3294 /* We can use %d if the number is one word and positive. */
3295 if (CONST_DOUBLE_HIGH (x))
3296 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3297 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3298 else if (CONST_DOUBLE_LOW (x) < 0)
3299 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3301 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3304 /* We can't handle floating point constants;
3305 PRINT_OPERAND must handle them. */
3306 output_operand_lossage ("floating constant misused");
3310 /* Some assemblers need integer constants to appear last (eg masm). */
3311 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3313 output_addr_const (file, XEXP (x, 1));
3314 if (INTVAL (XEXP (x, 0)) >= 0)
3315 fprintf (file, "+");
3316 output_addr_const (file, XEXP (x, 0));
3320 output_addr_const (file, XEXP (x, 0));
3321 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3322 || INTVAL (XEXP (x, 1)) >= 0)
3323 fprintf (file, "+");
3324 output_addr_const (file, XEXP (x, 1));
3329 /* Avoid outputting things like x-x or x+5-x,
3330 since some assemblers can't handle that. */
3331 x = simplify_subtraction (x);
3332 if (GET_CODE (x) != MINUS)
3335 output_addr_const (file, XEXP (x, 0));
3336 fprintf (file, "-");
3337 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3338 || GET_CODE (XEXP (x, 1)) == PC
3339 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3340 output_addr_const (file, XEXP (x, 1));
3343 fputs (targetm.asm_out.open_paren, file);
3344 output_addr_const (file, XEXP (x, 1));
3345 fputs (targetm.asm_out.close_paren, file);
3352 output_addr_const (file, XEXP (x, 0));
3356 #ifdef OUTPUT_ADDR_CONST_EXTRA
3357 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3362 output_operand_lossage ("invalid expression as operand");
3366 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3367 %R prints the value of REGISTER_PREFIX.
3368 %L prints the value of LOCAL_LABEL_PREFIX.
3369 %U prints the value of USER_LABEL_PREFIX.
3370 %I prints the value of IMMEDIATE_PREFIX.
3371 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3372 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3374 We handle alternate assembler dialects here, just like output_asm_insn. */
3377 asm_fprintf (FILE *file, const char *p, ...)
3383 va_start (argptr, p);
3390 #ifdef ASSEMBLER_DIALECT
3395 /* If we want the first dialect, do nothing. Otherwise, skip
3396 DIALECT_NUMBER of strings ending with '|'. */
3397 for (i = 0; i < dialect_number; i++)
3399 while (*p && *p++ != '|')
3409 /* Skip to close brace. */
3410 while (*p && *p++ != '}')
3421 while (strchr ("-+ #0", c))
3426 while (ISDIGIT (c) || c == '.')
3437 case 'd': case 'i': case 'u':
3438 case 'x': case 'X': case 'o':
3442 fprintf (file, buf, va_arg (argptr, int));
3446 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3447 'o' cases, but we do not check for those cases. It
3448 means that the value is a HOST_WIDE_INT, which may be
3449 either `long' or `long long'. */
3450 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3451 q += strlen (HOST_WIDE_INT_PRINT);
3454 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3459 #ifdef HAVE_LONG_LONG
3465 fprintf (file, buf, va_arg (argptr, long long));
3472 fprintf (file, buf, va_arg (argptr, long));
3480 fprintf (file, buf, va_arg (argptr, char *));
3484 #ifdef ASM_OUTPUT_OPCODE
3485 ASM_OUTPUT_OPCODE (asm_out_file, p);
3490 #ifdef REGISTER_PREFIX
3491 fprintf (file, "%s", REGISTER_PREFIX);
3496 #ifdef IMMEDIATE_PREFIX
3497 fprintf (file, "%s", IMMEDIATE_PREFIX);
3502 #ifdef LOCAL_LABEL_PREFIX
3503 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3508 fputs (user_label_prefix, file);
3511 #ifdef ASM_FPRINTF_EXTENSIONS
3512 /* Uppercase letters are reserved for general use by asm_fprintf
3513 and so are not available to target specific code. In order to
3514 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3515 they are defined here. As they get turned into real extensions
3516 to asm_fprintf they should be removed from this list. */
3517 case 'A': case 'B': case 'C': case 'D': case 'E':
3518 case 'F': case 'G': case 'H': case 'J': case 'K':
3519 case 'M': case 'N': case 'P': case 'Q': case 'S':
3520 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3523 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3536 /* Split up a CONST_DOUBLE or integer constant rtx
3537 into two rtx's for single words,
3538 storing in *FIRST the word that comes first in memory in the target
3539 and in *SECOND the other. */
3542 split_double (rtx value, rtx *first, rtx *second)
3544 if (GET_CODE (value) == CONST_INT)
3546 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3548 /* In this case the CONST_INT holds both target words.
3549 Extract the bits from it into two word-sized pieces.
3550 Sign extend each half to HOST_WIDE_INT. */
3551 unsigned HOST_WIDE_INT low, high;
3552 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3554 /* Set sign_bit to the most significant bit of a word. */
3556 sign_bit <<= BITS_PER_WORD - 1;
3558 /* Set mask so that all bits of the word are set. We could
3559 have used 1 << BITS_PER_WORD instead of basing the
3560 calculation on sign_bit. However, on machines where
3561 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3562 compiler warning, even though the code would never be
3564 mask = sign_bit << 1;
3567 /* Set sign_extend as any remaining bits. */
3568 sign_extend = ~mask;
3570 /* Pick the lower word and sign-extend it. */
3571 low = INTVAL (value);
3576 /* Pick the higher word, shifted to the least significant
3577 bits, and sign-extend it. */
3578 high = INTVAL (value);
3579 high >>= BITS_PER_WORD - 1;
3582 if (high & sign_bit)
3583 high |= sign_extend;
3585 /* Store the words in the target machine order. */
3586 if (WORDS_BIG_ENDIAN)
3588 *first = GEN_INT (high);
3589 *second = GEN_INT (low);
3593 *first = GEN_INT (low);
3594 *second = GEN_INT (high);
3599 /* The rule for using CONST_INT for a wider mode
3600 is that we regard the value as signed.
3601 So sign-extend it. */
3602 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3603 if (WORDS_BIG_ENDIAN)
3615 else if (GET_CODE (value) != CONST_DOUBLE)
3617 if (WORDS_BIG_ENDIAN)
3619 *first = const0_rtx;
3625 *second = const0_rtx;
3628 else if (GET_MODE (value) == VOIDmode
3629 /* This is the old way we did CONST_DOUBLE integers. */
3630 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3632 /* In an integer, the words are defined as most and least significant.
3633 So order them by the target's convention. */
3634 if (WORDS_BIG_ENDIAN)
3636 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3637 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3641 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3642 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3649 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3651 /* Note, this converts the REAL_VALUE_TYPE to the target's
3652 format, splits up the floating point double and outputs
3653 exactly 32 bits of it into each of l[0] and l[1] --
3654 not necessarily BITS_PER_WORD bits. */
3655 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3657 /* If 32 bits is an entire word for the target, but not for the host,
3658 then sign-extend on the host so that the number will look the same
3659 way on the host that it would on the target. See for instance
3660 simplify_unary_operation. The #if is needed to avoid compiler
3663 #if HOST_BITS_PER_LONG > 32
3664 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3666 if (l[0] & ((long) 1 << 31))
3667 l[0] |= ((long) (-1) << 32);
3668 if (l[1] & ((long) 1 << 31))
3669 l[1] |= ((long) (-1) << 32);
3673 *first = GEN_INT (l[0]);
3674 *second = GEN_INT (l[1]);
3678 /* Return nonzero if this function has no function calls. */
3681 leaf_function_p (void)
3686 if (current_function_profile || profile_arc_flag)
3689 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3692 && ! SIBLING_CALL_P (insn))
3694 if (NONJUMP_INSN_P (insn)
3695 && GET_CODE (PATTERN (insn)) == SEQUENCE
3696 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3697 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3700 for (link = current_function_epilogue_delay_list;
3702 link = XEXP (link, 1))
3704 insn = XEXP (link, 0);
3707 && ! SIBLING_CALL_P (insn))
3709 if (NONJUMP_INSN_P (insn)
3710 && GET_CODE (PATTERN (insn)) == SEQUENCE
3711 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3712 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3719 /* Return 1 if branch is a forward branch.
3720 Uses insn_shuid array, so it works only in the final pass. May be used by
3721 output templates to customary add branch prediction hints.
3724 final_forward_branch_p (rtx insn)
3726 int insn_id, label_id;
3728 gcc_assert (uid_shuid);
3729 insn_id = INSN_SHUID (insn);
3730 label_id = INSN_SHUID (JUMP_LABEL (insn));
3731 /* We've hit some insns that does not have id information available. */
3732 gcc_assert (insn_id && label_id);
3733 return insn_id < label_id;
3736 /* On some machines, a function with no call insns
3737 can run faster if it doesn't create its own register window.
3738 When output, the leaf function should use only the "output"
3739 registers. Ordinarily, the function would be compiled to use
3740 the "input" registers to find its arguments; it is a candidate
3741 for leaf treatment if it uses only the "input" registers.
3742 Leaf function treatment means renumbering so the function
3743 uses the "output" registers instead. */
3745 #ifdef LEAF_REGISTERS
3747 /* Return 1 if this function uses only the registers that can be
3748 safely renumbered. */
3751 only_leaf_regs_used (void)
3754 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3756 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3757 if ((df_regs_ever_live_p (i) || global_regs[i])
3758 && ! permitted_reg_in_leaf_functions[i])
3761 if (current_function_uses_pic_offset_table
3762 && pic_offset_table_rtx != 0
3763 && REG_P (pic_offset_table_rtx)
3764 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3770 /* Scan all instructions and renumber all registers into those
3771 available in leaf functions. */
3774 leaf_renumber_regs (rtx first)
3778 /* Renumber only the actual patterns.
3779 The reg-notes can contain frame pointer refs,
3780 and renumbering them could crash, and should not be needed. */
3781 for (insn = first; insn; insn = NEXT_INSN (insn))
3783 leaf_renumber_regs_insn (PATTERN (insn));
3784 for (insn = current_function_epilogue_delay_list;
3786 insn = XEXP (insn, 1))
3787 if (INSN_P (XEXP (insn, 0)))
3788 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3791 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3792 available in leaf functions. */
3795 leaf_renumber_regs_insn (rtx in_rtx)
3798 const char *format_ptr;
3803 /* Renumber all input-registers into output-registers.
3804 renumbered_regs would be 1 for an output-register;
3811 /* Don't renumber the same reg twice. */
3815 newreg = REGNO (in_rtx);
3816 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3817 to reach here as part of a REG_NOTE. */
3818 if (newreg >= FIRST_PSEUDO_REGISTER)
3823 newreg = LEAF_REG_REMAP (newreg);
3824 gcc_assert (newreg >= 0);
3825 df_set_regs_ever_live (REGNO (in_rtx), false);
3826 df_set_regs_ever_live (newreg, true);
3827 SET_REGNO (in_rtx, newreg);
3831 if (INSN_P (in_rtx))
3833 /* Inside a SEQUENCE, we find insns.
3834 Renumber just the patterns of these insns,
3835 just as we do for the top-level insns. */
3836 leaf_renumber_regs_insn (PATTERN (in_rtx));
3840 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3842 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3843 switch (*format_ptr++)
3846 leaf_renumber_regs_insn (XEXP (in_rtx, i));
3850 if (NULL != XVEC (in_rtx, i))
3852 for (j = 0; j < XVECLEN (in_rtx, i); j++)
3853 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
3873 /* When -gused is used, emit debug info for only used symbols. But in
3874 addition to the standard intercepted debug_hooks there are some direct
3875 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3876 Those routines may also be called from a higher level intercepted routine. So
3877 to prevent recording data for an inner call to one of these for an intercept,
3878 we maintain an intercept nesting counter (debug_nesting). We only save the
3879 intercepted arguments if the nesting is 1. */
3880 int debug_nesting = 0;
3882 static tree *symbol_queue;
3883 int symbol_queue_index = 0;
3884 static int symbol_queue_size = 0;
3886 /* Generate the symbols for any queued up type symbols we encountered
3887 while generating the type info for some originally used symbol.
3888 This might generate additional entries in the queue. Only when
3889 the nesting depth goes to 0 is this routine called. */
3892 debug_flush_symbol_queue (void)
3896 /* Make sure that additionally queued items are not flushed
3901 for (i = 0; i < symbol_queue_index; ++i)
3903 /* If we pushed queued symbols then such symbols must be
3904 output no matter what anyone else says. Specifically,
3905 we need to make sure dbxout_symbol() thinks the symbol was
3906 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3907 which may be set for outside reasons. */
3908 int saved_tree_used = TREE_USED (symbol_queue[i]);
3909 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
3910 TREE_USED (symbol_queue[i]) = 1;
3911 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
3913 #ifdef DBX_DEBUGGING_INFO
3914 dbxout_symbol (symbol_queue[i], 0);
3917 TREE_USED (symbol_queue[i]) = saved_tree_used;
3918 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
3921 symbol_queue_index = 0;
3925 /* Queue a type symbol needed as part of the definition of a decl
3926 symbol. These symbols are generated when debug_flush_symbol_queue()
3930 debug_queue_symbol (tree decl)
3932 if (symbol_queue_index >= symbol_queue_size)
3934 symbol_queue_size += 10;
3935 symbol_queue = xrealloc (symbol_queue,
3936 symbol_queue_size * sizeof (tree));
3939 symbol_queue[symbol_queue_index++] = decl;
3942 /* Free symbol queue. */
3944 debug_free_queue (void)
3948 free (symbol_queue);
3949 symbol_queue = NULL;
3950 symbol_queue_size = 0;
3954 /* Turn the RTL into assembly. */
3956 rest_of_handle_final (void)
3961 /* Get the function's name, as described by its RTL. This may be
3962 different from the DECL_NAME name used in the source file. */
3964 x = DECL_RTL (current_function_decl);
3965 gcc_assert (MEM_P (x));
3967 gcc_assert (GET_CODE (x) == SYMBOL_REF);
3968 fnname = XSTR (x, 0);
3970 assemble_start_function (current_function_decl, fnname);
3971 final_start_function (get_insns (), asm_out_file, optimize);
3972 final (get_insns (), asm_out_file, optimize);
3973 final_end_function ();
3975 #ifdef TARGET_UNWIND_INFO
3976 /* ??? The IA-64 ".handlerdata" directive must be issued before
3977 the ".endp" directive that closes the procedure descriptor. */
3978 output_function_exception_table (fnname);
3981 assemble_end_function (current_function_decl, fnname);
3983 #ifndef TARGET_UNWIND_INFO
3984 /* Otherwise, it feels unclean to switch sections in the middle. */
3985 output_function_exception_table (fnname);
3988 user_defined_section_attribute = false;
3990 /* Free up reg info memory. */
3994 fflush (asm_out_file);
3996 /* Write DBX symbols if requested. */
3998 /* Note that for those inline functions where we don't initially
3999 know for certain that we will be generating an out-of-line copy,
4000 the first invocation of this routine (rest_of_compilation) will
4001 skip over this code by doing a `goto exit_rest_of_compilation;'.
4002 Later on, wrapup_global_declarations will (indirectly) call
4003 rest_of_compilation again for those inline functions that need
4004 to have out-of-line copies generated. During that call, we
4005 *will* be routed past here. */
4007 timevar_push (TV_SYMOUT);
4008 (*debug_hooks->function_decl) (current_function_decl);
4009 timevar_pop (TV_SYMOUT);
4010 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4011 && targetm.have_ctors_dtors)
4012 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4013 decl_init_priority_lookup
4014 (current_function_decl));
4015 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4016 && targetm.have_ctors_dtors)
4017 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4018 decl_fini_priority_lookup
4019 (current_function_decl));
4023 struct tree_opt_pass pass_final =
4027 rest_of_handle_final, /* execute */
4030 0, /* static_pass_number */
4031 TV_FINAL, /* tv_id */
4032 0, /* properties_required */
4033 0, /* properties_provided */
4034 0, /* properties_destroyed */
4035 0, /* todo_flags_start */
4036 TODO_ggc_collect, /* todo_flags_finish */
4042 rest_of_handle_shorten_branches (void)
4044 /* Shorten branches. */
4045 shorten_branches (get_insns ());
4049 struct tree_opt_pass pass_shorten_branches =
4051 "shorten", /* name */
4053 rest_of_handle_shorten_branches, /* execute */
4056 0, /* static_pass_number */
4057 TV_FINAL, /* tv_id */
4058 0, /* properties_required */
4059 0, /* properties_provided */
4060 0, /* properties_destroyed */
4061 0, /* todo_flags_start */
4062 TODO_dump_func, /* todo_flags_finish */
4068 rest_of_clean_state (void)
4072 /* It is very important to decompose the RTL instruction chain here:
4073 debug information keeps pointing into CODE_LABEL insns inside the function
4074 body. If these remain pointing to the other insns, we end up preserving
4075 whole RTL chain and attached detailed debug info in memory. */
4076 for (insn = get_insns (); insn; insn = next)
4078 next = NEXT_INSN (insn);
4079 NEXT_INSN (insn) = NULL;
4080 PREV_INSN (insn) = NULL;
4083 /* In case the function was not output,
4084 don't leave any temporary anonymous types
4085 queued up for sdb output. */
4086 #ifdef SDB_DEBUGGING_INFO
4087 if (write_symbols == SDB_DEBUG)
4088 sdbout_types (NULL_TREE);
4091 reload_completed = 0;
4092 epilogue_completed = 0;
4094 regstack_completed = 0;
4097 /* Clear out the insn_length contents now that they are no
4099 init_insn_lengths ();
4101 /* Show no temporary slots allocated. */
4104 free_bb_for_insn ();
4106 if (targetm.binds_local_p (current_function_decl))
4108 int pref = cfun->preferred_stack_boundary;
4109 if (cfun->stack_alignment_needed > cfun->preferred_stack_boundary)
4110 pref = cfun->stack_alignment_needed;
4111 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4115 /* Make sure volatile mem refs aren't considered valid operands for
4116 arithmetic insns. We must call this here if this is a nested inline
4117 function, since the above code leaves us in the init_recog state,
4118 and the function context push/pop code does not save/restore volatile_ok.
4120 ??? Maybe it isn't necessary for expand_start_function to call this
4121 anymore if we do it here? */
4123 init_recog_no_volatile ();
4125 /* We're done with this function. Free up memory if we can. */
4126 free_after_parsing (cfun);
4127 free_after_compilation (cfun);
4131 struct tree_opt_pass pass_clean_state =
4135 rest_of_clean_state, /* execute */
4138 0, /* static_pass_number */
4139 TV_FINAL, /* tv_id */
4140 0, /* properties_required */
4141 0, /* properties_provided */
4142 PROP_rtl, /* properties_destroyed */
4143 0, /* todo_flags_start */
4144 0, /* todo_flags_finish */