1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num = 1;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these are unique; no other rtx-object will be equal to any
81 rtx global_rtl[GR_MAX];
83 /* Commonly used RTL for hard registers. These objects are not necessarily
84 unique, so we allocate them separately from global_rtl. They are
85 initialized once per compilation unit, then copied into regno_reg_rtx
86 at the beginning of each function. */
87 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
89 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
90 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
91 record a copy of const[012]_rtx. */
93 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
97 REAL_VALUE_TYPE dconst0;
98 REAL_VALUE_TYPE dconst1;
99 REAL_VALUE_TYPE dconst2;
100 REAL_VALUE_TYPE dconst3;
101 REAL_VALUE_TYPE dconst10;
102 REAL_VALUE_TYPE dconstm1;
103 REAL_VALUE_TYPE dconstm2;
104 REAL_VALUE_TYPE dconsthalf;
105 REAL_VALUE_TYPE dconstthird;
106 REAL_VALUE_TYPE dconstpi;
107 REAL_VALUE_TYPE dconste;
109 /* All references to the following fixed hard registers go through
110 these unique rtl objects. On machines where the frame-pointer and
111 arg-pointer are the same register, they use the same unique object.
113 After register allocation, other rtl objects which used to be pseudo-regs
114 may be clobbered to refer to the frame-pointer register.
115 But references that were originally to the frame-pointer can be
116 distinguished from the others because they contain frame_pointer_rtx.
118 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
119 tricky: until register elimination has taken place hard_frame_pointer_rtx
120 should be used if it is being set, and frame_pointer_rtx otherwise. After
121 register elimination hard_frame_pointer_rtx should always be used.
122 On machines where the two registers are same (most) then these are the
125 In an inline procedure, the stack and frame pointer rtxs may not be
126 used for anything else. */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
146 htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
150 htab_t mem_attrs_htab;
152 /* A hash table storing register attribute structures. */
153 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
154 htab_t reg_attrs_htab;
156 /* A hash table storing all CONST_DOUBLEs. */
157 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
158 htab_t const_double_htab;
160 #define first_insn (cfun->emit->x_first_insn)
161 #define last_insn (cfun->emit->x_last_insn)
162 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
163 #define last_location (cfun->emit->x_last_location)
164 #define first_label_num (cfun->emit->x_first_label_num)
166 static rtx make_jump_insn_raw (rtx);
167 static rtx make_call_insn_raw (rtx);
168 static rtx find_line_note (rtx);
169 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
170 static void unshare_all_decls (tree);
171 static void reset_used_decls (tree);
172 static void mark_label_nuses (rtx);
173 static hashval_t const_int_htab_hash (const void *);
174 static int const_int_htab_eq (const void *, const void *);
175 static hashval_t const_double_htab_hash (const void *);
176 static int const_double_htab_eq (const void *, const void *);
177 static rtx lookup_const_double (rtx);
178 static hashval_t mem_attrs_htab_hash (const void *);
179 static int mem_attrs_htab_eq (const void *, const void *);
180 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
182 static hashval_t reg_attrs_htab_hash (const void *);
183 static int reg_attrs_htab_eq (const void *, const void *);
184 static reg_attrs *get_reg_attrs (tree, int);
185 static tree component_ref_for_mem_expr (tree);
186 static rtx gen_const_vector (enum machine_mode, int);
187 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
188 static void copy_rtx_if_shared_1 (rtx *orig);
190 /* Probability of the conditional branch currently proceeded by try_split.
191 Set to -1 otherwise. */
192 int split_branch_probability = -1;
194 /* Returns a hash code for X (which is a really a CONST_INT). */
197 const_int_htab_hash (const void *x)
199 return (hashval_t) INTVAL ((rtx) x);
202 /* Returns nonzero if the value represented by X (which is really a
203 CONST_INT) is the same as that given by Y (which is really a
207 const_int_htab_eq (const void *x, const void *y)
209 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
212 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
214 const_double_htab_hash (const void *x)
219 if (GET_MODE (value) == VOIDmode)
220 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
223 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
224 /* MODE is used in the comparison, so it should be in the hash. */
225 h ^= GET_MODE (value);
230 /* Returns nonzero if the value represented by X (really a ...)
231 is the same as that represented by Y (really a ...) */
233 const_double_htab_eq (const void *x, const void *y)
235 rtx a = (rtx)x, b = (rtx)y;
237 if (GET_MODE (a) != GET_MODE (b))
239 if (GET_MODE (a) == VOIDmode)
240 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
241 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
243 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
244 CONST_DOUBLE_REAL_VALUE (b));
247 /* Returns a hash code for X (which is a really a mem_attrs *). */
250 mem_attrs_htab_hash (const void *x)
252 mem_attrs *p = (mem_attrs *) x;
254 return (p->alias ^ (p->align * 1000)
255 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
256 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
260 /* Returns nonzero if the value represented by X (which is really a
261 mem_attrs *) is the same as that given by Y (which is also really a
265 mem_attrs_htab_eq (const void *x, const void *y)
267 mem_attrs *p = (mem_attrs *) x;
268 mem_attrs *q = (mem_attrs *) y;
270 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
271 && p->size == q->size && p->align == q->align);
274 /* Allocate a new mem_attrs structure and insert it into the hash table if
275 one identical to it is not already in the table. We are doing this for
279 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
280 unsigned int align, enum machine_mode mode)
285 /* If everything is the default, we can just return zero.
286 This must match what the corresponding MEM_* macros return when the
287 field is not present. */
288 if (alias == 0 && expr == 0 && offset == 0
290 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
291 && (STRICT_ALIGNMENT && mode != BLKmode
292 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
297 attrs.offset = offset;
301 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
304 *slot = ggc_alloc (sizeof (mem_attrs));
305 memcpy (*slot, &attrs, sizeof (mem_attrs));
311 /* Returns a hash code for X (which is a really a reg_attrs *). */
314 reg_attrs_htab_hash (const void *x)
316 reg_attrs *p = (reg_attrs *) x;
318 return ((p->offset * 1000) ^ (long) p->decl);
321 /* Returns nonzero if the value represented by X (which is really a
322 reg_attrs *) is the same as that given by Y (which is also really a
326 reg_attrs_htab_eq (const void *x, const void *y)
328 reg_attrs *p = (reg_attrs *) x;
329 reg_attrs *q = (reg_attrs *) y;
331 return (p->decl == q->decl && p->offset == q->offset);
333 /* Allocate a new reg_attrs structure and insert it into the hash table if
334 one identical to it is not already in the table. We are doing this for
338 get_reg_attrs (tree decl, int offset)
343 /* If everything is the default, we can just return zero. */
344 if (decl == 0 && offset == 0)
348 attrs.offset = offset;
350 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
353 *slot = ggc_alloc (sizeof (reg_attrs));
354 memcpy (*slot, &attrs, sizeof (reg_attrs));
360 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
361 don't attempt to share with the various global pieces of rtl (such as
362 frame_pointer_rtx). */
365 gen_raw_REG (enum machine_mode mode, int regno)
367 rtx x = gen_rtx_raw_REG (mode, regno);
368 ORIGINAL_REGNO (x) = regno;
372 /* There are some RTL codes that require special attention; the generation
373 functions do the raw handling. If you add to this list, modify
374 special_rtx in gengenrtl.c as well. */
377 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
381 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
382 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
384 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
385 if (const_true_rtx && arg == STORE_FLAG_VALUE)
386 return const_true_rtx;
389 /* Look up the CONST_INT in the hash table. */
390 slot = htab_find_slot_with_hash (const_int_htab, &arg,
391 (hashval_t) arg, INSERT);
393 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
399 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
401 return GEN_INT (trunc_int_for_mode (c, mode));
404 /* CONST_DOUBLEs might be created from pairs of integers, or from
405 REAL_VALUE_TYPEs. Also, their length is known only at run time,
406 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
408 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
409 hash table. If so, return its counterpart; otherwise add it
410 to the hash table and return it. */
412 lookup_const_double (rtx real)
414 void **slot = htab_find_slot (const_double_htab, real, INSERT);
421 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
422 VALUE in mode MODE. */
424 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
426 rtx real = rtx_alloc (CONST_DOUBLE);
427 PUT_MODE (real, mode);
429 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
431 return lookup_const_double (real);
434 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
435 of ints: I0 is the low-order word and I1 is the high-order word.
436 Do not use this routine for non-integer modes; convert to
437 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
440 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
445 if (mode != VOIDmode)
449 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
450 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
451 /* We can get a 0 for an error mark. */
452 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
453 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
455 /* We clear out all bits that don't belong in MODE, unless they and
456 our sign bit are all one. So we get either a reasonable negative
457 value or a reasonable unsigned value for this mode. */
458 width = GET_MODE_BITSIZE (mode);
459 if (width < HOST_BITS_PER_WIDE_INT
460 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
461 != ((HOST_WIDE_INT) (-1) << (width - 1))))
462 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
463 else if (width == HOST_BITS_PER_WIDE_INT
464 && ! (i1 == ~0 && i0 < 0))
467 /* We should be able to represent this value as a constant. */
468 gcc_assert (width <= 2 * HOST_BITS_PER_WIDE_INT);
470 /* If this would be an entire word for the target, but is not for
471 the host, then sign-extend on the host so that the number will
472 look the same way on the host that it would on the target.
474 For example, when building a 64 bit alpha hosted 32 bit sparc
475 targeted compiler, then we want the 32 bit unsigned value -1 to be
476 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
477 The latter confuses the sparc backend. */
479 if (width < HOST_BITS_PER_WIDE_INT
480 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
481 i0 |= ((HOST_WIDE_INT) (-1) << width);
483 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
486 ??? Strictly speaking, this is wrong if we create a CONST_INT for
487 a large unsigned constant with the size of MODE being
488 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
489 in a wider mode. In that case we will mis-interpret it as a
492 Unfortunately, the only alternative is to make a CONST_DOUBLE for
493 any constant in any mode if it is an unsigned constant larger
494 than the maximum signed integer in an int on the host. However,
495 doing this will break everyone that always expects to see a
496 CONST_INT for SImode and smaller.
498 We have always been making CONST_INTs in this case, so nothing
499 new is being broken. */
501 if (width <= HOST_BITS_PER_WIDE_INT)
502 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
505 /* If this integer fits in one word, return a CONST_INT. */
506 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
509 /* We use VOIDmode for integers. */
510 value = rtx_alloc (CONST_DOUBLE);
511 PUT_MODE (value, VOIDmode);
513 CONST_DOUBLE_LOW (value) = i0;
514 CONST_DOUBLE_HIGH (value) = i1;
516 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
517 XWINT (value, i) = 0;
519 return lookup_const_double (value);
523 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
525 /* In case the MD file explicitly references the frame pointer, have
526 all such references point to the same frame pointer. This is
527 used during frame pointer elimination to distinguish the explicit
528 references to these registers from pseudos that happened to be
531 If we have eliminated the frame pointer or arg pointer, we will
532 be using it as a normal register, for example as a spill
533 register. In such cases, we might be accessing it in a mode that
534 is not Pmode and therefore cannot use the pre-allocated rtx.
536 Also don't do this when we are making new REGs in reload, since
537 we don't want to get confused with the real pointers. */
539 if (mode == Pmode && !reload_in_progress)
541 if (regno == FRAME_POINTER_REGNUM
542 && (!reload_completed || frame_pointer_needed))
543 return frame_pointer_rtx;
544 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
545 if (regno == HARD_FRAME_POINTER_REGNUM
546 && (!reload_completed || frame_pointer_needed))
547 return hard_frame_pointer_rtx;
549 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
550 if (regno == ARG_POINTER_REGNUM)
551 return arg_pointer_rtx;
553 #ifdef RETURN_ADDRESS_POINTER_REGNUM
554 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
555 return return_address_pointer_rtx;
557 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
558 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
559 return pic_offset_table_rtx;
560 if (regno == STACK_POINTER_REGNUM)
561 return stack_pointer_rtx;
565 /* If the per-function register table has been set up, try to re-use
566 an existing entry in that table to avoid useless generation of RTL.
568 This code is disabled for now until we can fix the various backends
569 which depend on having non-shared hard registers in some cases. Long
570 term we want to re-enable this code as it can significantly cut down
571 on the amount of useless RTL that gets generated.
573 We'll also need to fix some code that runs after reload that wants to
574 set ORIGINAL_REGNO. */
579 && regno < FIRST_PSEUDO_REGISTER
580 && reg_raw_mode[regno] == mode)
581 return regno_reg_rtx[regno];
584 return gen_raw_REG (mode, regno);
588 gen_rtx_MEM (enum machine_mode mode, rtx addr)
590 rtx rt = gen_rtx_raw_MEM (mode, addr);
592 /* This field is not cleared by the mere allocation of the rtx, so
599 /* Generate a memory referring to non-trapping constant memory. */
602 gen_const_mem (enum machine_mode mode, rtx addr)
604 rtx mem = gen_rtx_MEM (mode, addr);
605 MEM_READONLY_P (mem) = 1;
606 MEM_NOTRAP_P (mem) = 1;
611 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
613 /* This is the most common failure type.
614 Catch it early so we can see who does it. */
615 gcc_assert (!(offset % GET_MODE_SIZE (mode)));
617 /* This check isn't usable right now because combine will
618 throw arbitrary crap like a CALL into a SUBREG in
619 gen_lowpart_for_combine so we must just eat it. */
621 /* Check for this too. */
622 gcc_assert (offset < GET_MODE_SIZE (GET_MODE (reg)));
624 return gen_rtx_raw_SUBREG (mode, reg, offset);
627 /* Generate a SUBREG representing the least-significant part of REG if MODE
628 is smaller than mode of REG, otherwise paradoxical SUBREG. */
631 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
633 enum machine_mode inmode;
635 inmode = GET_MODE (reg);
636 if (inmode == VOIDmode)
638 return gen_rtx_SUBREG (mode, reg,
639 subreg_lowpart_offset (mode, inmode));
642 /* gen_rtvec (n, [rt1, ..., rtn])
644 ** This routine creates an rtvec and stores within it the
645 ** pointers to rtx's which are its arguments.
650 gen_rtvec (int n, ...)
659 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
661 vector = alloca (n * sizeof (rtx));
663 for (i = 0; i < n; i++)
664 vector[i] = va_arg (p, rtx);
666 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
670 return gen_rtvec_v (save_n, vector);
674 gen_rtvec_v (int n, rtx *argp)
680 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
682 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
684 for (i = 0; i < n; i++)
685 rt_val->elem[i] = *argp++;
690 /* Generate a REG rtx for a new pseudo register of mode MODE.
691 This pseudo is assigned the next sequential register number. */
694 gen_reg_rtx (enum machine_mode mode)
696 struct function *f = cfun;
699 /* Don't let anything called after initial flow analysis create new
701 gcc_assert (!no_new_pseudos);
703 if (generating_concat_p
704 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
705 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
707 /* For complex modes, don't make a single pseudo.
708 Instead, make a CONCAT of two pseudos.
709 This allows noncontiguous allocation of the real and imaginary parts,
710 which makes much better code. Besides, allocating DCmode
711 pseudos overstrains reload on some machines like the 386. */
712 rtx realpart, imagpart;
713 enum machine_mode partmode = GET_MODE_INNER (mode);
715 realpart = gen_reg_rtx (partmode);
716 imagpart = gen_reg_rtx (partmode);
717 return gen_rtx_CONCAT (mode, realpart, imagpart);
720 /* Make sure regno_pointer_align, and regno_reg_rtx are large
721 enough to have an element for this pseudo reg number. */
723 if (reg_rtx_no == f->emit->regno_pointer_align_length)
725 int old_size = f->emit->regno_pointer_align_length;
729 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
730 memset (new + old_size, 0, old_size);
731 f->emit->regno_pointer_align = (unsigned char *) new;
733 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
734 old_size * 2 * sizeof (rtx));
735 memset (new1 + old_size, 0, old_size * sizeof (rtx));
736 regno_reg_rtx = new1;
738 f->emit->regno_pointer_align_length = old_size * 2;
741 val = gen_raw_REG (mode, reg_rtx_no);
742 regno_reg_rtx[reg_rtx_no++] = val;
746 /* Generate a register with same attributes as REG, but offsetted by OFFSET.
747 Do the big endian correction if needed. */
750 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
752 rtx new = gen_rtx_REG (mode, regno);
754 HOST_WIDE_INT var_size;
756 /* PR middle-end/14084
757 The problem appears when a variable is stored in a larger register
758 and later it is used in the original mode or some mode in between
759 or some part of variable is accessed.
761 On little endian machines there is no problem because
762 the REG_OFFSET of the start of the variable is the same when
763 accessed in any mode (it is 0).
765 However, this is not true on big endian machines.
766 The offset of the start of the variable is different when accessed
768 When we are taking a part of the REG we have to change the OFFSET
769 from offset WRT size of mode of REG to offset WRT size of variable.
771 If we would not do the big endian correction the resulting REG_OFFSET
772 would be larger than the size of the DECL.
774 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
776 REG.mode MODE DECL size old offset new offset description
777 DI SI 4 4 0 int32 in SImode
778 DI SI 1 4 0 char in SImode
779 DI QI 1 7 0 char in QImode
780 DI QI 4 5 1 1st element in QImode
782 DI HI 4 6 2 1st element in HImode
785 If the size of DECL is equal or greater than the size of REG
786 we can't do this correction because the register holds the
787 whole variable or a part of the variable and thus the REG_OFFSET
788 is already correct. */
790 decl = REG_EXPR (reg);
791 if ((BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
794 && GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode)
795 && ((var_size = int_size_in_bytes (TREE_TYPE (decl))) > 0
796 && var_size < GET_MODE_SIZE (GET_MODE (reg))))
800 /* Convert machine endian to little endian WRT size of mode of REG. */
801 if (WORDS_BIG_ENDIAN)
802 offset_le = ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
803 / UNITS_PER_WORD) * UNITS_PER_WORD;
805 offset_le = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
807 if (BYTES_BIG_ENDIAN)
808 offset_le += ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
811 offset_le += offset % UNITS_PER_WORD;
813 if (offset_le >= var_size)
815 /* MODE is wider than the variable so the new reg will cover
816 the whole variable so the resulting OFFSET should be 0. */
821 /* Convert little endian to machine endian WRT size of variable. */
822 if (WORDS_BIG_ENDIAN)
823 offset = ((var_size - 1 - offset_le)
824 / UNITS_PER_WORD) * UNITS_PER_WORD;
826 offset = (offset_le / UNITS_PER_WORD) * UNITS_PER_WORD;
828 if (BYTES_BIG_ENDIAN)
829 offset += ((var_size - 1 - offset_le)
832 offset += offset_le % UNITS_PER_WORD;
836 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
837 REG_OFFSET (reg) + offset);
841 /* Set the decl for MEM to DECL. */
844 set_reg_attrs_from_mem (rtx reg, rtx mem)
846 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
848 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
851 /* Set the register attributes for registers contained in PARM_RTX.
852 Use needed values from memory attributes of MEM. */
855 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
857 if (REG_P (parm_rtx))
858 set_reg_attrs_from_mem (parm_rtx, mem);
859 else if (GET_CODE (parm_rtx) == PARALLEL)
861 /* Check for a NULL entry in the first slot, used to indicate that the
862 parameter goes both on the stack and in registers. */
863 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
864 for (; i < XVECLEN (parm_rtx, 0); i++)
866 rtx x = XVECEXP (parm_rtx, 0, i);
867 if (REG_P (XEXP (x, 0)))
868 REG_ATTRS (XEXP (x, 0))
869 = get_reg_attrs (MEM_EXPR (mem),
870 INTVAL (XEXP (x, 1)));
875 /* Assign the RTX X to declaration T. */
877 set_decl_rtl (tree t, rtx x)
879 DECL_CHECK (t)->decl.rtl = x;
883 /* For register, we maintain the reverse information too. */
885 REG_ATTRS (x) = get_reg_attrs (t, 0);
886 else if (GET_CODE (x) == SUBREG)
887 REG_ATTRS (SUBREG_REG (x))
888 = get_reg_attrs (t, -SUBREG_BYTE (x));
889 if (GET_CODE (x) == CONCAT)
891 if (REG_P (XEXP (x, 0)))
892 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
893 if (REG_P (XEXP (x, 1)))
894 REG_ATTRS (XEXP (x, 1))
895 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
897 if (GET_CODE (x) == PARALLEL)
900 for (i = 0; i < XVECLEN (x, 0); i++)
902 rtx y = XVECEXP (x, 0, i);
903 if (REG_P (XEXP (y, 0)))
904 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
909 /* Assign the RTX X to parameter declaration T. */
911 set_decl_incoming_rtl (tree t, rtx x)
913 DECL_INCOMING_RTL (t) = x;
917 /* For register, we maintain the reverse information too. */
919 REG_ATTRS (x) = get_reg_attrs (t, 0);
920 else if (GET_CODE (x) == SUBREG)
921 REG_ATTRS (SUBREG_REG (x))
922 = get_reg_attrs (t, -SUBREG_BYTE (x));
923 if (GET_CODE (x) == CONCAT)
925 if (REG_P (XEXP (x, 0)))
926 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
927 if (REG_P (XEXP (x, 1)))
928 REG_ATTRS (XEXP (x, 1))
929 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
931 if (GET_CODE (x) == PARALLEL)
935 /* Check for a NULL entry, used to indicate that the parameter goes
936 both on the stack and in registers. */
937 if (XEXP (XVECEXP (x, 0, 0), 0))
942 for (i = start; i < XVECLEN (x, 0); i++)
944 rtx y = XVECEXP (x, 0, i);
945 if (REG_P (XEXP (y, 0)))
946 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
951 /* Identify REG (which may be a CONCAT) as a user register. */
954 mark_user_reg (rtx reg)
956 if (GET_CODE (reg) == CONCAT)
958 REG_USERVAR_P (XEXP (reg, 0)) = 1;
959 REG_USERVAR_P (XEXP (reg, 1)) = 1;
963 gcc_assert (REG_P (reg));
964 REG_USERVAR_P (reg) = 1;
968 /* Identify REG as a probable pointer register and show its alignment
969 as ALIGN, if nonzero. */
972 mark_reg_pointer (rtx reg, int align)
974 if (! REG_POINTER (reg))
976 REG_POINTER (reg) = 1;
979 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
981 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
982 /* We can no-longer be sure just how aligned this pointer is. */
983 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
986 /* Return 1 plus largest pseudo reg number used in the current function. */
994 /* Return 1 + the largest label number used so far in the current function. */
1002 /* Return first label number used in this function (if any were used). */
1005 get_first_label_num (void)
1007 return first_label_num;
1010 /* If the rtx for label was created during the expansion of a nested
1011 function, then first_label_num won't include this label number.
1012 Fix this now so that array indicies work later. */
1015 maybe_set_first_label_num (rtx x)
1017 if (CODE_LABEL_NUMBER (x) < first_label_num)
1018 first_label_num = CODE_LABEL_NUMBER (x);
1021 /* Return a value representing some low-order bits of X, where the number
1022 of low-order bits is given by MODE. Note that no conversion is done
1023 between floating-point and fixed-point values, rather, the bit
1024 representation is returned.
1026 This function handles the cases in common between gen_lowpart, below,
1027 and two variants in cse.c and combine.c. These are the cases that can
1028 be safely handled at all points in the compilation.
1030 If this is not a case we can handle, return 0. */
1033 gen_lowpart_common (enum machine_mode mode, rtx x)
1035 int msize = GET_MODE_SIZE (mode);
1038 enum machine_mode innermode;
1040 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1041 so we have to make one up. Yuk. */
1042 innermode = GET_MODE (x);
1043 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
1044 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1045 else if (innermode == VOIDmode)
1046 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1048 xsize = GET_MODE_SIZE (innermode);
1050 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1052 if (innermode == mode)
1055 /* MODE must occupy no more words than the mode of X. */
1056 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1057 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1060 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1061 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1064 offset = subreg_lowpart_offset (mode, innermode);
1066 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1067 && (GET_MODE_CLASS (mode) == MODE_INT
1068 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1070 /* If we are getting the low-order part of something that has been
1071 sign- or zero-extended, we can either just use the object being
1072 extended or make a narrower extension. If we want an even smaller
1073 piece than the size of the object being extended, call ourselves
1076 This case is used mostly by combine and cse. */
1078 if (GET_MODE (XEXP (x, 0)) == mode)
1080 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1081 return gen_lowpart_common (mode, XEXP (x, 0));
1082 else if (msize < xsize)
1083 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1085 else if (GET_CODE (x) == SUBREG || REG_P (x)
1086 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1087 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1088 return simplify_gen_subreg (mode, x, innermode, offset);
1090 /* Otherwise, we can't do this. */
1094 /* Return the constant real or imaginary part (which has mode MODE)
1095 of a complex value X. The IMAGPART_P argument determines whether
1096 the real or complex component should be returned. This function
1097 returns NULL_RTX if the component isn't a constant. */
1100 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1105 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1107 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1108 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1110 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1111 if (TREE_CODE (part) == REAL_CST
1112 || TREE_CODE (part) == INTEGER_CST)
1113 return expand_expr (part, NULL_RTX, mode, 0);
1119 /* Return the real part (which has mode MODE) of a complex value X.
1120 This always comes at the low address in memory. */
1123 gen_realpart (enum machine_mode mode, rtx x)
1127 /* Handle complex constants. */
1128 part = gen_complex_constant_part (mode, x, 0);
1129 if (part != NULL_RTX)
1132 if (WORDS_BIG_ENDIAN
1133 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1135 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1137 ("can't access real part of complex value in hard register");
1138 else if (WORDS_BIG_ENDIAN)
1139 return gen_highpart (mode, x);
1141 return gen_lowpart (mode, x);
1144 /* Return the imaginary part (which has mode MODE) of a complex value X.
1145 This always comes at the high address in memory. */
1148 gen_imagpart (enum machine_mode mode, rtx x)
1152 /* Handle complex constants. */
1153 part = gen_complex_constant_part (mode, x, 1);
1154 if (part != NULL_RTX)
1157 if (WORDS_BIG_ENDIAN)
1158 return gen_lowpart (mode, x);
1159 else if (! WORDS_BIG_ENDIAN
1160 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1162 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1164 ("can't access imaginary part of complex value in hard register");
1166 return gen_highpart (mode, x);
1170 gen_highpart (enum machine_mode mode, rtx x)
1172 unsigned int msize = GET_MODE_SIZE (mode);
1175 /* This case loses if X is a subreg. To catch bugs early,
1176 complain if an invalid MODE is used even in other cases. */
1177 gcc_assert (msize <= UNITS_PER_WORD
1178 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1180 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1181 subreg_highpart_offset (mode, GET_MODE (x)));
1182 gcc_assert (result);
1184 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1185 the target if we have a MEM. gen_highpart must return a valid operand,
1186 emitting code if necessary to do so. */
1189 result = validize_mem (result);
1190 gcc_assert (result);
1196 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1197 be VOIDmode constant. */
1199 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1201 if (GET_MODE (exp) != VOIDmode)
1203 gcc_assert (GET_MODE (exp) == innermode);
1204 return gen_highpart (outermode, exp);
1206 return simplify_gen_subreg (outermode, exp, innermode,
1207 subreg_highpart_offset (outermode, innermode));
1210 /* Return offset in bytes to get OUTERMODE low part
1211 of the value in mode INNERMODE stored in memory in target format. */
1214 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1216 unsigned int offset = 0;
1217 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1221 if (WORDS_BIG_ENDIAN)
1222 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1223 if (BYTES_BIG_ENDIAN)
1224 offset += difference % UNITS_PER_WORD;
1230 /* Return offset in bytes to get OUTERMODE high part
1231 of the value in mode INNERMODE stored in memory in target format. */
1233 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1235 unsigned int offset = 0;
1236 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1238 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1242 if (! WORDS_BIG_ENDIAN)
1243 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1244 if (! BYTES_BIG_ENDIAN)
1245 offset += difference % UNITS_PER_WORD;
1251 /* Return 1 iff X, assumed to be a SUBREG,
1252 refers to the least significant part of its containing reg.
1253 If X is not a SUBREG, always return 1 (it is its own low part!). */
1256 subreg_lowpart_p (rtx x)
1258 if (GET_CODE (x) != SUBREG)
1260 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1263 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1264 == SUBREG_BYTE (x));
1267 /* Return subword OFFSET of operand OP.
1268 The word number, OFFSET, is interpreted as the word number starting
1269 at the low-order address. OFFSET 0 is the low-order word if not
1270 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1272 If we cannot extract the required word, we return zero. Otherwise,
1273 an rtx corresponding to the requested word will be returned.
1275 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1276 reload has completed, a valid address will always be returned. After
1277 reload, if a valid address cannot be returned, we return zero.
1279 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1280 it is the responsibility of the caller.
1282 MODE is the mode of OP in case it is a CONST_INT.
1284 ??? This is still rather broken for some cases. The problem for the
1285 moment is that all callers of this thing provide no 'goal mode' to
1286 tell us to work with. This exists because all callers were written
1287 in a word based SUBREG world.
1288 Now use of this function can be deprecated by simplify_subreg in most
1293 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1295 if (mode == VOIDmode)
1296 mode = GET_MODE (op);
1298 gcc_assert (mode != VOIDmode);
1300 /* If OP is narrower than a word, fail. */
1302 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1305 /* If we want a word outside OP, return zero. */
1307 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1310 /* Form a new MEM at the requested address. */
1313 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1315 if (! validate_address)
1318 else if (reload_completed)
1320 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1324 return replace_equiv_address (new, XEXP (new, 0));
1327 /* Rest can be handled by simplify_subreg. */
1328 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1331 /* Similar to `operand_subword', but never return 0. If we can't extract
1332 the required subword, put OP into a register and try again. If that fails,
1333 abort. We always validate the address in this case.
1335 MODE is the mode of OP, in case it is CONST_INT. */
1338 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1340 rtx result = operand_subword (op, offset, 1, mode);
1345 if (mode != BLKmode && mode != VOIDmode)
1347 /* If this is a register which can not be accessed by words, copy it
1348 to a pseudo register. */
1350 op = copy_to_reg (op);
1352 op = force_reg (mode, op);
1355 result = operand_subword (op, offset, 1, mode);
1356 gcc_assert (result);
1361 /* Given a compare instruction, swap the operands.
1362 A test instruction is changed into a compare of 0 against the operand. */
1365 reverse_comparison (rtx insn)
1367 rtx body = PATTERN (insn);
1370 if (GET_CODE (body) == SET)
1371 comp = SET_SRC (body);
1373 comp = SET_SRC (XVECEXP (body, 0, 0));
1375 if (GET_CODE (comp) == COMPARE)
1377 rtx op0 = XEXP (comp, 0);
1378 rtx op1 = XEXP (comp, 1);
1379 XEXP (comp, 0) = op1;
1380 XEXP (comp, 1) = op0;
1384 rtx new = gen_rtx_COMPARE (VOIDmode,
1385 CONST0_RTX (GET_MODE (comp)), comp);
1386 if (GET_CODE (body) == SET)
1387 SET_SRC (body) = new;
1389 SET_SRC (XVECEXP (body, 0, 0)) = new;
1393 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1394 or (2) a component ref of something variable. Represent the later with
1395 a NULL expression. */
1398 component_ref_for_mem_expr (tree ref)
1400 tree inner = TREE_OPERAND (ref, 0);
1402 if (TREE_CODE (inner) == COMPONENT_REF)
1403 inner = component_ref_for_mem_expr (inner);
1406 /* Now remove any conversions: they don't change what the underlying
1407 object is. Likewise for SAVE_EXPR. */
1408 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1409 || TREE_CODE (inner) == NON_LVALUE_EXPR
1410 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1411 || TREE_CODE (inner) == SAVE_EXPR)
1412 inner = TREE_OPERAND (inner, 0);
1414 if (! DECL_P (inner))
1418 if (inner == TREE_OPERAND (ref, 0))
1421 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1422 TREE_OPERAND (ref, 1), NULL_TREE);
1425 /* Returns 1 if both MEM_EXPR can be considered equal
1429 mem_expr_equal_p (tree expr1, tree expr2)
1434 if (! expr1 || ! expr2)
1437 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1440 if (TREE_CODE (expr1) == COMPONENT_REF)
1442 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1443 TREE_OPERAND (expr2, 0))
1444 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1445 TREE_OPERAND (expr2, 1));
1447 if (INDIRECT_REF_P (expr1))
1448 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1449 TREE_OPERAND (expr2, 0));
1451 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1452 have been resolved here. */
1453 gcc_assert (DECL_P (expr1));
1455 /* Decls with different pointers can't be equal. */
1459 /* Given REF, a MEM, and T, either the type of X or the expression
1460 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1461 if we are making a new object of this type. BITPOS is nonzero if
1462 there is an offset outstanding on T that will be applied later. */
1465 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1466 HOST_WIDE_INT bitpos)
1468 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1469 tree expr = MEM_EXPR (ref);
1470 rtx offset = MEM_OFFSET (ref);
1471 rtx size = MEM_SIZE (ref);
1472 unsigned int align = MEM_ALIGN (ref);
1473 HOST_WIDE_INT apply_bitpos = 0;
1476 /* It can happen that type_for_mode was given a mode for which there
1477 is no language-level type. In which case it returns NULL, which
1482 type = TYPE_P (t) ? t : TREE_TYPE (t);
1483 if (type == error_mark_node)
1486 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1487 wrong answer, as it assumes that DECL_RTL already has the right alias
1488 info. Callers should not set DECL_RTL until after the call to
1489 set_mem_attributes. */
1490 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1492 /* Get the alias set from the expression or type (perhaps using a
1493 front-end routine) and use it. */
1494 alias = get_alias_set (t);
1496 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1497 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1498 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1499 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (t);
1501 /* If we are making an object of this type, or if this is a DECL, we know
1502 that it is a scalar if the type is not an aggregate. */
1503 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1504 MEM_SCALAR_P (ref) = 1;
1506 /* We can set the alignment from the type if we are making an object,
1507 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1508 if (objectp || TREE_CODE (t) == INDIRECT_REF
1509 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1510 || TYPE_ALIGN_OK (type))
1511 align = MAX (align, TYPE_ALIGN (type));
1513 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1515 if (integer_zerop (TREE_OPERAND (t, 1)))
1516 /* We don't know anything about the alignment. */
1517 align = BITS_PER_UNIT;
1519 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1522 /* If the size is known, we can set that. */
1523 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1524 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1526 /* If T is not a type, we may be able to deduce some more information about
1530 tree base = get_base_address (t);
1531 if (base && DECL_P (base)
1532 && TREE_READONLY (base)
1533 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1534 MEM_READONLY_P (ref) = 1;
1536 if (TREE_THIS_VOLATILE (t))
1537 MEM_VOLATILE_P (ref) = 1;
1539 /* Now remove any conversions: they don't change what the underlying
1540 object is. Likewise for SAVE_EXPR. */
1541 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1542 || TREE_CODE (t) == NON_LVALUE_EXPR
1543 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1544 || TREE_CODE (t) == SAVE_EXPR)
1545 t = TREE_OPERAND (t, 0);
1547 /* If this expression can't be addressed (e.g., it contains a reference
1548 to a non-addressable field), show we don't change its alias set. */
1549 if (! can_address_p (t))
1550 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1552 /* If this is a decl, set the attributes of the MEM from it. */
1556 offset = const0_rtx;
1557 apply_bitpos = bitpos;
1558 size = (DECL_SIZE_UNIT (t)
1559 && host_integerp (DECL_SIZE_UNIT (t), 1)
1560 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1561 align = DECL_ALIGN (t);
1564 /* If this is a constant, we know the alignment. */
1565 else if (CONSTANT_CLASS_P (t))
1567 align = TYPE_ALIGN (type);
1568 #ifdef CONSTANT_ALIGNMENT
1569 align = CONSTANT_ALIGNMENT (t, align);
1573 /* If this is a field reference and not a bit-field, record it. */
1574 /* ??? There is some information that can be gleened from bit-fields,
1575 such as the word offset in the structure that might be modified.
1576 But skip it for now. */
1577 else if (TREE_CODE (t) == COMPONENT_REF
1578 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1580 expr = component_ref_for_mem_expr (t);
1581 offset = const0_rtx;
1582 apply_bitpos = bitpos;
1583 /* ??? Any reason the field size would be different than
1584 the size we got from the type? */
1587 /* If this is an array reference, look for an outer field reference. */
1588 else if (TREE_CODE (t) == ARRAY_REF)
1590 tree off_tree = size_zero_node;
1591 /* We can't modify t, because we use it at the end of the
1597 tree index = TREE_OPERAND (t2, 1);
1598 tree low_bound = array_ref_low_bound (t2);
1599 tree unit_size = array_ref_element_size (t2);
1601 /* We assume all arrays have sizes that are a multiple of a byte.
1602 First subtract the lower bound, if any, in the type of the
1603 index, then convert to sizetype and multiply by the size of
1604 the array element. */
1605 if (! integer_zerop (low_bound))
1606 index = fold (build2 (MINUS_EXPR, TREE_TYPE (index),
1609 off_tree = size_binop (PLUS_EXPR,
1610 size_binop (MULT_EXPR, convert (sizetype,
1614 t2 = TREE_OPERAND (t2, 0);
1616 while (TREE_CODE (t2) == ARRAY_REF);
1622 if (host_integerp (off_tree, 1))
1624 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1625 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1626 align = DECL_ALIGN (t2);
1627 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1629 offset = GEN_INT (ioff);
1630 apply_bitpos = bitpos;
1633 else if (TREE_CODE (t2) == COMPONENT_REF)
1635 expr = component_ref_for_mem_expr (t2);
1636 if (host_integerp (off_tree, 1))
1638 offset = GEN_INT (tree_low_cst (off_tree, 1));
1639 apply_bitpos = bitpos;
1641 /* ??? Any reason the field size would be different than
1642 the size we got from the type? */
1644 else if (flag_argument_noalias > 1
1645 && (INDIRECT_REF_P (t2))
1646 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1653 /* If this is a Fortran indirect argument reference, record the
1655 else if (flag_argument_noalias > 1
1656 && (INDIRECT_REF_P (t))
1657 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1664 /* If we modified OFFSET based on T, then subtract the outstanding
1665 bit position offset. Similarly, increase the size of the accessed
1666 object to contain the negative offset. */
1669 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1671 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1674 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1676 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1677 we're overlapping. */
1682 /* Now set the attributes we computed above. */
1684 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1686 /* If this is already known to be a scalar or aggregate, we are done. */
1687 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1690 /* If it is a reference into an aggregate, this is part of an aggregate.
1691 Otherwise we don't know. */
1692 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1693 || TREE_CODE (t) == ARRAY_RANGE_REF
1694 || TREE_CODE (t) == BIT_FIELD_REF)
1695 MEM_IN_STRUCT_P (ref) = 1;
1699 set_mem_attributes (rtx ref, tree t, int objectp)
1701 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1704 /* Set the decl for MEM to DECL. */
1707 set_mem_attrs_from_reg (rtx mem, rtx reg)
1710 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1711 GEN_INT (REG_OFFSET (reg)),
1712 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1715 /* Set the alias set of MEM to SET. */
1718 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1720 #ifdef ENABLE_CHECKING
1721 /* If the new and old alias sets don't conflict, something is wrong. */
1722 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1725 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1726 MEM_SIZE (mem), MEM_ALIGN (mem),
1730 /* Set the alignment of MEM to ALIGN bits. */
1733 set_mem_align (rtx mem, unsigned int align)
1735 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1736 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1740 /* Set the expr for MEM to EXPR. */
1743 set_mem_expr (rtx mem, tree expr)
1746 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1747 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1750 /* Set the offset of MEM to OFFSET. */
1753 set_mem_offset (rtx mem, rtx offset)
1755 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1756 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1760 /* Set the size of MEM to SIZE. */
1763 set_mem_size (rtx mem, rtx size)
1765 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1766 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1770 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1771 and its address changed to ADDR. (VOIDmode means don't change the mode.
1772 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1773 returned memory location is required to be valid. The memory
1774 attributes are not changed. */
1777 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1781 gcc_assert (MEM_P (memref));
1782 if (mode == VOIDmode)
1783 mode = GET_MODE (memref);
1785 addr = XEXP (memref, 0);
1786 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1787 && (!validate || memory_address_p (mode, addr)))
1792 if (reload_in_progress || reload_completed)
1793 gcc_assert (memory_address_p (mode, addr));
1795 addr = memory_address (mode, addr);
1798 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1801 new = gen_rtx_MEM (mode, addr);
1802 MEM_COPY_ATTRIBUTES (new, memref);
1806 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1807 way we are changing MEMREF, so we only preserve the alias set. */
1810 change_address (rtx memref, enum machine_mode mode, rtx addr)
1812 rtx new = change_address_1 (memref, mode, addr, 1), size;
1813 enum machine_mode mmode = GET_MODE (new);
1816 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1817 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1819 /* If there are no changes, just return the original memory reference. */
1822 if (MEM_ATTRS (memref) == 0
1823 || (MEM_EXPR (memref) == NULL
1824 && MEM_OFFSET (memref) == NULL
1825 && MEM_SIZE (memref) == size
1826 && MEM_ALIGN (memref) == align))
1829 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1830 MEM_COPY_ATTRIBUTES (new, memref);
1834 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1839 /* Return a memory reference like MEMREF, but with its mode changed
1840 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1841 nonzero, the memory address is forced to be valid.
1842 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1843 and caller is responsible for adjusting MEMREF base register. */
1846 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1847 int validate, int adjust)
1849 rtx addr = XEXP (memref, 0);
1851 rtx memoffset = MEM_OFFSET (memref);
1853 unsigned int memalign = MEM_ALIGN (memref);
1855 /* If there are no changes, just return the original memory reference. */
1856 if (mode == GET_MODE (memref) && !offset
1857 && (!validate || memory_address_p (mode, addr)))
1860 /* ??? Prefer to create garbage instead of creating shared rtl.
1861 This may happen even if offset is nonzero -- consider
1862 (plus (plus reg reg) const_int) -- so do this always. */
1863 addr = copy_rtx (addr);
1867 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1868 object, we can merge it into the LO_SUM. */
1869 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1871 && (unsigned HOST_WIDE_INT) offset
1872 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1873 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1874 plus_constant (XEXP (addr, 1), offset));
1876 addr = plus_constant (addr, offset);
1879 new = change_address_1 (memref, mode, addr, validate);
1881 /* Compute the new values of the memory attributes due to this adjustment.
1882 We add the offsets and update the alignment. */
1884 memoffset = GEN_INT (offset + INTVAL (memoffset));
1886 /* Compute the new alignment by taking the MIN of the alignment and the
1887 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1892 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1894 /* We can compute the size in a number of ways. */
1895 if (GET_MODE (new) != BLKmode)
1896 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1897 else if (MEM_SIZE (memref))
1898 size = plus_constant (MEM_SIZE (memref), -offset);
1900 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1901 memoffset, size, memalign, GET_MODE (new));
1903 /* At some point, we should validate that this offset is within the object,
1904 if all the appropriate values are known. */
1908 /* Return a memory reference like MEMREF, but with its mode changed
1909 to MODE and its address changed to ADDR, which is assumed to be
1910 MEMREF offseted by OFFSET bytes. If VALIDATE is
1911 nonzero, the memory address is forced to be valid. */
1914 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1915 HOST_WIDE_INT offset, int validate)
1917 memref = change_address_1 (memref, VOIDmode, addr, validate);
1918 return adjust_address_1 (memref, mode, offset, validate, 0);
1921 /* Return a memory reference like MEMREF, but whose address is changed by
1922 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1923 known to be in OFFSET (possibly 1). */
1926 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1928 rtx new, addr = XEXP (memref, 0);
1930 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1932 /* At this point we don't know _why_ the address is invalid. It
1933 could have secondary memory references, multiplies or anything.
1935 However, if we did go and rearrange things, we can wind up not
1936 being able to recognize the magic around pic_offset_table_rtx.
1937 This stuff is fragile, and is yet another example of why it is
1938 bad to expose PIC machinery too early. */
1939 if (! memory_address_p (GET_MODE (memref), new)
1940 && GET_CODE (addr) == PLUS
1941 && XEXP (addr, 0) == pic_offset_table_rtx)
1943 addr = force_reg (GET_MODE (addr), addr);
1944 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1947 update_temp_slot_address (XEXP (memref, 0), new);
1948 new = change_address_1 (memref, VOIDmode, new, 1);
1950 /* If there are no changes, just return the original memory reference. */
1954 /* Update the alignment to reflect the offset. Reset the offset, which
1957 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1958 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1963 /* Return a memory reference like MEMREF, but with its address changed to
1964 ADDR. The caller is asserting that the actual piece of memory pointed
1965 to is the same, just the form of the address is being changed, such as
1966 by putting something into a register. */
1969 replace_equiv_address (rtx memref, rtx addr)
1971 /* change_address_1 copies the memory attribute structure without change
1972 and that's exactly what we want here. */
1973 update_temp_slot_address (XEXP (memref, 0), addr);
1974 return change_address_1 (memref, VOIDmode, addr, 1);
1977 /* Likewise, but the reference is not required to be valid. */
1980 replace_equiv_address_nv (rtx memref, rtx addr)
1982 return change_address_1 (memref, VOIDmode, addr, 0);
1985 /* Return a memory reference like MEMREF, but with its mode widened to
1986 MODE and offset by OFFSET. This would be used by targets that e.g.
1987 cannot issue QImode memory operations and have to use SImode memory
1988 operations plus masking logic. */
1991 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
1993 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
1994 tree expr = MEM_EXPR (new);
1995 rtx memoffset = MEM_OFFSET (new);
1996 unsigned int size = GET_MODE_SIZE (mode);
1998 /* If there are no changes, just return the original memory reference. */
2002 /* If we don't know what offset we were at within the expression, then
2003 we can't know if we've overstepped the bounds. */
2009 if (TREE_CODE (expr) == COMPONENT_REF)
2011 tree field = TREE_OPERAND (expr, 1);
2012 tree offset = component_ref_field_offset (expr);
2014 if (! DECL_SIZE_UNIT (field))
2020 /* Is the field at least as large as the access? If so, ok,
2021 otherwise strip back to the containing structure. */
2022 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2023 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2024 && INTVAL (memoffset) >= 0)
2027 if (! host_integerp (offset, 1))
2033 expr = TREE_OPERAND (expr, 0);
2035 = (GEN_INT (INTVAL (memoffset)
2036 + tree_low_cst (offset, 1)
2037 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2040 /* Similarly for the decl. */
2041 else if (DECL_P (expr)
2042 && DECL_SIZE_UNIT (expr)
2043 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2044 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2045 && (! memoffset || INTVAL (memoffset) >= 0))
2049 /* The widened memory access overflows the expression, which means
2050 that it could alias another expression. Zap it. */
2057 memoffset = NULL_RTX;
2059 /* The widened memory may alias other stuff, so zap the alias set. */
2060 /* ??? Maybe use get_alias_set on any remaining expression. */
2062 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2063 MEM_ALIGN (new), mode);
2068 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2071 gen_label_rtx (void)
2073 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2074 NULL, label_num++, NULL);
2077 /* For procedure integration. */
2079 /* Install new pointers to the first and last insns in the chain.
2080 Also, set cur_insn_uid to one higher than the last in use.
2081 Used for an inline-procedure after copying the insn chain. */
2084 set_new_first_and_last_insn (rtx first, rtx last)
2092 for (insn = first; insn; insn = NEXT_INSN (insn))
2093 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2098 /* Go through all the RTL insn bodies and copy any invalid shared
2099 structure. This routine should only be called once. */
2102 unshare_all_rtl_1 (tree fndecl, rtx insn)
2106 /* Make sure that virtual parameters are not shared. */
2107 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2108 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2110 /* Make sure that virtual stack slots are not shared. */
2111 unshare_all_decls (DECL_INITIAL (fndecl));
2113 /* Unshare just about everything else. */
2114 unshare_all_rtl_in_chain (insn);
2116 /* Make sure the addresses of stack slots found outside the insn chain
2117 (such as, in DECL_RTL of a variable) are not shared
2118 with the insn chain.
2120 This special care is necessary when the stack slot MEM does not
2121 actually appear in the insn chain. If it does appear, its address
2122 is unshared from all else at that point. */
2123 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2126 /* Go through all the RTL insn bodies and copy any invalid shared
2127 structure, again. This is a fairly expensive thing to do so it
2128 should be done sparingly. */
2131 unshare_all_rtl_again (rtx insn)
2136 for (p = insn; p; p = NEXT_INSN (p))
2139 reset_used_flags (PATTERN (p));
2140 reset_used_flags (REG_NOTES (p));
2141 reset_used_flags (LOG_LINKS (p));
2144 /* Make sure that virtual stack slots are not shared. */
2145 reset_used_decls (DECL_INITIAL (cfun->decl));
2147 /* Make sure that virtual parameters are not shared. */
2148 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2149 reset_used_flags (DECL_RTL (decl));
2151 reset_used_flags (stack_slot_list);
2153 unshare_all_rtl_1 (cfun->decl, insn);
2157 unshare_all_rtl (void)
2159 unshare_all_rtl_1 (current_function_decl, get_insns ());
2162 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2163 Recursively does the same for subexpressions. */
2166 verify_rtx_sharing (rtx orig, rtx insn)
2171 const char *format_ptr;
2176 code = GET_CODE (x);
2178 /* These types may be freely shared. */
2193 /* SCRATCH must be shared because they represent distinct values. */
2195 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2200 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2201 a LABEL_REF, it isn't sharable. */
2202 if (GET_CODE (XEXP (x, 0)) == PLUS
2203 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2204 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2209 /* A MEM is allowed to be shared if its address is constant. */
2210 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2211 || reload_completed || reload_in_progress)
2220 /* This rtx may not be shared. If it has already been seen,
2221 replace it with a copy of itself. */
2222 #ifdef ENABLE_CHECKING
2223 if (RTX_FLAG (x, used))
2225 error ("Invalid rtl sharing found in the insn");
2227 error ("Shared rtx");
2229 internal_error ("Internal consistency failure");
2232 gcc_assert (!RTX_FLAG (x, used));
2234 RTX_FLAG (x, used) = 1;
2236 /* Now scan the subexpressions recursively. */
2238 format_ptr = GET_RTX_FORMAT (code);
2240 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2242 switch (*format_ptr++)
2245 verify_rtx_sharing (XEXP (x, i), insn);
2249 if (XVEC (x, i) != NULL)
2252 int len = XVECLEN (x, i);
2254 for (j = 0; j < len; j++)
2256 /* We allow sharing of ASM_OPERANDS inside single
2258 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2259 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2261 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2263 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2272 /* Go through all the RTL insn bodies and check that there is no unexpected
2273 sharing in between the subexpressions. */
2276 verify_rtl_sharing (void)
2280 for (p = get_insns (); p; p = NEXT_INSN (p))
2283 reset_used_flags (PATTERN (p));
2284 reset_used_flags (REG_NOTES (p));
2285 reset_used_flags (LOG_LINKS (p));
2288 for (p = get_insns (); p; p = NEXT_INSN (p))
2291 verify_rtx_sharing (PATTERN (p), p);
2292 verify_rtx_sharing (REG_NOTES (p), p);
2293 verify_rtx_sharing (LOG_LINKS (p), p);
2297 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2298 Assumes the mark bits are cleared at entry. */
2301 unshare_all_rtl_in_chain (rtx insn)
2303 for (; insn; insn = NEXT_INSN (insn))
2306 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2307 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2308 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2312 /* Go through all virtual stack slots of a function and copy any
2313 shared structure. */
2315 unshare_all_decls (tree blk)
2319 /* Copy shared decls. */
2320 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2321 if (DECL_RTL_SET_P (t))
2322 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2324 /* Now process sub-blocks. */
2325 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2326 unshare_all_decls (t);
2329 /* Go through all virtual stack slots of a function and mark them as
2332 reset_used_decls (tree blk)
2337 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2338 if (DECL_RTL_SET_P (t))
2339 reset_used_flags (DECL_RTL (t));
2341 /* Now process sub-blocks. */
2342 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2343 reset_used_decls (t);
2346 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2347 Recursively does the same for subexpressions. Uses
2348 copy_rtx_if_shared_1 to reduce stack space. */
2351 copy_rtx_if_shared (rtx orig)
2353 copy_rtx_if_shared_1 (&orig);
2357 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2358 use. Recursively does the same for subexpressions. */
2361 copy_rtx_if_shared_1 (rtx *orig1)
2367 const char *format_ptr;
2371 /* Repeat is used to turn tail-recursion into iteration. */
2378 code = GET_CODE (x);
2380 /* These types may be freely shared. */
2394 /* SCRATCH must be shared because they represent distinct values. */
2397 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2402 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2403 a LABEL_REF, it isn't sharable. */
2404 if (GET_CODE (XEXP (x, 0)) == PLUS
2405 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2406 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2415 /* The chain of insns is not being copied. */
2422 /* This rtx may not be shared. If it has already been seen,
2423 replace it with a copy of itself. */
2425 if (RTX_FLAG (x, used))
2429 copy = rtx_alloc (code);
2430 memcpy (copy, x, RTX_SIZE (code));
2434 RTX_FLAG (x, used) = 1;
2436 /* Now scan the subexpressions recursively.
2437 We can store any replaced subexpressions directly into X
2438 since we know X is not shared! Any vectors in X
2439 must be copied if X was copied. */
2441 format_ptr = GET_RTX_FORMAT (code);
2442 length = GET_RTX_LENGTH (code);
2445 for (i = 0; i < length; i++)
2447 switch (*format_ptr++)
2451 copy_rtx_if_shared_1 (last_ptr);
2452 last_ptr = &XEXP (x, i);
2456 if (XVEC (x, i) != NULL)
2459 int len = XVECLEN (x, i);
2461 /* Copy the vector iff I copied the rtx and the length
2463 if (copied && len > 0)
2464 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2466 /* Call recursively on all inside the vector. */
2467 for (j = 0; j < len; j++)
2470 copy_rtx_if_shared_1 (last_ptr);
2471 last_ptr = &XVECEXP (x, i, j);
2486 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2487 to look for shared sub-parts. */
2490 reset_used_flags (rtx x)
2494 const char *format_ptr;
2497 /* Repeat is used to turn tail-recursion into iteration. */
2502 code = GET_CODE (x);
2504 /* These types may be freely shared so we needn't do any resetting
2525 /* The chain of insns is not being copied. */
2532 RTX_FLAG (x, used) = 0;
2534 format_ptr = GET_RTX_FORMAT (code);
2535 length = GET_RTX_LENGTH (code);
2537 for (i = 0; i < length; i++)
2539 switch (*format_ptr++)
2547 reset_used_flags (XEXP (x, i));
2551 for (j = 0; j < XVECLEN (x, i); j++)
2552 reset_used_flags (XVECEXP (x, i, j));
2558 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2559 to look for shared sub-parts. */
2562 set_used_flags (rtx x)
2566 const char *format_ptr;
2571 code = GET_CODE (x);
2573 /* These types may be freely shared so we needn't do any resetting
2594 /* The chain of insns is not being copied. */
2601 RTX_FLAG (x, used) = 1;
2603 format_ptr = GET_RTX_FORMAT (code);
2604 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2606 switch (*format_ptr++)
2609 set_used_flags (XEXP (x, i));
2613 for (j = 0; j < XVECLEN (x, i); j++)
2614 set_used_flags (XVECEXP (x, i, j));
2620 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2621 Return X or the rtx for the pseudo reg the value of X was copied into.
2622 OTHER must be valid as a SET_DEST. */
2625 make_safe_from (rtx x, rtx other)
2628 switch (GET_CODE (other))
2631 other = SUBREG_REG (other);
2633 case STRICT_LOW_PART:
2636 other = XEXP (other, 0);
2645 && GET_CODE (x) != SUBREG)
2647 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2648 || reg_mentioned_p (other, x))))
2650 rtx temp = gen_reg_rtx (GET_MODE (x));
2651 emit_move_insn (temp, x);
2657 /* Emission of insns (adding them to the doubly-linked list). */
2659 /* Return the first insn of the current sequence or current function. */
2667 /* Specify a new insn as the first in the chain. */
2670 set_first_insn (rtx insn)
2672 gcc_assert (!PREV_INSN (insn));
2676 /* Return the last insn emitted in current sequence or current function. */
2679 get_last_insn (void)
2684 /* Specify a new insn as the last in the chain. */
2687 set_last_insn (rtx insn)
2689 gcc_assert (!NEXT_INSN (insn));
2693 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2696 get_last_insn_anywhere (void)
2698 struct sequence_stack *stack;
2701 for (stack = seq_stack; stack; stack = stack->next)
2702 if (stack->last != 0)
2707 /* Return the first nonnote insn emitted in current sequence or current
2708 function. This routine looks inside SEQUENCEs. */
2711 get_first_nonnote_insn (void)
2715 for (insn = first_insn; insn && NOTE_P (insn); insn = next_insn (insn));
2719 /* Return the last nonnote insn emitted in current sequence or current
2720 function. This routine looks inside SEQUENCEs. */
2723 get_last_nonnote_insn (void)
2727 for (insn = last_insn; insn && NOTE_P (insn); insn = previous_insn (insn));
2731 /* Return a number larger than any instruction's uid in this function. */
2736 return cur_insn_uid;
2739 /* Renumber instructions so that no instruction UIDs are wasted. */
2742 renumber_insns (FILE *stream)
2746 /* If we're not supposed to renumber instructions, don't. */
2747 if (!flag_renumber_insns)
2750 /* If there aren't that many instructions, then it's not really
2751 worth renumbering them. */
2752 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2757 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2760 fprintf (stream, "Renumbering insn %d to %d\n",
2761 INSN_UID (insn), cur_insn_uid);
2762 INSN_UID (insn) = cur_insn_uid++;
2766 /* Return the next insn. If it is a SEQUENCE, return the first insn
2770 next_insn (rtx insn)
2774 insn = NEXT_INSN (insn);
2775 if (insn && NONJUMP_INSN_P (insn)
2776 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2777 insn = XVECEXP (PATTERN (insn), 0, 0);
2783 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2787 previous_insn (rtx insn)
2791 insn = PREV_INSN (insn);
2792 if (insn && NONJUMP_INSN_P (insn)
2793 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2794 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2800 /* Return the next insn after INSN that is not a NOTE. This routine does not
2801 look inside SEQUENCEs. */
2804 next_nonnote_insn (rtx insn)
2808 insn = NEXT_INSN (insn);
2809 if (insn == 0 || !NOTE_P (insn))
2816 /* Return the previous insn before INSN that is not a NOTE. This routine does
2817 not look inside SEQUENCEs. */
2820 prev_nonnote_insn (rtx insn)
2824 insn = PREV_INSN (insn);
2825 if (insn == 0 || !NOTE_P (insn))
2832 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2833 or 0, if there is none. This routine does not look inside
2837 next_real_insn (rtx insn)
2841 insn = NEXT_INSN (insn);
2842 if (insn == 0 || INSN_P (insn))
2849 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2850 or 0, if there is none. This routine does not look inside
2854 prev_real_insn (rtx insn)
2858 insn = PREV_INSN (insn);
2859 if (insn == 0 || INSN_P (insn))
2866 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2867 This routine does not look inside SEQUENCEs. */
2870 last_call_insn (void)
2874 for (insn = get_last_insn ();
2875 insn && !CALL_P (insn);
2876 insn = PREV_INSN (insn))
2882 /* Find the next insn after INSN that really does something. This routine
2883 does not look inside SEQUENCEs. Until reload has completed, this is the
2884 same as next_real_insn. */
2887 active_insn_p (rtx insn)
2889 return (CALL_P (insn) || JUMP_P (insn)
2890 || (NONJUMP_INSN_P (insn)
2891 && (! reload_completed
2892 || (GET_CODE (PATTERN (insn)) != USE
2893 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2897 next_active_insn (rtx insn)
2901 insn = NEXT_INSN (insn);
2902 if (insn == 0 || active_insn_p (insn))
2909 /* Find the last insn before INSN that really does something. This routine
2910 does not look inside SEQUENCEs. Until reload has completed, this is the
2911 same as prev_real_insn. */
2914 prev_active_insn (rtx insn)
2918 insn = PREV_INSN (insn);
2919 if (insn == 0 || active_insn_p (insn))
2926 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2929 next_label (rtx insn)
2933 insn = NEXT_INSN (insn);
2934 if (insn == 0 || LABEL_P (insn))
2941 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2944 prev_label (rtx insn)
2948 insn = PREV_INSN (insn);
2949 if (insn == 0 || LABEL_P (insn))
2956 /* Return the last label to mark the same position as LABEL. Return null
2957 if LABEL itself is null. */
2960 skip_consecutive_labels (rtx label)
2964 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
2972 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2973 and REG_CC_USER notes so we can find it. */
2976 link_cc0_insns (rtx insn)
2978 rtx user = next_nonnote_insn (insn);
2980 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
2981 user = XVECEXP (PATTERN (user), 0, 0);
2983 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2985 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2988 /* Return the next insn that uses CC0 after INSN, which is assumed to
2989 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2990 applied to the result of this function should yield INSN).
2992 Normally, this is simply the next insn. However, if a REG_CC_USER note
2993 is present, it contains the insn that uses CC0.
2995 Return 0 if we can't find the insn. */
2998 next_cc0_user (rtx insn)
3000 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3003 return XEXP (note, 0);
3005 insn = next_nonnote_insn (insn);
3006 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3007 insn = XVECEXP (PATTERN (insn), 0, 0);
3009 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3015 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3016 note, it is the previous insn. */
3019 prev_cc0_setter (rtx insn)
3021 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3024 return XEXP (note, 0);
3026 insn = prev_nonnote_insn (insn);
3027 gcc_assert (sets_cc0_p (PATTERN (insn)));
3033 /* Increment the label uses for all labels present in rtx. */
3036 mark_label_nuses (rtx x)
3042 code = GET_CODE (x);
3043 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3044 LABEL_NUSES (XEXP (x, 0))++;
3046 fmt = GET_RTX_FORMAT (code);
3047 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3050 mark_label_nuses (XEXP (x, i));
3051 else if (fmt[i] == 'E')
3052 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3053 mark_label_nuses (XVECEXP (x, i, j));
3058 /* Try splitting insns that can be split for better scheduling.
3059 PAT is the pattern which might split.
3060 TRIAL is the insn providing PAT.
3061 LAST is nonzero if we should return the last insn of the sequence produced.
3063 If this routine succeeds in splitting, it returns the first or last
3064 replacement insn depending on the value of LAST. Otherwise, it
3065 returns TRIAL. If the insn to be returned can be split, it will be. */
3068 try_split (rtx pat, rtx trial, int last)
3070 rtx before = PREV_INSN (trial);
3071 rtx after = NEXT_INSN (trial);
3072 int has_barrier = 0;
3076 rtx insn_last, insn;
3079 if (any_condjump_p (trial)
3080 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3081 split_branch_probability = INTVAL (XEXP (note, 0));
3082 probability = split_branch_probability;
3084 seq = split_insns (pat, trial);
3086 split_branch_probability = -1;
3088 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3089 We may need to handle this specially. */
3090 if (after && BARRIER_P (after))
3093 after = NEXT_INSN (after);
3099 /* Avoid infinite loop if any insn of the result matches
3100 the original pattern. */
3104 if (INSN_P (insn_last)
3105 && rtx_equal_p (PATTERN (insn_last), pat))
3107 if (!NEXT_INSN (insn_last))
3109 insn_last = NEXT_INSN (insn_last);
3113 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3117 mark_jump_label (PATTERN (insn), insn, 0);
3119 if (probability != -1
3120 && any_condjump_p (insn)
3121 && !find_reg_note (insn, REG_BR_PROB, 0))
3123 /* We can preserve the REG_BR_PROB notes only if exactly
3124 one jump is created, otherwise the machine description
3125 is responsible for this step using
3126 split_branch_probability variable. */
3127 gcc_assert (njumps == 1);
3129 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3130 GEN_INT (probability),
3136 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3137 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3140 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3143 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3146 *p = CALL_INSN_FUNCTION_USAGE (trial);
3147 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3151 /* Copy notes, particularly those related to the CFG. */
3152 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3154 switch (REG_NOTE_KIND (note))
3158 while (insn != NULL_RTX)
3161 || (flag_non_call_exceptions && INSN_P (insn)
3162 && may_trap_p (PATTERN (insn))))
3164 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3167 insn = PREV_INSN (insn);
3173 case REG_ALWAYS_RETURN:
3175 while (insn != NULL_RTX)
3179 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3182 insn = PREV_INSN (insn);
3186 case REG_NON_LOCAL_GOTO:
3188 while (insn != NULL_RTX)
3192 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3195 insn = PREV_INSN (insn);
3204 /* If there are LABELS inside the split insns increment the
3205 usage count so we don't delete the label. */
3206 if (NONJUMP_INSN_P (trial))
3209 while (insn != NULL_RTX)
3211 if (NONJUMP_INSN_P (insn))
3212 mark_label_nuses (PATTERN (insn));
3214 insn = PREV_INSN (insn);
3218 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3220 delete_insn (trial);
3222 emit_barrier_after (tem);
3224 /* Recursively call try_split for each new insn created; by the
3225 time control returns here that insn will be fully split, so
3226 set LAST and continue from the insn after the one returned.
3227 We can't use next_active_insn here since AFTER may be a note.
3228 Ignore deleted insns, which can be occur if not optimizing. */
3229 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3230 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3231 tem = try_split (PATTERN (tem), tem, 1);
3233 /* Return either the first or the last insn, depending on which was
3236 ? (after ? PREV_INSN (after) : last_insn)
3237 : NEXT_INSN (before);
3240 /* Make and return an INSN rtx, initializing all its slots.
3241 Store PATTERN in the pattern slots. */
3244 make_insn_raw (rtx pattern)
3248 insn = rtx_alloc (INSN);
3250 INSN_UID (insn) = cur_insn_uid++;
3251 PATTERN (insn) = pattern;
3252 INSN_CODE (insn) = -1;
3253 LOG_LINKS (insn) = NULL;
3254 REG_NOTES (insn) = NULL;
3255 INSN_LOCATOR (insn) = 0;
3256 BLOCK_FOR_INSN (insn) = NULL;
3258 #ifdef ENABLE_RTL_CHECKING
3261 && (returnjump_p (insn)
3262 || (GET_CODE (insn) == SET
3263 && SET_DEST (insn) == pc_rtx)))
3265 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3273 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3276 make_jump_insn_raw (rtx pattern)
3280 insn = rtx_alloc (JUMP_INSN);
3281 INSN_UID (insn) = cur_insn_uid++;
3283 PATTERN (insn) = pattern;
3284 INSN_CODE (insn) = -1;
3285 LOG_LINKS (insn) = NULL;
3286 REG_NOTES (insn) = NULL;
3287 JUMP_LABEL (insn) = NULL;
3288 INSN_LOCATOR (insn) = 0;
3289 BLOCK_FOR_INSN (insn) = NULL;
3294 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3297 make_call_insn_raw (rtx pattern)
3301 insn = rtx_alloc (CALL_INSN);
3302 INSN_UID (insn) = cur_insn_uid++;
3304 PATTERN (insn) = pattern;
3305 INSN_CODE (insn) = -1;
3306 LOG_LINKS (insn) = NULL;
3307 REG_NOTES (insn) = NULL;
3308 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3309 INSN_LOCATOR (insn) = 0;
3310 BLOCK_FOR_INSN (insn) = NULL;
3315 /* Add INSN to the end of the doubly-linked list.
3316 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3321 PREV_INSN (insn) = last_insn;
3322 NEXT_INSN (insn) = 0;
3324 if (NULL != last_insn)
3325 NEXT_INSN (last_insn) = insn;
3327 if (NULL == first_insn)
3333 /* Add INSN into the doubly-linked list after insn AFTER. This and
3334 the next should be the only functions called to insert an insn once
3335 delay slots have been filled since only they know how to update a
3339 add_insn_after (rtx insn, rtx after)
3341 rtx next = NEXT_INSN (after);
3344 gcc_assert (!optimize || !INSN_DELETED_P (after));
3346 NEXT_INSN (insn) = next;
3347 PREV_INSN (insn) = after;
3351 PREV_INSN (next) = insn;
3352 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3353 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3355 else if (last_insn == after)
3359 struct sequence_stack *stack = seq_stack;
3360 /* Scan all pending sequences too. */
3361 for (; stack; stack = stack->next)
3362 if (after == stack->last)
3371 if (!BARRIER_P (after)
3372 && !BARRIER_P (insn)
3373 && (bb = BLOCK_FOR_INSN (after)))
3375 set_block_for_insn (insn, bb);
3377 bb->flags |= BB_DIRTY;
3378 /* Should not happen as first in the BB is always
3379 either NOTE or LABEL. */
3380 if (BB_END (bb) == after
3381 /* Avoid clobbering of structure when creating new BB. */
3382 && !BARRIER_P (insn)
3384 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3388 NEXT_INSN (after) = insn;
3389 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3391 rtx sequence = PATTERN (after);
3392 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3396 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3397 the previous should be the only functions called to insert an insn once
3398 delay slots have been filled since only they know how to update a
3402 add_insn_before (rtx insn, rtx before)
3404 rtx prev = PREV_INSN (before);
3407 gcc_assert (!optimize || !INSN_DELETED_P (before));
3409 PREV_INSN (insn) = prev;
3410 NEXT_INSN (insn) = before;
3414 NEXT_INSN (prev) = insn;
3415 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3417 rtx sequence = PATTERN (prev);
3418 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3421 else if (first_insn == before)
3425 struct sequence_stack *stack = seq_stack;
3426 /* Scan all pending sequences too. */
3427 for (; stack; stack = stack->next)
3428 if (before == stack->first)
3430 stack->first = insn;
3437 if (!BARRIER_P (before)
3438 && !BARRIER_P (insn)
3439 && (bb = BLOCK_FOR_INSN (before)))
3441 set_block_for_insn (insn, bb);
3443 bb->flags |= BB_DIRTY;
3444 /* Should not happen as first in the BB is always either NOTE or
3446 gcc_assert (BB_HEAD (bb) != insn
3447 /* Avoid clobbering of structure when creating new BB. */
3450 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_BASIC_BLOCK));
3453 PREV_INSN (before) = insn;
3454 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3455 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3458 /* Remove an insn from its doubly-linked list. This function knows how
3459 to handle sequences. */
3461 remove_insn (rtx insn)
3463 rtx next = NEXT_INSN (insn);
3464 rtx prev = PREV_INSN (insn);
3469 NEXT_INSN (prev) = next;
3470 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3472 rtx sequence = PATTERN (prev);
3473 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3476 else if (first_insn == insn)
3480 struct sequence_stack *stack = seq_stack;
3481 /* Scan all pending sequences too. */
3482 for (; stack; stack = stack->next)
3483 if (insn == stack->first)
3485 stack->first = next;
3494 PREV_INSN (next) = prev;
3495 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3496 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3498 else if (last_insn == insn)
3502 struct sequence_stack *stack = seq_stack;
3503 /* Scan all pending sequences too. */
3504 for (; stack; stack = stack->next)
3505 if (insn == stack->last)
3513 if (!BARRIER_P (insn)
3514 && (bb = BLOCK_FOR_INSN (insn)))
3517 bb->flags |= BB_DIRTY;
3518 if (BB_HEAD (bb) == insn)
3520 /* Never ever delete the basic block note without deleting whole
3522 gcc_assert (!NOTE_P (insn));
3523 BB_HEAD (bb) = next;
3525 if (BB_END (bb) == insn)
3530 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3533 add_function_usage_to (rtx call_insn, rtx call_fusage)
3535 gcc_assert (call_insn && CALL_P (call_insn));
3537 /* Put the register usage information on the CALL. If there is already
3538 some usage information, put ours at the end. */
3539 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3543 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3544 link = XEXP (link, 1))
3547 XEXP (link, 1) = call_fusage;
3550 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3553 /* Delete all insns made since FROM.
3554 FROM becomes the new last instruction. */
3557 delete_insns_since (rtx from)
3562 NEXT_INSN (from) = 0;
3566 /* This function is deprecated, please use sequences instead.
3568 Move a consecutive bunch of insns to a different place in the chain.
3569 The insns to be moved are those between FROM and TO.
3570 They are moved to a new position after the insn AFTER.
3571 AFTER must not be FROM or TO or any insn in between.
3573 This function does not know about SEQUENCEs and hence should not be
3574 called after delay-slot filling has been done. */
3577 reorder_insns_nobb (rtx from, rtx to, rtx after)
3579 /* Splice this bunch out of where it is now. */
3580 if (PREV_INSN (from))
3581 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3583 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3584 if (last_insn == to)
3585 last_insn = PREV_INSN (from);
3586 if (first_insn == from)
3587 first_insn = NEXT_INSN (to);
3589 /* Make the new neighbors point to it and it to them. */
3590 if (NEXT_INSN (after))
3591 PREV_INSN (NEXT_INSN (after)) = to;
3593 NEXT_INSN (to) = NEXT_INSN (after);
3594 PREV_INSN (from) = after;
3595 NEXT_INSN (after) = from;
3596 if (after == last_insn)
3600 /* Same as function above, but take care to update BB boundaries. */
3602 reorder_insns (rtx from, rtx to, rtx after)
3604 rtx prev = PREV_INSN (from);
3605 basic_block bb, bb2;
3607 reorder_insns_nobb (from, to, after);
3609 if (!BARRIER_P (after)
3610 && (bb = BLOCK_FOR_INSN (after)))
3613 bb->flags |= BB_DIRTY;
3615 if (!BARRIER_P (from)
3616 && (bb2 = BLOCK_FOR_INSN (from)))
3618 if (BB_END (bb2) == to)
3619 BB_END (bb2) = prev;
3620 bb2->flags |= BB_DIRTY;
3623 if (BB_END (bb) == after)
3626 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3628 set_block_for_insn (x, bb);
3632 /* Return the line note insn preceding INSN. */
3635 find_line_note (rtx insn)
3637 if (no_line_numbers)
3640 for (; insn; insn = PREV_INSN (insn))
3642 && NOTE_LINE_NUMBER (insn) >= 0)
3648 /* Remove unnecessary notes from the instruction stream. */
3651 remove_unnecessary_notes (void)
3653 rtx block_stack = NULL_RTX;
3654 rtx eh_stack = NULL_RTX;
3659 /* We must not remove the first instruction in the function because
3660 the compiler depends on the first instruction being a note. */
3661 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3663 /* Remember what's next. */
3664 next = NEXT_INSN (insn);
3666 /* We're only interested in notes. */
3670 switch (NOTE_LINE_NUMBER (insn))
3672 case NOTE_INSN_DELETED:
3676 case NOTE_INSN_EH_REGION_BEG:
3677 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3680 case NOTE_INSN_EH_REGION_END:
3681 /* Too many end notes. */
3682 gcc_assert (eh_stack);
3683 /* Mismatched nesting. */
3684 gcc_assert (NOTE_EH_HANDLER (XEXP (eh_stack, 0))
3685 == NOTE_EH_HANDLER (insn));
3687 eh_stack = XEXP (eh_stack, 1);
3688 free_INSN_LIST_node (tmp);
3691 case NOTE_INSN_BLOCK_BEG:
3692 /* By now, all notes indicating lexical blocks should have
3693 NOTE_BLOCK filled in. */
3694 gcc_assert (NOTE_BLOCK (insn));
3695 block_stack = alloc_INSN_LIST (insn, block_stack);
3698 case NOTE_INSN_BLOCK_END:
3699 /* Too many end notes. */
3700 gcc_assert (block_stack);
3701 /* Mismatched nesting. */
3702 gcc_assert (NOTE_BLOCK (XEXP (block_stack, 0)) == NOTE_BLOCK (insn));
3704 block_stack = XEXP (block_stack, 1);
3705 free_INSN_LIST_node (tmp);
3707 /* Scan back to see if there are any non-note instructions
3708 between INSN and the beginning of this block. If not,
3709 then there is no PC range in the generated code that will
3710 actually be in this block, so there's no point in
3711 remembering the existence of the block. */
3712 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3714 /* This block contains a real instruction. Note that we
3715 don't include labels; if the only thing in the block
3716 is a label, then there are still no PC values that
3717 lie within the block. */
3721 /* We're only interested in NOTEs. */
3725 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3727 /* We just verified that this BLOCK matches us with
3728 the block_stack check above. Never delete the
3729 BLOCK for the outermost scope of the function; we
3730 can refer to names from that scope even if the
3731 block notes are messed up. */
3732 if (! is_body_block (NOTE_BLOCK (insn))
3733 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3740 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3741 /* There's a nested block. We need to leave the
3742 current block in place since otherwise the debugger
3743 wouldn't be able to show symbols from our block in
3744 the nested block. */
3750 /* Too many begin notes. */
3751 gcc_assert (!block_stack && !eh_stack);
3755 /* Emit insn(s) of given code and pattern
3756 at a specified place within the doubly-linked list.
3758 All of the emit_foo global entry points accept an object
3759 X which is either an insn list or a PATTERN of a single
3762 There are thus a few canonical ways to generate code and
3763 emit it at a specific place in the instruction stream. For
3764 example, consider the instruction named SPOT and the fact that
3765 we would like to emit some instructions before SPOT. We might
3769 ... emit the new instructions ...
3770 insns_head = get_insns ();
3773 emit_insn_before (insns_head, SPOT);
3775 It used to be common to generate SEQUENCE rtl instead, but that
3776 is a relic of the past which no longer occurs. The reason is that
3777 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3778 generated would almost certainly die right after it was created. */
3780 /* Make X be output before the instruction BEFORE. */
3783 emit_insn_before_noloc (rtx x, rtx before)
3788 gcc_assert (before);
3793 switch (GET_CODE (x))
3804 rtx next = NEXT_INSN (insn);
3805 add_insn_before (insn, before);
3811 #ifdef ENABLE_RTL_CHECKING
3818 last = make_insn_raw (x);
3819 add_insn_before (last, before);
3826 /* Make an instruction with body X and code JUMP_INSN
3827 and output it before the instruction BEFORE. */
3830 emit_jump_insn_before_noloc (rtx x, rtx before)
3832 rtx insn, last = NULL_RTX;
3834 gcc_assert (before);
3836 switch (GET_CODE (x))
3847 rtx next = NEXT_INSN (insn);
3848 add_insn_before (insn, before);
3854 #ifdef ENABLE_RTL_CHECKING
3861 last = make_jump_insn_raw (x);
3862 add_insn_before (last, before);
3869 /* Make an instruction with body X and code CALL_INSN
3870 and output it before the instruction BEFORE. */
3873 emit_call_insn_before_noloc (rtx x, rtx before)
3875 rtx last = NULL_RTX, insn;
3877 gcc_assert (before);
3879 switch (GET_CODE (x))
3890 rtx next = NEXT_INSN (insn);
3891 add_insn_before (insn, before);
3897 #ifdef ENABLE_RTL_CHECKING
3904 last = make_call_insn_raw (x);
3905 add_insn_before (last, before);
3912 /* Make an insn of code BARRIER
3913 and output it before the insn BEFORE. */
3916 emit_barrier_before (rtx before)
3918 rtx insn = rtx_alloc (BARRIER);
3920 INSN_UID (insn) = cur_insn_uid++;
3922 add_insn_before (insn, before);
3926 /* Emit the label LABEL before the insn BEFORE. */
3929 emit_label_before (rtx label, rtx before)
3931 /* This can be called twice for the same label as a result of the
3932 confusion that follows a syntax error! So make it harmless. */
3933 if (INSN_UID (label) == 0)
3935 INSN_UID (label) = cur_insn_uid++;
3936 add_insn_before (label, before);
3942 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3945 emit_note_before (int subtype, rtx before)
3947 rtx note = rtx_alloc (NOTE);
3948 INSN_UID (note) = cur_insn_uid++;
3949 #ifndef USE_MAPPED_LOCATION
3950 NOTE_SOURCE_FILE (note) = 0;
3952 NOTE_LINE_NUMBER (note) = subtype;
3953 BLOCK_FOR_INSN (note) = NULL;
3955 add_insn_before (note, before);
3959 /* Helper for emit_insn_after, handles lists of instructions
3962 static rtx emit_insn_after_1 (rtx, rtx);
3965 emit_insn_after_1 (rtx first, rtx after)
3971 if (!BARRIER_P (after)
3972 && (bb = BLOCK_FOR_INSN (after)))
3974 bb->flags |= BB_DIRTY;
3975 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3976 if (!BARRIER_P (last))
3977 set_block_for_insn (last, bb);
3978 if (!BARRIER_P (last))
3979 set_block_for_insn (last, bb);
3980 if (BB_END (bb) == after)
3984 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3987 after_after = NEXT_INSN (after);
3989 NEXT_INSN (after) = first;
3990 PREV_INSN (first) = after;
3991 NEXT_INSN (last) = after_after;
3993 PREV_INSN (after_after) = last;
3995 if (after == last_insn)
4000 /* Make X be output after the insn AFTER. */
4003 emit_insn_after_noloc (rtx x, rtx after)
4012 switch (GET_CODE (x))
4020 last = emit_insn_after_1 (x, after);
4023 #ifdef ENABLE_RTL_CHECKING
4030 last = make_insn_raw (x);
4031 add_insn_after (last, after);
4038 /* Similar to emit_insn_after, except that line notes are to be inserted so
4039 as to act as if this insn were at FROM. */
4042 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4044 rtx from_line = find_line_note (from);
4045 rtx after_line = find_line_note (after);
4046 rtx insn = emit_insn_after (x, after);
4049 emit_note_copy_after (from_line, after);
4052 emit_note_copy_after (after_line, insn);
4055 /* Make an insn of code JUMP_INSN with body X
4056 and output it after the insn AFTER. */
4059 emit_jump_insn_after_noloc (rtx x, rtx after)
4065 switch (GET_CODE (x))
4073 last = emit_insn_after_1 (x, after);
4076 #ifdef ENABLE_RTL_CHECKING
4083 last = make_jump_insn_raw (x);
4084 add_insn_after (last, after);
4091 /* Make an instruction with body X and code CALL_INSN
4092 and output it after the instruction AFTER. */
4095 emit_call_insn_after_noloc (rtx x, rtx after)
4101 switch (GET_CODE (x))
4109 last = emit_insn_after_1 (x, after);
4112 #ifdef ENABLE_RTL_CHECKING
4119 last = make_call_insn_raw (x);
4120 add_insn_after (last, after);
4127 /* Make an insn of code BARRIER
4128 and output it after the insn AFTER. */
4131 emit_barrier_after (rtx after)
4133 rtx insn = rtx_alloc (BARRIER);
4135 INSN_UID (insn) = cur_insn_uid++;
4137 add_insn_after (insn, after);
4141 /* Emit the label LABEL after the insn AFTER. */
4144 emit_label_after (rtx label, rtx after)
4146 /* This can be called twice for the same label
4147 as a result of the confusion that follows a syntax error!
4148 So make it harmless. */
4149 if (INSN_UID (label) == 0)
4151 INSN_UID (label) = cur_insn_uid++;
4152 add_insn_after (label, after);
4158 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4161 emit_note_after (int subtype, rtx after)
4163 rtx note = rtx_alloc (NOTE);
4164 INSN_UID (note) = cur_insn_uid++;
4165 #ifndef USE_MAPPED_LOCATION
4166 NOTE_SOURCE_FILE (note) = 0;
4168 NOTE_LINE_NUMBER (note) = subtype;
4169 BLOCK_FOR_INSN (note) = NULL;
4170 add_insn_after (note, after);
4174 /* Emit a copy of note ORIG after the insn AFTER. */
4177 emit_note_copy_after (rtx orig, rtx after)
4181 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4187 note = rtx_alloc (NOTE);
4188 INSN_UID (note) = cur_insn_uid++;
4189 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4190 NOTE_DATA (note) = NOTE_DATA (orig);
4191 BLOCK_FOR_INSN (note) = NULL;
4192 add_insn_after (note, after);
4196 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4198 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4200 rtx last = emit_insn_after_noloc (pattern, after);
4202 if (pattern == NULL_RTX || !loc)
4205 after = NEXT_INSN (after);
4208 if (active_insn_p (after) && !INSN_LOCATOR (after))
4209 INSN_LOCATOR (after) = loc;
4212 after = NEXT_INSN (after);
4217 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4219 emit_insn_after (rtx pattern, rtx after)
4222 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4224 return emit_insn_after_noloc (pattern, after);
4227 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4229 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4231 rtx last = emit_jump_insn_after_noloc (pattern, after);
4233 if (pattern == NULL_RTX || !loc)
4236 after = NEXT_INSN (after);
4239 if (active_insn_p (after) && !INSN_LOCATOR (after))
4240 INSN_LOCATOR (after) = loc;
4243 after = NEXT_INSN (after);
4248 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4250 emit_jump_insn_after (rtx pattern, rtx after)
4253 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4255 return emit_jump_insn_after_noloc (pattern, after);
4258 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4260 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4262 rtx last = emit_call_insn_after_noloc (pattern, after);
4264 if (pattern == NULL_RTX || !loc)
4267 after = NEXT_INSN (after);
4270 if (active_insn_p (after) && !INSN_LOCATOR (after))
4271 INSN_LOCATOR (after) = loc;
4274 after = NEXT_INSN (after);
4279 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4281 emit_call_insn_after (rtx pattern, rtx after)
4284 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4286 return emit_call_insn_after_noloc (pattern, after);
4289 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4291 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4293 rtx first = PREV_INSN (before);
4294 rtx last = emit_insn_before_noloc (pattern, before);
4296 if (pattern == NULL_RTX || !loc)
4299 first = NEXT_INSN (first);
4302 if (active_insn_p (first) && !INSN_LOCATOR (first))
4303 INSN_LOCATOR (first) = loc;
4306 first = NEXT_INSN (first);
4311 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4313 emit_insn_before (rtx pattern, rtx before)
4315 if (INSN_P (before))
4316 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4318 return emit_insn_before_noloc (pattern, before);
4321 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4323 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4325 rtx first = PREV_INSN (before);
4326 rtx last = emit_jump_insn_before_noloc (pattern, before);
4328 if (pattern == NULL_RTX)
4331 first = NEXT_INSN (first);
4334 if (active_insn_p (first) && !INSN_LOCATOR (first))
4335 INSN_LOCATOR (first) = loc;
4338 first = NEXT_INSN (first);
4343 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4345 emit_jump_insn_before (rtx pattern, rtx before)
4347 if (INSN_P (before))
4348 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4350 return emit_jump_insn_before_noloc (pattern, before);
4353 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4355 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4357 rtx first = PREV_INSN (before);
4358 rtx last = emit_call_insn_before_noloc (pattern, before);
4360 if (pattern == NULL_RTX)
4363 first = NEXT_INSN (first);
4366 if (active_insn_p (first) && !INSN_LOCATOR (first))
4367 INSN_LOCATOR (first) = loc;
4370 first = NEXT_INSN (first);
4375 /* like emit_call_insn_before_noloc,
4376 but set insn_locator according to before. */
4378 emit_call_insn_before (rtx pattern, rtx before)
4380 if (INSN_P (before))
4381 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4383 return emit_call_insn_before_noloc (pattern, before);
4386 /* Take X and emit it at the end of the doubly-linked
4389 Returns the last insn emitted. */
4394 rtx last = last_insn;
4400 switch (GET_CODE (x))
4411 rtx next = NEXT_INSN (insn);
4418 #ifdef ENABLE_RTL_CHECKING
4425 last = make_insn_raw (x);
4433 /* Make an insn of code JUMP_INSN with pattern X
4434 and add it to the end of the doubly-linked list. */
4437 emit_jump_insn (rtx x)
4439 rtx last = NULL_RTX, insn;
4441 switch (GET_CODE (x))
4452 rtx next = NEXT_INSN (insn);
4459 #ifdef ENABLE_RTL_CHECKING
4466 last = make_jump_insn_raw (x);
4474 /* Make an insn of code CALL_INSN with pattern X
4475 and add it to the end of the doubly-linked list. */
4478 emit_call_insn (rtx x)
4482 switch (GET_CODE (x))
4490 insn = emit_insn (x);
4493 #ifdef ENABLE_RTL_CHECKING
4500 insn = make_call_insn_raw (x);
4508 /* Add the label LABEL to the end of the doubly-linked list. */
4511 emit_label (rtx label)
4513 /* This can be called twice for the same label
4514 as a result of the confusion that follows a syntax error!
4515 So make it harmless. */
4516 if (INSN_UID (label) == 0)
4518 INSN_UID (label) = cur_insn_uid++;
4524 /* Make an insn of code BARRIER
4525 and add it to the end of the doubly-linked list. */
4530 rtx barrier = rtx_alloc (BARRIER);
4531 INSN_UID (barrier) = cur_insn_uid++;
4536 /* Make line numbering NOTE insn for LOCATION add it to the end
4537 of the doubly-linked list, but only if line-numbers are desired for
4538 debugging info and it doesn't match the previous one. */
4541 emit_line_note (location_t location)
4545 #ifdef USE_MAPPED_LOCATION
4546 if (location == last_location)
4549 if (location.file && last_location.file
4550 && !strcmp (location.file, last_location.file)
4551 && location.line == last_location.line)
4554 last_location = location;
4556 if (no_line_numbers)
4562 #ifdef USE_MAPPED_LOCATION
4563 note = emit_note ((int) location);
4565 note = emit_note (location.line);
4566 NOTE_SOURCE_FILE (note) = location.file;
4572 /* Emit a copy of note ORIG. */
4575 emit_note_copy (rtx orig)
4579 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4585 note = rtx_alloc (NOTE);
4587 INSN_UID (note) = cur_insn_uid++;
4588 NOTE_DATA (note) = NOTE_DATA (orig);
4589 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4590 BLOCK_FOR_INSN (note) = NULL;
4596 /* Make an insn of code NOTE or type NOTE_NO
4597 and add it to the end of the doubly-linked list. */
4600 emit_note (int note_no)
4604 note = rtx_alloc (NOTE);
4605 INSN_UID (note) = cur_insn_uid++;
4606 NOTE_LINE_NUMBER (note) = note_no;
4607 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4608 BLOCK_FOR_INSN (note) = NULL;
4613 /* Cause next statement to emit a line note even if the line number
4617 force_next_line_note (void)
4619 #ifdef USE_MAPPED_LOCATION
4622 last_location.line = -1;
4626 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4627 note of this type already exists, remove it first. */
4630 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4632 rtx note = find_reg_note (insn, kind, NULL_RTX);
4638 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4639 has multiple sets (some callers assume single_set
4640 means the insn only has one set, when in fact it
4641 means the insn only has one * useful * set). */
4642 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4648 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4649 It serves no useful purpose and breaks eliminate_regs. */
4650 if (GET_CODE (datum) == ASM_OPERANDS)
4660 XEXP (note, 0) = datum;
4664 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4665 return REG_NOTES (insn);
4668 /* Return an indication of which type of insn should have X as a body.
4669 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4671 static enum rtx_code
4672 classify_insn (rtx x)
4676 if (GET_CODE (x) == CALL)
4678 if (GET_CODE (x) == RETURN)
4680 if (GET_CODE (x) == SET)
4682 if (SET_DEST (x) == pc_rtx)
4684 else if (GET_CODE (SET_SRC (x)) == CALL)
4689 if (GET_CODE (x) == PARALLEL)
4692 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4693 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4695 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4696 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4698 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4699 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4705 /* Emit the rtl pattern X as an appropriate kind of insn.
4706 If X is a label, it is simply added into the insn chain. */
4711 enum rtx_code code = classify_insn (x);
4716 return emit_label (x);
4718 return emit_insn (x);
4721 rtx insn = emit_jump_insn (x);
4722 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4723 return emit_barrier ();
4727 return emit_call_insn (x);
4733 /* Space for free sequence stack entries. */
4734 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4736 /* Begin emitting insns to a sequence. If this sequence will contain
4737 something that might cause the compiler to pop arguments to function
4738 calls (because those pops have previously been deferred; see
4739 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4740 before calling this function. That will ensure that the deferred
4741 pops are not accidentally emitted in the middle of this sequence. */
4744 start_sequence (void)
4746 struct sequence_stack *tem;
4748 if (free_sequence_stack != NULL)
4750 tem = free_sequence_stack;
4751 free_sequence_stack = tem->next;
4754 tem = ggc_alloc (sizeof (struct sequence_stack));
4756 tem->next = seq_stack;
4757 tem->first = first_insn;
4758 tem->last = last_insn;
4766 /* Set up the insn chain starting with FIRST as the current sequence,
4767 saving the previously current one. See the documentation for
4768 start_sequence for more information about how to use this function. */
4771 push_to_sequence (rtx first)
4777 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4783 /* Set up the outer-level insn chain
4784 as the current sequence, saving the previously current one. */
4787 push_topmost_sequence (void)
4789 struct sequence_stack *stack, *top = NULL;
4793 for (stack = seq_stack; stack; stack = stack->next)
4796 first_insn = top->first;
4797 last_insn = top->last;
4800 /* After emitting to the outer-level insn chain, update the outer-level
4801 insn chain, and restore the previous saved state. */
4804 pop_topmost_sequence (void)
4806 struct sequence_stack *stack, *top = NULL;
4808 for (stack = seq_stack; stack; stack = stack->next)
4811 top->first = first_insn;
4812 top->last = last_insn;
4817 /* After emitting to a sequence, restore previous saved state.
4819 To get the contents of the sequence just made, you must call
4820 `get_insns' *before* calling here.
4822 If the compiler might have deferred popping arguments while
4823 generating this sequence, and this sequence will not be immediately
4824 inserted into the instruction stream, use do_pending_stack_adjust
4825 before calling get_insns. That will ensure that the deferred
4826 pops are inserted into this sequence, and not into some random
4827 location in the instruction stream. See INHIBIT_DEFER_POP for more
4828 information about deferred popping of arguments. */
4833 struct sequence_stack *tem = seq_stack;
4835 first_insn = tem->first;
4836 last_insn = tem->last;
4837 seq_stack = tem->next;
4839 memset (tem, 0, sizeof (*tem));
4840 tem->next = free_sequence_stack;
4841 free_sequence_stack = tem;
4844 /* Return 1 if currently emitting into a sequence. */
4847 in_sequence_p (void)
4849 return seq_stack != 0;
4852 /* Put the various virtual registers into REGNO_REG_RTX. */
4855 init_virtual_regs (struct emit_status *es)
4857 rtx *ptr = es->x_regno_reg_rtx;
4858 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4859 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4860 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4861 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4862 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4866 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4867 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4868 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4869 static int copy_insn_n_scratches;
4871 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4872 copied an ASM_OPERANDS.
4873 In that case, it is the original input-operand vector. */
4874 static rtvec orig_asm_operands_vector;
4876 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4877 copied an ASM_OPERANDS.
4878 In that case, it is the copied input-operand vector. */
4879 static rtvec copy_asm_operands_vector;
4881 /* Likewise for the constraints vector. */
4882 static rtvec orig_asm_constraints_vector;
4883 static rtvec copy_asm_constraints_vector;
4885 /* Recursively create a new copy of an rtx for copy_insn.
4886 This function differs from copy_rtx in that it handles SCRATCHes and
4887 ASM_OPERANDs properly.
4888 Normally, this function is not used directly; use copy_insn as front end.
4889 However, you could first copy an insn pattern with copy_insn and then use
4890 this function afterwards to properly copy any REG_NOTEs containing
4894 copy_insn_1 (rtx orig)
4899 const char *format_ptr;
4901 code = GET_CODE (orig);
4915 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4920 for (i = 0; i < copy_insn_n_scratches; i++)
4921 if (copy_insn_scratch_in[i] == orig)
4922 return copy_insn_scratch_out[i];
4926 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4927 a LABEL_REF, it isn't sharable. */
4928 if (GET_CODE (XEXP (orig, 0)) == PLUS
4929 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4930 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4934 /* A MEM with a constant address is not sharable. The problem is that
4935 the constant address may need to be reloaded. If the mem is shared,
4936 then reloading one copy of this mem will cause all copies to appear
4937 to have been reloaded. */
4943 copy = rtx_alloc (code);
4945 /* Copy the various flags, and other information. We assume that
4946 all fields need copying, and then clear the fields that should
4947 not be copied. That is the sensible default behavior, and forces
4948 us to explicitly document why we are *not* copying a flag. */
4949 memcpy (copy, orig, RTX_HDR_SIZE);
4951 /* We do not copy the USED flag, which is used as a mark bit during
4952 walks over the RTL. */
4953 RTX_FLAG (copy, used) = 0;
4955 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4958 RTX_FLAG (copy, jump) = 0;
4959 RTX_FLAG (copy, call) = 0;
4960 RTX_FLAG (copy, frame_related) = 0;
4963 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4965 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4967 copy->u.fld[i] = orig->u.fld[i];
4968 switch (*format_ptr++)
4971 if (XEXP (orig, i) != NULL)
4972 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4977 if (XVEC (orig, i) == orig_asm_constraints_vector)
4978 XVEC (copy, i) = copy_asm_constraints_vector;
4979 else if (XVEC (orig, i) == orig_asm_operands_vector)
4980 XVEC (copy, i) = copy_asm_operands_vector;
4981 else if (XVEC (orig, i) != NULL)
4983 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4984 for (j = 0; j < XVECLEN (copy, i); j++)
4985 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4996 /* These are left unchanged. */
5004 if (code == SCRATCH)
5006 i = copy_insn_n_scratches++;
5007 gcc_assert (i < MAX_RECOG_OPERANDS);
5008 copy_insn_scratch_in[i] = orig;
5009 copy_insn_scratch_out[i] = copy;
5011 else if (code == ASM_OPERANDS)
5013 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5014 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5015 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5016 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5022 /* Create a new copy of an rtx.
5023 This function differs from copy_rtx in that it handles SCRATCHes and
5024 ASM_OPERANDs properly.
5025 INSN doesn't really have to be a full INSN; it could be just the
5028 copy_insn (rtx insn)
5030 copy_insn_n_scratches = 0;
5031 orig_asm_operands_vector = 0;
5032 orig_asm_constraints_vector = 0;
5033 copy_asm_operands_vector = 0;
5034 copy_asm_constraints_vector = 0;
5035 return copy_insn_1 (insn);
5038 /* Initialize data structures and variables in this file
5039 before generating rtl for each function. */
5044 struct function *f = cfun;
5046 f->emit = ggc_alloc (sizeof (struct emit_status));
5050 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5051 last_location = UNKNOWN_LOCATION;
5052 first_label_num = label_num;
5055 /* Init the tables that describe all the pseudo regs. */
5057 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5059 f->emit->regno_pointer_align
5060 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5061 * sizeof (unsigned char));
5064 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5066 /* Put copies of all the hard registers into regno_reg_rtx. */
5067 memcpy (regno_reg_rtx,
5068 static_regno_reg_rtx,
5069 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5071 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5072 init_virtual_regs (f->emit);
5074 /* Indicate that the virtual registers and stack locations are
5076 REG_POINTER (stack_pointer_rtx) = 1;
5077 REG_POINTER (frame_pointer_rtx) = 1;
5078 REG_POINTER (hard_frame_pointer_rtx) = 1;
5079 REG_POINTER (arg_pointer_rtx) = 1;
5081 REG_POINTER (virtual_incoming_args_rtx) = 1;
5082 REG_POINTER (virtual_stack_vars_rtx) = 1;
5083 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5084 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5085 REG_POINTER (virtual_cfa_rtx) = 1;
5087 #ifdef STACK_BOUNDARY
5088 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5089 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5090 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5091 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5093 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5094 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5095 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5096 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5097 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5100 #ifdef INIT_EXPANDERS
5105 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5108 gen_const_vector (enum machine_mode mode, int constant)
5113 enum machine_mode inner;
5115 units = GET_MODE_NUNITS (mode);
5116 inner = GET_MODE_INNER (mode);
5118 v = rtvec_alloc (units);
5120 /* We need to call this function after we set the scalar const_tiny_rtx
5122 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5124 for (i = 0; i < units; ++i)
5125 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5127 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5131 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5132 all elements are zero, and the one vector when all elements are one. */
5134 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5136 enum machine_mode inner = GET_MODE_INNER (mode);
5137 int nunits = GET_MODE_NUNITS (mode);
5141 /* Check to see if all of the elements have the same value. */
5142 x = RTVEC_ELT (v, nunits - 1);
5143 for (i = nunits - 2; i >= 0; i--)
5144 if (RTVEC_ELT (v, i) != x)
5147 /* If the values are all the same, check to see if we can use one of the
5148 standard constant vectors. */
5151 if (x == CONST0_RTX (inner))
5152 return CONST0_RTX (mode);
5153 else if (x == CONST1_RTX (inner))
5154 return CONST1_RTX (mode);
5157 return gen_rtx_raw_CONST_VECTOR (mode, v);
5160 /* Create some permanent unique rtl objects shared between all functions.
5161 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5164 init_emit_once (int line_numbers)
5167 enum machine_mode mode;
5168 enum machine_mode double_mode;
5170 /* We need reg_raw_mode, so initialize the modes now. */
5171 init_reg_modes_once ();
5173 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5175 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5176 const_int_htab_eq, NULL);
5178 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5179 const_double_htab_eq, NULL);
5181 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5182 mem_attrs_htab_eq, NULL);
5183 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5184 reg_attrs_htab_eq, NULL);
5186 no_line_numbers = ! line_numbers;
5188 /* Compute the word and byte modes. */
5190 byte_mode = VOIDmode;
5191 word_mode = VOIDmode;
5192 double_mode = VOIDmode;
5194 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5195 mode = GET_MODE_WIDER_MODE (mode))
5197 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5198 && byte_mode == VOIDmode)
5201 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5202 && word_mode == VOIDmode)
5206 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5207 mode = GET_MODE_WIDER_MODE (mode))
5209 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5210 && double_mode == VOIDmode)
5214 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5216 /* Assign register numbers to the globally defined register rtx.
5217 This must be done at runtime because the register number field
5218 is in a union and some compilers can't initialize unions. */
5220 pc_rtx = gen_rtx_PC (VOIDmode);
5221 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5222 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5223 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5224 if (hard_frame_pointer_rtx == 0)
5225 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5226 HARD_FRAME_POINTER_REGNUM);
5227 if (arg_pointer_rtx == 0)
5228 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5229 virtual_incoming_args_rtx =
5230 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5231 virtual_stack_vars_rtx =
5232 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5233 virtual_stack_dynamic_rtx =
5234 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5235 virtual_outgoing_args_rtx =
5236 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5237 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5239 /* Initialize RTL for commonly used hard registers. These are
5240 copied into regno_reg_rtx as we begin to compile each function. */
5241 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5242 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5244 #ifdef INIT_EXPANDERS
5245 /* This is to initialize {init|mark|free}_machine_status before the first
5246 call to push_function_context_to. This is needed by the Chill front
5247 end which calls push_function_context_to before the first call to
5248 init_function_start. */
5252 /* Create the unique rtx's for certain rtx codes and operand values. */
5254 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5255 tries to use these variables. */
5256 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5257 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5258 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5260 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5261 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5262 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5264 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5266 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5267 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5268 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5269 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5270 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5271 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5272 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5274 dconsthalf = dconst1;
5275 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5277 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5279 /* Initialize mathematical constants for constant folding builtins.
5280 These constants need to be given to at least 160 bits precision. */
5281 real_from_string (&dconstpi,
5282 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5283 real_from_string (&dconste,
5284 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5286 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5288 REAL_VALUE_TYPE *r =
5289 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5291 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5292 mode = GET_MODE_WIDER_MODE (mode))
5293 const_tiny_rtx[i][(int) mode] =
5294 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5296 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5298 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5299 mode = GET_MODE_WIDER_MODE (mode))
5300 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5302 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5304 mode = GET_MODE_WIDER_MODE (mode))
5305 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5308 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5310 mode = GET_MODE_WIDER_MODE (mode))
5312 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5313 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5316 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5318 mode = GET_MODE_WIDER_MODE (mode))
5320 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5321 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5324 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5325 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5326 const_tiny_rtx[0][i] = const0_rtx;
5328 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5329 if (STORE_FLAG_VALUE == 1)
5330 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5332 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5333 return_address_pointer_rtx
5334 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5337 #ifdef STATIC_CHAIN_REGNUM
5338 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5340 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5341 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5342 static_chain_incoming_rtx
5343 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5346 static_chain_incoming_rtx = static_chain_rtx;
5350 static_chain_rtx = STATIC_CHAIN;
5352 #ifdef STATIC_CHAIN_INCOMING
5353 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5355 static_chain_incoming_rtx = static_chain_rtx;
5359 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5360 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5363 /* Produce exact duplicate of insn INSN after AFTER.
5364 Care updating of libcall regions if present. */
5367 emit_copy_of_insn_after (rtx insn, rtx after)
5370 rtx note1, note2, link;
5372 switch (GET_CODE (insn))
5375 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5379 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5383 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5384 if (CALL_INSN_FUNCTION_USAGE (insn))
5385 CALL_INSN_FUNCTION_USAGE (new)
5386 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5387 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5388 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5395 /* Update LABEL_NUSES. */
5396 mark_jump_label (PATTERN (new), new, 0);
5398 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5400 /* If the old insn is frame related, then so is the new one. This is
5401 primarily needed for IA-64 unwind info which marks epilogue insns,
5402 which may be duplicated by the basic block reordering code. */
5403 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn);
5405 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5407 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5408 if (REG_NOTE_KIND (link) != REG_LABEL)
5410 if (GET_CODE (link) == EXPR_LIST)
5412 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5417 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5422 /* Fix the libcall sequences. */
5423 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5426 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5428 XEXP (note1, 0) = p;
5429 XEXP (note2, 0) = new;
5431 INSN_CODE (new) = INSN_CODE (insn);
5435 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5437 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5439 if (hard_reg_clobbers[mode][regno])
5440 return hard_reg_clobbers[mode][regno];
5442 return (hard_reg_clobbers[mode][regno] =
5443 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5446 #include "gt-emit-rtl.h"