1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static GTY(()) int label_num = 1;
73 /* Nonzero means do not generate NOTEs for source line numbers. */
75 static int no_line_numbers;
77 /* Commonly used rtx's, so that we only need space for one copy.
78 These are initialized once for the entire compilation.
79 All of these are unique; no other rtx-object will be equal to any
82 rtx global_rtl[GR_MAX];
84 /* Commonly used RTL for hard registers. These objects are not necessarily
85 unique, so we allocate them separately from global_rtl. They are
86 initialized once per compilation unit, then copied into regno_reg_rtx
87 at the beginning of each function. */
88 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
98 REAL_VALUE_TYPE dconst0;
99 REAL_VALUE_TYPE dconst1;
100 REAL_VALUE_TYPE dconst2;
101 REAL_VALUE_TYPE dconst3;
102 REAL_VALUE_TYPE dconst10;
103 REAL_VALUE_TYPE dconstm1;
104 REAL_VALUE_TYPE dconstm2;
105 REAL_VALUE_TYPE dconsthalf;
106 REAL_VALUE_TYPE dconstthird;
107 REAL_VALUE_TYPE dconstpi;
108 REAL_VALUE_TYPE dconste;
110 /* All references to the following fixed hard registers go through
111 these unique rtl objects. On machines where the frame-pointer and
112 arg-pointer are the same register, they use the same unique object.
114 After register allocation, other rtl objects which used to be pseudo-regs
115 may be clobbered to refer to the frame-pointer register.
116 But references that were originally to the frame-pointer can be
117 distinguished from the others because they contain frame_pointer_rtx.
119 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
120 tricky: until register elimination has taken place hard_frame_pointer_rtx
121 should be used if it is being set, and frame_pointer_rtx otherwise. After
122 register elimination hard_frame_pointer_rtx should always be used.
123 On machines where the two registers are same (most) then these are the
126 In an inline procedure, the stack and frame pointer rtxs may not be
127 used for anything else. */
128 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
147 htab_t const_int_htab;
149 /* A hash table storing memory attribute structures. */
150 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
151 htab_t mem_attrs_htab;
153 /* A hash table storing register attribute structures. */
154 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
155 htab_t reg_attrs_htab;
157 /* A hash table storing all CONST_DOUBLEs. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_double_htab;
161 #define first_insn (cfun->emit->x_first_insn)
162 #define last_insn (cfun->emit->x_last_insn)
163 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
164 #define last_location (cfun->emit->x_last_location)
165 #define first_label_num (cfun->emit->x_first_label_num)
167 static rtx make_call_insn_raw (rtx);
168 static rtx find_line_note (rtx);
169 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
170 static void unshare_all_decls (tree);
171 static void reset_used_decls (tree);
172 static void mark_label_nuses (rtx);
173 static hashval_t const_int_htab_hash (const void *);
174 static int const_int_htab_eq (const void *, const void *);
175 static hashval_t const_double_htab_hash (const void *);
176 static int const_double_htab_eq (const void *, const void *);
177 static rtx lookup_const_double (rtx);
178 static hashval_t mem_attrs_htab_hash (const void *);
179 static int mem_attrs_htab_eq (const void *, const void *);
180 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
182 static hashval_t reg_attrs_htab_hash (const void *);
183 static int reg_attrs_htab_eq (const void *, const void *);
184 static reg_attrs *get_reg_attrs (tree, int);
185 static tree component_ref_for_mem_expr (tree);
186 static rtx gen_const_vector (enum machine_mode, int);
187 static void copy_rtx_if_shared_1 (rtx *orig);
189 /* Probability of the conditional branch currently proceeded by try_split.
190 Set to -1 otherwise. */
191 int split_branch_probability = -1;
193 /* Returns a hash code for X (which is a really a CONST_INT). */
196 const_int_htab_hash (const void *x)
198 return (hashval_t) INTVAL ((rtx) x);
201 /* Returns nonzero if the value represented by X (which is really a
202 CONST_INT) is the same as that given by Y (which is really a
206 const_int_htab_eq (const void *x, const void *y)
208 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
211 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
213 const_double_htab_hash (const void *x)
218 if (GET_MODE (value) == VOIDmode)
219 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
222 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
223 /* MODE is used in the comparison, so it should be in the hash. */
224 h ^= GET_MODE (value);
229 /* Returns nonzero if the value represented by X (really a ...)
230 is the same as that represented by Y (really a ...) */
232 const_double_htab_eq (const void *x, const void *y)
234 rtx a = (rtx)x, b = (rtx)y;
236 if (GET_MODE (a) != GET_MODE (b))
238 if (GET_MODE (a) == VOIDmode)
239 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
240 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
242 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
243 CONST_DOUBLE_REAL_VALUE (b));
246 /* Returns a hash code for X (which is a really a mem_attrs *). */
249 mem_attrs_htab_hash (const void *x)
251 mem_attrs *p = (mem_attrs *) x;
253 return (p->alias ^ (p->align * 1000)
254 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
255 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
256 ^ (size_t) iterative_hash_expr (p->expr, 0));
259 /* Returns nonzero if the value represented by X (which is really a
260 mem_attrs *) is the same as that given by Y (which is also really a
264 mem_attrs_htab_eq (const void *x, const void *y)
266 mem_attrs *p = (mem_attrs *) x;
267 mem_attrs *q = (mem_attrs *) y;
269 return (p->alias == q->alias && p->offset == q->offset
270 && p->size == q->size && p->align == q->align
271 && (p->expr == q->expr
272 || (p->expr != NULL_TREE && q->expr != NULL_TREE
273 && operand_equal_p (p->expr, q->expr, 0))));
276 /* Allocate a new mem_attrs structure and insert it into the hash table if
277 one identical to it is not already in the table. We are doing this for
281 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
282 unsigned int align, enum machine_mode mode)
287 /* If everything is the default, we can just return zero.
288 This must match what the corresponding MEM_* macros return when the
289 field is not present. */
290 if (alias == 0 && expr == 0 && offset == 0
292 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
293 && (STRICT_ALIGNMENT && mode != BLKmode
294 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
299 attrs.offset = offset;
303 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
306 *slot = ggc_alloc (sizeof (mem_attrs));
307 memcpy (*slot, &attrs, sizeof (mem_attrs));
313 /* Returns a hash code for X (which is a really a reg_attrs *). */
316 reg_attrs_htab_hash (const void *x)
318 reg_attrs *p = (reg_attrs *) x;
320 return ((p->offset * 1000) ^ (long) p->decl);
323 /* Returns nonzero if the value represented by X (which is really a
324 reg_attrs *) is the same as that given by Y (which is also really a
328 reg_attrs_htab_eq (const void *x, const void *y)
330 reg_attrs *p = (reg_attrs *) x;
331 reg_attrs *q = (reg_attrs *) y;
333 return (p->decl == q->decl && p->offset == q->offset);
335 /* Allocate a new reg_attrs structure and insert it into the hash table if
336 one identical to it is not already in the table. We are doing this for
340 get_reg_attrs (tree decl, int offset)
345 /* If everything is the default, we can just return zero. */
346 if (decl == 0 && offset == 0)
350 attrs.offset = offset;
352 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
355 *slot = ggc_alloc (sizeof (reg_attrs));
356 memcpy (*slot, &attrs, sizeof (reg_attrs));
362 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
363 don't attempt to share with the various global pieces of rtl (such as
364 frame_pointer_rtx). */
367 gen_raw_REG (enum machine_mode mode, int regno)
369 rtx x = gen_rtx_raw_REG (mode, regno);
370 ORIGINAL_REGNO (x) = regno;
374 /* There are some RTL codes that require special attention; the generation
375 functions do the raw handling. If you add to this list, modify
376 special_rtx in gengenrtl.c as well. */
379 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
383 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
384 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
386 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
387 if (const_true_rtx && arg == STORE_FLAG_VALUE)
388 return const_true_rtx;
391 /* Look up the CONST_INT in the hash table. */
392 slot = htab_find_slot_with_hash (const_int_htab, &arg,
393 (hashval_t) arg, INSERT);
395 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
401 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
403 return GEN_INT (trunc_int_for_mode (c, mode));
406 /* CONST_DOUBLEs might be created from pairs of integers, or from
407 REAL_VALUE_TYPEs. Also, their length is known only at run time,
408 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
410 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
411 hash table. If so, return its counterpart; otherwise add it
412 to the hash table and return it. */
414 lookup_const_double (rtx real)
416 void **slot = htab_find_slot (const_double_htab, real, INSERT);
423 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
424 VALUE in mode MODE. */
426 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
428 rtx real = rtx_alloc (CONST_DOUBLE);
429 PUT_MODE (real, mode);
433 return lookup_const_double (real);
436 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
437 of ints: I0 is the low-order word and I1 is the high-order word.
438 Do not use this routine for non-integer modes; convert to
439 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
442 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
447 /* There are the following cases (note that there are no modes with
448 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
450 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
452 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
453 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
454 from copies of the sign bit, and sign of i0 and i1 are the same), then
455 we return a CONST_INT for i0.
456 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
457 if (mode != VOIDmode)
459 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
460 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
461 /* We can get a 0 for an error mark. */
462 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
463 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
465 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
466 return gen_int_mode (i0, mode);
468 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
471 /* If this integer fits in one word, return a CONST_INT. */
472 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
475 /* We use VOIDmode for integers. */
476 value = rtx_alloc (CONST_DOUBLE);
477 PUT_MODE (value, VOIDmode);
479 CONST_DOUBLE_LOW (value) = i0;
480 CONST_DOUBLE_HIGH (value) = i1;
482 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
483 XWINT (value, i) = 0;
485 return lookup_const_double (value);
489 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
491 /* In case the MD file explicitly references the frame pointer, have
492 all such references point to the same frame pointer. This is
493 used during frame pointer elimination to distinguish the explicit
494 references to these registers from pseudos that happened to be
497 If we have eliminated the frame pointer or arg pointer, we will
498 be using it as a normal register, for example as a spill
499 register. In such cases, we might be accessing it in a mode that
500 is not Pmode and therefore cannot use the pre-allocated rtx.
502 Also don't do this when we are making new REGs in reload, since
503 we don't want to get confused with the real pointers. */
505 if (mode == Pmode && !reload_in_progress)
507 if (regno == FRAME_POINTER_REGNUM
508 && (!reload_completed || frame_pointer_needed))
509 return frame_pointer_rtx;
510 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
511 if (regno == HARD_FRAME_POINTER_REGNUM
512 && (!reload_completed || frame_pointer_needed))
513 return hard_frame_pointer_rtx;
515 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
516 if (regno == ARG_POINTER_REGNUM)
517 return arg_pointer_rtx;
519 #ifdef RETURN_ADDRESS_POINTER_REGNUM
520 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
521 return return_address_pointer_rtx;
523 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
524 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
525 return pic_offset_table_rtx;
526 if (regno == STACK_POINTER_REGNUM)
527 return stack_pointer_rtx;
531 /* If the per-function register table has been set up, try to re-use
532 an existing entry in that table to avoid useless generation of RTL.
534 This code is disabled for now until we can fix the various backends
535 which depend on having non-shared hard registers in some cases. Long
536 term we want to re-enable this code as it can significantly cut down
537 on the amount of useless RTL that gets generated.
539 We'll also need to fix some code that runs after reload that wants to
540 set ORIGINAL_REGNO. */
545 && regno < FIRST_PSEUDO_REGISTER
546 && reg_raw_mode[regno] == mode)
547 return regno_reg_rtx[regno];
550 return gen_raw_REG (mode, regno);
554 gen_rtx_MEM (enum machine_mode mode, rtx addr)
556 rtx rt = gen_rtx_raw_MEM (mode, addr);
558 /* This field is not cleared by the mere allocation of the rtx, so
565 /* Generate a memory referring to non-trapping constant memory. */
568 gen_const_mem (enum machine_mode mode, rtx addr)
570 rtx mem = gen_rtx_MEM (mode, addr);
571 MEM_READONLY_P (mem) = 1;
572 MEM_NOTRAP_P (mem) = 1;
576 /* Generate a MEM referring to fixed portions of the frame, e.g., register
580 gen_frame_mem (enum machine_mode mode, rtx addr)
582 rtx mem = gen_rtx_MEM (mode, addr);
583 MEM_NOTRAP_P (mem) = 1;
584 set_mem_alias_set (mem, get_frame_alias_set ());
588 /* Generate a MEM referring to a temporary use of the stack, not part
589 of the fixed stack frame. For example, something which is pushed
590 by a target splitter. */
592 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
594 rtx mem = gen_rtx_MEM (mode, addr);
595 MEM_NOTRAP_P (mem) = 1;
596 if (!current_function_calls_alloca)
597 set_mem_alias_set (mem, get_frame_alias_set ());
601 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
602 this construct would be valid, and false otherwise. */
605 validate_subreg (enum machine_mode omode, enum machine_mode imode,
606 rtx reg, unsigned int offset)
608 unsigned int isize = GET_MODE_SIZE (imode);
609 unsigned int osize = GET_MODE_SIZE (omode);
611 /* All subregs must be aligned. */
612 if (offset % osize != 0)
615 /* The subreg offset cannot be outside the inner object. */
619 /* ??? This should not be here. Temporarily continue to allow word_mode
620 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
621 Generally, backends are doing something sketchy but it'll take time to
623 if (omode == word_mode)
625 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
626 is the culprit here, and not the backends. */
627 else if (osize >= UNITS_PER_WORD && isize >= osize)
629 /* Allow component subregs of complex and vector. Though given the below
630 extraction rules, it's not always clear what that means. */
631 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
632 && GET_MODE_INNER (imode) == omode)
634 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
635 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
636 represent this. It's questionable if this ought to be represented at
637 all -- why can't this all be hidden in post-reload splitters that make
638 arbitrarily mode changes to the registers themselves. */
639 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
641 /* Subregs involving floating point modes are not allowed to
642 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
643 (subreg:SI (reg:DF) 0) isn't. */
644 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
650 /* Paradoxical subregs must have offset zero. */
654 /* This is a normal subreg. Verify that the offset is representable. */
656 /* For hard registers, we already have most of these rules collected in
657 subreg_offset_representable_p. */
658 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
660 unsigned int regno = REGNO (reg);
662 #ifdef CANNOT_CHANGE_MODE_CLASS
663 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
664 && GET_MODE_INNER (imode) == omode)
666 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
670 return subreg_offset_representable_p (regno, imode, offset, omode);
673 /* For pseudo registers, we want most of the same checks. Namely:
674 If the register no larger than a word, the subreg must be lowpart.
675 If the register is larger than a word, the subreg must be the lowpart
676 of a subword. A subreg does *not* perform arbitrary bit extraction.
677 Given that we've already checked mode/offset alignment, we only have
678 to check subword subregs here. */
679 if (osize < UNITS_PER_WORD)
681 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
682 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
683 if (offset % UNITS_PER_WORD != low_off)
690 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
692 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
693 return gen_rtx_raw_SUBREG (mode, reg, offset);
696 /* Generate a SUBREG representing the least-significant part of REG if MODE
697 is smaller than mode of REG, otherwise paradoxical SUBREG. */
700 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
702 enum machine_mode inmode;
704 inmode = GET_MODE (reg);
705 if (inmode == VOIDmode)
707 return gen_rtx_SUBREG (mode, reg,
708 subreg_lowpart_offset (mode, inmode));
711 /* gen_rtvec (n, [rt1, ..., rtn])
713 ** This routine creates an rtvec and stores within it the
714 ** pointers to rtx's which are its arguments.
719 gen_rtvec (int n, ...)
728 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
730 vector = alloca (n * sizeof (rtx));
732 for (i = 0; i < n; i++)
733 vector[i] = va_arg (p, rtx);
735 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
739 return gen_rtvec_v (save_n, vector);
743 gen_rtvec_v (int n, rtx *argp)
749 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
751 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
753 for (i = 0; i < n; i++)
754 rt_val->elem[i] = *argp++;
759 /* Generate a REG rtx for a new pseudo register of mode MODE.
760 This pseudo is assigned the next sequential register number. */
763 gen_reg_rtx (enum machine_mode mode)
765 struct function *f = cfun;
768 /* Don't let anything called after initial flow analysis create new
770 gcc_assert (!no_new_pseudos);
772 if (generating_concat_p
773 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
774 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
776 /* For complex modes, don't make a single pseudo.
777 Instead, make a CONCAT of two pseudos.
778 This allows noncontiguous allocation of the real and imaginary parts,
779 which makes much better code. Besides, allocating DCmode
780 pseudos overstrains reload on some machines like the 386. */
781 rtx realpart, imagpart;
782 enum machine_mode partmode = GET_MODE_INNER (mode);
784 realpart = gen_reg_rtx (partmode);
785 imagpart = gen_reg_rtx (partmode);
786 return gen_rtx_CONCAT (mode, realpart, imagpart);
789 /* Make sure regno_pointer_align, and regno_reg_rtx are large
790 enough to have an element for this pseudo reg number. */
792 if (reg_rtx_no == f->emit->regno_pointer_align_length)
794 int old_size = f->emit->regno_pointer_align_length;
798 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
799 memset (new + old_size, 0, old_size);
800 f->emit->regno_pointer_align = (unsigned char *) new;
802 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
803 old_size * 2 * sizeof (rtx));
804 memset (new1 + old_size, 0, old_size * sizeof (rtx));
805 regno_reg_rtx = new1;
807 f->emit->regno_pointer_align_length = old_size * 2;
810 val = gen_raw_REG (mode, reg_rtx_no);
811 regno_reg_rtx[reg_rtx_no++] = val;
815 /* Generate a register with same attributes as REG, but offsetted by OFFSET.
816 Do the big endian correction if needed. */
819 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
821 rtx new = gen_rtx_REG (mode, regno);
823 HOST_WIDE_INT var_size;
825 /* PR middle-end/14084
826 The problem appears when a variable is stored in a larger register
827 and later it is used in the original mode or some mode in between
828 or some part of variable is accessed.
830 On little endian machines there is no problem because
831 the REG_OFFSET of the start of the variable is the same when
832 accessed in any mode (it is 0).
834 However, this is not true on big endian machines.
835 The offset of the start of the variable is different when accessed
837 When we are taking a part of the REG we have to change the OFFSET
838 from offset WRT size of mode of REG to offset WRT size of variable.
840 If we would not do the big endian correction the resulting REG_OFFSET
841 would be larger than the size of the DECL.
843 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
845 REG.mode MODE DECL size old offset new offset description
846 DI SI 4 4 0 int32 in SImode
847 DI SI 1 4 0 char in SImode
848 DI QI 1 7 0 char in QImode
849 DI QI 4 5 1 1st element in QImode
851 DI HI 4 6 2 1st element in HImode
854 If the size of DECL is equal or greater than the size of REG
855 we can't do this correction because the register holds the
856 whole variable or a part of the variable and thus the REG_OFFSET
857 is already correct. */
859 decl = REG_EXPR (reg);
860 if ((BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
863 && GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode)
864 && ((var_size = int_size_in_bytes (TREE_TYPE (decl))) > 0
865 && var_size < GET_MODE_SIZE (GET_MODE (reg))))
869 /* Convert machine endian to little endian WRT size of mode of REG. */
870 if (WORDS_BIG_ENDIAN)
871 offset_le = ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
872 / UNITS_PER_WORD) * UNITS_PER_WORD;
874 offset_le = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
876 if (BYTES_BIG_ENDIAN)
877 offset_le += ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
880 offset_le += offset % UNITS_PER_WORD;
882 if (offset_le >= var_size)
884 /* MODE is wider than the variable so the new reg will cover
885 the whole variable so the resulting OFFSET should be 0. */
890 /* Convert little endian to machine endian WRT size of variable. */
891 if (WORDS_BIG_ENDIAN)
892 offset = ((var_size - 1 - offset_le)
893 / UNITS_PER_WORD) * UNITS_PER_WORD;
895 offset = (offset_le / UNITS_PER_WORD) * UNITS_PER_WORD;
897 if (BYTES_BIG_ENDIAN)
898 offset += ((var_size - 1 - offset_le)
901 offset += offset_le % UNITS_PER_WORD;
905 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
906 REG_OFFSET (reg) + offset);
910 /* Set the decl for MEM to DECL. */
913 set_reg_attrs_from_mem (rtx reg, rtx mem)
915 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
917 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
920 /* Set the register attributes for registers contained in PARM_RTX.
921 Use needed values from memory attributes of MEM. */
924 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
926 if (REG_P (parm_rtx))
927 set_reg_attrs_from_mem (parm_rtx, mem);
928 else if (GET_CODE (parm_rtx) == PARALLEL)
930 /* Check for a NULL entry in the first slot, used to indicate that the
931 parameter goes both on the stack and in registers. */
932 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
933 for (; i < XVECLEN (parm_rtx, 0); i++)
935 rtx x = XVECEXP (parm_rtx, 0, i);
936 if (REG_P (XEXP (x, 0)))
937 REG_ATTRS (XEXP (x, 0))
938 = get_reg_attrs (MEM_EXPR (mem),
939 INTVAL (XEXP (x, 1)));
944 /* Assign the RTX X to declaration T. */
946 set_decl_rtl (tree t, rtx x)
948 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
952 /* For register, we maintain the reverse information too. */
954 REG_ATTRS (x) = get_reg_attrs (t, 0);
955 else if (GET_CODE (x) == SUBREG)
956 REG_ATTRS (SUBREG_REG (x))
957 = get_reg_attrs (t, -SUBREG_BYTE (x));
958 if (GET_CODE (x) == CONCAT)
960 if (REG_P (XEXP (x, 0)))
961 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
962 if (REG_P (XEXP (x, 1)))
963 REG_ATTRS (XEXP (x, 1))
964 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
966 if (GET_CODE (x) == PARALLEL)
969 for (i = 0; i < XVECLEN (x, 0); i++)
971 rtx y = XVECEXP (x, 0, i);
972 if (REG_P (XEXP (y, 0)))
973 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
978 /* Assign the RTX X to parameter declaration T. */
980 set_decl_incoming_rtl (tree t, rtx x)
982 DECL_INCOMING_RTL (t) = x;
986 /* For register, we maintain the reverse information too. */
988 REG_ATTRS (x) = get_reg_attrs (t, 0);
989 else if (GET_CODE (x) == SUBREG)
990 REG_ATTRS (SUBREG_REG (x))
991 = get_reg_attrs (t, -SUBREG_BYTE (x));
992 if (GET_CODE (x) == CONCAT)
994 if (REG_P (XEXP (x, 0)))
995 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
996 if (REG_P (XEXP (x, 1)))
997 REG_ATTRS (XEXP (x, 1))
998 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1000 if (GET_CODE (x) == PARALLEL)
1004 /* Check for a NULL entry, used to indicate that the parameter goes
1005 both on the stack and in registers. */
1006 if (XEXP (XVECEXP (x, 0, 0), 0))
1011 for (i = start; i < XVECLEN (x, 0); i++)
1013 rtx y = XVECEXP (x, 0, i);
1014 if (REG_P (XEXP (y, 0)))
1015 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1020 /* Identify REG (which may be a CONCAT) as a user register. */
1023 mark_user_reg (rtx reg)
1025 if (GET_CODE (reg) == CONCAT)
1027 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1028 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1032 gcc_assert (REG_P (reg));
1033 REG_USERVAR_P (reg) = 1;
1037 /* Identify REG as a probable pointer register and show its alignment
1038 as ALIGN, if nonzero. */
1041 mark_reg_pointer (rtx reg, int align)
1043 if (! REG_POINTER (reg))
1045 REG_POINTER (reg) = 1;
1048 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1050 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1051 /* We can no-longer be sure just how aligned this pointer is. */
1052 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1055 /* Return 1 plus largest pseudo reg number used in the current function. */
1063 /* Return 1 + the largest label number used so far in the current function. */
1066 max_label_num (void)
1071 /* Return first label number used in this function (if any were used). */
1074 get_first_label_num (void)
1076 return first_label_num;
1079 /* If the rtx for label was created during the expansion of a nested
1080 function, then first_label_num won't include this label number.
1081 Fix this now so that array indicies work later. */
1084 maybe_set_first_label_num (rtx x)
1086 if (CODE_LABEL_NUMBER (x) < first_label_num)
1087 first_label_num = CODE_LABEL_NUMBER (x);
1090 /* Return a value representing some low-order bits of X, where the number
1091 of low-order bits is given by MODE. Note that no conversion is done
1092 between floating-point and fixed-point values, rather, the bit
1093 representation is returned.
1095 This function handles the cases in common between gen_lowpart, below,
1096 and two variants in cse.c and combine.c. These are the cases that can
1097 be safely handled at all points in the compilation.
1099 If this is not a case we can handle, return 0. */
1102 gen_lowpart_common (enum machine_mode mode, rtx x)
1104 int msize = GET_MODE_SIZE (mode);
1107 enum machine_mode innermode;
1109 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1110 so we have to make one up. Yuk. */
1111 innermode = GET_MODE (x);
1112 if (GET_CODE (x) == CONST_INT
1113 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1114 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1115 else if (innermode == VOIDmode)
1116 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1118 xsize = GET_MODE_SIZE (innermode);
1120 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1122 if (innermode == mode)
1125 /* MODE must occupy no more words than the mode of X. */
1126 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1127 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1130 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1131 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1134 offset = subreg_lowpart_offset (mode, innermode);
1136 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1137 && (GET_MODE_CLASS (mode) == MODE_INT
1138 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1140 /* If we are getting the low-order part of something that has been
1141 sign- or zero-extended, we can either just use the object being
1142 extended or make a narrower extension. If we want an even smaller
1143 piece than the size of the object being extended, call ourselves
1146 This case is used mostly by combine and cse. */
1148 if (GET_MODE (XEXP (x, 0)) == mode)
1150 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1151 return gen_lowpart_common (mode, XEXP (x, 0));
1152 else if (msize < xsize)
1153 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1155 else if (GET_CODE (x) == SUBREG || REG_P (x)
1156 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1157 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1158 return simplify_gen_subreg (mode, x, innermode, offset);
1160 /* Otherwise, we can't do this. */
1165 gen_highpart (enum machine_mode mode, rtx x)
1167 unsigned int msize = GET_MODE_SIZE (mode);
1170 /* This case loses if X is a subreg. To catch bugs early,
1171 complain if an invalid MODE is used even in other cases. */
1172 gcc_assert (msize <= UNITS_PER_WORD
1173 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1175 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1176 subreg_highpart_offset (mode, GET_MODE (x)));
1177 gcc_assert (result);
1179 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1180 the target if we have a MEM. gen_highpart must return a valid operand,
1181 emitting code if necessary to do so. */
1184 result = validize_mem (result);
1185 gcc_assert (result);
1191 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1192 be VOIDmode constant. */
1194 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1196 if (GET_MODE (exp) != VOIDmode)
1198 gcc_assert (GET_MODE (exp) == innermode);
1199 return gen_highpart (outermode, exp);
1201 return simplify_gen_subreg (outermode, exp, innermode,
1202 subreg_highpart_offset (outermode, innermode));
1205 /* Return offset in bytes to get OUTERMODE low part
1206 of the value in mode INNERMODE stored in memory in target format. */
1209 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1211 unsigned int offset = 0;
1212 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1216 if (WORDS_BIG_ENDIAN)
1217 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1218 if (BYTES_BIG_ENDIAN)
1219 offset += difference % UNITS_PER_WORD;
1225 /* Return offset in bytes to get OUTERMODE high part
1226 of the value in mode INNERMODE stored in memory in target format. */
1228 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1230 unsigned int offset = 0;
1231 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1233 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1237 if (! WORDS_BIG_ENDIAN)
1238 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1239 if (! BYTES_BIG_ENDIAN)
1240 offset += difference % UNITS_PER_WORD;
1246 /* Return 1 iff X, assumed to be a SUBREG,
1247 refers to the least significant part of its containing reg.
1248 If X is not a SUBREG, always return 1 (it is its own low part!). */
1251 subreg_lowpart_p (rtx x)
1253 if (GET_CODE (x) != SUBREG)
1255 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1258 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1259 == SUBREG_BYTE (x));
1262 /* Return subword OFFSET of operand OP.
1263 The word number, OFFSET, is interpreted as the word number starting
1264 at the low-order address. OFFSET 0 is the low-order word if not
1265 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1267 If we cannot extract the required word, we return zero. Otherwise,
1268 an rtx corresponding to the requested word will be returned.
1270 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1271 reload has completed, a valid address will always be returned. After
1272 reload, if a valid address cannot be returned, we return zero.
1274 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1275 it is the responsibility of the caller.
1277 MODE is the mode of OP in case it is a CONST_INT.
1279 ??? This is still rather broken for some cases. The problem for the
1280 moment is that all callers of this thing provide no 'goal mode' to
1281 tell us to work with. This exists because all callers were written
1282 in a word based SUBREG world.
1283 Now use of this function can be deprecated by simplify_subreg in most
1288 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1290 if (mode == VOIDmode)
1291 mode = GET_MODE (op);
1293 gcc_assert (mode != VOIDmode);
1295 /* If OP is narrower than a word, fail. */
1297 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1300 /* If we want a word outside OP, return zero. */
1302 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1305 /* Form a new MEM at the requested address. */
1308 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1310 if (! validate_address)
1313 else if (reload_completed)
1315 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1319 return replace_equiv_address (new, XEXP (new, 0));
1322 /* Rest can be handled by simplify_subreg. */
1323 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1326 /* Similar to `operand_subword', but never return 0. If we can't
1327 extract the required subword, put OP into a register and try again.
1328 The second attempt must succeed. We always validate the address in
1331 MODE is the mode of OP, in case it is CONST_INT. */
1334 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1336 rtx result = operand_subword (op, offset, 1, mode);
1341 if (mode != BLKmode && mode != VOIDmode)
1343 /* If this is a register which can not be accessed by words, copy it
1344 to a pseudo register. */
1346 op = copy_to_reg (op);
1348 op = force_reg (mode, op);
1351 result = operand_subword (op, offset, 1, mode);
1352 gcc_assert (result);
1357 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1358 or (2) a component ref of something variable. Represent the later with
1359 a NULL expression. */
1362 component_ref_for_mem_expr (tree ref)
1364 tree inner = TREE_OPERAND (ref, 0);
1366 if (TREE_CODE (inner) == COMPONENT_REF)
1367 inner = component_ref_for_mem_expr (inner);
1370 /* Now remove any conversions: they don't change what the underlying
1371 object is. Likewise for SAVE_EXPR. */
1372 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1373 || TREE_CODE (inner) == NON_LVALUE_EXPR
1374 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1375 || TREE_CODE (inner) == SAVE_EXPR)
1376 inner = TREE_OPERAND (inner, 0);
1378 if (! DECL_P (inner))
1382 if (inner == TREE_OPERAND (ref, 0))
1385 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1386 TREE_OPERAND (ref, 1), NULL_TREE);
1389 /* Returns 1 if both MEM_EXPR can be considered equal
1393 mem_expr_equal_p (tree expr1, tree expr2)
1398 if (! expr1 || ! expr2)
1401 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1404 if (TREE_CODE (expr1) == COMPONENT_REF)
1406 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1407 TREE_OPERAND (expr2, 0))
1408 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1409 TREE_OPERAND (expr2, 1));
1411 if (INDIRECT_REF_P (expr1))
1412 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1413 TREE_OPERAND (expr2, 0));
1415 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1416 have been resolved here. */
1417 gcc_assert (DECL_P (expr1));
1419 /* Decls with different pointers can't be equal. */
1423 /* Given REF, a MEM, and T, either the type of X or the expression
1424 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1425 if we are making a new object of this type. BITPOS is nonzero if
1426 there is an offset outstanding on T that will be applied later. */
1429 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1430 HOST_WIDE_INT bitpos)
1432 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1433 tree expr = MEM_EXPR (ref);
1434 rtx offset = MEM_OFFSET (ref);
1435 rtx size = MEM_SIZE (ref);
1436 unsigned int align = MEM_ALIGN (ref);
1437 HOST_WIDE_INT apply_bitpos = 0;
1440 /* It can happen that type_for_mode was given a mode for which there
1441 is no language-level type. In which case it returns NULL, which
1446 type = TYPE_P (t) ? t : TREE_TYPE (t);
1447 if (type == error_mark_node)
1450 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1451 wrong answer, as it assumes that DECL_RTL already has the right alias
1452 info. Callers should not set DECL_RTL until after the call to
1453 set_mem_attributes. */
1454 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1456 /* Get the alias set from the expression or type (perhaps using a
1457 front-end routine) and use it. */
1458 alias = get_alias_set (t);
1460 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1461 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1462 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1464 /* If we are making an object of this type, or if this is a DECL, we know
1465 that it is a scalar if the type is not an aggregate. */
1466 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1467 MEM_SCALAR_P (ref) = 1;
1469 /* We can set the alignment from the type if we are making an object,
1470 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1471 if (objectp || TREE_CODE (t) == INDIRECT_REF
1472 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1473 || TYPE_ALIGN_OK (type))
1474 align = MAX (align, TYPE_ALIGN (type));
1476 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1478 if (integer_zerop (TREE_OPERAND (t, 1)))
1479 /* We don't know anything about the alignment. */
1480 align = BITS_PER_UNIT;
1482 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1485 /* If the size is known, we can set that. */
1486 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1487 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1489 /* If T is not a type, we may be able to deduce some more information about
1495 if (TREE_THIS_VOLATILE (t))
1496 MEM_VOLATILE_P (ref) = 1;
1498 /* Now remove any conversions: they don't change what the underlying
1499 object is. Likewise for SAVE_EXPR. */
1500 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1501 || TREE_CODE (t) == NON_LVALUE_EXPR
1502 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1503 || TREE_CODE (t) == SAVE_EXPR)
1504 t = TREE_OPERAND (t, 0);
1506 /* We may look through structure-like accesses for the purposes of
1507 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1509 while (TREE_CODE (base) == COMPONENT_REF
1510 || TREE_CODE (base) == REALPART_EXPR
1511 || TREE_CODE (base) == IMAGPART_EXPR
1512 || TREE_CODE (base) == BIT_FIELD_REF)
1513 base = TREE_OPERAND (base, 0);
1517 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1518 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1520 MEM_NOTRAP_P (ref) = 1;
1523 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1525 base = get_base_address (base);
1526 if (base && DECL_P (base)
1527 && TREE_READONLY (base)
1528 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1530 tree base_type = TREE_TYPE (base);
1531 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1532 || DECL_ARTIFICIAL (base));
1533 MEM_READONLY_P (ref) = 1;
1536 /* If this expression uses it's parent's alias set, mark it such
1537 that we won't change it. */
1538 if (component_uses_parent_alias_set (t))
1539 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1541 /* If this is a decl, set the attributes of the MEM from it. */
1545 offset = const0_rtx;
1546 apply_bitpos = bitpos;
1547 size = (DECL_SIZE_UNIT (t)
1548 && host_integerp (DECL_SIZE_UNIT (t), 1)
1549 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1550 align = DECL_ALIGN (t);
1553 /* If this is a constant, we know the alignment. */
1554 else if (CONSTANT_CLASS_P (t))
1556 align = TYPE_ALIGN (type);
1557 #ifdef CONSTANT_ALIGNMENT
1558 align = CONSTANT_ALIGNMENT (t, align);
1562 /* If this is a field reference and not a bit-field, record it. */
1563 /* ??? There is some information that can be gleened from bit-fields,
1564 such as the word offset in the structure that might be modified.
1565 But skip it for now. */
1566 else if (TREE_CODE (t) == COMPONENT_REF
1567 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1569 expr = component_ref_for_mem_expr (t);
1570 offset = const0_rtx;
1571 apply_bitpos = bitpos;
1572 /* ??? Any reason the field size would be different than
1573 the size we got from the type? */
1576 /* If this is an array reference, look for an outer field reference. */
1577 else if (TREE_CODE (t) == ARRAY_REF)
1579 tree off_tree = size_zero_node;
1580 /* We can't modify t, because we use it at the end of the
1586 tree index = TREE_OPERAND (t2, 1);
1587 tree low_bound = array_ref_low_bound (t2);
1588 tree unit_size = array_ref_element_size (t2);
1590 /* We assume all arrays have sizes that are a multiple of a byte.
1591 First subtract the lower bound, if any, in the type of the
1592 index, then convert to sizetype and multiply by the size of
1593 the array element. */
1594 if (! integer_zerop (low_bound))
1595 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1598 off_tree = size_binop (PLUS_EXPR,
1599 size_binop (MULT_EXPR, convert (sizetype,
1603 t2 = TREE_OPERAND (t2, 0);
1605 while (TREE_CODE (t2) == ARRAY_REF);
1611 if (host_integerp (off_tree, 1))
1613 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1614 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1615 align = DECL_ALIGN (t2);
1616 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1618 offset = GEN_INT (ioff);
1619 apply_bitpos = bitpos;
1622 else if (TREE_CODE (t2) == COMPONENT_REF)
1624 expr = component_ref_for_mem_expr (t2);
1625 if (host_integerp (off_tree, 1))
1627 offset = GEN_INT (tree_low_cst (off_tree, 1));
1628 apply_bitpos = bitpos;
1630 /* ??? Any reason the field size would be different than
1631 the size we got from the type? */
1633 else if (flag_argument_noalias > 1
1634 && (INDIRECT_REF_P (t2))
1635 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1642 /* If this is a Fortran indirect argument reference, record the
1644 else if (flag_argument_noalias > 1
1645 && (INDIRECT_REF_P (t))
1646 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1653 /* If we modified OFFSET based on T, then subtract the outstanding
1654 bit position offset. Similarly, increase the size of the accessed
1655 object to contain the negative offset. */
1658 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1660 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1663 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1665 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1666 we're overlapping. */
1671 /* Now set the attributes we computed above. */
1673 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1675 /* If this is already known to be a scalar or aggregate, we are done. */
1676 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1679 /* If it is a reference into an aggregate, this is part of an aggregate.
1680 Otherwise we don't know. */
1681 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1682 || TREE_CODE (t) == ARRAY_RANGE_REF
1683 || TREE_CODE (t) == BIT_FIELD_REF)
1684 MEM_IN_STRUCT_P (ref) = 1;
1688 set_mem_attributes (rtx ref, tree t, int objectp)
1690 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1693 /* Set the decl for MEM to DECL. */
1696 set_mem_attrs_from_reg (rtx mem, rtx reg)
1699 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1700 GEN_INT (REG_OFFSET (reg)),
1701 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1704 /* Set the alias set of MEM to SET. */
1707 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1709 #ifdef ENABLE_CHECKING
1710 /* If the new and old alias sets don't conflict, something is wrong. */
1711 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1714 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1715 MEM_SIZE (mem), MEM_ALIGN (mem),
1719 /* Set the alignment of MEM to ALIGN bits. */
1722 set_mem_align (rtx mem, unsigned int align)
1724 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1725 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1729 /* Set the expr for MEM to EXPR. */
1732 set_mem_expr (rtx mem, tree expr)
1735 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1736 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1739 /* Set the offset of MEM to OFFSET. */
1742 set_mem_offset (rtx mem, rtx offset)
1744 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1745 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1749 /* Set the size of MEM to SIZE. */
1752 set_mem_size (rtx mem, rtx size)
1754 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1755 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1759 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1760 and its address changed to ADDR. (VOIDmode means don't change the mode.
1761 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1762 returned memory location is required to be valid. The memory
1763 attributes are not changed. */
1766 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1770 gcc_assert (MEM_P (memref));
1771 if (mode == VOIDmode)
1772 mode = GET_MODE (memref);
1774 addr = XEXP (memref, 0);
1775 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1776 && (!validate || memory_address_p (mode, addr)))
1781 if (reload_in_progress || reload_completed)
1782 gcc_assert (memory_address_p (mode, addr));
1784 addr = memory_address (mode, addr);
1787 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1790 new = gen_rtx_MEM (mode, addr);
1791 MEM_COPY_ATTRIBUTES (new, memref);
1795 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1796 way we are changing MEMREF, so we only preserve the alias set. */
1799 change_address (rtx memref, enum machine_mode mode, rtx addr)
1801 rtx new = change_address_1 (memref, mode, addr, 1), size;
1802 enum machine_mode mmode = GET_MODE (new);
1805 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1806 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1808 /* If there are no changes, just return the original memory reference. */
1811 if (MEM_ATTRS (memref) == 0
1812 || (MEM_EXPR (memref) == NULL
1813 && MEM_OFFSET (memref) == NULL
1814 && MEM_SIZE (memref) == size
1815 && MEM_ALIGN (memref) == align))
1818 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1819 MEM_COPY_ATTRIBUTES (new, memref);
1823 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1828 /* Return a memory reference like MEMREF, but with its mode changed
1829 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1830 nonzero, the memory address is forced to be valid.
1831 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1832 and caller is responsible for adjusting MEMREF base register. */
1835 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1836 int validate, int adjust)
1838 rtx addr = XEXP (memref, 0);
1840 rtx memoffset = MEM_OFFSET (memref);
1842 unsigned int memalign = MEM_ALIGN (memref);
1844 /* If there are no changes, just return the original memory reference. */
1845 if (mode == GET_MODE (memref) && !offset
1846 && (!validate || memory_address_p (mode, addr)))
1849 /* ??? Prefer to create garbage instead of creating shared rtl.
1850 This may happen even if offset is nonzero -- consider
1851 (plus (plus reg reg) const_int) -- so do this always. */
1852 addr = copy_rtx (addr);
1856 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1857 object, we can merge it into the LO_SUM. */
1858 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1860 && (unsigned HOST_WIDE_INT) offset
1861 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1862 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1863 plus_constant (XEXP (addr, 1), offset));
1865 addr = plus_constant (addr, offset);
1868 new = change_address_1 (memref, mode, addr, validate);
1870 /* Compute the new values of the memory attributes due to this adjustment.
1871 We add the offsets and update the alignment. */
1873 memoffset = GEN_INT (offset + INTVAL (memoffset));
1875 /* Compute the new alignment by taking the MIN of the alignment and the
1876 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1881 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1883 /* We can compute the size in a number of ways. */
1884 if (GET_MODE (new) != BLKmode)
1885 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1886 else if (MEM_SIZE (memref))
1887 size = plus_constant (MEM_SIZE (memref), -offset);
1889 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1890 memoffset, size, memalign, GET_MODE (new));
1892 /* At some point, we should validate that this offset is within the object,
1893 if all the appropriate values are known. */
1897 /* Return a memory reference like MEMREF, but with its mode changed
1898 to MODE and its address changed to ADDR, which is assumed to be
1899 MEMREF offseted by OFFSET bytes. If VALIDATE is
1900 nonzero, the memory address is forced to be valid. */
1903 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1904 HOST_WIDE_INT offset, int validate)
1906 memref = change_address_1 (memref, VOIDmode, addr, validate);
1907 return adjust_address_1 (memref, mode, offset, validate, 0);
1910 /* Return a memory reference like MEMREF, but whose address is changed by
1911 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1912 known to be in OFFSET (possibly 1). */
1915 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1917 rtx new, addr = XEXP (memref, 0);
1919 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1921 /* At this point we don't know _why_ the address is invalid. It
1922 could have secondary memory references, multiplies or anything.
1924 However, if we did go and rearrange things, we can wind up not
1925 being able to recognize the magic around pic_offset_table_rtx.
1926 This stuff is fragile, and is yet another example of why it is
1927 bad to expose PIC machinery too early. */
1928 if (! memory_address_p (GET_MODE (memref), new)
1929 && GET_CODE (addr) == PLUS
1930 && XEXP (addr, 0) == pic_offset_table_rtx)
1932 addr = force_reg (GET_MODE (addr), addr);
1933 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1936 update_temp_slot_address (XEXP (memref, 0), new);
1937 new = change_address_1 (memref, VOIDmode, new, 1);
1939 /* If there are no changes, just return the original memory reference. */
1943 /* Update the alignment to reflect the offset. Reset the offset, which
1946 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1947 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1952 /* Return a memory reference like MEMREF, but with its address changed to
1953 ADDR. The caller is asserting that the actual piece of memory pointed
1954 to is the same, just the form of the address is being changed, such as
1955 by putting something into a register. */
1958 replace_equiv_address (rtx memref, rtx addr)
1960 /* change_address_1 copies the memory attribute structure without change
1961 and that's exactly what we want here. */
1962 update_temp_slot_address (XEXP (memref, 0), addr);
1963 return change_address_1 (memref, VOIDmode, addr, 1);
1966 /* Likewise, but the reference is not required to be valid. */
1969 replace_equiv_address_nv (rtx memref, rtx addr)
1971 return change_address_1 (memref, VOIDmode, addr, 0);
1974 /* Return a memory reference like MEMREF, but with its mode widened to
1975 MODE and offset by OFFSET. This would be used by targets that e.g.
1976 cannot issue QImode memory operations and have to use SImode memory
1977 operations plus masking logic. */
1980 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
1982 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
1983 tree expr = MEM_EXPR (new);
1984 rtx memoffset = MEM_OFFSET (new);
1985 unsigned int size = GET_MODE_SIZE (mode);
1987 /* If there are no changes, just return the original memory reference. */
1991 /* If we don't know what offset we were at within the expression, then
1992 we can't know if we've overstepped the bounds. */
1998 if (TREE_CODE (expr) == COMPONENT_REF)
2000 tree field = TREE_OPERAND (expr, 1);
2001 tree offset = component_ref_field_offset (expr);
2003 if (! DECL_SIZE_UNIT (field))
2009 /* Is the field at least as large as the access? If so, ok,
2010 otherwise strip back to the containing structure. */
2011 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2012 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2013 && INTVAL (memoffset) >= 0)
2016 if (! host_integerp (offset, 1))
2022 expr = TREE_OPERAND (expr, 0);
2024 = (GEN_INT (INTVAL (memoffset)
2025 + tree_low_cst (offset, 1)
2026 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2029 /* Similarly for the decl. */
2030 else if (DECL_P (expr)
2031 && DECL_SIZE_UNIT (expr)
2032 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2033 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2034 && (! memoffset || INTVAL (memoffset) >= 0))
2038 /* The widened memory access overflows the expression, which means
2039 that it could alias another expression. Zap it. */
2046 memoffset = NULL_RTX;
2048 /* The widened memory may alias other stuff, so zap the alias set. */
2049 /* ??? Maybe use get_alias_set on any remaining expression. */
2051 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2052 MEM_ALIGN (new), mode);
2057 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2060 gen_label_rtx (void)
2062 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2063 NULL, label_num++, NULL);
2066 /* For procedure integration. */
2068 /* Install new pointers to the first and last insns in the chain.
2069 Also, set cur_insn_uid to one higher than the last in use.
2070 Used for an inline-procedure after copying the insn chain. */
2073 set_new_first_and_last_insn (rtx first, rtx last)
2081 for (insn = first; insn; insn = NEXT_INSN (insn))
2082 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2087 /* Go through all the RTL insn bodies and copy any invalid shared
2088 structure. This routine should only be called once. */
2091 unshare_all_rtl_1 (tree fndecl, rtx insn)
2095 /* Make sure that virtual parameters are not shared. */
2096 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2097 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2099 /* Make sure that virtual stack slots are not shared. */
2100 unshare_all_decls (DECL_INITIAL (fndecl));
2102 /* Unshare just about everything else. */
2103 unshare_all_rtl_in_chain (insn);
2105 /* Make sure the addresses of stack slots found outside the insn chain
2106 (such as, in DECL_RTL of a variable) are not shared
2107 with the insn chain.
2109 This special care is necessary when the stack slot MEM does not
2110 actually appear in the insn chain. If it does appear, its address
2111 is unshared from all else at that point. */
2112 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2115 /* Go through all the RTL insn bodies and copy any invalid shared
2116 structure, again. This is a fairly expensive thing to do so it
2117 should be done sparingly. */
2120 unshare_all_rtl_again (rtx insn)
2125 for (p = insn; p; p = NEXT_INSN (p))
2128 reset_used_flags (PATTERN (p));
2129 reset_used_flags (REG_NOTES (p));
2130 reset_used_flags (LOG_LINKS (p));
2133 /* Make sure that virtual stack slots are not shared. */
2134 reset_used_decls (DECL_INITIAL (cfun->decl));
2136 /* Make sure that virtual parameters are not shared. */
2137 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2138 reset_used_flags (DECL_RTL (decl));
2140 reset_used_flags (stack_slot_list);
2142 unshare_all_rtl_1 (cfun->decl, insn);
2146 unshare_all_rtl (void)
2148 unshare_all_rtl_1 (current_function_decl, get_insns ());
2151 struct tree_opt_pass pass_unshare_all_rtl =
2153 "unshare", /* name */
2155 unshare_all_rtl, /* execute */
2158 0, /* static_pass_number */
2160 0, /* properties_required */
2161 0, /* properties_provided */
2162 0, /* properties_destroyed */
2163 0, /* todo_flags_start */
2164 TODO_dump_func, /* todo_flags_finish */
2169 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2170 Recursively does the same for subexpressions. */
2173 verify_rtx_sharing (rtx orig, rtx insn)
2178 const char *format_ptr;
2183 code = GET_CODE (x);
2185 /* These types may be freely shared. */
2200 /* SCRATCH must be shared because they represent distinct values. */
2202 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2207 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2208 a LABEL_REF, it isn't sharable. */
2209 if (GET_CODE (XEXP (x, 0)) == PLUS
2210 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2211 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2216 /* A MEM is allowed to be shared if its address is constant. */
2217 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2218 || reload_completed || reload_in_progress)
2227 /* This rtx may not be shared. If it has already been seen,
2228 replace it with a copy of itself. */
2229 #ifdef ENABLE_CHECKING
2230 if (RTX_FLAG (x, used))
2232 error ("invalid rtl sharing found in the insn");
2234 error ("shared rtx");
2236 internal_error ("internal consistency failure");
2239 gcc_assert (!RTX_FLAG (x, used));
2241 RTX_FLAG (x, used) = 1;
2243 /* Now scan the subexpressions recursively. */
2245 format_ptr = GET_RTX_FORMAT (code);
2247 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2249 switch (*format_ptr++)
2252 verify_rtx_sharing (XEXP (x, i), insn);
2256 if (XVEC (x, i) != NULL)
2259 int len = XVECLEN (x, i);
2261 for (j = 0; j < len; j++)
2263 /* We allow sharing of ASM_OPERANDS inside single
2265 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2266 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2268 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2270 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2279 /* Go through all the RTL insn bodies and check that there is no unexpected
2280 sharing in between the subexpressions. */
2283 verify_rtl_sharing (void)
2287 for (p = get_insns (); p; p = NEXT_INSN (p))
2290 reset_used_flags (PATTERN (p));
2291 reset_used_flags (REG_NOTES (p));
2292 reset_used_flags (LOG_LINKS (p));
2295 for (p = get_insns (); p; p = NEXT_INSN (p))
2298 verify_rtx_sharing (PATTERN (p), p);
2299 verify_rtx_sharing (REG_NOTES (p), p);
2300 verify_rtx_sharing (LOG_LINKS (p), p);
2304 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2305 Assumes the mark bits are cleared at entry. */
2308 unshare_all_rtl_in_chain (rtx insn)
2310 for (; insn; insn = NEXT_INSN (insn))
2313 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2314 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2315 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2319 /* Go through all virtual stack slots of a function and copy any
2320 shared structure. */
2322 unshare_all_decls (tree blk)
2326 /* Copy shared decls. */
2327 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2328 if (DECL_RTL_SET_P (t))
2329 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2331 /* Now process sub-blocks. */
2332 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2333 unshare_all_decls (t);
2336 /* Go through all virtual stack slots of a function and mark them as
2339 reset_used_decls (tree blk)
2344 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2345 if (DECL_RTL_SET_P (t))
2346 reset_used_flags (DECL_RTL (t));
2348 /* Now process sub-blocks. */
2349 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2350 reset_used_decls (t);
2353 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2354 Recursively does the same for subexpressions. Uses
2355 copy_rtx_if_shared_1 to reduce stack space. */
2358 copy_rtx_if_shared (rtx orig)
2360 copy_rtx_if_shared_1 (&orig);
2364 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2365 use. Recursively does the same for subexpressions. */
2368 copy_rtx_if_shared_1 (rtx *orig1)
2374 const char *format_ptr;
2378 /* Repeat is used to turn tail-recursion into iteration. */
2385 code = GET_CODE (x);
2387 /* These types may be freely shared. */
2401 /* SCRATCH must be shared because they represent distinct values. */
2404 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2409 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2410 a LABEL_REF, it isn't sharable. */
2411 if (GET_CODE (XEXP (x, 0)) == PLUS
2412 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2413 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2422 /* The chain of insns is not being copied. */
2429 /* This rtx may not be shared. If it has already been seen,
2430 replace it with a copy of itself. */
2432 if (RTX_FLAG (x, used))
2434 x = shallow_copy_rtx (x);
2437 RTX_FLAG (x, used) = 1;
2439 /* Now scan the subexpressions recursively.
2440 We can store any replaced subexpressions directly into X
2441 since we know X is not shared! Any vectors in X
2442 must be copied if X was copied. */
2444 format_ptr = GET_RTX_FORMAT (code);
2445 length = GET_RTX_LENGTH (code);
2448 for (i = 0; i < length; i++)
2450 switch (*format_ptr++)
2454 copy_rtx_if_shared_1 (last_ptr);
2455 last_ptr = &XEXP (x, i);
2459 if (XVEC (x, i) != NULL)
2462 int len = XVECLEN (x, i);
2464 /* Copy the vector iff I copied the rtx and the length
2466 if (copied && len > 0)
2467 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2469 /* Call recursively on all inside the vector. */
2470 for (j = 0; j < len; j++)
2473 copy_rtx_if_shared_1 (last_ptr);
2474 last_ptr = &XVECEXP (x, i, j);
2489 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2490 to look for shared sub-parts. */
2493 reset_used_flags (rtx x)
2497 const char *format_ptr;
2500 /* Repeat is used to turn tail-recursion into iteration. */
2505 code = GET_CODE (x);
2507 /* These types may be freely shared so we needn't do any resetting
2528 /* The chain of insns is not being copied. */
2535 RTX_FLAG (x, used) = 0;
2537 format_ptr = GET_RTX_FORMAT (code);
2538 length = GET_RTX_LENGTH (code);
2540 for (i = 0; i < length; i++)
2542 switch (*format_ptr++)
2550 reset_used_flags (XEXP (x, i));
2554 for (j = 0; j < XVECLEN (x, i); j++)
2555 reset_used_flags (XVECEXP (x, i, j));
2561 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2562 to look for shared sub-parts. */
2565 set_used_flags (rtx x)
2569 const char *format_ptr;
2574 code = GET_CODE (x);
2576 /* These types may be freely shared so we needn't do any resetting
2597 /* The chain of insns is not being copied. */
2604 RTX_FLAG (x, used) = 1;
2606 format_ptr = GET_RTX_FORMAT (code);
2607 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2609 switch (*format_ptr++)
2612 set_used_flags (XEXP (x, i));
2616 for (j = 0; j < XVECLEN (x, i); j++)
2617 set_used_flags (XVECEXP (x, i, j));
2623 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2624 Return X or the rtx for the pseudo reg the value of X was copied into.
2625 OTHER must be valid as a SET_DEST. */
2628 make_safe_from (rtx x, rtx other)
2631 switch (GET_CODE (other))
2634 other = SUBREG_REG (other);
2636 case STRICT_LOW_PART:
2639 other = XEXP (other, 0);
2648 && GET_CODE (x) != SUBREG)
2650 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2651 || reg_mentioned_p (other, x))))
2653 rtx temp = gen_reg_rtx (GET_MODE (x));
2654 emit_move_insn (temp, x);
2660 /* Emission of insns (adding them to the doubly-linked list). */
2662 /* Return the first insn of the current sequence or current function. */
2670 /* Specify a new insn as the first in the chain. */
2673 set_first_insn (rtx insn)
2675 gcc_assert (!PREV_INSN (insn));
2679 /* Return the last insn emitted in current sequence or current function. */
2682 get_last_insn (void)
2687 /* Specify a new insn as the last in the chain. */
2690 set_last_insn (rtx insn)
2692 gcc_assert (!NEXT_INSN (insn));
2696 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2699 get_last_insn_anywhere (void)
2701 struct sequence_stack *stack;
2704 for (stack = seq_stack; stack; stack = stack->next)
2705 if (stack->last != 0)
2710 /* Return the first nonnote insn emitted in current sequence or current
2711 function. This routine looks inside SEQUENCEs. */
2714 get_first_nonnote_insn (void)
2716 rtx insn = first_insn;
2721 for (insn = next_insn (insn);
2722 insn && NOTE_P (insn);
2723 insn = next_insn (insn))
2727 if (NONJUMP_INSN_P (insn)
2728 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2729 insn = XVECEXP (PATTERN (insn), 0, 0);
2736 /* Return the last nonnote insn emitted in current sequence or current
2737 function. This routine looks inside SEQUENCEs. */
2740 get_last_nonnote_insn (void)
2742 rtx insn = last_insn;
2747 for (insn = previous_insn (insn);
2748 insn && NOTE_P (insn);
2749 insn = previous_insn (insn))
2753 if (NONJUMP_INSN_P (insn)
2754 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2755 insn = XVECEXP (PATTERN (insn), 0,
2756 XVECLEN (PATTERN (insn), 0) - 1);
2763 /* Return a number larger than any instruction's uid in this function. */
2768 return cur_insn_uid;
2771 /* Renumber instructions so that no instruction UIDs are wasted. */
2774 renumber_insns (void)
2778 /* If we're not supposed to renumber instructions, don't. */
2779 if (!flag_renumber_insns)
2782 /* If there aren't that many instructions, then it's not really
2783 worth renumbering them. */
2784 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2789 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2792 fprintf (dump_file, "Renumbering insn %d to %d\n",
2793 INSN_UID (insn), cur_insn_uid);
2794 INSN_UID (insn) = cur_insn_uid++;
2798 /* Return the next insn. If it is a SEQUENCE, return the first insn
2802 next_insn (rtx insn)
2806 insn = NEXT_INSN (insn);
2807 if (insn && NONJUMP_INSN_P (insn)
2808 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2809 insn = XVECEXP (PATTERN (insn), 0, 0);
2815 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2819 previous_insn (rtx insn)
2823 insn = PREV_INSN (insn);
2824 if (insn && NONJUMP_INSN_P (insn)
2825 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2826 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2832 /* Return the next insn after INSN that is not a NOTE. This routine does not
2833 look inside SEQUENCEs. */
2836 next_nonnote_insn (rtx insn)
2840 insn = NEXT_INSN (insn);
2841 if (insn == 0 || !NOTE_P (insn))
2848 /* Return the previous insn before INSN that is not a NOTE. This routine does
2849 not look inside SEQUENCEs. */
2852 prev_nonnote_insn (rtx insn)
2856 insn = PREV_INSN (insn);
2857 if (insn == 0 || !NOTE_P (insn))
2864 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2865 or 0, if there is none. This routine does not look inside
2869 next_real_insn (rtx insn)
2873 insn = NEXT_INSN (insn);
2874 if (insn == 0 || INSN_P (insn))
2881 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2882 or 0, if there is none. This routine does not look inside
2886 prev_real_insn (rtx insn)
2890 insn = PREV_INSN (insn);
2891 if (insn == 0 || INSN_P (insn))
2898 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2899 This routine does not look inside SEQUENCEs. */
2902 last_call_insn (void)
2906 for (insn = get_last_insn ();
2907 insn && !CALL_P (insn);
2908 insn = PREV_INSN (insn))
2914 /* Find the next insn after INSN that really does something. This routine
2915 does not look inside SEQUENCEs. Until reload has completed, this is the
2916 same as next_real_insn. */
2919 active_insn_p (rtx insn)
2921 return (CALL_P (insn) || JUMP_P (insn)
2922 || (NONJUMP_INSN_P (insn)
2923 && (! reload_completed
2924 || (GET_CODE (PATTERN (insn)) != USE
2925 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2929 next_active_insn (rtx insn)
2933 insn = NEXT_INSN (insn);
2934 if (insn == 0 || active_insn_p (insn))
2941 /* Find the last insn before INSN that really does something. This routine
2942 does not look inside SEQUENCEs. Until reload has completed, this is the
2943 same as prev_real_insn. */
2946 prev_active_insn (rtx insn)
2950 insn = PREV_INSN (insn);
2951 if (insn == 0 || active_insn_p (insn))
2958 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2961 next_label (rtx insn)
2965 insn = NEXT_INSN (insn);
2966 if (insn == 0 || LABEL_P (insn))
2973 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2976 prev_label (rtx insn)
2980 insn = PREV_INSN (insn);
2981 if (insn == 0 || LABEL_P (insn))
2988 /* Return the last label to mark the same position as LABEL. Return null
2989 if LABEL itself is null. */
2992 skip_consecutive_labels (rtx label)
2996 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3004 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3005 and REG_CC_USER notes so we can find it. */
3008 link_cc0_insns (rtx insn)
3010 rtx user = next_nonnote_insn (insn);
3012 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3013 user = XVECEXP (PATTERN (user), 0, 0);
3015 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3017 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3020 /* Return the next insn that uses CC0 after INSN, which is assumed to
3021 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3022 applied to the result of this function should yield INSN).
3024 Normally, this is simply the next insn. However, if a REG_CC_USER note
3025 is present, it contains the insn that uses CC0.
3027 Return 0 if we can't find the insn. */
3030 next_cc0_user (rtx insn)
3032 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3035 return XEXP (note, 0);
3037 insn = next_nonnote_insn (insn);
3038 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3039 insn = XVECEXP (PATTERN (insn), 0, 0);
3041 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3047 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3048 note, it is the previous insn. */
3051 prev_cc0_setter (rtx insn)
3053 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3056 return XEXP (note, 0);
3058 insn = prev_nonnote_insn (insn);
3059 gcc_assert (sets_cc0_p (PATTERN (insn)));
3065 /* Increment the label uses for all labels present in rtx. */
3068 mark_label_nuses (rtx x)
3074 code = GET_CODE (x);
3075 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3076 LABEL_NUSES (XEXP (x, 0))++;
3078 fmt = GET_RTX_FORMAT (code);
3079 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3082 mark_label_nuses (XEXP (x, i));
3083 else if (fmt[i] == 'E')
3084 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3085 mark_label_nuses (XVECEXP (x, i, j));
3090 /* Try splitting insns that can be split for better scheduling.
3091 PAT is the pattern which might split.
3092 TRIAL is the insn providing PAT.
3093 LAST is nonzero if we should return the last insn of the sequence produced.
3095 If this routine succeeds in splitting, it returns the first or last
3096 replacement insn depending on the value of LAST. Otherwise, it
3097 returns TRIAL. If the insn to be returned can be split, it will be. */
3100 try_split (rtx pat, rtx trial, int last)
3102 rtx before = PREV_INSN (trial);
3103 rtx after = NEXT_INSN (trial);
3104 int has_barrier = 0;
3108 rtx insn_last, insn;
3111 if (any_condjump_p (trial)
3112 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3113 split_branch_probability = INTVAL (XEXP (note, 0));
3114 probability = split_branch_probability;
3116 seq = split_insns (pat, trial);
3118 split_branch_probability = -1;
3120 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3121 We may need to handle this specially. */
3122 if (after && BARRIER_P (after))
3125 after = NEXT_INSN (after);
3131 /* Avoid infinite loop if any insn of the result matches
3132 the original pattern. */
3136 if (INSN_P (insn_last)
3137 && rtx_equal_p (PATTERN (insn_last), pat))
3139 if (!NEXT_INSN (insn_last))
3141 insn_last = NEXT_INSN (insn_last);
3145 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3149 mark_jump_label (PATTERN (insn), insn, 0);
3151 if (probability != -1
3152 && any_condjump_p (insn)
3153 && !find_reg_note (insn, REG_BR_PROB, 0))
3155 /* We can preserve the REG_BR_PROB notes only if exactly
3156 one jump is created, otherwise the machine description
3157 is responsible for this step using
3158 split_branch_probability variable. */
3159 gcc_assert (njumps == 1);
3161 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3162 GEN_INT (probability),
3168 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3169 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3172 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3175 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3178 *p = CALL_INSN_FUNCTION_USAGE (trial);
3179 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3183 /* Copy notes, particularly those related to the CFG. */
3184 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3186 switch (REG_NOTE_KIND (note))
3190 while (insn != NULL_RTX)
3193 || (flag_non_call_exceptions && INSN_P (insn)
3194 && may_trap_p (PATTERN (insn))))
3196 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3199 insn = PREV_INSN (insn);
3206 while (insn != NULL_RTX)
3210 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3213 insn = PREV_INSN (insn);
3217 case REG_NON_LOCAL_GOTO:
3219 while (insn != NULL_RTX)
3223 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3226 insn = PREV_INSN (insn);
3235 /* If there are LABELS inside the split insns increment the
3236 usage count so we don't delete the label. */
3237 if (NONJUMP_INSN_P (trial))
3240 while (insn != NULL_RTX)
3242 if (NONJUMP_INSN_P (insn))
3243 mark_label_nuses (PATTERN (insn));
3245 insn = PREV_INSN (insn);
3249 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3251 delete_insn (trial);
3253 emit_barrier_after (tem);
3255 /* Recursively call try_split for each new insn created; by the
3256 time control returns here that insn will be fully split, so
3257 set LAST and continue from the insn after the one returned.
3258 We can't use next_active_insn here since AFTER may be a note.
3259 Ignore deleted insns, which can be occur if not optimizing. */
3260 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3261 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3262 tem = try_split (PATTERN (tem), tem, 1);
3264 /* Return either the first or the last insn, depending on which was
3267 ? (after ? PREV_INSN (after) : last_insn)
3268 : NEXT_INSN (before);
3271 /* Make and return an INSN rtx, initializing all its slots.
3272 Store PATTERN in the pattern slots. */
3275 make_insn_raw (rtx pattern)
3279 insn = rtx_alloc (INSN);
3281 INSN_UID (insn) = cur_insn_uid++;
3282 PATTERN (insn) = pattern;
3283 INSN_CODE (insn) = -1;
3284 LOG_LINKS (insn) = NULL;
3285 REG_NOTES (insn) = NULL;
3286 INSN_LOCATOR (insn) = 0;
3287 BLOCK_FOR_INSN (insn) = NULL;
3289 #ifdef ENABLE_RTL_CHECKING
3292 && (returnjump_p (insn)
3293 || (GET_CODE (insn) == SET
3294 && SET_DEST (insn) == pc_rtx)))
3296 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3304 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3307 make_jump_insn_raw (rtx pattern)
3311 insn = rtx_alloc (JUMP_INSN);
3312 INSN_UID (insn) = cur_insn_uid++;
3314 PATTERN (insn) = pattern;
3315 INSN_CODE (insn) = -1;
3316 LOG_LINKS (insn) = NULL;
3317 REG_NOTES (insn) = NULL;
3318 JUMP_LABEL (insn) = NULL;
3319 INSN_LOCATOR (insn) = 0;
3320 BLOCK_FOR_INSN (insn) = NULL;
3325 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3328 make_call_insn_raw (rtx pattern)
3332 insn = rtx_alloc (CALL_INSN);
3333 INSN_UID (insn) = cur_insn_uid++;
3335 PATTERN (insn) = pattern;
3336 INSN_CODE (insn) = -1;
3337 LOG_LINKS (insn) = NULL;
3338 REG_NOTES (insn) = NULL;
3339 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3340 INSN_LOCATOR (insn) = 0;
3341 BLOCK_FOR_INSN (insn) = NULL;
3346 /* Add INSN to the end of the doubly-linked list.
3347 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3352 PREV_INSN (insn) = last_insn;
3353 NEXT_INSN (insn) = 0;
3355 if (NULL != last_insn)
3356 NEXT_INSN (last_insn) = insn;
3358 if (NULL == first_insn)
3364 /* Add INSN into the doubly-linked list after insn AFTER. This and
3365 the next should be the only functions called to insert an insn once
3366 delay slots have been filled since only they know how to update a
3370 add_insn_after (rtx insn, rtx after)
3372 rtx next = NEXT_INSN (after);
3375 gcc_assert (!optimize || !INSN_DELETED_P (after));
3377 NEXT_INSN (insn) = next;
3378 PREV_INSN (insn) = after;
3382 PREV_INSN (next) = insn;
3383 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3384 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3386 else if (last_insn == after)
3390 struct sequence_stack *stack = seq_stack;
3391 /* Scan all pending sequences too. */
3392 for (; stack; stack = stack->next)
3393 if (after == stack->last)
3402 if (!BARRIER_P (after)
3403 && !BARRIER_P (insn)
3404 && (bb = BLOCK_FOR_INSN (after)))
3406 set_block_for_insn (insn, bb);
3408 bb->flags |= BB_DIRTY;
3409 /* Should not happen as first in the BB is always
3410 either NOTE or LABEL. */
3411 if (BB_END (bb) == after
3412 /* Avoid clobbering of structure when creating new BB. */
3413 && !BARRIER_P (insn)
3415 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3419 NEXT_INSN (after) = insn;
3420 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3422 rtx sequence = PATTERN (after);
3423 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3427 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3428 the previous should be the only functions called to insert an insn once
3429 delay slots have been filled since only they know how to update a
3433 add_insn_before (rtx insn, rtx before)
3435 rtx prev = PREV_INSN (before);
3438 gcc_assert (!optimize || !INSN_DELETED_P (before));
3440 PREV_INSN (insn) = prev;
3441 NEXT_INSN (insn) = before;
3445 NEXT_INSN (prev) = insn;
3446 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3448 rtx sequence = PATTERN (prev);
3449 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3452 else if (first_insn == before)
3456 struct sequence_stack *stack = seq_stack;
3457 /* Scan all pending sequences too. */
3458 for (; stack; stack = stack->next)
3459 if (before == stack->first)
3461 stack->first = insn;
3468 if (!BARRIER_P (before)
3469 && !BARRIER_P (insn)
3470 && (bb = BLOCK_FOR_INSN (before)))
3472 set_block_for_insn (insn, bb);
3474 bb->flags |= BB_DIRTY;
3475 /* Should not happen as first in the BB is always either NOTE or
3477 gcc_assert (BB_HEAD (bb) != insn
3478 /* Avoid clobbering of structure when creating new BB. */
3481 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_BASIC_BLOCK));
3484 PREV_INSN (before) = insn;
3485 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3486 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3489 /* Remove an insn from its doubly-linked list. This function knows how
3490 to handle sequences. */
3492 remove_insn (rtx insn)
3494 rtx next = NEXT_INSN (insn);
3495 rtx prev = PREV_INSN (insn);
3500 NEXT_INSN (prev) = next;
3501 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3503 rtx sequence = PATTERN (prev);
3504 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3507 else if (first_insn == insn)
3511 struct sequence_stack *stack = seq_stack;
3512 /* Scan all pending sequences too. */
3513 for (; stack; stack = stack->next)
3514 if (insn == stack->first)
3516 stack->first = next;
3525 PREV_INSN (next) = prev;
3526 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3527 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3529 else if (last_insn == insn)
3533 struct sequence_stack *stack = seq_stack;
3534 /* Scan all pending sequences too. */
3535 for (; stack; stack = stack->next)
3536 if (insn == stack->last)
3544 if (!BARRIER_P (insn)
3545 && (bb = BLOCK_FOR_INSN (insn)))
3548 bb->flags |= BB_DIRTY;
3549 if (BB_HEAD (bb) == insn)
3551 /* Never ever delete the basic block note without deleting whole
3553 gcc_assert (!NOTE_P (insn));
3554 BB_HEAD (bb) = next;
3556 if (BB_END (bb) == insn)
3561 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3564 add_function_usage_to (rtx call_insn, rtx call_fusage)
3566 gcc_assert (call_insn && CALL_P (call_insn));
3568 /* Put the register usage information on the CALL. If there is already
3569 some usage information, put ours at the end. */
3570 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3574 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3575 link = XEXP (link, 1))
3578 XEXP (link, 1) = call_fusage;
3581 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3584 /* Delete all insns made since FROM.
3585 FROM becomes the new last instruction. */
3588 delete_insns_since (rtx from)
3593 NEXT_INSN (from) = 0;
3597 /* This function is deprecated, please use sequences instead.
3599 Move a consecutive bunch of insns to a different place in the chain.
3600 The insns to be moved are those between FROM and TO.
3601 They are moved to a new position after the insn AFTER.
3602 AFTER must not be FROM or TO or any insn in between.
3604 This function does not know about SEQUENCEs and hence should not be
3605 called after delay-slot filling has been done. */
3608 reorder_insns_nobb (rtx from, rtx to, rtx after)
3610 /* Splice this bunch out of where it is now. */
3611 if (PREV_INSN (from))
3612 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3614 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3615 if (last_insn == to)
3616 last_insn = PREV_INSN (from);
3617 if (first_insn == from)
3618 first_insn = NEXT_INSN (to);
3620 /* Make the new neighbors point to it and it to them. */
3621 if (NEXT_INSN (after))
3622 PREV_INSN (NEXT_INSN (after)) = to;
3624 NEXT_INSN (to) = NEXT_INSN (after);
3625 PREV_INSN (from) = after;
3626 NEXT_INSN (after) = from;
3627 if (after == last_insn)
3631 /* Same as function above, but take care to update BB boundaries. */
3633 reorder_insns (rtx from, rtx to, rtx after)
3635 rtx prev = PREV_INSN (from);
3636 basic_block bb, bb2;
3638 reorder_insns_nobb (from, to, after);
3640 if (!BARRIER_P (after)
3641 && (bb = BLOCK_FOR_INSN (after)))
3644 bb->flags |= BB_DIRTY;
3646 if (!BARRIER_P (from)
3647 && (bb2 = BLOCK_FOR_INSN (from)))
3649 if (BB_END (bb2) == to)
3650 BB_END (bb2) = prev;
3651 bb2->flags |= BB_DIRTY;
3654 if (BB_END (bb) == after)
3657 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3659 set_block_for_insn (x, bb);
3663 /* Return the line note insn preceding INSN. */
3666 find_line_note (rtx insn)
3668 if (no_line_numbers)
3671 for (; insn; insn = PREV_INSN (insn))
3673 && NOTE_LINE_NUMBER (insn) >= 0)
3679 /* Remove unnecessary notes from the instruction stream. */
3682 remove_unnecessary_notes (void)
3684 rtx eh_stack = NULL_RTX;
3689 /* We must not remove the first instruction in the function because
3690 the compiler depends on the first instruction being a note. */
3691 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3693 /* Remember what's next. */
3694 next = NEXT_INSN (insn);
3696 /* We're only interested in notes. */
3700 switch (NOTE_LINE_NUMBER (insn))
3702 case NOTE_INSN_DELETED:
3706 case NOTE_INSN_EH_REGION_BEG:
3707 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3710 case NOTE_INSN_EH_REGION_END:
3711 /* Too many end notes. */
3712 gcc_assert (eh_stack);
3713 /* Mismatched nesting. */
3714 gcc_assert (NOTE_EH_HANDLER (XEXP (eh_stack, 0))
3715 == NOTE_EH_HANDLER (insn));
3717 eh_stack = XEXP (eh_stack, 1);
3718 free_INSN_LIST_node (tmp);
3721 case NOTE_INSN_BLOCK_BEG:
3722 case NOTE_INSN_BLOCK_END:
3723 /* BLOCK_END and BLOCK_BEG notes only exist in the `final' pass. */
3731 /* Too many EH_REGION_BEG notes. */
3732 gcc_assert (!eh_stack);
3735 struct tree_opt_pass pass_remove_unnecessary_notes =
3737 "eunotes", /* name */
3739 remove_unnecessary_notes, /* execute */
3742 0, /* static_pass_number */
3744 0, /* properties_required */
3745 0, /* properties_provided */
3746 0, /* properties_destroyed */
3747 0, /* todo_flags_start */
3748 TODO_dump_func, /* todo_flags_finish */
3753 /* Emit insn(s) of given code and pattern
3754 at a specified place within the doubly-linked list.
3756 All of the emit_foo global entry points accept an object
3757 X which is either an insn list or a PATTERN of a single
3760 There are thus a few canonical ways to generate code and
3761 emit it at a specific place in the instruction stream. For
3762 example, consider the instruction named SPOT and the fact that
3763 we would like to emit some instructions before SPOT. We might
3767 ... emit the new instructions ...
3768 insns_head = get_insns ();
3771 emit_insn_before (insns_head, SPOT);
3773 It used to be common to generate SEQUENCE rtl instead, but that
3774 is a relic of the past which no longer occurs. The reason is that
3775 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3776 generated would almost certainly die right after it was created. */
3778 /* Make X be output before the instruction BEFORE. */
3781 emit_insn_before_noloc (rtx x, rtx before)
3786 gcc_assert (before);
3791 switch (GET_CODE (x))
3802 rtx next = NEXT_INSN (insn);
3803 add_insn_before (insn, before);
3809 #ifdef ENABLE_RTL_CHECKING
3816 last = make_insn_raw (x);
3817 add_insn_before (last, before);
3824 /* Make an instruction with body X and code JUMP_INSN
3825 and output it before the instruction BEFORE. */
3828 emit_jump_insn_before_noloc (rtx x, rtx before)
3830 rtx insn, last = NULL_RTX;
3832 gcc_assert (before);
3834 switch (GET_CODE (x))
3845 rtx next = NEXT_INSN (insn);
3846 add_insn_before (insn, before);
3852 #ifdef ENABLE_RTL_CHECKING
3859 last = make_jump_insn_raw (x);
3860 add_insn_before (last, before);
3867 /* Make an instruction with body X and code CALL_INSN
3868 and output it before the instruction BEFORE. */
3871 emit_call_insn_before_noloc (rtx x, rtx before)
3873 rtx last = NULL_RTX, insn;
3875 gcc_assert (before);
3877 switch (GET_CODE (x))
3888 rtx next = NEXT_INSN (insn);
3889 add_insn_before (insn, before);
3895 #ifdef ENABLE_RTL_CHECKING
3902 last = make_call_insn_raw (x);
3903 add_insn_before (last, before);
3910 /* Make an insn of code BARRIER
3911 and output it before the insn BEFORE. */
3914 emit_barrier_before (rtx before)
3916 rtx insn = rtx_alloc (BARRIER);
3918 INSN_UID (insn) = cur_insn_uid++;
3920 add_insn_before (insn, before);
3924 /* Emit the label LABEL before the insn BEFORE. */
3927 emit_label_before (rtx label, rtx before)
3929 /* This can be called twice for the same label as a result of the
3930 confusion that follows a syntax error! So make it harmless. */
3931 if (INSN_UID (label) == 0)
3933 INSN_UID (label) = cur_insn_uid++;
3934 add_insn_before (label, before);
3940 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3943 emit_note_before (int subtype, rtx before)
3945 rtx note = rtx_alloc (NOTE);
3946 INSN_UID (note) = cur_insn_uid++;
3947 #ifndef USE_MAPPED_LOCATION
3948 NOTE_SOURCE_FILE (note) = 0;
3950 NOTE_LINE_NUMBER (note) = subtype;
3951 BLOCK_FOR_INSN (note) = NULL;
3953 add_insn_before (note, before);
3957 /* Helper for emit_insn_after, handles lists of instructions
3960 static rtx emit_insn_after_1 (rtx, rtx);
3963 emit_insn_after_1 (rtx first, rtx after)
3969 if (!BARRIER_P (after)
3970 && (bb = BLOCK_FOR_INSN (after)))
3972 bb->flags |= BB_DIRTY;
3973 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3974 if (!BARRIER_P (last))
3975 set_block_for_insn (last, bb);
3976 if (!BARRIER_P (last))
3977 set_block_for_insn (last, bb);
3978 if (BB_END (bb) == after)
3982 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3985 after_after = NEXT_INSN (after);
3987 NEXT_INSN (after) = first;
3988 PREV_INSN (first) = after;
3989 NEXT_INSN (last) = after_after;
3991 PREV_INSN (after_after) = last;
3993 if (after == last_insn)
3998 /* Make X be output after the insn AFTER. */
4001 emit_insn_after_noloc (rtx x, rtx after)
4010 switch (GET_CODE (x))
4018 last = emit_insn_after_1 (x, after);
4021 #ifdef ENABLE_RTL_CHECKING
4028 last = make_insn_raw (x);
4029 add_insn_after (last, after);
4036 /* Similar to emit_insn_after, except that line notes are to be inserted so
4037 as to act as if this insn were at FROM. */
4040 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4042 rtx from_line = find_line_note (from);
4043 rtx after_line = find_line_note (after);
4044 rtx insn = emit_insn_after (x, after);
4047 emit_note_copy_after (from_line, after);
4050 emit_note_copy_after (after_line, insn);
4053 /* Make an insn of code JUMP_INSN with body X
4054 and output it after the insn AFTER. */
4057 emit_jump_insn_after_noloc (rtx x, rtx after)
4063 switch (GET_CODE (x))
4071 last = emit_insn_after_1 (x, after);
4074 #ifdef ENABLE_RTL_CHECKING
4081 last = make_jump_insn_raw (x);
4082 add_insn_after (last, after);
4089 /* Make an instruction with body X and code CALL_INSN
4090 and output it after the instruction AFTER. */
4093 emit_call_insn_after_noloc (rtx x, rtx after)
4099 switch (GET_CODE (x))
4107 last = emit_insn_after_1 (x, after);
4110 #ifdef ENABLE_RTL_CHECKING
4117 last = make_call_insn_raw (x);
4118 add_insn_after (last, after);
4125 /* Make an insn of code BARRIER
4126 and output it after the insn AFTER. */
4129 emit_barrier_after (rtx after)
4131 rtx insn = rtx_alloc (BARRIER);
4133 INSN_UID (insn) = cur_insn_uid++;
4135 add_insn_after (insn, after);
4139 /* Emit the label LABEL after the insn AFTER. */
4142 emit_label_after (rtx label, rtx after)
4144 /* This can be called twice for the same label
4145 as a result of the confusion that follows a syntax error!
4146 So make it harmless. */
4147 if (INSN_UID (label) == 0)
4149 INSN_UID (label) = cur_insn_uid++;
4150 add_insn_after (label, after);
4156 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4159 emit_note_after (int subtype, rtx after)
4161 rtx note = rtx_alloc (NOTE);
4162 INSN_UID (note) = cur_insn_uid++;
4163 #ifndef USE_MAPPED_LOCATION
4164 NOTE_SOURCE_FILE (note) = 0;
4166 NOTE_LINE_NUMBER (note) = subtype;
4167 BLOCK_FOR_INSN (note) = NULL;
4168 add_insn_after (note, after);
4172 /* Emit a copy of note ORIG after the insn AFTER. */
4175 emit_note_copy_after (rtx orig, rtx after)
4179 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4185 note = rtx_alloc (NOTE);
4186 INSN_UID (note) = cur_insn_uid++;
4187 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4188 NOTE_DATA (note) = NOTE_DATA (orig);
4189 BLOCK_FOR_INSN (note) = NULL;
4190 add_insn_after (note, after);
4194 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4196 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4198 rtx last = emit_insn_after_noloc (pattern, after);
4200 if (pattern == NULL_RTX || !loc)
4203 after = NEXT_INSN (after);
4206 if (active_insn_p (after) && !INSN_LOCATOR (after))
4207 INSN_LOCATOR (after) = loc;
4210 after = NEXT_INSN (after);
4215 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4217 emit_insn_after (rtx pattern, rtx after)
4220 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4222 return emit_insn_after_noloc (pattern, after);
4225 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4227 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4229 rtx last = emit_jump_insn_after_noloc (pattern, after);
4231 if (pattern == NULL_RTX || !loc)
4234 after = NEXT_INSN (after);
4237 if (active_insn_p (after) && !INSN_LOCATOR (after))
4238 INSN_LOCATOR (after) = loc;
4241 after = NEXT_INSN (after);
4246 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4248 emit_jump_insn_after (rtx pattern, rtx after)
4251 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4253 return emit_jump_insn_after_noloc (pattern, after);
4256 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4258 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4260 rtx last = emit_call_insn_after_noloc (pattern, after);
4262 if (pattern == NULL_RTX || !loc)
4265 after = NEXT_INSN (after);
4268 if (active_insn_p (after) && !INSN_LOCATOR (after))
4269 INSN_LOCATOR (after) = loc;
4272 after = NEXT_INSN (after);
4277 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4279 emit_call_insn_after (rtx pattern, rtx after)
4282 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4284 return emit_call_insn_after_noloc (pattern, after);
4287 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4289 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4291 rtx first = PREV_INSN (before);
4292 rtx last = emit_insn_before_noloc (pattern, before);
4294 if (pattern == NULL_RTX || !loc)
4297 first = NEXT_INSN (first);
4300 if (active_insn_p (first) && !INSN_LOCATOR (first))
4301 INSN_LOCATOR (first) = loc;
4304 first = NEXT_INSN (first);
4309 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4311 emit_insn_before (rtx pattern, rtx before)
4313 if (INSN_P (before))
4314 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4316 return emit_insn_before_noloc (pattern, before);
4319 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4321 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4323 rtx first = PREV_INSN (before);
4324 rtx last = emit_jump_insn_before_noloc (pattern, before);
4326 if (pattern == NULL_RTX)
4329 first = NEXT_INSN (first);
4332 if (active_insn_p (first) && !INSN_LOCATOR (first))
4333 INSN_LOCATOR (first) = loc;
4336 first = NEXT_INSN (first);
4341 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4343 emit_jump_insn_before (rtx pattern, rtx before)
4345 if (INSN_P (before))
4346 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4348 return emit_jump_insn_before_noloc (pattern, before);
4351 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4353 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4355 rtx first = PREV_INSN (before);
4356 rtx last = emit_call_insn_before_noloc (pattern, before);
4358 if (pattern == NULL_RTX)
4361 first = NEXT_INSN (first);
4364 if (active_insn_p (first) && !INSN_LOCATOR (first))
4365 INSN_LOCATOR (first) = loc;
4368 first = NEXT_INSN (first);
4373 /* like emit_call_insn_before_noloc,
4374 but set insn_locator according to before. */
4376 emit_call_insn_before (rtx pattern, rtx before)
4378 if (INSN_P (before))
4379 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4381 return emit_call_insn_before_noloc (pattern, before);
4384 /* Take X and emit it at the end of the doubly-linked
4387 Returns the last insn emitted. */
4392 rtx last = last_insn;
4398 switch (GET_CODE (x))
4409 rtx next = NEXT_INSN (insn);
4416 #ifdef ENABLE_RTL_CHECKING
4423 last = make_insn_raw (x);
4431 /* Make an insn of code JUMP_INSN with pattern X
4432 and add it to the end of the doubly-linked list. */
4435 emit_jump_insn (rtx x)
4437 rtx last = NULL_RTX, insn;
4439 switch (GET_CODE (x))
4450 rtx next = NEXT_INSN (insn);
4457 #ifdef ENABLE_RTL_CHECKING
4464 last = make_jump_insn_raw (x);
4472 /* Make an insn of code CALL_INSN with pattern X
4473 and add it to the end of the doubly-linked list. */
4476 emit_call_insn (rtx x)
4480 switch (GET_CODE (x))
4488 insn = emit_insn (x);
4491 #ifdef ENABLE_RTL_CHECKING
4498 insn = make_call_insn_raw (x);
4506 /* Add the label LABEL to the end of the doubly-linked list. */
4509 emit_label (rtx label)
4511 /* This can be called twice for the same label
4512 as a result of the confusion that follows a syntax error!
4513 So make it harmless. */
4514 if (INSN_UID (label) == 0)
4516 INSN_UID (label) = cur_insn_uid++;
4522 /* Make an insn of code BARRIER
4523 and add it to the end of the doubly-linked list. */
4528 rtx barrier = rtx_alloc (BARRIER);
4529 INSN_UID (barrier) = cur_insn_uid++;
4534 /* Make line numbering NOTE insn for LOCATION add it to the end
4535 of the doubly-linked list, but only if line-numbers are desired for
4536 debugging info and it doesn't match the previous one. */
4539 emit_line_note (location_t location)
4543 #ifdef USE_MAPPED_LOCATION
4544 if (location == last_location)
4547 if (location.file && last_location.file
4548 && !strcmp (location.file, last_location.file)
4549 && location.line == last_location.line)
4552 last_location = location;
4554 if (no_line_numbers)
4560 #ifdef USE_MAPPED_LOCATION
4561 note = emit_note ((int) location);
4563 note = emit_note (location.line);
4564 NOTE_SOURCE_FILE (note) = location.file;
4570 /* Emit a copy of note ORIG. */
4573 emit_note_copy (rtx orig)
4577 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4583 note = rtx_alloc (NOTE);
4585 INSN_UID (note) = cur_insn_uid++;
4586 NOTE_DATA (note) = NOTE_DATA (orig);
4587 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4588 BLOCK_FOR_INSN (note) = NULL;
4594 /* Make an insn of code NOTE or type NOTE_NO
4595 and add it to the end of the doubly-linked list. */
4598 emit_note (int note_no)
4602 note = rtx_alloc (NOTE);
4603 INSN_UID (note) = cur_insn_uid++;
4604 NOTE_LINE_NUMBER (note) = note_no;
4605 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4606 BLOCK_FOR_INSN (note) = NULL;
4611 /* Cause next statement to emit a line note even if the line number
4615 force_next_line_note (void)
4617 #ifdef USE_MAPPED_LOCATION
4620 last_location.line = -1;
4624 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4625 note of this type already exists, remove it first. */
4628 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4630 rtx note = find_reg_note (insn, kind, NULL_RTX);
4636 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4637 has multiple sets (some callers assume single_set
4638 means the insn only has one set, when in fact it
4639 means the insn only has one * useful * set). */
4640 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4646 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4647 It serves no useful purpose and breaks eliminate_regs. */
4648 if (GET_CODE (datum) == ASM_OPERANDS)
4658 XEXP (note, 0) = datum;
4662 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4663 return REG_NOTES (insn);
4666 /* Return an indication of which type of insn should have X as a body.
4667 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4669 static enum rtx_code
4670 classify_insn (rtx x)
4674 if (GET_CODE (x) == CALL)
4676 if (GET_CODE (x) == RETURN)
4678 if (GET_CODE (x) == SET)
4680 if (SET_DEST (x) == pc_rtx)
4682 else if (GET_CODE (SET_SRC (x)) == CALL)
4687 if (GET_CODE (x) == PARALLEL)
4690 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4691 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4693 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4694 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4696 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4697 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4703 /* Emit the rtl pattern X as an appropriate kind of insn.
4704 If X is a label, it is simply added into the insn chain. */
4709 enum rtx_code code = classify_insn (x);
4714 return emit_label (x);
4716 return emit_insn (x);
4719 rtx insn = emit_jump_insn (x);
4720 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4721 return emit_barrier ();
4725 return emit_call_insn (x);
4731 /* Space for free sequence stack entries. */
4732 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4734 /* Begin emitting insns to a sequence. If this sequence will contain
4735 something that might cause the compiler to pop arguments to function
4736 calls (because those pops have previously been deferred; see
4737 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4738 before calling this function. That will ensure that the deferred
4739 pops are not accidentally emitted in the middle of this sequence. */
4742 start_sequence (void)
4744 struct sequence_stack *tem;
4746 if (free_sequence_stack != NULL)
4748 tem = free_sequence_stack;
4749 free_sequence_stack = tem->next;
4752 tem = ggc_alloc (sizeof (struct sequence_stack));
4754 tem->next = seq_stack;
4755 tem->first = first_insn;
4756 tem->last = last_insn;
4764 /* Set up the insn chain starting with FIRST as the current sequence,
4765 saving the previously current one. See the documentation for
4766 start_sequence for more information about how to use this function. */
4769 push_to_sequence (rtx first)
4775 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4781 /* Set up the outer-level insn chain
4782 as the current sequence, saving the previously current one. */
4785 push_topmost_sequence (void)
4787 struct sequence_stack *stack, *top = NULL;
4791 for (stack = seq_stack; stack; stack = stack->next)
4794 first_insn = top->first;
4795 last_insn = top->last;
4798 /* After emitting to the outer-level insn chain, update the outer-level
4799 insn chain, and restore the previous saved state. */
4802 pop_topmost_sequence (void)
4804 struct sequence_stack *stack, *top = NULL;
4806 for (stack = seq_stack; stack; stack = stack->next)
4809 top->first = first_insn;
4810 top->last = last_insn;
4815 /* After emitting to a sequence, restore previous saved state.
4817 To get the contents of the sequence just made, you must call
4818 `get_insns' *before* calling here.
4820 If the compiler might have deferred popping arguments while
4821 generating this sequence, and this sequence will not be immediately
4822 inserted into the instruction stream, use do_pending_stack_adjust
4823 before calling get_insns. That will ensure that the deferred
4824 pops are inserted into this sequence, and not into some random
4825 location in the instruction stream. See INHIBIT_DEFER_POP for more
4826 information about deferred popping of arguments. */
4831 struct sequence_stack *tem = seq_stack;
4833 first_insn = tem->first;
4834 last_insn = tem->last;
4835 seq_stack = tem->next;
4837 memset (tem, 0, sizeof (*tem));
4838 tem->next = free_sequence_stack;
4839 free_sequence_stack = tem;
4842 /* Return 1 if currently emitting into a sequence. */
4845 in_sequence_p (void)
4847 return seq_stack != 0;
4850 /* Put the various virtual registers into REGNO_REG_RTX. */
4853 init_virtual_regs (struct emit_status *es)
4855 rtx *ptr = es->x_regno_reg_rtx;
4856 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4857 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4858 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4859 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4860 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4864 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4865 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4866 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4867 static int copy_insn_n_scratches;
4869 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4870 copied an ASM_OPERANDS.
4871 In that case, it is the original input-operand vector. */
4872 static rtvec orig_asm_operands_vector;
4874 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4875 copied an ASM_OPERANDS.
4876 In that case, it is the copied input-operand vector. */
4877 static rtvec copy_asm_operands_vector;
4879 /* Likewise for the constraints vector. */
4880 static rtvec orig_asm_constraints_vector;
4881 static rtvec copy_asm_constraints_vector;
4883 /* Recursively create a new copy of an rtx for copy_insn.
4884 This function differs from copy_rtx in that it handles SCRATCHes and
4885 ASM_OPERANDs properly.
4886 Normally, this function is not used directly; use copy_insn as front end.
4887 However, you could first copy an insn pattern with copy_insn and then use
4888 this function afterwards to properly copy any REG_NOTEs containing
4892 copy_insn_1 (rtx orig)
4897 const char *format_ptr;
4899 code = GET_CODE (orig);
4913 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4918 for (i = 0; i < copy_insn_n_scratches; i++)
4919 if (copy_insn_scratch_in[i] == orig)
4920 return copy_insn_scratch_out[i];
4924 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4925 a LABEL_REF, it isn't sharable. */
4926 if (GET_CODE (XEXP (orig, 0)) == PLUS
4927 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4928 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4932 /* A MEM with a constant address is not sharable. The problem is that
4933 the constant address may need to be reloaded. If the mem is shared,
4934 then reloading one copy of this mem will cause all copies to appear
4935 to have been reloaded. */
4941 /* Copy the various flags, fields, and other information. We assume
4942 that all fields need copying, and then clear the fields that should
4943 not be copied. That is the sensible default behavior, and forces
4944 us to explicitly document why we are *not* copying a flag. */
4945 copy = shallow_copy_rtx (orig);
4947 /* We do not copy the USED flag, which is used as a mark bit during
4948 walks over the RTL. */
4949 RTX_FLAG (copy, used) = 0;
4951 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4954 RTX_FLAG (copy, jump) = 0;
4955 RTX_FLAG (copy, call) = 0;
4956 RTX_FLAG (copy, frame_related) = 0;
4959 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4961 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4962 switch (*format_ptr++)
4965 if (XEXP (orig, i) != NULL)
4966 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4971 if (XVEC (orig, i) == orig_asm_constraints_vector)
4972 XVEC (copy, i) = copy_asm_constraints_vector;
4973 else if (XVEC (orig, i) == orig_asm_operands_vector)
4974 XVEC (copy, i) = copy_asm_operands_vector;
4975 else if (XVEC (orig, i) != NULL)
4977 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4978 for (j = 0; j < XVECLEN (copy, i); j++)
4979 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4990 /* These are left unchanged. */
4997 if (code == SCRATCH)
4999 i = copy_insn_n_scratches++;
5000 gcc_assert (i < MAX_RECOG_OPERANDS);
5001 copy_insn_scratch_in[i] = orig;
5002 copy_insn_scratch_out[i] = copy;
5004 else if (code == ASM_OPERANDS)
5006 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5007 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5008 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5009 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5015 /* Create a new copy of an rtx.
5016 This function differs from copy_rtx in that it handles SCRATCHes and
5017 ASM_OPERANDs properly.
5018 INSN doesn't really have to be a full INSN; it could be just the
5021 copy_insn (rtx insn)
5023 copy_insn_n_scratches = 0;
5024 orig_asm_operands_vector = 0;
5025 orig_asm_constraints_vector = 0;
5026 copy_asm_operands_vector = 0;
5027 copy_asm_constraints_vector = 0;
5028 return copy_insn_1 (insn);
5031 /* Initialize data structures and variables in this file
5032 before generating rtl for each function. */
5037 struct function *f = cfun;
5039 f->emit = ggc_alloc (sizeof (struct emit_status));
5043 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5044 last_location = UNKNOWN_LOCATION;
5045 first_label_num = label_num;
5048 /* Init the tables that describe all the pseudo regs. */
5050 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5052 f->emit->regno_pointer_align
5053 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5054 * sizeof (unsigned char));
5057 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5059 /* Put copies of all the hard registers into regno_reg_rtx. */
5060 memcpy (regno_reg_rtx,
5061 static_regno_reg_rtx,
5062 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5064 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5065 init_virtual_regs (f->emit);
5067 /* Indicate that the virtual registers and stack locations are
5069 REG_POINTER (stack_pointer_rtx) = 1;
5070 REG_POINTER (frame_pointer_rtx) = 1;
5071 REG_POINTER (hard_frame_pointer_rtx) = 1;
5072 REG_POINTER (arg_pointer_rtx) = 1;
5074 REG_POINTER (virtual_incoming_args_rtx) = 1;
5075 REG_POINTER (virtual_stack_vars_rtx) = 1;
5076 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5077 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5078 REG_POINTER (virtual_cfa_rtx) = 1;
5080 #ifdef STACK_BOUNDARY
5081 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5082 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5083 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5084 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5086 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5087 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5088 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5089 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5090 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5093 #ifdef INIT_EXPANDERS
5098 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5101 gen_const_vector (enum machine_mode mode, int constant)
5106 enum machine_mode inner;
5108 units = GET_MODE_NUNITS (mode);
5109 inner = GET_MODE_INNER (mode);
5111 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5113 v = rtvec_alloc (units);
5115 /* We need to call this function after we set the scalar const_tiny_rtx
5117 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5119 for (i = 0; i < units; ++i)
5120 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5122 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5126 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5127 all elements are zero, and the one vector when all elements are one. */
5129 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5131 enum machine_mode inner = GET_MODE_INNER (mode);
5132 int nunits = GET_MODE_NUNITS (mode);
5136 /* Check to see if all of the elements have the same value. */
5137 x = RTVEC_ELT (v, nunits - 1);
5138 for (i = nunits - 2; i >= 0; i--)
5139 if (RTVEC_ELT (v, i) != x)
5142 /* If the values are all the same, check to see if we can use one of the
5143 standard constant vectors. */
5146 if (x == CONST0_RTX (inner))
5147 return CONST0_RTX (mode);
5148 else if (x == CONST1_RTX (inner))
5149 return CONST1_RTX (mode);
5152 return gen_rtx_raw_CONST_VECTOR (mode, v);
5155 /* Create some permanent unique rtl objects shared between all functions.
5156 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5159 init_emit_once (int line_numbers)
5162 enum machine_mode mode;
5163 enum machine_mode double_mode;
5165 /* We need reg_raw_mode, so initialize the modes now. */
5166 init_reg_modes_once ();
5168 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5170 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5171 const_int_htab_eq, NULL);
5173 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5174 const_double_htab_eq, NULL);
5176 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5177 mem_attrs_htab_eq, NULL);
5178 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5179 reg_attrs_htab_eq, NULL);
5181 no_line_numbers = ! line_numbers;
5183 /* Compute the word and byte modes. */
5185 byte_mode = VOIDmode;
5186 word_mode = VOIDmode;
5187 double_mode = VOIDmode;
5189 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5191 mode = GET_MODE_WIDER_MODE (mode))
5193 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5194 && byte_mode == VOIDmode)
5197 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5198 && word_mode == VOIDmode)
5202 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5204 mode = GET_MODE_WIDER_MODE (mode))
5206 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5207 && double_mode == VOIDmode)
5211 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5213 /* Assign register numbers to the globally defined register rtx.
5214 This must be done at runtime because the register number field
5215 is in a union and some compilers can't initialize unions. */
5217 pc_rtx = gen_rtx_PC (VOIDmode);
5218 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5219 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5220 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5221 if (hard_frame_pointer_rtx == 0)
5222 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5223 HARD_FRAME_POINTER_REGNUM);
5224 if (arg_pointer_rtx == 0)
5225 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5226 virtual_incoming_args_rtx =
5227 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5228 virtual_stack_vars_rtx =
5229 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5230 virtual_stack_dynamic_rtx =
5231 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5232 virtual_outgoing_args_rtx =
5233 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5234 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5236 /* Initialize RTL for commonly used hard registers. These are
5237 copied into regno_reg_rtx as we begin to compile each function. */
5238 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5239 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5241 #ifdef INIT_EXPANDERS
5242 /* This is to initialize {init|mark|free}_machine_status before the first
5243 call to push_function_context_to. This is needed by the Chill front
5244 end which calls push_function_context_to before the first call to
5245 init_function_start. */
5249 /* Create the unique rtx's for certain rtx codes and operand values. */
5251 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5252 tries to use these variables. */
5253 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5254 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5255 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5257 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5258 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5259 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5261 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5263 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5264 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5265 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5266 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5267 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5268 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5269 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5271 dconsthalf = dconst1;
5272 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5274 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5276 /* Initialize mathematical constants for constant folding builtins.
5277 These constants need to be given to at least 160 bits precision. */
5278 real_from_string (&dconstpi,
5279 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5280 real_from_string (&dconste,
5281 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5283 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5285 REAL_VALUE_TYPE *r =
5286 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5288 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5290 mode = GET_MODE_WIDER_MODE (mode))
5291 const_tiny_rtx[i][(int) mode] =
5292 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5294 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5296 mode = GET_MODE_WIDER_MODE (mode))
5297 const_tiny_rtx[i][(int) mode] =
5298 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5300 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5302 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5304 mode = GET_MODE_WIDER_MODE (mode))
5305 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5307 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5309 mode = GET_MODE_WIDER_MODE (mode))
5310 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5313 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5315 mode = GET_MODE_WIDER_MODE (mode))
5317 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5318 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5321 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5323 mode = GET_MODE_WIDER_MODE (mode))
5325 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5326 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5329 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5330 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5331 const_tiny_rtx[0][i] = const0_rtx;
5333 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5334 if (STORE_FLAG_VALUE == 1)
5335 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5337 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5338 return_address_pointer_rtx
5339 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5342 #ifdef STATIC_CHAIN_REGNUM
5343 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5345 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5346 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5347 static_chain_incoming_rtx
5348 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5351 static_chain_incoming_rtx = static_chain_rtx;
5355 static_chain_rtx = STATIC_CHAIN;
5357 #ifdef STATIC_CHAIN_INCOMING
5358 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5360 static_chain_incoming_rtx = static_chain_rtx;
5364 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5365 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5368 /* Produce exact duplicate of insn INSN after AFTER.
5369 Care updating of libcall regions if present. */
5372 emit_copy_of_insn_after (rtx insn, rtx after)
5375 rtx note1, note2, link;
5377 switch (GET_CODE (insn))
5380 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5384 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5388 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5389 if (CALL_INSN_FUNCTION_USAGE (insn))
5390 CALL_INSN_FUNCTION_USAGE (new)
5391 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5392 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5393 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5400 /* Update LABEL_NUSES. */
5401 mark_jump_label (PATTERN (new), new, 0);
5403 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5405 /* If the old insn is frame related, then so is the new one. This is
5406 primarily needed for IA-64 unwind info which marks epilogue insns,
5407 which may be duplicated by the basic block reordering code. */
5408 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn);
5410 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5412 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5413 if (REG_NOTE_KIND (link) != REG_LABEL)
5415 if (GET_CODE (link) == EXPR_LIST)
5417 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5422 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5427 /* Fix the libcall sequences. */
5428 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5431 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5433 XEXP (note1, 0) = p;
5434 XEXP (note2, 0) = new;
5436 INSN_CODE (new) = INSN_CODE (insn);
5440 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5442 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5444 if (hard_reg_clobbers[mode][regno])
5445 return hard_reg_clobbers[mode][regno];
5447 return (hard_reg_clobbers[mode][regno] =
5448 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5451 #include "gt-emit-rtl.h"