1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* Datastructures maintained for currently processed function in RTL form. */
71 struct rtl_data x_rtl;
73 /* Indexed by pseudo register number, gives the rtx for that pseudo.
74 Allocated in parallel with regno_pointer_align.
75 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
76 with length attribute nested in top level structures. */
80 /* This is *not* reset after each function. It gives each CODE_LABEL
81 in the entire compilation a unique label number. */
83 static GTY(()) int label_num = 1;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconsthalf;
116 /* Record fixed-point constant 0 and 1. */
117 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
118 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
120 /* All references to the following fixed hard registers go through
121 these unique rtl objects. On machines where the frame-pointer and
122 arg-pointer are the same register, they use the same unique object.
124 After register allocation, other rtl objects which used to be pseudo-regs
125 may be clobbered to refer to the frame-pointer register.
126 But references that were originally to the frame-pointer can be
127 distinguished from the others because they contain frame_pointer_rtx.
129 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
130 tricky: until register elimination has taken place hard_frame_pointer_rtx
131 should be used if it is being set, and frame_pointer_rtx otherwise. After
132 register elimination hard_frame_pointer_rtx should always be used.
133 On machines where the two registers are same (most) then these are the
136 In an inline procedure, the stack and frame pointer rtxs may not be
137 used for anything else. */
138 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
139 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
140 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
142 /* This is used to implement __builtin_return_address for some machines.
143 See for instance the MIPS port. */
144 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
146 /* We make one copy of (const_int C) where C is in
147 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
148 to save space during the compilation and simplify comparisons of
151 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
153 /* A hash table storing CONST_INTs whose absolute value is greater
154 than MAX_SAVED_CONST_INT. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
157 htab_t const_int_htab;
159 /* A hash table storing memory attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
161 htab_t mem_attrs_htab;
163 /* A hash table storing register attribute structures. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
165 htab_t reg_attrs_htab;
167 /* A hash table storing all CONST_DOUBLEs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_double_htab;
171 /* A hash table storing all CONST_FIXEDs. */
172 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
173 htab_t const_fixed_htab;
175 #define first_insn (crtl->emit.x_first_insn)
176 #define last_insn (crtl->emit.x_last_insn)
177 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
178 #define last_location (crtl->emit.x_last_location)
179 #define first_label_num (crtl->emit.x_first_label_num)
181 static rtx make_call_insn_raw (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void set_used_decls (tree);
184 static void mark_label_nuses (rtx);
185 static hashval_t const_int_htab_hash (const void *);
186 static int const_int_htab_eq (const void *, const void *);
187 static hashval_t const_double_htab_hash (const void *);
188 static int const_double_htab_eq (const void *, const void *);
189 static rtx lookup_const_double (rtx);
190 static hashval_t const_fixed_htab_hash (const void *);
191 static int const_fixed_htab_eq (const void *, const void *);
192 static rtx lookup_const_fixed (rtx);
193 static hashval_t mem_attrs_htab_hash (const void *);
194 static int mem_attrs_htab_eq (const void *, const void *);
195 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
197 static hashval_t reg_attrs_htab_hash (const void *);
198 static int reg_attrs_htab_eq (const void *, const void *);
199 static reg_attrs *get_reg_attrs (tree, int);
200 static tree component_ref_for_mem_expr (tree);
201 static rtx gen_const_vector (enum machine_mode, int);
202 static void copy_rtx_if_shared_1 (rtx *orig);
204 /* Probability of the conditional branch currently proceeded by try_split.
205 Set to -1 otherwise. */
206 int split_branch_probability = -1;
208 /* Returns a hash code for X (which is a really a CONST_INT). */
211 const_int_htab_hash (const void *x)
213 return (hashval_t) INTVAL ((const_rtx) x);
216 /* Returns nonzero if the value represented by X (which is really a
217 CONST_INT) is the same as that given by Y (which is really a
221 const_int_htab_eq (const void *x, const void *y)
223 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
226 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
228 const_double_htab_hash (const void *x)
230 const_rtx const value = (const_rtx) x;
233 if (GET_MODE (value) == VOIDmode)
234 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
237 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
238 /* MODE is used in the comparison, so it should be in the hash. */
239 h ^= GET_MODE (value);
244 /* Returns nonzero if the value represented by X (really a ...)
245 is the same as that represented by Y (really a ...) */
247 const_double_htab_eq (const void *x, const void *y)
249 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
251 if (GET_MODE (a) != GET_MODE (b))
253 if (GET_MODE (a) == VOIDmode)
254 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
255 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
257 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
258 CONST_DOUBLE_REAL_VALUE (b));
261 /* Returns a hash code for X (which is really a CONST_FIXED). */
264 const_fixed_htab_hash (const void *x)
266 const_rtx const value = (const_rtx) x;
269 h = fixed_hash (CONST_FIXED_VALUE (value));
270 /* MODE is used in the comparison, so it should be in the hash. */
271 h ^= GET_MODE (value);
275 /* Returns nonzero if the value represented by X (really a ...)
276 is the same as that represented by Y (really a ...). */
279 const_fixed_htab_eq (const void *x, const void *y)
281 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
283 if (GET_MODE (a) != GET_MODE (b))
285 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
288 /* Returns a hash code for X (which is a really a mem_attrs *). */
291 mem_attrs_htab_hash (const void *x)
293 const mem_attrs *const p = (const mem_attrs *) x;
295 return (p->alias ^ (p->align * 1000)
296 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
297 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
298 ^ (size_t) iterative_hash_expr (p->expr, 0));
301 /* Returns nonzero if the value represented by X (which is really a
302 mem_attrs *) is the same as that given by Y (which is also really a
306 mem_attrs_htab_eq (const void *x, const void *y)
308 const mem_attrs *const p = (const mem_attrs *) x;
309 const mem_attrs *const q = (const mem_attrs *) y;
311 return (p->alias == q->alias && p->offset == q->offset
312 && p->size == q->size && p->align == q->align
313 && (p->expr == q->expr
314 || (p->expr != NULL_TREE && q->expr != NULL_TREE
315 && operand_equal_p (p->expr, q->expr, 0))));
318 /* Allocate a new mem_attrs structure and insert it into the hash table if
319 one identical to it is not already in the table. We are doing this for
323 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
324 unsigned int align, enum machine_mode mode)
329 /* If everything is the default, we can just return zero.
330 This must match what the corresponding MEM_* macros return when the
331 field is not present. */
332 if (alias == 0 && expr == 0 && offset == 0
334 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
335 && (STRICT_ALIGNMENT && mode != BLKmode
336 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
341 attrs.offset = offset;
345 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
348 *slot = ggc_alloc (sizeof (mem_attrs));
349 memcpy (*slot, &attrs, sizeof (mem_attrs));
352 return (mem_attrs *) *slot;
355 /* Returns a hash code for X (which is a really a reg_attrs *). */
358 reg_attrs_htab_hash (const void *x)
360 const reg_attrs *const p = (const reg_attrs *) x;
362 return ((p->offset * 1000) ^ (long) p->decl);
365 /* Returns nonzero if the value represented by X (which is really a
366 reg_attrs *) is the same as that given by Y (which is also really a
370 reg_attrs_htab_eq (const void *x, const void *y)
372 const reg_attrs *const p = (const reg_attrs *) x;
373 const reg_attrs *const q = (const reg_attrs *) y;
375 return (p->decl == q->decl && p->offset == q->offset);
377 /* Allocate a new reg_attrs structure and insert it into the hash table if
378 one identical to it is not already in the table. We are doing this for
382 get_reg_attrs (tree decl, int offset)
387 /* If everything is the default, we can just return zero. */
388 if (decl == 0 && offset == 0)
392 attrs.offset = offset;
394 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
397 *slot = ggc_alloc (sizeof (reg_attrs));
398 memcpy (*slot, &attrs, sizeof (reg_attrs));
401 return (reg_attrs *) *slot;
406 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
412 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
413 MEM_VOLATILE_P (x) = true;
419 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
420 don't attempt to share with the various global pieces of rtl (such as
421 frame_pointer_rtx). */
424 gen_raw_REG (enum machine_mode mode, int regno)
426 rtx x = gen_rtx_raw_REG (mode, regno);
427 ORIGINAL_REGNO (x) = regno;
431 /* There are some RTL codes that require special attention; the generation
432 functions do the raw handling. If you add to this list, modify
433 special_rtx in gengenrtl.c as well. */
436 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
440 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
441 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
443 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
444 if (const_true_rtx && arg == STORE_FLAG_VALUE)
445 return const_true_rtx;
448 /* Look up the CONST_INT in the hash table. */
449 slot = htab_find_slot_with_hash (const_int_htab, &arg,
450 (hashval_t) arg, INSERT);
452 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
458 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
460 return GEN_INT (trunc_int_for_mode (c, mode));
463 /* CONST_DOUBLEs might be created from pairs of integers, or from
464 REAL_VALUE_TYPEs. Also, their length is known only at run time,
465 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
467 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
468 hash table. If so, return its counterpart; otherwise add it
469 to the hash table and return it. */
471 lookup_const_double (rtx real)
473 void **slot = htab_find_slot (const_double_htab, real, INSERT);
480 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
481 VALUE in mode MODE. */
483 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
485 rtx real = rtx_alloc (CONST_DOUBLE);
486 PUT_MODE (real, mode);
490 return lookup_const_double (real);
493 /* Determine whether FIXED, a CONST_FIXED, already exists in the
494 hash table. If so, return its counterpart; otherwise add it
495 to the hash table and return it. */
498 lookup_const_fixed (rtx fixed)
500 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
507 /* Return a CONST_FIXED rtx for a fixed-point value specified by
508 VALUE in mode MODE. */
511 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
513 rtx fixed = rtx_alloc (CONST_FIXED);
514 PUT_MODE (fixed, mode);
518 return lookup_const_fixed (fixed);
521 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
522 of ints: I0 is the low-order word and I1 is the high-order word.
523 Do not use this routine for non-integer modes; convert to
524 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
527 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
532 /* There are the following cases (note that there are no modes with
533 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
535 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
537 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
538 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
539 from copies of the sign bit, and sign of i0 and i1 are the same), then
540 we return a CONST_INT for i0.
541 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
542 if (mode != VOIDmode)
544 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
545 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
546 /* We can get a 0 for an error mark. */
547 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
548 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
550 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
551 return gen_int_mode (i0, mode);
553 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
556 /* If this integer fits in one word, return a CONST_INT. */
557 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
560 /* We use VOIDmode for integers. */
561 value = rtx_alloc (CONST_DOUBLE);
562 PUT_MODE (value, VOIDmode);
564 CONST_DOUBLE_LOW (value) = i0;
565 CONST_DOUBLE_HIGH (value) = i1;
567 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
568 XWINT (value, i) = 0;
570 return lookup_const_double (value);
574 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
576 /* In case the MD file explicitly references the frame pointer, have
577 all such references point to the same frame pointer. This is
578 used during frame pointer elimination to distinguish the explicit
579 references to these registers from pseudos that happened to be
582 If we have eliminated the frame pointer or arg pointer, we will
583 be using it as a normal register, for example as a spill
584 register. In such cases, we might be accessing it in a mode that
585 is not Pmode and therefore cannot use the pre-allocated rtx.
587 Also don't do this when we are making new REGs in reload, since
588 we don't want to get confused with the real pointers. */
590 if (mode == Pmode && !reload_in_progress)
592 if (regno == FRAME_POINTER_REGNUM
593 && (!reload_completed || frame_pointer_needed))
594 return frame_pointer_rtx;
595 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
596 if (regno == HARD_FRAME_POINTER_REGNUM
597 && (!reload_completed || frame_pointer_needed))
598 return hard_frame_pointer_rtx;
600 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
601 if (regno == ARG_POINTER_REGNUM)
602 return arg_pointer_rtx;
604 #ifdef RETURN_ADDRESS_POINTER_REGNUM
605 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
606 return return_address_pointer_rtx;
608 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
609 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
610 return pic_offset_table_rtx;
611 if (regno == STACK_POINTER_REGNUM)
612 return stack_pointer_rtx;
616 /* If the per-function register table has been set up, try to re-use
617 an existing entry in that table to avoid useless generation of RTL.
619 This code is disabled for now until we can fix the various backends
620 which depend on having non-shared hard registers in some cases. Long
621 term we want to re-enable this code as it can significantly cut down
622 on the amount of useless RTL that gets generated.
624 We'll also need to fix some code that runs after reload that wants to
625 set ORIGINAL_REGNO. */
630 && regno < FIRST_PSEUDO_REGISTER
631 && reg_raw_mode[regno] == mode)
632 return regno_reg_rtx[regno];
635 return gen_raw_REG (mode, regno);
639 gen_rtx_MEM (enum machine_mode mode, rtx addr)
641 rtx rt = gen_rtx_raw_MEM (mode, addr);
643 /* This field is not cleared by the mere allocation of the rtx, so
650 /* Generate a memory referring to non-trapping constant memory. */
653 gen_const_mem (enum machine_mode mode, rtx addr)
655 rtx mem = gen_rtx_MEM (mode, addr);
656 MEM_READONLY_P (mem) = 1;
657 MEM_NOTRAP_P (mem) = 1;
661 /* Generate a MEM referring to fixed portions of the frame, e.g., register
665 gen_frame_mem (enum machine_mode mode, rtx addr)
667 rtx mem = gen_rtx_MEM (mode, addr);
668 MEM_NOTRAP_P (mem) = 1;
669 set_mem_alias_set (mem, get_frame_alias_set ());
673 /* Generate a MEM referring to a temporary use of the stack, not part
674 of the fixed stack frame. For example, something which is pushed
675 by a target splitter. */
677 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
679 rtx mem = gen_rtx_MEM (mode, addr);
680 MEM_NOTRAP_P (mem) = 1;
681 if (!cfun->calls_alloca)
682 set_mem_alias_set (mem, get_frame_alias_set ());
686 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
687 this construct would be valid, and false otherwise. */
690 validate_subreg (enum machine_mode omode, enum machine_mode imode,
691 const_rtx reg, unsigned int offset)
693 unsigned int isize = GET_MODE_SIZE (imode);
694 unsigned int osize = GET_MODE_SIZE (omode);
696 /* All subregs must be aligned. */
697 if (offset % osize != 0)
700 /* The subreg offset cannot be outside the inner object. */
704 /* ??? This should not be here. Temporarily continue to allow word_mode
705 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
706 Generally, backends are doing something sketchy but it'll take time to
708 if (omode == word_mode)
710 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
711 is the culprit here, and not the backends. */
712 else if (osize >= UNITS_PER_WORD && isize >= osize)
714 /* Allow component subregs of complex and vector. Though given the below
715 extraction rules, it's not always clear what that means. */
716 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
717 && GET_MODE_INNER (imode) == omode)
719 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
720 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
721 represent this. It's questionable if this ought to be represented at
722 all -- why can't this all be hidden in post-reload splitters that make
723 arbitrarily mode changes to the registers themselves. */
724 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
726 /* Subregs involving floating point modes are not allowed to
727 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
728 (subreg:SI (reg:DF) 0) isn't. */
729 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
735 /* Paradoxical subregs must have offset zero. */
739 /* This is a normal subreg. Verify that the offset is representable. */
741 /* For hard registers, we already have most of these rules collected in
742 subreg_offset_representable_p. */
743 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
745 unsigned int regno = REGNO (reg);
747 #ifdef CANNOT_CHANGE_MODE_CLASS
748 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
749 && GET_MODE_INNER (imode) == omode)
751 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
755 return subreg_offset_representable_p (regno, imode, offset, omode);
758 /* For pseudo registers, we want most of the same checks. Namely:
759 If the register no larger than a word, the subreg must be lowpart.
760 If the register is larger than a word, the subreg must be the lowpart
761 of a subword. A subreg does *not* perform arbitrary bit extraction.
762 Given that we've already checked mode/offset alignment, we only have
763 to check subword subregs here. */
764 if (osize < UNITS_PER_WORD)
766 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
767 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
768 if (offset % UNITS_PER_WORD != low_off)
775 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
777 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
778 return gen_rtx_raw_SUBREG (mode, reg, offset);
781 /* Generate a SUBREG representing the least-significant part of REG if MODE
782 is smaller than mode of REG, otherwise paradoxical SUBREG. */
785 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
787 enum machine_mode inmode;
789 inmode = GET_MODE (reg);
790 if (inmode == VOIDmode)
792 return gen_rtx_SUBREG (mode, reg,
793 subreg_lowpart_offset (mode, inmode));
797 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
800 gen_rtvec (int n, ...)
808 /* Don't allocate an empty rtvec... */
812 rt_val = rtvec_alloc (n);
814 for (i = 0; i < n; i++)
815 rt_val->elem[i] = va_arg (p, rtx);
822 gen_rtvec_v (int n, rtx *argp)
827 /* Don't allocate an empty rtvec... */
831 rt_val = rtvec_alloc (n);
833 for (i = 0; i < n; i++)
834 rt_val->elem[i] = *argp++;
839 /* Return the number of bytes between the start of an OUTER_MODE
840 in-memory value and the start of an INNER_MODE in-memory value,
841 given that the former is a lowpart of the latter. It may be a
842 paradoxical lowpart, in which case the offset will be negative
843 on big-endian targets. */
846 byte_lowpart_offset (enum machine_mode outer_mode,
847 enum machine_mode inner_mode)
849 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
850 return subreg_lowpart_offset (outer_mode, inner_mode);
852 return -subreg_lowpart_offset (inner_mode, outer_mode);
855 /* Generate a REG rtx for a new pseudo register of mode MODE.
856 This pseudo is assigned the next sequential register number. */
859 gen_reg_rtx (enum machine_mode mode)
862 unsigned int align = GET_MODE_ALIGNMENT (mode);
864 gcc_assert (can_create_pseudo_p ());
866 /* If a virtual register with bigger mode alignment is generated,
867 increase stack alignment estimation because it might be spilled
869 if (SUPPORTS_STACK_ALIGNMENT
870 && crtl->stack_alignment_estimated < align
871 && !crtl->stack_realign_processed)
872 crtl->stack_alignment_estimated = align;
874 if (generating_concat_p
875 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
876 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
878 /* For complex modes, don't make a single pseudo.
879 Instead, make a CONCAT of two pseudos.
880 This allows noncontiguous allocation of the real and imaginary parts,
881 which makes much better code. Besides, allocating DCmode
882 pseudos overstrains reload on some machines like the 386. */
883 rtx realpart, imagpart;
884 enum machine_mode partmode = GET_MODE_INNER (mode);
886 realpart = gen_reg_rtx (partmode);
887 imagpart = gen_reg_rtx (partmode);
888 return gen_rtx_CONCAT (mode, realpart, imagpart);
891 /* Make sure regno_pointer_align, and regno_reg_rtx are large
892 enough to have an element for this pseudo reg number. */
894 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
896 int old_size = crtl->emit.regno_pointer_align_length;
900 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
901 memset (tmp + old_size, 0, old_size);
902 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
904 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
905 memset (new1 + old_size, 0, old_size * sizeof (rtx));
906 regno_reg_rtx = new1;
908 crtl->emit.regno_pointer_align_length = old_size * 2;
911 val = gen_raw_REG (mode, reg_rtx_no);
912 regno_reg_rtx[reg_rtx_no++] = val;
916 /* Update NEW with the same attributes as REG, but with OFFSET added
917 to the REG_OFFSET. */
920 update_reg_offset (rtx new_rtx, rtx reg, int offset)
922 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
923 REG_OFFSET (reg) + offset);
926 /* Generate a register with same attributes as REG, but with OFFSET
927 added to the REG_OFFSET. */
930 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
933 rtx new_rtx = gen_rtx_REG (mode, regno);
935 update_reg_offset (new_rtx, reg, offset);
939 /* Generate a new pseudo-register with the same attributes as REG, but
940 with OFFSET added to the REG_OFFSET. */
943 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
945 rtx new_rtx = gen_reg_rtx (mode);
947 update_reg_offset (new_rtx, reg, offset);
951 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
952 new register is a (possibly paradoxical) lowpart of the old one. */
955 adjust_reg_mode (rtx reg, enum machine_mode mode)
957 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
958 PUT_MODE (reg, mode);
961 /* Copy REG's attributes from X, if X has any attributes. If REG and X
962 have different modes, REG is a (possibly paradoxical) lowpart of X. */
965 set_reg_attrs_from_value (rtx reg, rtx x)
969 /* Hard registers can be reused for multiple purposes within the same
970 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
972 if (HARD_REGISTER_P (reg))
975 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
978 if (MEM_OFFSET (x) && GET_CODE (MEM_OFFSET (x)) == CONST_INT)
980 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
982 mark_reg_pointer (reg, 0);
987 update_reg_offset (reg, x, offset);
989 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
993 /* Generate a REG rtx for a new pseudo register, copying the mode
994 and attributes from X. */
997 gen_reg_rtx_and_attrs (rtx x)
999 rtx reg = gen_reg_rtx (GET_MODE (x));
1000 set_reg_attrs_from_value (reg, x);
1004 /* Set the register attributes for registers contained in PARM_RTX.
1005 Use needed values from memory attributes of MEM. */
1008 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1010 if (REG_P (parm_rtx))
1011 set_reg_attrs_from_value (parm_rtx, mem);
1012 else if (GET_CODE (parm_rtx) == PARALLEL)
1014 /* Check for a NULL entry in the first slot, used to indicate that the
1015 parameter goes both on the stack and in registers. */
1016 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1017 for (; i < XVECLEN (parm_rtx, 0); i++)
1019 rtx x = XVECEXP (parm_rtx, 0, i);
1020 if (REG_P (XEXP (x, 0)))
1021 REG_ATTRS (XEXP (x, 0))
1022 = get_reg_attrs (MEM_EXPR (mem),
1023 INTVAL (XEXP (x, 1)));
1028 /* Set the REG_ATTRS for registers in value X, given that X represents
1032 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1034 if (GET_CODE (x) == SUBREG)
1036 gcc_assert (subreg_lowpart_p (x));
1041 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1043 if (GET_CODE (x) == CONCAT)
1045 if (REG_P (XEXP (x, 0)))
1046 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1047 if (REG_P (XEXP (x, 1)))
1048 REG_ATTRS (XEXP (x, 1))
1049 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1051 if (GET_CODE (x) == PARALLEL)
1055 /* Check for a NULL entry, used to indicate that the parameter goes
1056 both on the stack and in registers. */
1057 if (XEXP (XVECEXP (x, 0, 0), 0))
1062 for (i = start; i < XVECLEN (x, 0); i++)
1064 rtx y = XVECEXP (x, 0, i);
1065 if (REG_P (XEXP (y, 0)))
1066 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1071 /* Assign the RTX X to declaration T. */
1074 set_decl_rtl (tree t, rtx x)
1076 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1078 set_reg_attrs_for_decl_rtl (t, x);
1081 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1082 if the ABI requires the parameter to be passed by reference. */
1085 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1087 DECL_INCOMING_RTL (t) = x;
1088 if (x && !by_reference_p)
1089 set_reg_attrs_for_decl_rtl (t, x);
1092 /* Identify REG (which may be a CONCAT) as a user register. */
1095 mark_user_reg (rtx reg)
1097 if (GET_CODE (reg) == CONCAT)
1099 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1100 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1104 gcc_assert (REG_P (reg));
1105 REG_USERVAR_P (reg) = 1;
1109 /* Identify REG as a probable pointer register and show its alignment
1110 as ALIGN, if nonzero. */
1113 mark_reg_pointer (rtx reg, int align)
1115 if (! REG_POINTER (reg))
1117 REG_POINTER (reg) = 1;
1120 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1122 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1123 /* We can no-longer be sure just how aligned this pointer is. */
1124 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1127 /* Return 1 plus largest pseudo reg number used in the current function. */
1135 /* Return 1 + the largest label number used so far in the current function. */
1138 max_label_num (void)
1143 /* Return first label number used in this function (if any were used). */
1146 get_first_label_num (void)
1148 return first_label_num;
1151 /* If the rtx for label was created during the expansion of a nested
1152 function, then first_label_num won't include this label number.
1153 Fix this now so that array indices work later. */
1156 maybe_set_first_label_num (rtx x)
1158 if (CODE_LABEL_NUMBER (x) < first_label_num)
1159 first_label_num = CODE_LABEL_NUMBER (x);
1162 /* Return a value representing some low-order bits of X, where the number
1163 of low-order bits is given by MODE. Note that no conversion is done
1164 between floating-point and fixed-point values, rather, the bit
1165 representation is returned.
1167 This function handles the cases in common between gen_lowpart, below,
1168 and two variants in cse.c and combine.c. These are the cases that can
1169 be safely handled at all points in the compilation.
1171 If this is not a case we can handle, return 0. */
1174 gen_lowpart_common (enum machine_mode mode, rtx x)
1176 int msize = GET_MODE_SIZE (mode);
1179 enum machine_mode innermode;
1181 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1182 so we have to make one up. Yuk. */
1183 innermode = GET_MODE (x);
1184 if (GET_CODE (x) == CONST_INT
1185 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1186 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1187 else if (innermode == VOIDmode)
1188 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1190 xsize = GET_MODE_SIZE (innermode);
1192 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1194 if (innermode == mode)
1197 /* MODE must occupy no more words than the mode of X. */
1198 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1199 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1202 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1203 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1206 offset = subreg_lowpart_offset (mode, innermode);
1208 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1209 && (GET_MODE_CLASS (mode) == MODE_INT
1210 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1212 /* If we are getting the low-order part of something that has been
1213 sign- or zero-extended, we can either just use the object being
1214 extended or make a narrower extension. If we want an even smaller
1215 piece than the size of the object being extended, call ourselves
1218 This case is used mostly by combine and cse. */
1220 if (GET_MODE (XEXP (x, 0)) == mode)
1222 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1223 return gen_lowpart_common (mode, XEXP (x, 0));
1224 else if (msize < xsize)
1225 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1227 else if (GET_CODE (x) == SUBREG || REG_P (x)
1228 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1229 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1230 return simplify_gen_subreg (mode, x, innermode, offset);
1232 /* Otherwise, we can't do this. */
1237 gen_highpart (enum machine_mode mode, rtx x)
1239 unsigned int msize = GET_MODE_SIZE (mode);
1242 /* This case loses if X is a subreg. To catch bugs early,
1243 complain if an invalid MODE is used even in other cases. */
1244 gcc_assert (msize <= UNITS_PER_WORD
1245 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1247 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1248 subreg_highpart_offset (mode, GET_MODE (x)));
1249 gcc_assert (result);
1251 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1252 the target if we have a MEM. gen_highpart must return a valid operand,
1253 emitting code if necessary to do so. */
1256 result = validize_mem (result);
1257 gcc_assert (result);
1263 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1264 be VOIDmode constant. */
1266 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1268 if (GET_MODE (exp) != VOIDmode)
1270 gcc_assert (GET_MODE (exp) == innermode);
1271 return gen_highpart (outermode, exp);
1273 return simplify_gen_subreg (outermode, exp, innermode,
1274 subreg_highpart_offset (outermode, innermode));
1277 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1280 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1282 unsigned int offset = 0;
1283 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1287 if (WORDS_BIG_ENDIAN)
1288 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1289 if (BYTES_BIG_ENDIAN)
1290 offset += difference % UNITS_PER_WORD;
1296 /* Return offset in bytes to get OUTERMODE high part
1297 of the value in mode INNERMODE stored in memory in target format. */
1299 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1301 unsigned int offset = 0;
1302 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1304 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1308 if (! WORDS_BIG_ENDIAN)
1309 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1310 if (! BYTES_BIG_ENDIAN)
1311 offset += difference % UNITS_PER_WORD;
1317 /* Return 1 iff X, assumed to be a SUBREG,
1318 refers to the least significant part of its containing reg.
1319 If X is not a SUBREG, always return 1 (it is its own low part!). */
1322 subreg_lowpart_p (const_rtx x)
1324 if (GET_CODE (x) != SUBREG)
1326 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1329 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1330 == SUBREG_BYTE (x));
1333 /* Return subword OFFSET of operand OP.
1334 The word number, OFFSET, is interpreted as the word number starting
1335 at the low-order address. OFFSET 0 is the low-order word if not
1336 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1338 If we cannot extract the required word, we return zero. Otherwise,
1339 an rtx corresponding to the requested word will be returned.
1341 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1342 reload has completed, a valid address will always be returned. After
1343 reload, if a valid address cannot be returned, we return zero.
1345 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1346 it is the responsibility of the caller.
1348 MODE is the mode of OP in case it is a CONST_INT.
1350 ??? This is still rather broken for some cases. The problem for the
1351 moment is that all callers of this thing provide no 'goal mode' to
1352 tell us to work with. This exists because all callers were written
1353 in a word based SUBREG world.
1354 Now use of this function can be deprecated by simplify_subreg in most
1359 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1361 if (mode == VOIDmode)
1362 mode = GET_MODE (op);
1364 gcc_assert (mode != VOIDmode);
1366 /* If OP is narrower than a word, fail. */
1368 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1371 /* If we want a word outside OP, return zero. */
1373 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1376 /* Form a new MEM at the requested address. */
1379 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1381 if (! validate_address)
1384 else if (reload_completed)
1386 if (! strict_memory_address_p (word_mode, XEXP (new_rtx, 0)))
1390 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1393 /* Rest can be handled by simplify_subreg. */
1394 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1397 /* Similar to `operand_subword', but never return 0. If we can't
1398 extract the required subword, put OP into a register and try again.
1399 The second attempt must succeed. We always validate the address in
1402 MODE is the mode of OP, in case it is CONST_INT. */
1405 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1407 rtx result = operand_subword (op, offset, 1, mode);
1412 if (mode != BLKmode && mode != VOIDmode)
1414 /* If this is a register which can not be accessed by words, copy it
1415 to a pseudo register. */
1417 op = copy_to_reg (op);
1419 op = force_reg (mode, op);
1422 result = operand_subword (op, offset, 1, mode);
1423 gcc_assert (result);
1428 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1429 or (2) a component ref of something variable. Represent the later with
1430 a NULL expression. */
1433 component_ref_for_mem_expr (tree ref)
1435 tree inner = TREE_OPERAND (ref, 0);
1437 if (TREE_CODE (inner) == COMPONENT_REF)
1438 inner = component_ref_for_mem_expr (inner);
1441 /* Now remove any conversions: they don't change what the underlying
1442 object is. Likewise for SAVE_EXPR. */
1443 while (CONVERT_EXPR_P (inner)
1444 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1445 || TREE_CODE (inner) == SAVE_EXPR)
1446 inner = TREE_OPERAND (inner, 0);
1448 if (! DECL_P (inner))
1452 if (inner == TREE_OPERAND (ref, 0))
1455 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1456 TREE_OPERAND (ref, 1), NULL_TREE);
1459 /* Returns 1 if both MEM_EXPR can be considered equal
1463 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1468 if (! expr1 || ! expr2)
1471 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1474 if (TREE_CODE (expr1) == COMPONENT_REF)
1476 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1477 TREE_OPERAND (expr2, 0))
1478 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1479 TREE_OPERAND (expr2, 1));
1481 if (INDIRECT_REF_P (expr1))
1482 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1483 TREE_OPERAND (expr2, 0));
1485 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1486 have been resolved here. */
1487 gcc_assert (DECL_P (expr1));
1489 /* Decls with different pointers can't be equal. */
1493 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1494 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1498 get_mem_align_offset (rtx mem, unsigned int align)
1501 unsigned HOST_WIDE_INT offset;
1503 /* This function can't use
1504 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1505 || !CONST_INT_P (MEM_OFFSET (mem))
1506 || (get_object_alignment (MEM_EXPR (mem), MEM_ALIGN (mem), align)
1510 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1512 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1513 for <variable>. get_inner_reference doesn't handle it and
1514 even if it did, the alignment in that case needs to be determined
1515 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1516 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1517 isn't sufficiently aligned, the object it is in might be. */
1518 gcc_assert (MEM_P (mem));
1519 expr = MEM_EXPR (mem);
1520 if (expr == NULL_TREE
1521 || MEM_OFFSET (mem) == NULL_RTX
1522 || !CONST_INT_P (MEM_OFFSET (mem)))
1525 offset = INTVAL (MEM_OFFSET (mem));
1528 if (DECL_ALIGN (expr) < align)
1531 else if (INDIRECT_REF_P (expr))
1533 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1536 else if (TREE_CODE (expr) == COMPONENT_REF)
1540 tree inner = TREE_OPERAND (expr, 0);
1541 tree field = TREE_OPERAND (expr, 1);
1542 tree byte_offset = component_ref_field_offset (expr);
1543 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1546 || !host_integerp (byte_offset, 1)
1547 || !host_integerp (bit_offset, 1))
1550 offset += tree_low_cst (byte_offset, 1);
1551 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1553 if (inner == NULL_TREE)
1555 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1556 < (unsigned int) align)
1560 else if (DECL_P (inner))
1562 if (DECL_ALIGN (inner) < align)
1566 else if (TREE_CODE (inner) != COMPONENT_REF)
1574 return offset & ((align / BITS_PER_UNIT) - 1);
1577 /* Given REF (a MEM) and T, either the type of X or the expression
1578 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1579 if we are making a new object of this type. BITPOS is nonzero if
1580 there is an offset outstanding on T that will be applied later. */
1583 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1584 HOST_WIDE_INT bitpos)
1586 alias_set_type alias = MEM_ALIAS_SET (ref);
1587 tree expr = MEM_EXPR (ref);
1588 rtx offset = MEM_OFFSET (ref);
1589 rtx size = MEM_SIZE (ref);
1590 unsigned int align = MEM_ALIGN (ref);
1591 HOST_WIDE_INT apply_bitpos = 0;
1594 /* It can happen that type_for_mode was given a mode for which there
1595 is no language-level type. In which case it returns NULL, which
1600 type = TYPE_P (t) ? t : TREE_TYPE (t);
1601 if (type == error_mark_node)
1604 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1605 wrong answer, as it assumes that DECL_RTL already has the right alias
1606 info. Callers should not set DECL_RTL until after the call to
1607 set_mem_attributes. */
1608 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1610 /* Get the alias set from the expression or type (perhaps using a
1611 front-end routine) and use it. */
1612 alias = get_alias_set (t);
1614 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1615 MEM_IN_STRUCT_P (ref)
1616 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1617 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1619 /* If we are making an object of this type, or if this is a DECL, we know
1620 that it is a scalar if the type is not an aggregate. */
1621 if ((objectp || DECL_P (t))
1622 && ! AGGREGATE_TYPE_P (type)
1623 && TREE_CODE (type) != COMPLEX_TYPE)
1624 MEM_SCALAR_P (ref) = 1;
1626 /* We can set the alignment from the type if we are making an object,
1627 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1628 if (objectp || TREE_CODE (t) == INDIRECT_REF
1629 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1630 || TYPE_ALIGN_OK (type))
1631 align = MAX (align, TYPE_ALIGN (type));
1633 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1635 if (integer_zerop (TREE_OPERAND (t, 1)))
1636 /* We don't know anything about the alignment. */
1637 align = BITS_PER_UNIT;
1639 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1642 /* If the size is known, we can set that. */
1643 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1644 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1646 /* If T is not a type, we may be able to deduce some more information about
1651 bool align_computed = false;
1653 if (TREE_THIS_VOLATILE (t))
1654 MEM_VOLATILE_P (ref) = 1;
1656 /* Now remove any conversions: they don't change what the underlying
1657 object is. Likewise for SAVE_EXPR. */
1658 while (CONVERT_EXPR_P (t)
1659 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1660 || TREE_CODE (t) == SAVE_EXPR)
1661 t = TREE_OPERAND (t, 0);
1663 /* We may look through structure-like accesses for the purposes of
1664 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1666 while (TREE_CODE (base) == COMPONENT_REF
1667 || TREE_CODE (base) == REALPART_EXPR
1668 || TREE_CODE (base) == IMAGPART_EXPR
1669 || TREE_CODE (base) == BIT_FIELD_REF)
1670 base = TREE_OPERAND (base, 0);
1674 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1675 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1677 MEM_NOTRAP_P (ref) = 1;
1680 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1682 base = get_base_address (base);
1683 if (base && DECL_P (base)
1684 && TREE_READONLY (base)
1685 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1687 tree base_type = TREE_TYPE (base);
1688 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1689 || DECL_ARTIFICIAL (base));
1690 MEM_READONLY_P (ref) = 1;
1693 /* If this expression uses it's parent's alias set, mark it such
1694 that we won't change it. */
1695 if (component_uses_parent_alias_set (t))
1696 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1698 /* If this is a decl, set the attributes of the MEM from it. */
1702 offset = const0_rtx;
1703 apply_bitpos = bitpos;
1704 size = (DECL_SIZE_UNIT (t)
1705 && host_integerp (DECL_SIZE_UNIT (t), 1)
1706 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1707 align = DECL_ALIGN (t);
1708 align_computed = true;
1711 /* If this is a constant, we know the alignment. */
1712 else if (CONSTANT_CLASS_P (t))
1714 align = TYPE_ALIGN (type);
1715 #ifdef CONSTANT_ALIGNMENT
1716 align = CONSTANT_ALIGNMENT (t, align);
1718 align_computed = true;
1721 /* If this is a field reference and not a bit-field, record it. */
1722 /* ??? There is some information that can be gleaned from bit-fields,
1723 such as the word offset in the structure that might be modified.
1724 But skip it for now. */
1725 else if (TREE_CODE (t) == COMPONENT_REF
1726 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1728 expr = component_ref_for_mem_expr (t);
1729 offset = const0_rtx;
1730 apply_bitpos = bitpos;
1731 /* ??? Any reason the field size would be different than
1732 the size we got from the type? */
1735 /* If this is an array reference, look for an outer field reference. */
1736 else if (TREE_CODE (t) == ARRAY_REF)
1738 tree off_tree = size_zero_node;
1739 /* We can't modify t, because we use it at the end of the
1745 tree index = TREE_OPERAND (t2, 1);
1746 tree low_bound = array_ref_low_bound (t2);
1747 tree unit_size = array_ref_element_size (t2);
1749 /* We assume all arrays have sizes that are a multiple of a byte.
1750 First subtract the lower bound, if any, in the type of the
1751 index, then convert to sizetype and multiply by the size of
1752 the array element. */
1753 if (! integer_zerop (low_bound))
1754 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1757 off_tree = size_binop (PLUS_EXPR,
1758 size_binop (MULT_EXPR,
1759 fold_convert (sizetype,
1763 t2 = TREE_OPERAND (t2, 0);
1765 while (TREE_CODE (t2) == ARRAY_REF);
1771 if (host_integerp (off_tree, 1))
1773 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1774 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1775 align = DECL_ALIGN (t2);
1776 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1778 align_computed = true;
1779 offset = GEN_INT (ioff);
1780 apply_bitpos = bitpos;
1783 else if (TREE_CODE (t2) == COMPONENT_REF)
1785 expr = component_ref_for_mem_expr (t2);
1786 if (host_integerp (off_tree, 1))
1788 offset = GEN_INT (tree_low_cst (off_tree, 1));
1789 apply_bitpos = bitpos;
1791 /* ??? Any reason the field size would be different than
1792 the size we got from the type? */
1794 else if (flag_argument_noalias > 1
1795 && (INDIRECT_REF_P (t2))
1796 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1803 /* If this is a Fortran indirect argument reference, record the
1805 else if (flag_argument_noalias > 1
1806 && (INDIRECT_REF_P (t))
1807 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1813 if (!align_computed && !INDIRECT_REF_P (t))
1815 unsigned int obj_align
1816 = get_object_alignment (t, align, BIGGEST_ALIGNMENT);
1817 align = MAX (align, obj_align);
1821 /* If we modified OFFSET based on T, then subtract the outstanding
1822 bit position offset. Similarly, increase the size of the accessed
1823 object to contain the negative offset. */
1826 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1828 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1831 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1833 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1834 we're overlapping. */
1839 /* Now set the attributes we computed above. */
1841 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1843 /* If this is already known to be a scalar or aggregate, we are done. */
1844 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1847 /* If it is a reference into an aggregate, this is part of an aggregate.
1848 Otherwise we don't know. */
1849 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1850 || TREE_CODE (t) == ARRAY_RANGE_REF
1851 || TREE_CODE (t) == BIT_FIELD_REF)
1852 MEM_IN_STRUCT_P (ref) = 1;
1856 set_mem_attributes (rtx ref, tree t, int objectp)
1858 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1861 /* Set the alias set of MEM to SET. */
1864 set_mem_alias_set (rtx mem, alias_set_type set)
1866 #ifdef ENABLE_CHECKING
1867 /* If the new and old alias sets don't conflict, something is wrong. */
1868 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1871 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1872 MEM_SIZE (mem), MEM_ALIGN (mem),
1876 /* Set the alignment of MEM to ALIGN bits. */
1879 set_mem_align (rtx mem, unsigned int align)
1881 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1882 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1886 /* Set the expr for MEM to EXPR. */
1889 set_mem_expr (rtx mem, tree expr)
1892 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1893 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1896 /* Set the offset of MEM to OFFSET. */
1899 set_mem_offset (rtx mem, rtx offset)
1901 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1902 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1906 /* Set the size of MEM to SIZE. */
1909 set_mem_size (rtx mem, rtx size)
1911 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1912 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1916 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1917 and its address changed to ADDR. (VOIDmode means don't change the mode.
1918 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1919 returned memory location is required to be valid. The memory
1920 attributes are not changed. */
1923 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1927 gcc_assert (MEM_P (memref));
1928 if (mode == VOIDmode)
1929 mode = GET_MODE (memref);
1931 addr = XEXP (memref, 0);
1932 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1933 && (!validate || memory_address_p (mode, addr)))
1938 if (reload_in_progress || reload_completed)
1939 gcc_assert (memory_address_p (mode, addr));
1941 addr = memory_address (mode, addr);
1944 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1947 new_rtx = gen_rtx_MEM (mode, addr);
1948 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1952 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1953 way we are changing MEMREF, so we only preserve the alias set. */
1956 change_address (rtx memref, enum machine_mode mode, rtx addr)
1958 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1959 enum machine_mode mmode = GET_MODE (new_rtx);
1962 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1963 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1965 /* If there are no changes, just return the original memory reference. */
1966 if (new_rtx == memref)
1968 if (MEM_ATTRS (memref) == 0
1969 || (MEM_EXPR (memref) == NULL
1970 && MEM_OFFSET (memref) == NULL
1971 && MEM_SIZE (memref) == size
1972 && MEM_ALIGN (memref) == align))
1975 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1976 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1980 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1985 /* Return a memory reference like MEMREF, but with its mode changed
1986 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1987 nonzero, the memory address is forced to be valid.
1988 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1989 and caller is responsible for adjusting MEMREF base register. */
1992 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1993 int validate, int adjust)
1995 rtx addr = XEXP (memref, 0);
1997 rtx memoffset = MEM_OFFSET (memref);
1999 unsigned int memalign = MEM_ALIGN (memref);
2002 /* If there are no changes, just return the original memory reference. */
2003 if (mode == GET_MODE (memref) && !offset
2004 && (!validate || memory_address_p (mode, addr)))
2007 /* ??? Prefer to create garbage instead of creating shared rtl.
2008 This may happen even if offset is nonzero -- consider
2009 (plus (plus reg reg) const_int) -- so do this always. */
2010 addr = copy_rtx (addr);
2012 /* Convert a possibly large offset to a signed value within the
2013 range of the target address space. */
2014 pbits = GET_MODE_BITSIZE (Pmode);
2015 if (HOST_BITS_PER_WIDE_INT > pbits)
2017 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2018 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2024 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2025 object, we can merge it into the LO_SUM. */
2026 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2028 && (unsigned HOST_WIDE_INT) offset
2029 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2030 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2031 plus_constant (XEXP (addr, 1), offset));
2033 addr = plus_constant (addr, offset);
2036 new_rtx = change_address_1 (memref, mode, addr, validate);
2038 /* If the address is a REG, change_address_1 rightfully returns memref,
2039 but this would destroy memref's MEM_ATTRS. */
2040 if (new_rtx == memref && offset != 0)
2041 new_rtx = copy_rtx (new_rtx);
2043 /* Compute the new values of the memory attributes due to this adjustment.
2044 We add the offsets and update the alignment. */
2046 memoffset = GEN_INT (offset + INTVAL (memoffset));
2048 /* Compute the new alignment by taking the MIN of the alignment and the
2049 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2054 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2056 /* We can compute the size in a number of ways. */
2057 if (GET_MODE (new_rtx) != BLKmode)
2058 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2059 else if (MEM_SIZE (memref))
2060 size = plus_constant (MEM_SIZE (memref), -offset);
2062 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2063 memoffset, size, memalign, GET_MODE (new_rtx));
2065 /* At some point, we should validate that this offset is within the object,
2066 if all the appropriate values are known. */
2070 /* Return a memory reference like MEMREF, but with its mode changed
2071 to MODE and its address changed to ADDR, which is assumed to be
2072 MEMREF offset by OFFSET bytes. If VALIDATE is
2073 nonzero, the memory address is forced to be valid. */
2076 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2077 HOST_WIDE_INT offset, int validate)
2079 memref = change_address_1 (memref, VOIDmode, addr, validate);
2080 return adjust_address_1 (memref, mode, offset, validate, 0);
2083 /* Return a memory reference like MEMREF, but whose address is changed by
2084 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2085 known to be in OFFSET (possibly 1). */
2088 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2090 rtx new_rtx, addr = XEXP (memref, 0);
2092 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2094 /* At this point we don't know _why_ the address is invalid. It
2095 could have secondary memory references, multiplies or anything.
2097 However, if we did go and rearrange things, we can wind up not
2098 being able to recognize the magic around pic_offset_table_rtx.
2099 This stuff is fragile, and is yet another example of why it is
2100 bad to expose PIC machinery too early. */
2101 if (! memory_address_p (GET_MODE (memref), new_rtx)
2102 && GET_CODE (addr) == PLUS
2103 && XEXP (addr, 0) == pic_offset_table_rtx)
2105 addr = force_reg (GET_MODE (addr), addr);
2106 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2109 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2110 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2112 /* If there are no changes, just return the original memory reference. */
2113 if (new_rtx == memref)
2116 /* Update the alignment to reflect the offset. Reset the offset, which
2119 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2120 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2121 GET_MODE (new_rtx));
2125 /* Return a memory reference like MEMREF, but with its address changed to
2126 ADDR. The caller is asserting that the actual piece of memory pointed
2127 to is the same, just the form of the address is being changed, such as
2128 by putting something into a register. */
2131 replace_equiv_address (rtx memref, rtx addr)
2133 /* change_address_1 copies the memory attribute structure without change
2134 and that's exactly what we want here. */
2135 update_temp_slot_address (XEXP (memref, 0), addr);
2136 return change_address_1 (memref, VOIDmode, addr, 1);
2139 /* Likewise, but the reference is not required to be valid. */
2142 replace_equiv_address_nv (rtx memref, rtx addr)
2144 return change_address_1 (memref, VOIDmode, addr, 0);
2147 /* Return a memory reference like MEMREF, but with its mode widened to
2148 MODE and offset by OFFSET. This would be used by targets that e.g.
2149 cannot issue QImode memory operations and have to use SImode memory
2150 operations plus masking logic. */
2153 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2155 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2156 tree expr = MEM_EXPR (new_rtx);
2157 rtx memoffset = MEM_OFFSET (new_rtx);
2158 unsigned int size = GET_MODE_SIZE (mode);
2160 /* If there are no changes, just return the original memory reference. */
2161 if (new_rtx == memref)
2164 /* If we don't know what offset we were at within the expression, then
2165 we can't know if we've overstepped the bounds. */
2171 if (TREE_CODE (expr) == COMPONENT_REF)
2173 tree field = TREE_OPERAND (expr, 1);
2174 tree offset = component_ref_field_offset (expr);
2176 if (! DECL_SIZE_UNIT (field))
2182 /* Is the field at least as large as the access? If so, ok,
2183 otherwise strip back to the containing structure. */
2184 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2185 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2186 && INTVAL (memoffset) >= 0)
2189 if (! host_integerp (offset, 1))
2195 expr = TREE_OPERAND (expr, 0);
2197 = (GEN_INT (INTVAL (memoffset)
2198 + tree_low_cst (offset, 1)
2199 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2202 /* Similarly for the decl. */
2203 else if (DECL_P (expr)
2204 && DECL_SIZE_UNIT (expr)
2205 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2206 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2207 && (! memoffset || INTVAL (memoffset) >= 0))
2211 /* The widened memory access overflows the expression, which means
2212 that it could alias another expression. Zap it. */
2219 memoffset = NULL_RTX;
2221 /* The widened memory may alias other stuff, so zap the alias set. */
2222 /* ??? Maybe use get_alias_set on any remaining expression. */
2224 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2225 MEM_ALIGN (new_rtx), mode);
2230 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2231 static GTY(()) tree spill_slot_decl;
2234 get_spill_slot_decl (bool force_build_p)
2236 tree d = spill_slot_decl;
2239 if (d || !force_build_p)
2242 d = build_decl (VAR_DECL, get_identifier ("%sfp"), void_type_node);
2243 DECL_ARTIFICIAL (d) = 1;
2244 DECL_IGNORED_P (d) = 1;
2246 TREE_THIS_NOTRAP (d) = 1;
2247 spill_slot_decl = d;
2249 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2250 MEM_NOTRAP_P (rd) = 1;
2251 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2252 NULL_RTX, 0, BLKmode);
2253 SET_DECL_RTL (d, rd);
2258 /* Given MEM, a result from assign_stack_local, fill in the memory
2259 attributes as appropriate for a register allocator spill slot.
2260 These slots are not aliasable by other memory. We arrange for
2261 them all to use a single MEM_EXPR, so that the aliasing code can
2262 work properly in the case of shared spill slots. */
2265 set_mem_attrs_for_spill (rtx mem)
2267 alias_set_type alias;
2271 expr = get_spill_slot_decl (true);
2272 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2274 /* We expect the incoming memory to be of the form:
2275 (mem:MODE (plus (reg sfp) (const_int offset)))
2276 with perhaps the plus missing for offset = 0. */
2277 addr = XEXP (mem, 0);
2278 offset = const0_rtx;
2279 if (GET_CODE (addr) == PLUS
2280 && GET_CODE (XEXP (addr, 1)) == CONST_INT)
2281 offset = XEXP (addr, 1);
2283 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2284 MEM_SIZE (mem), MEM_ALIGN (mem),
2286 MEM_NOTRAP_P (mem) = 1;
2289 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2292 gen_label_rtx (void)
2294 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2295 NULL, label_num++, NULL);
2298 /* For procedure integration. */
2300 /* Install new pointers to the first and last insns in the chain.
2301 Also, set cur_insn_uid to one higher than the last in use.
2302 Used for an inline-procedure after copying the insn chain. */
2305 set_new_first_and_last_insn (rtx first, rtx last)
2313 for (insn = first; insn; insn = NEXT_INSN (insn))
2314 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2319 /* Go through all the RTL insn bodies and copy any invalid shared
2320 structure. This routine should only be called once. */
2323 unshare_all_rtl_1 (rtx insn)
2325 /* Unshare just about everything else. */
2326 unshare_all_rtl_in_chain (insn);
2328 /* Make sure the addresses of stack slots found outside the insn chain
2329 (such as, in DECL_RTL of a variable) are not shared
2330 with the insn chain.
2332 This special care is necessary when the stack slot MEM does not
2333 actually appear in the insn chain. If it does appear, its address
2334 is unshared from all else at that point. */
2335 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2338 /* Go through all the RTL insn bodies and copy any invalid shared
2339 structure, again. This is a fairly expensive thing to do so it
2340 should be done sparingly. */
2343 unshare_all_rtl_again (rtx insn)
2348 for (p = insn; p; p = NEXT_INSN (p))
2351 reset_used_flags (PATTERN (p));
2352 reset_used_flags (REG_NOTES (p));
2355 /* Make sure that virtual stack slots are not shared. */
2356 set_used_decls (DECL_INITIAL (cfun->decl));
2358 /* Make sure that virtual parameters are not shared. */
2359 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2360 set_used_flags (DECL_RTL (decl));
2362 reset_used_flags (stack_slot_list);
2364 unshare_all_rtl_1 (insn);
2368 unshare_all_rtl (void)
2370 unshare_all_rtl_1 (get_insns ());
2374 struct rtl_opt_pass pass_unshare_all_rtl =
2378 "unshare", /* name */
2380 unshare_all_rtl, /* execute */
2383 0, /* static_pass_number */
2384 TV_NONE, /* tv_id */
2385 0, /* properties_required */
2386 0, /* properties_provided */
2387 0, /* properties_destroyed */
2388 0, /* todo_flags_start */
2389 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2394 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2395 Recursively does the same for subexpressions. */
2398 verify_rtx_sharing (rtx orig, rtx insn)
2403 const char *format_ptr;
2408 code = GET_CODE (x);
2410 /* These types may be freely shared. */
2426 /* SCRATCH must be shared because they represent distinct values. */
2428 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2433 if (shared_const_p (orig))
2438 /* A MEM is allowed to be shared if its address is constant. */
2439 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2440 || reload_completed || reload_in_progress)
2449 /* This rtx may not be shared. If it has already been seen,
2450 replace it with a copy of itself. */
2451 #ifdef ENABLE_CHECKING
2452 if (RTX_FLAG (x, used))
2454 error ("invalid rtl sharing found in the insn");
2456 error ("shared rtx");
2458 internal_error ("internal consistency failure");
2461 gcc_assert (!RTX_FLAG (x, used));
2463 RTX_FLAG (x, used) = 1;
2465 /* Now scan the subexpressions recursively. */
2467 format_ptr = GET_RTX_FORMAT (code);
2469 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2471 switch (*format_ptr++)
2474 verify_rtx_sharing (XEXP (x, i), insn);
2478 if (XVEC (x, i) != NULL)
2481 int len = XVECLEN (x, i);
2483 for (j = 0; j < len; j++)
2485 /* We allow sharing of ASM_OPERANDS inside single
2487 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2488 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2490 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2492 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2501 /* Go through all the RTL insn bodies and check that there is no unexpected
2502 sharing in between the subexpressions. */
2505 verify_rtl_sharing (void)
2509 for (p = get_insns (); p; p = NEXT_INSN (p))
2512 reset_used_flags (PATTERN (p));
2513 reset_used_flags (REG_NOTES (p));
2514 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2517 rtx q, sequence = PATTERN (p);
2519 for (i = 0; i < XVECLEN (sequence, 0); i++)
2521 q = XVECEXP (sequence, 0, i);
2522 gcc_assert (INSN_P (q));
2523 reset_used_flags (PATTERN (q));
2524 reset_used_flags (REG_NOTES (q));
2529 for (p = get_insns (); p; p = NEXT_INSN (p))
2532 verify_rtx_sharing (PATTERN (p), p);
2533 verify_rtx_sharing (REG_NOTES (p), p);
2537 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2538 Assumes the mark bits are cleared at entry. */
2541 unshare_all_rtl_in_chain (rtx insn)
2543 for (; insn; insn = NEXT_INSN (insn))
2546 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2547 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2551 /* Go through all virtual stack slots of a function and mark them as
2552 shared. We never replace the DECL_RTLs themselves with a copy,
2553 but expressions mentioned into a DECL_RTL cannot be shared with
2554 expressions in the instruction stream.
2556 Note that reload may convert pseudo registers into memories in-place.
2557 Pseudo registers are always shared, but MEMs never are. Thus if we
2558 reset the used flags on MEMs in the instruction stream, we must set
2559 them again on MEMs that appear in DECL_RTLs. */
2562 set_used_decls (tree blk)
2567 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2568 if (DECL_RTL_SET_P (t))
2569 set_used_flags (DECL_RTL (t));
2571 /* Now process sub-blocks. */
2572 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2576 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2577 Recursively does the same for subexpressions. Uses
2578 copy_rtx_if_shared_1 to reduce stack space. */
2581 copy_rtx_if_shared (rtx orig)
2583 copy_rtx_if_shared_1 (&orig);
2587 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2588 use. Recursively does the same for subexpressions. */
2591 copy_rtx_if_shared_1 (rtx *orig1)
2597 const char *format_ptr;
2601 /* Repeat is used to turn tail-recursion into iteration. */
2608 code = GET_CODE (x);
2610 /* These types may be freely shared. */
2625 /* SCRATCH must be shared because they represent distinct values. */
2628 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2633 if (shared_const_p (x))
2642 /* The chain of insns is not being copied. */
2649 /* This rtx may not be shared. If it has already been seen,
2650 replace it with a copy of itself. */
2652 if (RTX_FLAG (x, used))
2654 x = shallow_copy_rtx (x);
2657 RTX_FLAG (x, used) = 1;
2659 /* Now scan the subexpressions recursively.
2660 We can store any replaced subexpressions directly into X
2661 since we know X is not shared! Any vectors in X
2662 must be copied if X was copied. */
2664 format_ptr = GET_RTX_FORMAT (code);
2665 length = GET_RTX_LENGTH (code);
2668 for (i = 0; i < length; i++)
2670 switch (*format_ptr++)
2674 copy_rtx_if_shared_1 (last_ptr);
2675 last_ptr = &XEXP (x, i);
2679 if (XVEC (x, i) != NULL)
2682 int len = XVECLEN (x, i);
2684 /* Copy the vector iff I copied the rtx and the length
2686 if (copied && len > 0)
2687 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2689 /* Call recursively on all inside the vector. */
2690 for (j = 0; j < len; j++)
2693 copy_rtx_if_shared_1 (last_ptr);
2694 last_ptr = &XVECEXP (x, i, j);
2709 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2710 to look for shared sub-parts. */
2713 reset_used_flags (rtx x)
2717 const char *format_ptr;
2720 /* Repeat is used to turn tail-recursion into iteration. */
2725 code = GET_CODE (x);
2727 /* These types may be freely shared so we needn't do any resetting
2749 /* The chain of insns is not being copied. */
2756 RTX_FLAG (x, used) = 0;
2758 format_ptr = GET_RTX_FORMAT (code);
2759 length = GET_RTX_LENGTH (code);
2761 for (i = 0; i < length; i++)
2763 switch (*format_ptr++)
2771 reset_used_flags (XEXP (x, i));
2775 for (j = 0; j < XVECLEN (x, i); j++)
2776 reset_used_flags (XVECEXP (x, i, j));
2782 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2783 to look for shared sub-parts. */
2786 set_used_flags (rtx x)
2790 const char *format_ptr;
2795 code = GET_CODE (x);
2797 /* These types may be freely shared so we needn't do any resetting
2819 /* The chain of insns is not being copied. */
2826 RTX_FLAG (x, used) = 1;
2828 format_ptr = GET_RTX_FORMAT (code);
2829 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2831 switch (*format_ptr++)
2834 set_used_flags (XEXP (x, i));
2838 for (j = 0; j < XVECLEN (x, i); j++)
2839 set_used_flags (XVECEXP (x, i, j));
2845 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2846 Return X or the rtx for the pseudo reg the value of X was copied into.
2847 OTHER must be valid as a SET_DEST. */
2850 make_safe_from (rtx x, rtx other)
2853 switch (GET_CODE (other))
2856 other = SUBREG_REG (other);
2858 case STRICT_LOW_PART:
2861 other = XEXP (other, 0);
2870 && GET_CODE (x) != SUBREG)
2872 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2873 || reg_mentioned_p (other, x))))
2875 rtx temp = gen_reg_rtx (GET_MODE (x));
2876 emit_move_insn (temp, x);
2882 /* Emission of insns (adding them to the doubly-linked list). */
2884 /* Return the first insn of the current sequence or current function. */
2892 /* Specify a new insn as the first in the chain. */
2895 set_first_insn (rtx insn)
2897 gcc_assert (!PREV_INSN (insn));
2901 /* Return the last insn emitted in current sequence or current function. */
2904 get_last_insn (void)
2909 /* Specify a new insn as the last in the chain. */
2912 set_last_insn (rtx insn)
2914 gcc_assert (!NEXT_INSN (insn));
2918 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2921 get_last_insn_anywhere (void)
2923 struct sequence_stack *stack;
2926 for (stack = seq_stack; stack; stack = stack->next)
2927 if (stack->last != 0)
2932 /* Return the first nonnote insn emitted in current sequence or current
2933 function. This routine looks inside SEQUENCEs. */
2936 get_first_nonnote_insn (void)
2938 rtx insn = first_insn;
2943 for (insn = next_insn (insn);
2944 insn && NOTE_P (insn);
2945 insn = next_insn (insn))
2949 if (NONJUMP_INSN_P (insn)
2950 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2951 insn = XVECEXP (PATTERN (insn), 0, 0);
2958 /* Return the last nonnote insn emitted in current sequence or current
2959 function. This routine looks inside SEQUENCEs. */
2962 get_last_nonnote_insn (void)
2964 rtx insn = last_insn;
2969 for (insn = previous_insn (insn);
2970 insn && NOTE_P (insn);
2971 insn = previous_insn (insn))
2975 if (NONJUMP_INSN_P (insn)
2976 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2977 insn = XVECEXP (PATTERN (insn), 0,
2978 XVECLEN (PATTERN (insn), 0) - 1);
2985 /* Return a number larger than any instruction's uid in this function. */
2990 return cur_insn_uid;
2993 /* Return the next insn. If it is a SEQUENCE, return the first insn
2997 next_insn (rtx insn)
3001 insn = NEXT_INSN (insn);
3002 if (insn && NONJUMP_INSN_P (insn)
3003 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3004 insn = XVECEXP (PATTERN (insn), 0, 0);
3010 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3014 previous_insn (rtx insn)
3018 insn = PREV_INSN (insn);
3019 if (insn && NONJUMP_INSN_P (insn)
3020 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3021 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3027 /* Return the next insn after INSN that is not a NOTE. This routine does not
3028 look inside SEQUENCEs. */
3031 next_nonnote_insn (rtx insn)
3035 insn = NEXT_INSN (insn);
3036 if (insn == 0 || !NOTE_P (insn))
3043 /* Return the previous insn before INSN that is not a NOTE. This routine does
3044 not look inside SEQUENCEs. */
3047 prev_nonnote_insn (rtx insn)
3051 insn = PREV_INSN (insn);
3052 if (insn == 0 || !NOTE_P (insn))
3059 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3060 or 0, if there is none. This routine does not look inside
3064 next_real_insn (rtx insn)
3068 insn = NEXT_INSN (insn);
3069 if (insn == 0 || INSN_P (insn))
3076 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3077 or 0, if there is none. This routine does not look inside
3081 prev_real_insn (rtx insn)
3085 insn = PREV_INSN (insn);
3086 if (insn == 0 || INSN_P (insn))
3093 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3094 This routine does not look inside SEQUENCEs. */
3097 last_call_insn (void)
3101 for (insn = get_last_insn ();
3102 insn && !CALL_P (insn);
3103 insn = PREV_INSN (insn))
3109 /* Find the next insn after INSN that really does something. This routine
3110 does not look inside SEQUENCEs. Until reload has completed, this is the
3111 same as next_real_insn. */
3114 active_insn_p (const_rtx insn)
3116 return (CALL_P (insn) || JUMP_P (insn)
3117 || (NONJUMP_INSN_P (insn)
3118 && (! reload_completed
3119 || (GET_CODE (PATTERN (insn)) != USE
3120 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3124 next_active_insn (rtx insn)
3128 insn = NEXT_INSN (insn);
3129 if (insn == 0 || active_insn_p (insn))
3136 /* Find the last insn before INSN that really does something. This routine
3137 does not look inside SEQUENCEs. Until reload has completed, this is the
3138 same as prev_real_insn. */
3141 prev_active_insn (rtx insn)
3145 insn = PREV_INSN (insn);
3146 if (insn == 0 || active_insn_p (insn))
3153 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3156 next_label (rtx insn)
3160 insn = NEXT_INSN (insn);
3161 if (insn == 0 || LABEL_P (insn))
3168 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3171 prev_label (rtx insn)
3175 insn = PREV_INSN (insn);
3176 if (insn == 0 || LABEL_P (insn))
3183 /* Return the last label to mark the same position as LABEL. Return null
3184 if LABEL itself is null. */
3187 skip_consecutive_labels (rtx label)
3191 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3199 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3200 and REG_CC_USER notes so we can find it. */
3203 link_cc0_insns (rtx insn)
3205 rtx user = next_nonnote_insn (insn);
3207 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3208 user = XVECEXP (PATTERN (user), 0, 0);
3210 add_reg_note (user, REG_CC_SETTER, insn);
3211 add_reg_note (insn, REG_CC_USER, user);
3214 /* Return the next insn that uses CC0 after INSN, which is assumed to
3215 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3216 applied to the result of this function should yield INSN).
3218 Normally, this is simply the next insn. However, if a REG_CC_USER note
3219 is present, it contains the insn that uses CC0.
3221 Return 0 if we can't find the insn. */
3224 next_cc0_user (rtx insn)
3226 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3229 return XEXP (note, 0);
3231 insn = next_nonnote_insn (insn);
3232 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3233 insn = XVECEXP (PATTERN (insn), 0, 0);
3235 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3241 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3242 note, it is the previous insn. */
3245 prev_cc0_setter (rtx insn)
3247 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3250 return XEXP (note, 0);
3252 insn = prev_nonnote_insn (insn);
3253 gcc_assert (sets_cc0_p (PATTERN (insn)));
3260 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3263 find_auto_inc (rtx *xp, void *data)
3266 rtx reg = (rtx) data;
3268 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3271 switch (GET_CODE (x))
3279 if (rtx_equal_p (reg, XEXP (x, 0)))
3290 /* Increment the label uses for all labels present in rtx. */
3293 mark_label_nuses (rtx x)
3299 code = GET_CODE (x);
3300 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3301 LABEL_NUSES (XEXP (x, 0))++;
3303 fmt = GET_RTX_FORMAT (code);
3304 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3307 mark_label_nuses (XEXP (x, i));
3308 else if (fmt[i] == 'E')
3309 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3310 mark_label_nuses (XVECEXP (x, i, j));
3315 /* Try splitting insns that can be split for better scheduling.
3316 PAT is the pattern which might split.
3317 TRIAL is the insn providing PAT.
3318 LAST is nonzero if we should return the last insn of the sequence produced.
3320 If this routine succeeds in splitting, it returns the first or last
3321 replacement insn depending on the value of LAST. Otherwise, it
3322 returns TRIAL. If the insn to be returned can be split, it will be. */
3325 try_split (rtx pat, rtx trial, int last)
3327 rtx before = PREV_INSN (trial);
3328 rtx after = NEXT_INSN (trial);
3329 int has_barrier = 0;
3332 rtx insn_last, insn;
3335 if (any_condjump_p (trial)
3336 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3337 split_branch_probability = INTVAL (XEXP (note, 0));
3338 probability = split_branch_probability;
3340 seq = split_insns (pat, trial);
3342 split_branch_probability = -1;
3344 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3345 We may need to handle this specially. */
3346 if (after && BARRIER_P (after))
3349 after = NEXT_INSN (after);
3355 /* Avoid infinite loop if any insn of the result matches
3356 the original pattern. */
3360 if (INSN_P (insn_last)
3361 && rtx_equal_p (PATTERN (insn_last), pat))
3363 if (!NEXT_INSN (insn_last))
3365 insn_last = NEXT_INSN (insn_last);
3368 /* We will be adding the new sequence to the function. The splitters
3369 may have introduced invalid RTL sharing, so unshare the sequence now. */
3370 unshare_all_rtl_in_chain (seq);
3373 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3377 mark_jump_label (PATTERN (insn), insn, 0);
3379 if (probability != -1
3380 && any_condjump_p (insn)
3381 && !find_reg_note (insn, REG_BR_PROB, 0))
3383 /* We can preserve the REG_BR_PROB notes only if exactly
3384 one jump is created, otherwise the machine description
3385 is responsible for this step using
3386 split_branch_probability variable. */
3387 gcc_assert (njumps == 1);
3388 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3393 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3394 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3397 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3400 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3403 *p = CALL_INSN_FUNCTION_USAGE (trial);
3404 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3408 /* Copy notes, particularly those related to the CFG. */
3409 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3411 switch (REG_NOTE_KIND (note))
3414 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3417 || (flag_non_call_exceptions && INSN_P (insn)
3418 && may_trap_p (PATTERN (insn))))
3419 add_reg_note (insn, REG_EH_REGION, XEXP (note, 0));
3425 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3428 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3432 case REG_NON_LOCAL_GOTO:
3433 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3436 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3442 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3444 rtx reg = XEXP (note, 0);
3445 if (!FIND_REG_INC_NOTE (insn, reg)
3446 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3447 add_reg_note (insn, REG_INC, reg);
3457 /* If there are LABELS inside the split insns increment the
3458 usage count so we don't delete the label. */
3462 while (insn != NULL_RTX)
3464 /* JUMP_P insns have already been "marked" above. */
3465 if (NONJUMP_INSN_P (insn))
3466 mark_label_nuses (PATTERN (insn));
3468 insn = PREV_INSN (insn);
3472 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3474 delete_insn (trial);
3476 emit_barrier_after (tem);
3478 /* Recursively call try_split for each new insn created; by the
3479 time control returns here that insn will be fully split, so
3480 set LAST and continue from the insn after the one returned.
3481 We can't use next_active_insn here since AFTER may be a note.
3482 Ignore deleted insns, which can be occur if not optimizing. */
3483 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3484 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3485 tem = try_split (PATTERN (tem), tem, 1);
3487 /* Return either the first or the last insn, depending on which was
3490 ? (after ? PREV_INSN (after) : last_insn)
3491 : NEXT_INSN (before);
3494 /* Make and return an INSN rtx, initializing all its slots.
3495 Store PATTERN in the pattern slots. */
3498 make_insn_raw (rtx pattern)
3502 insn = rtx_alloc (INSN);
3504 INSN_UID (insn) = cur_insn_uid++;
3505 PATTERN (insn) = pattern;
3506 INSN_CODE (insn) = -1;
3507 REG_NOTES (insn) = NULL;
3508 INSN_LOCATOR (insn) = curr_insn_locator ();
3509 BLOCK_FOR_INSN (insn) = NULL;
3511 #ifdef ENABLE_RTL_CHECKING
3514 && (returnjump_p (insn)
3515 || (GET_CODE (insn) == SET
3516 && SET_DEST (insn) == pc_rtx)))
3518 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3526 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3529 make_jump_insn_raw (rtx pattern)
3533 insn = rtx_alloc (JUMP_INSN);
3534 INSN_UID (insn) = cur_insn_uid++;
3536 PATTERN (insn) = pattern;
3537 INSN_CODE (insn) = -1;
3538 REG_NOTES (insn) = NULL;
3539 JUMP_LABEL (insn) = NULL;
3540 INSN_LOCATOR (insn) = curr_insn_locator ();
3541 BLOCK_FOR_INSN (insn) = NULL;
3546 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3549 make_call_insn_raw (rtx pattern)
3553 insn = rtx_alloc (CALL_INSN);
3554 INSN_UID (insn) = cur_insn_uid++;
3556 PATTERN (insn) = pattern;
3557 INSN_CODE (insn) = -1;
3558 REG_NOTES (insn) = NULL;
3559 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3560 INSN_LOCATOR (insn) = curr_insn_locator ();
3561 BLOCK_FOR_INSN (insn) = NULL;
3566 /* Add INSN to the end of the doubly-linked list.
3567 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3572 PREV_INSN (insn) = last_insn;
3573 NEXT_INSN (insn) = 0;
3575 if (NULL != last_insn)
3576 NEXT_INSN (last_insn) = insn;
3578 if (NULL == first_insn)
3584 /* Add INSN into the doubly-linked list after insn AFTER. This and
3585 the next should be the only functions called to insert an insn once
3586 delay slots have been filled since only they know how to update a
3590 add_insn_after (rtx insn, rtx after, basic_block bb)
3592 rtx next = NEXT_INSN (after);
3594 gcc_assert (!optimize || !INSN_DELETED_P (after));
3596 NEXT_INSN (insn) = next;
3597 PREV_INSN (insn) = after;
3601 PREV_INSN (next) = insn;
3602 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3603 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3605 else if (last_insn == after)
3609 struct sequence_stack *stack = seq_stack;
3610 /* Scan all pending sequences too. */
3611 for (; stack; stack = stack->next)
3612 if (after == stack->last)
3621 if (!BARRIER_P (after)
3622 && !BARRIER_P (insn)
3623 && (bb = BLOCK_FOR_INSN (after)))
3625 set_block_for_insn (insn, bb);
3627 df_insn_rescan (insn);
3628 /* Should not happen as first in the BB is always
3629 either NOTE or LABEL. */
3630 if (BB_END (bb) == after
3631 /* Avoid clobbering of structure when creating new BB. */
3632 && !BARRIER_P (insn)
3633 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3637 NEXT_INSN (after) = insn;
3638 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3640 rtx sequence = PATTERN (after);
3641 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3645 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3646 the previous should be the only functions called to insert an insn
3647 once delay slots have been filled since only they know how to
3648 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3652 add_insn_before (rtx insn, rtx before, basic_block bb)
3654 rtx prev = PREV_INSN (before);
3656 gcc_assert (!optimize || !INSN_DELETED_P (before));
3658 PREV_INSN (insn) = prev;
3659 NEXT_INSN (insn) = before;
3663 NEXT_INSN (prev) = insn;
3664 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3666 rtx sequence = PATTERN (prev);
3667 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3670 else if (first_insn == before)
3674 struct sequence_stack *stack = seq_stack;
3675 /* Scan all pending sequences too. */
3676 for (; stack; stack = stack->next)
3677 if (before == stack->first)
3679 stack->first = insn;
3687 && !BARRIER_P (before)
3688 && !BARRIER_P (insn))
3689 bb = BLOCK_FOR_INSN (before);
3693 set_block_for_insn (insn, bb);
3695 df_insn_rescan (insn);
3696 /* Should not happen as first in the BB is always either NOTE or
3698 gcc_assert (BB_HEAD (bb) != insn
3699 /* Avoid clobbering of structure when creating new BB. */
3701 || NOTE_INSN_BASIC_BLOCK_P (insn));
3704 PREV_INSN (before) = insn;
3705 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3706 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3710 /* Replace insn with an deleted instruction note. */
3713 set_insn_deleted (rtx insn)
3715 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3716 PUT_CODE (insn, NOTE);
3717 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3721 /* Remove an insn from its doubly-linked list. This function knows how
3722 to handle sequences. */
3724 remove_insn (rtx insn)
3726 rtx next = NEXT_INSN (insn);
3727 rtx prev = PREV_INSN (insn);
3730 /* Later in the code, the block will be marked dirty. */
3731 df_insn_delete (NULL, INSN_UID (insn));
3735 NEXT_INSN (prev) = next;
3736 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3738 rtx sequence = PATTERN (prev);
3739 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3742 else if (first_insn == insn)
3746 struct sequence_stack *stack = seq_stack;
3747 /* Scan all pending sequences too. */
3748 for (; stack; stack = stack->next)
3749 if (insn == stack->first)
3751 stack->first = next;
3760 PREV_INSN (next) = prev;
3761 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3762 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3764 else if (last_insn == insn)
3768 struct sequence_stack *stack = seq_stack;
3769 /* Scan all pending sequences too. */
3770 for (; stack; stack = stack->next)
3771 if (insn == stack->last)
3779 if (!BARRIER_P (insn)
3780 && (bb = BLOCK_FOR_INSN (insn)))
3783 df_set_bb_dirty (bb);
3784 if (BB_HEAD (bb) == insn)
3786 /* Never ever delete the basic block note without deleting whole
3788 gcc_assert (!NOTE_P (insn));
3789 BB_HEAD (bb) = next;
3791 if (BB_END (bb) == insn)
3796 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3799 add_function_usage_to (rtx call_insn, rtx call_fusage)
3801 gcc_assert (call_insn && CALL_P (call_insn));
3803 /* Put the register usage information on the CALL. If there is already
3804 some usage information, put ours at the end. */
3805 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3809 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3810 link = XEXP (link, 1))
3813 XEXP (link, 1) = call_fusage;
3816 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3819 /* Delete all insns made since FROM.
3820 FROM becomes the new last instruction. */
3823 delete_insns_since (rtx from)
3828 NEXT_INSN (from) = 0;
3832 /* This function is deprecated, please use sequences instead.
3834 Move a consecutive bunch of insns to a different place in the chain.
3835 The insns to be moved are those between FROM and TO.
3836 They are moved to a new position after the insn AFTER.
3837 AFTER must not be FROM or TO or any insn in between.
3839 This function does not know about SEQUENCEs and hence should not be
3840 called after delay-slot filling has been done. */
3843 reorder_insns_nobb (rtx from, rtx to, rtx after)
3845 /* Splice this bunch out of where it is now. */
3846 if (PREV_INSN (from))
3847 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3849 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3850 if (last_insn == to)
3851 last_insn = PREV_INSN (from);
3852 if (first_insn == from)
3853 first_insn = NEXT_INSN (to);
3855 /* Make the new neighbors point to it and it to them. */
3856 if (NEXT_INSN (after))
3857 PREV_INSN (NEXT_INSN (after)) = to;
3859 NEXT_INSN (to) = NEXT_INSN (after);
3860 PREV_INSN (from) = after;
3861 NEXT_INSN (after) = from;
3862 if (after == last_insn)
3866 /* Same as function above, but take care to update BB boundaries. */
3868 reorder_insns (rtx from, rtx to, rtx after)
3870 rtx prev = PREV_INSN (from);
3871 basic_block bb, bb2;
3873 reorder_insns_nobb (from, to, after);
3875 if (!BARRIER_P (after)
3876 && (bb = BLOCK_FOR_INSN (after)))
3879 df_set_bb_dirty (bb);
3881 if (!BARRIER_P (from)
3882 && (bb2 = BLOCK_FOR_INSN (from)))
3884 if (BB_END (bb2) == to)
3885 BB_END (bb2) = prev;
3886 df_set_bb_dirty (bb2);
3889 if (BB_END (bb) == after)
3892 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3894 df_insn_change_bb (x, bb);
3899 /* Emit insn(s) of given code and pattern
3900 at a specified place within the doubly-linked list.
3902 All of the emit_foo global entry points accept an object
3903 X which is either an insn list or a PATTERN of a single
3906 There are thus a few canonical ways to generate code and
3907 emit it at a specific place in the instruction stream. For
3908 example, consider the instruction named SPOT and the fact that
3909 we would like to emit some instructions before SPOT. We might
3913 ... emit the new instructions ...
3914 insns_head = get_insns ();
3917 emit_insn_before (insns_head, SPOT);
3919 It used to be common to generate SEQUENCE rtl instead, but that
3920 is a relic of the past which no longer occurs. The reason is that
3921 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3922 generated would almost certainly die right after it was created. */
3924 /* Make X be output before the instruction BEFORE. */
3927 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
3932 gcc_assert (before);
3937 switch (GET_CODE (x))
3948 rtx next = NEXT_INSN (insn);
3949 add_insn_before (insn, before, bb);
3955 #ifdef ENABLE_RTL_CHECKING
3962 last = make_insn_raw (x);
3963 add_insn_before (last, before, bb);
3970 /* Make an instruction with body X and code JUMP_INSN
3971 and output it before the instruction BEFORE. */
3974 emit_jump_insn_before_noloc (rtx x, rtx before)
3976 rtx insn, last = NULL_RTX;
3978 gcc_assert (before);
3980 switch (GET_CODE (x))
3991 rtx next = NEXT_INSN (insn);
3992 add_insn_before (insn, before, NULL);
3998 #ifdef ENABLE_RTL_CHECKING
4005 last = make_jump_insn_raw (x);
4006 add_insn_before (last, before, NULL);
4013 /* Make an instruction with body X and code CALL_INSN
4014 and output it before the instruction BEFORE. */
4017 emit_call_insn_before_noloc (rtx x, rtx before)
4019 rtx last = NULL_RTX, insn;
4021 gcc_assert (before);
4023 switch (GET_CODE (x))
4034 rtx next = NEXT_INSN (insn);
4035 add_insn_before (insn, before, NULL);
4041 #ifdef ENABLE_RTL_CHECKING
4048 last = make_call_insn_raw (x);
4049 add_insn_before (last, before, NULL);
4056 /* Make an insn of code BARRIER
4057 and output it before the insn BEFORE. */
4060 emit_barrier_before (rtx before)
4062 rtx insn = rtx_alloc (BARRIER);
4064 INSN_UID (insn) = cur_insn_uid++;
4066 add_insn_before (insn, before, NULL);
4070 /* Emit the label LABEL before the insn BEFORE. */
4073 emit_label_before (rtx label, rtx before)
4075 /* This can be called twice for the same label as a result of the
4076 confusion that follows a syntax error! So make it harmless. */
4077 if (INSN_UID (label) == 0)
4079 INSN_UID (label) = cur_insn_uid++;
4080 add_insn_before (label, before, NULL);
4086 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4089 emit_note_before (enum insn_note subtype, rtx before)
4091 rtx note = rtx_alloc (NOTE);
4092 INSN_UID (note) = cur_insn_uid++;
4093 NOTE_KIND (note) = subtype;
4094 BLOCK_FOR_INSN (note) = NULL;
4095 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4097 add_insn_before (note, before, NULL);
4101 /* Helper for emit_insn_after, handles lists of instructions
4105 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4109 if (!bb && !BARRIER_P (after))
4110 bb = BLOCK_FOR_INSN (after);
4114 df_set_bb_dirty (bb);
4115 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4116 if (!BARRIER_P (last))
4118 set_block_for_insn (last, bb);
4119 df_insn_rescan (last);
4121 if (!BARRIER_P (last))
4123 set_block_for_insn (last, bb);
4124 df_insn_rescan (last);
4126 if (BB_END (bb) == after)
4130 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4133 after_after = NEXT_INSN (after);
4135 NEXT_INSN (after) = first;
4136 PREV_INSN (first) = after;
4137 NEXT_INSN (last) = after_after;
4139 PREV_INSN (after_after) = last;
4141 if (after == last_insn)
4147 /* Make X be output after the insn AFTER and set the BB of insn. If
4148 BB is NULL, an attempt is made to infer the BB from AFTER. */
4151 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4160 switch (GET_CODE (x))
4168 last = emit_insn_after_1 (x, after, bb);
4171 #ifdef ENABLE_RTL_CHECKING
4178 last = make_insn_raw (x);
4179 add_insn_after (last, after, bb);
4187 /* Make an insn of code JUMP_INSN with body X
4188 and output it after the insn AFTER. */
4191 emit_jump_insn_after_noloc (rtx x, rtx after)
4197 switch (GET_CODE (x))
4205 last = emit_insn_after_1 (x, after, NULL);
4208 #ifdef ENABLE_RTL_CHECKING
4215 last = make_jump_insn_raw (x);
4216 add_insn_after (last, after, NULL);
4223 /* Make an instruction with body X and code CALL_INSN
4224 and output it after the instruction AFTER. */
4227 emit_call_insn_after_noloc (rtx x, rtx after)
4233 switch (GET_CODE (x))
4241 last = emit_insn_after_1 (x, after, NULL);
4244 #ifdef ENABLE_RTL_CHECKING
4251 last = make_call_insn_raw (x);
4252 add_insn_after (last, after, NULL);
4259 /* Make an insn of code BARRIER
4260 and output it after the insn AFTER. */
4263 emit_barrier_after (rtx after)
4265 rtx insn = rtx_alloc (BARRIER);
4267 INSN_UID (insn) = cur_insn_uid++;
4269 add_insn_after (insn, after, NULL);
4273 /* Emit the label LABEL after the insn AFTER. */
4276 emit_label_after (rtx label, rtx after)
4278 /* This can be called twice for the same label
4279 as a result of the confusion that follows a syntax error!
4280 So make it harmless. */
4281 if (INSN_UID (label) == 0)
4283 INSN_UID (label) = cur_insn_uid++;
4284 add_insn_after (label, after, NULL);
4290 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4293 emit_note_after (enum insn_note subtype, rtx after)
4295 rtx note = rtx_alloc (NOTE);
4296 INSN_UID (note) = cur_insn_uid++;
4297 NOTE_KIND (note) = subtype;
4298 BLOCK_FOR_INSN (note) = NULL;
4299 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4300 add_insn_after (note, after, NULL);
4304 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4306 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4308 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4310 if (pattern == NULL_RTX || !loc)
4313 after = NEXT_INSN (after);
4316 if (active_insn_p (after) && !INSN_LOCATOR (after))
4317 INSN_LOCATOR (after) = loc;
4320 after = NEXT_INSN (after);
4325 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4327 emit_insn_after (rtx pattern, rtx after)
4330 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4332 return emit_insn_after_noloc (pattern, after, NULL);
4335 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4337 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4339 rtx last = emit_jump_insn_after_noloc (pattern, after);
4341 if (pattern == NULL_RTX || !loc)
4344 after = NEXT_INSN (after);
4347 if (active_insn_p (after) && !INSN_LOCATOR (after))
4348 INSN_LOCATOR (after) = loc;
4351 after = NEXT_INSN (after);
4356 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4358 emit_jump_insn_after (rtx pattern, rtx after)
4361 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4363 return emit_jump_insn_after_noloc (pattern, after);
4366 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4368 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4370 rtx last = emit_call_insn_after_noloc (pattern, after);
4372 if (pattern == NULL_RTX || !loc)
4375 after = NEXT_INSN (after);
4378 if (active_insn_p (after) && !INSN_LOCATOR (after))
4379 INSN_LOCATOR (after) = loc;
4382 after = NEXT_INSN (after);
4387 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4389 emit_call_insn_after (rtx pattern, rtx after)
4392 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4394 return emit_call_insn_after_noloc (pattern, after);
4397 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4399 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4401 rtx first = PREV_INSN (before);
4402 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4404 if (pattern == NULL_RTX || !loc)
4408 first = get_insns ();
4410 first = NEXT_INSN (first);
4413 if (active_insn_p (first) && !INSN_LOCATOR (first))
4414 INSN_LOCATOR (first) = loc;
4417 first = NEXT_INSN (first);
4422 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4424 emit_insn_before (rtx pattern, rtx before)
4426 if (INSN_P (before))
4427 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4429 return emit_insn_before_noloc (pattern, before, NULL);
4432 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4434 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4436 rtx first = PREV_INSN (before);
4437 rtx last = emit_jump_insn_before_noloc (pattern, before);
4439 if (pattern == NULL_RTX)
4442 first = NEXT_INSN (first);
4445 if (active_insn_p (first) && !INSN_LOCATOR (first))
4446 INSN_LOCATOR (first) = loc;
4449 first = NEXT_INSN (first);
4454 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4456 emit_jump_insn_before (rtx pattern, rtx before)
4458 if (INSN_P (before))
4459 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4461 return emit_jump_insn_before_noloc (pattern, before);
4464 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4466 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4468 rtx first = PREV_INSN (before);
4469 rtx last = emit_call_insn_before_noloc (pattern, before);
4471 if (pattern == NULL_RTX)
4474 first = NEXT_INSN (first);
4477 if (active_insn_p (first) && !INSN_LOCATOR (first))
4478 INSN_LOCATOR (first) = loc;
4481 first = NEXT_INSN (first);
4486 /* like emit_call_insn_before_noloc,
4487 but set insn_locator according to before. */
4489 emit_call_insn_before (rtx pattern, rtx before)
4491 if (INSN_P (before))
4492 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4494 return emit_call_insn_before_noloc (pattern, before);
4497 /* Take X and emit it at the end of the doubly-linked
4500 Returns the last insn emitted. */
4505 rtx last = last_insn;
4511 switch (GET_CODE (x))
4522 rtx next = NEXT_INSN (insn);
4529 #ifdef ENABLE_RTL_CHECKING
4536 last = make_insn_raw (x);
4544 /* Make an insn of code JUMP_INSN with pattern X
4545 and add it to the end of the doubly-linked list. */
4548 emit_jump_insn (rtx x)
4550 rtx last = NULL_RTX, insn;
4552 switch (GET_CODE (x))
4563 rtx next = NEXT_INSN (insn);
4570 #ifdef ENABLE_RTL_CHECKING
4577 last = make_jump_insn_raw (x);
4585 /* Make an insn of code CALL_INSN with pattern X
4586 and add it to the end of the doubly-linked list. */
4589 emit_call_insn (rtx x)
4593 switch (GET_CODE (x))
4601 insn = emit_insn (x);
4604 #ifdef ENABLE_RTL_CHECKING
4611 insn = make_call_insn_raw (x);
4619 /* Add the label LABEL to the end of the doubly-linked list. */
4622 emit_label (rtx label)
4624 /* This can be called twice for the same label
4625 as a result of the confusion that follows a syntax error!
4626 So make it harmless. */
4627 if (INSN_UID (label) == 0)
4629 INSN_UID (label) = cur_insn_uid++;
4635 /* Make an insn of code BARRIER
4636 and add it to the end of the doubly-linked list. */
4641 rtx barrier = rtx_alloc (BARRIER);
4642 INSN_UID (barrier) = cur_insn_uid++;
4647 /* Emit a copy of note ORIG. */
4650 emit_note_copy (rtx orig)
4654 note = rtx_alloc (NOTE);
4656 INSN_UID (note) = cur_insn_uid++;
4657 NOTE_DATA (note) = NOTE_DATA (orig);
4658 NOTE_KIND (note) = NOTE_KIND (orig);
4659 BLOCK_FOR_INSN (note) = NULL;
4665 /* Make an insn of code NOTE or type NOTE_NO
4666 and add it to the end of the doubly-linked list. */
4669 emit_note (enum insn_note kind)
4673 note = rtx_alloc (NOTE);
4674 INSN_UID (note) = cur_insn_uid++;
4675 NOTE_KIND (note) = kind;
4676 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4677 BLOCK_FOR_INSN (note) = NULL;
4682 /* Emit a clobber of lvalue X. */
4685 emit_clobber (rtx x)
4687 /* CONCATs should not appear in the insn stream. */
4688 if (GET_CODE (x) == CONCAT)
4690 emit_clobber (XEXP (x, 0));
4691 return emit_clobber (XEXP (x, 1));
4693 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4696 /* Return a sequence of insns to clobber lvalue X. */
4710 /* Emit a use of rvalue X. */
4715 /* CONCATs should not appear in the insn stream. */
4716 if (GET_CODE (x) == CONCAT)
4718 emit_use (XEXP (x, 0));
4719 return emit_use (XEXP (x, 1));
4721 return emit_insn (gen_rtx_USE (VOIDmode, x));
4724 /* Return a sequence of insns to use rvalue X. */
4738 /* Cause next statement to emit a line note even if the line number
4742 force_next_line_note (void)
4747 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4748 note of this type already exists, remove it first. */
4751 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4753 rtx note = find_reg_note (insn, kind, NULL_RTX);
4759 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4760 has multiple sets (some callers assume single_set
4761 means the insn only has one set, when in fact it
4762 means the insn only has one * useful * set). */
4763 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4769 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4770 It serves no useful purpose and breaks eliminate_regs. */
4771 if (GET_CODE (datum) == ASM_OPERANDS)
4776 XEXP (note, 0) = datum;
4777 df_notes_rescan (insn);
4785 XEXP (note, 0) = datum;
4791 add_reg_note (insn, kind, datum);
4797 df_notes_rescan (insn);
4803 return REG_NOTES (insn);
4806 /* Return an indication of which type of insn should have X as a body.
4807 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4809 static enum rtx_code
4810 classify_insn (rtx x)
4814 if (GET_CODE (x) == CALL)
4816 if (GET_CODE (x) == RETURN)
4818 if (GET_CODE (x) == SET)
4820 if (SET_DEST (x) == pc_rtx)
4822 else if (GET_CODE (SET_SRC (x)) == CALL)
4827 if (GET_CODE (x) == PARALLEL)
4830 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4831 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4833 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4834 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4836 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4837 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4843 /* Emit the rtl pattern X as an appropriate kind of insn.
4844 If X is a label, it is simply added into the insn chain. */
4849 enum rtx_code code = classify_insn (x);
4854 return emit_label (x);
4856 return emit_insn (x);
4859 rtx insn = emit_jump_insn (x);
4860 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4861 return emit_barrier ();
4865 return emit_call_insn (x);
4871 /* Space for free sequence stack entries. */
4872 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4874 /* Begin emitting insns to a sequence. If this sequence will contain
4875 something that might cause the compiler to pop arguments to function
4876 calls (because those pops have previously been deferred; see
4877 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4878 before calling this function. That will ensure that the deferred
4879 pops are not accidentally emitted in the middle of this sequence. */
4882 start_sequence (void)
4884 struct sequence_stack *tem;
4886 if (free_sequence_stack != NULL)
4888 tem = free_sequence_stack;
4889 free_sequence_stack = tem->next;
4892 tem = GGC_NEW (struct sequence_stack);
4894 tem->next = seq_stack;
4895 tem->first = first_insn;
4896 tem->last = last_insn;
4904 /* Set up the insn chain starting with FIRST as the current sequence,
4905 saving the previously current one. See the documentation for
4906 start_sequence for more information about how to use this function. */
4909 push_to_sequence (rtx first)
4915 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4921 /* Like push_to_sequence, but take the last insn as an argument to avoid
4922 looping through the list. */
4925 push_to_sequence2 (rtx first, rtx last)
4933 /* Set up the outer-level insn chain
4934 as the current sequence, saving the previously current one. */
4937 push_topmost_sequence (void)
4939 struct sequence_stack *stack, *top = NULL;
4943 for (stack = seq_stack; stack; stack = stack->next)
4946 first_insn = top->first;
4947 last_insn = top->last;
4950 /* After emitting to the outer-level insn chain, update the outer-level
4951 insn chain, and restore the previous saved state. */
4954 pop_topmost_sequence (void)
4956 struct sequence_stack *stack, *top = NULL;
4958 for (stack = seq_stack; stack; stack = stack->next)
4961 top->first = first_insn;
4962 top->last = last_insn;
4967 /* After emitting to a sequence, restore previous saved state.
4969 To get the contents of the sequence just made, you must call
4970 `get_insns' *before* calling here.
4972 If the compiler might have deferred popping arguments while
4973 generating this sequence, and this sequence will not be immediately
4974 inserted into the instruction stream, use do_pending_stack_adjust
4975 before calling get_insns. That will ensure that the deferred
4976 pops are inserted into this sequence, and not into some random
4977 location in the instruction stream. See INHIBIT_DEFER_POP for more
4978 information about deferred popping of arguments. */
4983 struct sequence_stack *tem = seq_stack;
4985 first_insn = tem->first;
4986 last_insn = tem->last;
4987 seq_stack = tem->next;
4989 memset (tem, 0, sizeof (*tem));
4990 tem->next = free_sequence_stack;
4991 free_sequence_stack = tem;
4994 /* Return 1 if currently emitting into a sequence. */
4997 in_sequence_p (void)
4999 return seq_stack != 0;
5002 /* Put the various virtual registers into REGNO_REG_RTX. */
5005 init_virtual_regs (void)
5007 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5008 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5009 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5010 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5011 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5015 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5016 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5017 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5018 static int copy_insn_n_scratches;
5020 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5021 copied an ASM_OPERANDS.
5022 In that case, it is the original input-operand vector. */
5023 static rtvec orig_asm_operands_vector;
5025 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5026 copied an ASM_OPERANDS.
5027 In that case, it is the copied input-operand vector. */
5028 static rtvec copy_asm_operands_vector;
5030 /* Likewise for the constraints vector. */
5031 static rtvec orig_asm_constraints_vector;
5032 static rtvec copy_asm_constraints_vector;
5034 /* Recursively create a new copy of an rtx for copy_insn.
5035 This function differs from copy_rtx in that it handles SCRATCHes and
5036 ASM_OPERANDs properly.
5037 Normally, this function is not used directly; use copy_insn as front end.
5038 However, you could first copy an insn pattern with copy_insn and then use
5039 this function afterwards to properly copy any REG_NOTEs containing
5043 copy_insn_1 (rtx orig)
5048 const char *format_ptr;
5050 code = GET_CODE (orig);
5065 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5070 for (i = 0; i < copy_insn_n_scratches; i++)
5071 if (copy_insn_scratch_in[i] == orig)
5072 return copy_insn_scratch_out[i];
5076 if (shared_const_p (orig))
5080 /* A MEM with a constant address is not sharable. The problem is that
5081 the constant address may need to be reloaded. If the mem is shared,
5082 then reloading one copy of this mem will cause all copies to appear
5083 to have been reloaded. */
5089 /* Copy the various flags, fields, and other information. We assume
5090 that all fields need copying, and then clear the fields that should
5091 not be copied. That is the sensible default behavior, and forces
5092 us to explicitly document why we are *not* copying a flag. */
5093 copy = shallow_copy_rtx (orig);
5095 /* We do not copy the USED flag, which is used as a mark bit during
5096 walks over the RTL. */
5097 RTX_FLAG (copy, used) = 0;
5099 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5102 RTX_FLAG (copy, jump) = 0;
5103 RTX_FLAG (copy, call) = 0;
5104 RTX_FLAG (copy, frame_related) = 0;
5107 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5109 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5110 switch (*format_ptr++)
5113 if (XEXP (orig, i) != NULL)
5114 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5119 if (XVEC (orig, i) == orig_asm_constraints_vector)
5120 XVEC (copy, i) = copy_asm_constraints_vector;
5121 else if (XVEC (orig, i) == orig_asm_operands_vector)
5122 XVEC (copy, i) = copy_asm_operands_vector;
5123 else if (XVEC (orig, i) != NULL)
5125 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5126 for (j = 0; j < XVECLEN (copy, i); j++)
5127 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5138 /* These are left unchanged. */
5145 if (code == SCRATCH)
5147 i = copy_insn_n_scratches++;
5148 gcc_assert (i < MAX_RECOG_OPERANDS);
5149 copy_insn_scratch_in[i] = orig;
5150 copy_insn_scratch_out[i] = copy;
5152 else if (code == ASM_OPERANDS)
5154 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5155 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5156 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5157 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5163 /* Create a new copy of an rtx.
5164 This function differs from copy_rtx in that it handles SCRATCHes and
5165 ASM_OPERANDs properly.
5166 INSN doesn't really have to be a full INSN; it could be just the
5169 copy_insn (rtx insn)
5171 copy_insn_n_scratches = 0;
5172 orig_asm_operands_vector = 0;
5173 orig_asm_constraints_vector = 0;
5174 copy_asm_operands_vector = 0;
5175 copy_asm_constraints_vector = 0;
5176 return copy_insn_1 (insn);
5179 /* Initialize data structures and variables in this file
5180 before generating rtl for each function. */
5188 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5189 last_location = UNKNOWN_LOCATION;
5190 first_label_num = label_num;
5193 /* Init the tables that describe all the pseudo regs. */
5195 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5197 crtl->emit.regno_pointer_align
5198 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5201 = GGC_NEWVEC (rtx, crtl->emit.regno_pointer_align_length);
5203 /* Put copies of all the hard registers into regno_reg_rtx. */
5204 memcpy (regno_reg_rtx,
5205 static_regno_reg_rtx,
5206 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5208 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5209 init_virtual_regs ();
5211 /* Indicate that the virtual registers and stack locations are
5213 REG_POINTER (stack_pointer_rtx) = 1;
5214 REG_POINTER (frame_pointer_rtx) = 1;
5215 REG_POINTER (hard_frame_pointer_rtx) = 1;
5216 REG_POINTER (arg_pointer_rtx) = 1;
5218 REG_POINTER (virtual_incoming_args_rtx) = 1;
5219 REG_POINTER (virtual_stack_vars_rtx) = 1;
5220 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5221 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5222 REG_POINTER (virtual_cfa_rtx) = 1;
5224 #ifdef STACK_BOUNDARY
5225 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5226 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5227 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5228 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5230 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5231 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5232 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5233 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5234 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5237 #ifdef INIT_EXPANDERS
5242 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5245 gen_const_vector (enum machine_mode mode, int constant)
5250 enum machine_mode inner;
5252 units = GET_MODE_NUNITS (mode);
5253 inner = GET_MODE_INNER (mode);
5255 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5257 v = rtvec_alloc (units);
5259 /* We need to call this function after we set the scalar const_tiny_rtx
5261 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5263 for (i = 0; i < units; ++i)
5264 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5266 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5270 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5271 all elements are zero, and the one vector when all elements are one. */
5273 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5275 enum machine_mode inner = GET_MODE_INNER (mode);
5276 int nunits = GET_MODE_NUNITS (mode);
5280 /* Check to see if all of the elements have the same value. */
5281 x = RTVEC_ELT (v, nunits - 1);
5282 for (i = nunits - 2; i >= 0; i--)
5283 if (RTVEC_ELT (v, i) != x)
5286 /* If the values are all the same, check to see if we can use one of the
5287 standard constant vectors. */
5290 if (x == CONST0_RTX (inner))
5291 return CONST0_RTX (mode);
5292 else if (x == CONST1_RTX (inner))
5293 return CONST1_RTX (mode);
5296 return gen_rtx_raw_CONST_VECTOR (mode, v);
5299 /* Initialise global register information required by all functions. */
5302 init_emit_regs (void)
5306 /* Reset register attributes */
5307 htab_empty (reg_attrs_htab);
5309 /* We need reg_raw_mode, so initialize the modes now. */
5310 init_reg_modes_target ();
5312 /* Assign register numbers to the globally defined register rtx. */
5313 pc_rtx = gen_rtx_PC (VOIDmode);
5314 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5315 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5316 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5317 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5318 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5319 virtual_incoming_args_rtx =
5320 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5321 virtual_stack_vars_rtx =
5322 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5323 virtual_stack_dynamic_rtx =
5324 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5325 virtual_outgoing_args_rtx =
5326 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5327 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5329 /* Initialize RTL for commonly used hard registers. These are
5330 copied into regno_reg_rtx as we begin to compile each function. */
5331 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5332 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5334 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5335 return_address_pointer_rtx
5336 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5339 #ifdef STATIC_CHAIN_REGNUM
5340 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5342 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5343 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5344 static_chain_incoming_rtx
5345 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5348 static_chain_incoming_rtx = static_chain_rtx;
5352 static_chain_rtx = STATIC_CHAIN;
5354 #ifdef STATIC_CHAIN_INCOMING
5355 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5357 static_chain_incoming_rtx = static_chain_rtx;
5361 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5362 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5364 pic_offset_table_rtx = NULL_RTX;
5367 /* Create some permanent unique rtl objects shared between all functions.
5368 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5371 init_emit_once (int line_numbers)
5374 enum machine_mode mode;
5375 enum machine_mode double_mode;
5377 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5379 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5380 const_int_htab_eq, NULL);
5382 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5383 const_double_htab_eq, NULL);
5385 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5386 const_fixed_htab_eq, NULL);
5388 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5389 mem_attrs_htab_eq, NULL);
5390 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5391 reg_attrs_htab_eq, NULL);
5393 no_line_numbers = ! line_numbers;
5395 /* Compute the word and byte modes. */
5397 byte_mode = VOIDmode;
5398 word_mode = VOIDmode;
5399 double_mode = VOIDmode;
5401 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5403 mode = GET_MODE_WIDER_MODE (mode))
5405 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5406 && byte_mode == VOIDmode)
5409 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5410 && word_mode == VOIDmode)
5414 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5416 mode = GET_MODE_WIDER_MODE (mode))
5418 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5419 && double_mode == VOIDmode)
5423 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5425 #ifdef INIT_EXPANDERS
5426 /* This is to initialize {init|mark|free}_machine_status before the first
5427 call to push_function_context_to. This is needed by the Chill front
5428 end which calls push_function_context_to before the first call to
5429 init_function_start. */
5433 /* Create the unique rtx's for certain rtx codes and operand values. */
5435 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5436 tries to use these variables. */
5437 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5438 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5439 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5441 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5442 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5443 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5445 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5447 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5448 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5449 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5454 dconsthalf = dconst1;
5455 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5457 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5459 const REAL_VALUE_TYPE *const r =
5460 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5462 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5464 mode = GET_MODE_WIDER_MODE (mode))
5465 const_tiny_rtx[i][(int) mode] =
5466 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5468 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5470 mode = GET_MODE_WIDER_MODE (mode))
5471 const_tiny_rtx[i][(int) mode] =
5472 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5474 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5476 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5478 mode = GET_MODE_WIDER_MODE (mode))
5479 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5481 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5483 mode = GET_MODE_WIDER_MODE (mode))
5484 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5487 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5489 mode = GET_MODE_WIDER_MODE (mode))
5491 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5492 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5495 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5497 mode = GET_MODE_WIDER_MODE (mode))
5499 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5500 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5503 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5505 mode = GET_MODE_WIDER_MODE (mode))
5507 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5508 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5511 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5513 mode = GET_MODE_WIDER_MODE (mode))
5515 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5516 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5519 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5521 mode = GET_MODE_WIDER_MODE (mode))
5523 FCONST0(mode).data.high = 0;
5524 FCONST0(mode).data.low = 0;
5525 FCONST0(mode).mode = mode;
5526 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5527 FCONST0 (mode), mode);
5530 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5532 mode = GET_MODE_WIDER_MODE (mode))
5534 FCONST0(mode).data.high = 0;
5535 FCONST0(mode).data.low = 0;
5536 FCONST0(mode).mode = mode;
5537 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5538 FCONST0 (mode), mode);
5541 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5543 mode = GET_MODE_WIDER_MODE (mode))
5545 FCONST0(mode).data.high = 0;
5546 FCONST0(mode).data.low = 0;
5547 FCONST0(mode).mode = mode;
5548 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5549 FCONST0 (mode), mode);
5551 /* We store the value 1. */
5552 FCONST1(mode).data.high = 0;
5553 FCONST1(mode).data.low = 0;
5554 FCONST1(mode).mode = mode;
5555 lshift_double (1, 0, GET_MODE_FBIT (mode),
5556 2 * HOST_BITS_PER_WIDE_INT,
5557 &FCONST1(mode).data.low,
5558 &FCONST1(mode).data.high,
5559 SIGNED_FIXED_POINT_MODE_P (mode));
5560 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5561 FCONST1 (mode), mode);
5564 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5566 mode = GET_MODE_WIDER_MODE (mode))
5568 FCONST0(mode).data.high = 0;
5569 FCONST0(mode).data.low = 0;
5570 FCONST0(mode).mode = mode;
5571 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5572 FCONST0 (mode), mode);
5574 /* We store the value 1. */
5575 FCONST1(mode).data.high = 0;
5576 FCONST1(mode).data.low = 0;
5577 FCONST1(mode).mode = mode;
5578 lshift_double (1, 0, GET_MODE_FBIT (mode),
5579 2 * HOST_BITS_PER_WIDE_INT,
5580 &FCONST1(mode).data.low,
5581 &FCONST1(mode).data.high,
5582 SIGNED_FIXED_POINT_MODE_P (mode));
5583 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5584 FCONST1 (mode), mode);
5587 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5589 mode = GET_MODE_WIDER_MODE (mode))
5591 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5594 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5596 mode = GET_MODE_WIDER_MODE (mode))
5598 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5601 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5603 mode = GET_MODE_WIDER_MODE (mode))
5605 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5606 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5609 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5611 mode = GET_MODE_WIDER_MODE (mode))
5613 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5614 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5617 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5618 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5619 const_tiny_rtx[0][i] = const0_rtx;
5621 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5622 if (STORE_FLAG_VALUE == 1)
5623 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5626 /* Produce exact duplicate of insn INSN after AFTER.
5627 Care updating of libcall regions if present. */
5630 emit_copy_of_insn_after (rtx insn, rtx after)
5634 switch (GET_CODE (insn))
5637 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5641 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5645 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5646 if (CALL_INSN_FUNCTION_USAGE (insn))
5647 CALL_INSN_FUNCTION_USAGE (new_rtx)
5648 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5649 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5650 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5651 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5652 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5653 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5660 /* Update LABEL_NUSES. */
5661 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5663 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5665 /* If the old insn is frame related, then so is the new one. This is
5666 primarily needed for IA-64 unwind info which marks epilogue insns,
5667 which may be duplicated by the basic block reordering code. */
5668 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5670 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5671 will make them. REG_LABEL_TARGETs are created there too, but are
5672 supposed to be sticky, so we copy them. */
5673 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5674 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5676 if (GET_CODE (link) == EXPR_LIST)
5677 add_reg_note (new_rtx, REG_NOTE_KIND (link),
5678 copy_insn_1 (XEXP (link, 0)));
5680 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
5683 INSN_CODE (new_rtx) = INSN_CODE (insn);
5687 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5689 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5691 if (hard_reg_clobbers[mode][regno])
5692 return hard_reg_clobbers[mode][regno];
5694 return (hard_reg_clobbers[mode][regno] =
5695 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5698 #include "gt-emit-rtl.h"