1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
63 /* Commonly used modes. */
65 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
66 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
67 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
68 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
70 /* Datastructures maintained for currently processed function in RTL form. */
72 struct rtl_data x_rtl;
74 /* Indexed by pseudo register number, gives the rtx for that pseudo.
75 Allocated in parallel with regno_pointer_align.
76 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
77 with length attribute nested in top level structures. */
81 /* This is *not* reset after each function. It gives each CODE_LABEL
82 in the entire compilation a unique label number. */
84 static GTY(()) int label_num = 1;
86 /* Nonzero means do not generate NOTEs for source line numbers. */
88 static int no_line_numbers;
90 /* Commonly used rtx's, so that we only need space for one copy.
91 These are initialized once for the entire compilation.
92 All of these are unique; no other rtx-object will be equal to any
95 rtx global_rtl[GR_MAX];
97 /* Commonly used RTL for hard registers. These objects are not necessarily
98 unique, so we allocate them separately from global_rtl. They are
99 initialized once per compilation unit, then copied into regno_reg_rtx
100 at the beginning of each function. */
101 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
103 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
104 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
105 record a copy of const[012]_rtx. */
107 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
111 REAL_VALUE_TYPE dconst0;
112 REAL_VALUE_TYPE dconst1;
113 REAL_VALUE_TYPE dconst2;
114 REAL_VALUE_TYPE dconstm1;
115 REAL_VALUE_TYPE dconsthalf;
117 /* Record fixed-point constant 0 and 1. */
118 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
119 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
121 /* All references to the following fixed hard registers go through
122 these unique rtl objects. On machines where the frame-pointer and
123 arg-pointer are the same register, they use the same unique object.
125 After register allocation, other rtl objects which used to be pseudo-regs
126 may be clobbered to refer to the frame-pointer register.
127 But references that were originally to the frame-pointer can be
128 distinguished from the others because they contain frame_pointer_rtx.
130 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
131 tricky: until register elimination has taken place hard_frame_pointer_rtx
132 should be used if it is being set, and frame_pointer_rtx otherwise. After
133 register elimination hard_frame_pointer_rtx should always be used.
134 On machines where the two registers are same (most) then these are the
137 In an inline procedure, the stack and frame pointer rtxs may not be
138 used for anything else. */
139 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
141 /* This is used to implement __builtin_return_address for some machines.
142 See for instance the MIPS port. */
143 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
145 /* We make one copy of (const_int C) where C is in
146 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
147 to save space during the compilation and simplify comparisons of
150 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
152 /* A hash table storing CONST_INTs whose absolute value is greater
153 than MAX_SAVED_CONST_INT. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
156 htab_t const_int_htab;
158 /* A hash table storing memory attribute structures. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
160 htab_t mem_attrs_htab;
162 /* A hash table storing register attribute structures. */
163 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
164 htab_t reg_attrs_htab;
166 /* A hash table storing all CONST_DOUBLEs. */
167 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
168 htab_t const_double_htab;
170 /* A hash table storing all CONST_FIXEDs. */
171 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
172 htab_t const_fixed_htab;
174 #define first_insn (crtl->emit.x_first_insn)
175 #define last_insn (crtl->emit.x_last_insn)
176 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
177 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
178 #define last_location (crtl->emit.x_last_location)
179 #define first_label_num (crtl->emit.x_first_label_num)
181 static rtx make_call_insn_raw (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void set_used_decls (tree);
184 static void mark_label_nuses (rtx);
185 static hashval_t const_int_htab_hash (const void *);
186 static int const_int_htab_eq (const void *, const void *);
187 static hashval_t const_double_htab_hash (const void *);
188 static int const_double_htab_eq (const void *, const void *);
189 static rtx lookup_const_double (rtx);
190 static hashval_t const_fixed_htab_hash (const void *);
191 static int const_fixed_htab_eq (const void *, const void *);
192 static rtx lookup_const_fixed (rtx);
193 static hashval_t mem_attrs_htab_hash (const void *);
194 static int mem_attrs_htab_eq (const void *, const void *);
195 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
197 static hashval_t reg_attrs_htab_hash (const void *);
198 static int reg_attrs_htab_eq (const void *, const void *);
199 static reg_attrs *get_reg_attrs (tree, int);
200 static rtx gen_const_vector (enum machine_mode, int);
201 static void copy_rtx_if_shared_1 (rtx *orig);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x)
212 return (hashval_t) INTVAL ((const_rtx) x);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x, const void *y)
222 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x)
229 const_rtx const value = (const_rtx) x;
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x, const void *y)
248 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
250 if (GET_MODE (a) != GET_MODE (b))
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
260 /* Returns a hash code for X (which is really a CONST_FIXED). */
263 const_fixed_htab_hash (const void *x)
265 const_rtx const value = (const_rtx) x;
268 h = fixed_hash (CONST_FIXED_VALUE (value));
269 /* MODE is used in the comparison, so it should be in the hash. */
270 h ^= GET_MODE (value);
274 /* Returns nonzero if the value represented by X (really a ...)
275 is the same as that represented by Y (really a ...). */
278 const_fixed_htab_eq (const void *x, const void *y)
280 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
282 if (GET_MODE (a) != GET_MODE (b))
284 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
287 /* Returns a hash code for X (which is a really a mem_attrs *). */
290 mem_attrs_htab_hash (const void *x)
292 const mem_attrs *const p = (const mem_attrs *) x;
294 return (p->alias ^ (p->align * 1000)
295 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
296 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
297 ^ (size_t) iterative_hash_expr (p->expr, 0));
300 /* Returns nonzero if the value represented by X (which is really a
301 mem_attrs *) is the same as that given by Y (which is also really a
305 mem_attrs_htab_eq (const void *x, const void *y)
307 const mem_attrs *const p = (const mem_attrs *) x;
308 const mem_attrs *const q = (const mem_attrs *) y;
310 return (p->alias == q->alias && p->offset == q->offset
311 && p->size == q->size && p->align == q->align
312 && (p->expr == q->expr
313 || (p->expr != NULL_TREE && q->expr != NULL_TREE
314 && operand_equal_p (p->expr, q->expr, 0))));
317 /* Allocate a new mem_attrs structure and insert it into the hash table if
318 one identical to it is not already in the table. We are doing this for
322 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
323 unsigned int align, enum machine_mode mode)
328 /* If everything is the default, we can just return zero.
329 This must match what the corresponding MEM_* macros return when the
330 field is not present. */
331 if (alias == 0 && expr == 0 && offset == 0
333 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
334 && (STRICT_ALIGNMENT && mode != BLKmode
335 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
340 attrs.offset = offset;
344 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
347 *slot = ggc_alloc (sizeof (mem_attrs));
348 memcpy (*slot, &attrs, sizeof (mem_attrs));
351 return (mem_attrs *) *slot;
354 /* Returns a hash code for X (which is a really a reg_attrs *). */
357 reg_attrs_htab_hash (const void *x)
359 const reg_attrs *const p = (const reg_attrs *) x;
361 return ((p->offset * 1000) ^ (long) p->decl);
364 /* Returns nonzero if the value represented by X (which is really a
365 reg_attrs *) is the same as that given by Y (which is also really a
369 reg_attrs_htab_eq (const void *x, const void *y)
371 const reg_attrs *const p = (const reg_attrs *) x;
372 const reg_attrs *const q = (const reg_attrs *) y;
374 return (p->decl == q->decl && p->offset == q->offset);
376 /* Allocate a new reg_attrs structure and insert it into the hash table if
377 one identical to it is not already in the table. We are doing this for
381 get_reg_attrs (tree decl, int offset)
386 /* If everything is the default, we can just return zero. */
387 if (decl == 0 && offset == 0)
391 attrs.offset = offset;
393 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
396 *slot = ggc_alloc (sizeof (reg_attrs));
397 memcpy (*slot, &attrs, sizeof (reg_attrs));
400 return (reg_attrs *) *slot;
405 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
411 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
412 MEM_VOLATILE_P (x) = true;
418 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
419 don't attempt to share with the various global pieces of rtl (such as
420 frame_pointer_rtx). */
423 gen_raw_REG (enum machine_mode mode, int regno)
425 rtx x = gen_rtx_raw_REG (mode, regno);
426 ORIGINAL_REGNO (x) = regno;
430 /* There are some RTL codes that require special attention; the generation
431 functions do the raw handling. If you add to this list, modify
432 special_rtx in gengenrtl.c as well. */
435 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
439 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
440 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
442 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
443 if (const_true_rtx && arg == STORE_FLAG_VALUE)
444 return const_true_rtx;
447 /* Look up the CONST_INT in the hash table. */
448 slot = htab_find_slot_with_hash (const_int_htab, &arg,
449 (hashval_t) arg, INSERT);
451 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
457 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
459 return GEN_INT (trunc_int_for_mode (c, mode));
462 /* CONST_DOUBLEs might be created from pairs of integers, or from
463 REAL_VALUE_TYPEs. Also, their length is known only at run time,
464 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
466 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
467 hash table. If so, return its counterpart; otherwise add it
468 to the hash table and return it. */
470 lookup_const_double (rtx real)
472 void **slot = htab_find_slot (const_double_htab, real, INSERT);
479 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
480 VALUE in mode MODE. */
482 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
484 rtx real = rtx_alloc (CONST_DOUBLE);
485 PUT_MODE (real, mode);
489 return lookup_const_double (real);
492 /* Determine whether FIXED, a CONST_FIXED, already exists in the
493 hash table. If so, return its counterpart; otherwise add it
494 to the hash table and return it. */
497 lookup_const_fixed (rtx fixed)
499 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
506 /* Return a CONST_FIXED rtx for a fixed-point value specified by
507 VALUE in mode MODE. */
510 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
512 rtx fixed = rtx_alloc (CONST_FIXED);
513 PUT_MODE (fixed, mode);
517 return lookup_const_fixed (fixed);
520 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
521 of ints: I0 is the low-order word and I1 is the high-order word.
522 Do not use this routine for non-integer modes; convert to
523 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
526 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
531 /* There are the following cases (note that there are no modes with
532 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
534 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
536 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
537 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
538 from copies of the sign bit, and sign of i0 and i1 are the same), then
539 we return a CONST_INT for i0.
540 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
541 if (mode != VOIDmode)
543 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
544 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
545 /* We can get a 0 for an error mark. */
546 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
547 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
549 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
550 return gen_int_mode (i0, mode);
552 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
555 /* If this integer fits in one word, return a CONST_INT. */
556 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
559 /* We use VOIDmode for integers. */
560 value = rtx_alloc (CONST_DOUBLE);
561 PUT_MODE (value, VOIDmode);
563 CONST_DOUBLE_LOW (value) = i0;
564 CONST_DOUBLE_HIGH (value) = i1;
566 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
567 XWINT (value, i) = 0;
569 return lookup_const_double (value);
573 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
575 /* In case the MD file explicitly references the frame pointer, have
576 all such references point to the same frame pointer. This is
577 used during frame pointer elimination to distinguish the explicit
578 references to these registers from pseudos that happened to be
581 If we have eliminated the frame pointer or arg pointer, we will
582 be using it as a normal register, for example as a spill
583 register. In such cases, we might be accessing it in a mode that
584 is not Pmode and therefore cannot use the pre-allocated rtx.
586 Also don't do this when we are making new REGs in reload, since
587 we don't want to get confused with the real pointers. */
589 if (mode == Pmode && !reload_in_progress)
591 if (regno == FRAME_POINTER_REGNUM
592 && (!reload_completed || frame_pointer_needed))
593 return frame_pointer_rtx;
594 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
595 if (regno == HARD_FRAME_POINTER_REGNUM
596 && (!reload_completed || frame_pointer_needed))
597 return hard_frame_pointer_rtx;
599 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
600 if (regno == ARG_POINTER_REGNUM)
601 return arg_pointer_rtx;
603 #ifdef RETURN_ADDRESS_POINTER_REGNUM
604 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
605 return return_address_pointer_rtx;
607 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
608 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
609 return pic_offset_table_rtx;
610 if (regno == STACK_POINTER_REGNUM)
611 return stack_pointer_rtx;
615 /* If the per-function register table has been set up, try to re-use
616 an existing entry in that table to avoid useless generation of RTL.
618 This code is disabled for now until we can fix the various backends
619 which depend on having non-shared hard registers in some cases. Long
620 term we want to re-enable this code as it can significantly cut down
621 on the amount of useless RTL that gets generated.
623 We'll also need to fix some code that runs after reload that wants to
624 set ORIGINAL_REGNO. */
629 && regno < FIRST_PSEUDO_REGISTER
630 && reg_raw_mode[regno] == mode)
631 return regno_reg_rtx[regno];
634 return gen_raw_REG (mode, regno);
638 gen_rtx_MEM (enum machine_mode mode, rtx addr)
640 rtx rt = gen_rtx_raw_MEM (mode, addr);
642 /* This field is not cleared by the mere allocation of the rtx, so
649 /* Generate a memory referring to non-trapping constant memory. */
652 gen_const_mem (enum machine_mode mode, rtx addr)
654 rtx mem = gen_rtx_MEM (mode, addr);
655 MEM_READONLY_P (mem) = 1;
656 MEM_NOTRAP_P (mem) = 1;
660 /* Generate a MEM referring to fixed portions of the frame, e.g., register
664 gen_frame_mem (enum machine_mode mode, rtx addr)
666 rtx mem = gen_rtx_MEM (mode, addr);
667 MEM_NOTRAP_P (mem) = 1;
668 set_mem_alias_set (mem, get_frame_alias_set ());
672 /* Generate a MEM referring to a temporary use of the stack, not part
673 of the fixed stack frame. For example, something which is pushed
674 by a target splitter. */
676 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
678 rtx mem = gen_rtx_MEM (mode, addr);
679 MEM_NOTRAP_P (mem) = 1;
680 if (!cfun->calls_alloca)
681 set_mem_alias_set (mem, get_frame_alias_set ());
685 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
686 this construct would be valid, and false otherwise. */
689 validate_subreg (enum machine_mode omode, enum machine_mode imode,
690 const_rtx reg, unsigned int offset)
692 unsigned int isize = GET_MODE_SIZE (imode);
693 unsigned int osize = GET_MODE_SIZE (omode);
695 /* All subregs must be aligned. */
696 if (offset % osize != 0)
699 /* The subreg offset cannot be outside the inner object. */
703 /* ??? This should not be here. Temporarily continue to allow word_mode
704 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
705 Generally, backends are doing something sketchy but it'll take time to
707 if (omode == word_mode)
709 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
710 is the culprit here, and not the backends. */
711 else if (osize >= UNITS_PER_WORD && isize >= osize)
713 /* Allow component subregs of complex and vector. Though given the below
714 extraction rules, it's not always clear what that means. */
715 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
716 && GET_MODE_INNER (imode) == omode)
718 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
719 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
720 represent this. It's questionable if this ought to be represented at
721 all -- why can't this all be hidden in post-reload splitters that make
722 arbitrarily mode changes to the registers themselves. */
723 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
725 /* Subregs involving floating point modes are not allowed to
726 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
727 (subreg:SI (reg:DF) 0) isn't. */
728 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
734 /* Paradoxical subregs must have offset zero. */
738 /* This is a normal subreg. Verify that the offset is representable. */
740 /* For hard registers, we already have most of these rules collected in
741 subreg_offset_representable_p. */
742 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
744 unsigned int regno = REGNO (reg);
746 #ifdef CANNOT_CHANGE_MODE_CLASS
747 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
748 && GET_MODE_INNER (imode) == omode)
750 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
754 return subreg_offset_representable_p (regno, imode, offset, omode);
757 /* For pseudo registers, we want most of the same checks. Namely:
758 If the register no larger than a word, the subreg must be lowpart.
759 If the register is larger than a word, the subreg must be the lowpart
760 of a subword. A subreg does *not* perform arbitrary bit extraction.
761 Given that we've already checked mode/offset alignment, we only have
762 to check subword subregs here. */
763 if (osize < UNITS_PER_WORD)
765 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
766 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
767 if (offset % UNITS_PER_WORD != low_off)
774 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
776 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
777 return gen_rtx_raw_SUBREG (mode, reg, offset);
780 /* Generate a SUBREG representing the least-significant part of REG if MODE
781 is smaller than mode of REG, otherwise paradoxical SUBREG. */
784 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
786 enum machine_mode inmode;
788 inmode = GET_MODE (reg);
789 if (inmode == VOIDmode)
791 return gen_rtx_SUBREG (mode, reg,
792 subreg_lowpart_offset (mode, inmode));
796 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
799 gen_rtvec (int n, ...)
807 /* Don't allocate an empty rtvec... */
811 rt_val = rtvec_alloc (n);
813 for (i = 0; i < n; i++)
814 rt_val->elem[i] = va_arg (p, rtx);
821 gen_rtvec_v (int n, rtx *argp)
826 /* Don't allocate an empty rtvec... */
830 rt_val = rtvec_alloc (n);
832 for (i = 0; i < n; i++)
833 rt_val->elem[i] = *argp++;
838 /* Return the number of bytes between the start of an OUTER_MODE
839 in-memory value and the start of an INNER_MODE in-memory value,
840 given that the former is a lowpart of the latter. It may be a
841 paradoxical lowpart, in which case the offset will be negative
842 on big-endian targets. */
845 byte_lowpart_offset (enum machine_mode outer_mode,
846 enum machine_mode inner_mode)
848 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
849 return subreg_lowpart_offset (outer_mode, inner_mode);
851 return -subreg_lowpart_offset (inner_mode, outer_mode);
854 /* Generate a REG rtx for a new pseudo register of mode MODE.
855 This pseudo is assigned the next sequential register number. */
858 gen_reg_rtx (enum machine_mode mode)
861 unsigned int align = GET_MODE_ALIGNMENT (mode);
863 gcc_assert (can_create_pseudo_p ());
865 /* If a virtual register with bigger mode alignment is generated,
866 increase stack alignment estimation because it might be spilled
868 if (SUPPORTS_STACK_ALIGNMENT
869 && crtl->stack_alignment_estimated < align
870 && !crtl->stack_realign_processed)
872 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
873 if (crtl->stack_alignment_estimated < min_align)
874 crtl->stack_alignment_estimated = min_align;
877 if (generating_concat_p
878 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
879 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
881 /* For complex modes, don't make a single pseudo.
882 Instead, make a CONCAT of two pseudos.
883 This allows noncontiguous allocation of the real and imaginary parts,
884 which makes much better code. Besides, allocating DCmode
885 pseudos overstrains reload on some machines like the 386. */
886 rtx realpart, imagpart;
887 enum machine_mode partmode = GET_MODE_INNER (mode);
889 realpart = gen_reg_rtx (partmode);
890 imagpart = gen_reg_rtx (partmode);
891 return gen_rtx_CONCAT (mode, realpart, imagpart);
894 /* Make sure regno_pointer_align, and regno_reg_rtx are large
895 enough to have an element for this pseudo reg number. */
897 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
899 int old_size = crtl->emit.regno_pointer_align_length;
903 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
904 memset (tmp + old_size, 0, old_size);
905 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
907 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
908 memset (new1 + old_size, 0, old_size * sizeof (rtx));
909 regno_reg_rtx = new1;
911 crtl->emit.regno_pointer_align_length = old_size * 2;
914 val = gen_raw_REG (mode, reg_rtx_no);
915 regno_reg_rtx[reg_rtx_no++] = val;
919 /* Update NEW with the same attributes as REG, but with OFFSET added
920 to the REG_OFFSET. */
923 update_reg_offset (rtx new_rtx, rtx reg, int offset)
925 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
926 REG_OFFSET (reg) + offset);
929 /* Generate a register with same attributes as REG, but with OFFSET
930 added to the REG_OFFSET. */
933 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
936 rtx new_rtx = gen_rtx_REG (mode, regno);
938 update_reg_offset (new_rtx, reg, offset);
942 /* Generate a new pseudo-register with the same attributes as REG, but
943 with OFFSET added to the REG_OFFSET. */
946 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
948 rtx new_rtx = gen_reg_rtx (mode);
950 update_reg_offset (new_rtx, reg, offset);
954 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
955 new register is a (possibly paradoxical) lowpart of the old one. */
958 adjust_reg_mode (rtx reg, enum machine_mode mode)
960 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
961 PUT_MODE (reg, mode);
964 /* Copy REG's attributes from X, if X has any attributes. If REG and X
965 have different modes, REG is a (possibly paradoxical) lowpart of X. */
968 set_reg_attrs_from_value (rtx reg, rtx x)
972 /* Hard registers can be reused for multiple purposes within the same
973 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
975 if (HARD_REGISTER_P (reg))
978 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
981 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
983 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
985 mark_reg_pointer (reg, 0);
990 update_reg_offset (reg, x, offset);
992 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
996 /* Generate a REG rtx for a new pseudo register, copying the mode
997 and attributes from X. */
1000 gen_reg_rtx_and_attrs (rtx x)
1002 rtx reg = gen_reg_rtx (GET_MODE (x));
1003 set_reg_attrs_from_value (reg, x);
1007 /* Set the register attributes for registers contained in PARM_RTX.
1008 Use needed values from memory attributes of MEM. */
1011 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1013 if (REG_P (parm_rtx))
1014 set_reg_attrs_from_value (parm_rtx, mem);
1015 else if (GET_CODE (parm_rtx) == PARALLEL)
1017 /* Check for a NULL entry in the first slot, used to indicate that the
1018 parameter goes both on the stack and in registers. */
1019 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1020 for (; i < XVECLEN (parm_rtx, 0); i++)
1022 rtx x = XVECEXP (parm_rtx, 0, i);
1023 if (REG_P (XEXP (x, 0)))
1024 REG_ATTRS (XEXP (x, 0))
1025 = get_reg_attrs (MEM_EXPR (mem),
1026 INTVAL (XEXP (x, 1)));
1031 /* Set the REG_ATTRS for registers in value X, given that X represents
1035 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1037 if (GET_CODE (x) == SUBREG)
1039 gcc_assert (subreg_lowpart_p (x));
1044 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1046 if (GET_CODE (x) == CONCAT)
1048 if (REG_P (XEXP (x, 0)))
1049 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1050 if (REG_P (XEXP (x, 1)))
1051 REG_ATTRS (XEXP (x, 1))
1052 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1054 if (GET_CODE (x) == PARALLEL)
1058 /* Check for a NULL entry, used to indicate that the parameter goes
1059 both on the stack and in registers. */
1060 if (XEXP (XVECEXP (x, 0, 0), 0))
1065 for (i = start; i < XVECLEN (x, 0); i++)
1067 rtx y = XVECEXP (x, 0, i);
1068 if (REG_P (XEXP (y, 0)))
1069 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1074 /* Assign the RTX X to declaration T. */
1077 set_decl_rtl (tree t, rtx x)
1079 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1081 set_reg_attrs_for_decl_rtl (t, x);
1084 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1085 if the ABI requires the parameter to be passed by reference. */
1088 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1090 DECL_INCOMING_RTL (t) = x;
1091 if (x && !by_reference_p)
1092 set_reg_attrs_for_decl_rtl (t, x);
1095 /* Identify REG (which may be a CONCAT) as a user register. */
1098 mark_user_reg (rtx reg)
1100 if (GET_CODE (reg) == CONCAT)
1102 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1103 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1107 gcc_assert (REG_P (reg));
1108 REG_USERVAR_P (reg) = 1;
1112 /* Identify REG as a probable pointer register and show its alignment
1113 as ALIGN, if nonzero. */
1116 mark_reg_pointer (rtx reg, int align)
1118 if (! REG_POINTER (reg))
1120 REG_POINTER (reg) = 1;
1123 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1125 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1126 /* We can no-longer be sure just how aligned this pointer is. */
1127 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1130 /* Return 1 plus largest pseudo reg number used in the current function. */
1138 /* Return 1 + the largest label number used so far in the current function. */
1141 max_label_num (void)
1146 /* Return first label number used in this function (if any were used). */
1149 get_first_label_num (void)
1151 return first_label_num;
1154 /* If the rtx for label was created during the expansion of a nested
1155 function, then first_label_num won't include this label number.
1156 Fix this now so that array indices work later. */
1159 maybe_set_first_label_num (rtx x)
1161 if (CODE_LABEL_NUMBER (x) < first_label_num)
1162 first_label_num = CODE_LABEL_NUMBER (x);
1165 /* Return a value representing some low-order bits of X, where the number
1166 of low-order bits is given by MODE. Note that no conversion is done
1167 between floating-point and fixed-point values, rather, the bit
1168 representation is returned.
1170 This function handles the cases in common between gen_lowpart, below,
1171 and two variants in cse.c and combine.c. These are the cases that can
1172 be safely handled at all points in the compilation.
1174 If this is not a case we can handle, return 0. */
1177 gen_lowpart_common (enum machine_mode mode, rtx x)
1179 int msize = GET_MODE_SIZE (mode);
1182 enum machine_mode innermode;
1184 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1185 so we have to make one up. Yuk. */
1186 innermode = GET_MODE (x);
1188 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1189 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1190 else if (innermode == VOIDmode)
1191 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1193 xsize = GET_MODE_SIZE (innermode);
1195 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1197 if (innermode == mode)
1200 /* MODE must occupy no more words than the mode of X. */
1201 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1202 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1205 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1206 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1209 offset = subreg_lowpart_offset (mode, innermode);
1211 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1212 && (GET_MODE_CLASS (mode) == MODE_INT
1213 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1215 /* If we are getting the low-order part of something that has been
1216 sign- or zero-extended, we can either just use the object being
1217 extended or make a narrower extension. If we want an even smaller
1218 piece than the size of the object being extended, call ourselves
1221 This case is used mostly by combine and cse. */
1223 if (GET_MODE (XEXP (x, 0)) == mode)
1225 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1226 return gen_lowpart_common (mode, XEXP (x, 0));
1227 else if (msize < xsize)
1228 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1230 else if (GET_CODE (x) == SUBREG || REG_P (x)
1231 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1232 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1233 return simplify_gen_subreg (mode, x, innermode, offset);
1235 /* Otherwise, we can't do this. */
1240 gen_highpart (enum machine_mode mode, rtx x)
1242 unsigned int msize = GET_MODE_SIZE (mode);
1245 /* This case loses if X is a subreg. To catch bugs early,
1246 complain if an invalid MODE is used even in other cases. */
1247 gcc_assert (msize <= UNITS_PER_WORD
1248 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1250 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1251 subreg_highpart_offset (mode, GET_MODE (x)));
1252 gcc_assert (result);
1254 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1255 the target if we have a MEM. gen_highpart must return a valid operand,
1256 emitting code if necessary to do so. */
1259 result = validize_mem (result);
1260 gcc_assert (result);
1266 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1267 be VOIDmode constant. */
1269 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1271 if (GET_MODE (exp) != VOIDmode)
1273 gcc_assert (GET_MODE (exp) == innermode);
1274 return gen_highpart (outermode, exp);
1276 return simplify_gen_subreg (outermode, exp, innermode,
1277 subreg_highpart_offset (outermode, innermode));
1280 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1283 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1285 unsigned int offset = 0;
1286 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1290 if (WORDS_BIG_ENDIAN)
1291 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1292 if (BYTES_BIG_ENDIAN)
1293 offset += difference % UNITS_PER_WORD;
1299 /* Return offset in bytes to get OUTERMODE high part
1300 of the value in mode INNERMODE stored in memory in target format. */
1302 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1304 unsigned int offset = 0;
1305 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1307 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1311 if (! WORDS_BIG_ENDIAN)
1312 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1313 if (! BYTES_BIG_ENDIAN)
1314 offset += difference % UNITS_PER_WORD;
1320 /* Return 1 iff X, assumed to be a SUBREG,
1321 refers to the least significant part of its containing reg.
1322 If X is not a SUBREG, always return 1 (it is its own low part!). */
1325 subreg_lowpart_p (const_rtx x)
1327 if (GET_CODE (x) != SUBREG)
1329 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1332 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1333 == SUBREG_BYTE (x));
1336 /* Return subword OFFSET of operand OP.
1337 The word number, OFFSET, is interpreted as the word number starting
1338 at the low-order address. OFFSET 0 is the low-order word if not
1339 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1341 If we cannot extract the required word, we return zero. Otherwise,
1342 an rtx corresponding to the requested word will be returned.
1344 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1345 reload has completed, a valid address will always be returned. After
1346 reload, if a valid address cannot be returned, we return zero.
1348 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1349 it is the responsibility of the caller.
1351 MODE is the mode of OP in case it is a CONST_INT.
1353 ??? This is still rather broken for some cases. The problem for the
1354 moment is that all callers of this thing provide no 'goal mode' to
1355 tell us to work with. This exists because all callers were written
1356 in a word based SUBREG world.
1357 Now use of this function can be deprecated by simplify_subreg in most
1362 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1364 if (mode == VOIDmode)
1365 mode = GET_MODE (op);
1367 gcc_assert (mode != VOIDmode);
1369 /* If OP is narrower than a word, fail. */
1371 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1374 /* If we want a word outside OP, return zero. */
1376 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1379 /* Form a new MEM at the requested address. */
1382 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1384 if (! validate_address)
1387 else if (reload_completed)
1389 if (! strict_memory_address_p (word_mode, XEXP (new_rtx, 0)))
1393 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1396 /* Rest can be handled by simplify_subreg. */
1397 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1400 /* Similar to `operand_subword', but never return 0. If we can't
1401 extract the required subword, put OP into a register and try again.
1402 The second attempt must succeed. We always validate the address in
1405 MODE is the mode of OP, in case it is CONST_INT. */
1408 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1410 rtx result = operand_subword (op, offset, 1, mode);
1415 if (mode != BLKmode && mode != VOIDmode)
1417 /* If this is a register which can not be accessed by words, copy it
1418 to a pseudo register. */
1420 op = copy_to_reg (op);
1422 op = force_reg (mode, op);
1425 result = operand_subword (op, offset, 1, mode);
1426 gcc_assert (result);
1431 /* Returns 1 if both MEM_EXPR can be considered equal
1435 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1440 if (! expr1 || ! expr2)
1443 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1446 return operand_equal_p (expr1, expr2, 0);
1449 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1450 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1454 get_mem_align_offset (rtx mem, unsigned int align)
1457 unsigned HOST_WIDE_INT offset;
1459 /* This function can't use
1460 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1461 || !CONST_INT_P (MEM_OFFSET (mem))
1462 || (get_object_alignment (MEM_EXPR (mem), MEM_ALIGN (mem), align)
1466 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1468 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1469 for <variable>. get_inner_reference doesn't handle it and
1470 even if it did, the alignment in that case needs to be determined
1471 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1472 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1473 isn't sufficiently aligned, the object it is in might be. */
1474 gcc_assert (MEM_P (mem));
1475 expr = MEM_EXPR (mem);
1476 if (expr == NULL_TREE
1477 || MEM_OFFSET (mem) == NULL_RTX
1478 || !CONST_INT_P (MEM_OFFSET (mem)))
1481 offset = INTVAL (MEM_OFFSET (mem));
1484 if (DECL_ALIGN (expr) < align)
1487 else if (INDIRECT_REF_P (expr))
1489 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1492 else if (TREE_CODE (expr) == COMPONENT_REF)
1496 tree inner = TREE_OPERAND (expr, 0);
1497 tree field = TREE_OPERAND (expr, 1);
1498 tree byte_offset = component_ref_field_offset (expr);
1499 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1502 || !host_integerp (byte_offset, 1)
1503 || !host_integerp (bit_offset, 1))
1506 offset += tree_low_cst (byte_offset, 1);
1507 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1509 if (inner == NULL_TREE)
1511 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1512 < (unsigned int) align)
1516 else if (DECL_P (inner))
1518 if (DECL_ALIGN (inner) < align)
1522 else if (TREE_CODE (inner) != COMPONENT_REF)
1530 return offset & ((align / BITS_PER_UNIT) - 1);
1533 /* Given REF (a MEM) and T, either the type of X or the expression
1534 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1535 if we are making a new object of this type. BITPOS is nonzero if
1536 there is an offset outstanding on T that will be applied later. */
1539 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1540 HOST_WIDE_INT bitpos)
1542 alias_set_type alias = MEM_ALIAS_SET (ref);
1543 tree expr = MEM_EXPR (ref);
1544 rtx offset = MEM_OFFSET (ref);
1545 rtx size = MEM_SIZE (ref);
1546 unsigned int align = MEM_ALIGN (ref);
1547 HOST_WIDE_INT apply_bitpos = 0;
1550 /* It can happen that type_for_mode was given a mode for which there
1551 is no language-level type. In which case it returns NULL, which
1556 type = TYPE_P (t) ? t : TREE_TYPE (t);
1557 if (type == error_mark_node)
1560 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1561 wrong answer, as it assumes that DECL_RTL already has the right alias
1562 info. Callers should not set DECL_RTL until after the call to
1563 set_mem_attributes. */
1564 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1566 /* Get the alias set from the expression or type (perhaps using a
1567 front-end routine) and use it. */
1568 alias = get_alias_set (t);
1570 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1571 MEM_IN_STRUCT_P (ref)
1572 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1573 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1575 /* If we are making an object of this type, or if this is a DECL, we know
1576 that it is a scalar if the type is not an aggregate. */
1577 if ((objectp || DECL_P (t))
1578 && ! AGGREGATE_TYPE_P (type)
1579 && TREE_CODE (type) != COMPLEX_TYPE)
1580 MEM_SCALAR_P (ref) = 1;
1582 /* We can set the alignment from the type if we are making an object,
1583 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1584 if (objectp || TREE_CODE (t) == INDIRECT_REF
1585 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1586 || TYPE_ALIGN_OK (type))
1587 align = MAX (align, TYPE_ALIGN (type));
1589 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1591 if (integer_zerop (TREE_OPERAND (t, 1)))
1592 /* We don't know anything about the alignment. */
1593 align = BITS_PER_UNIT;
1595 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1598 /* If the size is known, we can set that. */
1599 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1600 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1602 /* If T is not a type, we may be able to deduce some more information about
1607 bool align_computed = false;
1609 if (TREE_THIS_VOLATILE (t))
1610 MEM_VOLATILE_P (ref) = 1;
1612 /* Now remove any conversions: they don't change what the underlying
1613 object is. Likewise for SAVE_EXPR. */
1614 while (CONVERT_EXPR_P (t)
1615 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1616 || TREE_CODE (t) == SAVE_EXPR)
1617 t = TREE_OPERAND (t, 0);
1619 /* We may look through structure-like accesses for the purposes of
1620 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1622 while (TREE_CODE (base) == COMPONENT_REF
1623 || TREE_CODE (base) == REALPART_EXPR
1624 || TREE_CODE (base) == IMAGPART_EXPR
1625 || TREE_CODE (base) == BIT_FIELD_REF)
1626 base = TREE_OPERAND (base, 0);
1630 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1631 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1633 MEM_NOTRAP_P (ref) = 1;
1636 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1638 base = get_base_address (base);
1639 if (base && DECL_P (base)
1640 && TREE_READONLY (base)
1641 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1643 tree base_type = TREE_TYPE (base);
1644 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1645 || DECL_ARTIFICIAL (base));
1646 MEM_READONLY_P (ref) = 1;
1649 /* If this expression uses it's parent's alias set, mark it such
1650 that we won't change it. */
1651 if (component_uses_parent_alias_set (t))
1652 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1654 /* If this is a decl, set the attributes of the MEM from it. */
1658 offset = const0_rtx;
1659 apply_bitpos = bitpos;
1660 size = (DECL_SIZE_UNIT (t)
1661 && host_integerp (DECL_SIZE_UNIT (t), 1)
1662 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1663 align = DECL_ALIGN (t);
1664 align_computed = true;
1667 /* If this is a constant, we know the alignment. */
1668 else if (CONSTANT_CLASS_P (t))
1670 align = TYPE_ALIGN (type);
1671 #ifdef CONSTANT_ALIGNMENT
1672 align = CONSTANT_ALIGNMENT (t, align);
1674 align_computed = true;
1677 /* If this is a field reference and not a bit-field, record it. */
1678 /* ??? There is some information that can be gleaned from bit-fields,
1679 such as the word offset in the structure that might be modified.
1680 But skip it for now. */
1681 else if (TREE_CODE (t) == COMPONENT_REF
1682 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1685 offset = const0_rtx;
1686 apply_bitpos = bitpos;
1687 /* ??? Any reason the field size would be different than
1688 the size we got from the type? */
1691 /* If this is an array reference, look for an outer field reference. */
1692 else if (TREE_CODE (t) == ARRAY_REF)
1694 tree off_tree = size_zero_node;
1695 /* We can't modify t, because we use it at the end of the
1701 tree index = TREE_OPERAND (t2, 1);
1702 tree low_bound = array_ref_low_bound (t2);
1703 tree unit_size = array_ref_element_size (t2);
1705 /* We assume all arrays have sizes that are a multiple of a byte.
1706 First subtract the lower bound, if any, in the type of the
1707 index, then convert to sizetype and multiply by the size of
1708 the array element. */
1709 if (! integer_zerop (low_bound))
1710 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1713 off_tree = size_binop (PLUS_EXPR,
1714 size_binop (MULT_EXPR,
1715 fold_convert (sizetype,
1719 t2 = TREE_OPERAND (t2, 0);
1721 while (TREE_CODE (t2) == ARRAY_REF);
1727 if (host_integerp (off_tree, 1))
1729 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1730 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1731 align = DECL_ALIGN (t2);
1732 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1734 align_computed = true;
1735 offset = GEN_INT (ioff);
1736 apply_bitpos = bitpos;
1739 else if (TREE_CODE (t2) == COMPONENT_REF)
1743 if (host_integerp (off_tree, 1))
1745 offset = GEN_INT (tree_low_cst (off_tree, 1));
1746 apply_bitpos = bitpos;
1748 /* ??? Any reason the field size would be different than
1749 the size we got from the type? */
1751 else if (flag_argument_noalias > 1
1752 && (INDIRECT_REF_P (t2))
1753 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1760 /* If this is a Fortran indirect argument reference, record the
1762 else if (flag_argument_noalias > 1
1763 && (INDIRECT_REF_P (t))
1764 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1770 if (!align_computed && !INDIRECT_REF_P (t))
1772 unsigned int obj_align
1773 = get_object_alignment (t, align, BIGGEST_ALIGNMENT);
1774 align = MAX (align, obj_align);
1778 /* If we modified OFFSET based on T, then subtract the outstanding
1779 bit position offset. Similarly, increase the size of the accessed
1780 object to contain the negative offset. */
1783 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1785 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1788 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1790 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1791 we're overlapping. */
1796 /* Now set the attributes we computed above. */
1798 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1800 /* If this is already known to be a scalar or aggregate, we are done. */
1801 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1804 /* If it is a reference into an aggregate, this is part of an aggregate.
1805 Otherwise we don't know. */
1806 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1807 || TREE_CODE (t) == ARRAY_RANGE_REF
1808 || TREE_CODE (t) == BIT_FIELD_REF)
1809 MEM_IN_STRUCT_P (ref) = 1;
1813 set_mem_attributes (rtx ref, tree t, int objectp)
1815 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1818 /* Set the alias set of MEM to SET. */
1821 set_mem_alias_set (rtx mem, alias_set_type set)
1823 #ifdef ENABLE_CHECKING
1824 /* If the new and old alias sets don't conflict, something is wrong. */
1825 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1828 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1829 MEM_SIZE (mem), MEM_ALIGN (mem),
1833 /* Set the alignment of MEM to ALIGN bits. */
1836 set_mem_align (rtx mem, unsigned int align)
1838 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1839 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1843 /* Set the expr for MEM to EXPR. */
1846 set_mem_expr (rtx mem, tree expr)
1849 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1850 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1853 /* Set the offset of MEM to OFFSET. */
1856 set_mem_offset (rtx mem, rtx offset)
1858 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1859 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1863 /* Set the size of MEM to SIZE. */
1866 set_mem_size (rtx mem, rtx size)
1868 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1869 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1873 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1874 and its address changed to ADDR. (VOIDmode means don't change the mode.
1875 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1876 returned memory location is required to be valid. The memory
1877 attributes are not changed. */
1880 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1884 gcc_assert (MEM_P (memref));
1885 if (mode == VOIDmode)
1886 mode = GET_MODE (memref);
1888 addr = XEXP (memref, 0);
1889 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1890 && (!validate || memory_address_p (mode, addr)))
1895 if (reload_in_progress || reload_completed)
1896 gcc_assert (memory_address_p (mode, addr));
1898 addr = memory_address (mode, addr);
1901 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1904 new_rtx = gen_rtx_MEM (mode, addr);
1905 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1909 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1910 way we are changing MEMREF, so we only preserve the alias set. */
1913 change_address (rtx memref, enum machine_mode mode, rtx addr)
1915 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1916 enum machine_mode mmode = GET_MODE (new_rtx);
1919 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1920 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1922 /* If there are no changes, just return the original memory reference. */
1923 if (new_rtx == memref)
1925 if (MEM_ATTRS (memref) == 0
1926 || (MEM_EXPR (memref) == NULL
1927 && MEM_OFFSET (memref) == NULL
1928 && MEM_SIZE (memref) == size
1929 && MEM_ALIGN (memref) == align))
1932 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1933 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1937 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1942 /* Return a memory reference like MEMREF, but with its mode changed
1943 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1944 nonzero, the memory address is forced to be valid.
1945 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1946 and caller is responsible for adjusting MEMREF base register. */
1949 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1950 int validate, int adjust)
1952 rtx addr = XEXP (memref, 0);
1954 rtx memoffset = MEM_OFFSET (memref);
1956 unsigned int memalign = MEM_ALIGN (memref);
1959 /* If there are no changes, just return the original memory reference. */
1960 if (mode == GET_MODE (memref) && !offset
1961 && (!validate || memory_address_p (mode, addr)))
1964 /* ??? Prefer to create garbage instead of creating shared rtl.
1965 This may happen even if offset is nonzero -- consider
1966 (plus (plus reg reg) const_int) -- so do this always. */
1967 addr = copy_rtx (addr);
1969 /* Convert a possibly large offset to a signed value within the
1970 range of the target address space. */
1971 pbits = GET_MODE_BITSIZE (Pmode);
1972 if (HOST_BITS_PER_WIDE_INT > pbits)
1974 int shift = HOST_BITS_PER_WIDE_INT - pbits;
1975 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
1981 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1982 object, we can merge it into the LO_SUM. */
1983 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1985 && (unsigned HOST_WIDE_INT) offset
1986 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1987 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1988 plus_constant (XEXP (addr, 1), offset));
1990 addr = plus_constant (addr, offset);
1993 new_rtx = change_address_1 (memref, mode, addr, validate);
1995 /* If the address is a REG, change_address_1 rightfully returns memref,
1996 but this would destroy memref's MEM_ATTRS. */
1997 if (new_rtx == memref && offset != 0)
1998 new_rtx = copy_rtx (new_rtx);
2000 /* Compute the new values of the memory attributes due to this adjustment.
2001 We add the offsets and update the alignment. */
2003 memoffset = GEN_INT (offset + INTVAL (memoffset));
2005 /* Compute the new alignment by taking the MIN of the alignment and the
2006 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2011 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2013 /* We can compute the size in a number of ways. */
2014 if (GET_MODE (new_rtx) != BLKmode)
2015 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2016 else if (MEM_SIZE (memref))
2017 size = plus_constant (MEM_SIZE (memref), -offset);
2019 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2020 memoffset, size, memalign, GET_MODE (new_rtx));
2022 /* At some point, we should validate that this offset is within the object,
2023 if all the appropriate values are known. */
2027 /* Return a memory reference like MEMREF, but with its mode changed
2028 to MODE and its address changed to ADDR, which is assumed to be
2029 MEMREF offset by OFFSET bytes. If VALIDATE is
2030 nonzero, the memory address is forced to be valid. */
2033 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2034 HOST_WIDE_INT offset, int validate)
2036 memref = change_address_1 (memref, VOIDmode, addr, validate);
2037 return adjust_address_1 (memref, mode, offset, validate, 0);
2040 /* Return a memory reference like MEMREF, but whose address is changed by
2041 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2042 known to be in OFFSET (possibly 1). */
2045 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2047 rtx new_rtx, addr = XEXP (memref, 0);
2049 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2051 /* At this point we don't know _why_ the address is invalid. It
2052 could have secondary memory references, multiplies or anything.
2054 However, if we did go and rearrange things, we can wind up not
2055 being able to recognize the magic around pic_offset_table_rtx.
2056 This stuff is fragile, and is yet another example of why it is
2057 bad to expose PIC machinery too early. */
2058 if (! memory_address_p (GET_MODE (memref), new_rtx)
2059 && GET_CODE (addr) == PLUS
2060 && XEXP (addr, 0) == pic_offset_table_rtx)
2062 addr = force_reg (GET_MODE (addr), addr);
2063 new_rtx = simplify_gen_binary (PLUS, Pmode, addr, offset);
2066 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2067 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2069 /* If there are no changes, just return the original memory reference. */
2070 if (new_rtx == memref)
2073 /* Update the alignment to reflect the offset. Reset the offset, which
2076 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2077 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2078 GET_MODE (new_rtx));
2082 /* Return a memory reference like MEMREF, but with its address changed to
2083 ADDR. The caller is asserting that the actual piece of memory pointed
2084 to is the same, just the form of the address is being changed, such as
2085 by putting something into a register. */
2088 replace_equiv_address (rtx memref, rtx addr)
2090 /* change_address_1 copies the memory attribute structure without change
2091 and that's exactly what we want here. */
2092 update_temp_slot_address (XEXP (memref, 0), addr);
2093 return change_address_1 (memref, VOIDmode, addr, 1);
2096 /* Likewise, but the reference is not required to be valid. */
2099 replace_equiv_address_nv (rtx memref, rtx addr)
2101 return change_address_1 (memref, VOIDmode, addr, 0);
2104 /* Return a memory reference like MEMREF, but with its mode widened to
2105 MODE and offset by OFFSET. This would be used by targets that e.g.
2106 cannot issue QImode memory operations and have to use SImode memory
2107 operations plus masking logic. */
2110 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2112 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2113 tree expr = MEM_EXPR (new_rtx);
2114 rtx memoffset = MEM_OFFSET (new_rtx);
2115 unsigned int size = GET_MODE_SIZE (mode);
2117 /* If there are no changes, just return the original memory reference. */
2118 if (new_rtx == memref)
2121 /* If we don't know what offset we were at within the expression, then
2122 we can't know if we've overstepped the bounds. */
2128 if (TREE_CODE (expr) == COMPONENT_REF)
2130 tree field = TREE_OPERAND (expr, 1);
2131 tree offset = component_ref_field_offset (expr);
2133 if (! DECL_SIZE_UNIT (field))
2139 /* Is the field at least as large as the access? If so, ok,
2140 otherwise strip back to the containing structure. */
2141 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2142 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2143 && INTVAL (memoffset) >= 0)
2146 if (! host_integerp (offset, 1))
2152 expr = TREE_OPERAND (expr, 0);
2154 = (GEN_INT (INTVAL (memoffset)
2155 + tree_low_cst (offset, 1)
2156 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2159 /* Similarly for the decl. */
2160 else if (DECL_P (expr)
2161 && DECL_SIZE_UNIT (expr)
2162 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2163 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2164 && (! memoffset || INTVAL (memoffset) >= 0))
2168 /* The widened memory access overflows the expression, which means
2169 that it could alias another expression. Zap it. */
2176 memoffset = NULL_RTX;
2178 /* The widened memory may alias other stuff, so zap the alias set. */
2179 /* ??? Maybe use get_alias_set on any remaining expression. */
2181 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2182 MEM_ALIGN (new_rtx), mode);
2187 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2188 static GTY(()) tree spill_slot_decl;
2191 get_spill_slot_decl (bool force_build_p)
2193 tree d = spill_slot_decl;
2196 if (d || !force_build_p)
2199 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2200 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2201 DECL_ARTIFICIAL (d) = 1;
2202 DECL_IGNORED_P (d) = 1;
2204 TREE_THIS_NOTRAP (d) = 1;
2205 spill_slot_decl = d;
2207 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2208 MEM_NOTRAP_P (rd) = 1;
2209 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2210 NULL_RTX, 0, BLKmode);
2211 SET_DECL_RTL (d, rd);
2216 /* Given MEM, a result from assign_stack_local, fill in the memory
2217 attributes as appropriate for a register allocator spill slot.
2218 These slots are not aliasable by other memory. We arrange for
2219 them all to use a single MEM_EXPR, so that the aliasing code can
2220 work properly in the case of shared spill slots. */
2223 set_mem_attrs_for_spill (rtx mem)
2225 alias_set_type alias;
2229 expr = get_spill_slot_decl (true);
2230 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2232 /* We expect the incoming memory to be of the form:
2233 (mem:MODE (plus (reg sfp) (const_int offset)))
2234 with perhaps the plus missing for offset = 0. */
2235 addr = XEXP (mem, 0);
2236 offset = const0_rtx;
2237 if (GET_CODE (addr) == PLUS
2238 && CONST_INT_P (XEXP (addr, 1)))
2239 offset = XEXP (addr, 1);
2241 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2242 MEM_SIZE (mem), MEM_ALIGN (mem),
2244 MEM_NOTRAP_P (mem) = 1;
2247 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2250 gen_label_rtx (void)
2252 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2253 NULL, label_num++, NULL);
2256 /* For procedure integration. */
2258 /* Install new pointers to the first and last insns in the chain.
2259 Also, set cur_insn_uid to one higher than the last in use.
2260 Used for an inline-procedure after copying the insn chain. */
2263 set_new_first_and_last_insn (rtx first, rtx last)
2271 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2273 int debug_count = 0;
2275 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2276 cur_debug_insn_uid = 0;
2278 for (insn = first; insn; insn = NEXT_INSN (insn))
2279 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2280 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2283 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2284 if (DEBUG_INSN_P (insn))
2289 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2291 cur_debug_insn_uid++;
2294 for (insn = first; insn; insn = NEXT_INSN (insn))
2295 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2300 /* Go through all the RTL insn bodies and copy any invalid shared
2301 structure. This routine should only be called once. */
2304 unshare_all_rtl_1 (rtx insn)
2306 /* Unshare just about everything else. */
2307 unshare_all_rtl_in_chain (insn);
2309 /* Make sure the addresses of stack slots found outside the insn chain
2310 (such as, in DECL_RTL of a variable) are not shared
2311 with the insn chain.
2313 This special care is necessary when the stack slot MEM does not
2314 actually appear in the insn chain. If it does appear, its address
2315 is unshared from all else at that point. */
2316 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2319 /* Go through all the RTL insn bodies and copy any invalid shared
2320 structure, again. This is a fairly expensive thing to do so it
2321 should be done sparingly. */
2324 unshare_all_rtl_again (rtx insn)
2329 for (p = insn; p; p = NEXT_INSN (p))
2332 reset_used_flags (PATTERN (p));
2333 reset_used_flags (REG_NOTES (p));
2336 /* Make sure that virtual stack slots are not shared. */
2337 set_used_decls (DECL_INITIAL (cfun->decl));
2339 /* Make sure that virtual parameters are not shared. */
2340 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2341 set_used_flags (DECL_RTL (decl));
2343 reset_used_flags (stack_slot_list);
2345 unshare_all_rtl_1 (insn);
2349 unshare_all_rtl (void)
2351 unshare_all_rtl_1 (get_insns ());
2355 struct rtl_opt_pass pass_unshare_all_rtl =
2359 "unshare", /* name */
2361 unshare_all_rtl, /* execute */
2364 0, /* static_pass_number */
2365 TV_NONE, /* tv_id */
2366 0, /* properties_required */
2367 0, /* properties_provided */
2368 0, /* properties_destroyed */
2369 0, /* todo_flags_start */
2370 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2375 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2376 Recursively does the same for subexpressions. */
2379 verify_rtx_sharing (rtx orig, rtx insn)
2384 const char *format_ptr;
2389 code = GET_CODE (x);
2391 /* These types may be freely shared. */
2409 /* SCRATCH must be shared because they represent distinct values. */
2411 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2416 if (shared_const_p (orig))
2421 /* A MEM is allowed to be shared if its address is constant. */
2422 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2423 || reload_completed || reload_in_progress)
2432 /* This rtx may not be shared. If it has already been seen,
2433 replace it with a copy of itself. */
2434 #ifdef ENABLE_CHECKING
2435 if (RTX_FLAG (x, used))
2437 error ("invalid rtl sharing found in the insn");
2439 error ("shared rtx");
2441 internal_error ("internal consistency failure");
2444 gcc_assert (!RTX_FLAG (x, used));
2446 RTX_FLAG (x, used) = 1;
2448 /* Now scan the subexpressions recursively. */
2450 format_ptr = GET_RTX_FORMAT (code);
2452 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2454 switch (*format_ptr++)
2457 verify_rtx_sharing (XEXP (x, i), insn);
2461 if (XVEC (x, i) != NULL)
2464 int len = XVECLEN (x, i);
2466 for (j = 0; j < len; j++)
2468 /* We allow sharing of ASM_OPERANDS inside single
2470 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2471 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2473 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2475 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2484 /* Go through all the RTL insn bodies and check that there is no unexpected
2485 sharing in between the subexpressions. */
2488 verify_rtl_sharing (void)
2492 for (p = get_insns (); p; p = NEXT_INSN (p))
2495 reset_used_flags (PATTERN (p));
2496 reset_used_flags (REG_NOTES (p));
2497 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2500 rtx q, sequence = PATTERN (p);
2502 for (i = 0; i < XVECLEN (sequence, 0); i++)
2504 q = XVECEXP (sequence, 0, i);
2505 gcc_assert (INSN_P (q));
2506 reset_used_flags (PATTERN (q));
2507 reset_used_flags (REG_NOTES (q));
2512 for (p = get_insns (); p; p = NEXT_INSN (p))
2515 verify_rtx_sharing (PATTERN (p), p);
2516 verify_rtx_sharing (REG_NOTES (p), p);
2520 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2521 Assumes the mark bits are cleared at entry. */
2524 unshare_all_rtl_in_chain (rtx insn)
2526 for (; insn; insn = NEXT_INSN (insn))
2529 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2530 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2534 /* Go through all virtual stack slots of a function and mark them as
2535 shared. We never replace the DECL_RTLs themselves with a copy,
2536 but expressions mentioned into a DECL_RTL cannot be shared with
2537 expressions in the instruction stream.
2539 Note that reload may convert pseudo registers into memories in-place.
2540 Pseudo registers are always shared, but MEMs never are. Thus if we
2541 reset the used flags on MEMs in the instruction stream, we must set
2542 them again on MEMs that appear in DECL_RTLs. */
2545 set_used_decls (tree blk)
2550 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2551 if (DECL_RTL_SET_P (t))
2552 set_used_flags (DECL_RTL (t));
2554 /* Now process sub-blocks. */
2555 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2559 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2560 Recursively does the same for subexpressions. Uses
2561 copy_rtx_if_shared_1 to reduce stack space. */
2564 copy_rtx_if_shared (rtx orig)
2566 copy_rtx_if_shared_1 (&orig);
2570 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2571 use. Recursively does the same for subexpressions. */
2574 copy_rtx_if_shared_1 (rtx *orig1)
2580 const char *format_ptr;
2584 /* Repeat is used to turn tail-recursion into iteration. */
2591 code = GET_CODE (x);
2593 /* These types may be freely shared. */
2610 /* SCRATCH must be shared because they represent distinct values. */
2613 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2618 if (shared_const_p (x))
2628 /* The chain of insns is not being copied. */
2635 /* This rtx may not be shared. If it has already been seen,
2636 replace it with a copy of itself. */
2638 if (RTX_FLAG (x, used))
2640 x = shallow_copy_rtx (x);
2643 RTX_FLAG (x, used) = 1;
2645 /* Now scan the subexpressions recursively.
2646 We can store any replaced subexpressions directly into X
2647 since we know X is not shared! Any vectors in X
2648 must be copied if X was copied. */
2650 format_ptr = GET_RTX_FORMAT (code);
2651 length = GET_RTX_LENGTH (code);
2654 for (i = 0; i < length; i++)
2656 switch (*format_ptr++)
2660 copy_rtx_if_shared_1 (last_ptr);
2661 last_ptr = &XEXP (x, i);
2665 if (XVEC (x, i) != NULL)
2668 int len = XVECLEN (x, i);
2670 /* Copy the vector iff I copied the rtx and the length
2672 if (copied && len > 0)
2673 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2675 /* Call recursively on all inside the vector. */
2676 for (j = 0; j < len; j++)
2679 copy_rtx_if_shared_1 (last_ptr);
2680 last_ptr = &XVECEXP (x, i, j);
2695 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2696 to look for shared sub-parts. */
2699 reset_used_flags (rtx x)
2703 const char *format_ptr;
2706 /* Repeat is used to turn tail-recursion into iteration. */
2711 code = GET_CODE (x);
2713 /* These types may be freely shared so we needn't do any resetting
2738 /* The chain of insns is not being copied. */
2745 RTX_FLAG (x, used) = 0;
2747 format_ptr = GET_RTX_FORMAT (code);
2748 length = GET_RTX_LENGTH (code);
2750 for (i = 0; i < length; i++)
2752 switch (*format_ptr++)
2760 reset_used_flags (XEXP (x, i));
2764 for (j = 0; j < XVECLEN (x, i); j++)
2765 reset_used_flags (XVECEXP (x, i, j));
2771 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2772 to look for shared sub-parts. */
2775 set_used_flags (rtx x)
2779 const char *format_ptr;
2784 code = GET_CODE (x);
2786 /* These types may be freely shared so we needn't do any resetting
2811 /* The chain of insns is not being copied. */
2818 RTX_FLAG (x, used) = 1;
2820 format_ptr = GET_RTX_FORMAT (code);
2821 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2823 switch (*format_ptr++)
2826 set_used_flags (XEXP (x, i));
2830 for (j = 0; j < XVECLEN (x, i); j++)
2831 set_used_flags (XVECEXP (x, i, j));
2837 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2838 Return X or the rtx for the pseudo reg the value of X was copied into.
2839 OTHER must be valid as a SET_DEST. */
2842 make_safe_from (rtx x, rtx other)
2845 switch (GET_CODE (other))
2848 other = SUBREG_REG (other);
2850 case STRICT_LOW_PART:
2853 other = XEXP (other, 0);
2862 && GET_CODE (x) != SUBREG)
2864 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2865 || reg_mentioned_p (other, x))))
2867 rtx temp = gen_reg_rtx (GET_MODE (x));
2868 emit_move_insn (temp, x);
2874 /* Emission of insns (adding them to the doubly-linked list). */
2876 /* Return the first insn of the current sequence or current function. */
2884 /* Specify a new insn as the first in the chain. */
2887 set_first_insn (rtx insn)
2889 gcc_assert (!PREV_INSN (insn));
2893 /* Return the last insn emitted in current sequence or current function. */
2896 get_last_insn (void)
2901 /* Specify a new insn as the last in the chain. */
2904 set_last_insn (rtx insn)
2906 gcc_assert (!NEXT_INSN (insn));
2910 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2913 get_last_insn_anywhere (void)
2915 struct sequence_stack *stack;
2918 for (stack = seq_stack; stack; stack = stack->next)
2919 if (stack->last != 0)
2924 /* Return the first nonnote insn emitted in current sequence or current
2925 function. This routine looks inside SEQUENCEs. */
2928 get_first_nonnote_insn (void)
2930 rtx insn = first_insn;
2935 for (insn = next_insn (insn);
2936 insn && NOTE_P (insn);
2937 insn = next_insn (insn))
2941 if (NONJUMP_INSN_P (insn)
2942 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2943 insn = XVECEXP (PATTERN (insn), 0, 0);
2950 /* Return the last nonnote insn emitted in current sequence or current
2951 function. This routine looks inside SEQUENCEs. */
2954 get_last_nonnote_insn (void)
2956 rtx insn = last_insn;
2961 for (insn = previous_insn (insn);
2962 insn && NOTE_P (insn);
2963 insn = previous_insn (insn))
2967 if (NONJUMP_INSN_P (insn)
2968 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2969 insn = XVECEXP (PATTERN (insn), 0,
2970 XVECLEN (PATTERN (insn), 0) - 1);
2977 /* Return a number larger than any instruction's uid in this function. */
2982 return cur_insn_uid;
2985 /* Return the number of actual (non-debug) insns emitted in this
2989 get_max_insn_count (void)
2991 int n = cur_insn_uid;
2993 /* The table size must be stable across -g, to avoid codegen
2994 differences due to debug insns, and not be affected by
2995 -fmin-insn-uid, to avoid excessive table size and to simplify
2996 debugging of -fcompare-debug failures. */
2997 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
2998 n -= cur_debug_insn_uid;
3000 n -= MIN_NONDEBUG_INSN_UID;
3006 /* Return the next insn. If it is a SEQUENCE, return the first insn
3010 next_insn (rtx insn)
3014 insn = NEXT_INSN (insn);
3015 if (insn && NONJUMP_INSN_P (insn)
3016 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3017 insn = XVECEXP (PATTERN (insn), 0, 0);
3023 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3027 previous_insn (rtx insn)
3031 insn = PREV_INSN (insn);
3032 if (insn && NONJUMP_INSN_P (insn)
3033 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3034 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3040 /* Return the next insn after INSN that is not a NOTE. This routine does not
3041 look inside SEQUENCEs. */
3044 next_nonnote_insn (rtx insn)
3048 insn = NEXT_INSN (insn);
3049 if (insn == 0 || !NOTE_P (insn))
3056 /* Return the next insn after INSN that is not a NOTE, but stop the
3057 search before we enter another basic block. This routine does not
3058 look inside SEQUENCEs. */
3061 next_nonnote_insn_bb (rtx insn)
3065 insn = NEXT_INSN (insn);
3066 if (insn == 0 || !NOTE_P (insn))
3068 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3075 /* Return the previous insn before INSN that is not a NOTE. This routine does
3076 not look inside SEQUENCEs. */
3079 prev_nonnote_insn (rtx insn)
3083 insn = PREV_INSN (insn);
3084 if (insn == 0 || !NOTE_P (insn))
3091 /* Return the previous insn before INSN that is not a NOTE, but stop
3092 the search before we enter another basic block. This routine does
3093 not look inside SEQUENCEs. */
3096 prev_nonnote_insn_bb (rtx insn)
3100 insn = PREV_INSN (insn);
3101 if (insn == 0 || !NOTE_P (insn))
3103 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3110 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3111 routine does not look inside SEQUENCEs. */
3114 next_nondebug_insn (rtx insn)
3118 insn = NEXT_INSN (insn);
3119 if (insn == 0 || !DEBUG_INSN_P (insn))
3126 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3127 This routine does not look inside SEQUENCEs. */
3130 prev_nondebug_insn (rtx insn)
3134 insn = PREV_INSN (insn);
3135 if (insn == 0 || !DEBUG_INSN_P (insn))
3142 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3143 or 0, if there is none. This routine does not look inside
3147 next_real_insn (rtx insn)
3151 insn = NEXT_INSN (insn);
3152 if (insn == 0 || INSN_P (insn))
3159 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3160 or 0, if there is none. This routine does not look inside
3164 prev_real_insn (rtx insn)
3168 insn = PREV_INSN (insn);
3169 if (insn == 0 || INSN_P (insn))
3176 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3177 This routine does not look inside SEQUENCEs. */
3180 last_call_insn (void)
3184 for (insn = get_last_insn ();
3185 insn && !CALL_P (insn);
3186 insn = PREV_INSN (insn))
3192 /* Find the next insn after INSN that really does something. This routine
3193 does not look inside SEQUENCEs. Until reload has completed, this is the
3194 same as next_real_insn. */
3197 active_insn_p (const_rtx insn)
3199 return (CALL_P (insn) || JUMP_P (insn)
3200 || (NONJUMP_INSN_P (insn)
3201 && (! reload_completed
3202 || (GET_CODE (PATTERN (insn)) != USE
3203 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3207 next_active_insn (rtx insn)
3211 insn = NEXT_INSN (insn);
3212 if (insn == 0 || active_insn_p (insn))
3219 /* Find the last insn before INSN that really does something. This routine
3220 does not look inside SEQUENCEs. Until reload has completed, this is the
3221 same as prev_real_insn. */
3224 prev_active_insn (rtx insn)
3228 insn = PREV_INSN (insn);
3229 if (insn == 0 || active_insn_p (insn))
3236 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3239 next_label (rtx insn)
3243 insn = NEXT_INSN (insn);
3244 if (insn == 0 || LABEL_P (insn))
3251 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3254 prev_label (rtx insn)
3258 insn = PREV_INSN (insn);
3259 if (insn == 0 || LABEL_P (insn))
3266 /* Return the last label to mark the same position as LABEL. Return null
3267 if LABEL itself is null. */
3270 skip_consecutive_labels (rtx label)
3274 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3282 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3283 and REG_CC_USER notes so we can find it. */
3286 link_cc0_insns (rtx insn)
3288 rtx user = next_nonnote_insn (insn);
3290 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3291 user = XVECEXP (PATTERN (user), 0, 0);
3293 add_reg_note (user, REG_CC_SETTER, insn);
3294 add_reg_note (insn, REG_CC_USER, user);
3297 /* Return the next insn that uses CC0 after INSN, which is assumed to
3298 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3299 applied to the result of this function should yield INSN).
3301 Normally, this is simply the next insn. However, if a REG_CC_USER note
3302 is present, it contains the insn that uses CC0.
3304 Return 0 if we can't find the insn. */
3307 next_cc0_user (rtx insn)
3309 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3312 return XEXP (note, 0);
3314 insn = next_nonnote_insn (insn);
3315 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3316 insn = XVECEXP (PATTERN (insn), 0, 0);
3318 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3324 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3325 note, it is the previous insn. */
3328 prev_cc0_setter (rtx insn)
3330 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3333 return XEXP (note, 0);
3335 insn = prev_nonnote_insn (insn);
3336 gcc_assert (sets_cc0_p (PATTERN (insn)));
3343 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3346 find_auto_inc (rtx *xp, void *data)
3349 rtx reg = (rtx) data;
3351 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3354 switch (GET_CODE (x))
3362 if (rtx_equal_p (reg, XEXP (x, 0)))
3373 /* Increment the label uses for all labels present in rtx. */
3376 mark_label_nuses (rtx x)
3382 code = GET_CODE (x);
3383 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3384 LABEL_NUSES (XEXP (x, 0))++;
3386 fmt = GET_RTX_FORMAT (code);
3387 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3390 mark_label_nuses (XEXP (x, i));
3391 else if (fmt[i] == 'E')
3392 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3393 mark_label_nuses (XVECEXP (x, i, j));
3398 /* Try splitting insns that can be split for better scheduling.
3399 PAT is the pattern which might split.
3400 TRIAL is the insn providing PAT.
3401 LAST is nonzero if we should return the last insn of the sequence produced.
3403 If this routine succeeds in splitting, it returns the first or last
3404 replacement insn depending on the value of LAST. Otherwise, it
3405 returns TRIAL. If the insn to be returned can be split, it will be. */
3408 try_split (rtx pat, rtx trial, int last)
3410 rtx before = PREV_INSN (trial);
3411 rtx after = NEXT_INSN (trial);
3412 int has_barrier = 0;
3415 rtx insn_last, insn;
3418 /* We're not good at redistributing frame information. */
3419 if (RTX_FRAME_RELATED_P (trial))
3422 if (any_condjump_p (trial)
3423 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3424 split_branch_probability = INTVAL (XEXP (note, 0));
3425 probability = split_branch_probability;
3427 seq = split_insns (pat, trial);
3429 split_branch_probability = -1;
3431 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3432 We may need to handle this specially. */
3433 if (after && BARRIER_P (after))
3436 after = NEXT_INSN (after);
3442 /* Avoid infinite loop if any insn of the result matches
3443 the original pattern. */
3447 if (INSN_P (insn_last)
3448 && rtx_equal_p (PATTERN (insn_last), pat))
3450 if (!NEXT_INSN (insn_last))
3452 insn_last = NEXT_INSN (insn_last);
3455 /* We will be adding the new sequence to the function. The splitters
3456 may have introduced invalid RTL sharing, so unshare the sequence now. */
3457 unshare_all_rtl_in_chain (seq);
3460 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3464 mark_jump_label (PATTERN (insn), insn, 0);
3466 if (probability != -1
3467 && any_condjump_p (insn)
3468 && !find_reg_note (insn, REG_BR_PROB, 0))
3470 /* We can preserve the REG_BR_PROB notes only if exactly
3471 one jump is created, otherwise the machine description
3472 is responsible for this step using
3473 split_branch_probability variable. */
3474 gcc_assert (njumps == 1);
3475 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3480 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3481 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3484 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3487 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3490 *p = CALL_INSN_FUNCTION_USAGE (trial);
3491 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3495 /* Copy notes, particularly those related to the CFG. */
3496 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3498 switch (REG_NOTE_KIND (note))
3501 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3506 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3509 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3513 case REG_NON_LOCAL_GOTO:
3514 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3517 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3523 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3525 rtx reg = XEXP (note, 0);
3526 if (!FIND_REG_INC_NOTE (insn, reg)
3527 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3528 add_reg_note (insn, REG_INC, reg);
3538 /* If there are LABELS inside the split insns increment the
3539 usage count so we don't delete the label. */
3543 while (insn != NULL_RTX)
3545 /* JUMP_P insns have already been "marked" above. */
3546 if (NONJUMP_INSN_P (insn))
3547 mark_label_nuses (PATTERN (insn));
3549 insn = PREV_INSN (insn);
3553 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3555 delete_insn (trial);
3557 emit_barrier_after (tem);
3559 /* Recursively call try_split for each new insn created; by the
3560 time control returns here that insn will be fully split, so
3561 set LAST and continue from the insn after the one returned.
3562 We can't use next_active_insn here since AFTER may be a note.
3563 Ignore deleted insns, which can be occur if not optimizing. */
3564 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3565 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3566 tem = try_split (PATTERN (tem), tem, 1);
3568 /* Return either the first or the last insn, depending on which was
3571 ? (after ? PREV_INSN (after) : last_insn)
3572 : NEXT_INSN (before);
3575 /* Make and return an INSN rtx, initializing all its slots.
3576 Store PATTERN in the pattern slots. */
3579 make_insn_raw (rtx pattern)
3583 insn = rtx_alloc (INSN);
3585 INSN_UID (insn) = cur_insn_uid++;
3586 PATTERN (insn) = pattern;
3587 INSN_CODE (insn) = -1;
3588 REG_NOTES (insn) = NULL;
3589 INSN_LOCATOR (insn) = curr_insn_locator ();
3590 BLOCK_FOR_INSN (insn) = NULL;
3592 #ifdef ENABLE_RTL_CHECKING
3595 && (returnjump_p (insn)
3596 || (GET_CODE (insn) == SET
3597 && SET_DEST (insn) == pc_rtx)))
3599 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3607 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3610 make_debug_insn_raw (rtx pattern)
3614 insn = rtx_alloc (DEBUG_INSN);
3615 INSN_UID (insn) = cur_debug_insn_uid++;
3616 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3617 INSN_UID (insn) = cur_insn_uid++;
3619 PATTERN (insn) = pattern;
3620 INSN_CODE (insn) = -1;
3621 REG_NOTES (insn) = NULL;
3622 INSN_LOCATOR (insn) = curr_insn_locator ();
3623 BLOCK_FOR_INSN (insn) = NULL;
3628 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3631 make_jump_insn_raw (rtx pattern)
3635 insn = rtx_alloc (JUMP_INSN);
3636 INSN_UID (insn) = cur_insn_uid++;
3638 PATTERN (insn) = pattern;
3639 INSN_CODE (insn) = -1;
3640 REG_NOTES (insn) = NULL;
3641 JUMP_LABEL (insn) = NULL;
3642 INSN_LOCATOR (insn) = curr_insn_locator ();
3643 BLOCK_FOR_INSN (insn) = NULL;
3648 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3651 make_call_insn_raw (rtx pattern)
3655 insn = rtx_alloc (CALL_INSN);
3656 INSN_UID (insn) = cur_insn_uid++;
3658 PATTERN (insn) = pattern;
3659 INSN_CODE (insn) = -1;
3660 REG_NOTES (insn) = NULL;
3661 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3662 INSN_LOCATOR (insn) = curr_insn_locator ();
3663 BLOCK_FOR_INSN (insn) = NULL;
3668 /* Add INSN to the end of the doubly-linked list.
3669 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3674 PREV_INSN (insn) = last_insn;
3675 NEXT_INSN (insn) = 0;
3677 if (NULL != last_insn)
3678 NEXT_INSN (last_insn) = insn;
3680 if (NULL == first_insn)
3686 /* Add INSN into the doubly-linked list after insn AFTER. This and
3687 the next should be the only functions called to insert an insn once
3688 delay slots have been filled since only they know how to update a
3692 add_insn_after (rtx insn, rtx after, basic_block bb)
3694 rtx next = NEXT_INSN (after);
3696 gcc_assert (!optimize || !INSN_DELETED_P (after));
3698 NEXT_INSN (insn) = next;
3699 PREV_INSN (insn) = after;
3703 PREV_INSN (next) = insn;
3704 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3705 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3707 else if (last_insn == after)
3711 struct sequence_stack *stack = seq_stack;
3712 /* Scan all pending sequences too. */
3713 for (; stack; stack = stack->next)
3714 if (after == stack->last)
3723 if (!BARRIER_P (after)
3724 && !BARRIER_P (insn)
3725 && (bb = BLOCK_FOR_INSN (after)))
3727 set_block_for_insn (insn, bb);
3729 df_insn_rescan (insn);
3730 /* Should not happen as first in the BB is always
3731 either NOTE or LABEL. */
3732 if (BB_END (bb) == after
3733 /* Avoid clobbering of structure when creating new BB. */
3734 && !BARRIER_P (insn)
3735 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3739 NEXT_INSN (after) = insn;
3740 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3742 rtx sequence = PATTERN (after);
3743 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3747 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3748 the previous should be the only functions called to insert an insn
3749 once delay slots have been filled since only they know how to
3750 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3754 add_insn_before (rtx insn, rtx before, basic_block bb)
3756 rtx prev = PREV_INSN (before);
3758 gcc_assert (!optimize || !INSN_DELETED_P (before));
3760 PREV_INSN (insn) = prev;
3761 NEXT_INSN (insn) = before;
3765 NEXT_INSN (prev) = insn;
3766 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3768 rtx sequence = PATTERN (prev);
3769 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3772 else if (first_insn == before)
3776 struct sequence_stack *stack = seq_stack;
3777 /* Scan all pending sequences too. */
3778 for (; stack; stack = stack->next)
3779 if (before == stack->first)
3781 stack->first = insn;
3789 && !BARRIER_P (before)
3790 && !BARRIER_P (insn))
3791 bb = BLOCK_FOR_INSN (before);
3795 set_block_for_insn (insn, bb);
3797 df_insn_rescan (insn);
3798 /* Should not happen as first in the BB is always either NOTE or
3800 gcc_assert (BB_HEAD (bb) != insn
3801 /* Avoid clobbering of structure when creating new BB. */
3803 || NOTE_INSN_BASIC_BLOCK_P (insn));
3806 PREV_INSN (before) = insn;
3807 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3808 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3812 /* Replace insn with an deleted instruction note. */
3815 set_insn_deleted (rtx insn)
3817 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3818 PUT_CODE (insn, NOTE);
3819 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3823 /* Remove an insn from its doubly-linked list. This function knows how
3824 to handle sequences. */
3826 remove_insn (rtx insn)
3828 rtx next = NEXT_INSN (insn);
3829 rtx prev = PREV_INSN (insn);
3832 /* Later in the code, the block will be marked dirty. */
3833 df_insn_delete (NULL, INSN_UID (insn));
3837 NEXT_INSN (prev) = next;
3838 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3840 rtx sequence = PATTERN (prev);
3841 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3844 else if (first_insn == insn)
3848 struct sequence_stack *stack = seq_stack;
3849 /* Scan all pending sequences too. */
3850 for (; stack; stack = stack->next)
3851 if (insn == stack->first)
3853 stack->first = next;
3862 PREV_INSN (next) = prev;
3863 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3864 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3866 else if (last_insn == insn)
3870 struct sequence_stack *stack = seq_stack;
3871 /* Scan all pending sequences too. */
3872 for (; stack; stack = stack->next)
3873 if (insn == stack->last)
3881 if (!BARRIER_P (insn)
3882 && (bb = BLOCK_FOR_INSN (insn)))
3885 df_set_bb_dirty (bb);
3886 if (BB_HEAD (bb) == insn)
3888 /* Never ever delete the basic block note without deleting whole
3890 gcc_assert (!NOTE_P (insn));
3891 BB_HEAD (bb) = next;
3893 if (BB_END (bb) == insn)
3898 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3901 add_function_usage_to (rtx call_insn, rtx call_fusage)
3903 gcc_assert (call_insn && CALL_P (call_insn));
3905 /* Put the register usage information on the CALL. If there is already
3906 some usage information, put ours at the end. */
3907 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3911 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3912 link = XEXP (link, 1))
3915 XEXP (link, 1) = call_fusage;
3918 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3921 /* Delete all insns made since FROM.
3922 FROM becomes the new last instruction. */
3925 delete_insns_since (rtx from)
3930 NEXT_INSN (from) = 0;
3934 /* This function is deprecated, please use sequences instead.
3936 Move a consecutive bunch of insns to a different place in the chain.
3937 The insns to be moved are those between FROM and TO.
3938 They are moved to a new position after the insn AFTER.
3939 AFTER must not be FROM or TO or any insn in between.
3941 This function does not know about SEQUENCEs and hence should not be
3942 called after delay-slot filling has been done. */
3945 reorder_insns_nobb (rtx from, rtx to, rtx after)
3947 /* Splice this bunch out of where it is now. */
3948 if (PREV_INSN (from))
3949 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3951 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3952 if (last_insn == to)
3953 last_insn = PREV_INSN (from);
3954 if (first_insn == from)
3955 first_insn = NEXT_INSN (to);
3957 /* Make the new neighbors point to it and it to them. */
3958 if (NEXT_INSN (after))
3959 PREV_INSN (NEXT_INSN (after)) = to;
3961 NEXT_INSN (to) = NEXT_INSN (after);
3962 PREV_INSN (from) = after;
3963 NEXT_INSN (after) = from;
3964 if (after == last_insn)
3968 /* Same as function above, but take care to update BB boundaries. */
3970 reorder_insns (rtx from, rtx to, rtx after)
3972 rtx prev = PREV_INSN (from);
3973 basic_block bb, bb2;
3975 reorder_insns_nobb (from, to, after);
3977 if (!BARRIER_P (after)
3978 && (bb = BLOCK_FOR_INSN (after)))
3981 df_set_bb_dirty (bb);
3983 if (!BARRIER_P (from)
3984 && (bb2 = BLOCK_FOR_INSN (from)))
3986 if (BB_END (bb2) == to)
3987 BB_END (bb2) = prev;
3988 df_set_bb_dirty (bb2);
3991 if (BB_END (bb) == after)
3994 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3996 df_insn_change_bb (x, bb);
4001 /* Emit insn(s) of given code and pattern
4002 at a specified place within the doubly-linked list.
4004 All of the emit_foo global entry points accept an object
4005 X which is either an insn list or a PATTERN of a single
4008 There are thus a few canonical ways to generate code and
4009 emit it at a specific place in the instruction stream. For
4010 example, consider the instruction named SPOT and the fact that
4011 we would like to emit some instructions before SPOT. We might
4015 ... emit the new instructions ...
4016 insns_head = get_insns ();
4019 emit_insn_before (insns_head, SPOT);
4021 It used to be common to generate SEQUENCE rtl instead, but that
4022 is a relic of the past which no longer occurs. The reason is that
4023 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4024 generated would almost certainly die right after it was created. */
4026 /* Make X be output before the instruction BEFORE. */
4029 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4034 gcc_assert (before);
4039 switch (GET_CODE (x))
4051 rtx next = NEXT_INSN (insn);
4052 add_insn_before (insn, before, bb);
4058 #ifdef ENABLE_RTL_CHECKING
4065 last = make_insn_raw (x);
4066 add_insn_before (last, before, bb);
4073 /* Make an instruction with body X and code JUMP_INSN
4074 and output it before the instruction BEFORE. */
4077 emit_jump_insn_before_noloc (rtx x, rtx before)
4079 rtx insn, last = NULL_RTX;
4081 gcc_assert (before);
4083 switch (GET_CODE (x))
4095 rtx next = NEXT_INSN (insn);
4096 add_insn_before (insn, before, NULL);
4102 #ifdef ENABLE_RTL_CHECKING
4109 last = make_jump_insn_raw (x);
4110 add_insn_before (last, before, NULL);
4117 /* Make an instruction with body X and code CALL_INSN
4118 and output it before the instruction BEFORE. */
4121 emit_call_insn_before_noloc (rtx x, rtx before)
4123 rtx last = NULL_RTX, insn;
4125 gcc_assert (before);
4127 switch (GET_CODE (x))
4139 rtx next = NEXT_INSN (insn);
4140 add_insn_before (insn, before, NULL);
4146 #ifdef ENABLE_RTL_CHECKING
4153 last = make_call_insn_raw (x);
4154 add_insn_before (last, before, NULL);
4161 /* Make an instruction with body X and code DEBUG_INSN
4162 and output it before the instruction BEFORE. */
4165 emit_debug_insn_before_noloc (rtx x, rtx before)
4167 rtx last = NULL_RTX, insn;
4169 gcc_assert (before);
4171 switch (GET_CODE (x))
4183 rtx next = NEXT_INSN (insn);
4184 add_insn_before (insn, before, NULL);
4190 #ifdef ENABLE_RTL_CHECKING
4197 last = make_debug_insn_raw (x);
4198 add_insn_before (last, before, NULL);
4205 /* Make an insn of code BARRIER
4206 and output it before the insn BEFORE. */
4209 emit_barrier_before (rtx before)
4211 rtx insn = rtx_alloc (BARRIER);
4213 INSN_UID (insn) = cur_insn_uid++;
4215 add_insn_before (insn, before, NULL);
4219 /* Emit the label LABEL before the insn BEFORE. */
4222 emit_label_before (rtx label, rtx before)
4224 /* This can be called twice for the same label as a result of the
4225 confusion that follows a syntax error! So make it harmless. */
4226 if (INSN_UID (label) == 0)
4228 INSN_UID (label) = cur_insn_uid++;
4229 add_insn_before (label, before, NULL);
4235 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4238 emit_note_before (enum insn_note subtype, rtx before)
4240 rtx note = rtx_alloc (NOTE);
4241 INSN_UID (note) = cur_insn_uid++;
4242 NOTE_KIND (note) = subtype;
4243 BLOCK_FOR_INSN (note) = NULL;
4244 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4246 add_insn_before (note, before, NULL);
4250 /* Helper for emit_insn_after, handles lists of instructions
4254 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4258 if (!bb && !BARRIER_P (after))
4259 bb = BLOCK_FOR_INSN (after);
4263 df_set_bb_dirty (bb);
4264 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4265 if (!BARRIER_P (last))
4267 set_block_for_insn (last, bb);
4268 df_insn_rescan (last);
4270 if (!BARRIER_P (last))
4272 set_block_for_insn (last, bb);
4273 df_insn_rescan (last);
4275 if (BB_END (bb) == after)
4279 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4282 after_after = NEXT_INSN (after);
4284 NEXT_INSN (after) = first;
4285 PREV_INSN (first) = after;
4286 NEXT_INSN (last) = after_after;
4288 PREV_INSN (after_after) = last;
4290 if (after == last_insn)
4296 /* Make X be output after the insn AFTER and set the BB of insn. If
4297 BB is NULL, an attempt is made to infer the BB from AFTER. */
4300 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4309 switch (GET_CODE (x))
4318 last = emit_insn_after_1 (x, after, bb);
4321 #ifdef ENABLE_RTL_CHECKING
4328 last = make_insn_raw (x);
4329 add_insn_after (last, after, bb);
4337 /* Make an insn of code JUMP_INSN with body X
4338 and output it after the insn AFTER. */
4341 emit_jump_insn_after_noloc (rtx x, rtx after)
4347 switch (GET_CODE (x))
4356 last = emit_insn_after_1 (x, after, NULL);
4359 #ifdef ENABLE_RTL_CHECKING
4366 last = make_jump_insn_raw (x);
4367 add_insn_after (last, after, NULL);
4374 /* Make an instruction with body X and code CALL_INSN
4375 and output it after the instruction AFTER. */
4378 emit_call_insn_after_noloc (rtx x, rtx after)
4384 switch (GET_CODE (x))
4393 last = emit_insn_after_1 (x, after, NULL);
4396 #ifdef ENABLE_RTL_CHECKING
4403 last = make_call_insn_raw (x);
4404 add_insn_after (last, after, NULL);
4411 /* Make an instruction with body X and code CALL_INSN
4412 and output it after the instruction AFTER. */
4415 emit_debug_insn_after_noloc (rtx x, rtx after)
4421 switch (GET_CODE (x))
4430 last = emit_insn_after_1 (x, after, NULL);
4433 #ifdef ENABLE_RTL_CHECKING
4440 last = make_debug_insn_raw (x);
4441 add_insn_after (last, after, NULL);
4448 /* Make an insn of code BARRIER
4449 and output it after the insn AFTER. */
4452 emit_barrier_after (rtx after)
4454 rtx insn = rtx_alloc (BARRIER);
4456 INSN_UID (insn) = cur_insn_uid++;
4458 add_insn_after (insn, after, NULL);
4462 /* Emit the label LABEL after the insn AFTER. */
4465 emit_label_after (rtx label, rtx after)
4467 /* This can be called twice for the same label
4468 as a result of the confusion that follows a syntax error!
4469 So make it harmless. */
4470 if (INSN_UID (label) == 0)
4472 INSN_UID (label) = cur_insn_uid++;
4473 add_insn_after (label, after, NULL);
4479 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4482 emit_note_after (enum insn_note subtype, rtx after)
4484 rtx note = rtx_alloc (NOTE);
4485 INSN_UID (note) = cur_insn_uid++;
4486 NOTE_KIND (note) = subtype;
4487 BLOCK_FOR_INSN (note) = NULL;
4488 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4489 add_insn_after (note, after, NULL);
4493 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4495 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4497 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4499 if (pattern == NULL_RTX || !loc)
4502 after = NEXT_INSN (after);
4505 if (active_insn_p (after) && !INSN_LOCATOR (after))
4506 INSN_LOCATOR (after) = loc;
4509 after = NEXT_INSN (after);
4514 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4516 emit_insn_after (rtx pattern, rtx after)
4520 while (DEBUG_INSN_P (prev))
4521 prev = PREV_INSN (prev);
4524 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4526 return emit_insn_after_noloc (pattern, after, NULL);
4529 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4531 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4533 rtx last = emit_jump_insn_after_noloc (pattern, after);
4535 if (pattern == NULL_RTX || !loc)
4538 after = NEXT_INSN (after);
4541 if (active_insn_p (after) && !INSN_LOCATOR (after))
4542 INSN_LOCATOR (after) = loc;
4545 after = NEXT_INSN (after);
4550 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4552 emit_jump_insn_after (rtx pattern, rtx after)
4556 while (DEBUG_INSN_P (prev))
4557 prev = PREV_INSN (prev);
4560 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4562 return emit_jump_insn_after_noloc (pattern, after);
4565 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4567 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4569 rtx last = emit_call_insn_after_noloc (pattern, after);
4571 if (pattern == NULL_RTX || !loc)
4574 after = NEXT_INSN (after);
4577 if (active_insn_p (after) && !INSN_LOCATOR (after))
4578 INSN_LOCATOR (after) = loc;
4581 after = NEXT_INSN (after);
4586 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4588 emit_call_insn_after (rtx pattern, rtx after)
4592 while (DEBUG_INSN_P (prev))
4593 prev = PREV_INSN (prev);
4596 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4598 return emit_call_insn_after_noloc (pattern, after);
4601 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4603 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4605 rtx last = emit_debug_insn_after_noloc (pattern, after);
4607 if (pattern == NULL_RTX || !loc)
4610 after = NEXT_INSN (after);
4613 if (active_insn_p (after) && !INSN_LOCATOR (after))
4614 INSN_LOCATOR (after) = loc;
4617 after = NEXT_INSN (after);
4622 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4624 emit_debug_insn_after (rtx pattern, rtx after)
4627 return emit_debug_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4629 return emit_debug_insn_after_noloc (pattern, after);
4632 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4634 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4636 rtx first = PREV_INSN (before);
4637 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4639 if (pattern == NULL_RTX || !loc)
4643 first = get_insns ();
4645 first = NEXT_INSN (first);
4648 if (active_insn_p (first) && !INSN_LOCATOR (first))
4649 INSN_LOCATOR (first) = loc;
4652 first = NEXT_INSN (first);
4657 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4659 emit_insn_before (rtx pattern, rtx before)
4663 while (DEBUG_INSN_P (next))
4664 next = PREV_INSN (next);
4667 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4669 return emit_insn_before_noloc (pattern, before, NULL);
4672 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4674 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4676 rtx first = PREV_INSN (before);
4677 rtx last = emit_jump_insn_before_noloc (pattern, before);
4679 if (pattern == NULL_RTX)
4682 first = NEXT_INSN (first);
4685 if (active_insn_p (first) && !INSN_LOCATOR (first))
4686 INSN_LOCATOR (first) = loc;
4689 first = NEXT_INSN (first);
4694 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4696 emit_jump_insn_before (rtx pattern, rtx before)
4700 while (DEBUG_INSN_P (next))
4701 next = PREV_INSN (next);
4704 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4706 return emit_jump_insn_before_noloc (pattern, before);
4709 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4711 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4713 rtx first = PREV_INSN (before);
4714 rtx last = emit_call_insn_before_noloc (pattern, before);
4716 if (pattern == NULL_RTX)
4719 first = NEXT_INSN (first);
4722 if (active_insn_p (first) && !INSN_LOCATOR (first))
4723 INSN_LOCATOR (first) = loc;
4726 first = NEXT_INSN (first);
4731 /* like emit_call_insn_before_noloc,
4732 but set insn_locator according to before. */
4734 emit_call_insn_before (rtx pattern, rtx before)
4738 while (DEBUG_INSN_P (next))
4739 next = PREV_INSN (next);
4742 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4744 return emit_call_insn_before_noloc (pattern, before);
4747 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4749 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4751 rtx first = PREV_INSN (before);
4752 rtx last = emit_debug_insn_before_noloc (pattern, before);
4754 if (pattern == NULL_RTX)
4757 first = NEXT_INSN (first);
4760 if (active_insn_p (first) && !INSN_LOCATOR (first))
4761 INSN_LOCATOR (first) = loc;
4764 first = NEXT_INSN (first);
4769 /* like emit_debug_insn_before_noloc,
4770 but set insn_locator according to before. */
4772 emit_debug_insn_before (rtx pattern, rtx before)
4774 if (INSN_P (before))
4775 return emit_debug_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4777 return emit_debug_insn_before_noloc (pattern, before);
4780 /* Take X and emit it at the end of the doubly-linked
4783 Returns the last insn emitted. */
4788 rtx last = last_insn;
4794 switch (GET_CODE (x))
4806 rtx next = NEXT_INSN (insn);
4813 #ifdef ENABLE_RTL_CHECKING
4820 last = make_insn_raw (x);
4828 /* Make an insn of code DEBUG_INSN with pattern X
4829 and add it to the end of the doubly-linked list. */
4832 emit_debug_insn (rtx x)
4834 rtx last = last_insn;
4840 switch (GET_CODE (x))
4852 rtx next = NEXT_INSN (insn);
4859 #ifdef ENABLE_RTL_CHECKING
4866 last = make_debug_insn_raw (x);
4874 /* Make an insn of code JUMP_INSN with pattern X
4875 and add it to the end of the doubly-linked list. */
4878 emit_jump_insn (rtx x)
4880 rtx last = NULL_RTX, insn;
4882 switch (GET_CODE (x))
4894 rtx next = NEXT_INSN (insn);
4901 #ifdef ENABLE_RTL_CHECKING
4908 last = make_jump_insn_raw (x);
4916 /* Make an insn of code CALL_INSN with pattern X
4917 and add it to the end of the doubly-linked list. */
4920 emit_call_insn (rtx x)
4924 switch (GET_CODE (x))
4933 insn = emit_insn (x);
4936 #ifdef ENABLE_RTL_CHECKING
4943 insn = make_call_insn_raw (x);
4951 /* Add the label LABEL to the end of the doubly-linked list. */
4954 emit_label (rtx label)
4956 /* This can be called twice for the same label
4957 as a result of the confusion that follows a syntax error!
4958 So make it harmless. */
4959 if (INSN_UID (label) == 0)
4961 INSN_UID (label) = cur_insn_uid++;
4967 /* Make an insn of code BARRIER
4968 and add it to the end of the doubly-linked list. */
4973 rtx barrier = rtx_alloc (BARRIER);
4974 INSN_UID (barrier) = cur_insn_uid++;
4979 /* Emit a copy of note ORIG. */
4982 emit_note_copy (rtx orig)
4986 note = rtx_alloc (NOTE);
4988 INSN_UID (note) = cur_insn_uid++;
4989 NOTE_DATA (note) = NOTE_DATA (orig);
4990 NOTE_KIND (note) = NOTE_KIND (orig);
4991 BLOCK_FOR_INSN (note) = NULL;
4997 /* Make an insn of code NOTE or type NOTE_NO
4998 and add it to the end of the doubly-linked list. */
5001 emit_note (enum insn_note kind)
5005 note = rtx_alloc (NOTE);
5006 INSN_UID (note) = cur_insn_uid++;
5007 NOTE_KIND (note) = kind;
5008 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
5009 BLOCK_FOR_INSN (note) = NULL;
5014 /* Emit a clobber of lvalue X. */
5017 emit_clobber (rtx x)
5019 /* CONCATs should not appear in the insn stream. */
5020 if (GET_CODE (x) == CONCAT)
5022 emit_clobber (XEXP (x, 0));
5023 return emit_clobber (XEXP (x, 1));
5025 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5028 /* Return a sequence of insns to clobber lvalue X. */
5042 /* Emit a use of rvalue X. */
5047 /* CONCATs should not appear in the insn stream. */
5048 if (GET_CODE (x) == CONCAT)
5050 emit_use (XEXP (x, 0));
5051 return emit_use (XEXP (x, 1));
5053 return emit_insn (gen_rtx_USE (VOIDmode, x));
5056 /* Return a sequence of insns to use rvalue X. */
5070 /* Cause next statement to emit a line note even if the line number
5074 force_next_line_note (void)
5079 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5080 note of this type already exists, remove it first. */
5083 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5085 rtx note = find_reg_note (insn, kind, NULL_RTX);
5091 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5092 has multiple sets (some callers assume single_set
5093 means the insn only has one set, when in fact it
5094 means the insn only has one * useful * set). */
5095 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
5101 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5102 It serves no useful purpose and breaks eliminate_regs. */
5103 if (GET_CODE (datum) == ASM_OPERANDS)
5108 XEXP (note, 0) = datum;
5109 df_notes_rescan (insn);
5117 XEXP (note, 0) = datum;
5123 add_reg_note (insn, kind, datum);
5129 df_notes_rescan (insn);
5135 return REG_NOTES (insn);
5138 /* Return an indication of which type of insn should have X as a body.
5139 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5141 static enum rtx_code
5142 classify_insn (rtx x)
5146 if (GET_CODE (x) == CALL)
5148 if (GET_CODE (x) == RETURN)
5150 if (GET_CODE (x) == SET)
5152 if (SET_DEST (x) == pc_rtx)
5154 else if (GET_CODE (SET_SRC (x)) == CALL)
5159 if (GET_CODE (x) == PARALLEL)
5162 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5163 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5165 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5166 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5168 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5169 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5175 /* Emit the rtl pattern X as an appropriate kind of insn.
5176 If X is a label, it is simply added into the insn chain. */
5181 enum rtx_code code = classify_insn (x);
5186 return emit_label (x);
5188 return emit_insn (x);
5191 rtx insn = emit_jump_insn (x);
5192 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5193 return emit_barrier ();
5197 return emit_call_insn (x);
5199 return emit_debug_insn (x);
5205 /* Space for free sequence stack entries. */
5206 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5208 /* Begin emitting insns to a sequence. If this sequence will contain
5209 something that might cause the compiler to pop arguments to function
5210 calls (because those pops have previously been deferred; see
5211 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5212 before calling this function. That will ensure that the deferred
5213 pops are not accidentally emitted in the middle of this sequence. */
5216 start_sequence (void)
5218 struct sequence_stack *tem;
5220 if (free_sequence_stack != NULL)
5222 tem = free_sequence_stack;
5223 free_sequence_stack = tem->next;
5226 tem = GGC_NEW (struct sequence_stack);
5228 tem->next = seq_stack;
5229 tem->first = first_insn;
5230 tem->last = last_insn;
5238 /* Set up the insn chain starting with FIRST as the current sequence,
5239 saving the previously current one. See the documentation for
5240 start_sequence for more information about how to use this function. */
5243 push_to_sequence (rtx first)
5249 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5255 /* Like push_to_sequence, but take the last insn as an argument to avoid
5256 looping through the list. */
5259 push_to_sequence2 (rtx first, rtx last)
5267 /* Set up the outer-level insn chain
5268 as the current sequence, saving the previously current one. */
5271 push_topmost_sequence (void)
5273 struct sequence_stack *stack, *top = NULL;
5277 for (stack = seq_stack; stack; stack = stack->next)
5280 first_insn = top->first;
5281 last_insn = top->last;
5284 /* After emitting to the outer-level insn chain, update the outer-level
5285 insn chain, and restore the previous saved state. */
5288 pop_topmost_sequence (void)
5290 struct sequence_stack *stack, *top = NULL;
5292 for (stack = seq_stack; stack; stack = stack->next)
5295 top->first = first_insn;
5296 top->last = last_insn;
5301 /* After emitting to a sequence, restore previous saved state.
5303 To get the contents of the sequence just made, you must call
5304 `get_insns' *before* calling here.
5306 If the compiler might have deferred popping arguments while
5307 generating this sequence, and this sequence will not be immediately
5308 inserted into the instruction stream, use do_pending_stack_adjust
5309 before calling get_insns. That will ensure that the deferred
5310 pops are inserted into this sequence, and not into some random
5311 location in the instruction stream. See INHIBIT_DEFER_POP for more
5312 information about deferred popping of arguments. */
5317 struct sequence_stack *tem = seq_stack;
5319 first_insn = tem->first;
5320 last_insn = tem->last;
5321 seq_stack = tem->next;
5323 memset (tem, 0, sizeof (*tem));
5324 tem->next = free_sequence_stack;
5325 free_sequence_stack = tem;
5328 /* Return 1 if currently emitting into a sequence. */
5331 in_sequence_p (void)
5333 return seq_stack != 0;
5336 /* Put the various virtual registers into REGNO_REG_RTX. */
5339 init_virtual_regs (void)
5341 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5342 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5343 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5344 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5345 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5349 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5350 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5351 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5352 static int copy_insn_n_scratches;
5354 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5355 copied an ASM_OPERANDS.
5356 In that case, it is the original input-operand vector. */
5357 static rtvec orig_asm_operands_vector;
5359 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5360 copied an ASM_OPERANDS.
5361 In that case, it is the copied input-operand vector. */
5362 static rtvec copy_asm_operands_vector;
5364 /* Likewise for the constraints vector. */
5365 static rtvec orig_asm_constraints_vector;
5366 static rtvec copy_asm_constraints_vector;
5368 /* Recursively create a new copy of an rtx for copy_insn.
5369 This function differs from copy_rtx in that it handles SCRATCHes and
5370 ASM_OPERANDs properly.
5371 Normally, this function is not used directly; use copy_insn as front end.
5372 However, you could first copy an insn pattern with copy_insn and then use
5373 this function afterwards to properly copy any REG_NOTEs containing
5377 copy_insn_1 (rtx orig)
5382 const char *format_ptr;
5387 code = GET_CODE (orig);
5402 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5407 for (i = 0; i < copy_insn_n_scratches; i++)
5408 if (copy_insn_scratch_in[i] == orig)
5409 return copy_insn_scratch_out[i];
5413 if (shared_const_p (orig))
5417 /* A MEM with a constant address is not sharable. The problem is that
5418 the constant address may need to be reloaded. If the mem is shared,
5419 then reloading one copy of this mem will cause all copies to appear
5420 to have been reloaded. */
5426 /* Copy the various flags, fields, and other information. We assume
5427 that all fields need copying, and then clear the fields that should
5428 not be copied. That is the sensible default behavior, and forces
5429 us to explicitly document why we are *not* copying a flag. */
5430 copy = shallow_copy_rtx (orig);
5432 /* We do not copy the USED flag, which is used as a mark bit during
5433 walks over the RTL. */
5434 RTX_FLAG (copy, used) = 0;
5436 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5439 RTX_FLAG (copy, jump) = 0;
5440 RTX_FLAG (copy, call) = 0;
5441 RTX_FLAG (copy, frame_related) = 0;
5444 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5446 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5447 switch (*format_ptr++)
5450 if (XEXP (orig, i) != NULL)
5451 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5456 if (XVEC (orig, i) == orig_asm_constraints_vector)
5457 XVEC (copy, i) = copy_asm_constraints_vector;
5458 else if (XVEC (orig, i) == orig_asm_operands_vector)
5459 XVEC (copy, i) = copy_asm_operands_vector;
5460 else if (XVEC (orig, i) != NULL)
5462 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5463 for (j = 0; j < XVECLEN (copy, i); j++)
5464 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5475 /* These are left unchanged. */
5482 if (code == SCRATCH)
5484 i = copy_insn_n_scratches++;
5485 gcc_assert (i < MAX_RECOG_OPERANDS);
5486 copy_insn_scratch_in[i] = orig;
5487 copy_insn_scratch_out[i] = copy;
5489 else if (code == ASM_OPERANDS)
5491 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5492 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5493 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5494 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5500 /* Create a new copy of an rtx.
5501 This function differs from copy_rtx in that it handles SCRATCHes and
5502 ASM_OPERANDs properly.
5503 INSN doesn't really have to be a full INSN; it could be just the
5506 copy_insn (rtx insn)
5508 copy_insn_n_scratches = 0;
5509 orig_asm_operands_vector = 0;
5510 orig_asm_constraints_vector = 0;
5511 copy_asm_operands_vector = 0;
5512 copy_asm_constraints_vector = 0;
5513 return copy_insn_1 (insn);
5516 /* Initialize data structures and variables in this file
5517 before generating rtl for each function. */
5524 if (MIN_NONDEBUG_INSN_UID)
5525 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5528 cur_debug_insn_uid = 1;
5529 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5530 last_location = UNKNOWN_LOCATION;
5531 first_label_num = label_num;
5534 /* Init the tables that describe all the pseudo regs. */
5536 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5538 crtl->emit.regno_pointer_align
5539 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5542 = GGC_NEWVEC (rtx, crtl->emit.regno_pointer_align_length);
5544 /* Put copies of all the hard registers into regno_reg_rtx. */
5545 memcpy (regno_reg_rtx,
5546 static_regno_reg_rtx,
5547 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5549 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5550 init_virtual_regs ();
5552 /* Indicate that the virtual registers and stack locations are
5554 REG_POINTER (stack_pointer_rtx) = 1;
5555 REG_POINTER (frame_pointer_rtx) = 1;
5556 REG_POINTER (hard_frame_pointer_rtx) = 1;
5557 REG_POINTER (arg_pointer_rtx) = 1;
5559 REG_POINTER (virtual_incoming_args_rtx) = 1;
5560 REG_POINTER (virtual_stack_vars_rtx) = 1;
5561 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5562 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5563 REG_POINTER (virtual_cfa_rtx) = 1;
5565 #ifdef STACK_BOUNDARY
5566 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5567 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5568 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5569 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5571 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5572 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5573 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5574 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5575 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5578 #ifdef INIT_EXPANDERS
5583 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5586 gen_const_vector (enum machine_mode mode, int constant)
5591 enum machine_mode inner;
5593 units = GET_MODE_NUNITS (mode);
5594 inner = GET_MODE_INNER (mode);
5596 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5598 v = rtvec_alloc (units);
5600 /* We need to call this function after we set the scalar const_tiny_rtx
5602 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5604 for (i = 0; i < units; ++i)
5605 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5607 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5611 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5612 all elements are zero, and the one vector when all elements are one. */
5614 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5616 enum machine_mode inner = GET_MODE_INNER (mode);
5617 int nunits = GET_MODE_NUNITS (mode);
5621 /* Check to see if all of the elements have the same value. */
5622 x = RTVEC_ELT (v, nunits - 1);
5623 for (i = nunits - 2; i >= 0; i--)
5624 if (RTVEC_ELT (v, i) != x)
5627 /* If the values are all the same, check to see if we can use one of the
5628 standard constant vectors. */
5631 if (x == CONST0_RTX (inner))
5632 return CONST0_RTX (mode);
5633 else if (x == CONST1_RTX (inner))
5634 return CONST1_RTX (mode);
5637 return gen_rtx_raw_CONST_VECTOR (mode, v);
5640 /* Initialise global register information required by all functions. */
5643 init_emit_regs (void)
5647 /* Reset register attributes */
5648 htab_empty (reg_attrs_htab);
5650 /* We need reg_raw_mode, so initialize the modes now. */
5651 init_reg_modes_target ();
5653 /* Assign register numbers to the globally defined register rtx. */
5654 pc_rtx = gen_rtx_PC (VOIDmode);
5655 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5656 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5657 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5658 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5659 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5660 virtual_incoming_args_rtx =
5661 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5662 virtual_stack_vars_rtx =
5663 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5664 virtual_stack_dynamic_rtx =
5665 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5666 virtual_outgoing_args_rtx =
5667 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5668 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5670 /* Initialize RTL for commonly used hard registers. These are
5671 copied into regno_reg_rtx as we begin to compile each function. */
5672 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5673 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5675 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5676 return_address_pointer_rtx
5677 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5680 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5681 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5683 pic_offset_table_rtx = NULL_RTX;
5686 /* Create some permanent unique rtl objects shared between all functions.
5687 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5690 init_emit_once (int line_numbers)
5693 enum machine_mode mode;
5694 enum machine_mode double_mode;
5696 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5698 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5699 const_int_htab_eq, NULL);
5701 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5702 const_double_htab_eq, NULL);
5704 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5705 const_fixed_htab_eq, NULL);
5707 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5708 mem_attrs_htab_eq, NULL);
5709 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5710 reg_attrs_htab_eq, NULL);
5712 no_line_numbers = ! line_numbers;
5714 /* Compute the word and byte modes. */
5716 byte_mode = VOIDmode;
5717 word_mode = VOIDmode;
5718 double_mode = VOIDmode;
5720 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5722 mode = GET_MODE_WIDER_MODE (mode))
5724 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5725 && byte_mode == VOIDmode)
5728 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5729 && word_mode == VOIDmode)
5733 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5735 mode = GET_MODE_WIDER_MODE (mode))
5737 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5738 && double_mode == VOIDmode)
5742 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5744 #ifdef INIT_EXPANDERS
5745 /* This is to initialize {init|mark|free}_machine_status before the first
5746 call to push_function_context_to. This is needed by the Chill front
5747 end which calls push_function_context_to before the first call to
5748 init_function_start. */
5752 /* Create the unique rtx's for certain rtx codes and operand values. */
5754 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5755 tries to use these variables. */
5756 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5757 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5758 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5760 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5761 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5762 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5764 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5766 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5767 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5768 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5773 dconsthalf = dconst1;
5774 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5776 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5778 const REAL_VALUE_TYPE *const r =
5779 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5781 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5783 mode = GET_MODE_WIDER_MODE (mode))
5784 const_tiny_rtx[i][(int) mode] =
5785 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5787 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5789 mode = GET_MODE_WIDER_MODE (mode))
5790 const_tiny_rtx[i][(int) mode] =
5791 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5793 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5795 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5797 mode = GET_MODE_WIDER_MODE (mode))
5798 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5800 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5802 mode = GET_MODE_WIDER_MODE (mode))
5803 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5806 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5808 mode = GET_MODE_WIDER_MODE (mode))
5810 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5811 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5814 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5816 mode = GET_MODE_WIDER_MODE (mode))
5818 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5819 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5822 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5824 mode = GET_MODE_WIDER_MODE (mode))
5826 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5827 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5830 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5832 mode = GET_MODE_WIDER_MODE (mode))
5834 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5835 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5838 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5840 mode = GET_MODE_WIDER_MODE (mode))
5842 FCONST0(mode).data.high = 0;
5843 FCONST0(mode).data.low = 0;
5844 FCONST0(mode).mode = mode;
5845 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5846 FCONST0 (mode), mode);
5849 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5851 mode = GET_MODE_WIDER_MODE (mode))
5853 FCONST0(mode).data.high = 0;
5854 FCONST0(mode).data.low = 0;
5855 FCONST0(mode).mode = mode;
5856 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5857 FCONST0 (mode), mode);
5860 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5862 mode = GET_MODE_WIDER_MODE (mode))
5864 FCONST0(mode).data.high = 0;
5865 FCONST0(mode).data.low = 0;
5866 FCONST0(mode).mode = mode;
5867 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5868 FCONST0 (mode), mode);
5870 /* We store the value 1. */
5871 FCONST1(mode).data.high = 0;
5872 FCONST1(mode).data.low = 0;
5873 FCONST1(mode).mode = mode;
5874 lshift_double (1, 0, GET_MODE_FBIT (mode),
5875 2 * HOST_BITS_PER_WIDE_INT,
5876 &FCONST1(mode).data.low,
5877 &FCONST1(mode).data.high,
5878 SIGNED_FIXED_POINT_MODE_P (mode));
5879 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5880 FCONST1 (mode), mode);
5883 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5885 mode = GET_MODE_WIDER_MODE (mode))
5887 FCONST0(mode).data.high = 0;
5888 FCONST0(mode).data.low = 0;
5889 FCONST0(mode).mode = mode;
5890 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5891 FCONST0 (mode), mode);
5893 /* We store the value 1. */
5894 FCONST1(mode).data.high = 0;
5895 FCONST1(mode).data.low = 0;
5896 FCONST1(mode).mode = mode;
5897 lshift_double (1, 0, GET_MODE_FBIT (mode),
5898 2 * HOST_BITS_PER_WIDE_INT,
5899 &FCONST1(mode).data.low,
5900 &FCONST1(mode).data.high,
5901 SIGNED_FIXED_POINT_MODE_P (mode));
5902 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5903 FCONST1 (mode), mode);
5906 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5908 mode = GET_MODE_WIDER_MODE (mode))
5910 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5913 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5915 mode = GET_MODE_WIDER_MODE (mode))
5917 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5920 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5922 mode = GET_MODE_WIDER_MODE (mode))
5924 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5925 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5928 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5930 mode = GET_MODE_WIDER_MODE (mode))
5932 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5933 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5936 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5937 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5938 const_tiny_rtx[0][i] = const0_rtx;
5940 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5941 if (STORE_FLAG_VALUE == 1)
5942 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5945 /* Produce exact duplicate of insn INSN after AFTER.
5946 Care updating of libcall regions if present. */
5949 emit_copy_of_insn_after (rtx insn, rtx after)
5953 switch (GET_CODE (insn))
5956 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5960 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5964 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5968 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5969 if (CALL_INSN_FUNCTION_USAGE (insn))
5970 CALL_INSN_FUNCTION_USAGE (new_rtx)
5971 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5972 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5973 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5974 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5975 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5976 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5983 /* Update LABEL_NUSES. */
5984 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5986 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5988 /* If the old insn is frame related, then so is the new one. This is
5989 primarily needed for IA-64 unwind info which marks epilogue insns,
5990 which may be duplicated by the basic block reordering code. */
5991 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5993 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5994 will make them. REG_LABEL_TARGETs are created there too, but are
5995 supposed to be sticky, so we copy them. */
5996 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5997 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5999 if (GET_CODE (link) == EXPR_LIST)
6000 add_reg_note (new_rtx, REG_NOTE_KIND (link),
6001 copy_insn_1 (XEXP (link, 0)));
6003 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
6006 INSN_CODE (new_rtx) = INSN_CODE (insn);
6010 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6012 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
6014 if (hard_reg_clobbers[mode][regno])
6015 return hard_reg_clobbers[mode][regno];
6017 return (hard_reg_clobbers[mode][regno] =
6018 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6021 #include "gt-emit-rtl.h"