1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
53 #include "fixed-value.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
62 /* Commonly used modes. */
64 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
65 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
66 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
67 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
70 /* This is *not* reset after each function. It gives each CODE_LABEL
71 in the entire compilation a unique label number. */
73 static GTY(()) int label_num = 1;
75 /* Nonzero means do not generate NOTEs for source line numbers. */
77 static int no_line_numbers;
79 /* Commonly used rtx's, so that we only need space for one copy.
80 These are initialized once for the entire compilation.
81 All of these are unique; no other rtx-object will be equal to any
84 rtx global_rtl[GR_MAX];
86 /* Commonly used RTL for hard registers. These objects are not necessarily
87 unique, so we allocate them separately from global_rtl. They are
88 initialized once per compilation unit, then copied into regno_reg_rtx
89 at the beginning of each function. */
90 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
92 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
93 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
94 record a copy of const[012]_rtx. */
96 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
100 REAL_VALUE_TYPE dconst0;
101 REAL_VALUE_TYPE dconst1;
102 REAL_VALUE_TYPE dconst2;
103 REAL_VALUE_TYPE dconst3;
104 REAL_VALUE_TYPE dconst10;
105 REAL_VALUE_TYPE dconstm1;
106 REAL_VALUE_TYPE dconstm2;
107 REAL_VALUE_TYPE dconsthalf;
108 REAL_VALUE_TYPE dconstthird;
109 REAL_VALUE_TYPE dconstsqrt2;
110 REAL_VALUE_TYPE dconste;
112 /* Record fixed-point constant 0 and 1. */
113 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
114 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
116 /* All references to the following fixed hard registers go through
117 these unique rtl objects. On machines where the frame-pointer and
118 arg-pointer are the same register, they use the same unique object.
120 After register allocation, other rtl objects which used to be pseudo-regs
121 may be clobbered to refer to the frame-pointer register.
122 But references that were originally to the frame-pointer can be
123 distinguished from the others because they contain frame_pointer_rtx.
125 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
126 tricky: until register elimination has taken place hard_frame_pointer_rtx
127 should be used if it is being set, and frame_pointer_rtx otherwise. After
128 register elimination hard_frame_pointer_rtx should always be used.
129 On machines where the two registers are same (most) then these are the
132 In an inline procedure, the stack and frame pointer rtxs may not be
133 used for anything else. */
134 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
135 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
136 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
138 /* This is used to implement __builtin_return_address for some machines.
139 See for instance the MIPS port. */
140 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
142 /* We make one copy of (const_int C) where C is in
143 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
144 to save space during the compilation and simplify comparisons of
147 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
149 /* A hash table storing CONST_INTs whose absolute value is greater
150 than MAX_SAVED_CONST_INT. */
152 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
153 htab_t const_int_htab;
155 /* A hash table storing memory attribute structures. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
157 htab_t mem_attrs_htab;
159 /* A hash table storing register attribute structures. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
161 htab_t reg_attrs_htab;
163 /* A hash table storing all CONST_DOUBLEs. */
164 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
165 htab_t const_double_htab;
167 /* A hash table storing all CONST_FIXEDs. */
168 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
169 htab_t const_fixed_htab;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_location (cfun->emit->x_last_location)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_call_insn_raw (rtx);
178 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
179 static void set_used_decls (tree);
180 static void mark_label_nuses (rtx);
181 static hashval_t const_int_htab_hash (const void *);
182 static int const_int_htab_eq (const void *, const void *);
183 static hashval_t const_double_htab_hash (const void *);
184 static int const_double_htab_eq (const void *, const void *);
185 static rtx lookup_const_double (rtx);
186 static hashval_t const_fixed_htab_hash (const void *);
187 static int const_fixed_htab_eq (const void *, const void *);
188 static rtx lookup_const_fixed (rtx);
189 static hashval_t mem_attrs_htab_hash (const void *);
190 static int mem_attrs_htab_eq (const void *, const void *);
191 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
193 static hashval_t reg_attrs_htab_hash (const void *);
194 static int reg_attrs_htab_eq (const void *, const void *);
195 static reg_attrs *get_reg_attrs (tree, int);
196 static tree component_ref_for_mem_expr (tree);
197 static rtx gen_const_vector (enum machine_mode, int);
198 static void copy_rtx_if_shared_1 (rtx *orig);
200 /* Probability of the conditional branch currently proceeded by try_split.
201 Set to -1 otherwise. */
202 int split_branch_probability = -1;
204 /* Returns a hash code for X (which is a really a CONST_INT). */
207 const_int_htab_hash (const void *x)
209 return (hashval_t) INTVAL ((const_rtx) x);
212 /* Returns nonzero if the value represented by X (which is really a
213 CONST_INT) is the same as that given by Y (which is really a
217 const_int_htab_eq (const void *x, const void *y)
219 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
222 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
224 const_double_htab_hash (const void *x)
226 const_rtx const value = (const_rtx) x;
229 if (GET_MODE (value) == VOIDmode)
230 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
233 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
234 /* MODE is used in the comparison, so it should be in the hash. */
235 h ^= GET_MODE (value);
240 /* Returns nonzero if the value represented by X (really a ...)
241 is the same as that represented by Y (really a ...) */
243 const_double_htab_eq (const void *x, const void *y)
245 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
247 if (GET_MODE (a) != GET_MODE (b))
249 if (GET_MODE (a) == VOIDmode)
250 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
251 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
253 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
254 CONST_DOUBLE_REAL_VALUE (b));
257 /* Returns a hash code for X (which is really a CONST_FIXED). */
260 const_fixed_htab_hash (const void *x)
262 const_rtx const value = (const_rtx) x;
265 h = fixed_hash (CONST_FIXED_VALUE (value));
266 /* MODE is used in the comparison, so it should be in the hash. */
267 h ^= GET_MODE (value);
271 /* Returns nonzero if the value represented by X (really a ...)
272 is the same as that represented by Y (really a ...). */
275 const_fixed_htab_eq (const void *x, const void *y)
277 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
279 if (GET_MODE (a) != GET_MODE (b))
281 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
284 /* Returns a hash code for X (which is a really a mem_attrs *). */
287 mem_attrs_htab_hash (const void *x)
289 const mem_attrs *const p = (const mem_attrs *) x;
291 return (p->alias ^ (p->align * 1000)
292 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
293 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
294 ^ (size_t) iterative_hash_expr (p->expr, 0));
297 /* Returns nonzero if the value represented by X (which is really a
298 mem_attrs *) is the same as that given by Y (which is also really a
302 mem_attrs_htab_eq (const void *x, const void *y)
304 const mem_attrs *const p = (const mem_attrs *) x;
305 const mem_attrs *const q = (const mem_attrs *) y;
307 return (p->alias == q->alias && p->offset == q->offset
308 && p->size == q->size && p->align == q->align
309 && (p->expr == q->expr
310 || (p->expr != NULL_TREE && q->expr != NULL_TREE
311 && operand_equal_p (p->expr, q->expr, 0))));
314 /* Allocate a new mem_attrs structure and insert it into the hash table if
315 one identical to it is not already in the table. We are doing this for
319 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
320 unsigned int align, enum machine_mode mode)
325 /* If everything is the default, we can just return zero.
326 This must match what the corresponding MEM_* macros return when the
327 field is not present. */
328 if (alias == 0 && expr == 0 && offset == 0
330 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
331 && (STRICT_ALIGNMENT && mode != BLKmode
332 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
337 attrs.offset = offset;
341 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
344 *slot = ggc_alloc (sizeof (mem_attrs));
345 memcpy (*slot, &attrs, sizeof (mem_attrs));
351 /* Returns a hash code for X (which is a really a reg_attrs *). */
354 reg_attrs_htab_hash (const void *x)
356 const reg_attrs *const p = (const reg_attrs *) x;
358 return ((p->offset * 1000) ^ (long) p->decl);
361 /* Returns nonzero if the value represented by X (which is really a
362 reg_attrs *) is the same as that given by Y (which is also really a
366 reg_attrs_htab_eq (const void *x, const void *y)
368 const reg_attrs *const p = (const reg_attrs *) x;
369 const reg_attrs *const q = (const reg_attrs *) y;
371 return (p->decl == q->decl && p->offset == q->offset);
373 /* Allocate a new reg_attrs structure and insert it into the hash table if
374 one identical to it is not already in the table. We are doing this for
378 get_reg_attrs (tree decl, int offset)
383 /* If everything is the default, we can just return zero. */
384 if (decl == 0 && offset == 0)
388 attrs.offset = offset;
390 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
393 *slot = ggc_alloc (sizeof (reg_attrs));
394 memcpy (*slot, &attrs, sizeof (reg_attrs));
402 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
408 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
409 MEM_VOLATILE_P (x) = true;
415 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
416 don't attempt to share with the various global pieces of rtl (such as
417 frame_pointer_rtx). */
420 gen_raw_REG (enum machine_mode mode, int regno)
422 rtx x = gen_rtx_raw_REG (mode, regno);
423 ORIGINAL_REGNO (x) = regno;
427 /* There are some RTL codes that require special attention; the generation
428 functions do the raw handling. If you add to this list, modify
429 special_rtx in gengenrtl.c as well. */
432 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
436 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
437 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
439 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
440 if (const_true_rtx && arg == STORE_FLAG_VALUE)
441 return const_true_rtx;
444 /* Look up the CONST_INT in the hash table. */
445 slot = htab_find_slot_with_hash (const_int_htab, &arg,
446 (hashval_t) arg, INSERT);
448 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
454 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
456 return GEN_INT (trunc_int_for_mode (c, mode));
459 /* CONST_DOUBLEs might be created from pairs of integers, or from
460 REAL_VALUE_TYPEs. Also, their length is known only at run time,
461 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
463 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
464 hash table. If so, return its counterpart; otherwise add it
465 to the hash table and return it. */
467 lookup_const_double (rtx real)
469 void **slot = htab_find_slot (const_double_htab, real, INSERT);
476 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
477 VALUE in mode MODE. */
479 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
481 rtx real = rtx_alloc (CONST_DOUBLE);
482 PUT_MODE (real, mode);
486 return lookup_const_double (real);
489 /* Determine whether FIXED, a CONST_FIXED, already exists in the
490 hash table. If so, return its counterpart; otherwise add it
491 to the hash table and return it. */
494 lookup_const_fixed (rtx fixed)
496 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
503 /* Return a CONST_FIXED rtx for a fixed-point value specified by
504 VALUE in mode MODE. */
507 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
509 rtx fixed = rtx_alloc (CONST_FIXED);
510 PUT_MODE (fixed, mode);
514 return lookup_const_fixed (fixed);
517 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
518 of ints: I0 is the low-order word and I1 is the high-order word.
519 Do not use this routine for non-integer modes; convert to
520 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
523 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
528 /* There are the following cases (note that there are no modes with
529 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
531 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
533 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
534 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
535 from copies of the sign bit, and sign of i0 and i1 are the same), then
536 we return a CONST_INT for i0.
537 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
538 if (mode != VOIDmode)
540 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
541 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
542 /* We can get a 0 for an error mark. */
543 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
544 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
546 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
547 return gen_int_mode (i0, mode);
549 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
552 /* If this integer fits in one word, return a CONST_INT. */
553 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
556 /* We use VOIDmode for integers. */
557 value = rtx_alloc (CONST_DOUBLE);
558 PUT_MODE (value, VOIDmode);
560 CONST_DOUBLE_LOW (value) = i0;
561 CONST_DOUBLE_HIGH (value) = i1;
563 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
564 XWINT (value, i) = 0;
566 return lookup_const_double (value);
570 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
572 /* In case the MD file explicitly references the frame pointer, have
573 all such references point to the same frame pointer. This is
574 used during frame pointer elimination to distinguish the explicit
575 references to these registers from pseudos that happened to be
578 If we have eliminated the frame pointer or arg pointer, we will
579 be using it as a normal register, for example as a spill
580 register. In such cases, we might be accessing it in a mode that
581 is not Pmode and therefore cannot use the pre-allocated rtx.
583 Also don't do this when we are making new REGs in reload, since
584 we don't want to get confused with the real pointers. */
586 if (mode == Pmode && !reload_in_progress)
588 if (regno == FRAME_POINTER_REGNUM
589 && (!reload_completed || frame_pointer_needed))
590 return frame_pointer_rtx;
591 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
592 if (regno == HARD_FRAME_POINTER_REGNUM
593 && (!reload_completed || frame_pointer_needed))
594 return hard_frame_pointer_rtx;
596 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
597 if (regno == ARG_POINTER_REGNUM)
598 return arg_pointer_rtx;
600 #ifdef RETURN_ADDRESS_POINTER_REGNUM
601 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
602 return return_address_pointer_rtx;
604 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
605 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
606 return pic_offset_table_rtx;
607 if (regno == STACK_POINTER_REGNUM)
608 return stack_pointer_rtx;
612 /* If the per-function register table has been set up, try to re-use
613 an existing entry in that table to avoid useless generation of RTL.
615 This code is disabled for now until we can fix the various backends
616 which depend on having non-shared hard registers in some cases. Long
617 term we want to re-enable this code as it can significantly cut down
618 on the amount of useless RTL that gets generated.
620 We'll also need to fix some code that runs after reload that wants to
621 set ORIGINAL_REGNO. */
626 && regno < FIRST_PSEUDO_REGISTER
627 && reg_raw_mode[regno] == mode)
628 return regno_reg_rtx[regno];
631 return gen_raw_REG (mode, regno);
635 gen_rtx_MEM (enum machine_mode mode, rtx addr)
637 rtx rt = gen_rtx_raw_MEM (mode, addr);
639 /* This field is not cleared by the mere allocation of the rtx, so
646 /* Generate a memory referring to non-trapping constant memory. */
649 gen_const_mem (enum machine_mode mode, rtx addr)
651 rtx mem = gen_rtx_MEM (mode, addr);
652 MEM_READONLY_P (mem) = 1;
653 MEM_NOTRAP_P (mem) = 1;
657 /* Generate a MEM referring to fixed portions of the frame, e.g., register
661 gen_frame_mem (enum machine_mode mode, rtx addr)
663 rtx mem = gen_rtx_MEM (mode, addr);
664 MEM_NOTRAP_P (mem) = 1;
665 set_mem_alias_set (mem, get_frame_alias_set ());
669 /* Generate a MEM referring to a temporary use of the stack, not part
670 of the fixed stack frame. For example, something which is pushed
671 by a target splitter. */
673 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
675 rtx mem = gen_rtx_MEM (mode, addr);
676 MEM_NOTRAP_P (mem) = 1;
677 if (!current_function_calls_alloca)
678 set_mem_alias_set (mem, get_frame_alias_set ());
682 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
683 this construct would be valid, and false otherwise. */
686 validate_subreg (enum machine_mode omode, enum machine_mode imode,
687 const_rtx reg, unsigned int offset)
689 unsigned int isize = GET_MODE_SIZE (imode);
690 unsigned int osize = GET_MODE_SIZE (omode);
692 /* All subregs must be aligned. */
693 if (offset % osize != 0)
696 /* The subreg offset cannot be outside the inner object. */
700 /* ??? This should not be here. Temporarily continue to allow word_mode
701 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
702 Generally, backends are doing something sketchy but it'll take time to
704 if (omode == word_mode)
706 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
707 is the culprit here, and not the backends. */
708 else if (osize >= UNITS_PER_WORD && isize >= osize)
710 /* Allow component subregs of complex and vector. Though given the below
711 extraction rules, it's not always clear what that means. */
712 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
713 && GET_MODE_INNER (imode) == omode)
715 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
716 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
717 represent this. It's questionable if this ought to be represented at
718 all -- why can't this all be hidden in post-reload splitters that make
719 arbitrarily mode changes to the registers themselves. */
720 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
722 /* Subregs involving floating point modes are not allowed to
723 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
724 (subreg:SI (reg:DF) 0) isn't. */
725 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
731 /* Paradoxical subregs must have offset zero. */
735 /* This is a normal subreg. Verify that the offset is representable. */
737 /* For hard registers, we already have most of these rules collected in
738 subreg_offset_representable_p. */
739 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
741 unsigned int regno = REGNO (reg);
743 #ifdef CANNOT_CHANGE_MODE_CLASS
744 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
745 && GET_MODE_INNER (imode) == omode)
747 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
751 return subreg_offset_representable_p (regno, imode, offset, omode);
754 /* For pseudo registers, we want most of the same checks. Namely:
755 If the register no larger than a word, the subreg must be lowpart.
756 If the register is larger than a word, the subreg must be the lowpart
757 of a subword. A subreg does *not* perform arbitrary bit extraction.
758 Given that we've already checked mode/offset alignment, we only have
759 to check subword subregs here. */
760 if (osize < UNITS_PER_WORD)
762 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
763 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
764 if (offset % UNITS_PER_WORD != low_off)
771 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
773 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
774 return gen_rtx_raw_SUBREG (mode, reg, offset);
777 /* Generate a SUBREG representing the least-significant part of REG if MODE
778 is smaller than mode of REG, otherwise paradoxical SUBREG. */
781 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
783 enum machine_mode inmode;
785 inmode = GET_MODE (reg);
786 if (inmode == VOIDmode)
788 return gen_rtx_SUBREG (mode, reg,
789 subreg_lowpart_offset (mode, inmode));
792 /* gen_rtvec (n, [rt1, ..., rtn])
794 ** This routine creates an rtvec and stores within it the
795 ** pointers to rtx's which are its arguments.
800 gen_rtvec (int n, ...)
809 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
811 vector = alloca (n * sizeof (rtx));
813 for (i = 0; i < n; i++)
814 vector[i] = va_arg (p, rtx);
816 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
820 return gen_rtvec_v (save_n, vector);
824 gen_rtvec_v (int n, rtx *argp)
830 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
832 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
834 for (i = 0; i < n; i++)
835 rt_val->elem[i] = *argp++;
840 /* Return the number of bytes between the start of an OUTER_MODE
841 in-memory value and the start of an INNER_MODE in-memory value,
842 given that the former is a lowpart of the latter. It may be a
843 paradoxical lowpart, in which case the offset will be negative
844 on big-endian targets. */
847 byte_lowpart_offset (enum machine_mode outer_mode,
848 enum machine_mode inner_mode)
850 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
851 return subreg_lowpart_offset (outer_mode, inner_mode);
853 return -subreg_lowpart_offset (inner_mode, outer_mode);
856 /* Generate a REG rtx for a new pseudo register of mode MODE.
857 This pseudo is assigned the next sequential register number. */
860 gen_reg_rtx (enum machine_mode mode)
862 struct function *f = cfun;
865 gcc_assert (can_create_pseudo_p ());
867 if (generating_concat_p
868 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
869 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
871 /* For complex modes, don't make a single pseudo.
872 Instead, make a CONCAT of two pseudos.
873 This allows noncontiguous allocation of the real and imaginary parts,
874 which makes much better code. Besides, allocating DCmode
875 pseudos overstrains reload on some machines like the 386. */
876 rtx realpart, imagpart;
877 enum machine_mode partmode = GET_MODE_INNER (mode);
879 realpart = gen_reg_rtx (partmode);
880 imagpart = gen_reg_rtx (partmode);
881 return gen_rtx_CONCAT (mode, realpart, imagpart);
884 /* Make sure regno_pointer_align, and regno_reg_rtx are large
885 enough to have an element for this pseudo reg number. */
887 if (reg_rtx_no == f->emit->regno_pointer_align_length)
889 int old_size = f->emit->regno_pointer_align_length;
893 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
894 memset (new + old_size, 0, old_size);
895 f->emit->regno_pointer_align = (unsigned char *) new;
897 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
898 old_size * 2 * sizeof (rtx));
899 memset (new1 + old_size, 0, old_size * sizeof (rtx));
900 regno_reg_rtx = new1;
902 f->emit->regno_pointer_align_length = old_size * 2;
905 val = gen_raw_REG (mode, reg_rtx_no);
906 regno_reg_rtx[reg_rtx_no++] = val;
910 /* Update NEW with the same attributes as REG, but with OFFSET added
911 to the REG_OFFSET. */
914 update_reg_offset (rtx new, rtx reg, int offset)
916 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
917 REG_OFFSET (reg) + offset);
920 /* Generate a register with same attributes as REG, but with OFFSET
921 added to the REG_OFFSET. */
924 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
927 rtx new = gen_rtx_REG (mode, regno);
929 update_reg_offset (new, reg, offset);
933 /* Generate a new pseudo-register with the same attributes as REG, but
934 with OFFSET added to the REG_OFFSET. */
937 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
939 rtx new = gen_reg_rtx (mode);
941 update_reg_offset (new, reg, offset);
945 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
946 new register is a (possibly paradoxical) lowpart of the old one. */
949 adjust_reg_mode (rtx reg, enum machine_mode mode)
951 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
952 PUT_MODE (reg, mode);
955 /* Copy REG's attributes from X, if X has any attributes. If REG and X
956 have different modes, REG is a (possibly paradoxical) lowpart of X. */
959 set_reg_attrs_from_value (rtx reg, rtx x)
963 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
964 if (MEM_P (x) && MEM_OFFSET (x) && GET_CODE (MEM_OFFSET (x)) == CONST_INT)
966 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
967 if (REG_P (x) && REG_ATTRS (x))
968 update_reg_offset (reg, x, offset);
971 /* Set the register attributes for registers contained in PARM_RTX.
972 Use needed values from memory attributes of MEM. */
975 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
977 if (REG_P (parm_rtx))
978 set_reg_attrs_from_value (parm_rtx, mem);
979 else if (GET_CODE (parm_rtx) == PARALLEL)
981 /* Check for a NULL entry in the first slot, used to indicate that the
982 parameter goes both on the stack and in registers. */
983 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
984 for (; i < XVECLEN (parm_rtx, 0); i++)
986 rtx x = XVECEXP (parm_rtx, 0, i);
987 if (REG_P (XEXP (x, 0)))
988 REG_ATTRS (XEXP (x, 0))
989 = get_reg_attrs (MEM_EXPR (mem),
990 INTVAL (XEXP (x, 1)));
995 /* Set the REG_ATTRS for registers in value X, given that X represents
999 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1001 if (GET_CODE (x) == SUBREG)
1003 gcc_assert (subreg_lowpart_p (x));
1008 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1010 if (GET_CODE (x) == CONCAT)
1012 if (REG_P (XEXP (x, 0)))
1013 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1014 if (REG_P (XEXP (x, 1)))
1015 REG_ATTRS (XEXP (x, 1))
1016 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1018 if (GET_CODE (x) == PARALLEL)
1022 /* Check for a NULL entry, used to indicate that the parameter goes
1023 both on the stack and in registers. */
1024 if (XEXP (XVECEXP (x, 0, 0), 0))
1029 for (i = start; i < XVECLEN (x, 0); i++)
1031 rtx y = XVECEXP (x, 0, i);
1032 if (REG_P (XEXP (y, 0)))
1033 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1038 /* Assign the RTX X to declaration T. */
1041 set_decl_rtl (tree t, rtx x)
1043 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1045 set_reg_attrs_for_decl_rtl (t, x);
1048 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1049 if the ABI requires the parameter to be passed by reference. */
1052 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1054 DECL_INCOMING_RTL (t) = x;
1055 if (x && !by_reference_p)
1056 set_reg_attrs_for_decl_rtl (t, x);
1059 /* Identify REG (which may be a CONCAT) as a user register. */
1062 mark_user_reg (rtx reg)
1064 if (GET_CODE (reg) == CONCAT)
1066 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1067 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1071 gcc_assert (REG_P (reg));
1072 REG_USERVAR_P (reg) = 1;
1076 /* Identify REG as a probable pointer register and show its alignment
1077 as ALIGN, if nonzero. */
1080 mark_reg_pointer (rtx reg, int align)
1082 if (! REG_POINTER (reg))
1084 REG_POINTER (reg) = 1;
1087 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1089 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1090 /* We can no-longer be sure just how aligned this pointer is. */
1091 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1094 /* Return 1 plus largest pseudo reg number used in the current function. */
1102 /* Return 1 + the largest label number used so far in the current function. */
1105 max_label_num (void)
1110 /* Return first label number used in this function (if any were used). */
1113 get_first_label_num (void)
1115 return first_label_num;
1118 /* If the rtx for label was created during the expansion of a nested
1119 function, then first_label_num won't include this label number.
1120 Fix this now so that array indicies work later. */
1123 maybe_set_first_label_num (rtx x)
1125 if (CODE_LABEL_NUMBER (x) < first_label_num)
1126 first_label_num = CODE_LABEL_NUMBER (x);
1129 /* Return a value representing some low-order bits of X, where the number
1130 of low-order bits is given by MODE. Note that no conversion is done
1131 between floating-point and fixed-point values, rather, the bit
1132 representation is returned.
1134 This function handles the cases in common between gen_lowpart, below,
1135 and two variants in cse.c and combine.c. These are the cases that can
1136 be safely handled at all points in the compilation.
1138 If this is not a case we can handle, return 0. */
1141 gen_lowpart_common (enum machine_mode mode, rtx x)
1143 int msize = GET_MODE_SIZE (mode);
1146 enum machine_mode innermode;
1148 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1149 so we have to make one up. Yuk. */
1150 innermode = GET_MODE (x);
1151 if (GET_CODE (x) == CONST_INT
1152 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1153 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1154 else if (innermode == VOIDmode)
1155 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1157 xsize = GET_MODE_SIZE (innermode);
1159 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1161 if (innermode == mode)
1164 /* MODE must occupy no more words than the mode of X. */
1165 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1166 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1169 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1170 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1173 offset = subreg_lowpart_offset (mode, innermode);
1175 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1176 && (GET_MODE_CLASS (mode) == MODE_INT
1177 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1179 /* If we are getting the low-order part of something that has been
1180 sign- or zero-extended, we can either just use the object being
1181 extended or make a narrower extension. If we want an even smaller
1182 piece than the size of the object being extended, call ourselves
1185 This case is used mostly by combine and cse. */
1187 if (GET_MODE (XEXP (x, 0)) == mode)
1189 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1190 return gen_lowpart_common (mode, XEXP (x, 0));
1191 else if (msize < xsize)
1192 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1194 else if (GET_CODE (x) == SUBREG || REG_P (x)
1195 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1196 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1197 return simplify_gen_subreg (mode, x, innermode, offset);
1199 /* Otherwise, we can't do this. */
1204 gen_highpart (enum machine_mode mode, rtx x)
1206 unsigned int msize = GET_MODE_SIZE (mode);
1209 /* This case loses if X is a subreg. To catch bugs early,
1210 complain if an invalid MODE is used even in other cases. */
1211 gcc_assert (msize <= UNITS_PER_WORD
1212 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1214 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1215 subreg_highpart_offset (mode, GET_MODE (x)));
1216 gcc_assert (result);
1218 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1219 the target if we have a MEM. gen_highpart must return a valid operand,
1220 emitting code if necessary to do so. */
1223 result = validize_mem (result);
1224 gcc_assert (result);
1230 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1231 be VOIDmode constant. */
1233 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1235 if (GET_MODE (exp) != VOIDmode)
1237 gcc_assert (GET_MODE (exp) == innermode);
1238 return gen_highpart (outermode, exp);
1240 return simplify_gen_subreg (outermode, exp, innermode,
1241 subreg_highpart_offset (outermode, innermode));
1244 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1247 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1249 unsigned int offset = 0;
1250 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1254 if (WORDS_BIG_ENDIAN)
1255 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1256 if (BYTES_BIG_ENDIAN)
1257 offset += difference % UNITS_PER_WORD;
1263 /* Return offset in bytes to get OUTERMODE high part
1264 of the value in mode INNERMODE stored in memory in target format. */
1266 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1268 unsigned int offset = 0;
1269 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1271 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1275 if (! WORDS_BIG_ENDIAN)
1276 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1277 if (! BYTES_BIG_ENDIAN)
1278 offset += difference % UNITS_PER_WORD;
1284 /* Return 1 iff X, assumed to be a SUBREG,
1285 refers to the least significant part of its containing reg.
1286 If X is not a SUBREG, always return 1 (it is its own low part!). */
1289 subreg_lowpart_p (const_rtx x)
1291 if (GET_CODE (x) != SUBREG)
1293 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1296 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1297 == SUBREG_BYTE (x));
1300 /* Return subword OFFSET of operand OP.
1301 The word number, OFFSET, is interpreted as the word number starting
1302 at the low-order address. OFFSET 0 is the low-order word if not
1303 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1305 If we cannot extract the required word, we return zero. Otherwise,
1306 an rtx corresponding to the requested word will be returned.
1308 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1309 reload has completed, a valid address will always be returned. After
1310 reload, if a valid address cannot be returned, we return zero.
1312 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1313 it is the responsibility of the caller.
1315 MODE is the mode of OP in case it is a CONST_INT.
1317 ??? This is still rather broken for some cases. The problem for the
1318 moment is that all callers of this thing provide no 'goal mode' to
1319 tell us to work with. This exists because all callers were written
1320 in a word based SUBREG world.
1321 Now use of this function can be deprecated by simplify_subreg in most
1326 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1328 if (mode == VOIDmode)
1329 mode = GET_MODE (op);
1331 gcc_assert (mode != VOIDmode);
1333 /* If OP is narrower than a word, fail. */
1335 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1338 /* If we want a word outside OP, return zero. */
1340 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1343 /* Form a new MEM at the requested address. */
1346 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1348 if (! validate_address)
1351 else if (reload_completed)
1353 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1357 return replace_equiv_address (new, XEXP (new, 0));
1360 /* Rest can be handled by simplify_subreg. */
1361 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1364 /* Similar to `operand_subword', but never return 0. If we can't
1365 extract the required subword, put OP into a register and try again.
1366 The second attempt must succeed. We always validate the address in
1369 MODE is the mode of OP, in case it is CONST_INT. */
1372 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1374 rtx result = operand_subword (op, offset, 1, mode);
1379 if (mode != BLKmode && mode != VOIDmode)
1381 /* If this is a register which can not be accessed by words, copy it
1382 to a pseudo register. */
1384 op = copy_to_reg (op);
1386 op = force_reg (mode, op);
1389 result = operand_subword (op, offset, 1, mode);
1390 gcc_assert (result);
1395 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1396 or (2) a component ref of something variable. Represent the later with
1397 a NULL expression. */
1400 component_ref_for_mem_expr (tree ref)
1402 tree inner = TREE_OPERAND (ref, 0);
1404 if (TREE_CODE (inner) == COMPONENT_REF)
1405 inner = component_ref_for_mem_expr (inner);
1408 /* Now remove any conversions: they don't change what the underlying
1409 object is. Likewise for SAVE_EXPR. */
1410 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1411 || TREE_CODE (inner) == NON_LVALUE_EXPR
1412 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1413 || TREE_CODE (inner) == SAVE_EXPR)
1414 inner = TREE_OPERAND (inner, 0);
1416 if (! DECL_P (inner))
1420 if (inner == TREE_OPERAND (ref, 0))
1423 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1424 TREE_OPERAND (ref, 1), NULL_TREE);
1427 /* Returns 1 if both MEM_EXPR can be considered equal
1431 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1436 if (! expr1 || ! expr2)
1439 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1442 if (TREE_CODE (expr1) == COMPONENT_REF)
1444 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1445 TREE_OPERAND (expr2, 0))
1446 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1447 TREE_OPERAND (expr2, 1));
1449 if (INDIRECT_REF_P (expr1))
1450 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1451 TREE_OPERAND (expr2, 0));
1453 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1454 have been resolved here. */
1455 gcc_assert (DECL_P (expr1));
1457 /* Decls with different pointers can't be equal. */
1461 /* Given REF, a MEM, and T, either the type of X or the expression
1462 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1463 if we are making a new object of this type. BITPOS is nonzero if
1464 there is an offset outstanding on T that will be applied later. */
1467 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1468 HOST_WIDE_INT bitpos)
1470 alias_set_type alias = MEM_ALIAS_SET (ref);
1471 tree expr = MEM_EXPR (ref);
1472 rtx offset = MEM_OFFSET (ref);
1473 rtx size = MEM_SIZE (ref);
1474 unsigned int align = MEM_ALIGN (ref);
1475 HOST_WIDE_INT apply_bitpos = 0;
1478 /* It can happen that type_for_mode was given a mode for which there
1479 is no language-level type. In which case it returns NULL, which
1484 type = TYPE_P (t) ? t : TREE_TYPE (t);
1485 if (type == error_mark_node)
1488 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1489 wrong answer, as it assumes that DECL_RTL already has the right alias
1490 info. Callers should not set DECL_RTL until after the call to
1491 set_mem_attributes. */
1492 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1494 /* Get the alias set from the expression or type (perhaps using a
1495 front-end routine) and use it. */
1496 alias = get_alias_set (t);
1498 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1499 MEM_IN_STRUCT_P (ref)
1500 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1501 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1503 /* If we are making an object of this type, or if this is a DECL, we know
1504 that it is a scalar if the type is not an aggregate. */
1505 if ((objectp || DECL_P (t))
1506 && ! AGGREGATE_TYPE_P (type)
1507 && TREE_CODE (type) != COMPLEX_TYPE)
1508 MEM_SCALAR_P (ref) = 1;
1510 /* We can set the alignment from the type if we are making an object,
1511 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1512 if (objectp || TREE_CODE (t) == INDIRECT_REF
1513 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1514 || TYPE_ALIGN_OK (type))
1515 align = MAX (align, TYPE_ALIGN (type));
1517 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1519 if (integer_zerop (TREE_OPERAND (t, 1)))
1520 /* We don't know anything about the alignment. */
1521 align = BITS_PER_UNIT;
1523 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1526 /* If the size is known, we can set that. */
1527 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1528 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1530 /* If T is not a type, we may be able to deduce some more information about
1536 if (TREE_THIS_VOLATILE (t))
1537 MEM_VOLATILE_P (ref) = 1;
1539 /* Now remove any conversions: they don't change what the underlying
1540 object is. Likewise for SAVE_EXPR. */
1541 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1542 || TREE_CODE (t) == NON_LVALUE_EXPR
1543 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1544 || TREE_CODE (t) == SAVE_EXPR)
1545 t = TREE_OPERAND (t, 0);
1547 /* We may look through structure-like accesses for the purposes of
1548 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1550 while (TREE_CODE (base) == COMPONENT_REF
1551 || TREE_CODE (base) == REALPART_EXPR
1552 || TREE_CODE (base) == IMAGPART_EXPR
1553 || TREE_CODE (base) == BIT_FIELD_REF)
1554 base = TREE_OPERAND (base, 0);
1558 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1559 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1561 MEM_NOTRAP_P (ref) = 1;
1564 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1566 base = get_base_address (base);
1567 if (base && DECL_P (base)
1568 && TREE_READONLY (base)
1569 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1571 tree base_type = TREE_TYPE (base);
1572 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1573 || DECL_ARTIFICIAL (base));
1574 MEM_READONLY_P (ref) = 1;
1577 /* If this expression uses it's parent's alias set, mark it such
1578 that we won't change it. */
1579 if (component_uses_parent_alias_set (t))
1580 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1582 /* If this is a decl, set the attributes of the MEM from it. */
1586 offset = const0_rtx;
1587 apply_bitpos = bitpos;
1588 size = (DECL_SIZE_UNIT (t)
1589 && host_integerp (DECL_SIZE_UNIT (t), 1)
1590 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1591 align = DECL_ALIGN (t);
1594 /* If this is a constant, we know the alignment. */
1595 else if (CONSTANT_CLASS_P (t))
1597 align = TYPE_ALIGN (type);
1598 #ifdef CONSTANT_ALIGNMENT
1599 align = CONSTANT_ALIGNMENT (t, align);
1603 /* If this is a field reference and not a bit-field, record it. */
1604 /* ??? There is some information that can be gleened from bit-fields,
1605 such as the word offset in the structure that might be modified.
1606 But skip it for now. */
1607 else if (TREE_CODE (t) == COMPONENT_REF
1608 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1610 expr = component_ref_for_mem_expr (t);
1611 offset = const0_rtx;
1612 apply_bitpos = bitpos;
1613 /* ??? Any reason the field size would be different than
1614 the size we got from the type? */
1617 /* If this is an array reference, look for an outer field reference. */
1618 else if (TREE_CODE (t) == ARRAY_REF)
1620 tree off_tree = size_zero_node;
1621 /* We can't modify t, because we use it at the end of the
1627 tree index = TREE_OPERAND (t2, 1);
1628 tree low_bound = array_ref_low_bound (t2);
1629 tree unit_size = array_ref_element_size (t2);
1631 /* We assume all arrays have sizes that are a multiple of a byte.
1632 First subtract the lower bound, if any, in the type of the
1633 index, then convert to sizetype and multiply by the size of
1634 the array element. */
1635 if (! integer_zerop (low_bound))
1636 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1639 off_tree = size_binop (PLUS_EXPR,
1640 size_binop (MULT_EXPR,
1641 fold_convert (sizetype,
1645 t2 = TREE_OPERAND (t2, 0);
1647 while (TREE_CODE (t2) == ARRAY_REF);
1653 if (host_integerp (off_tree, 1))
1655 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1656 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1657 align = DECL_ALIGN (t2);
1658 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1660 offset = GEN_INT (ioff);
1661 apply_bitpos = bitpos;
1664 else if (TREE_CODE (t2) == COMPONENT_REF)
1666 expr = component_ref_for_mem_expr (t2);
1667 if (host_integerp (off_tree, 1))
1669 offset = GEN_INT (tree_low_cst (off_tree, 1));
1670 apply_bitpos = bitpos;
1672 /* ??? Any reason the field size would be different than
1673 the size we got from the type? */
1675 else if (flag_argument_noalias > 1
1676 && (INDIRECT_REF_P (t2))
1677 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1684 /* If this is a Fortran indirect argument reference, record the
1686 else if (flag_argument_noalias > 1
1687 && (INDIRECT_REF_P (t))
1688 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1695 /* If we modified OFFSET based on T, then subtract the outstanding
1696 bit position offset. Similarly, increase the size of the accessed
1697 object to contain the negative offset. */
1700 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1702 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1705 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1707 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1708 we're overlapping. */
1713 /* Now set the attributes we computed above. */
1715 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1717 /* If this is already known to be a scalar or aggregate, we are done. */
1718 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1721 /* If it is a reference into an aggregate, this is part of an aggregate.
1722 Otherwise we don't know. */
1723 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1724 || TREE_CODE (t) == ARRAY_RANGE_REF
1725 || TREE_CODE (t) == BIT_FIELD_REF)
1726 MEM_IN_STRUCT_P (ref) = 1;
1730 set_mem_attributes (rtx ref, tree t, int objectp)
1732 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1735 /* Set MEM to the decl that REG refers to. */
1738 set_mem_attrs_from_reg (rtx mem, rtx reg)
1741 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1742 GEN_INT (REG_OFFSET (reg)),
1743 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1746 /* Set the alias set of MEM to SET. */
1749 set_mem_alias_set (rtx mem, alias_set_type set)
1751 #ifdef ENABLE_CHECKING
1752 /* If the new and old alias sets don't conflict, something is wrong. */
1753 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1756 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1757 MEM_SIZE (mem), MEM_ALIGN (mem),
1761 /* Set the alignment of MEM to ALIGN bits. */
1764 set_mem_align (rtx mem, unsigned int align)
1766 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1767 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1771 /* Set the expr for MEM to EXPR. */
1774 set_mem_expr (rtx mem, tree expr)
1777 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1778 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1781 /* Set the offset of MEM to OFFSET. */
1784 set_mem_offset (rtx mem, rtx offset)
1786 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1787 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1791 /* Set the size of MEM to SIZE. */
1794 set_mem_size (rtx mem, rtx size)
1796 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1797 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1801 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1802 and its address changed to ADDR. (VOIDmode means don't change the mode.
1803 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1804 returned memory location is required to be valid. The memory
1805 attributes are not changed. */
1808 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1812 gcc_assert (MEM_P (memref));
1813 if (mode == VOIDmode)
1814 mode = GET_MODE (memref);
1816 addr = XEXP (memref, 0);
1817 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1818 && (!validate || memory_address_p (mode, addr)))
1823 if (reload_in_progress || reload_completed)
1824 gcc_assert (memory_address_p (mode, addr));
1826 addr = memory_address (mode, addr);
1829 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1832 new = gen_rtx_MEM (mode, addr);
1833 MEM_COPY_ATTRIBUTES (new, memref);
1837 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1838 way we are changing MEMREF, so we only preserve the alias set. */
1841 change_address (rtx memref, enum machine_mode mode, rtx addr)
1843 rtx new = change_address_1 (memref, mode, addr, 1), size;
1844 enum machine_mode mmode = GET_MODE (new);
1847 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1848 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1850 /* If there are no changes, just return the original memory reference. */
1853 if (MEM_ATTRS (memref) == 0
1854 || (MEM_EXPR (memref) == NULL
1855 && MEM_OFFSET (memref) == NULL
1856 && MEM_SIZE (memref) == size
1857 && MEM_ALIGN (memref) == align))
1860 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1861 MEM_COPY_ATTRIBUTES (new, memref);
1865 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1870 /* Return a memory reference like MEMREF, but with its mode changed
1871 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1872 nonzero, the memory address is forced to be valid.
1873 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1874 and caller is responsible for adjusting MEMREF base register. */
1877 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1878 int validate, int adjust)
1880 rtx addr = XEXP (memref, 0);
1882 rtx memoffset = MEM_OFFSET (memref);
1884 unsigned int memalign = MEM_ALIGN (memref);
1886 /* If there are no changes, just return the original memory reference. */
1887 if (mode == GET_MODE (memref) && !offset
1888 && (!validate || memory_address_p (mode, addr)))
1891 /* ??? Prefer to create garbage instead of creating shared rtl.
1892 This may happen even if offset is nonzero -- consider
1893 (plus (plus reg reg) const_int) -- so do this always. */
1894 addr = copy_rtx (addr);
1898 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1899 object, we can merge it into the LO_SUM. */
1900 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1902 && (unsigned HOST_WIDE_INT) offset
1903 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1904 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1905 plus_constant (XEXP (addr, 1), offset));
1907 addr = plus_constant (addr, offset);
1910 new = change_address_1 (memref, mode, addr, validate);
1912 /* Compute the new values of the memory attributes due to this adjustment.
1913 We add the offsets and update the alignment. */
1915 memoffset = GEN_INT (offset + INTVAL (memoffset));
1917 /* Compute the new alignment by taking the MIN of the alignment and the
1918 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1923 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1925 /* We can compute the size in a number of ways. */
1926 if (GET_MODE (new) != BLKmode)
1927 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1928 else if (MEM_SIZE (memref))
1929 size = plus_constant (MEM_SIZE (memref), -offset);
1931 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1932 memoffset, size, memalign, GET_MODE (new));
1934 /* At some point, we should validate that this offset is within the object,
1935 if all the appropriate values are known. */
1939 /* Return a memory reference like MEMREF, but with its mode changed
1940 to MODE and its address changed to ADDR, which is assumed to be
1941 MEMREF offseted by OFFSET bytes. If VALIDATE is
1942 nonzero, the memory address is forced to be valid. */
1945 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1946 HOST_WIDE_INT offset, int validate)
1948 memref = change_address_1 (memref, VOIDmode, addr, validate);
1949 return adjust_address_1 (memref, mode, offset, validate, 0);
1952 /* Return a memory reference like MEMREF, but whose address is changed by
1953 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1954 known to be in OFFSET (possibly 1). */
1957 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1959 rtx new, addr = XEXP (memref, 0);
1961 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1963 /* At this point we don't know _why_ the address is invalid. It
1964 could have secondary memory references, multiplies or anything.
1966 However, if we did go and rearrange things, we can wind up not
1967 being able to recognize the magic around pic_offset_table_rtx.
1968 This stuff is fragile, and is yet another example of why it is
1969 bad to expose PIC machinery too early. */
1970 if (! memory_address_p (GET_MODE (memref), new)
1971 && GET_CODE (addr) == PLUS
1972 && XEXP (addr, 0) == pic_offset_table_rtx)
1974 addr = force_reg (GET_MODE (addr), addr);
1975 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1978 update_temp_slot_address (XEXP (memref, 0), new);
1979 new = change_address_1 (memref, VOIDmode, new, 1);
1981 /* If there are no changes, just return the original memory reference. */
1985 /* Update the alignment to reflect the offset. Reset the offset, which
1988 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1989 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1994 /* Return a memory reference like MEMREF, but with its address changed to
1995 ADDR. The caller is asserting that the actual piece of memory pointed
1996 to is the same, just the form of the address is being changed, such as
1997 by putting something into a register. */
2000 replace_equiv_address (rtx memref, rtx addr)
2002 /* change_address_1 copies the memory attribute structure without change
2003 and that's exactly what we want here. */
2004 update_temp_slot_address (XEXP (memref, 0), addr);
2005 return change_address_1 (memref, VOIDmode, addr, 1);
2008 /* Likewise, but the reference is not required to be valid. */
2011 replace_equiv_address_nv (rtx memref, rtx addr)
2013 return change_address_1 (memref, VOIDmode, addr, 0);
2016 /* Return a memory reference like MEMREF, but with its mode widened to
2017 MODE and offset by OFFSET. This would be used by targets that e.g.
2018 cannot issue QImode memory operations and have to use SImode memory
2019 operations plus masking logic. */
2022 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2024 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2025 tree expr = MEM_EXPR (new);
2026 rtx memoffset = MEM_OFFSET (new);
2027 unsigned int size = GET_MODE_SIZE (mode);
2029 /* If there are no changes, just return the original memory reference. */
2033 /* If we don't know what offset we were at within the expression, then
2034 we can't know if we've overstepped the bounds. */
2040 if (TREE_CODE (expr) == COMPONENT_REF)
2042 tree field = TREE_OPERAND (expr, 1);
2043 tree offset = component_ref_field_offset (expr);
2045 if (! DECL_SIZE_UNIT (field))
2051 /* Is the field at least as large as the access? If so, ok,
2052 otherwise strip back to the containing structure. */
2053 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2054 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2055 && INTVAL (memoffset) >= 0)
2058 if (! host_integerp (offset, 1))
2064 expr = TREE_OPERAND (expr, 0);
2066 = (GEN_INT (INTVAL (memoffset)
2067 + tree_low_cst (offset, 1)
2068 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2071 /* Similarly for the decl. */
2072 else if (DECL_P (expr)
2073 && DECL_SIZE_UNIT (expr)
2074 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2075 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2076 && (! memoffset || INTVAL (memoffset) >= 0))
2080 /* The widened memory access overflows the expression, which means
2081 that it could alias another expression. Zap it. */
2088 memoffset = NULL_RTX;
2090 /* The widened memory may alias other stuff, so zap the alias set. */
2091 /* ??? Maybe use get_alias_set on any remaining expression. */
2093 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2094 MEM_ALIGN (new), mode);
2099 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2102 gen_label_rtx (void)
2104 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2105 NULL, label_num++, NULL);
2108 /* For procedure integration. */
2110 /* Install new pointers to the first and last insns in the chain.
2111 Also, set cur_insn_uid to one higher than the last in use.
2112 Used for an inline-procedure after copying the insn chain. */
2115 set_new_first_and_last_insn (rtx first, rtx last)
2123 for (insn = first; insn; insn = NEXT_INSN (insn))
2124 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2129 /* Go through all the RTL insn bodies and copy any invalid shared
2130 structure. This routine should only be called once. */
2133 unshare_all_rtl_1 (rtx insn)
2135 /* Unshare just about everything else. */
2136 unshare_all_rtl_in_chain (insn);
2138 /* Make sure the addresses of stack slots found outside the insn chain
2139 (such as, in DECL_RTL of a variable) are not shared
2140 with the insn chain.
2142 This special care is necessary when the stack slot MEM does not
2143 actually appear in the insn chain. If it does appear, its address
2144 is unshared from all else at that point. */
2145 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2148 /* Go through all the RTL insn bodies and copy any invalid shared
2149 structure, again. This is a fairly expensive thing to do so it
2150 should be done sparingly. */
2153 unshare_all_rtl_again (rtx insn)
2158 for (p = insn; p; p = NEXT_INSN (p))
2161 reset_used_flags (PATTERN (p));
2162 reset_used_flags (REG_NOTES (p));
2165 /* Make sure that virtual stack slots are not shared. */
2166 set_used_decls (DECL_INITIAL (cfun->decl));
2168 /* Make sure that virtual parameters are not shared. */
2169 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2170 set_used_flags (DECL_RTL (decl));
2172 reset_used_flags (stack_slot_list);
2174 unshare_all_rtl_1 (insn);
2178 unshare_all_rtl (void)
2180 unshare_all_rtl_1 (get_insns ());
2184 struct tree_opt_pass pass_unshare_all_rtl =
2186 "unshare", /* name */
2188 unshare_all_rtl, /* execute */
2191 0, /* static_pass_number */
2193 0, /* properties_required */
2194 0, /* properties_provided */
2195 0, /* properties_destroyed */
2196 0, /* todo_flags_start */
2197 TODO_dump_func | TODO_verify_rtl_sharing, /* todo_flags_finish */
2202 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2203 Recursively does the same for subexpressions. */
2206 verify_rtx_sharing (rtx orig, rtx insn)
2211 const char *format_ptr;
2216 code = GET_CODE (x);
2218 /* These types may be freely shared. */
2234 /* SCRATCH must be shared because they represent distinct values. */
2236 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2241 if (shared_const_p (orig))
2246 /* A MEM is allowed to be shared if its address is constant. */
2247 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2248 || reload_completed || reload_in_progress)
2257 /* This rtx may not be shared. If it has already been seen,
2258 replace it with a copy of itself. */
2259 #ifdef ENABLE_CHECKING
2260 if (RTX_FLAG (x, used))
2262 error ("invalid rtl sharing found in the insn");
2264 error ("shared rtx");
2266 internal_error ("internal consistency failure");
2269 gcc_assert (!RTX_FLAG (x, used));
2271 RTX_FLAG (x, used) = 1;
2273 /* Now scan the subexpressions recursively. */
2275 format_ptr = GET_RTX_FORMAT (code);
2277 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2279 switch (*format_ptr++)
2282 verify_rtx_sharing (XEXP (x, i), insn);
2286 if (XVEC (x, i) != NULL)
2289 int len = XVECLEN (x, i);
2291 for (j = 0; j < len; j++)
2293 /* We allow sharing of ASM_OPERANDS inside single
2295 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2296 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2298 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2300 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2309 /* Go through all the RTL insn bodies and check that there is no unexpected
2310 sharing in between the subexpressions. */
2313 verify_rtl_sharing (void)
2317 for (p = get_insns (); p; p = NEXT_INSN (p))
2320 reset_used_flags (PATTERN (p));
2321 reset_used_flags (REG_NOTES (p));
2322 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2325 rtx q, sequence = PATTERN (p);
2327 for (i = 0; i < XVECLEN (sequence, 0); i++)
2329 q = XVECEXP (sequence, 0, i);
2330 gcc_assert (INSN_P (q));
2331 reset_used_flags (PATTERN (q));
2332 reset_used_flags (REG_NOTES (q));
2337 for (p = get_insns (); p; p = NEXT_INSN (p))
2340 verify_rtx_sharing (PATTERN (p), p);
2341 verify_rtx_sharing (REG_NOTES (p), p);
2345 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2346 Assumes the mark bits are cleared at entry. */
2349 unshare_all_rtl_in_chain (rtx insn)
2351 for (; insn; insn = NEXT_INSN (insn))
2354 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2355 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2359 /* Go through all virtual stack slots of a function and mark them as
2360 shared. We never replace the DECL_RTLs themselves with a copy,
2361 but expressions mentioned into a DECL_RTL cannot be shared with
2362 expressions in the instruction stream.
2364 Note that reload may convert pseudo registers into memories in-place.
2365 Pseudo registers are always shared, but MEMs never are. Thus if we
2366 reset the used flags on MEMs in the instruction stream, we must set
2367 them again on MEMs that appear in DECL_RTLs. */
2370 set_used_decls (tree blk)
2375 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2376 if (DECL_RTL_SET_P (t))
2377 set_used_flags (DECL_RTL (t));
2379 /* Now process sub-blocks. */
2380 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2384 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2385 Recursively does the same for subexpressions. Uses
2386 copy_rtx_if_shared_1 to reduce stack space. */
2389 copy_rtx_if_shared (rtx orig)
2391 copy_rtx_if_shared_1 (&orig);
2395 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2396 use. Recursively does the same for subexpressions. */
2399 copy_rtx_if_shared_1 (rtx *orig1)
2405 const char *format_ptr;
2409 /* Repeat is used to turn tail-recursion into iteration. */
2416 code = GET_CODE (x);
2418 /* These types may be freely shared. */
2433 /* SCRATCH must be shared because they represent distinct values. */
2436 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2441 if (shared_const_p (x))
2450 /* The chain of insns is not being copied. */
2457 /* This rtx may not be shared. If it has already been seen,
2458 replace it with a copy of itself. */
2460 if (RTX_FLAG (x, used))
2462 x = shallow_copy_rtx (x);
2465 RTX_FLAG (x, used) = 1;
2467 /* Now scan the subexpressions recursively.
2468 We can store any replaced subexpressions directly into X
2469 since we know X is not shared! Any vectors in X
2470 must be copied if X was copied. */
2472 format_ptr = GET_RTX_FORMAT (code);
2473 length = GET_RTX_LENGTH (code);
2476 for (i = 0; i < length; i++)
2478 switch (*format_ptr++)
2482 copy_rtx_if_shared_1 (last_ptr);
2483 last_ptr = &XEXP (x, i);
2487 if (XVEC (x, i) != NULL)
2490 int len = XVECLEN (x, i);
2492 /* Copy the vector iff I copied the rtx and the length
2494 if (copied && len > 0)
2495 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2497 /* Call recursively on all inside the vector. */
2498 for (j = 0; j < len; j++)
2501 copy_rtx_if_shared_1 (last_ptr);
2502 last_ptr = &XVECEXP (x, i, j);
2517 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2518 to look for shared sub-parts. */
2521 reset_used_flags (rtx x)
2525 const char *format_ptr;
2528 /* Repeat is used to turn tail-recursion into iteration. */
2533 code = GET_CODE (x);
2535 /* These types may be freely shared so we needn't do any resetting
2557 /* The chain of insns is not being copied. */
2564 RTX_FLAG (x, used) = 0;
2566 format_ptr = GET_RTX_FORMAT (code);
2567 length = GET_RTX_LENGTH (code);
2569 for (i = 0; i < length; i++)
2571 switch (*format_ptr++)
2579 reset_used_flags (XEXP (x, i));
2583 for (j = 0; j < XVECLEN (x, i); j++)
2584 reset_used_flags (XVECEXP (x, i, j));
2590 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2591 to look for shared sub-parts. */
2594 set_used_flags (rtx x)
2598 const char *format_ptr;
2603 code = GET_CODE (x);
2605 /* These types may be freely shared so we needn't do any resetting
2627 /* The chain of insns is not being copied. */
2634 RTX_FLAG (x, used) = 1;
2636 format_ptr = GET_RTX_FORMAT (code);
2637 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2639 switch (*format_ptr++)
2642 set_used_flags (XEXP (x, i));
2646 for (j = 0; j < XVECLEN (x, i); j++)
2647 set_used_flags (XVECEXP (x, i, j));
2653 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2654 Return X or the rtx for the pseudo reg the value of X was copied into.
2655 OTHER must be valid as a SET_DEST. */
2658 make_safe_from (rtx x, rtx other)
2661 switch (GET_CODE (other))
2664 other = SUBREG_REG (other);
2666 case STRICT_LOW_PART:
2669 other = XEXP (other, 0);
2678 && GET_CODE (x) != SUBREG)
2680 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2681 || reg_mentioned_p (other, x))))
2683 rtx temp = gen_reg_rtx (GET_MODE (x));
2684 emit_move_insn (temp, x);
2690 /* Emission of insns (adding them to the doubly-linked list). */
2692 /* Return the first insn of the current sequence or current function. */
2700 /* Specify a new insn as the first in the chain. */
2703 set_first_insn (rtx insn)
2705 gcc_assert (!PREV_INSN (insn));
2709 /* Return the last insn emitted in current sequence or current function. */
2712 get_last_insn (void)
2717 /* Specify a new insn as the last in the chain. */
2720 set_last_insn (rtx insn)
2722 gcc_assert (!NEXT_INSN (insn));
2726 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2729 get_last_insn_anywhere (void)
2731 struct sequence_stack *stack;
2734 for (stack = seq_stack; stack; stack = stack->next)
2735 if (stack->last != 0)
2740 /* Return the first nonnote insn emitted in current sequence or current
2741 function. This routine looks inside SEQUENCEs. */
2744 get_first_nonnote_insn (void)
2746 rtx insn = first_insn;
2751 for (insn = next_insn (insn);
2752 insn && NOTE_P (insn);
2753 insn = next_insn (insn))
2757 if (NONJUMP_INSN_P (insn)
2758 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2759 insn = XVECEXP (PATTERN (insn), 0, 0);
2766 /* Return the last nonnote insn emitted in current sequence or current
2767 function. This routine looks inside SEQUENCEs. */
2770 get_last_nonnote_insn (void)
2772 rtx insn = last_insn;
2777 for (insn = previous_insn (insn);
2778 insn && NOTE_P (insn);
2779 insn = previous_insn (insn))
2783 if (NONJUMP_INSN_P (insn)
2784 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2785 insn = XVECEXP (PATTERN (insn), 0,
2786 XVECLEN (PATTERN (insn), 0) - 1);
2793 /* Return a number larger than any instruction's uid in this function. */
2798 return cur_insn_uid;
2801 /* Return the next insn. If it is a SEQUENCE, return the first insn
2805 next_insn (rtx insn)
2809 insn = NEXT_INSN (insn);
2810 if (insn && NONJUMP_INSN_P (insn)
2811 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2812 insn = XVECEXP (PATTERN (insn), 0, 0);
2818 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2822 previous_insn (rtx insn)
2826 insn = PREV_INSN (insn);
2827 if (insn && NONJUMP_INSN_P (insn)
2828 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2829 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2835 /* Return the next insn after INSN that is not a NOTE. This routine does not
2836 look inside SEQUENCEs. */
2839 next_nonnote_insn (rtx insn)
2843 insn = NEXT_INSN (insn);
2844 if (insn == 0 || !NOTE_P (insn))
2851 /* Return the previous insn before INSN that is not a NOTE. This routine does
2852 not look inside SEQUENCEs. */
2855 prev_nonnote_insn (rtx insn)
2859 insn = PREV_INSN (insn);
2860 if (insn == 0 || !NOTE_P (insn))
2867 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2868 or 0, if there is none. This routine does not look inside
2872 next_real_insn (rtx insn)
2876 insn = NEXT_INSN (insn);
2877 if (insn == 0 || INSN_P (insn))
2884 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2885 or 0, if there is none. This routine does not look inside
2889 prev_real_insn (rtx insn)
2893 insn = PREV_INSN (insn);
2894 if (insn == 0 || INSN_P (insn))
2901 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2902 This routine does not look inside SEQUENCEs. */
2905 last_call_insn (void)
2909 for (insn = get_last_insn ();
2910 insn && !CALL_P (insn);
2911 insn = PREV_INSN (insn))
2917 /* Find the next insn after INSN that really does something. This routine
2918 does not look inside SEQUENCEs. Until reload has completed, this is the
2919 same as next_real_insn. */
2922 active_insn_p (const_rtx insn)
2924 return (CALL_P (insn) || JUMP_P (insn)
2925 || (NONJUMP_INSN_P (insn)
2926 && (! reload_completed
2927 || (GET_CODE (PATTERN (insn)) != USE
2928 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2932 next_active_insn (rtx insn)
2936 insn = NEXT_INSN (insn);
2937 if (insn == 0 || active_insn_p (insn))
2944 /* Find the last insn before INSN that really does something. This routine
2945 does not look inside SEQUENCEs. Until reload has completed, this is the
2946 same as prev_real_insn. */
2949 prev_active_insn (rtx insn)
2953 insn = PREV_INSN (insn);
2954 if (insn == 0 || active_insn_p (insn))
2961 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2964 next_label (rtx insn)
2968 insn = NEXT_INSN (insn);
2969 if (insn == 0 || LABEL_P (insn))
2976 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2979 prev_label (rtx insn)
2983 insn = PREV_INSN (insn);
2984 if (insn == 0 || LABEL_P (insn))
2991 /* Return the last label to mark the same position as LABEL. Return null
2992 if LABEL itself is null. */
2995 skip_consecutive_labels (rtx label)
2999 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3007 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3008 and REG_CC_USER notes so we can find it. */
3011 link_cc0_insns (rtx insn)
3013 rtx user = next_nonnote_insn (insn);
3015 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3016 user = XVECEXP (PATTERN (user), 0, 0);
3018 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3020 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3023 /* Return the next insn that uses CC0 after INSN, which is assumed to
3024 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3025 applied to the result of this function should yield INSN).
3027 Normally, this is simply the next insn. However, if a REG_CC_USER note
3028 is present, it contains the insn that uses CC0.
3030 Return 0 if we can't find the insn. */
3033 next_cc0_user (rtx insn)
3035 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3038 return XEXP (note, 0);
3040 insn = next_nonnote_insn (insn);
3041 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3042 insn = XVECEXP (PATTERN (insn), 0, 0);
3044 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3050 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3051 note, it is the previous insn. */
3054 prev_cc0_setter (rtx insn)
3056 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3059 return XEXP (note, 0);
3061 insn = prev_nonnote_insn (insn);
3062 gcc_assert (sets_cc0_p (PATTERN (insn)));
3069 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3072 find_auto_inc (rtx *xp, void *data)
3077 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3080 switch (GET_CODE (x))
3088 if (rtx_equal_p (reg, XEXP (x, 0)))
3099 /* Increment the label uses for all labels present in rtx. */
3102 mark_label_nuses (rtx x)
3108 code = GET_CODE (x);
3109 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3110 LABEL_NUSES (XEXP (x, 0))++;
3112 fmt = GET_RTX_FORMAT (code);
3113 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3116 mark_label_nuses (XEXP (x, i));
3117 else if (fmt[i] == 'E')
3118 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3119 mark_label_nuses (XVECEXP (x, i, j));
3124 /* Try splitting insns that can be split for better scheduling.
3125 PAT is the pattern which might split.
3126 TRIAL is the insn providing PAT.
3127 LAST is nonzero if we should return the last insn of the sequence produced.
3129 If this routine succeeds in splitting, it returns the first or last
3130 replacement insn depending on the value of LAST. Otherwise, it
3131 returns TRIAL. If the insn to be returned can be split, it will be. */
3134 try_split (rtx pat, rtx trial, int last)
3136 rtx before = PREV_INSN (trial);
3137 rtx after = NEXT_INSN (trial);
3138 int has_barrier = 0;
3139 rtx tem, note_retval, note_libcall;
3142 rtx insn_last, insn;
3145 if (any_condjump_p (trial)
3146 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3147 split_branch_probability = INTVAL (XEXP (note, 0));
3148 probability = split_branch_probability;
3150 seq = split_insns (pat, trial);
3152 split_branch_probability = -1;
3154 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3155 We may need to handle this specially. */
3156 if (after && BARRIER_P (after))
3159 after = NEXT_INSN (after);
3165 /* Avoid infinite loop if any insn of the result matches
3166 the original pattern. */
3170 if (INSN_P (insn_last)
3171 && rtx_equal_p (PATTERN (insn_last), pat))
3173 if (!NEXT_INSN (insn_last))
3175 insn_last = NEXT_INSN (insn_last);
3178 /* We will be adding the new sequence to the function. The splitters
3179 may have introduced invalid RTL sharing, so unshare the sequence now. */
3180 unshare_all_rtl_in_chain (seq);
3183 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3187 mark_jump_label (PATTERN (insn), insn, 0);
3189 if (probability != -1
3190 && any_condjump_p (insn)
3191 && !find_reg_note (insn, REG_BR_PROB, 0))
3193 /* We can preserve the REG_BR_PROB notes only if exactly
3194 one jump is created, otherwise the machine description
3195 is responsible for this step using
3196 split_branch_probability variable. */
3197 gcc_assert (njumps == 1);
3199 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3200 GEN_INT (probability),
3206 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3207 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3210 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3213 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3216 *p = CALL_INSN_FUNCTION_USAGE (trial);
3217 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3221 /* Copy notes, particularly those related to the CFG. */
3222 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3224 switch (REG_NOTE_KIND (note))
3227 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3230 || (flag_non_call_exceptions && INSN_P (insn)
3231 && may_trap_p (PATTERN (insn))))
3233 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3241 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3245 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3251 case REG_NON_LOCAL_GOTO:
3252 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3256 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3264 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3266 rtx reg = XEXP (note, 0);
3267 if (!FIND_REG_INC_NOTE (insn, reg)
3268 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3269 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC, reg,
3276 /* Relink the insns with REG_LIBCALL note and with REG_RETVAL note
3278 REG_NOTES (insn_last)
3279 = gen_rtx_INSN_LIST (REG_LIBCALL,
3281 REG_NOTES (insn_last));
3283 note_retval = find_reg_note (XEXP (note, 0), REG_RETVAL, NULL);
3284 XEXP (note_retval, 0) = insn_last;
3288 /* Relink the insns with REG_LIBCALL note and with REG_RETVAL note
3290 REG_NOTES (insn_last)
3291 = gen_rtx_INSN_LIST (REG_RETVAL,
3293 REG_NOTES (insn_last));
3295 note_libcall = find_reg_note (XEXP (note, 0), REG_LIBCALL, NULL);
3296 XEXP (note_libcall, 0) = insn_last;
3304 /* If there are LABELS inside the split insns increment the
3305 usage count so we don't delete the label. */
3309 while (insn != NULL_RTX)
3311 /* JUMP_P insns have already been "marked" above. */
3312 if (NONJUMP_INSN_P (insn))
3313 mark_label_nuses (PATTERN (insn));
3315 insn = PREV_INSN (insn);
3319 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3321 delete_insn (trial);
3323 emit_barrier_after (tem);
3325 /* Recursively call try_split for each new insn created; by the
3326 time control returns here that insn will be fully split, so
3327 set LAST and continue from the insn after the one returned.
3328 We can't use next_active_insn here since AFTER may be a note.
3329 Ignore deleted insns, which can be occur if not optimizing. */
3330 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3331 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3332 tem = try_split (PATTERN (tem), tem, 1);
3334 /* Return either the first or the last insn, depending on which was
3337 ? (after ? PREV_INSN (after) : last_insn)
3338 : NEXT_INSN (before);
3341 /* Make and return an INSN rtx, initializing all its slots.
3342 Store PATTERN in the pattern slots. */
3345 make_insn_raw (rtx pattern)
3349 insn = rtx_alloc (INSN);
3351 INSN_UID (insn) = cur_insn_uid++;
3352 PATTERN (insn) = pattern;
3353 INSN_CODE (insn) = -1;
3354 REG_NOTES (insn) = NULL;
3355 INSN_LOCATOR (insn) = curr_insn_locator ();
3356 BLOCK_FOR_INSN (insn) = NULL;
3358 #ifdef ENABLE_RTL_CHECKING
3361 && (returnjump_p (insn)
3362 || (GET_CODE (insn) == SET
3363 && SET_DEST (insn) == pc_rtx)))
3365 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3373 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3376 make_jump_insn_raw (rtx pattern)
3380 insn = rtx_alloc (JUMP_INSN);
3381 INSN_UID (insn) = cur_insn_uid++;
3383 PATTERN (insn) = pattern;
3384 INSN_CODE (insn) = -1;
3385 REG_NOTES (insn) = NULL;
3386 JUMP_LABEL (insn) = NULL;
3387 INSN_LOCATOR (insn) = curr_insn_locator ();
3388 BLOCK_FOR_INSN (insn) = NULL;
3393 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3396 make_call_insn_raw (rtx pattern)
3400 insn = rtx_alloc (CALL_INSN);
3401 INSN_UID (insn) = cur_insn_uid++;
3403 PATTERN (insn) = pattern;
3404 INSN_CODE (insn) = -1;
3405 REG_NOTES (insn) = NULL;
3406 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3407 INSN_LOCATOR (insn) = curr_insn_locator ();
3408 BLOCK_FOR_INSN (insn) = NULL;
3413 /* Add INSN to the end of the doubly-linked list.
3414 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3419 PREV_INSN (insn) = last_insn;
3420 NEXT_INSN (insn) = 0;
3422 if (NULL != last_insn)
3423 NEXT_INSN (last_insn) = insn;
3425 if (NULL == first_insn)
3431 /* Add INSN into the doubly-linked list after insn AFTER. This and
3432 the next should be the only functions called to insert an insn once
3433 delay slots have been filled since only they know how to update a
3437 add_insn_after (rtx insn, rtx after, basic_block bb)
3439 rtx next = NEXT_INSN (after);
3441 gcc_assert (!optimize || !INSN_DELETED_P (after));
3443 NEXT_INSN (insn) = next;
3444 PREV_INSN (insn) = after;
3448 PREV_INSN (next) = insn;
3449 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3450 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3452 else if (last_insn == after)
3456 struct sequence_stack *stack = seq_stack;
3457 /* Scan all pending sequences too. */
3458 for (; stack; stack = stack->next)
3459 if (after == stack->last)
3468 if (!BARRIER_P (after)
3469 && !BARRIER_P (insn)
3470 && (bb = BLOCK_FOR_INSN (after)))
3472 set_block_for_insn (insn, bb);
3474 df_insn_rescan (insn);
3475 /* Should not happen as first in the BB is always
3476 either NOTE or LABEL. */
3477 if (BB_END (bb) == after
3478 /* Avoid clobbering of structure when creating new BB. */
3479 && !BARRIER_P (insn)
3480 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3484 NEXT_INSN (after) = insn;
3485 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3487 rtx sequence = PATTERN (after);
3488 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3492 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3493 the previous should be the only functions called to insert an insn
3494 once delay slots have been filled since only they know how to
3495 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3499 add_insn_before (rtx insn, rtx before, basic_block bb)
3501 rtx prev = PREV_INSN (before);
3503 gcc_assert (!optimize || !INSN_DELETED_P (before));
3505 PREV_INSN (insn) = prev;
3506 NEXT_INSN (insn) = before;
3510 NEXT_INSN (prev) = insn;
3511 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3513 rtx sequence = PATTERN (prev);
3514 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3517 else if (first_insn == before)
3521 struct sequence_stack *stack = seq_stack;
3522 /* Scan all pending sequences too. */
3523 for (; stack; stack = stack->next)
3524 if (before == stack->first)
3526 stack->first = insn;
3534 && !BARRIER_P (before)
3535 && !BARRIER_P (insn))
3536 bb = BLOCK_FOR_INSN (before);
3540 set_block_for_insn (insn, bb);
3542 df_insn_rescan (insn);
3543 /* Should not happen as first in the BB is always either NOTE or
3545 gcc_assert (BB_HEAD (bb) != insn
3546 /* Avoid clobbering of structure when creating new BB. */
3548 || NOTE_INSN_BASIC_BLOCK_P (insn));
3551 PREV_INSN (before) = insn;
3552 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3553 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3557 /* Replace insn with an deleted instruction note. */
3559 void set_insn_deleted (rtx insn)
3561 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3562 PUT_CODE (insn, NOTE);
3563 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3567 /* Remove an insn from its doubly-linked list. This function knows how
3568 to handle sequences. */
3570 remove_insn (rtx insn)
3572 rtx next = NEXT_INSN (insn);
3573 rtx prev = PREV_INSN (insn);
3576 /* Later in the code, the block will be marked dirty. */
3577 df_insn_delete (NULL, INSN_UID (insn));
3581 NEXT_INSN (prev) = next;
3582 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3584 rtx sequence = PATTERN (prev);
3585 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3588 else if (first_insn == insn)
3592 struct sequence_stack *stack = seq_stack;
3593 /* Scan all pending sequences too. */
3594 for (; stack; stack = stack->next)
3595 if (insn == stack->first)
3597 stack->first = next;
3606 PREV_INSN (next) = prev;
3607 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3608 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3610 else if (last_insn == insn)
3614 struct sequence_stack *stack = seq_stack;
3615 /* Scan all pending sequences too. */
3616 for (; stack; stack = stack->next)
3617 if (insn == stack->last)
3625 if (!BARRIER_P (insn)
3626 && (bb = BLOCK_FOR_INSN (insn)))
3629 df_set_bb_dirty (bb);
3630 if (BB_HEAD (bb) == insn)
3632 /* Never ever delete the basic block note without deleting whole
3634 gcc_assert (!NOTE_P (insn));
3635 BB_HEAD (bb) = next;
3637 if (BB_END (bb) == insn)
3642 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3645 add_function_usage_to (rtx call_insn, rtx call_fusage)
3647 gcc_assert (call_insn && CALL_P (call_insn));
3649 /* Put the register usage information on the CALL. If there is already
3650 some usage information, put ours at the end. */
3651 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3655 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3656 link = XEXP (link, 1))
3659 XEXP (link, 1) = call_fusage;
3662 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3665 /* Delete all insns made since FROM.
3666 FROM becomes the new last instruction. */
3669 delete_insns_since (rtx from)
3674 NEXT_INSN (from) = 0;
3678 /* This function is deprecated, please use sequences instead.
3680 Move a consecutive bunch of insns to a different place in the chain.
3681 The insns to be moved are those between FROM and TO.
3682 They are moved to a new position after the insn AFTER.
3683 AFTER must not be FROM or TO or any insn in between.
3685 This function does not know about SEQUENCEs and hence should not be
3686 called after delay-slot filling has been done. */
3689 reorder_insns_nobb (rtx from, rtx to, rtx after)
3691 /* Splice this bunch out of where it is now. */
3692 if (PREV_INSN (from))
3693 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3695 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3696 if (last_insn == to)
3697 last_insn = PREV_INSN (from);
3698 if (first_insn == from)
3699 first_insn = NEXT_INSN (to);
3701 /* Make the new neighbors point to it and it to them. */
3702 if (NEXT_INSN (after))
3703 PREV_INSN (NEXT_INSN (after)) = to;
3705 NEXT_INSN (to) = NEXT_INSN (after);
3706 PREV_INSN (from) = after;
3707 NEXT_INSN (after) = from;
3708 if (after == last_insn)
3712 /* Same as function above, but take care to update BB boundaries. */
3714 reorder_insns (rtx from, rtx to, rtx after)
3716 rtx prev = PREV_INSN (from);
3717 basic_block bb, bb2;
3719 reorder_insns_nobb (from, to, after);
3721 if (!BARRIER_P (after)
3722 && (bb = BLOCK_FOR_INSN (after)))
3725 df_set_bb_dirty (bb);
3727 if (!BARRIER_P (from)
3728 && (bb2 = BLOCK_FOR_INSN (from)))
3730 if (BB_END (bb2) == to)
3731 BB_END (bb2) = prev;
3732 df_set_bb_dirty (bb2);
3735 if (BB_END (bb) == after)
3738 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3741 set_block_for_insn (x, bb);
3742 df_insn_change_bb (x);
3748 /* Emit insn(s) of given code and pattern
3749 at a specified place within the doubly-linked list.
3751 All of the emit_foo global entry points accept an object
3752 X which is either an insn list or a PATTERN of a single
3755 There are thus a few canonical ways to generate code and
3756 emit it at a specific place in the instruction stream. For
3757 example, consider the instruction named SPOT and the fact that
3758 we would like to emit some instructions before SPOT. We might
3762 ... emit the new instructions ...
3763 insns_head = get_insns ();
3766 emit_insn_before (insns_head, SPOT);
3768 It used to be common to generate SEQUENCE rtl instead, but that
3769 is a relic of the past which no longer occurs. The reason is that
3770 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3771 generated would almost certainly die right after it was created. */
3773 /* Make X be output before the instruction BEFORE. */
3776 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
3781 gcc_assert (before);
3786 switch (GET_CODE (x))
3797 rtx next = NEXT_INSN (insn);
3798 add_insn_before (insn, before, bb);
3804 #ifdef ENABLE_RTL_CHECKING
3811 last = make_insn_raw (x);
3812 add_insn_before (last, before, bb);
3819 /* Make an instruction with body X and code JUMP_INSN
3820 and output it before the instruction BEFORE. */
3823 emit_jump_insn_before_noloc (rtx x, rtx before)
3825 rtx insn, last = NULL_RTX;
3827 gcc_assert (before);
3829 switch (GET_CODE (x))
3840 rtx next = NEXT_INSN (insn);
3841 add_insn_before (insn, before, NULL);
3847 #ifdef ENABLE_RTL_CHECKING
3854 last = make_jump_insn_raw (x);
3855 add_insn_before (last, before, NULL);
3862 /* Make an instruction with body X and code CALL_INSN
3863 and output it before the instruction BEFORE. */
3866 emit_call_insn_before_noloc (rtx x, rtx before)
3868 rtx last = NULL_RTX, insn;
3870 gcc_assert (before);
3872 switch (GET_CODE (x))
3883 rtx next = NEXT_INSN (insn);
3884 add_insn_before (insn, before, NULL);
3890 #ifdef ENABLE_RTL_CHECKING
3897 last = make_call_insn_raw (x);
3898 add_insn_before (last, before, NULL);
3905 /* Make an insn of code BARRIER
3906 and output it before the insn BEFORE. */
3909 emit_barrier_before (rtx before)
3911 rtx insn = rtx_alloc (BARRIER);
3913 INSN_UID (insn) = cur_insn_uid++;
3915 add_insn_before (insn, before, NULL);
3919 /* Emit the label LABEL before the insn BEFORE. */
3922 emit_label_before (rtx label, rtx before)
3924 /* This can be called twice for the same label as a result of the
3925 confusion that follows a syntax error! So make it harmless. */
3926 if (INSN_UID (label) == 0)
3928 INSN_UID (label) = cur_insn_uid++;
3929 add_insn_before (label, before, NULL);
3935 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3938 emit_note_before (enum insn_note subtype, rtx before)
3940 rtx note = rtx_alloc (NOTE);
3941 INSN_UID (note) = cur_insn_uid++;
3942 NOTE_KIND (note) = subtype;
3943 BLOCK_FOR_INSN (note) = NULL;
3944 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
3946 add_insn_before (note, before, NULL);
3950 /* Helper for emit_insn_after, handles lists of instructions
3954 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
3958 if (!bb && !BARRIER_P (after))
3959 bb = BLOCK_FOR_INSN (after);
3963 df_set_bb_dirty (bb);
3964 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3965 if (!BARRIER_P (last))
3967 set_block_for_insn (last, bb);
3968 df_insn_rescan (last);
3970 if (!BARRIER_P (last))
3972 set_block_for_insn (last, bb);
3973 df_insn_rescan (last);
3975 if (BB_END (bb) == after)
3979 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3982 after_after = NEXT_INSN (after);
3984 NEXT_INSN (after) = first;
3985 PREV_INSN (first) = after;
3986 NEXT_INSN (last) = after_after;
3988 PREV_INSN (after_after) = last;
3990 if (after == last_insn)
3995 /* Make X be output after the insn AFTER and set the BB of insn. If
3996 BB is NULL, an attempt is made to infer the BB from AFTER. */
3999 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4008 switch (GET_CODE (x))
4016 last = emit_insn_after_1 (x, after, bb);
4019 #ifdef ENABLE_RTL_CHECKING
4026 last = make_insn_raw (x);
4027 add_insn_after (last, after, bb);
4035 /* Make an insn of code JUMP_INSN with body X
4036 and output it after the insn AFTER. */
4039 emit_jump_insn_after_noloc (rtx x, rtx after)
4045 switch (GET_CODE (x))
4053 last = emit_insn_after_1 (x, after, NULL);
4056 #ifdef ENABLE_RTL_CHECKING
4063 last = make_jump_insn_raw (x);
4064 add_insn_after (last, after, NULL);
4071 /* Make an instruction with body X and code CALL_INSN
4072 and output it after the instruction AFTER. */
4075 emit_call_insn_after_noloc (rtx x, rtx after)
4081 switch (GET_CODE (x))
4089 last = emit_insn_after_1 (x, after, NULL);
4092 #ifdef ENABLE_RTL_CHECKING
4099 last = make_call_insn_raw (x);
4100 add_insn_after (last, after, NULL);
4107 /* Make an insn of code BARRIER
4108 and output it after the insn AFTER. */
4111 emit_barrier_after (rtx after)
4113 rtx insn = rtx_alloc (BARRIER);
4115 INSN_UID (insn) = cur_insn_uid++;
4117 add_insn_after (insn, after, NULL);
4121 /* Emit the label LABEL after the insn AFTER. */
4124 emit_label_after (rtx label, rtx after)
4126 /* This can be called twice for the same label
4127 as a result of the confusion that follows a syntax error!
4128 So make it harmless. */
4129 if (INSN_UID (label) == 0)
4131 INSN_UID (label) = cur_insn_uid++;
4132 add_insn_after (label, after, NULL);
4138 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4141 emit_note_after (enum insn_note subtype, rtx after)
4143 rtx note = rtx_alloc (NOTE);
4144 INSN_UID (note) = cur_insn_uid++;
4145 NOTE_KIND (note) = subtype;
4146 BLOCK_FOR_INSN (note) = NULL;
4147 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4148 add_insn_after (note, after, NULL);
4152 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4154 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4156 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4158 if (pattern == NULL_RTX || !loc)
4161 after = NEXT_INSN (after);
4164 if (active_insn_p (after) && !INSN_LOCATOR (after))
4165 INSN_LOCATOR (after) = loc;
4168 after = NEXT_INSN (after);
4173 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4175 emit_insn_after (rtx pattern, rtx after)
4178 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4180 return emit_insn_after_noloc (pattern, after, NULL);
4183 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4185 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4187 rtx last = emit_jump_insn_after_noloc (pattern, after);
4189 if (pattern == NULL_RTX || !loc)
4192 after = NEXT_INSN (after);
4195 if (active_insn_p (after) && !INSN_LOCATOR (after))
4196 INSN_LOCATOR (after) = loc;
4199 after = NEXT_INSN (after);
4204 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4206 emit_jump_insn_after (rtx pattern, rtx after)
4209 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4211 return emit_jump_insn_after_noloc (pattern, after);
4214 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4216 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4218 rtx last = emit_call_insn_after_noloc (pattern, after);
4220 if (pattern == NULL_RTX || !loc)
4223 after = NEXT_INSN (after);
4226 if (active_insn_p (after) && !INSN_LOCATOR (after))
4227 INSN_LOCATOR (after) = loc;
4230 after = NEXT_INSN (after);
4235 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4237 emit_call_insn_after (rtx pattern, rtx after)
4240 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4242 return emit_call_insn_after_noloc (pattern, after);
4245 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4247 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4249 rtx first = PREV_INSN (before);
4250 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4252 if (pattern == NULL_RTX || !loc)
4256 first = get_insns ();
4258 first = NEXT_INSN (first);
4261 if (active_insn_p (first) && !INSN_LOCATOR (first))
4262 INSN_LOCATOR (first) = loc;
4265 first = NEXT_INSN (first);
4270 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4272 emit_insn_before (rtx pattern, rtx before)
4274 if (INSN_P (before))
4275 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4277 return emit_insn_before_noloc (pattern, before, NULL);
4280 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4282 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4284 rtx first = PREV_INSN (before);
4285 rtx last = emit_jump_insn_before_noloc (pattern, before);
4287 if (pattern == NULL_RTX)
4290 first = NEXT_INSN (first);
4293 if (active_insn_p (first) && !INSN_LOCATOR (first))
4294 INSN_LOCATOR (first) = loc;
4297 first = NEXT_INSN (first);
4302 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4304 emit_jump_insn_before (rtx pattern, rtx before)
4306 if (INSN_P (before))
4307 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4309 return emit_jump_insn_before_noloc (pattern, before);
4312 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4314 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4316 rtx first = PREV_INSN (before);
4317 rtx last = emit_call_insn_before_noloc (pattern, before);
4319 if (pattern == NULL_RTX)
4322 first = NEXT_INSN (first);
4325 if (active_insn_p (first) && !INSN_LOCATOR (first))
4326 INSN_LOCATOR (first) = loc;
4329 first = NEXT_INSN (first);
4334 /* like emit_call_insn_before_noloc,
4335 but set insn_locator according to before. */
4337 emit_call_insn_before (rtx pattern, rtx before)
4339 if (INSN_P (before))
4340 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4342 return emit_call_insn_before_noloc (pattern, before);
4345 /* Take X and emit it at the end of the doubly-linked
4348 Returns the last insn emitted. */
4353 rtx last = last_insn;
4359 switch (GET_CODE (x))
4370 rtx next = NEXT_INSN (insn);
4377 #ifdef ENABLE_RTL_CHECKING
4384 last = make_insn_raw (x);
4392 /* Make an insn of code JUMP_INSN with pattern X
4393 and add it to the end of the doubly-linked list. */
4396 emit_jump_insn (rtx x)
4398 rtx last = NULL_RTX, insn;
4400 switch (GET_CODE (x))
4411 rtx next = NEXT_INSN (insn);
4418 #ifdef ENABLE_RTL_CHECKING
4425 last = make_jump_insn_raw (x);
4433 /* Make an insn of code CALL_INSN with pattern X
4434 and add it to the end of the doubly-linked list. */
4437 emit_call_insn (rtx x)
4441 switch (GET_CODE (x))
4449 insn = emit_insn (x);
4452 #ifdef ENABLE_RTL_CHECKING
4459 insn = make_call_insn_raw (x);
4467 /* Add the label LABEL to the end of the doubly-linked list. */
4470 emit_label (rtx label)
4472 /* This can be called twice for the same label
4473 as a result of the confusion that follows a syntax error!
4474 So make it harmless. */
4475 if (INSN_UID (label) == 0)
4477 INSN_UID (label) = cur_insn_uid++;
4483 /* Make an insn of code BARRIER
4484 and add it to the end of the doubly-linked list. */
4489 rtx barrier = rtx_alloc (BARRIER);
4490 INSN_UID (barrier) = cur_insn_uid++;
4495 /* Emit a copy of note ORIG. */
4498 emit_note_copy (rtx orig)
4502 note = rtx_alloc (NOTE);
4504 INSN_UID (note) = cur_insn_uid++;
4505 NOTE_DATA (note) = NOTE_DATA (orig);
4506 NOTE_KIND (note) = NOTE_KIND (orig);
4507 BLOCK_FOR_INSN (note) = NULL;
4513 /* Make an insn of code NOTE or type NOTE_NO
4514 and add it to the end of the doubly-linked list. */
4517 emit_note (enum insn_note kind)
4521 note = rtx_alloc (NOTE);
4522 INSN_UID (note) = cur_insn_uid++;
4523 NOTE_KIND (note) = kind;
4524 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4525 BLOCK_FOR_INSN (note) = NULL;
4530 /* Cause next statement to emit a line note even if the line number
4534 force_next_line_note (void)
4539 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4540 note of this type already exists, remove it first. */
4543 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4545 rtx note = find_reg_note (insn, kind, NULL_RTX);
4546 rtx new_note = NULL;
4552 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4553 has multiple sets (some callers assume single_set
4554 means the insn only has one set, when in fact it
4555 means the insn only has one * useful * set). */
4556 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4562 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4563 It serves no useful purpose and breaks eliminate_regs. */
4564 if (GET_CODE (datum) == ASM_OPERANDS)
4569 XEXP (note, 0) = datum;
4570 df_notes_rescan (insn);
4578 XEXP (note, 0) = datum;
4584 new_note = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4585 REG_NOTES (insn) = new_note;
4591 df_notes_rescan (insn);
4597 return REG_NOTES (insn);
4600 /* Return an indication of which type of insn should have X as a body.
4601 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4603 static enum rtx_code
4604 classify_insn (rtx x)
4608 if (GET_CODE (x) == CALL)
4610 if (GET_CODE (x) == RETURN)
4612 if (GET_CODE (x) == SET)
4614 if (SET_DEST (x) == pc_rtx)
4616 else if (GET_CODE (SET_SRC (x)) == CALL)
4621 if (GET_CODE (x) == PARALLEL)
4624 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4625 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4627 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4628 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4630 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4631 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4637 /* Emit the rtl pattern X as an appropriate kind of insn.
4638 If X is a label, it is simply added into the insn chain. */
4643 enum rtx_code code = classify_insn (x);
4648 return emit_label (x);
4650 return emit_insn (x);
4653 rtx insn = emit_jump_insn (x);
4654 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4655 return emit_barrier ();
4659 return emit_call_insn (x);
4665 /* Space for free sequence stack entries. */
4666 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4668 /* Begin emitting insns to a sequence. If this sequence will contain
4669 something that might cause the compiler to pop arguments to function
4670 calls (because those pops have previously been deferred; see
4671 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4672 before calling this function. That will ensure that the deferred
4673 pops are not accidentally emitted in the middle of this sequence. */
4676 start_sequence (void)
4678 struct sequence_stack *tem;
4680 if (free_sequence_stack != NULL)
4682 tem = free_sequence_stack;
4683 free_sequence_stack = tem->next;
4686 tem = ggc_alloc (sizeof (struct sequence_stack));
4688 tem->next = seq_stack;
4689 tem->first = first_insn;
4690 tem->last = last_insn;
4698 /* Set up the insn chain starting with FIRST as the current sequence,
4699 saving the previously current one. See the documentation for
4700 start_sequence for more information about how to use this function. */
4703 push_to_sequence (rtx first)
4709 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4715 /* Like push_to_sequence, but take the last insn as an argument to avoid
4716 looping through the list. */
4719 push_to_sequence2 (rtx first, rtx last)
4727 /* Set up the outer-level insn chain
4728 as the current sequence, saving the previously current one. */
4731 push_topmost_sequence (void)
4733 struct sequence_stack *stack, *top = NULL;
4737 for (stack = seq_stack; stack; stack = stack->next)
4740 first_insn = top->first;
4741 last_insn = top->last;
4744 /* After emitting to the outer-level insn chain, update the outer-level
4745 insn chain, and restore the previous saved state. */
4748 pop_topmost_sequence (void)
4750 struct sequence_stack *stack, *top = NULL;
4752 for (stack = seq_stack; stack; stack = stack->next)
4755 top->first = first_insn;
4756 top->last = last_insn;
4761 /* After emitting to a sequence, restore previous saved state.
4763 To get the contents of the sequence just made, you must call
4764 `get_insns' *before* calling here.
4766 If the compiler might have deferred popping arguments while
4767 generating this sequence, and this sequence will not be immediately
4768 inserted into the instruction stream, use do_pending_stack_adjust
4769 before calling get_insns. That will ensure that the deferred
4770 pops are inserted into this sequence, and not into some random
4771 location in the instruction stream. See INHIBIT_DEFER_POP for more
4772 information about deferred popping of arguments. */
4777 struct sequence_stack *tem = seq_stack;
4779 first_insn = tem->first;
4780 last_insn = tem->last;
4781 seq_stack = tem->next;
4783 memset (tem, 0, sizeof (*tem));
4784 tem->next = free_sequence_stack;
4785 free_sequence_stack = tem;
4788 /* Return 1 if currently emitting into a sequence. */
4791 in_sequence_p (void)
4793 return seq_stack != 0;
4796 /* Put the various virtual registers into REGNO_REG_RTX. */
4799 init_virtual_regs (struct emit_status *es)
4801 rtx *ptr = es->x_regno_reg_rtx;
4802 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4803 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4804 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4805 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4806 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4810 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4811 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4812 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4813 static int copy_insn_n_scratches;
4815 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4816 copied an ASM_OPERANDS.
4817 In that case, it is the original input-operand vector. */
4818 static rtvec orig_asm_operands_vector;
4820 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4821 copied an ASM_OPERANDS.
4822 In that case, it is the copied input-operand vector. */
4823 static rtvec copy_asm_operands_vector;
4825 /* Likewise for the constraints vector. */
4826 static rtvec orig_asm_constraints_vector;
4827 static rtvec copy_asm_constraints_vector;
4829 /* Recursively create a new copy of an rtx for copy_insn.
4830 This function differs from copy_rtx in that it handles SCRATCHes and
4831 ASM_OPERANDs properly.
4832 Normally, this function is not used directly; use copy_insn as front end.
4833 However, you could first copy an insn pattern with copy_insn and then use
4834 this function afterwards to properly copy any REG_NOTEs containing
4838 copy_insn_1 (rtx orig)
4843 const char *format_ptr;
4845 code = GET_CODE (orig);
4860 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
4865 for (i = 0; i < copy_insn_n_scratches; i++)
4866 if (copy_insn_scratch_in[i] == orig)
4867 return copy_insn_scratch_out[i];
4871 if (shared_const_p (orig))
4875 /* A MEM with a constant address is not sharable. The problem is that
4876 the constant address may need to be reloaded. If the mem is shared,
4877 then reloading one copy of this mem will cause all copies to appear
4878 to have been reloaded. */
4884 /* Copy the various flags, fields, and other information. We assume
4885 that all fields need copying, and then clear the fields that should
4886 not be copied. That is the sensible default behavior, and forces
4887 us to explicitly document why we are *not* copying a flag. */
4888 copy = shallow_copy_rtx (orig);
4890 /* We do not copy the USED flag, which is used as a mark bit during
4891 walks over the RTL. */
4892 RTX_FLAG (copy, used) = 0;
4894 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4897 RTX_FLAG (copy, jump) = 0;
4898 RTX_FLAG (copy, call) = 0;
4899 RTX_FLAG (copy, frame_related) = 0;
4902 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4904 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4905 switch (*format_ptr++)
4908 if (XEXP (orig, i) != NULL)
4909 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4914 if (XVEC (orig, i) == orig_asm_constraints_vector)
4915 XVEC (copy, i) = copy_asm_constraints_vector;
4916 else if (XVEC (orig, i) == orig_asm_operands_vector)
4917 XVEC (copy, i) = copy_asm_operands_vector;
4918 else if (XVEC (orig, i) != NULL)
4920 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4921 for (j = 0; j < XVECLEN (copy, i); j++)
4922 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4933 /* These are left unchanged. */
4940 if (code == SCRATCH)
4942 i = copy_insn_n_scratches++;
4943 gcc_assert (i < MAX_RECOG_OPERANDS);
4944 copy_insn_scratch_in[i] = orig;
4945 copy_insn_scratch_out[i] = copy;
4947 else if (code == ASM_OPERANDS)
4949 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4950 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4951 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4952 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4958 /* Create a new copy of an rtx.
4959 This function differs from copy_rtx in that it handles SCRATCHes and
4960 ASM_OPERANDs properly.
4961 INSN doesn't really have to be a full INSN; it could be just the
4964 copy_insn (rtx insn)
4966 copy_insn_n_scratches = 0;
4967 orig_asm_operands_vector = 0;
4968 orig_asm_constraints_vector = 0;
4969 copy_asm_operands_vector = 0;
4970 copy_asm_constraints_vector = 0;
4971 return copy_insn_1 (insn);
4974 /* Initialize data structures and variables in this file
4975 before generating rtl for each function. */
4980 struct function *f = cfun;
4982 f->emit = ggc_alloc (sizeof (struct emit_status));
4986 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4987 last_location = UNKNOWN_LOCATION;
4988 first_label_num = label_num;
4991 /* Init the tables that describe all the pseudo regs. */
4993 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4995 f->emit->regno_pointer_align
4996 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
4997 * sizeof (unsigned char));
5000 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5002 /* Put copies of all the hard registers into regno_reg_rtx. */
5003 memcpy (regno_reg_rtx,
5004 static_regno_reg_rtx,
5005 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5007 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5008 init_virtual_regs (f->emit);
5010 /* Indicate that the virtual registers and stack locations are
5012 REG_POINTER (stack_pointer_rtx) = 1;
5013 REG_POINTER (frame_pointer_rtx) = 1;
5014 REG_POINTER (hard_frame_pointer_rtx) = 1;
5015 REG_POINTER (arg_pointer_rtx) = 1;
5017 REG_POINTER (virtual_incoming_args_rtx) = 1;
5018 REG_POINTER (virtual_stack_vars_rtx) = 1;
5019 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5020 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5021 REG_POINTER (virtual_cfa_rtx) = 1;
5023 #ifdef STACK_BOUNDARY
5024 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5025 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5026 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5027 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5029 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5030 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5031 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5032 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5033 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5036 #ifdef INIT_EXPANDERS
5041 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5044 gen_const_vector (enum machine_mode mode, int constant)
5049 enum machine_mode inner;
5051 units = GET_MODE_NUNITS (mode);
5052 inner = GET_MODE_INNER (mode);
5054 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5056 v = rtvec_alloc (units);
5058 /* We need to call this function after we set the scalar const_tiny_rtx
5060 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5062 for (i = 0; i < units; ++i)
5063 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5065 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5069 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5070 all elements are zero, and the one vector when all elements are one. */
5072 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5074 enum machine_mode inner = GET_MODE_INNER (mode);
5075 int nunits = GET_MODE_NUNITS (mode);
5079 /* Check to see if all of the elements have the same value. */
5080 x = RTVEC_ELT (v, nunits - 1);
5081 for (i = nunits - 2; i >= 0; i--)
5082 if (RTVEC_ELT (v, i) != x)
5085 /* If the values are all the same, check to see if we can use one of the
5086 standard constant vectors. */
5089 if (x == CONST0_RTX (inner))
5090 return CONST0_RTX (mode);
5091 else if (x == CONST1_RTX (inner))
5092 return CONST1_RTX (mode);
5095 return gen_rtx_raw_CONST_VECTOR (mode, v);
5098 /* Initialise global register information required by all functions. */
5101 init_emit_regs (void)
5105 /* Reset register attributes */
5106 htab_empty (reg_attrs_htab);
5108 /* We need reg_raw_mode, so initialize the modes now. */
5109 init_reg_modes_target ();
5111 /* Assign register numbers to the globally defined register rtx. */
5112 pc_rtx = gen_rtx_PC (VOIDmode);
5113 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5114 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5115 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5116 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5117 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5118 virtual_incoming_args_rtx =
5119 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5120 virtual_stack_vars_rtx =
5121 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5122 virtual_stack_dynamic_rtx =
5123 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5124 virtual_outgoing_args_rtx =
5125 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5126 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5128 /* Initialize RTL for commonly used hard registers. These are
5129 copied into regno_reg_rtx as we begin to compile each function. */
5130 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5131 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5133 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5134 return_address_pointer_rtx
5135 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5138 #ifdef STATIC_CHAIN_REGNUM
5139 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5141 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5142 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5143 static_chain_incoming_rtx
5144 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5147 static_chain_incoming_rtx = static_chain_rtx;
5151 static_chain_rtx = STATIC_CHAIN;
5153 #ifdef STATIC_CHAIN_INCOMING
5154 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5156 static_chain_incoming_rtx = static_chain_rtx;
5160 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5161 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5163 pic_offset_table_rtx = NULL_RTX;
5166 /* Create some permanent unique rtl objects shared between all functions.
5167 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5170 init_emit_once (int line_numbers)
5173 enum machine_mode mode;
5174 enum machine_mode double_mode;
5176 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5178 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5179 const_int_htab_eq, NULL);
5181 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5182 const_double_htab_eq, NULL);
5184 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5185 const_fixed_htab_eq, NULL);
5187 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5188 mem_attrs_htab_eq, NULL);
5189 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5190 reg_attrs_htab_eq, NULL);
5192 no_line_numbers = ! line_numbers;
5194 /* Compute the word and byte modes. */
5196 byte_mode = VOIDmode;
5197 word_mode = VOIDmode;
5198 double_mode = VOIDmode;
5200 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5202 mode = GET_MODE_WIDER_MODE (mode))
5204 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5205 && byte_mode == VOIDmode)
5208 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5209 && word_mode == VOIDmode)
5213 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5215 mode = GET_MODE_WIDER_MODE (mode))
5217 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5218 && double_mode == VOIDmode)
5222 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5224 #ifdef INIT_EXPANDERS
5225 /* This is to initialize {init|mark|free}_machine_status before the first
5226 call to push_function_context_to. This is needed by the Chill front
5227 end which calls push_function_context_to before the first call to
5228 init_function_start. */
5232 /* Create the unique rtx's for certain rtx codes and operand values. */
5234 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5235 tries to use these variables. */
5236 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5237 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5238 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5240 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5241 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5242 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5244 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5246 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5247 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5248 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5249 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5250 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5251 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5252 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5254 dconsthalf = dconst1;
5255 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5257 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5259 /* Initialize mathematical constants for constant folding builtins.
5260 These constants need to be given to at least 160 bits precision. */
5261 real_from_string (&dconstsqrt2,
5262 "1.4142135623730950488016887242096980785696718753769480731766797379907");
5263 real_from_string (&dconste,
5264 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5266 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5268 REAL_VALUE_TYPE *r =
5269 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5271 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5273 mode = GET_MODE_WIDER_MODE (mode))
5274 const_tiny_rtx[i][(int) mode] =
5275 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5277 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5279 mode = GET_MODE_WIDER_MODE (mode))
5280 const_tiny_rtx[i][(int) mode] =
5281 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5283 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5285 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5287 mode = GET_MODE_WIDER_MODE (mode))
5288 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5290 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5292 mode = GET_MODE_WIDER_MODE (mode))
5293 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5296 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5298 mode = GET_MODE_WIDER_MODE (mode))
5300 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5301 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5304 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5306 mode = GET_MODE_WIDER_MODE (mode))
5308 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5309 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5312 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5314 mode = GET_MODE_WIDER_MODE (mode))
5316 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5317 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5320 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5322 mode = GET_MODE_WIDER_MODE (mode))
5324 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5325 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5328 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5330 mode = GET_MODE_WIDER_MODE (mode))
5332 FCONST0(mode).data.high = 0;
5333 FCONST0(mode).data.low = 0;
5334 FCONST0(mode).mode = mode;
5335 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5336 FCONST0 (mode), mode);
5339 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5341 mode = GET_MODE_WIDER_MODE (mode))
5343 FCONST0(mode).data.high = 0;
5344 FCONST0(mode).data.low = 0;
5345 FCONST0(mode).mode = mode;
5346 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5347 FCONST0 (mode), mode);
5350 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5352 mode = GET_MODE_WIDER_MODE (mode))
5354 FCONST0(mode).data.high = 0;
5355 FCONST0(mode).data.low = 0;
5356 FCONST0(mode).mode = mode;
5357 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5358 FCONST0 (mode), mode);
5360 /* We store the value 1. */
5361 FCONST1(mode).data.high = 0;
5362 FCONST1(mode).data.low = 0;
5363 FCONST1(mode).mode = mode;
5364 lshift_double (1, 0, GET_MODE_FBIT (mode),
5365 2 * HOST_BITS_PER_WIDE_INT,
5366 &FCONST1(mode).data.low,
5367 &FCONST1(mode).data.high,
5368 SIGNED_FIXED_POINT_MODE_P (mode));
5369 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5370 FCONST1 (mode), mode);
5373 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5375 mode = GET_MODE_WIDER_MODE (mode))
5377 FCONST0(mode).data.high = 0;
5378 FCONST0(mode).data.low = 0;
5379 FCONST0(mode).mode = mode;
5380 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5381 FCONST0 (mode), mode);
5383 /* We store the value 1. */
5384 FCONST1(mode).data.high = 0;
5385 FCONST1(mode).data.low = 0;
5386 FCONST1(mode).mode = mode;
5387 lshift_double (1, 0, GET_MODE_FBIT (mode),
5388 2 * HOST_BITS_PER_WIDE_INT,
5389 &FCONST1(mode).data.low,
5390 &FCONST1(mode).data.high,
5391 SIGNED_FIXED_POINT_MODE_P (mode));
5392 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5393 FCONST1 (mode), mode);
5396 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5398 mode = GET_MODE_WIDER_MODE (mode))
5400 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5403 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5405 mode = GET_MODE_WIDER_MODE (mode))
5407 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5410 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5412 mode = GET_MODE_WIDER_MODE (mode))
5414 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5415 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5418 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5420 mode = GET_MODE_WIDER_MODE (mode))
5422 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5423 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5426 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5427 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5428 const_tiny_rtx[0][i] = const0_rtx;
5430 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5431 if (STORE_FLAG_VALUE == 1)
5432 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5435 /* Produce exact duplicate of insn INSN after AFTER.
5436 Care updating of libcall regions if present. */
5439 emit_copy_of_insn_after (rtx insn, rtx after)
5442 rtx note1, note2, link;
5444 switch (GET_CODE (insn))
5447 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5451 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5455 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5456 if (CALL_INSN_FUNCTION_USAGE (insn))
5457 CALL_INSN_FUNCTION_USAGE (new)
5458 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5459 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5460 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5467 /* Update LABEL_NUSES. */
5468 mark_jump_label (PATTERN (new), new, 0);
5470 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5472 /* If the old insn is frame related, then so is the new one. This is
5473 primarily needed for IA-64 unwind info which marks epilogue insns,
5474 which may be duplicated by the basic block reordering code. */
5475 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn);
5477 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5478 will make them. REG_LABEL_TARGETs are created there too, but are
5479 supposed to be sticky, so we copy them. */
5480 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5481 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5483 if (GET_CODE (link) == EXPR_LIST)
5485 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5486 copy_insn_1 (XEXP (link, 0)), REG_NOTES (new));
5489 = gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5490 XEXP (link, 0), REG_NOTES (new));
5493 /* Fix the libcall sequences. */
5494 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5497 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5499 XEXP (note1, 0) = p;
5500 XEXP (note2, 0) = new;
5502 INSN_CODE (new) = INSN_CODE (insn);
5506 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5508 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5510 if (hard_reg_clobbers[mode][regno])
5511 return hard_reg_clobbers[mode][regno];
5513 return (hard_reg_clobbers[mode][regno] =
5514 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5517 #include "gt-emit-rtl.h"