1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
35 #include "insn-config.h"
46 #include "rtlhooks-def.h"
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
76 Registers and "quantity numbers":
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `reg_qty' records what quantity a register is currently thought
87 All real quantity numbers are greater than or equal to zero.
88 If register N has not been assigned a quantity, reg_qty[N] will
89 equal -N - 1, which is always negative.
91 Quantity numbers below zero do not exist and none of the `qty_table'
92 entries should be referenced with a negative index.
94 We also maintain a bidirectional chain of registers for each
95 quantity number. The `qty_table` members `first_reg' and `last_reg',
96 and `reg_eqv_table' members `next' and `prev' hold these chains.
98 The first register in a chain is the one whose lifespan is least local.
99 Among equals, it is the one that was seen first.
100 We replace any equivalent register with that one.
102 If two registers have the same quantity number, it must be true that
103 REG expressions with qty_table `mode' must be in the hash table for both
104 registers and must be in the same class.
106 The converse is not true. Since hard registers may be referenced in
107 any mode, two REG expressions might be equivalent in the hash table
108 but not have the same quantity number if the quantity number of one
109 of the registers is not the same mode as those expressions.
111 Constants and quantity numbers
113 When a quantity has a known constant value, that value is stored
114 in the appropriate qty_table `const_rtx'. This is in addition to
115 putting the constant in the hash table as is usual for non-regs.
117 Whether a reg or a constant is preferred is determined by the configuration
118 macro CONST_COSTS and will often depend on the constant value. In any
119 event, expressions containing constants can be simplified, by fold_rtx.
121 When a quantity has a known nearly constant value (such as an address
122 of a stack slot), that value is stored in the appropriate qty_table
125 Integer constants don't have a machine mode. However, cse
126 determines the intended machine mode from the destination
127 of the instruction that moves the constant. The machine mode
128 is recorded in the hash table along with the actual RTL
129 constant expression so that different modes are kept separate.
133 To record known equivalences among expressions in general
134 we use a hash table called `table'. It has a fixed number of buckets
135 that contain chains of `struct table_elt' elements for expressions.
136 These chains connect the elements whose expressions have the same
139 Other chains through the same elements connect the elements which
140 currently have equivalent values.
142 Register references in an expression are canonicalized before hashing
143 the expression. This is done using `reg_qty' and qty_table `first_reg'.
144 The hash code of a register reference is computed using the quantity
145 number, not the register number.
147 When the value of an expression changes, it is necessary to remove from the
148 hash table not just that expression but all expressions whose values
149 could be different as a result.
151 1. If the value changing is in memory, except in special cases
152 ANYTHING referring to memory could be changed. That is because
153 nobody knows where a pointer does not point.
154 The function `invalidate_memory' removes what is necessary.
156 The special cases are when the address is constant or is
157 a constant plus a fixed register such as the frame pointer
158 or a static chain pointer. When such addresses are stored in,
159 we can tell exactly which other such addresses must be invalidated
160 due to overlap. `invalidate' does this.
161 All expressions that refer to non-constant
162 memory addresses are also invalidated. `invalidate_memory' does this.
164 2. If the value changing is a register, all expressions
165 containing references to that register, and only those,
168 Because searching the entire hash table for expressions that contain
169 a register is very slow, we try to figure out when it isn't necessary.
170 Precisely, this is necessary only when expressions have been
171 entered in the hash table using this register, and then the value has
172 changed, and then another expression wants to be added to refer to
173 the register's new value. This sequence of circumstances is rare
174 within any one basic block.
176 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
177 reg_tick[i] is incremented whenever a value is stored in register i.
178 reg_in_table[i] holds -1 if no references to register i have been
179 entered in the table; otherwise, it contains the value reg_tick[i] had
180 when the references were entered. If we want to enter a reference
181 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
182 Until we want to enter a new entry, the mere fact that the two vectors
183 don't match makes the entries be ignored if anyone tries to match them.
185 Registers themselves are entered in the hash table as well as in
186 the equivalent-register chains. However, the vectors `reg_tick'
187 and `reg_in_table' do not apply to expressions which are simple
188 register references. These expressions are removed from the table
189 immediately when they become invalid, and this can be done even if
190 we do not immediately search for all the expressions that refer to
193 A CLOBBER rtx in an instruction invalidates its operand for further
194 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
195 invalidates everything that resides in memory.
199 Constant expressions that differ only by an additive integer
200 are called related. When a constant expression is put in
201 the table, the related expression with no constant term
202 is also entered. These are made to point at each other
203 so that it is possible to find out if there exists any
204 register equivalent to an expression related to a given expression. */
206 /* One plus largest register number used in this function. */
210 /* One plus largest instruction UID used in this function at time of
213 static int max_insn_uid;
215 /* Length of qty_table vector. We know in advance we will not need
216 a quantity number this big. */
220 /* Next quantity number to be allocated.
221 This is 1 + the largest number needed so far. */
225 /* Per-qty information tracking.
227 `first_reg' and `last_reg' track the head and tail of the
228 chain of registers which currently contain this quantity.
230 `mode' contains the machine mode of this quantity.
232 `const_rtx' holds the rtx of the constant value of this
233 quantity, if known. A summations of the frame/arg pointer
234 and a constant can also be entered here. When this holds
235 a known value, `const_insn' is the insn which stored the
238 `comparison_{code,const,qty}' are used to track when a
239 comparison between a quantity and some constant or register has
240 been passed. In such a case, we know the results of the comparison
241 in case we see it again. These members record a comparison that
242 is known to be true. `comparison_code' holds the rtx code of such
243 a comparison, else it is set to UNKNOWN and the other two
244 comparison members are undefined. `comparison_const' holds
245 the constant being compared against, or zero if the comparison
246 is not against a constant. `comparison_qty' holds the quantity
247 being compared against when the result is known. If the comparison
248 is not with a register, `comparison_qty' is -1. */
250 struct qty_table_elem
254 rtx comparison_const;
256 unsigned int first_reg, last_reg;
257 /* The sizes of these fields should match the sizes of the
258 code and mode fields of struct rtx_def (see rtl.h). */
259 ENUM_BITFIELD(rtx_code) comparison_code : 16;
260 ENUM_BITFIELD(machine_mode) mode : 8;
263 /* The table of all qtys, indexed by qty number. */
264 static struct qty_table_elem *qty_table;
267 /* For machines that have a CC0, we do not record its value in the hash
268 table since its use is guaranteed to be the insn immediately following
269 its definition and any other insn is presumed to invalidate it.
271 Instead, we store below the value last assigned to CC0. If it should
272 happen to be a constant, it is stored in preference to the actual
273 assigned value. In case it is a constant, we store the mode in which
274 the constant should be interpreted. */
276 static rtx prev_insn_cc0;
277 static enum machine_mode prev_insn_cc0_mode;
279 /* Previous actual insn. 0 if at first insn of basic block. */
281 static rtx prev_insn;
284 /* Insn being scanned. */
286 static rtx this_insn;
288 /* Index by register number, gives the number of the next (or
289 previous) register in the chain of registers sharing the same
292 Or -1 if this register is at the end of the chain.
294 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
296 /* Per-register equivalence chain. */
302 /* The table of all register equivalence chains. */
303 static struct reg_eqv_elem *reg_eqv_table;
307 /* Next in hash chain. */
308 struct cse_reg_info *hash_next;
310 /* The next cse_reg_info structure in the free or used list. */
311 struct cse_reg_info *next;
316 /* The quantity number of the register's current contents. */
319 /* The number of times the register has been altered in the current
323 /* The REG_TICK value at which rtx's containing this register are
324 valid in the hash table. If this does not equal the current
325 reg_tick value, such expressions existing in the hash table are
329 /* The SUBREG that was set when REG_TICK was last incremented. Set
330 to -1 if the last store was to the whole register, not a subreg. */
331 unsigned int subreg_ticked;
334 /* A free list of cse_reg_info entries. */
335 static struct cse_reg_info *cse_reg_info_free_list;
337 /* A used list of cse_reg_info entries. */
338 static struct cse_reg_info *cse_reg_info_used_list;
339 static struct cse_reg_info *cse_reg_info_used_list_end;
341 /* A mapping from registers to cse_reg_info data structures. */
342 #define REGHASH_SHIFT 7
343 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
344 #define REGHASH_MASK (REGHASH_SIZE - 1)
345 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
347 #define REGHASH_FN(REGNO) \
348 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
350 /* The last lookup we did into the cse_reg_info_tree. This allows us
351 to cache repeated lookups. */
352 static unsigned int cached_regno;
353 static struct cse_reg_info *cached_cse_reg_info;
355 /* A HARD_REG_SET containing all the hard registers for which there is
356 currently a REG expression in the hash table. Note the difference
357 from the above variables, which indicate if the REG is mentioned in some
358 expression in the table. */
360 static HARD_REG_SET hard_regs_in_table;
362 /* CUID of insn that starts the basic block currently being cse-processed. */
364 static int cse_basic_block_start;
366 /* CUID of insn that ends the basic block currently being cse-processed. */
368 static int cse_basic_block_end;
370 /* Vector mapping INSN_UIDs to cuids.
371 The cuids are like uids but increase monotonically always.
372 We use them to see whether a reg is used outside a given basic block. */
374 static int *uid_cuid;
376 /* Highest UID in UID_CUID. */
379 /* Get the cuid of an insn. */
381 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
383 /* Nonzero if this pass has made changes, and therefore it's
384 worthwhile to run the garbage collector. */
386 static int cse_altered;
388 /* Nonzero if cse has altered conditional jump insns
389 in such a way that jump optimization should be redone. */
391 static int cse_jumps_altered;
393 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
394 REG_LABEL, we have to rerun jump after CSE to put in the note. */
395 static int recorded_label_ref;
397 /* canon_hash stores 1 in do_not_record
398 if it notices a reference to CC0, PC, or some other volatile
401 static int do_not_record;
403 /* canon_hash stores 1 in hash_arg_in_memory
404 if it notices a reference to memory within the expression being hashed. */
406 static int hash_arg_in_memory;
408 /* The hash table contains buckets which are chains of `struct table_elt's,
409 each recording one expression's information.
410 That expression is in the `exp' field.
412 The canon_exp field contains a canonical (from the point of view of
413 alias analysis) version of the `exp' field.
415 Those elements with the same hash code are chained in both directions
416 through the `next_same_hash' and `prev_same_hash' fields.
418 Each set of expressions with equivalent values
419 are on a two-way chain through the `next_same_value'
420 and `prev_same_value' fields, and all point with
421 the `first_same_value' field at the first element in
422 that chain. The chain is in order of increasing cost.
423 Each element's cost value is in its `cost' field.
425 The `in_memory' field is nonzero for elements that
426 involve any reference to memory. These elements are removed
427 whenever a write is done to an unidentified location in memory.
428 To be safe, we assume that a memory address is unidentified unless
429 the address is either a symbol constant or a constant plus
430 the frame pointer or argument pointer.
432 The `related_value' field is used to connect related expressions
433 (that differ by adding an integer).
434 The related expressions are chained in a circular fashion.
435 `related_value' is zero for expressions for which this
438 The `cost' field stores the cost of this element's expression.
439 The `regcost' field stores the value returned by approx_reg_cost for
440 this element's expression.
442 The `is_const' flag is set if the element is a constant (including
445 The `flag' field is used as a temporary during some search routines.
447 The `mode' field is usually the same as GET_MODE (`exp'), but
448 if `exp' is a CONST_INT and has no machine mode then the `mode'
449 field is the mode it was being used as. Each constant is
450 recorded separately for each mode it is used with. */
456 struct table_elt *next_same_hash;
457 struct table_elt *prev_same_hash;
458 struct table_elt *next_same_value;
459 struct table_elt *prev_same_value;
460 struct table_elt *first_same_value;
461 struct table_elt *related_value;
464 /* The size of this field should match the size
465 of the mode field of struct rtx_def (see rtl.h). */
466 ENUM_BITFIELD(machine_mode) mode : 8;
472 /* We don't want a lot of buckets, because we rarely have very many
473 things stored in the hash table, and a lot of buckets slows
474 down a lot of loops that happen frequently. */
476 #define HASH_SIZE (1 << HASH_SHIFT)
477 #define HASH_MASK (HASH_SIZE - 1)
479 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
480 register (hard registers may require `do_not_record' to be set). */
483 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
484 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
485 : canon_hash (X, M)) & HASH_MASK)
487 /* Like HASH, but without side-effects. */
488 #define SAFE_HASH(X, M) \
489 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
490 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
491 : safe_hash (X, M)) & HASH_MASK)
493 /* Determine whether register number N is considered a fixed register for the
494 purpose of approximating register costs.
495 It is desirable to replace other regs with fixed regs, to reduce need for
497 A reg wins if it is either the frame pointer or designated as fixed. */
498 #define FIXED_REGNO_P(N) \
499 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
500 || fixed_regs[N] || global_regs[N])
502 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
503 hard registers and pointers into the frame are the cheapest with a cost
504 of 0. Next come pseudos with a cost of one and other hard registers with
505 a cost of 2. Aside from these special cases, call `rtx_cost'. */
507 #define CHEAP_REGNO(N) \
508 (REGNO_PTR_FRAME_P(N) \
509 || (HARD_REGISTER_NUM_P (N) \
510 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
512 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
513 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
515 /* Get the info associated with register N. */
517 #define GET_CSE_REG_INFO(N) \
518 (((N) == cached_regno && cached_cse_reg_info) \
519 ? cached_cse_reg_info : get_cse_reg_info ((N)))
521 /* Get the number of times this register has been updated in this
524 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
526 /* Get the point at which REG was recorded in the table. */
528 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
530 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
533 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
535 /* Get the quantity number for REG. */
537 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
539 /* Determine if the quantity number for register X represents a valid index
540 into the qty_table. */
542 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
544 static struct table_elt *table[HASH_SIZE];
546 /* Chain of `struct table_elt's made so far for this function
547 but currently removed from the table. */
549 static struct table_elt *free_element_chain;
551 /* Number of `struct table_elt' structures made so far for this function. */
553 static int n_elements_made;
555 /* Maximum value `n_elements_made' has had so far in this compilation
556 for functions previously processed. */
558 static int max_elements_made;
560 /* Set to the cost of a constant pool reference if one was found for a
561 symbolic constant. If this was found, it means we should try to
562 convert constants into constant pool entries if they don't fit in
565 static int constant_pool_entries_cost;
566 static int constant_pool_entries_regcost;
568 /* This data describes a block that will be processed by cse_basic_block. */
570 struct cse_basic_block_data
572 /* Lowest CUID value of insns in block. */
574 /* Highest CUID value of insns in block. */
576 /* Total number of SETs in block. */
578 /* Last insn in the block. */
580 /* Size of current branch path, if any. */
582 /* Current branch path, indicating which branches will be taken. */
585 /* The branch insn. */
587 /* Whether it should be taken or not. AROUND is the same as taken
588 except that it is used when the destination label is not preceded
590 enum taken {PATH_TAKEN, PATH_NOT_TAKEN, PATH_AROUND} status;
594 static bool fixed_base_plus_p (rtx x);
595 static int notreg_cost (rtx, enum rtx_code);
596 static int approx_reg_cost_1 (rtx *, void *);
597 static int approx_reg_cost (rtx);
598 static int preferable (int, int, int, int);
599 static void new_basic_block (void);
600 static void make_new_qty (unsigned int, enum machine_mode);
601 static void make_regs_eqv (unsigned int, unsigned int);
602 static void delete_reg_equiv (unsigned int);
603 static int mention_regs (rtx);
604 static int insert_regs (rtx, struct table_elt *, int);
605 static void remove_from_table (struct table_elt *, unsigned);
606 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
607 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
608 static rtx lookup_as_function (rtx, enum rtx_code);
609 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
611 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
612 static void invalidate (rtx, enum machine_mode);
613 static int cse_rtx_varies_p (rtx, int);
614 static void remove_invalid_refs (unsigned int);
615 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
617 static void rehash_using_reg (rtx);
618 static void invalidate_memory (void);
619 static void invalidate_for_call (void);
620 static rtx use_related_value (rtx, struct table_elt *);
622 static inline unsigned canon_hash (rtx, enum machine_mode);
623 static inline unsigned safe_hash (rtx, enum machine_mode);
624 static unsigned hash_rtx_string (const char *);
626 static rtx canon_reg (rtx, rtx);
627 static void find_best_addr (rtx, rtx *, enum machine_mode);
628 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
630 enum machine_mode *);
631 static rtx fold_rtx (rtx, rtx);
632 static rtx equiv_constant (rtx);
633 static void record_jump_equiv (rtx, int);
634 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
636 static void cse_insn (rtx, rtx);
637 static void cse_end_of_basic_block (rtx, struct cse_basic_block_data *,
639 static int addr_affects_sp_p (rtx);
640 static void invalidate_from_clobbers (rtx);
641 static rtx cse_process_notes (rtx, rtx);
642 static void invalidate_skipped_set (rtx, rtx, void *);
643 static void invalidate_skipped_block (rtx);
644 static rtx cse_basic_block (rtx, rtx, struct branch_path *);
645 static void count_reg_usage (rtx, int *, int);
646 static int check_for_label_ref (rtx *, void *);
647 extern void dump_class (struct table_elt*);
648 static struct cse_reg_info * get_cse_reg_info (unsigned int);
649 static int check_dependence (rtx *, void *);
651 static void flush_hash_table (void);
652 static bool insn_live_p (rtx, int *);
653 static bool set_live_p (rtx, rtx, int *);
654 static bool dead_libcall_p (rtx, int *);
655 static int cse_change_cc_mode (rtx *, void *);
656 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
657 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
660 #undef RTL_HOOKS_GEN_LOWPART
661 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
663 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
665 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
666 virtual regs here because the simplify_*_operation routines are called
667 by integrate.c, which is called before virtual register instantiation. */
670 fixed_base_plus_p (rtx x)
672 switch (GET_CODE (x))
675 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
677 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
679 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
680 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
685 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
687 return fixed_base_plus_p (XEXP (x, 0));
694 /* Dump the expressions in the equivalence class indicated by CLASSP.
695 This function is used only for debugging. */
697 dump_class (struct table_elt *classp)
699 struct table_elt *elt;
701 fprintf (stderr, "Equivalence chain for ");
702 print_rtl (stderr, classp->exp);
703 fprintf (stderr, ": \n");
705 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
707 print_rtl (stderr, elt->exp);
708 fprintf (stderr, "\n");
712 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
715 approx_reg_cost_1 (rtx *xp, void *data)
722 unsigned int regno = REGNO (x);
724 if (! CHEAP_REGNO (regno))
726 if (regno < FIRST_PSEUDO_REGISTER)
728 if (SMALL_REGISTER_CLASSES)
740 /* Return an estimate of the cost of the registers used in an rtx.
741 This is mostly the number of different REG expressions in the rtx;
742 however for some exceptions like fixed registers we use a cost of
743 0. If any other hard register reference occurs, return MAX_COST. */
746 approx_reg_cost (rtx x)
750 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
756 /* Return a negative value if an rtx A, whose costs are given by COST_A
757 and REGCOST_A, is more desirable than an rtx B.
758 Return a positive value if A is less desirable, or 0 if the two are
761 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
763 /* First, get rid of cases involving expressions that are entirely
765 if (cost_a != cost_b)
767 if (cost_a == MAX_COST)
769 if (cost_b == MAX_COST)
773 /* Avoid extending lifetimes of hardregs. */
774 if (regcost_a != regcost_b)
776 if (regcost_a == MAX_COST)
778 if (regcost_b == MAX_COST)
782 /* Normal operation costs take precedence. */
783 if (cost_a != cost_b)
784 return cost_a - cost_b;
785 /* Only if these are identical consider effects on register pressure. */
786 if (regcost_a != regcost_b)
787 return regcost_a - regcost_b;
791 /* Internal function, to compute cost when X is not a register; called
792 from COST macro to keep it simple. */
795 notreg_cost (rtx x, enum rtx_code outer)
797 return ((GET_CODE (x) == SUBREG
798 && REG_P (SUBREG_REG (x))
799 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
800 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
801 && (GET_MODE_SIZE (GET_MODE (x))
802 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
803 && subreg_lowpart_p (x)
804 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
805 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
807 : rtx_cost (x, outer) * 2);
811 static struct cse_reg_info *
812 get_cse_reg_info (unsigned int regno)
814 struct cse_reg_info **hash_head = ®_hash[REGHASH_FN (regno)];
815 struct cse_reg_info *p;
817 for (p = *hash_head; p != NULL; p = p->hash_next)
818 if (p->regno == regno)
823 /* Get a new cse_reg_info structure. */
824 if (cse_reg_info_free_list)
826 p = cse_reg_info_free_list;
827 cse_reg_info_free_list = p->next;
830 p = xmalloc (sizeof (struct cse_reg_info));
832 /* Insert into hash table. */
833 p->hash_next = *hash_head;
838 p->reg_in_table = -1;
839 p->subreg_ticked = -1;
840 p->reg_qty = -regno - 1;
842 p->next = cse_reg_info_used_list;
843 cse_reg_info_used_list = p;
844 if (!cse_reg_info_used_list_end)
845 cse_reg_info_used_list_end = p;
848 /* Cache this lookup; we tend to be looking up information about the
849 same register several times in a row. */
850 cached_regno = regno;
851 cached_cse_reg_info = p;
856 /* Clear the hash table and initialize each register with its own quantity,
857 for a new basic block. */
860 new_basic_block (void)
866 /* Clear out hash table state for this pass. */
868 memset (reg_hash, 0, sizeof reg_hash);
870 if (cse_reg_info_used_list)
872 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
873 cse_reg_info_free_list = cse_reg_info_used_list;
874 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
876 cached_cse_reg_info = 0;
878 CLEAR_HARD_REG_SET (hard_regs_in_table);
880 /* The per-quantity values used to be initialized here, but it is
881 much faster to initialize each as it is made in `make_new_qty'. */
883 for (i = 0; i < HASH_SIZE; i++)
885 struct table_elt *first;
890 struct table_elt *last = first;
894 while (last->next_same_hash != NULL)
895 last = last->next_same_hash;
897 /* Now relink this hash entire chain into
898 the free element list. */
900 last->next_same_hash = free_element_chain;
901 free_element_chain = first;
911 /* Say that register REG contains a quantity in mode MODE not in any
912 register before and initialize that quantity. */
915 make_new_qty (unsigned int reg, enum machine_mode mode)
918 struct qty_table_elem *ent;
919 struct reg_eqv_elem *eqv;
921 gcc_assert (next_qty < max_qty);
923 q = REG_QTY (reg) = next_qty++;
925 ent->first_reg = reg;
928 ent->const_rtx = ent->const_insn = NULL_RTX;
929 ent->comparison_code = UNKNOWN;
931 eqv = ®_eqv_table[reg];
932 eqv->next = eqv->prev = -1;
935 /* Make reg NEW equivalent to reg OLD.
936 OLD is not changing; NEW is. */
939 make_regs_eqv (unsigned int new, unsigned int old)
941 unsigned int lastr, firstr;
942 int q = REG_QTY (old);
943 struct qty_table_elem *ent;
947 /* Nothing should become eqv until it has a "non-invalid" qty number. */
948 gcc_assert (REGNO_QTY_VALID_P (old));
951 firstr = ent->first_reg;
952 lastr = ent->last_reg;
954 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
955 hard regs. Among pseudos, if NEW will live longer than any other reg
956 of the same qty, and that is beyond the current basic block,
957 make it the new canonical replacement for this qty. */
958 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
959 /* Certain fixed registers might be of the class NO_REGS. This means
960 that not only can they not be allocated by the compiler, but
961 they cannot be used in substitutions or canonicalizations
963 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
964 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
965 || (new >= FIRST_PSEUDO_REGISTER
966 && (firstr < FIRST_PSEUDO_REGISTER
967 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
968 || (uid_cuid[REGNO_FIRST_UID (new)]
969 < cse_basic_block_start))
970 && (uid_cuid[REGNO_LAST_UID (new)]
971 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
973 reg_eqv_table[firstr].prev = new;
974 reg_eqv_table[new].next = firstr;
975 reg_eqv_table[new].prev = -1;
976 ent->first_reg = new;
980 /* If NEW is a hard reg (known to be non-fixed), insert at end.
981 Otherwise, insert before any non-fixed hard regs that are at the
982 end. Registers of class NO_REGS cannot be used as an
983 equivalent for anything. */
984 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
985 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
986 && new >= FIRST_PSEUDO_REGISTER)
987 lastr = reg_eqv_table[lastr].prev;
988 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
989 if (reg_eqv_table[lastr].next >= 0)
990 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
992 qty_table[q].last_reg = new;
993 reg_eqv_table[lastr].next = new;
994 reg_eqv_table[new].prev = lastr;
998 /* Remove REG from its equivalence class. */
1001 delete_reg_equiv (unsigned int reg)
1003 struct qty_table_elem *ent;
1004 int q = REG_QTY (reg);
1007 /* If invalid, do nothing. */
1008 if (! REGNO_QTY_VALID_P (reg))
1011 ent = &qty_table[q];
1013 p = reg_eqv_table[reg].prev;
1014 n = reg_eqv_table[reg].next;
1017 reg_eqv_table[n].prev = p;
1021 reg_eqv_table[p].next = n;
1025 REG_QTY (reg) = -reg - 1;
1028 /* Remove any invalid expressions from the hash table
1029 that refer to any of the registers contained in expression X.
1031 Make sure that newly inserted references to those registers
1032 as subexpressions will be considered valid.
1034 mention_regs is not called when a register itself
1035 is being stored in the table.
1037 Return 1 if we have done something that may have changed the hash code
1041 mention_regs (rtx x)
1051 code = GET_CODE (x);
1054 unsigned int regno = REGNO (x);
1055 unsigned int endregno
1056 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1057 : hard_regno_nregs[regno][GET_MODE (x)]);
1060 for (i = regno; i < endregno; i++)
1062 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1063 remove_invalid_refs (i);
1065 REG_IN_TABLE (i) = REG_TICK (i);
1066 SUBREG_TICKED (i) = -1;
1072 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1073 pseudo if they don't use overlapping words. We handle only pseudos
1074 here for simplicity. */
1075 if (code == SUBREG && REG_P (SUBREG_REG (x))
1076 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1078 unsigned int i = REGNO (SUBREG_REG (x));
1080 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1082 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1083 the last store to this register really stored into this
1084 subreg, then remove the memory of this subreg.
1085 Otherwise, remove any memory of the entire register and
1086 all its subregs from the table. */
1087 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1088 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1089 remove_invalid_refs (i);
1091 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1094 REG_IN_TABLE (i) = REG_TICK (i);
1095 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1099 /* If X is a comparison or a COMPARE and either operand is a register
1100 that does not have a quantity, give it one. This is so that a later
1101 call to record_jump_equiv won't cause X to be assigned a different
1102 hash code and not found in the table after that call.
1104 It is not necessary to do this here, since rehash_using_reg can
1105 fix up the table later, but doing this here eliminates the need to
1106 call that expensive function in the most common case where the only
1107 use of the register is in the comparison. */
1109 if (code == COMPARE || COMPARISON_P (x))
1111 if (REG_P (XEXP (x, 0))
1112 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1113 if (insert_regs (XEXP (x, 0), NULL, 0))
1115 rehash_using_reg (XEXP (x, 0));
1119 if (REG_P (XEXP (x, 1))
1120 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1121 if (insert_regs (XEXP (x, 1), NULL, 0))
1123 rehash_using_reg (XEXP (x, 1));
1128 fmt = GET_RTX_FORMAT (code);
1129 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1131 changed |= mention_regs (XEXP (x, i));
1132 else if (fmt[i] == 'E')
1133 for (j = 0; j < XVECLEN (x, i); j++)
1134 changed |= mention_regs (XVECEXP (x, i, j));
1139 /* Update the register quantities for inserting X into the hash table
1140 with a value equivalent to CLASSP.
1141 (If the class does not contain a REG, it is irrelevant.)
1142 If MODIFIED is nonzero, X is a destination; it is being modified.
1143 Note that delete_reg_equiv should be called on a register
1144 before insert_regs is done on that register with MODIFIED != 0.
1146 Nonzero value means that elements of reg_qty have changed
1147 so X's hash code may be different. */
1150 insert_regs (rtx x, struct table_elt *classp, int modified)
1154 unsigned int regno = REGNO (x);
1157 /* If REGNO is in the equivalence table already but is of the
1158 wrong mode for that equivalence, don't do anything here. */
1160 qty_valid = REGNO_QTY_VALID_P (regno);
1163 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1165 if (ent->mode != GET_MODE (x))
1169 if (modified || ! qty_valid)
1172 for (classp = classp->first_same_value;
1174 classp = classp->next_same_value)
1175 if (REG_P (classp->exp)
1176 && GET_MODE (classp->exp) == GET_MODE (x))
1178 make_regs_eqv (regno, REGNO (classp->exp));
1182 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1183 than REG_IN_TABLE to find out if there was only a single preceding
1184 invalidation - for the SUBREG - or another one, which would be
1185 for the full register. However, if we find here that REG_TICK
1186 indicates that the register is invalid, it means that it has
1187 been invalidated in a separate operation. The SUBREG might be used
1188 now (then this is a recursive call), or we might use the full REG
1189 now and a SUBREG of it later. So bump up REG_TICK so that
1190 mention_regs will do the right thing. */
1192 && REG_IN_TABLE (regno) >= 0
1193 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1195 make_new_qty (regno, GET_MODE (x));
1202 /* If X is a SUBREG, we will likely be inserting the inner register in the
1203 table. If that register doesn't have an assigned quantity number at
1204 this point but does later, the insertion that we will be doing now will
1205 not be accessible because its hash code will have changed. So assign
1206 a quantity number now. */
1208 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1209 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1211 insert_regs (SUBREG_REG (x), NULL, 0);
1216 return mention_regs (x);
1219 /* Look in or update the hash table. */
1221 /* Remove table element ELT from use in the table.
1222 HASH is its hash code, made using the HASH macro.
1223 It's an argument because often that is known in advance
1224 and we save much time not recomputing it. */
1227 remove_from_table (struct table_elt *elt, unsigned int hash)
1232 /* Mark this element as removed. See cse_insn. */
1233 elt->first_same_value = 0;
1235 /* Remove the table element from its equivalence class. */
1238 struct table_elt *prev = elt->prev_same_value;
1239 struct table_elt *next = elt->next_same_value;
1242 next->prev_same_value = prev;
1245 prev->next_same_value = next;
1248 struct table_elt *newfirst = next;
1251 next->first_same_value = newfirst;
1252 next = next->next_same_value;
1257 /* Remove the table element from its hash bucket. */
1260 struct table_elt *prev = elt->prev_same_hash;
1261 struct table_elt *next = elt->next_same_hash;
1264 next->prev_same_hash = prev;
1267 prev->next_same_hash = next;
1268 else if (table[hash] == elt)
1272 /* This entry is not in the proper hash bucket. This can happen
1273 when two classes were merged by `merge_equiv_classes'. Search
1274 for the hash bucket that it heads. This happens only very
1275 rarely, so the cost is acceptable. */
1276 for (hash = 0; hash < HASH_SIZE; hash++)
1277 if (table[hash] == elt)
1282 /* Remove the table element from its related-value circular chain. */
1284 if (elt->related_value != 0 && elt->related_value != elt)
1286 struct table_elt *p = elt->related_value;
1288 while (p->related_value != elt)
1289 p = p->related_value;
1290 p->related_value = elt->related_value;
1291 if (p->related_value == p)
1292 p->related_value = 0;
1295 /* Now add it to the free element chain. */
1296 elt->next_same_hash = free_element_chain;
1297 free_element_chain = elt;
1300 /* Look up X in the hash table and return its table element,
1301 or 0 if X is not in the table.
1303 MODE is the machine-mode of X, or if X is an integer constant
1304 with VOIDmode then MODE is the mode with which X will be used.
1306 Here we are satisfied to find an expression whose tree structure
1309 static struct table_elt *
1310 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1312 struct table_elt *p;
1314 for (p = table[hash]; p; p = p->next_same_hash)
1315 if (mode == p->mode && ((x == p->exp && REG_P (x))
1316 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1322 /* Like `lookup' but don't care whether the table element uses invalid regs.
1323 Also ignore discrepancies in the machine mode of a register. */
1325 static struct table_elt *
1326 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1328 struct table_elt *p;
1332 unsigned int regno = REGNO (x);
1334 /* Don't check the machine mode when comparing registers;
1335 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1336 for (p = table[hash]; p; p = p->next_same_hash)
1338 && REGNO (p->exp) == regno)
1343 for (p = table[hash]; p; p = p->next_same_hash)
1345 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1352 /* Look for an expression equivalent to X and with code CODE.
1353 If one is found, return that expression. */
1356 lookup_as_function (rtx x, enum rtx_code code)
1359 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1361 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1362 long as we are narrowing. So if we looked in vain for a mode narrower
1363 than word_mode before, look for word_mode now. */
1364 if (p == 0 && code == CONST_INT
1365 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1368 PUT_MODE (x, word_mode);
1369 p = lookup (x, SAFE_HASH (x, VOIDmode), word_mode);
1375 for (p = p->first_same_value; p; p = p->next_same_value)
1376 if (GET_CODE (p->exp) == code
1377 /* Make sure this is a valid entry in the table. */
1378 && exp_equiv_p (p->exp, p->exp, 1, false))
1384 /* Insert X in the hash table, assuming HASH is its hash code
1385 and CLASSP is an element of the class it should go in
1386 (or 0 if a new class should be made).
1387 It is inserted at the proper position to keep the class in
1388 the order cheapest first.
1390 MODE is the machine-mode of X, or if X is an integer constant
1391 with VOIDmode then MODE is the mode with which X will be used.
1393 For elements of equal cheapness, the most recent one
1394 goes in front, except that the first element in the list
1395 remains first unless a cheaper element is added. The order of
1396 pseudo-registers does not matter, as canon_reg will be called to
1397 find the cheapest when a register is retrieved from the table.
1399 The in_memory field in the hash table element is set to 0.
1400 The caller must set it nonzero if appropriate.
1402 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1403 and if insert_regs returns a nonzero value
1404 you must then recompute its hash code before calling here.
1406 If necessary, update table showing constant values of quantities. */
1408 #define CHEAPER(X, Y) \
1409 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1411 static struct table_elt *
1412 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1414 struct table_elt *elt;
1416 /* If X is a register and we haven't made a quantity for it,
1417 something is wrong. */
1418 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1420 /* If X is a hard register, show it is being put in the table. */
1421 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1423 unsigned int regno = REGNO (x);
1424 unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)];
1427 for (i = regno; i < endregno; i++)
1428 SET_HARD_REG_BIT (hard_regs_in_table, i);
1431 /* Put an element for X into the right hash bucket. */
1433 elt = free_element_chain;
1435 free_element_chain = elt->next_same_hash;
1439 elt = xmalloc (sizeof (struct table_elt));
1443 elt->canon_exp = NULL_RTX;
1444 elt->cost = COST (x);
1445 elt->regcost = approx_reg_cost (x);
1446 elt->next_same_value = 0;
1447 elt->prev_same_value = 0;
1448 elt->next_same_hash = table[hash];
1449 elt->prev_same_hash = 0;
1450 elt->related_value = 0;
1453 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1456 table[hash]->prev_same_hash = elt;
1459 /* Put it into the proper value-class. */
1462 classp = classp->first_same_value;
1463 if (CHEAPER (elt, classp))
1464 /* Insert at the head of the class. */
1466 struct table_elt *p;
1467 elt->next_same_value = classp;
1468 classp->prev_same_value = elt;
1469 elt->first_same_value = elt;
1471 for (p = classp; p; p = p->next_same_value)
1472 p->first_same_value = elt;
1476 /* Insert not at head of the class. */
1477 /* Put it after the last element cheaper than X. */
1478 struct table_elt *p, *next;
1480 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1483 /* Put it after P and before NEXT. */
1484 elt->next_same_value = next;
1486 next->prev_same_value = elt;
1488 elt->prev_same_value = p;
1489 p->next_same_value = elt;
1490 elt->first_same_value = classp;
1494 elt->first_same_value = elt;
1496 /* If this is a constant being set equivalent to a register or a register
1497 being set equivalent to a constant, note the constant equivalence.
1499 If this is a constant, it cannot be equivalent to a different constant,
1500 and a constant is the only thing that can be cheaper than a register. So
1501 we know the register is the head of the class (before the constant was
1504 If this is a register that is not already known equivalent to a
1505 constant, we must check the entire class.
1507 If this is a register that is already known equivalent to an insn,
1508 update the qtys `const_insn' to show that `this_insn' is the latest
1509 insn making that quantity equivalent to the constant. */
1511 if (elt->is_const && classp && REG_P (classp->exp)
1514 int exp_q = REG_QTY (REGNO (classp->exp));
1515 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1517 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1518 exp_ent->const_insn = this_insn;
1523 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1526 struct table_elt *p;
1528 for (p = classp; p != 0; p = p->next_same_value)
1530 if (p->is_const && !REG_P (p->exp))
1532 int x_q = REG_QTY (REGNO (x));
1533 struct qty_table_elem *x_ent = &qty_table[x_q];
1536 = gen_lowpart (GET_MODE (x), p->exp);
1537 x_ent->const_insn = this_insn;
1544 && qty_table[REG_QTY (REGNO (x))].const_rtx
1545 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1546 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1548 /* If this is a constant with symbolic value,
1549 and it has a term with an explicit integer value,
1550 link it up with related expressions. */
1551 if (GET_CODE (x) == CONST)
1553 rtx subexp = get_related_value (x);
1555 struct table_elt *subelt, *subelt_prev;
1559 /* Get the integer-free subexpression in the hash table. */
1560 subhash = SAFE_HASH (subexp, mode);
1561 subelt = lookup (subexp, subhash, mode);
1563 subelt = insert (subexp, NULL, subhash, mode);
1564 /* Initialize SUBELT's circular chain if it has none. */
1565 if (subelt->related_value == 0)
1566 subelt->related_value = subelt;
1567 /* Find the element in the circular chain that precedes SUBELT. */
1568 subelt_prev = subelt;
1569 while (subelt_prev->related_value != subelt)
1570 subelt_prev = subelt_prev->related_value;
1571 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1572 This way the element that follows SUBELT is the oldest one. */
1573 elt->related_value = subelt_prev->related_value;
1574 subelt_prev->related_value = elt;
1581 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1582 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1583 the two classes equivalent.
1585 CLASS1 will be the surviving class; CLASS2 should not be used after this
1588 Any invalid entries in CLASS2 will not be copied. */
1591 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1593 struct table_elt *elt, *next, *new;
1595 /* Ensure we start with the head of the classes. */
1596 class1 = class1->first_same_value;
1597 class2 = class2->first_same_value;
1599 /* If they were already equal, forget it. */
1600 if (class1 == class2)
1603 for (elt = class2; elt; elt = next)
1607 enum machine_mode mode = elt->mode;
1609 next = elt->next_same_value;
1611 /* Remove old entry, make a new one in CLASS1's class.
1612 Don't do this for invalid entries as we cannot find their
1613 hash code (it also isn't necessary). */
1614 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1616 bool need_rehash = false;
1618 hash_arg_in_memory = 0;
1619 hash = HASH (exp, mode);
1623 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1624 delete_reg_equiv (REGNO (exp));
1627 remove_from_table (elt, hash);
1629 if (insert_regs (exp, class1, 0) || need_rehash)
1631 rehash_using_reg (exp);
1632 hash = HASH (exp, mode);
1634 new = insert (exp, class1, hash, mode);
1635 new->in_memory = hash_arg_in_memory;
1640 /* Flush the entire hash table. */
1643 flush_hash_table (void)
1646 struct table_elt *p;
1648 for (i = 0; i < HASH_SIZE; i++)
1649 for (p = table[i]; p; p = table[i])
1651 /* Note that invalidate can remove elements
1652 after P in the current hash chain. */
1654 invalidate (p->exp, p->mode);
1656 remove_from_table (p, i);
1660 /* Function called for each rtx to check whether true dependence exist. */
1661 struct check_dependence_data
1663 enum machine_mode mode;
1669 check_dependence (rtx *x, void *data)
1671 struct check_dependence_data *d = (struct check_dependence_data *) data;
1672 if (*x && MEM_P (*x))
1673 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1679 /* Remove from the hash table, or mark as invalid, all expressions whose
1680 values could be altered by storing in X. X is a register, a subreg, or
1681 a memory reference with nonvarying address (because, when a memory
1682 reference with a varying address is stored in, all memory references are
1683 removed by invalidate_memory so specific invalidation is superfluous).
1684 FULL_MODE, if not VOIDmode, indicates that this much should be
1685 invalidated instead of just the amount indicated by the mode of X. This
1686 is only used for bitfield stores into memory.
1688 A nonvarying address may be just a register or just a symbol reference,
1689 or it may be either of those plus a numeric offset. */
1692 invalidate (rtx x, enum machine_mode full_mode)
1695 struct table_elt *p;
1698 switch (GET_CODE (x))
1702 /* If X is a register, dependencies on its contents are recorded
1703 through the qty number mechanism. Just change the qty number of
1704 the register, mark it as invalid for expressions that refer to it,
1705 and remove it itself. */
1706 unsigned int regno = REGNO (x);
1707 unsigned int hash = HASH (x, GET_MODE (x));
1709 /* Remove REGNO from any quantity list it might be on and indicate
1710 that its value might have changed. If it is a pseudo, remove its
1711 entry from the hash table.
1713 For a hard register, we do the first two actions above for any
1714 additional hard registers corresponding to X. Then, if any of these
1715 registers are in the table, we must remove any REG entries that
1716 overlap these registers. */
1718 delete_reg_equiv (regno);
1720 SUBREG_TICKED (regno) = -1;
1722 if (regno >= FIRST_PSEUDO_REGISTER)
1724 /* Because a register can be referenced in more than one mode,
1725 we might have to remove more than one table entry. */
1726 struct table_elt *elt;
1728 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1729 remove_from_table (elt, hash);
1733 HOST_WIDE_INT in_table
1734 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1735 unsigned int endregno
1736 = regno + hard_regno_nregs[regno][GET_MODE (x)];
1737 unsigned int tregno, tendregno, rn;
1738 struct table_elt *p, *next;
1740 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1742 for (rn = regno + 1; rn < endregno; rn++)
1744 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1745 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1746 delete_reg_equiv (rn);
1748 SUBREG_TICKED (rn) = -1;
1752 for (hash = 0; hash < HASH_SIZE; hash++)
1753 for (p = table[hash]; p; p = next)
1755 next = p->next_same_hash;
1758 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1761 tregno = REGNO (p->exp);
1763 = tregno + hard_regno_nregs[tregno][GET_MODE (p->exp)];
1764 if (tendregno > regno && tregno < endregno)
1765 remove_from_table (p, hash);
1772 invalidate (SUBREG_REG (x), VOIDmode);
1776 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1777 invalidate (XVECEXP (x, 0, i), VOIDmode);
1781 /* This is part of a disjoint return value; extract the location in
1782 question ignoring the offset. */
1783 invalidate (XEXP (x, 0), VOIDmode);
1787 addr = canon_rtx (get_addr (XEXP (x, 0)));
1788 /* Calculate the canonical version of X here so that
1789 true_dependence doesn't generate new RTL for X on each call. */
1792 /* Remove all hash table elements that refer to overlapping pieces of
1794 if (full_mode == VOIDmode)
1795 full_mode = GET_MODE (x);
1797 for (i = 0; i < HASH_SIZE; i++)
1799 struct table_elt *next;
1801 for (p = table[i]; p; p = next)
1803 next = p->next_same_hash;
1806 struct check_dependence_data d;
1808 /* Just canonicalize the expression once;
1809 otherwise each time we call invalidate
1810 true_dependence will canonicalize the
1811 expression again. */
1813 p->canon_exp = canon_rtx (p->exp);
1817 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1818 remove_from_table (p, i);
1829 /* Remove all expressions that refer to register REGNO,
1830 since they are already invalid, and we are about to
1831 mark that register valid again and don't want the old
1832 expressions to reappear as valid. */
1835 remove_invalid_refs (unsigned int regno)
1838 struct table_elt *p, *next;
1840 for (i = 0; i < HASH_SIZE; i++)
1841 for (p = table[i]; p; p = next)
1843 next = p->next_same_hash;
1845 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1846 remove_from_table (p, i);
1850 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1853 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1854 enum machine_mode mode)
1857 struct table_elt *p, *next;
1858 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1860 for (i = 0; i < HASH_SIZE; i++)
1861 for (p = table[i]; p; p = next)
1864 next = p->next_same_hash;
1867 && (GET_CODE (exp) != SUBREG
1868 || !REG_P (SUBREG_REG (exp))
1869 || REGNO (SUBREG_REG (exp)) != regno
1870 || (((SUBREG_BYTE (exp)
1871 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1872 && SUBREG_BYTE (exp) <= end))
1873 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1874 remove_from_table (p, i);
1878 /* Recompute the hash codes of any valid entries in the hash table that
1879 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1881 This is called when we make a jump equivalence. */
1884 rehash_using_reg (rtx x)
1887 struct table_elt *p, *next;
1890 if (GET_CODE (x) == SUBREG)
1893 /* If X is not a register or if the register is known not to be in any
1894 valid entries in the table, we have no work to do. */
1897 || REG_IN_TABLE (REGNO (x)) < 0
1898 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1901 /* Scan all hash chains looking for valid entries that mention X.
1902 If we find one and it is in the wrong hash chain, move it. */
1904 for (i = 0; i < HASH_SIZE; i++)
1905 for (p = table[i]; p; p = next)
1907 next = p->next_same_hash;
1908 if (reg_mentioned_p (x, p->exp)
1909 && exp_equiv_p (p->exp, p->exp, 1, false)
1910 && i != (hash = SAFE_HASH (p->exp, p->mode)))
1912 if (p->next_same_hash)
1913 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1915 if (p->prev_same_hash)
1916 p->prev_same_hash->next_same_hash = p->next_same_hash;
1918 table[i] = p->next_same_hash;
1920 p->next_same_hash = table[hash];
1921 p->prev_same_hash = 0;
1923 table[hash]->prev_same_hash = p;
1929 /* Remove from the hash table any expression that is a call-clobbered
1930 register. Also update their TICK values. */
1933 invalidate_for_call (void)
1935 unsigned int regno, endregno;
1938 struct table_elt *p, *next;
1941 /* Go through all the hard registers. For each that is clobbered in
1942 a CALL_INSN, remove the register from quantity chains and update
1943 reg_tick if defined. Also see if any of these registers is currently
1946 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1947 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1949 delete_reg_equiv (regno);
1950 if (REG_TICK (regno) >= 0)
1953 SUBREG_TICKED (regno) = -1;
1956 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1959 /* In the case where we have no call-clobbered hard registers in the
1960 table, we are done. Otherwise, scan the table and remove any
1961 entry that overlaps a call-clobbered register. */
1964 for (hash = 0; hash < HASH_SIZE; hash++)
1965 for (p = table[hash]; p; p = next)
1967 next = p->next_same_hash;
1970 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1973 regno = REGNO (p->exp);
1974 endregno = regno + hard_regno_nregs[regno][GET_MODE (p->exp)];
1976 for (i = regno; i < endregno; i++)
1977 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1979 remove_from_table (p, hash);
1985 /* Given an expression X of type CONST,
1986 and ELT which is its table entry (or 0 if it
1987 is not in the hash table),
1988 return an alternate expression for X as a register plus integer.
1989 If none can be found, return 0. */
1992 use_related_value (rtx x, struct table_elt *elt)
1994 struct table_elt *relt = 0;
1995 struct table_elt *p, *q;
1996 HOST_WIDE_INT offset;
1998 /* First, is there anything related known?
1999 If we have a table element, we can tell from that.
2000 Otherwise, must look it up. */
2002 if (elt != 0 && elt->related_value != 0)
2004 else if (elt == 0 && GET_CODE (x) == CONST)
2006 rtx subexp = get_related_value (x);
2008 relt = lookup (subexp,
2009 SAFE_HASH (subexp, GET_MODE (subexp)),
2016 /* Search all related table entries for one that has an
2017 equivalent register. */
2022 /* This loop is strange in that it is executed in two different cases.
2023 The first is when X is already in the table. Then it is searching
2024 the RELATED_VALUE list of X's class (RELT). The second case is when
2025 X is not in the table. Then RELT points to a class for the related
2028 Ensure that, whatever case we are in, that we ignore classes that have
2029 the same value as X. */
2031 if (rtx_equal_p (x, p->exp))
2034 for (q = p->first_same_value; q; q = q->next_same_value)
2041 p = p->related_value;
2043 /* We went all the way around, so there is nothing to be found.
2044 Alternatively, perhaps RELT was in the table for some other reason
2045 and it has no related values recorded. */
2046 if (p == relt || p == 0)
2053 offset = (get_integer_term (x) - get_integer_term (p->exp));
2054 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2055 return plus_constant (q->exp, offset);
2058 /* Hash a string. Just add its bytes up. */
2059 static inline unsigned
2060 hash_rtx_string (const char *ps)
2063 const unsigned char *p = (const unsigned char *) ps;
2072 /* Hash an rtx. We are careful to make sure the value is never negative.
2073 Equivalent registers hash identically.
2074 MODE is used in hashing for CONST_INTs only;
2075 otherwise the mode of X is used.
2077 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2079 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2080 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2082 Note that cse_insn knows that the hash code of a MEM expression
2083 is just (int) MEM plus the hash code of the address. */
2086 hash_rtx (rtx x, enum machine_mode mode, int *do_not_record_p,
2087 int *hash_arg_in_memory_p, bool have_reg_qty)
2094 /* Used to turn recursion into iteration. We can't rely on GCC's
2095 tail-recursion elimination since we need to keep accumulating values
2101 code = GET_CODE (x);
2106 unsigned int regno = REGNO (x);
2108 if (!reload_completed)
2110 /* On some machines, we can't record any non-fixed hard register,
2111 because extending its life will cause reload problems. We
2112 consider ap, fp, sp, gp to be fixed for this purpose.
2114 We also consider CCmode registers to be fixed for this purpose;
2115 failure to do so leads to failure to simplify 0<100 type of
2118 On all machines, we can't record any global registers.
2119 Nor should we record any register that is in a small
2120 class, as defined by CLASS_LIKELY_SPILLED_P. */
2123 if (regno >= FIRST_PSEUDO_REGISTER)
2125 else if (x == frame_pointer_rtx
2126 || x == hard_frame_pointer_rtx
2127 || x == arg_pointer_rtx
2128 || x == stack_pointer_rtx
2129 || x == pic_offset_table_rtx)
2131 else if (global_regs[regno])
2133 else if (fixed_regs[regno])
2135 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2137 else if (SMALL_REGISTER_CLASSES)
2139 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2146 *do_not_record_p = 1;
2151 hash += ((unsigned int) REG << 7);
2152 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2156 /* We handle SUBREG of a REG specially because the underlying
2157 reg changes its hash value with every value change; we don't
2158 want to have to forget unrelated subregs when one subreg changes. */
2161 if (REG_P (SUBREG_REG (x)))
2163 hash += (((unsigned int) SUBREG << 7)
2164 + REGNO (SUBREG_REG (x))
2165 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2172 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2173 + (unsigned int) INTVAL (x));
2177 /* This is like the general case, except that it only counts
2178 the integers representing the constant. */
2179 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2180 if (GET_MODE (x) != VOIDmode)
2181 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2183 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2184 + (unsigned int) CONST_DOUBLE_HIGH (x));
2192 units = CONST_VECTOR_NUNITS (x);
2194 for (i = 0; i < units; ++i)
2196 elt = CONST_VECTOR_ELT (x, i);
2197 hash += hash_rtx (elt, GET_MODE (elt), do_not_record_p,
2198 hash_arg_in_memory_p, have_reg_qty);
2204 /* Assume there is only one rtx object for any given label. */
2206 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2207 differences and differences between each stage's debugging dumps. */
2208 hash += (((unsigned int) LABEL_REF << 7)
2209 + CODE_LABEL_NUMBER (XEXP (x, 0)));
2214 /* Don't hash on the symbol's address to avoid bootstrap differences.
2215 Different hash values may cause expressions to be recorded in
2216 different orders and thus different registers to be used in the
2217 final assembler. This also avoids differences in the dump files
2218 between various stages. */
2220 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2223 h += (h << 7) + *p++; /* ??? revisit */
2225 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2230 /* We don't record if marked volatile or if BLKmode since we don't
2231 know the size of the move. */
2232 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2234 *do_not_record_p = 1;
2237 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2238 *hash_arg_in_memory_p = 1;
2240 /* Now that we have already found this special case,
2241 might as well speed it up as much as possible. */
2242 hash += (unsigned) MEM;
2247 /* A USE that mentions non-volatile memory needs special
2248 handling since the MEM may be BLKmode which normally
2249 prevents an entry from being made. Pure calls are
2250 marked by a USE which mentions BLKmode memory.
2251 See calls.c:emit_call_1. */
2252 if (MEM_P (XEXP (x, 0))
2253 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2255 hash += (unsigned) USE;
2258 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2259 *hash_arg_in_memory_p = 1;
2261 /* Now that we have already found this special case,
2262 might as well speed it up as much as possible. */
2263 hash += (unsigned) MEM;
2278 case UNSPEC_VOLATILE:
2279 *do_not_record_p = 1;
2283 if (MEM_VOLATILE_P (x))
2285 *do_not_record_p = 1;
2290 /* We don't want to take the filename and line into account. */
2291 hash += (unsigned) code + (unsigned) GET_MODE (x)
2292 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2293 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2294 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2296 if (ASM_OPERANDS_INPUT_LENGTH (x))
2298 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2300 hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i),
2301 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2302 do_not_record_p, hash_arg_in_memory_p,
2305 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2308 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2309 x = ASM_OPERANDS_INPUT (x, 0);
2310 mode = GET_MODE (x);
2322 i = GET_RTX_LENGTH (code) - 1;
2323 hash += (unsigned) code + (unsigned) GET_MODE (x);
2324 fmt = GET_RTX_FORMAT (code);
2330 /* If we are about to do the last recursive call
2331 needed at this level, change it into iteration.
2332 This function is called enough to be worth it. */
2339 hash += hash_rtx (XEXP (x, i), 0, do_not_record_p,
2340 hash_arg_in_memory_p, have_reg_qty);
2344 for (j = 0; j < XVECLEN (x, i); j++)
2345 hash += hash_rtx (XVECEXP (x, i, j), 0, do_not_record_p,
2346 hash_arg_in_memory_p, have_reg_qty);
2350 hash += hash_rtx_string (XSTR (x, i));
2354 hash += (unsigned int) XINT (x, i);
2369 /* Hash an rtx X for cse via hash_rtx.
2370 Stores 1 in do_not_record if any subexpression is volatile.
2371 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2372 does not have the RTX_UNCHANGING_P bit set. */
2374 static inline unsigned
2375 canon_hash (rtx x, enum machine_mode mode)
2377 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2380 /* Like canon_hash but with no side effects, i.e. do_not_record
2381 and hash_arg_in_memory are not changed. */
2383 static inline unsigned
2384 safe_hash (rtx x, enum machine_mode mode)
2386 int dummy_do_not_record;
2387 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2390 /* Return 1 iff X and Y would canonicalize into the same thing,
2391 without actually constructing the canonicalization of either one.
2392 If VALIDATE is nonzero,
2393 we assume X is an expression being processed from the rtl
2394 and Y was found in the hash table. We check register refs
2395 in Y for being marked as valid.
2397 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2400 exp_equiv_p (rtx x, rtx y, int validate, bool for_gcse)
2406 /* Note: it is incorrect to assume an expression is equivalent to itself
2407 if VALIDATE is nonzero. */
2408 if (x == y && !validate)
2411 if (x == 0 || y == 0)
2414 code = GET_CODE (x);
2415 if (code != GET_CODE (y))
2418 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2419 if (GET_MODE (x) != GET_MODE (y))
2430 return XEXP (x, 0) == XEXP (y, 0);
2433 return XSTR (x, 0) == XSTR (y, 0);
2437 return REGNO (x) == REGNO (y);
2440 unsigned int regno = REGNO (y);
2442 unsigned int endregno
2443 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2444 : hard_regno_nregs[regno][GET_MODE (y)]);
2446 /* If the quantities are not the same, the expressions are not
2447 equivalent. If there are and we are not to validate, they
2448 are equivalent. Otherwise, ensure all regs are up-to-date. */
2450 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2456 for (i = regno; i < endregno; i++)
2457 if (REG_IN_TABLE (i) != REG_TICK (i))
2466 /* Can't merge two expressions in different alias sets, since we
2467 can decide that the expression is transparent in a block when
2468 it isn't, due to it being set with the different alias set. */
2469 if (MEM_ALIAS_SET (x) != MEM_ALIAS_SET (y))
2472 /* A volatile mem should not be considered equivalent to any
2474 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2479 /* For commutative operations, check both orders. */
2487 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2489 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2490 validate, for_gcse))
2491 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2493 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2494 validate, for_gcse)));
2497 /* We don't use the generic code below because we want to
2498 disregard filename and line numbers. */
2500 /* A volatile asm isn't equivalent to any other. */
2501 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2504 if (GET_MODE (x) != GET_MODE (y)
2505 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2506 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2507 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2508 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2509 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2512 if (ASM_OPERANDS_INPUT_LENGTH (x))
2514 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2515 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2516 ASM_OPERANDS_INPUT (y, i),
2518 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2519 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2529 /* Compare the elements. If any pair of corresponding elements
2530 fail to match, return 0 for the whole thing. */
2532 fmt = GET_RTX_FORMAT (code);
2533 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2538 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2539 validate, for_gcse))
2544 if (XVECLEN (x, i) != XVECLEN (y, i))
2546 for (j = 0; j < XVECLEN (x, i); j++)
2547 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2548 validate, for_gcse))
2553 if (strcmp (XSTR (x, i), XSTR (y, i)))
2558 if (XINT (x, i) != XINT (y, i))
2563 if (XWINT (x, i) != XWINT (y, i))
2579 /* Return 1 if X has a value that can vary even between two
2580 executions of the program. 0 means X can be compared reliably
2581 against certain constants or near-constants. */
2584 cse_rtx_varies_p (rtx x, int from_alias)
2586 /* We need not check for X and the equivalence class being of the same
2587 mode because if X is equivalent to a constant in some mode, it
2588 doesn't vary in any mode. */
2591 && REGNO_QTY_VALID_P (REGNO (x)))
2593 int x_q = REG_QTY (REGNO (x));
2594 struct qty_table_elem *x_ent = &qty_table[x_q];
2596 if (GET_MODE (x) == x_ent->mode
2597 && x_ent->const_rtx != NULL_RTX)
2601 if (GET_CODE (x) == PLUS
2602 && GET_CODE (XEXP (x, 1)) == CONST_INT
2603 && REG_P (XEXP (x, 0))
2604 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2606 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2607 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2609 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2610 && x0_ent->const_rtx != NULL_RTX)
2614 /* This can happen as the result of virtual register instantiation, if
2615 the initial constant is too large to be a valid address. This gives
2616 us a three instruction sequence, load large offset into a register,
2617 load fp minus a constant into a register, then a MEM which is the
2618 sum of the two `constant' registers. */
2619 if (GET_CODE (x) == PLUS
2620 && REG_P (XEXP (x, 0))
2621 && REG_P (XEXP (x, 1))
2622 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2623 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2625 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2626 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2627 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2628 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2630 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2631 && x0_ent->const_rtx != NULL_RTX
2632 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2633 && x1_ent->const_rtx != NULL_RTX)
2637 return rtx_varies_p (x, from_alias);
2640 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2641 the result if necessary. INSN is as for canon_reg. */
2644 validate_canon_reg (rtx *xloc, rtx insn)
2646 rtx new = canon_reg (*xloc, insn);
2649 /* If replacing pseudo with hard reg or vice versa, ensure the
2650 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2651 if (insn != 0 && new != 0
2652 && REG_P (new) && REG_P (*xloc)
2653 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2654 != (REGNO (*xloc) < FIRST_PSEUDO_REGISTER))
2655 || GET_MODE (new) != GET_MODE (*xloc)
2656 || (insn_code = recog_memoized (insn)) < 0
2657 || insn_data[insn_code].n_dups > 0))
2658 validate_change (insn, xloc, new, 1);
2663 /* Canonicalize an expression:
2664 replace each register reference inside it
2665 with the "oldest" equivalent register.
2667 If INSN is nonzero and we are replacing a pseudo with a hard register
2668 or vice versa, validate_change is used to ensure that INSN remains valid
2669 after we make our substitution. The calls are made with IN_GROUP nonzero
2670 so apply_change_group must be called upon the outermost return from this
2671 function (unless INSN is zero). The result of apply_change_group can
2672 generally be discarded since the changes we are making are optional. */
2675 canon_reg (rtx x, rtx insn)
2684 code = GET_CODE (x);
2703 struct qty_table_elem *ent;
2705 /* Never replace a hard reg, because hard regs can appear
2706 in more than one machine mode, and we must preserve the mode
2707 of each occurrence. Also, some hard regs appear in
2708 MEMs that are shared and mustn't be altered. Don't try to
2709 replace any reg that maps to a reg of class NO_REGS. */
2710 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2711 || ! REGNO_QTY_VALID_P (REGNO (x)))
2714 q = REG_QTY (REGNO (x));
2715 ent = &qty_table[q];
2716 first = ent->first_reg;
2717 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2718 : REGNO_REG_CLASS (first) == NO_REGS ? x
2719 : gen_rtx_REG (ent->mode, first));
2726 fmt = GET_RTX_FORMAT (code);
2727 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2732 validate_canon_reg (&XEXP (x, i), insn);
2733 else if (fmt[i] == 'E')
2734 for (j = 0; j < XVECLEN (x, i); j++)
2735 validate_canon_reg (&XVECEXP (x, i, j), insn);
2741 /* LOC is a location within INSN that is an operand address (the contents of
2742 a MEM). Find the best equivalent address to use that is valid for this
2745 On most CISC machines, complicated address modes are costly, and rtx_cost
2746 is a good approximation for that cost. However, most RISC machines have
2747 only a few (usually only one) memory reference formats. If an address is
2748 valid at all, it is often just as cheap as any other address. Hence, for
2749 RISC machines, we use `address_cost' to compare the costs of various
2750 addresses. For two addresses of equal cost, choose the one with the
2751 highest `rtx_cost' value as that has the potential of eliminating the
2752 most insns. For equal costs, we choose the first in the equivalence
2753 class. Note that we ignore the fact that pseudo registers are cheaper than
2754 hard registers here because we would also prefer the pseudo registers. */
2757 find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
2759 struct table_elt *elt;
2761 struct table_elt *p;
2762 int found_better = 1;
2763 int save_do_not_record = do_not_record;
2764 int save_hash_arg_in_memory = hash_arg_in_memory;
2769 /* Do not try to replace constant addresses or addresses of local and
2770 argument slots. These MEM expressions are made only once and inserted
2771 in many instructions, as well as being used to control symbol table
2772 output. It is not safe to clobber them.
2774 There are some uncommon cases where the address is already in a register
2775 for some reason, but we cannot take advantage of that because we have
2776 no easy way to unshare the MEM. In addition, looking up all stack
2777 addresses is costly. */
2778 if ((GET_CODE (addr) == PLUS
2779 && REG_P (XEXP (addr, 0))
2780 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2781 && (regno = REGNO (XEXP (addr, 0)),
2782 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2783 || regno == ARG_POINTER_REGNUM))
2785 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2786 || regno == HARD_FRAME_POINTER_REGNUM
2787 || regno == ARG_POINTER_REGNUM))
2788 || CONSTANT_ADDRESS_P (addr))
2791 /* If this address is not simply a register, try to fold it. This will
2792 sometimes simplify the expression. Many simplifications
2793 will not be valid, but some, usually applying the associative rule, will
2794 be valid and produce better code. */
2797 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2798 int addr_folded_cost = address_cost (folded, mode);
2799 int addr_cost = address_cost (addr, mode);
2801 if ((addr_folded_cost < addr_cost
2802 || (addr_folded_cost == addr_cost
2803 /* ??? The rtx_cost comparison is left over from an older
2804 version of this code. It is probably no longer helpful. */
2805 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2806 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2807 && validate_change (insn, loc, folded, 0))
2811 /* If this address is not in the hash table, we can't look for equivalences
2812 of the whole address. Also, ignore if volatile. */
2815 hash = HASH (addr, Pmode);
2816 addr_volatile = do_not_record;
2817 do_not_record = save_do_not_record;
2818 hash_arg_in_memory = save_hash_arg_in_memory;
2823 elt = lookup (addr, hash, Pmode);
2827 /* We need to find the best (under the criteria documented above) entry
2828 in the class that is valid. We use the `flag' field to indicate
2829 choices that were invalid and iterate until we can't find a better
2830 one that hasn't already been tried. */
2832 for (p = elt->first_same_value; p; p = p->next_same_value)
2835 while (found_better)
2837 int best_addr_cost = address_cost (*loc, mode);
2838 int best_rtx_cost = (elt->cost + 1) >> 1;
2840 struct table_elt *best_elt = elt;
2843 for (p = elt->first_same_value; p; p = p->next_same_value)
2847 || exp_equiv_p (p->exp, p->exp, 1, false))
2848 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2849 || (exp_cost == best_addr_cost
2850 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2853 best_addr_cost = exp_cost;
2854 best_rtx_cost = (p->cost + 1) >> 1;
2861 if (validate_change (insn, loc,
2862 canon_reg (copy_rtx (best_elt->exp),
2871 /* If the address is a binary operation with the first operand a register
2872 and the second a constant, do the same as above, but looking for
2873 equivalences of the register. Then try to simplify before checking for
2874 the best address to use. This catches a few cases: First is when we
2875 have REG+const and the register is another REG+const. We can often merge
2876 the constants and eliminate one insn and one register. It may also be
2877 that a machine has a cheap REG+REG+const. Finally, this improves the
2878 code on the Alpha for unaligned byte stores. */
2880 if (flag_expensive_optimizations
2881 && ARITHMETIC_P (*loc)
2882 && REG_P (XEXP (*loc, 0)))
2884 rtx op1 = XEXP (*loc, 1);
2887 hash = HASH (XEXP (*loc, 0), Pmode);
2888 do_not_record = save_do_not_record;
2889 hash_arg_in_memory = save_hash_arg_in_memory;
2891 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2895 /* We need to find the best (under the criteria documented above) entry
2896 in the class that is valid. We use the `flag' field to indicate
2897 choices that were invalid and iterate until we can't find a better
2898 one that hasn't already been tried. */
2900 for (p = elt->first_same_value; p; p = p->next_same_value)
2903 while (found_better)
2905 int best_addr_cost = address_cost (*loc, mode);
2906 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2907 struct table_elt *best_elt = elt;
2908 rtx best_rtx = *loc;
2911 /* This is at worst case an O(n^2) algorithm, so limit our search
2912 to the first 32 elements on the list. This avoids trouble
2913 compiling code with very long basic blocks that can easily
2914 call simplify_gen_binary so many times that we run out of
2918 for (p = elt->first_same_value, count = 0;
2920 p = p->next_same_value, count++)
2923 || exp_equiv_p (p->exp, p->exp, 1, false)))
2925 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2928 new_cost = address_cost (new, mode);
2930 if (new_cost < best_addr_cost
2931 || (new_cost == best_addr_cost
2932 && (COST (new) + 1) >> 1 > best_rtx_cost))
2935 best_addr_cost = new_cost;
2936 best_rtx_cost = (COST (new) + 1) >> 1;
2944 if (validate_change (insn, loc,
2945 canon_reg (copy_rtx (best_rtx),
2955 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2956 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2957 what values are being compared.
2959 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2960 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2961 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2962 compared to produce cc0.
2964 The return value is the comparison operator and is either the code of
2965 A or the code corresponding to the inverse of the comparison. */
2967 static enum rtx_code
2968 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2969 enum machine_mode *pmode1, enum machine_mode *pmode2)
2973 arg1 = *parg1, arg2 = *parg2;
2975 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2977 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2979 /* Set nonzero when we find something of interest. */
2981 int reverse_code = 0;
2982 struct table_elt *p = 0;
2984 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2985 On machines with CC0, this is the only case that can occur, since
2986 fold_rtx will return the COMPARE or item being compared with zero
2989 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2992 /* If ARG1 is a comparison operator and CODE is testing for
2993 STORE_FLAG_VALUE, get the inner arguments. */
2995 else if (COMPARISON_P (arg1))
2997 #ifdef FLOAT_STORE_FLAG_VALUE
2998 REAL_VALUE_TYPE fsfv;
3002 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3003 && code == LT && STORE_FLAG_VALUE == -1)
3004 #ifdef FLOAT_STORE_FLAG_VALUE
3005 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3006 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3007 REAL_VALUE_NEGATIVE (fsfv)))
3012 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3013 && code == GE && STORE_FLAG_VALUE == -1)
3014 #ifdef FLOAT_STORE_FLAG_VALUE
3015 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3016 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3017 REAL_VALUE_NEGATIVE (fsfv)))
3020 x = arg1, reverse_code = 1;
3023 /* ??? We could also check for
3025 (ne (and (eq (...) (const_int 1))) (const_int 0))
3027 and related forms, but let's wait until we see them occurring. */
3030 /* Look up ARG1 in the hash table and see if it has an equivalence
3031 that lets us see what is being compared. */
3032 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
3035 p = p->first_same_value;
3037 /* If what we compare is already known to be constant, that is as
3039 We need to break the loop in this case, because otherwise we
3040 can have an infinite loop when looking at a reg that is known
3041 to be a constant which is the same as a comparison of a reg
3042 against zero which appears later in the insn stream, which in
3043 turn is constant and the same as the comparison of the first reg
3049 for (; p; p = p->next_same_value)
3051 enum machine_mode inner_mode = GET_MODE (p->exp);
3052 #ifdef FLOAT_STORE_FLAG_VALUE
3053 REAL_VALUE_TYPE fsfv;
3056 /* If the entry isn't valid, skip it. */
3057 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3060 if (GET_CODE (p->exp) == COMPARE
3061 /* Another possibility is that this machine has a compare insn
3062 that includes the comparison code. In that case, ARG1 would
3063 be equivalent to a comparison operation that would set ARG1 to
3064 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3065 ORIG_CODE is the actual comparison being done; if it is an EQ,
3066 we must reverse ORIG_CODE. On machine with a negative value
3067 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3070 && GET_MODE_CLASS (inner_mode) == MODE_INT
3071 && (GET_MODE_BITSIZE (inner_mode)
3072 <= HOST_BITS_PER_WIDE_INT)
3073 && (STORE_FLAG_VALUE
3074 & ((HOST_WIDE_INT) 1
3075 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3076 #ifdef FLOAT_STORE_FLAG_VALUE
3078 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3079 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3080 REAL_VALUE_NEGATIVE (fsfv)))
3083 && COMPARISON_P (p->exp)))
3088 else if ((code == EQ
3090 && GET_MODE_CLASS (inner_mode) == MODE_INT
3091 && (GET_MODE_BITSIZE (inner_mode)
3092 <= HOST_BITS_PER_WIDE_INT)
3093 && (STORE_FLAG_VALUE
3094 & ((HOST_WIDE_INT) 1
3095 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3096 #ifdef FLOAT_STORE_FLAG_VALUE
3098 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3099 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3100 REAL_VALUE_NEGATIVE (fsfv)))
3103 && COMPARISON_P (p->exp))
3110 /* If this non-trapping address, e.g. fp + constant, the
3111 equivalent is a better operand since it may let us predict
3112 the value of the comparison. */
3113 else if (!rtx_addr_can_trap_p (p->exp))
3120 /* If we didn't find a useful equivalence for ARG1, we are done.
3121 Otherwise, set up for the next iteration. */
3125 /* If we need to reverse the comparison, make sure that that is
3126 possible -- we can't necessarily infer the value of GE from LT
3127 with floating-point operands. */
3130 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3131 if (reversed == UNKNOWN)
3136 else if (COMPARISON_P (x))
3137 code = GET_CODE (x);
3138 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3141 /* Return our results. Return the modes from before fold_rtx
3142 because fold_rtx might produce const_int, and then it's too late. */
3143 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3144 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3149 /* If X is a nontrivial arithmetic operation on an argument
3150 for which a constant value can be determined, return
3151 the result of operating on that value, as a constant.
3152 Otherwise, return X, possibly with one or more operands
3153 modified by recursive calls to this function.
3155 If X is a register whose contents are known, we do NOT
3156 return those contents here. equiv_constant is called to
3159 INSN is the insn that we may be modifying. If it is 0, make a copy
3160 of X before modifying it. */
3163 fold_rtx (rtx x, rtx insn)
3166 enum machine_mode mode;
3173 /* Folded equivalents of first two operands of X. */
3177 /* Constant equivalents of first three operands of X;
3178 0 when no such equivalent is known. */
3183 /* The mode of the first operand of X. We need this for sign and zero
3185 enum machine_mode mode_arg0;
3190 mode = GET_MODE (x);
3191 code = GET_CODE (x);
3201 /* No use simplifying an EXPR_LIST
3202 since they are used only for lists of args
3203 in a function call's REG_EQUAL note. */
3209 return prev_insn_cc0;
3213 /* If the next insn is a CODE_LABEL followed by a jump table,
3214 PC's value is a LABEL_REF pointing to that label. That
3215 lets us fold switch statements on the VAX. */
3218 if (insn && tablejump_p (insn, &next, NULL))
3219 return gen_rtx_LABEL_REF (Pmode, next);
3224 /* See if we previously assigned a constant value to this SUBREG. */
3225 if ((new = lookup_as_function (x, CONST_INT)) != 0
3226 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3229 /* If this is a paradoxical SUBREG, we have no idea what value the
3230 extra bits would have. However, if the operand is equivalent
3231 to a SUBREG whose operand is the same as our mode, and all the
3232 modes are within a word, we can just use the inner operand
3233 because these SUBREGs just say how to treat the register.
3235 Similarly if we find an integer constant. */
3237 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3239 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3240 struct table_elt *elt;
3242 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3243 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3244 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3246 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3248 if (CONSTANT_P (elt->exp)
3249 && GET_MODE (elt->exp) == VOIDmode)
3252 if (GET_CODE (elt->exp) == SUBREG
3253 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3254 && exp_equiv_p (elt->exp, elt->exp, 1, false))
3255 return copy_rtx (SUBREG_REG (elt->exp));
3261 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3262 We might be able to if the SUBREG is extracting a single word in an
3263 integral mode or extracting the low part. */
3265 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3266 const_arg0 = equiv_constant (folded_arg0);
3268 folded_arg0 = const_arg0;
3270 if (folded_arg0 != SUBREG_REG (x))
3272 new = simplify_subreg (mode, folded_arg0,
3273 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3278 if (REG_P (folded_arg0)
3279 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)))
3281 struct table_elt *elt;
3283 elt = lookup (folded_arg0,
3284 HASH (folded_arg0, GET_MODE (folded_arg0)),
3285 GET_MODE (folded_arg0));
3288 elt = elt->first_same_value;
3290 if (subreg_lowpart_p (x))
3291 /* If this is a narrowing SUBREG and our operand is a REG, see
3292 if we can find an equivalence for REG that is an arithmetic
3293 operation in a wider mode where both operands are paradoxical
3294 SUBREGs from objects of our result mode. In that case, we
3295 couldn-t report an equivalent value for that operation, since we
3296 don't know what the extra bits will be. But we can find an
3297 equivalence for this SUBREG by folding that operation in the
3298 narrow mode. This allows us to fold arithmetic in narrow modes
3299 when the machine only supports word-sized arithmetic.
3301 Also look for a case where we have a SUBREG whose operand
3302 is the same as our result. If both modes are smaller
3303 than a word, we are simply interpreting a register in
3304 different modes and we can use the inner value. */
3306 for (; elt; elt = elt->next_same_value)
3308 enum rtx_code eltcode = GET_CODE (elt->exp);
3310 /* Just check for unary and binary operations. */
3311 if (UNARY_P (elt->exp)
3312 && eltcode != SIGN_EXTEND
3313 && eltcode != ZERO_EXTEND
3314 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3315 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3316 && (GET_MODE_CLASS (mode)
3317 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3319 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3321 if (!REG_P (op0) && ! CONSTANT_P (op0))
3322 op0 = fold_rtx (op0, NULL_RTX);
3324 op0 = equiv_constant (op0);
3326 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3329 else if (ARITHMETIC_P (elt->exp)
3330 && eltcode != DIV && eltcode != MOD
3331 && eltcode != UDIV && eltcode != UMOD
3332 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3333 && eltcode != ROTATE && eltcode != ROTATERT
3334 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3335 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3337 || CONSTANT_P (XEXP (elt->exp, 0)))
3338 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3339 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3341 || CONSTANT_P (XEXP (elt->exp, 1))))
3343 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3344 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3346 if (op0 && !REG_P (op0) && ! CONSTANT_P (op0))
3347 op0 = fold_rtx (op0, NULL_RTX);
3350 op0 = equiv_constant (op0);
3352 if (op1 && !REG_P (op1) && ! CONSTANT_P (op1))
3353 op1 = fold_rtx (op1, NULL_RTX);
3356 op1 = equiv_constant (op1);
3358 /* If we are looking for the low SImode part of
3359 (ashift:DI c (const_int 32)), it doesn't work
3360 to compute that in SImode, because a 32-bit shift
3361 in SImode is unpredictable. We know the value is 0. */
3363 && GET_CODE (elt->exp) == ASHIFT
3364 && GET_CODE (op1) == CONST_INT
3365 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3368 < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3369 /* If the count fits in the inner mode's width,
3370 but exceeds the outer mode's width,
3371 the value will get truncated to 0
3373 new = CONST0_RTX (mode);
3375 /* If the count exceeds even the inner mode's width,
3376 don't fold this expression. */
3379 else if (op0 && op1)
3380 new = simplify_binary_operation (GET_CODE (elt->exp), mode, op0, op1);
3383 else if (GET_CODE (elt->exp) == SUBREG
3384 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3385 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3387 && exp_equiv_p (elt->exp, elt->exp, 1, false))
3388 new = copy_rtx (SUBREG_REG (elt->exp));
3394 /* A SUBREG resulting from a zero extension may fold to zero if
3395 it extracts higher bits than the ZERO_EXTEND's source bits.
3396 FIXME: if combine tried to, er, combine these instructions,
3397 this transformation may be moved to simplify_subreg. */
3398 for (; elt; elt = elt->next_same_value)
3400 if (GET_CODE (elt->exp) == ZERO_EXTEND
3402 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt->exp, 0))))
3403 return CONST0_RTX (mode);
3411 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3412 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3413 new = lookup_as_function (XEXP (x, 0), code);
3415 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3419 /* If we are not actually processing an insn, don't try to find the
3420 best address. Not only don't we care, but we could modify the
3421 MEM in an invalid way since we have no insn to validate against. */
3423 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3426 /* Even if we don't fold in the insn itself,
3427 we can safely do so here, in hopes of getting a constant. */
3428 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3430 HOST_WIDE_INT offset = 0;
3433 && REGNO_QTY_VALID_P (REGNO (addr)))
3435 int addr_q = REG_QTY (REGNO (addr));
3436 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3438 if (GET_MODE (addr) == addr_ent->mode
3439 && addr_ent->const_rtx != NULL_RTX)
3440 addr = addr_ent->const_rtx;
3443 /* If address is constant, split it into a base and integer offset. */
3444 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3446 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3447 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3449 base = XEXP (XEXP (addr, 0), 0);
3450 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3452 else if (GET_CODE (addr) == LO_SUM
3453 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3454 base = XEXP (addr, 1);
3456 /* If this is a constant pool reference, we can fold it into its
3457 constant to allow better value tracking. */
3458 if (base && GET_CODE (base) == SYMBOL_REF
3459 && CONSTANT_POOL_ADDRESS_P (base))
3461 rtx constant = get_pool_constant (base);
3462 enum machine_mode const_mode = get_pool_mode (base);
3465 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3467 constant_pool_entries_cost = COST (constant);
3468 constant_pool_entries_regcost = approx_reg_cost (constant);
3471 /* If we are loading the full constant, we have an equivalence. */
3472 if (offset == 0 && mode == const_mode)
3475 /* If this actually isn't a constant (weird!), we can't do
3476 anything. Otherwise, handle the two most common cases:
3477 extracting a word from a multi-word constant, and extracting
3478 the low-order bits. Other cases don't seem common enough to
3480 if (! CONSTANT_P (constant))
3483 if (GET_MODE_CLASS (mode) == MODE_INT
3484 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3485 && offset % UNITS_PER_WORD == 0
3486 && (new = operand_subword (constant,
3487 offset / UNITS_PER_WORD,
3488 0, const_mode)) != 0)
3491 if (((BYTES_BIG_ENDIAN
3492 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3493 || (! BYTES_BIG_ENDIAN && offset == 0))
3494 && (new = gen_lowpart (mode, constant)) != 0)
3498 /* If this is a reference to a label at a known position in a jump
3499 table, we also know its value. */
3500 if (base && GET_CODE (base) == LABEL_REF)
3502 rtx label = XEXP (base, 0);
3503 rtx table_insn = NEXT_INSN (label);
3505 if (table_insn && JUMP_P (table_insn)
3506 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3508 rtx table = PATTERN (table_insn);
3511 && (offset / GET_MODE_SIZE (GET_MODE (table))
3512 < XVECLEN (table, 0)))
3513 return XVECEXP (table, 0,
3514 offset / GET_MODE_SIZE (GET_MODE (table)));
3516 if (table_insn && JUMP_P (table_insn)
3517 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3519 rtx table = PATTERN (table_insn);
3522 && (offset / GET_MODE_SIZE (GET_MODE (table))
3523 < XVECLEN (table, 1)))
3525 offset /= GET_MODE_SIZE (GET_MODE (table));
3526 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3529 if (GET_MODE (table) != Pmode)
3530 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3532 /* Indicate this is a constant. This isn't a
3533 valid form of CONST, but it will only be used
3534 to fold the next insns and then discarded, so
3537 Note this expression must be explicitly discarded,
3538 by cse_insn, else it may end up in a REG_EQUAL note
3539 and "escape" to cause problems elsewhere. */
3540 return gen_rtx_CONST (GET_MODE (new), new);
3548 #ifdef NO_FUNCTION_CSE
3550 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3556 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3557 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3558 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3568 mode_arg0 = VOIDmode;
3570 /* Try folding our operands.
3571 Then see which ones have constant values known. */
3573 fmt = GET_RTX_FORMAT (code);
3574 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3577 rtx arg = XEXP (x, i);
3578 rtx folded_arg = arg, const_arg = 0;
3579 enum machine_mode mode_arg = GET_MODE (arg);
3580 rtx cheap_arg, expensive_arg;
3581 rtx replacements[2];
3583 int old_cost = COST_IN (XEXP (x, i), code);
3585 /* Most arguments are cheap, so handle them specially. */
3586 switch (GET_CODE (arg))
3589 /* This is the same as calling equiv_constant; it is duplicated
3591 if (REGNO_QTY_VALID_P (REGNO (arg)))
3593 int arg_q = REG_QTY (REGNO (arg));
3594 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3596 if (arg_ent->const_rtx != NULL_RTX
3597 && !REG_P (arg_ent->const_rtx)
3598 && GET_CODE (arg_ent->const_rtx) != PLUS)
3600 = gen_lowpart (GET_MODE (arg),
3601 arg_ent->const_rtx);
3616 folded_arg = prev_insn_cc0;
3617 mode_arg = prev_insn_cc0_mode;
3618 const_arg = equiv_constant (folded_arg);
3623 folded_arg = fold_rtx (arg, insn);
3624 const_arg = equiv_constant (folded_arg);
3627 /* For the first three operands, see if the operand
3628 is constant or equivalent to a constant. */
3632 folded_arg0 = folded_arg;
3633 const_arg0 = const_arg;
3634 mode_arg0 = mode_arg;
3637 folded_arg1 = folded_arg;
3638 const_arg1 = const_arg;
3641 const_arg2 = const_arg;
3645 /* Pick the least expensive of the folded argument and an
3646 equivalent constant argument. */
3647 if (const_arg == 0 || const_arg == folded_arg
3648 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3649 cheap_arg = folded_arg, expensive_arg = const_arg;
3651 cheap_arg = const_arg, expensive_arg = folded_arg;
3653 /* Try to replace the operand with the cheapest of the two
3654 possibilities. If it doesn't work and this is either of the first
3655 two operands of a commutative operation, try swapping them.
3656 If THAT fails, try the more expensive, provided it is cheaper
3657 than what is already there. */
3659 if (cheap_arg == XEXP (x, i))
3662 if (insn == 0 && ! copied)
3668 /* Order the replacements from cheapest to most expensive. */
3669 replacements[0] = cheap_arg;
3670 replacements[1] = expensive_arg;
3672 for (j = 0; j < 2 && replacements[j]; j++)
3674 int new_cost = COST_IN (replacements[j], code);
3676 /* Stop if what existed before was cheaper. Prefer constants
3677 in the case of a tie. */
3678 if (new_cost > old_cost
3679 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3682 /* It's not safe to substitute the operand of a conversion
3683 operator with a constant, as the conversion's identity
3684 depends upon the mode of it's operand. This optimization
3685 is handled by the call to simplify_unary_operation. */
3686 if (GET_RTX_CLASS (code) == RTX_UNARY
3687 && GET_MODE (replacements[j]) != mode_arg0
3688 && (code == ZERO_EXTEND
3689 || code == SIGN_EXTEND
3691 || code == FLOAT_TRUNCATE
3692 || code == FLOAT_EXTEND
3695 || code == UNSIGNED_FLOAT
3696 || code == UNSIGNED_FIX))
3699 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3702 if (GET_RTX_CLASS (code) == RTX_COMM_COMPARE
3703 || GET_RTX_CLASS (code) == RTX_COMM_ARITH)
3705 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3706 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3708 if (apply_change_group ())
3710 /* Swap them back to be invalid so that this loop can
3711 continue and flag them to be swapped back later. */
3714 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3726 /* Don't try to fold inside of a vector of expressions.
3727 Doing nothing is harmless. */
3731 /* If a commutative operation, place a constant integer as the second
3732 operand unless the first operand is also a constant integer. Otherwise,
3733 place any constant second unless the first operand is also a constant. */
3735 if (COMMUTATIVE_P (x))
3738 || swap_commutative_operands_p (const_arg0 ? const_arg0
3740 const_arg1 ? const_arg1
3743 rtx tem = XEXP (x, 0);
3745 if (insn == 0 && ! copied)
3751 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3752 validate_change (insn, &XEXP (x, 1), tem, 1);
3753 if (apply_change_group ())
3755 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3756 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3761 /* If X is an arithmetic operation, see if we can simplify it. */
3763 switch (GET_RTX_CLASS (code))
3769 /* We can't simplify extension ops unless we know the
3771 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3772 && mode_arg0 == VOIDmode)
3775 /* If we had a CONST, strip it off and put it back later if we
3777 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3778 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3780 new = simplify_unary_operation (code, mode,
3781 const_arg0 ? const_arg0 : folded_arg0,
3783 /* NEG of PLUS could be converted into MINUS, but that causes
3784 expressions of the form
3785 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3786 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3787 FIXME: those ports should be fixed. */
3788 if (new != 0 && is_const
3789 && GET_CODE (new) == PLUS
3790 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3791 || GET_CODE (XEXP (new, 0)) == LABEL_REF)
3792 && GET_CODE (XEXP (new, 1)) == CONST_INT)
3793 new = gen_rtx_CONST (mode, new);
3798 case RTX_COMM_COMPARE:
3799 /* See what items are actually being compared and set FOLDED_ARG[01]
3800 to those values and CODE to the actual comparison code. If any are
3801 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3802 do anything if both operands are already known to be constant. */
3804 if (const_arg0 == 0 || const_arg1 == 0)
3806 struct table_elt *p0, *p1;
3807 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3808 enum machine_mode mode_arg1;
3810 #ifdef FLOAT_STORE_FLAG_VALUE
3811 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3813 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3814 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3815 false_rtx = CONST0_RTX (mode);
3819 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3820 &mode_arg0, &mode_arg1);
3821 const_arg0 = equiv_constant (folded_arg0);
3822 const_arg1 = equiv_constant (folded_arg1);
3824 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3825 what kinds of things are being compared, so we can't do
3826 anything with this comparison. */
3828 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3831 /* If we do not now have two constants being compared, see
3832 if we can nevertheless deduce some things about the
3834 if (const_arg0 == 0 || const_arg1 == 0)
3836 /* Some addresses are known to be nonzero. We don't know
3837 their sign, but equality comparisons are known. */
3838 if (const_arg1 == const0_rtx
3839 && nonzero_address_p (folded_arg0))
3843 else if (code == NE)
3847 /* See if the two operands are the same. */
3849 if (folded_arg0 == folded_arg1
3850 || (REG_P (folded_arg0)
3851 && REG_P (folded_arg1)
3852 && (REG_QTY (REGNO (folded_arg0))
3853 == REG_QTY (REGNO (folded_arg1))))
3854 || ((p0 = lookup (folded_arg0,
3855 SAFE_HASH (folded_arg0, mode_arg0),
3857 && (p1 = lookup (folded_arg1,
3858 SAFE_HASH (folded_arg1, mode_arg0),
3860 && p0->first_same_value == p1->first_same_value))
3862 /* Sadly two equal NaNs are not equivalent. */
3863 if (!HONOR_NANS (mode_arg0))
3864 return ((code == EQ || code == LE || code == GE
3865 || code == LEU || code == GEU || code == UNEQ
3866 || code == UNLE || code == UNGE
3868 ? true_rtx : false_rtx);
3869 /* Take care for the FP compares we can resolve. */
3870 if (code == UNEQ || code == UNLE || code == UNGE)
3872 if (code == LTGT || code == LT || code == GT)
3876 /* If FOLDED_ARG0 is a register, see if the comparison we are
3877 doing now is either the same as we did before or the reverse
3878 (we only check the reverse if not floating-point). */
3879 else if (REG_P (folded_arg0))
3881 int qty = REG_QTY (REGNO (folded_arg0));
3883 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3885 struct qty_table_elem *ent = &qty_table[qty];
3887 if ((comparison_dominates_p (ent->comparison_code, code)
3888 || (! FLOAT_MODE_P (mode_arg0)
3889 && comparison_dominates_p (ent->comparison_code,
3890 reverse_condition (code))))
3891 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3893 && rtx_equal_p (ent->comparison_const,
3895 || (REG_P (folded_arg1)
3896 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3897 return (comparison_dominates_p (ent->comparison_code, code)
3898 ? true_rtx : false_rtx);
3904 /* If we are comparing against zero, see if the first operand is
3905 equivalent to an IOR with a constant. If so, we may be able to
3906 determine the result of this comparison. */
3908 if (const_arg1 == const0_rtx)
3910 rtx y = lookup_as_function (folded_arg0, IOR);
3914 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3915 && GET_CODE (inner_const) == CONST_INT
3916 && INTVAL (inner_const) != 0)
3918 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3919 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3920 && (INTVAL (inner_const)
3921 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3922 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3924 #ifdef FLOAT_STORE_FLAG_VALUE
3925 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3927 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3928 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3929 false_rtx = CONST0_RTX (mode);
3954 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3955 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3956 new = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3961 case RTX_COMM_ARITH:
3965 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3966 with that LABEL_REF as its second operand. If so, the result is
3967 the first operand of that MINUS. This handles switches with an
3968 ADDR_DIFF_VEC table. */
3969 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3972 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3973 : lookup_as_function (folded_arg0, MINUS);
3975 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3976 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3979 /* Now try for a CONST of a MINUS like the above. */
3980 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3981 : lookup_as_function (folded_arg0, CONST))) != 0
3982 && GET_CODE (XEXP (y, 0)) == MINUS
3983 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3984 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3985 return XEXP (XEXP (y, 0), 0);
3988 /* Likewise if the operands are in the other order. */
3989 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3992 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3993 : lookup_as_function (folded_arg1, MINUS);
3995 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3996 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3999 /* Now try for a CONST of a MINUS like the above. */
4000 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4001 : lookup_as_function (folded_arg1, CONST))) != 0
4002 && GET_CODE (XEXP (y, 0)) == MINUS
4003 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4004 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4005 return XEXP (XEXP (y, 0), 0);
4008 /* If second operand is a register equivalent to a negative
4009 CONST_INT, see if we can find a register equivalent to the
4010 positive constant. Make a MINUS if so. Don't do this for
4011 a non-negative constant since we might then alternate between
4012 choosing positive and negative constants. Having the positive
4013 constant previously-used is the more common case. Be sure
4014 the resulting constant is non-negative; if const_arg1 were
4015 the smallest negative number this would overflow: depending
4016 on the mode, this would either just be the same value (and
4017 hence not save anything) or be incorrect. */
4018 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4019 && INTVAL (const_arg1) < 0
4020 /* This used to test
4022 -INTVAL (const_arg1) >= 0
4024 But The Sun V5.0 compilers mis-compiled that test. So
4025 instead we test for the problematic value in a more direct
4026 manner and hope the Sun compilers get it correct. */
4027 && INTVAL (const_arg1) !=
4028 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4029 && REG_P (folded_arg1))
4031 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4033 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
4036 for (p = p->first_same_value; p; p = p->next_same_value)
4038 return simplify_gen_binary (MINUS, mode, folded_arg0,
4039 canon_reg (p->exp, NULL_RTX));
4044 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4045 If so, produce (PLUS Z C2-C). */
4046 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4048 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4049 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4050 return fold_rtx (plus_constant (copy_rtx (y),
4051 -INTVAL (const_arg1)),
4058 case SMIN: case SMAX: case UMIN: case UMAX:
4059 case IOR: case AND: case XOR:
4061 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4062 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4063 is known to be of similar form, we may be able to replace the
4064 operation with a combined operation. This may eliminate the
4065 intermediate operation if every use is simplified in this way.
4066 Note that the similar optimization done by combine.c only works
4067 if the intermediate operation's result has only one reference. */
4069 if (REG_P (folded_arg0)
4070 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4073 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4074 rtx y = lookup_as_function (folded_arg0, code);
4076 enum rtx_code associate_code;
4080 || 0 == (inner_const
4081 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4082 || GET_CODE (inner_const) != CONST_INT
4083 /* If we have compiled a statement like
4084 "if (x == (x & mask1))", and now are looking at
4085 "x & mask2", we will have a case where the first operand
4086 of Y is the same as our first operand. Unless we detect
4087 this case, an infinite loop will result. */
4088 || XEXP (y, 0) == folded_arg0)
4091 /* Don't associate these operations if they are a PLUS with the
4092 same constant and it is a power of two. These might be doable
4093 with a pre- or post-increment. Similarly for two subtracts of
4094 identical powers of two with post decrement. */
4096 if (code == PLUS && const_arg1 == inner_const
4097 && ((HAVE_PRE_INCREMENT
4098 && exact_log2 (INTVAL (const_arg1)) >= 0)
4099 || (HAVE_POST_INCREMENT
4100 && exact_log2 (INTVAL (const_arg1)) >= 0)
4101 || (HAVE_PRE_DECREMENT
4102 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4103 || (HAVE_POST_DECREMENT
4104 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4107 /* Compute the code used to compose the constants. For example,
4108 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4110 associate_code = (is_shift || code == MINUS ? PLUS : code);
4112 new_const = simplify_binary_operation (associate_code, mode,
4113 const_arg1, inner_const);
4118 /* If we are associating shift operations, don't let this
4119 produce a shift of the size of the object or larger.
4120 This could occur when we follow a sign-extend by a right
4121 shift on a machine that does a sign-extend as a pair
4124 if (is_shift && GET_CODE (new_const) == CONST_INT
4125 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4127 /* As an exception, we can turn an ASHIFTRT of this
4128 form into a shift of the number of bits - 1. */
4129 if (code == ASHIFTRT)
4130 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4135 y = copy_rtx (XEXP (y, 0));
4137 /* If Y contains our first operand (the most common way this
4138 can happen is if Y is a MEM), we would do into an infinite
4139 loop if we tried to fold it. So don't in that case. */
4141 if (! reg_mentioned_p (folded_arg0, y))
4142 y = fold_rtx (y, insn);
4144 return simplify_gen_binary (code, mode, y, new_const);
4148 case DIV: case UDIV:
4149 /* ??? The associative optimization performed immediately above is
4150 also possible for DIV and UDIV using associate_code of MULT.
4151 However, we would need extra code to verify that the
4152 multiplication does not overflow, that is, there is no overflow
4153 in the calculation of new_const. */
4160 new = simplify_binary_operation (code, mode,
4161 const_arg0 ? const_arg0 : folded_arg0,
4162 const_arg1 ? const_arg1 : folded_arg1);
4166 /* (lo_sum (high X) X) is simply X. */
4167 if (code == LO_SUM && const_arg0 != 0
4168 && GET_CODE (const_arg0) == HIGH
4169 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4174 case RTX_BITFIELD_OPS:
4175 new = simplify_ternary_operation (code, mode, mode_arg0,
4176 const_arg0 ? const_arg0 : folded_arg0,
4177 const_arg1 ? const_arg1 : folded_arg1,
4178 const_arg2 ? const_arg2 : XEXP (x, 2));
4185 return new ? new : x;
4188 /* Return a constant value currently equivalent to X.
4189 Return 0 if we don't know one. */
4192 equiv_constant (rtx x)
4195 && REGNO_QTY_VALID_P (REGNO (x)))
4197 int x_q = REG_QTY (REGNO (x));
4198 struct qty_table_elem *x_ent = &qty_table[x_q];
4200 if (x_ent->const_rtx)
4201 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
4204 if (x == 0 || CONSTANT_P (x))
4207 /* If X is a MEM, try to fold it outside the context of any insn to see if
4208 it might be equivalent to a constant. That handles the case where it
4209 is a constant-pool reference. Then try to look it up in the hash table
4210 in case it is something whose value we have seen before. */
4214 struct table_elt *elt;
4216 x = fold_rtx (x, NULL_RTX);
4220 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
4224 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4225 if (elt->is_const && CONSTANT_P (elt->exp))
4232 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4233 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4234 least-significant part of X.
4235 MODE specifies how big a part of X to return.
4237 If the requested operation cannot be done, 0 is returned.
4239 This is similar to gen_lowpart_general in emit-rtl.c. */
4242 gen_lowpart_if_possible (enum machine_mode mode, rtx x)
4244 rtx result = gen_lowpart_common (mode, x);
4250 /* This is the only other case we handle. */
4254 if (WORDS_BIG_ENDIAN)
4255 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4256 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4257 if (BYTES_BIG_ENDIAN)
4258 /* Adjust the address so that the address-after-the-data is
4260 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4261 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4263 new = adjust_address_nv (x, mode, offset);
4264 if (! memory_address_p (mode, XEXP (new, 0)))
4273 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4274 branch. It will be zero if not.
4276 In certain cases, this can cause us to add an equivalence. For example,
4277 if we are following the taken case of
4279 we can add the fact that `i' and '2' are now equivalent.
4281 In any case, we can record that this comparison was passed. If the same
4282 comparison is seen later, we will know its value. */
4285 record_jump_equiv (rtx insn, int taken)
4287 int cond_known_true;
4290 enum machine_mode mode, mode0, mode1;
4291 int reversed_nonequality = 0;
4294 /* Ensure this is the right kind of insn. */
4295 if (! any_condjump_p (insn))
4297 set = pc_set (insn);
4299 /* See if this jump condition is known true or false. */
4301 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4303 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4305 /* Get the type of comparison being done and the operands being compared.
4306 If we had to reverse a non-equality condition, record that fact so we
4307 know that it isn't valid for floating-point. */
4308 code = GET_CODE (XEXP (SET_SRC (set), 0));
4309 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4310 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4312 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4313 if (! cond_known_true)
4315 code = reversed_comparison_code_parts (code, op0, op1, insn);
4317 /* Don't remember if we can't find the inverse. */
4318 if (code == UNKNOWN)
4322 /* The mode is the mode of the non-constant. */
4324 if (mode1 != VOIDmode)
4327 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4330 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4331 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4332 Make any useful entries we can with that information. Called from
4333 above function and called recursively. */
4336 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4337 rtx op1, int reversed_nonequality)
4339 unsigned op0_hash, op1_hash;
4340 int op0_in_memory, op1_in_memory;
4341 struct table_elt *op0_elt, *op1_elt;
4343 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4344 we know that they are also equal in the smaller mode (this is also
4345 true for all smaller modes whether or not there is a SUBREG, but
4346 is not worth testing for with no SUBREG). */
4348 /* Note that GET_MODE (op0) may not equal MODE. */
4349 if (code == EQ && GET_CODE (op0) == SUBREG
4350 && (GET_MODE_SIZE (GET_MODE (op0))
4351 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4353 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4354 rtx tem = gen_lowpart (inner_mode, op1);
4356 record_jump_cond (code, mode, SUBREG_REG (op0),
4357 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4358 reversed_nonequality);
4361 if (code == EQ && GET_CODE (op1) == SUBREG
4362 && (GET_MODE_SIZE (GET_MODE (op1))
4363 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4365 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4366 rtx tem = gen_lowpart (inner_mode, op0);
4368 record_jump_cond (code, mode, SUBREG_REG (op1),
4369 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4370 reversed_nonequality);
4373 /* Similarly, if this is an NE comparison, and either is a SUBREG
4374 making a smaller mode, we know the whole thing is also NE. */
4376 /* Note that GET_MODE (op0) may not equal MODE;
4377 if we test MODE instead, we can get an infinite recursion
4378 alternating between two modes each wider than MODE. */
4380 if (code == NE && GET_CODE (op0) == SUBREG
4381 && subreg_lowpart_p (op0)
4382 && (GET_MODE_SIZE (GET_MODE (op0))
4383 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4385 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4386 rtx tem = gen_lowpart (inner_mode, op1);
4388 record_jump_cond (code, mode, SUBREG_REG (op0),
4389 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4390 reversed_nonequality);
4393 if (code == NE && GET_CODE (op1) == SUBREG
4394 && subreg_lowpart_p (op1)
4395 && (GET_MODE_SIZE (GET_MODE (op1))
4396 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4398 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4399 rtx tem = gen_lowpart (inner_mode, op0);
4401 record_jump_cond (code, mode, SUBREG_REG (op1),
4402 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4403 reversed_nonequality);
4406 /* Hash both operands. */
4409 hash_arg_in_memory = 0;
4410 op0_hash = HASH (op0, mode);
4411 op0_in_memory = hash_arg_in_memory;
4417 hash_arg_in_memory = 0;
4418 op1_hash = HASH (op1, mode);
4419 op1_in_memory = hash_arg_in_memory;
4424 /* Look up both operands. */
4425 op0_elt = lookup (op0, op0_hash, mode);
4426 op1_elt = lookup (op1, op1_hash, mode);
4428 /* If both operands are already equivalent or if they are not in the
4429 table but are identical, do nothing. */
4430 if ((op0_elt != 0 && op1_elt != 0
4431 && op0_elt->first_same_value == op1_elt->first_same_value)
4432 || op0 == op1 || rtx_equal_p (op0, op1))
4435 /* If we aren't setting two things equal all we can do is save this
4436 comparison. Similarly if this is floating-point. In the latter
4437 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4438 If we record the equality, we might inadvertently delete code
4439 whose intent was to change -0 to +0. */
4441 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4443 struct qty_table_elem *ent;
4446 /* If we reversed a floating-point comparison, if OP0 is not a
4447 register, or if OP1 is neither a register or constant, we can't
4451 op1 = equiv_constant (op1);
4453 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4454 || !REG_P (op0) || op1 == 0)
4457 /* Put OP0 in the hash table if it isn't already. This gives it a
4458 new quantity number. */
4461 if (insert_regs (op0, NULL, 0))
4463 rehash_using_reg (op0);
4464 op0_hash = HASH (op0, mode);
4466 /* If OP0 is contained in OP1, this changes its hash code
4467 as well. Faster to rehash than to check, except
4468 for the simple case of a constant. */
4469 if (! CONSTANT_P (op1))
4470 op1_hash = HASH (op1,mode);
4473 op0_elt = insert (op0, NULL, op0_hash, mode);
4474 op0_elt->in_memory = op0_in_memory;
4477 qty = REG_QTY (REGNO (op0));
4478 ent = &qty_table[qty];
4480 ent->comparison_code = code;
4483 /* Look it up again--in case op0 and op1 are the same. */
4484 op1_elt = lookup (op1, op1_hash, mode);
4486 /* Put OP1 in the hash table so it gets a new quantity number. */
4489 if (insert_regs (op1, NULL, 0))
4491 rehash_using_reg (op1);
4492 op1_hash = HASH (op1, mode);
4495 op1_elt = insert (op1, NULL, op1_hash, mode);
4496 op1_elt->in_memory = op1_in_memory;
4499 ent->comparison_const = NULL_RTX;
4500 ent->comparison_qty = REG_QTY (REGNO (op1));
4504 ent->comparison_const = op1;
4505 ent->comparison_qty = -1;
4511 /* If either side is still missing an equivalence, make it now,
4512 then merge the equivalences. */
4516 if (insert_regs (op0, NULL, 0))
4518 rehash_using_reg (op0);
4519 op0_hash = HASH (op0, mode);
4522 op0_elt = insert (op0, NULL, op0_hash, mode);
4523 op0_elt->in_memory = op0_in_memory;
4528 if (insert_regs (op1, NULL, 0))
4530 rehash_using_reg (op1);
4531 op1_hash = HASH (op1, mode);
4534 op1_elt = insert (op1, NULL, op1_hash, mode);
4535 op1_elt->in_memory = op1_in_memory;
4538 merge_equiv_classes (op0_elt, op1_elt);
4541 /* CSE processing for one instruction.
4542 First simplify sources and addresses of all assignments
4543 in the instruction, using previously-computed equivalents values.
4544 Then install the new sources and destinations in the table
4545 of available values.
4547 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4548 the insn. It means that INSN is inside libcall block. In this
4549 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4551 /* Data on one SET contained in the instruction. */
4555 /* The SET rtx itself. */
4557 /* The SET_SRC of the rtx (the original value, if it is changing). */
4559 /* The hash-table element for the SET_SRC of the SET. */
4560 struct table_elt *src_elt;
4561 /* Hash value for the SET_SRC. */
4563 /* Hash value for the SET_DEST. */
4565 /* The SET_DEST, with SUBREG, etc., stripped. */
4567 /* Nonzero if the SET_SRC is in memory. */
4569 /* Nonzero if the SET_SRC contains something
4570 whose value cannot be predicted and understood. */
4572 /* Original machine mode, in case it becomes a CONST_INT.
4573 The size of this field should match the size of the mode
4574 field of struct rtx_def (see rtl.h). */
4575 ENUM_BITFIELD(machine_mode) mode : 8;
4576 /* A constant equivalent for SET_SRC, if any. */
4578 /* Original SET_SRC value used for libcall notes. */
4580 /* Hash value of constant equivalent for SET_SRC. */
4581 unsigned src_const_hash;
4582 /* Table entry for constant equivalent for SET_SRC, if any. */
4583 struct table_elt *src_const_elt;
4587 cse_insn (rtx insn, rtx libcall_insn)
4589 rtx x = PATTERN (insn);
4595 /* Records what this insn does to set CC0. */
4596 rtx this_insn_cc0 = 0;
4597 enum machine_mode this_insn_cc0_mode = VOIDmode;
4601 struct table_elt *src_eqv_elt = 0;
4602 int src_eqv_volatile = 0;
4603 int src_eqv_in_memory = 0;
4604 unsigned src_eqv_hash = 0;
4606 struct set *sets = (struct set *) 0;
4610 /* Find all the SETs and CLOBBERs in this instruction.
4611 Record all the SETs in the array `set' and count them.
4612 Also determine whether there is a CLOBBER that invalidates
4613 all memory references, or all references at varying addresses. */
4617 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4619 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4620 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4621 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4625 if (GET_CODE (x) == SET)
4627 sets = alloca (sizeof (struct set));
4630 /* Ignore SETs that are unconditional jumps.
4631 They never need cse processing, so this does not hurt.
4632 The reason is not efficiency but rather
4633 so that we can test at the end for instructions
4634 that have been simplified to unconditional jumps
4635 and not be misled by unchanged instructions
4636 that were unconditional jumps to begin with. */
4637 if (SET_DEST (x) == pc_rtx
4638 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4641 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4642 The hard function value register is used only once, to copy to
4643 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4644 Ensure we invalidate the destination register. On the 80386 no
4645 other code would invalidate it since it is a fixed_reg.
4646 We need not check the return of apply_change_group; see canon_reg. */
4648 else if (GET_CODE (SET_SRC (x)) == CALL)
4650 canon_reg (SET_SRC (x), insn);
4651 apply_change_group ();
4652 fold_rtx (SET_SRC (x), insn);
4653 invalidate (SET_DEST (x), VOIDmode);
4658 else if (GET_CODE (x) == PARALLEL)
4660 int lim = XVECLEN (x, 0);
4662 sets = alloca (lim * sizeof (struct set));
4664 /* Find all regs explicitly clobbered in this insn,
4665 and ensure they are not replaced with any other regs
4666 elsewhere in this insn.
4667 When a reg that is clobbered is also used for input,
4668 we should presume that that is for a reason,
4669 and we should not substitute some other register
4670 which is not supposed to be clobbered.
4671 Therefore, this loop cannot be merged into the one below
4672 because a CALL may precede a CLOBBER and refer to the
4673 value clobbered. We must not let a canonicalization do
4674 anything in that case. */
4675 for (i = 0; i < lim; i++)
4677 rtx y = XVECEXP (x, 0, i);
4678 if (GET_CODE (y) == CLOBBER)
4680 rtx clobbered = XEXP (y, 0);
4682 if (REG_P (clobbered)
4683 || GET_CODE (clobbered) == SUBREG)
4684 invalidate (clobbered, VOIDmode);
4685 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4686 || GET_CODE (clobbered) == ZERO_EXTRACT)
4687 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4691 for (i = 0; i < lim; i++)
4693 rtx y = XVECEXP (x, 0, i);
4694 if (GET_CODE (y) == SET)
4696 /* As above, we ignore unconditional jumps and call-insns and
4697 ignore the result of apply_change_group. */
4698 if (GET_CODE (SET_SRC (y)) == CALL)
4700 canon_reg (SET_SRC (y), insn);
4701 apply_change_group ();
4702 fold_rtx (SET_SRC (y), insn);
4703 invalidate (SET_DEST (y), VOIDmode);
4705 else if (SET_DEST (y) == pc_rtx
4706 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4709 sets[n_sets++].rtl = y;
4711 else if (GET_CODE (y) == CLOBBER)
4713 /* If we clobber memory, canon the address.
4714 This does nothing when a register is clobbered
4715 because we have already invalidated the reg. */
4716 if (MEM_P (XEXP (y, 0)))
4717 canon_reg (XEXP (y, 0), NULL_RTX);
4719 else if (GET_CODE (y) == USE
4720 && ! (REG_P (XEXP (y, 0))
4721 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4722 canon_reg (y, NULL_RTX);
4723 else if (GET_CODE (y) == CALL)
4725 /* The result of apply_change_group can be ignored; see
4727 canon_reg (y, insn);
4728 apply_change_group ();
4733 else if (GET_CODE (x) == CLOBBER)
4735 if (MEM_P (XEXP (x, 0)))
4736 canon_reg (XEXP (x, 0), NULL_RTX);
4739 /* Canonicalize a USE of a pseudo register or memory location. */
4740 else if (GET_CODE (x) == USE
4741 && ! (REG_P (XEXP (x, 0))
4742 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4743 canon_reg (XEXP (x, 0), NULL_RTX);
4744 else if (GET_CODE (x) == CALL)
4746 /* The result of apply_change_group can be ignored; see canon_reg. */
4747 canon_reg (x, insn);
4748 apply_change_group ();
4752 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4753 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4754 is handled specially for this case, and if it isn't set, then there will
4755 be no equivalence for the destination. */
4756 if (n_sets == 1 && REG_NOTES (insn) != 0
4757 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4758 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4759 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4761 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4762 XEXP (tem, 0) = src_eqv;
4765 /* Canonicalize sources and addresses of destinations.
4766 We do this in a separate pass to avoid problems when a MATCH_DUP is
4767 present in the insn pattern. In that case, we want to ensure that
4768 we don't break the duplicate nature of the pattern. So we will replace
4769 both operands at the same time. Otherwise, we would fail to find an
4770 equivalent substitution in the loop calling validate_change below.
4772 We used to suppress canonicalization of DEST if it appears in SRC,
4773 but we don't do this any more. */
4775 for (i = 0; i < n_sets; i++)
4777 rtx dest = SET_DEST (sets[i].rtl);
4778 rtx src = SET_SRC (sets[i].rtl);
4779 rtx new = canon_reg (src, insn);
4782 sets[i].orig_src = src;
4783 if ((REG_P (new) && REG_P (src)
4784 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4785 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4786 || (insn_code = recog_memoized (insn)) < 0
4787 || insn_data[insn_code].n_dups > 0)
4788 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4790 SET_SRC (sets[i].rtl) = new;
4792 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4794 validate_change (insn, &XEXP (dest, 1),
4795 canon_reg (XEXP (dest, 1), insn), 1);
4796 validate_change (insn, &XEXP (dest, 2),
4797 canon_reg (XEXP (dest, 2), insn), 1);
4800 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4801 || GET_CODE (dest) == ZERO_EXTRACT
4802 || GET_CODE (dest) == SIGN_EXTRACT)
4803 dest = XEXP (dest, 0);
4806 canon_reg (dest, insn);
4809 /* Now that we have done all the replacements, we can apply the change
4810 group and see if they all work. Note that this will cause some
4811 canonicalizations that would have worked individually not to be applied
4812 because some other canonicalization didn't work, but this should not
4815 The result of apply_change_group can be ignored; see canon_reg. */
4817 apply_change_group ();
4819 /* Set sets[i].src_elt to the class each source belongs to.
4820 Detect assignments from or to volatile things
4821 and set set[i] to zero so they will be ignored
4822 in the rest of this function.
4824 Nothing in this loop changes the hash table or the register chains. */
4826 for (i = 0; i < n_sets; i++)
4830 struct table_elt *elt = 0, *p;
4831 enum machine_mode mode;
4834 rtx src_related = 0;
4835 struct table_elt *src_const_elt = 0;
4836 int src_cost = MAX_COST;
4837 int src_eqv_cost = MAX_COST;
4838 int src_folded_cost = MAX_COST;
4839 int src_related_cost = MAX_COST;
4840 int src_elt_cost = MAX_COST;
4841 int src_regcost = MAX_COST;
4842 int src_eqv_regcost = MAX_COST;
4843 int src_folded_regcost = MAX_COST;
4844 int src_related_regcost = MAX_COST;
4845 int src_elt_regcost = MAX_COST;
4846 /* Set nonzero if we need to call force_const_mem on with the
4847 contents of src_folded before using it. */
4848 int src_folded_force_flag = 0;
4850 dest = SET_DEST (sets[i].rtl);
4851 src = SET_SRC (sets[i].rtl);
4853 /* If SRC is a constant that has no machine mode,
4854 hash it with the destination's machine mode.
4855 This way we can keep different modes separate. */
4857 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4858 sets[i].mode = mode;
4862 enum machine_mode eqvmode = mode;
4863 if (GET_CODE (dest) == STRICT_LOW_PART)
4864 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4866 hash_arg_in_memory = 0;
4867 src_eqv_hash = HASH (src_eqv, eqvmode);
4869 /* Find the equivalence class for the equivalent expression. */
4872 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4874 src_eqv_volatile = do_not_record;
4875 src_eqv_in_memory = hash_arg_in_memory;
4878 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4879 value of the INNER register, not the destination. So it is not
4880 a valid substitution for the source. But save it for later. */
4881 if (GET_CODE (dest) == STRICT_LOW_PART)
4884 src_eqv_here = src_eqv;
4886 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4887 simplified result, which may not necessarily be valid. */
4888 src_folded = fold_rtx (src, insn);
4891 /* ??? This caused bad code to be generated for the m68k port with -O2.
4892 Suppose src is (CONST_INT -1), and that after truncation src_folded
4893 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4894 At the end we will add src and src_const to the same equivalence
4895 class. We now have 3 and -1 on the same equivalence class. This
4896 causes later instructions to be mis-optimized. */
4897 /* If storing a constant in a bitfield, pre-truncate the constant
4898 so we will be able to record it later. */
4899 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4900 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4902 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4904 if (GET_CODE (src) == CONST_INT
4905 && GET_CODE (width) == CONST_INT
4906 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4907 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4909 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4910 << INTVAL (width)) - 1));
4914 /* Compute SRC's hash code, and also notice if it
4915 should not be recorded at all. In that case,
4916 prevent any further processing of this assignment. */
4918 hash_arg_in_memory = 0;
4921 sets[i].src_hash = HASH (src, mode);
4922 sets[i].src_volatile = do_not_record;
4923 sets[i].src_in_memory = hash_arg_in_memory;
4925 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4926 a pseudo, do not record SRC. Using SRC as a replacement for
4927 anything else will be incorrect in that situation. Note that
4928 this usually occurs only for stack slots, in which case all the
4929 RTL would be referring to SRC, so we don't lose any optimization
4930 opportunities by not having SRC in the hash table. */
4933 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4935 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4936 sets[i].src_volatile = 1;
4939 /* It is no longer clear why we used to do this, but it doesn't
4940 appear to still be needed. So let's try without it since this
4941 code hurts cse'ing widened ops. */
4942 /* If source is a paradoxical subreg (such as QI treated as an SI),
4943 treat it as volatile. It may do the work of an SI in one context
4944 where the extra bits are not being used, but cannot replace an SI
4946 if (GET_CODE (src) == SUBREG
4947 && (GET_MODE_SIZE (GET_MODE (src))
4948 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4949 sets[i].src_volatile = 1;
4952 /* Locate all possible equivalent forms for SRC. Try to replace
4953 SRC in the insn with each cheaper equivalent.
4955 We have the following types of equivalents: SRC itself, a folded
4956 version, a value given in a REG_EQUAL note, or a value related
4959 Each of these equivalents may be part of an additional class
4960 of equivalents (if more than one is in the table, they must be in
4961 the same class; we check for this).
4963 If the source is volatile, we don't do any table lookups.
4965 We note any constant equivalent for possible later use in a
4968 if (!sets[i].src_volatile)
4969 elt = lookup (src, sets[i].src_hash, mode);
4971 sets[i].src_elt = elt;
4973 if (elt && src_eqv_here && src_eqv_elt)
4975 if (elt->first_same_value != src_eqv_elt->first_same_value)
4977 /* The REG_EQUAL is indicating that two formerly distinct
4978 classes are now equivalent. So merge them. */
4979 merge_equiv_classes (elt, src_eqv_elt);
4980 src_eqv_hash = HASH (src_eqv, elt->mode);
4981 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4987 else if (src_eqv_elt)
4990 /* Try to find a constant somewhere and record it in `src_const'.
4991 Record its table element, if any, in `src_const_elt'. Look in
4992 any known equivalences first. (If the constant is not in the
4993 table, also set `sets[i].src_const_hash'). */
4995 for (p = elt->first_same_value; p; p = p->next_same_value)
4999 src_const_elt = elt;
5004 && (CONSTANT_P (src_folded)
5005 /* Consider (minus (label_ref L1) (label_ref L2)) as
5006 "constant" here so we will record it. This allows us
5007 to fold switch statements when an ADDR_DIFF_VEC is used. */
5008 || (GET_CODE (src_folded) == MINUS
5009 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5010 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5011 src_const = src_folded, src_const_elt = elt;
5012 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5013 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5015 /* If we don't know if the constant is in the table, get its
5016 hash code and look it up. */
5017 if (src_const && src_const_elt == 0)
5019 sets[i].src_const_hash = HASH (src_const, mode);
5020 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5023 sets[i].src_const = src_const;
5024 sets[i].src_const_elt = src_const_elt;
5026 /* If the constant and our source are both in the table, mark them as
5027 equivalent. Otherwise, if a constant is in the table but the source
5028 isn't, set ELT to it. */
5029 if (src_const_elt && elt
5030 && src_const_elt->first_same_value != elt->first_same_value)
5031 merge_equiv_classes (elt, src_const_elt);
5032 else if (src_const_elt && elt == 0)
5033 elt = src_const_elt;
5035 /* See if there is a register linearly related to a constant
5036 equivalent of SRC. */
5038 && (GET_CODE (src_const) == CONST
5039 || (src_const_elt && src_const_elt->related_value != 0)))
5041 src_related = use_related_value (src_const, src_const_elt);
5044 struct table_elt *src_related_elt
5045 = lookup (src_related, HASH (src_related, mode), mode);
5046 if (src_related_elt && elt)
5048 if (elt->first_same_value
5049 != src_related_elt->first_same_value)
5050 /* This can occur when we previously saw a CONST
5051 involving a SYMBOL_REF and then see the SYMBOL_REF
5052 twice. Merge the involved classes. */
5053 merge_equiv_classes (elt, src_related_elt);
5056 src_related_elt = 0;
5058 else if (src_related_elt && elt == 0)
5059 elt = src_related_elt;
5063 /* See if we have a CONST_INT that is already in a register in a
5066 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5067 && GET_MODE_CLASS (mode) == MODE_INT
5068 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5070 enum machine_mode wider_mode;
5072 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5073 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5074 && src_related == 0;
5075 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5077 struct table_elt *const_elt
5078 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5083 for (const_elt = const_elt->first_same_value;
5084 const_elt; const_elt = const_elt->next_same_value)
5085 if (REG_P (const_elt->exp))
5087 src_related = gen_lowpart (mode,
5094 /* Another possibility is that we have an AND with a constant in
5095 a mode narrower than a word. If so, it might have been generated
5096 as part of an "if" which would narrow the AND. If we already
5097 have done the AND in a wider mode, we can use a SUBREG of that
5100 if (flag_expensive_optimizations && ! src_related
5101 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5102 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5104 enum machine_mode tmode;
5105 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5107 for (tmode = GET_MODE_WIDER_MODE (mode);
5108 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5109 tmode = GET_MODE_WIDER_MODE (tmode))
5111 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
5112 struct table_elt *larger_elt;
5116 PUT_MODE (new_and, tmode);
5117 XEXP (new_and, 0) = inner;
5118 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5119 if (larger_elt == 0)
5122 for (larger_elt = larger_elt->first_same_value;
5123 larger_elt; larger_elt = larger_elt->next_same_value)
5124 if (REG_P (larger_elt->exp))
5127 = gen_lowpart (mode, larger_elt->exp);
5137 #ifdef LOAD_EXTEND_OP
5138 /* See if a MEM has already been loaded with a widening operation;
5139 if it has, we can use a subreg of that. Many CISC machines
5140 also have such operations, but this is only likely to be
5141 beneficial on these machines. */
5143 if (flag_expensive_optimizations && src_related == 0
5144 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5145 && GET_MODE_CLASS (mode) == MODE_INT
5146 && MEM_P (src) && ! do_not_record
5147 && LOAD_EXTEND_OP (mode) != UNKNOWN)
5149 struct rtx_def memory_extend_buf;
5150 rtx memory_extend_rtx = &memory_extend_buf;
5151 enum machine_mode tmode;
5153 /* Set what we are trying to extend and the operation it might
5154 have been extended with. */
5155 memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx));
5156 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5157 XEXP (memory_extend_rtx, 0) = src;
5159 for (tmode = GET_MODE_WIDER_MODE (mode);
5160 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5161 tmode = GET_MODE_WIDER_MODE (tmode))
5163 struct table_elt *larger_elt;
5165 PUT_MODE (memory_extend_rtx, tmode);
5166 larger_elt = lookup (memory_extend_rtx,
5167 HASH (memory_extend_rtx, tmode), tmode);
5168 if (larger_elt == 0)
5171 for (larger_elt = larger_elt->first_same_value;
5172 larger_elt; larger_elt = larger_elt->next_same_value)
5173 if (REG_P (larger_elt->exp))
5175 src_related = gen_lowpart (mode,
5184 #endif /* LOAD_EXTEND_OP */
5186 if (src == src_folded)
5189 /* At this point, ELT, if nonzero, points to a class of expressions
5190 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5191 and SRC_RELATED, if nonzero, each contain additional equivalent
5192 expressions. Prune these latter expressions by deleting expressions
5193 already in the equivalence class.
5195 Check for an equivalent identical to the destination. If found,
5196 this is the preferred equivalent since it will likely lead to
5197 elimination of the insn. Indicate this by placing it in
5201 elt = elt->first_same_value;
5202 for (p = elt; p; p = p->next_same_value)
5204 enum rtx_code code = GET_CODE (p->exp);
5206 /* If the expression is not valid, ignore it. Then we do not
5207 have to check for validity below. In most cases, we can use
5208 `rtx_equal_p', since canonicalization has already been done. */
5209 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
5212 /* Also skip paradoxical subregs, unless that's what we're
5215 && (GET_MODE_SIZE (GET_MODE (p->exp))
5216 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5218 && GET_CODE (src) == SUBREG
5219 && GET_MODE (src) == GET_MODE (p->exp)
5220 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5221 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5224 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5226 else if (src_folded && GET_CODE (src_folded) == code
5227 && rtx_equal_p (src_folded, p->exp))
5229 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5230 && rtx_equal_p (src_eqv_here, p->exp))
5232 else if (src_related && GET_CODE (src_related) == code
5233 && rtx_equal_p (src_related, p->exp))
5236 /* This is the same as the destination of the insns, we want
5237 to prefer it. Copy it to src_related. The code below will
5238 then give it a negative cost. */
5239 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5243 /* Find the cheapest valid equivalent, trying all the available
5244 possibilities. Prefer items not in the hash table to ones
5245 that are when they are equal cost. Note that we can never
5246 worsen an insn as the current contents will also succeed.
5247 If we find an equivalent identical to the destination, use it as best,
5248 since this insn will probably be eliminated in that case. */
5251 if (rtx_equal_p (src, dest))
5252 src_cost = src_regcost = -1;
5255 src_cost = COST (src);
5256 src_regcost = approx_reg_cost (src);
5262 if (rtx_equal_p (src_eqv_here, dest))
5263 src_eqv_cost = src_eqv_regcost = -1;
5266 src_eqv_cost = COST (src_eqv_here);
5267 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5273 if (rtx_equal_p (src_folded, dest))
5274 src_folded_cost = src_folded_regcost = -1;
5277 src_folded_cost = COST (src_folded);
5278 src_folded_regcost = approx_reg_cost (src_folded);
5284 if (rtx_equal_p (src_related, dest))
5285 src_related_cost = src_related_regcost = -1;
5288 src_related_cost = COST (src_related);
5289 src_related_regcost = approx_reg_cost (src_related);
5293 /* If this was an indirect jump insn, a known label will really be
5294 cheaper even though it looks more expensive. */
5295 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5296 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5298 /* Terminate loop when replacement made. This must terminate since
5299 the current contents will be tested and will always be valid. */
5304 /* Skip invalid entries. */
5305 while (elt && !REG_P (elt->exp)
5306 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5307 elt = elt->next_same_value;
5309 /* A paradoxical subreg would be bad here: it'll be the right
5310 size, but later may be adjusted so that the upper bits aren't
5311 what we want. So reject it. */
5313 && GET_CODE (elt->exp) == SUBREG
5314 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5315 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5316 /* It is okay, though, if the rtx we're trying to match
5317 will ignore any of the bits we can't predict. */
5319 && GET_CODE (src) == SUBREG
5320 && GET_MODE (src) == GET_MODE (elt->exp)
5321 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5322 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5324 elt = elt->next_same_value;
5330 src_elt_cost = elt->cost;
5331 src_elt_regcost = elt->regcost;
5334 /* Find cheapest and skip it for the next time. For items
5335 of equal cost, use this order:
5336 src_folded, src, src_eqv, src_related and hash table entry. */
5338 && preferable (src_folded_cost, src_folded_regcost,
5339 src_cost, src_regcost) <= 0
5340 && preferable (src_folded_cost, src_folded_regcost,
5341 src_eqv_cost, src_eqv_regcost) <= 0
5342 && preferable (src_folded_cost, src_folded_regcost,
5343 src_related_cost, src_related_regcost) <= 0
5344 && preferable (src_folded_cost, src_folded_regcost,
5345 src_elt_cost, src_elt_regcost) <= 0)
5347 trial = src_folded, src_folded_cost = MAX_COST;
5348 if (src_folded_force_flag)
5350 rtx forced = force_const_mem (mode, trial);
5356 && preferable (src_cost, src_regcost,
5357 src_eqv_cost, src_eqv_regcost) <= 0
5358 && preferable (src_cost, src_regcost,
5359 src_related_cost, src_related_regcost) <= 0
5360 && preferable (src_cost, src_regcost,
5361 src_elt_cost, src_elt_regcost) <= 0)
5362 trial = src, src_cost = MAX_COST;
5363 else if (src_eqv_here
5364 && preferable (src_eqv_cost, src_eqv_regcost,
5365 src_related_cost, src_related_regcost) <= 0
5366 && preferable (src_eqv_cost, src_eqv_regcost,
5367 src_elt_cost, src_elt_regcost) <= 0)
5368 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5369 else if (src_related
5370 && preferable (src_related_cost, src_related_regcost,
5371 src_elt_cost, src_elt_regcost) <= 0)
5372 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5375 trial = copy_rtx (elt->exp);
5376 elt = elt->next_same_value;
5377 src_elt_cost = MAX_COST;
5380 /* We don't normally have an insn matching (set (pc) (pc)), so
5381 check for this separately here. We will delete such an
5384 For other cases such as a table jump or conditional jump
5385 where we know the ultimate target, go ahead and replace the
5386 operand. While that may not make a valid insn, we will
5387 reemit the jump below (and also insert any necessary
5389 if (n_sets == 1 && dest == pc_rtx
5391 || (GET_CODE (trial) == LABEL_REF
5392 && ! condjump_p (insn))))
5394 /* Don't substitute non-local labels, this confuses CFG. */
5395 if (GET_CODE (trial) == LABEL_REF
5396 && LABEL_REF_NONLOCAL_P (trial))
5399 SET_SRC (sets[i].rtl) = trial;
5400 cse_jumps_altered = 1;
5404 /* Look for a substitution that makes a valid insn. */
5405 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5407 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5409 /* If we just made a substitution inside a libcall, then we
5410 need to make the same substitution in any notes attached
5411 to the RETVAL insn. */
5413 && (REG_P (sets[i].orig_src)
5414 || GET_CODE (sets[i].orig_src) == SUBREG
5415 || MEM_P (sets[i].orig_src)))
5417 rtx note = find_reg_equal_equiv_note (libcall_insn);
5419 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0),
5424 /* The result of apply_change_group can be ignored; see
5427 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5428 apply_change_group ();
5432 /* If we previously found constant pool entries for
5433 constants and this is a constant, try making a
5434 pool entry. Put it in src_folded unless we already have done
5435 this since that is where it likely came from. */
5437 else if (constant_pool_entries_cost
5438 && CONSTANT_P (trial)
5439 /* Reject cases that will abort in decode_rtx_const.
5440 On the alpha when simplifying a switch, we get
5441 (const (truncate (minus (label_ref) (label_ref)))). */
5442 && ! (GET_CODE (trial) == CONST
5443 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5444 /* Likewise on IA-64, except without the truncate. */
5445 && ! (GET_CODE (trial) == CONST
5446 && GET_CODE (XEXP (trial, 0)) == MINUS
5447 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5448 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5450 || (!MEM_P (src_folded)
5451 && ! src_folded_force_flag))
5452 && GET_MODE_CLASS (mode) != MODE_CC
5453 && mode != VOIDmode)
5455 src_folded_force_flag = 1;
5457 src_folded_cost = constant_pool_entries_cost;
5458 src_folded_regcost = constant_pool_entries_regcost;
5462 src = SET_SRC (sets[i].rtl);
5464 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5465 However, there is an important exception: If both are registers
5466 that are not the head of their equivalence class, replace SET_SRC
5467 with the head of the class. If we do not do this, we will have
5468 both registers live over a portion of the basic block. This way,
5469 their lifetimes will likely abut instead of overlapping. */
5471 && REGNO_QTY_VALID_P (REGNO (dest)))
5473 int dest_q = REG_QTY (REGNO (dest));
5474 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5476 if (dest_ent->mode == GET_MODE (dest)
5477 && dest_ent->first_reg != REGNO (dest)
5478 && REG_P (src) && REGNO (src) == REGNO (dest)
5479 /* Don't do this if the original insn had a hard reg as
5480 SET_SRC or SET_DEST. */
5481 && (!REG_P (sets[i].src)
5482 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5483 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5484 /* We can't call canon_reg here because it won't do anything if
5485 SRC is a hard register. */
5487 int src_q = REG_QTY (REGNO (src));
5488 struct qty_table_elem *src_ent = &qty_table[src_q];
5489 int first = src_ent->first_reg;
5491 = (first >= FIRST_PSEUDO_REGISTER
5492 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5494 /* We must use validate-change even for this, because this
5495 might be a special no-op instruction, suitable only to
5497 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5500 /* If we had a constant that is cheaper than what we are now
5501 setting SRC to, use that constant. We ignored it when we
5502 thought we could make this into a no-op. */
5503 if (src_const && COST (src_const) < COST (src)
5504 && validate_change (insn, &SET_SRC (sets[i].rtl),
5511 /* If we made a change, recompute SRC values. */
5512 if (src != sets[i].src)
5516 hash_arg_in_memory = 0;
5518 sets[i].src_hash = HASH (src, mode);
5519 sets[i].src_volatile = do_not_record;
5520 sets[i].src_in_memory = hash_arg_in_memory;
5521 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5524 /* If this is a single SET, we are setting a register, and we have an
5525 equivalent constant, we want to add a REG_NOTE. We don't want
5526 to write a REG_EQUAL note for a constant pseudo since verifying that
5527 that pseudo hasn't been eliminated is a pain. Such a note also
5528 won't help anything.
5530 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5531 which can be created for a reference to a compile time computable
5532 entry in a jump table. */
5534 if (n_sets == 1 && src_const && REG_P (dest)
5535 && !REG_P (src_const)
5536 && ! (GET_CODE (src_const) == CONST
5537 && GET_CODE (XEXP (src_const, 0)) == MINUS
5538 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5539 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5541 /* We only want a REG_EQUAL note if src_const != src. */
5542 if (! rtx_equal_p (src, src_const))
5544 /* Make sure that the rtx is not shared. */
5545 src_const = copy_rtx (src_const);
5547 /* Record the actual constant value in a REG_EQUAL note,
5548 making a new one if one does not already exist. */
5549 set_unique_reg_note (insn, REG_EQUAL, src_const);
5553 /* Now deal with the destination. */
5556 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5557 to the MEM or REG within it. */
5558 while (GET_CODE (dest) == SIGN_EXTRACT
5559 || GET_CODE (dest) == ZERO_EXTRACT
5560 || GET_CODE (dest) == SUBREG
5561 || GET_CODE (dest) == STRICT_LOW_PART)
5562 dest = XEXP (dest, 0);
5564 sets[i].inner_dest = dest;
5568 #ifdef PUSH_ROUNDING
5569 /* Stack pushes invalidate the stack pointer. */
5570 rtx addr = XEXP (dest, 0);
5571 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5572 && XEXP (addr, 0) == stack_pointer_rtx)
5573 invalidate (stack_pointer_rtx, Pmode);
5575 dest = fold_rtx (dest, insn);
5578 /* Compute the hash code of the destination now,
5579 before the effects of this instruction are recorded,
5580 since the register values used in the address computation
5581 are those before this instruction. */
5582 sets[i].dest_hash = HASH (dest, mode);
5584 /* Don't enter a bit-field in the hash table
5585 because the value in it after the store
5586 may not equal what was stored, due to truncation. */
5588 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5589 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5591 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5593 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5594 && GET_CODE (width) == CONST_INT
5595 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5596 && ! (INTVAL (src_const)
5597 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5598 /* Exception: if the value is constant,
5599 and it won't be truncated, record it. */
5603 /* This is chosen so that the destination will be invalidated
5604 but no new value will be recorded.
5605 We must invalidate because sometimes constant
5606 values can be recorded for bitfields. */
5607 sets[i].src_elt = 0;
5608 sets[i].src_volatile = 1;
5614 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5616 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5618 /* One less use of the label this insn used to jump to. */
5620 cse_jumps_altered = 1;
5621 /* No more processing for this set. */
5625 /* If this SET is now setting PC to a label, we know it used to
5626 be a conditional or computed branch. */
5627 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5628 && !LABEL_REF_NONLOCAL_P (src))
5630 /* Now emit a BARRIER after the unconditional jump. */
5631 if (NEXT_INSN (insn) == 0
5632 || !BARRIER_P (NEXT_INSN (insn)))
5633 emit_barrier_after (insn);
5635 /* We reemit the jump in as many cases as possible just in
5636 case the form of an unconditional jump is significantly
5637 different than a computed jump or conditional jump.
5639 If this insn has multiple sets, then reemitting the
5640 jump is nontrivial. So instead we just force rerecognition
5641 and hope for the best. */
5646 new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5647 JUMP_LABEL (new) = XEXP (src, 0);
5648 LABEL_NUSES (XEXP (src, 0))++;
5650 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5651 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5654 XEXP (note, 1) = NULL_RTX;
5655 REG_NOTES (new) = note;
5661 /* Now emit a BARRIER after the unconditional jump. */
5662 if (NEXT_INSN (insn) == 0
5663 || !BARRIER_P (NEXT_INSN (insn)))
5664 emit_barrier_after (insn);
5667 INSN_CODE (insn) = -1;
5669 /* Do not bother deleting any unreachable code,
5670 let jump/flow do that. */
5672 cse_jumps_altered = 1;
5676 /* If destination is volatile, invalidate it and then do no further
5677 processing for this assignment. */
5679 else if (do_not_record)
5681 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5682 invalidate (dest, VOIDmode);
5683 else if (MEM_P (dest))
5685 /* Outgoing arguments for a libcall don't
5686 affect any recorded expressions. */
5687 if (! libcall_insn || insn == libcall_insn)
5688 invalidate (dest, VOIDmode);
5690 else if (GET_CODE (dest) == STRICT_LOW_PART
5691 || GET_CODE (dest) == ZERO_EXTRACT)
5692 invalidate (XEXP (dest, 0), GET_MODE (dest));
5696 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5697 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5700 /* If setting CC0, record what it was set to, or a constant, if it
5701 is equivalent to a constant. If it is being set to a floating-point
5702 value, make a COMPARE with the appropriate constant of 0. If we
5703 don't do this, later code can interpret this as a test against
5704 const0_rtx, which can cause problems if we try to put it into an
5705 insn as a floating-point operand. */
5706 if (dest == cc0_rtx)
5708 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5709 this_insn_cc0_mode = mode;
5710 if (FLOAT_MODE_P (mode))
5711 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5717 /* Now enter all non-volatile source expressions in the hash table
5718 if they are not already present.
5719 Record their equivalence classes in src_elt.
5720 This way we can insert the corresponding destinations into
5721 the same classes even if the actual sources are no longer in them
5722 (having been invalidated). */
5724 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5725 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5727 struct table_elt *elt;
5728 struct table_elt *classp = sets[0].src_elt;
5729 rtx dest = SET_DEST (sets[0].rtl);
5730 enum machine_mode eqvmode = GET_MODE (dest);
5732 if (GET_CODE (dest) == STRICT_LOW_PART)
5734 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5737 if (insert_regs (src_eqv, classp, 0))
5739 rehash_using_reg (src_eqv);
5740 src_eqv_hash = HASH (src_eqv, eqvmode);
5742 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5743 elt->in_memory = src_eqv_in_memory;
5746 /* Check to see if src_eqv_elt is the same as a set source which
5747 does not yet have an elt, and if so set the elt of the set source
5749 for (i = 0; i < n_sets; i++)
5750 if (sets[i].rtl && sets[i].src_elt == 0
5751 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5752 sets[i].src_elt = src_eqv_elt;
5755 for (i = 0; i < n_sets; i++)
5756 if (sets[i].rtl && ! sets[i].src_volatile
5757 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5759 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5761 /* REG_EQUAL in setting a STRICT_LOW_PART
5762 gives an equivalent for the entire destination register,
5763 not just for the subreg being stored in now.
5764 This is a more interesting equivalence, so we arrange later
5765 to treat the entire reg as the destination. */
5766 sets[i].src_elt = src_eqv_elt;
5767 sets[i].src_hash = src_eqv_hash;
5771 /* Insert source and constant equivalent into hash table, if not
5773 struct table_elt *classp = src_eqv_elt;
5774 rtx src = sets[i].src;
5775 rtx dest = SET_DEST (sets[i].rtl);
5776 enum machine_mode mode
5777 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5779 /* It's possible that we have a source value known to be
5780 constant but don't have a REG_EQUAL note on the insn.
5781 Lack of a note will mean src_eqv_elt will be NULL. This
5782 can happen where we've generated a SUBREG to access a
5783 CONST_INT that is already in a register in a wider mode.
5784 Ensure that the source expression is put in the proper
5787 classp = sets[i].src_const_elt;
5789 if (sets[i].src_elt == 0)
5791 /* Don't put a hard register source into the table if this is
5792 the last insn of a libcall. In this case, we only need
5793 to put src_eqv_elt in src_elt. */
5794 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5796 struct table_elt *elt;
5798 /* Note that these insert_regs calls cannot remove
5799 any of the src_elt's, because they would have failed to
5800 match if not still valid. */
5801 if (insert_regs (src, classp, 0))
5803 rehash_using_reg (src);
5804 sets[i].src_hash = HASH (src, mode);
5806 elt = insert (src, classp, sets[i].src_hash, mode);
5807 elt->in_memory = sets[i].src_in_memory;
5808 sets[i].src_elt = classp = elt;
5811 sets[i].src_elt = classp;
5813 if (sets[i].src_const && sets[i].src_const_elt == 0
5814 && src != sets[i].src_const
5815 && ! rtx_equal_p (sets[i].src_const, src))
5816 sets[i].src_elt = insert (sets[i].src_const, classp,
5817 sets[i].src_const_hash, mode);
5820 else if (sets[i].src_elt == 0)
5821 /* If we did not insert the source into the hash table (e.g., it was
5822 volatile), note the equivalence class for the REG_EQUAL value, if any,
5823 so that the destination goes into that class. */
5824 sets[i].src_elt = src_eqv_elt;
5826 invalidate_from_clobbers (x);
5828 /* Some registers are invalidated by subroutine calls. Memory is
5829 invalidated by non-constant calls. */
5833 if (! CONST_OR_PURE_CALL_P (insn))
5834 invalidate_memory ();
5835 invalidate_for_call ();
5838 /* Now invalidate everything set by this instruction.
5839 If a SUBREG or other funny destination is being set,
5840 sets[i].rtl is still nonzero, so here we invalidate the reg
5841 a part of which is being set. */
5843 for (i = 0; i < n_sets; i++)
5846 /* We can't use the inner dest, because the mode associated with
5847 a ZERO_EXTRACT is significant. */
5848 rtx dest = SET_DEST (sets[i].rtl);
5850 /* Needed for registers to remove the register from its
5851 previous quantity's chain.
5852 Needed for memory if this is a nonvarying address, unless
5853 we have just done an invalidate_memory that covers even those. */
5854 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5855 invalidate (dest, VOIDmode);
5856 else if (MEM_P (dest))
5858 /* Outgoing arguments for a libcall don't
5859 affect any recorded expressions. */
5860 if (! libcall_insn || insn == libcall_insn)
5861 invalidate (dest, VOIDmode);
5863 else if (GET_CODE (dest) == STRICT_LOW_PART
5864 || GET_CODE (dest) == ZERO_EXTRACT)
5865 invalidate (XEXP (dest, 0), GET_MODE (dest));
5868 /* A volatile ASM invalidates everything. */
5869 if (NONJUMP_INSN_P (insn)
5870 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5871 && MEM_VOLATILE_P (PATTERN (insn)))
5872 flush_hash_table ();
5874 /* Make sure registers mentioned in destinations
5875 are safe for use in an expression to be inserted.
5876 This removes from the hash table
5877 any invalid entry that refers to one of these registers.
5879 We don't care about the return value from mention_regs because
5880 we are going to hash the SET_DEST values unconditionally. */
5882 for (i = 0; i < n_sets; i++)
5886 rtx x = SET_DEST (sets[i].rtl);
5892 /* We used to rely on all references to a register becoming
5893 inaccessible when a register changes to a new quantity,
5894 since that changes the hash code. However, that is not
5895 safe, since after HASH_SIZE new quantities we get a
5896 hash 'collision' of a register with its own invalid
5897 entries. And since SUBREGs have been changed not to
5898 change their hash code with the hash code of the register,
5899 it wouldn't work any longer at all. So we have to check
5900 for any invalid references lying around now.
5901 This code is similar to the REG case in mention_regs,
5902 but it knows that reg_tick has been incremented, and
5903 it leaves reg_in_table as -1 . */
5904 unsigned int regno = REGNO (x);
5905 unsigned int endregno
5906 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5907 : hard_regno_nregs[regno][GET_MODE (x)]);
5910 for (i = regno; i < endregno; i++)
5912 if (REG_IN_TABLE (i) >= 0)
5914 remove_invalid_refs (i);
5915 REG_IN_TABLE (i) = -1;
5922 /* We may have just removed some of the src_elt's from the hash table.
5923 So replace each one with the current head of the same class. */
5925 for (i = 0; i < n_sets; i++)
5928 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5929 /* If elt was removed, find current head of same class,
5930 or 0 if nothing remains of that class. */
5932 struct table_elt *elt = sets[i].src_elt;
5934 while (elt && elt->prev_same_value)
5935 elt = elt->prev_same_value;
5937 while (elt && elt->first_same_value == 0)
5938 elt = elt->next_same_value;
5939 sets[i].src_elt = elt ? elt->first_same_value : 0;
5943 /* Now insert the destinations into their equivalence classes. */
5945 for (i = 0; i < n_sets; i++)
5948 rtx dest = SET_DEST (sets[i].rtl);
5949 struct table_elt *elt;
5951 /* Don't record value if we are not supposed to risk allocating
5952 floating-point values in registers that might be wider than
5954 if ((flag_float_store
5956 && FLOAT_MODE_P (GET_MODE (dest)))
5957 /* Don't record BLKmode values, because we don't know the
5958 size of it, and can't be sure that other BLKmode values
5959 have the same or smaller size. */
5960 || GET_MODE (dest) == BLKmode
5961 /* Don't record values of destinations set inside a libcall block
5962 since we might delete the libcall. Things should have been set
5963 up so we won't want to reuse such a value, but we play it safe
5966 /* If we didn't put a REG_EQUAL value or a source into the hash
5967 table, there is no point is recording DEST. */
5968 || sets[i].src_elt == 0
5969 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5970 or SIGN_EXTEND, don't record DEST since it can cause
5971 some tracking to be wrong.
5973 ??? Think about this more later. */
5974 || (GET_CODE (dest) == SUBREG
5975 && (GET_MODE_SIZE (GET_MODE (dest))
5976 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5977 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5978 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5981 /* STRICT_LOW_PART isn't part of the value BEING set,
5982 and neither is the SUBREG inside it.
5983 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5984 if (GET_CODE (dest) == STRICT_LOW_PART)
5985 dest = SUBREG_REG (XEXP (dest, 0));
5987 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5988 /* Registers must also be inserted into chains for quantities. */
5989 if (insert_regs (dest, sets[i].src_elt, 1))
5991 /* If `insert_regs' changes something, the hash code must be
5993 rehash_using_reg (dest);
5994 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5997 elt = insert (dest, sets[i].src_elt,
5998 sets[i].dest_hash, GET_MODE (dest));
6000 elt->in_memory = (MEM_P (sets[i].inner_dest)
6001 && !MEM_READONLY_P (sets[i].inner_dest));
6003 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6004 narrower than M2, and both M1 and M2 are the same number of words,
6005 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6006 make that equivalence as well.
6008 However, BAR may have equivalences for which gen_lowpart
6009 will produce a simpler value than gen_lowpart applied to
6010 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6011 BAR's equivalences. If we don't get a simplified form, make
6012 the SUBREG. It will not be used in an equivalence, but will
6013 cause two similar assignments to be detected.
6015 Note the loop below will find SUBREG_REG (DEST) since we have
6016 already entered SRC and DEST of the SET in the table. */
6018 if (GET_CODE (dest) == SUBREG
6019 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6021 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6022 && (GET_MODE_SIZE (GET_MODE (dest))
6023 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6024 && sets[i].src_elt != 0)
6026 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6027 struct table_elt *elt, *classp = 0;
6029 for (elt = sets[i].src_elt->first_same_value; elt;
6030 elt = elt->next_same_value)
6034 struct table_elt *src_elt;
6037 /* Ignore invalid entries. */
6038 if (!REG_P (elt->exp)
6039 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
6042 /* We may have already been playing subreg games. If the
6043 mode is already correct for the destination, use it. */
6044 if (GET_MODE (elt->exp) == new_mode)
6048 /* Calculate big endian correction for the SUBREG_BYTE.
6049 We have already checked that M1 (GET_MODE (dest))
6050 is not narrower than M2 (new_mode). */
6051 if (BYTES_BIG_ENDIAN)
6052 byte = (GET_MODE_SIZE (GET_MODE (dest))
6053 - GET_MODE_SIZE (new_mode));
6055 new_src = simplify_gen_subreg (new_mode, elt->exp,
6056 GET_MODE (dest), byte);
6059 /* The call to simplify_gen_subreg fails if the value
6060 is VOIDmode, yet we can't do any simplification, e.g.
6061 for EXPR_LISTs denoting function call results.
6062 It is invalid to construct a SUBREG with a VOIDmode
6063 SUBREG_REG, hence a zero new_src means we can't do
6064 this substitution. */
6068 src_hash = HASH (new_src, new_mode);
6069 src_elt = lookup (new_src, src_hash, new_mode);
6071 /* Put the new source in the hash table is if isn't
6075 if (insert_regs (new_src, classp, 0))
6077 rehash_using_reg (new_src);
6078 src_hash = HASH (new_src, new_mode);
6080 src_elt = insert (new_src, classp, src_hash, new_mode);
6081 src_elt->in_memory = elt->in_memory;
6083 else if (classp && classp != src_elt->first_same_value)
6084 /* Show that two things that we've seen before are
6085 actually the same. */
6086 merge_equiv_classes (src_elt, classp);
6088 classp = src_elt->first_same_value;
6089 /* Ignore invalid entries. */
6091 && !REG_P (classp->exp)
6092 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
6093 classp = classp->next_same_value;
6098 /* Special handling for (set REG0 REG1) where REG0 is the
6099 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6100 be used in the sequel, so (if easily done) change this insn to
6101 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6102 that computed their value. Then REG1 will become a dead store
6103 and won't cloud the situation for later optimizations.
6105 Do not make this change if REG1 is a hard register, because it will
6106 then be used in the sequel and we may be changing a two-operand insn
6107 into a three-operand insn.
6109 Also do not do this if we are operating on a copy of INSN.
6111 Also don't do this if INSN ends a libcall; this would cause an unrelated
6112 register to be set in the middle of a libcall, and we then get bad code
6113 if the libcall is deleted. */
6115 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
6116 && NEXT_INSN (PREV_INSN (insn)) == insn
6117 && REG_P (SET_SRC (sets[0].rtl))
6118 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6119 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6121 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6122 struct qty_table_elem *src_ent = &qty_table[src_q];
6124 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6125 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6128 /* Scan for the previous nonnote insn, but stop at a basic
6132 prev = PREV_INSN (prev);
6134 while (prev && NOTE_P (prev)
6135 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6137 /* Do not swap the registers around if the previous instruction
6138 attaches a REG_EQUIV note to REG1.
6140 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6141 from the pseudo that originally shadowed an incoming argument
6142 to another register. Some uses of REG_EQUIV might rely on it
6143 being attached to REG1 rather than REG2.
6145 This section previously turned the REG_EQUIV into a REG_EQUAL
6146 note. We cannot do that because REG_EQUIV may provide an
6147 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6149 if (prev != 0 && NONJUMP_INSN_P (prev)
6150 && GET_CODE (PATTERN (prev)) == SET
6151 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6152 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6154 rtx dest = SET_DEST (sets[0].rtl);
6155 rtx src = SET_SRC (sets[0].rtl);
6158 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6159 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6160 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6161 apply_change_group ();
6163 /* If INSN has a REG_EQUAL note, and this note mentions
6164 REG0, then we must delete it, because the value in
6165 REG0 has changed. If the note's value is REG1, we must
6166 also delete it because that is now this insn's dest. */
6167 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6169 && (reg_mentioned_p (dest, XEXP (note, 0))
6170 || rtx_equal_p (src, XEXP (note, 0))))
6171 remove_note (insn, note);
6176 /* If this is a conditional jump insn, record any known equivalences due to
6177 the condition being tested. */
6180 && n_sets == 1 && GET_CODE (x) == SET
6181 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6182 record_jump_equiv (insn, 0);
6185 /* If the previous insn set CC0 and this insn no longer references CC0,
6186 delete the previous insn. Here we use the fact that nothing expects CC0
6187 to be valid over an insn, which is true until the final pass. */
6188 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6189 && (tem = single_set (prev_insn)) != 0
6190 && SET_DEST (tem) == cc0_rtx
6191 && ! reg_mentioned_p (cc0_rtx, x))
6192 delete_insn (prev_insn);
6194 prev_insn_cc0 = this_insn_cc0;
6195 prev_insn_cc0_mode = this_insn_cc0_mode;
6200 /* Remove from the hash table all expressions that reference memory. */
6203 invalidate_memory (void)
6206 struct table_elt *p, *next;
6208 for (i = 0; i < HASH_SIZE; i++)
6209 for (p = table[i]; p; p = next)
6211 next = p->next_same_hash;
6213 remove_from_table (p, i);
6217 /* If ADDR is an address that implicitly affects the stack pointer, return
6218 1 and update the register tables to show the effect. Else, return 0. */
6221 addr_affects_sp_p (rtx addr)
6223 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
6224 && REG_P (XEXP (addr, 0))
6225 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6227 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6229 REG_TICK (STACK_POINTER_REGNUM)++;
6230 /* Is it possible to use a subreg of SP? */
6231 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6234 /* This should be *very* rare. */
6235 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6236 invalidate (stack_pointer_rtx, VOIDmode);
6244 /* Perform invalidation on the basis of everything about an insn
6245 except for invalidating the actual places that are SET in it.
6246 This includes the places CLOBBERed, and anything that might
6247 alias with something that is SET or CLOBBERed.
6249 X is the pattern of the insn. */
6252 invalidate_from_clobbers (rtx x)
6254 if (GET_CODE (x) == CLOBBER)
6256 rtx ref = XEXP (x, 0);
6259 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6261 invalidate (ref, VOIDmode);
6262 else if (GET_CODE (ref) == STRICT_LOW_PART
6263 || GET_CODE (ref) == ZERO_EXTRACT)
6264 invalidate (XEXP (ref, 0), GET_MODE (ref));
6267 else if (GET_CODE (x) == PARALLEL)
6270 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6272 rtx y = XVECEXP (x, 0, i);
6273 if (GET_CODE (y) == CLOBBER)
6275 rtx ref = XEXP (y, 0);
6276 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6278 invalidate (ref, VOIDmode);
6279 else if (GET_CODE (ref) == STRICT_LOW_PART
6280 || GET_CODE (ref) == ZERO_EXTRACT)
6281 invalidate (XEXP (ref, 0), GET_MODE (ref));
6287 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6288 and replace any registers in them with either an equivalent constant
6289 or the canonical form of the register. If we are inside an address,
6290 only do this if the address remains valid.
6292 OBJECT is 0 except when within a MEM in which case it is the MEM.
6294 Return the replacement for X. */
6297 cse_process_notes (rtx x, rtx object)
6299 enum rtx_code code = GET_CODE (x);
6300 const char *fmt = GET_RTX_FORMAT (code);
6317 validate_change (x, &XEXP (x, 0),
6318 cse_process_notes (XEXP (x, 0), x), 0);
6323 if (REG_NOTE_KIND (x) == REG_EQUAL)
6324 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6326 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6333 rtx new = cse_process_notes (XEXP (x, 0), object);
6334 /* We don't substitute VOIDmode constants into these rtx,
6335 since they would impede folding. */
6336 if (GET_MODE (new) != VOIDmode)
6337 validate_change (object, &XEXP (x, 0), new, 0);
6342 i = REG_QTY (REGNO (x));
6344 /* Return a constant or a constant register. */
6345 if (REGNO_QTY_VALID_P (REGNO (x)))
6347 struct qty_table_elem *ent = &qty_table[i];
6349 if (ent->const_rtx != NULL_RTX
6350 && (CONSTANT_P (ent->const_rtx)
6351 || REG_P (ent->const_rtx)))
6353 rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx);
6359 /* Otherwise, canonicalize this register. */
6360 return canon_reg (x, NULL_RTX);
6366 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6368 validate_change (object, &XEXP (x, i),
6369 cse_process_notes (XEXP (x, i), object), 0);
6374 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6375 since they are done elsewhere. This function is called via note_stores. */
6378 invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
6380 enum rtx_code code = GET_CODE (dest);
6383 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6384 /* There are times when an address can appear varying and be a PLUS
6385 during this scan when it would be a fixed address were we to know
6386 the proper equivalences. So invalidate all memory if there is
6387 a BLKmode or nonscalar memory reference or a reference to a
6388 variable address. */
6389 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6390 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6392 invalidate_memory ();
6396 if (GET_CODE (set) == CLOBBER
6401 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6402 invalidate (XEXP (dest, 0), GET_MODE (dest));
6403 else if (code == REG || code == SUBREG || code == MEM)
6404 invalidate (dest, VOIDmode);
6407 /* Invalidate all insns from START up to the end of the function or the
6408 next label. This called when we wish to CSE around a block that is
6409 conditionally executed. */
6412 invalidate_skipped_block (rtx start)
6416 for (insn = start; insn && !LABEL_P (insn);
6417 insn = NEXT_INSN (insn))
6419 if (! INSN_P (insn))
6424 if (! CONST_OR_PURE_CALL_P (insn))
6425 invalidate_memory ();
6426 invalidate_for_call ();
6429 invalidate_from_clobbers (PATTERN (insn));
6430 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6434 /* Find the end of INSN's basic block and return its range,
6435 the total number of SETs in all the insns of the block, the last insn of the
6436 block, and the branch path.
6438 The branch path indicates which branches should be followed. If a nonzero
6439 path size is specified, the block should be rescanned and a different set
6440 of branches will be taken. The branch path is only used if
6441 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6443 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6444 used to describe the block. It is filled in with the information about
6445 the current block. The incoming structure's branch path, if any, is used
6446 to construct the output branch path. */
6449 cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6450 int follow_jumps, int skip_blocks)
6454 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6455 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6456 int path_size = data->path_size;
6460 /* Update the previous branch path, if any. If the last branch was
6461 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6462 If it was previously PATH_NOT_TAKEN,
6463 shorten the path by one and look at the previous branch. We know that
6464 at least one branch must have been taken if PATH_SIZE is nonzero. */
6465 while (path_size > 0)
6467 if (data->path[path_size - 1].status != PATH_NOT_TAKEN)
6469 data->path[path_size - 1].status = PATH_NOT_TAKEN;
6476 /* If the first instruction is marked with QImode, that means we've
6477 already processed this block. Our caller will look at DATA->LAST
6478 to figure out where to go next. We want to return the next block
6479 in the instruction stream, not some branched-to block somewhere
6480 else. We accomplish this by pretending our called forbid us to
6481 follow jumps, or skip blocks. */
6482 if (GET_MODE (insn) == QImode)
6483 follow_jumps = skip_blocks = 0;
6485 /* Scan to end of this basic block. */
6486 while (p && !LABEL_P (p))
6488 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6489 the regs restored by the longjmp come from
6490 a later time than the setjmp. */
6491 if (PREV_INSN (p) && CALL_P (PREV_INSN (p))
6492 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6495 /* A PARALLEL can have lots of SETs in it,
6496 especially if it is really an ASM_OPERANDS. */
6497 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6498 nsets += XVECLEN (PATTERN (p), 0);
6499 else if (!NOTE_P (p))
6502 /* Ignore insns made by CSE; they cannot affect the boundaries of
6505 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6506 high_cuid = INSN_CUID (p);
6507 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6508 low_cuid = INSN_CUID (p);
6510 /* See if this insn is in our branch path. If it is and we are to
6512 if (path_entry < path_size && data->path[path_entry].branch == p)
6514 if (data->path[path_entry].status != PATH_NOT_TAKEN)
6517 /* Point to next entry in path, if any. */
6521 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6522 was specified, we haven't reached our maximum path length, there are
6523 insns following the target of the jump, this is the only use of the
6524 jump label, and the target label is preceded by a BARRIER.
6526 Alternatively, we can follow the jump if it branches around a
6527 block of code and there are no other branches into the block.
6528 In this case invalidate_skipped_block will be called to invalidate any
6529 registers set in the block when following the jump. */
6531 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6533 && GET_CODE (PATTERN (p)) == SET
6534 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6535 && JUMP_LABEL (p) != 0
6536 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6537 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6539 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6541 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6542 || (PREV_INSN (q) && CALL_P (PREV_INSN (q))
6543 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6544 && (!LABEL_P (q) || LABEL_NUSES (q) != 0))
6547 /* If we ran into a BARRIER, this code is an extension of the
6548 basic block when the branch is taken. */
6549 if (follow_jumps && q != 0 && BARRIER_P (q))
6551 /* Don't allow ourself to keep walking around an
6552 always-executed loop. */
6553 if (next_real_insn (q) == next)
6559 /* Similarly, don't put a branch in our path more than once. */
6560 for (i = 0; i < path_entry; i++)
6561 if (data->path[i].branch == p)
6564 if (i != path_entry)
6567 data->path[path_entry].branch = p;
6568 data->path[path_entry++].status = PATH_TAKEN;
6570 /* This branch now ends our path. It was possible that we
6571 didn't see this branch the last time around (when the
6572 insn in front of the target was a JUMP_INSN that was
6573 turned into a no-op). */
6574 path_size = path_entry;
6577 /* Mark block so we won't scan it again later. */
6578 PUT_MODE (NEXT_INSN (p), QImode);
6580 /* Detect a branch around a block of code. */
6581 else if (skip_blocks && q != 0 && !LABEL_P (q))
6585 if (next_real_insn (q) == next)
6591 for (i = 0; i < path_entry; i++)
6592 if (data->path[i].branch == p)
6595 if (i != path_entry)
6598 /* This is no_labels_between_p (p, q) with an added check for
6599 reaching the end of a function (in case Q precedes P). */
6600 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6606 data->path[path_entry].branch = p;
6607 data->path[path_entry++].status = PATH_AROUND;
6609 path_size = path_entry;
6612 /* Mark block so we won't scan it again later. */
6613 PUT_MODE (NEXT_INSN (p), QImode);
6620 data->low_cuid = low_cuid;
6621 data->high_cuid = high_cuid;
6622 data->nsets = nsets;
6625 /* If all jumps in the path are not taken, set our path length to zero
6626 so a rescan won't be done. */
6627 for (i = path_size - 1; i >= 0; i--)
6628 if (data->path[i].status != PATH_NOT_TAKEN)
6632 data->path_size = 0;
6634 data->path_size = path_size;
6636 /* End the current branch path. */
6637 data->path[path_size].branch = 0;
6640 /* Perform cse on the instructions of a function.
6641 F is the first instruction.
6642 NREGS is one plus the highest pseudo-reg number used in the instruction.
6644 Returns 1 if jump_optimize should be redone due to simplifications
6645 in conditional jump instructions. */
6648 cse_main (rtx f, int nregs, FILE *file)
6650 struct cse_basic_block_data val;
6654 val.path = xmalloc (sizeof (struct branch_path)
6655 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6657 cse_jumps_altered = 0;
6658 recorded_label_ref = 0;
6659 constant_pool_entries_cost = 0;
6660 constant_pool_entries_regcost = 0;
6662 rtl_hooks = cse_rtl_hooks;
6665 init_alias_analysis ();
6669 max_insn_uid = get_max_uid ();
6671 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
6673 /* Reset the counter indicating how many elements have been made
6675 n_elements_made = 0;
6677 /* Find the largest uid. */
6679 max_uid = get_max_uid ();
6680 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
6682 /* Compute the mapping from uids to cuids.
6683 CUIDs are numbers assigned to insns, like uids,
6684 except that cuids increase monotonically through the code.
6685 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6686 between two insns is not affected by -g. */
6688 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6691 || NOTE_LINE_NUMBER (insn) < 0)
6692 INSN_CUID (insn) = ++i;
6694 /* Give a line number note the same cuid as preceding insn. */
6695 INSN_CUID (insn) = i;
6698 /* Loop over basic blocks.
6699 Compute the maximum number of qty's needed for each basic block
6700 (which is 2 for each SET). */
6705 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps,
6706 flag_cse_skip_blocks);
6708 /* If this basic block was already processed or has no sets, skip it. */
6709 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6711 PUT_MODE (insn, VOIDmode);
6712 insn = (val.last ? NEXT_INSN (val.last) : 0);
6717 cse_basic_block_start = val.low_cuid;
6718 cse_basic_block_end = val.high_cuid;
6719 max_qty = val.nsets * 2;
6722 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6723 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6726 /* Make MAX_QTY bigger to give us room to optimize
6727 past the end of this basic block, if that should prove useful. */
6731 /* If this basic block is being extended by following certain jumps,
6732 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6733 Otherwise, we start after this basic block. */
6734 if (val.path_size > 0)
6735 cse_basic_block (insn, val.last, val.path);
6738 int old_cse_jumps_altered = cse_jumps_altered;
6741 /* When cse changes a conditional jump to an unconditional
6742 jump, we want to reprocess the block, since it will give
6743 us a new branch path to investigate. */
6744 cse_jumps_altered = 0;
6745 temp = cse_basic_block (insn, val.last, val.path);
6746 if (cse_jumps_altered == 0
6747 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6750 cse_jumps_altered |= old_cse_jumps_altered;
6761 if (max_elements_made < n_elements_made)
6762 max_elements_made = n_elements_made;
6765 end_alias_analysis ();
6767 free (reg_eqv_table);
6769 rtl_hooks = general_rtl_hooks;
6771 return cse_jumps_altered || recorded_label_ref;
6774 /* Process a single basic block. FROM and TO and the limits of the basic
6775 block. NEXT_BRANCH points to the branch path when following jumps or
6776 a null path when not following jumps. */
6779 cse_basic_block (rtx from, rtx to, struct branch_path *next_branch)
6783 rtx libcall_insn = NULL_RTX;
6785 int no_conflict = 0;
6787 /* Allocate the space needed by qty_table. */
6788 qty_table = xmalloc (max_qty * sizeof (struct qty_table_elem));
6792 /* TO might be a label. If so, protect it from being deleted. */
6793 if (to != 0 && LABEL_P (to))
6796 for (insn = from; insn != to; insn = NEXT_INSN (insn))
6798 enum rtx_code code = GET_CODE (insn);
6800 /* If we have processed 1,000 insns, flush the hash table to
6801 avoid extreme quadratic behavior. We must not include NOTEs
6802 in the count since there may be more of them when generating
6803 debugging information. If we clear the table at different
6804 times, code generated with -g -O might be different than code
6805 generated with -O but not -g.
6807 ??? This is a real kludge and needs to be done some other way.
6809 if (code != NOTE && num_insns++ > 1000)
6811 flush_hash_table ();
6815 /* See if this is a branch that is part of the path. If so, and it is
6816 to be taken, do so. */
6817 if (next_branch->branch == insn)
6819 enum taken status = next_branch++->status;
6820 if (status != PATH_NOT_TAKEN)
6822 if (status == PATH_TAKEN)
6823 record_jump_equiv (insn, 1);
6825 invalidate_skipped_block (NEXT_INSN (insn));
6827 /* Set the last insn as the jump insn; it doesn't affect cc0.
6828 Then follow this branch. */
6833 insn = JUMP_LABEL (insn);
6838 if (GET_MODE (insn) == QImode)
6839 PUT_MODE (insn, VOIDmode);
6841 if (GET_RTX_CLASS (code) == RTX_INSN)
6845 /* Process notes first so we have all notes in canonical forms when
6846 looking for duplicate operations. */
6848 if (REG_NOTES (insn))
6849 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
6851 /* Track when we are inside in LIBCALL block. Inside such a block,
6852 we do not want to record destinations. The last insn of a
6853 LIBCALL block is not considered to be part of the block, since
6854 its destination is the result of the block and hence should be
6857 if (REG_NOTES (insn) != 0)
6859 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
6860 libcall_insn = XEXP (p, 0);
6861 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
6863 /* Keep libcall_insn for the last SET insn of a no-conflict
6864 block to prevent changing the destination. */
6870 else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX))
6874 cse_insn (insn, libcall_insn);
6876 if (no_conflict == -1)
6882 /* If we haven't already found an insn where we added a LABEL_REF,
6884 if (NONJUMP_INSN_P (insn) && ! recorded_label_ref
6885 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
6887 recorded_label_ref = 1;
6890 /* If INSN is now an unconditional jump, skip to the end of our
6891 basic block by pretending that we just did the last insn in the
6892 basic block. If we are jumping to the end of our block, show
6893 that we can have one usage of TO. */
6895 if (any_uncondjump_p (insn))
6903 if (JUMP_LABEL (insn) == to)
6906 /* Maybe TO was deleted because the jump is unconditional.
6907 If so, there is nothing left in this basic block. */
6908 /* ??? Perhaps it would be smarter to set TO
6909 to whatever follows this insn,
6910 and pretend the basic block had always ended here. */
6911 if (INSN_DELETED_P (to))
6914 insn = PREV_INSN (to);
6917 /* See if it is ok to keep on going past the label
6918 which used to end our basic block. Remember that we incremented
6919 the count of that label, so we decrement it here. If we made
6920 a jump unconditional, TO_USAGE will be one; in that case, we don't
6921 want to count the use in that jump. */
6923 if (to != 0 && NEXT_INSN (insn) == to
6924 && LABEL_P (to) && --LABEL_NUSES (to) == to_usage)
6926 struct cse_basic_block_data val;
6929 insn = NEXT_INSN (to);
6931 /* If TO was the last insn in the function, we are done. */
6938 /* If TO was preceded by a BARRIER we are done with this block
6939 because it has no continuation. */
6940 prev = prev_nonnote_insn (to);
6941 if (prev && BARRIER_P (prev))
6947 /* Find the end of the following block. Note that we won't be
6948 following branches in this case. */
6951 val.path = xmalloc (sizeof (struct branch_path)
6952 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6953 cse_end_of_basic_block (insn, &val, 0, 0);
6956 /* If the tables we allocated have enough space left
6957 to handle all the SETs in the next basic block,
6958 continue through it. Otherwise, return,
6959 and that block will be scanned individually. */
6960 if (val.nsets * 2 + next_qty > max_qty)
6963 cse_basic_block_start = val.low_cuid;
6964 cse_basic_block_end = val.high_cuid;
6967 /* Prevent TO from being deleted if it is a label. */
6968 if (to != 0 && LABEL_P (to))
6971 /* Back up so we process the first insn in the extension. */
6972 insn = PREV_INSN (insn);
6976 gcc_assert (next_qty <= max_qty);
6980 return to ? NEXT_INSN (to) : 0;
6983 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
6984 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
6987 check_for_label_ref (rtx *rtl, void *data)
6989 rtx insn = (rtx) data;
6991 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
6992 we must rerun jump since it needs to place the note. If this is a
6993 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
6994 since no REG_LABEL will be added. */
6995 return (GET_CODE (*rtl) == LABEL_REF
6996 && ! LABEL_REF_NONLOCAL_P (*rtl)
6997 && LABEL_P (XEXP (*rtl, 0))
6998 && INSN_UID (XEXP (*rtl, 0)) != 0
6999 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7002 /* Count the number of times registers are used (not set) in X.
7003 COUNTS is an array in which we accumulate the count, INCR is how much
7004 we count each register usage. */
7007 count_reg_usage (rtx x, int *counts, int incr)
7017 switch (code = GET_CODE (x))
7020 counts[REGNO (x)] += incr;
7034 /* If we are clobbering a MEM, mark any registers inside the address
7036 if (MEM_P (XEXP (x, 0)))
7037 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr);
7041 /* Unless we are setting a REG, count everything in SET_DEST. */
7042 if (!REG_P (SET_DEST (x)))
7043 count_reg_usage (SET_DEST (x), counts, incr);
7044 count_reg_usage (SET_SRC (x), counts, incr);
7048 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr);
7053 count_reg_usage (PATTERN (x), counts, incr);
7055 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7058 note = find_reg_equal_equiv_note (x);
7061 rtx eqv = XEXP (note, 0);
7063 if (GET_CODE (eqv) == EXPR_LIST)
7064 /* This REG_EQUAL note describes the result of a function call.
7065 Process all the arguments. */
7068 count_reg_usage (XEXP (eqv, 0), counts, incr);
7069 eqv = XEXP (eqv, 1);
7071 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7073 count_reg_usage (eqv, counts, incr);
7078 if (REG_NOTE_KIND (x) == REG_EQUAL
7079 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7080 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7081 involving registers in the address. */
7082 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7083 count_reg_usage (XEXP (x, 0), counts, incr);
7085 count_reg_usage (XEXP (x, 1), counts, incr);
7089 /* Iterate over just the inputs, not the constraints as well. */
7090 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7091 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr);
7101 fmt = GET_RTX_FORMAT (code);
7102 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7105 count_reg_usage (XEXP (x, i), counts, incr);
7106 else if (fmt[i] == 'E')
7107 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7108 count_reg_usage (XVECEXP (x, i, j), counts, incr);
7112 /* Return true if set is live. */
7114 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7121 if (set_noop_p (set))
7125 else if (GET_CODE (SET_DEST (set)) == CC0
7126 && !side_effects_p (SET_SRC (set))
7127 && ((tem = next_nonnote_insn (insn)) == 0
7129 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7132 else if (!REG_P (SET_DEST (set))
7133 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7134 || counts[REGNO (SET_DEST (set))] != 0
7135 || side_effects_p (SET_SRC (set)))
7140 /* Return true if insn is live. */
7143 insn_live_p (rtx insn, int *counts)
7146 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7148 else if (GET_CODE (PATTERN (insn)) == SET)
7149 return set_live_p (PATTERN (insn), insn, counts);
7150 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7152 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7154 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7156 if (GET_CODE (elt) == SET)
7158 if (set_live_p (elt, insn, counts))
7161 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7170 /* Return true if libcall is dead as a whole. */
7173 dead_libcall_p (rtx insn, int *counts)
7177 /* See if there's a REG_EQUAL note on this insn and try to
7178 replace the source with the REG_EQUAL expression.
7180 We assume that insns with REG_RETVALs can only be reg->reg
7181 copies at this point. */
7182 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7186 set = single_set (insn);
7190 new = simplify_rtx (XEXP (note, 0));
7192 new = XEXP (note, 0);
7194 /* While changing insn, we must update the counts accordingly. */
7195 count_reg_usage (insn, counts, -1);
7197 if (validate_change (insn, &SET_SRC (set), new, 0))
7199 count_reg_usage (insn, counts, 1);
7200 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7201 remove_note (insn, note);
7205 if (CONSTANT_P (new))
7207 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7208 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7210 count_reg_usage (insn, counts, 1);
7211 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7212 remove_note (insn, note);
7217 count_reg_usage (insn, counts, 1);
7221 /* Scan all the insns and delete any that are dead; i.e., they store a register
7222 that is never used or they copy a register to itself.
7224 This is used to remove insns made obviously dead by cse, loop or other
7225 optimizations. It improves the heuristics in loop since it won't try to
7226 move dead invariants out of loops or make givs for dead quantities. The
7227 remaining passes of the compilation are also sped up. */
7230 delete_trivially_dead_insns (rtx insns, int nreg)
7234 int in_libcall = 0, dead_libcall = 0;
7235 int ndead = 0, nlastdead, niterations = 0;
7237 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7238 /* First count the number of times each register is used. */
7239 counts = xcalloc (nreg, sizeof (int));
7240 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7241 count_reg_usage (insn, counts, 1);
7247 /* Go from the last insn to the first and delete insns that only set unused
7248 registers or copy a register to itself. As we delete an insn, remove
7249 usage counts for registers it uses.
7251 The first jump optimization pass may leave a real insn as the last
7252 insn in the function. We must not skip that insn or we may end
7253 up deleting code that is not really dead. */
7254 insn = get_last_insn ();
7255 if (! INSN_P (insn))
7256 insn = prev_real_insn (insn);
7258 for (; insn; insn = prev)
7262 prev = prev_real_insn (insn);
7264 /* Don't delete any insns that are part of a libcall block unless
7265 we can delete the whole libcall block.
7267 Flow or loop might get confused if we did that. Remember
7268 that we are scanning backwards. */
7269 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7273 dead_libcall = dead_libcall_p (insn, counts);
7275 else if (in_libcall)
7276 live_insn = ! dead_libcall;
7278 live_insn = insn_live_p (insn, counts);
7280 /* If this is a dead insn, delete it and show registers in it aren't
7285 count_reg_usage (insn, counts, -1);
7286 delete_insn_and_edges (insn);
7290 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7297 while (ndead != nlastdead);
7299 if (dump_file && ndead)
7300 fprintf (dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7301 ndead, niterations);
7304 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7308 /* This function is called via for_each_rtx. The argument, NEWREG, is
7309 a condition code register with the desired mode. If we are looking
7310 at the same register in a different mode, replace it with
7314 cse_change_cc_mode (rtx *loc, void *data)
7316 rtx newreg = (rtx) data;
7320 && REGNO (*loc) == REGNO (newreg)
7321 && GET_MODE (*loc) != GET_MODE (newreg))
7329 /* Change the mode of any reference to the register REGNO (NEWREG) to
7330 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7331 any instruction which modifies NEWREG. */
7334 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7338 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7340 if (! INSN_P (insn))
7343 if (reg_set_p (newreg, insn))
7346 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, newreg);
7347 for_each_rtx (®_NOTES (insn), cse_change_cc_mode, newreg);
7351 /* BB is a basic block which finishes with CC_REG as a condition code
7352 register which is set to CC_SRC. Look through the successors of BB
7353 to find blocks which have a single predecessor (i.e., this one),
7354 and look through those blocks for an assignment to CC_REG which is
7355 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7356 permitted to change the mode of CC_SRC to a compatible mode. This
7357 returns VOIDmode if no equivalent assignments were found.
7358 Otherwise it returns the mode which CC_SRC should wind up with.
7360 The main complexity in this function is handling the mode issues.
7361 We may have more than one duplicate which we can eliminate, and we
7362 try to find a mode which will work for multiple duplicates. */
7364 static enum machine_mode
7365 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
7368 enum machine_mode mode;
7369 unsigned int insn_count;
7372 enum machine_mode modes[2];
7378 /* We expect to have two successors. Look at both before picking
7379 the final mode for the comparison. If we have more successors
7380 (i.e., some sort of table jump, although that seems unlikely),
7381 then we require all beyond the first two to use the same
7384 found_equiv = false;
7385 mode = GET_MODE (cc_src);
7387 FOR_EACH_EDGE (e, ei, bb->succs)
7392 if (e->flags & EDGE_COMPLEX)
7395 if (EDGE_COUNT (e->dest->preds) != 1
7396 || e->dest == EXIT_BLOCK_PTR)
7399 end = NEXT_INSN (BB_END (e->dest));
7400 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7404 if (! INSN_P (insn))
7407 /* If CC_SRC is modified, we have to stop looking for
7408 something which uses it. */
7409 if (modified_in_p (cc_src, insn))
7412 /* Check whether INSN sets CC_REG to CC_SRC. */
7413 set = single_set (insn);
7415 && REG_P (SET_DEST (set))
7416 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7419 enum machine_mode set_mode;
7420 enum machine_mode comp_mode;
7423 set_mode = GET_MODE (SET_SRC (set));
7424 comp_mode = set_mode;
7425 if (rtx_equal_p (cc_src, SET_SRC (set)))
7427 else if (GET_CODE (cc_src) == COMPARE
7428 && GET_CODE (SET_SRC (set)) == COMPARE
7430 && rtx_equal_p (XEXP (cc_src, 0),
7431 XEXP (SET_SRC (set), 0))
7432 && rtx_equal_p (XEXP (cc_src, 1),
7433 XEXP (SET_SRC (set), 1)))
7436 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7437 if (comp_mode != VOIDmode
7438 && (can_change_mode || comp_mode == mode))
7445 if (insn_count < ARRAY_SIZE (insns))
7447 insns[insn_count] = insn;
7448 modes[insn_count] = set_mode;
7449 last_insns[insn_count] = end;
7452 if (mode != comp_mode)
7454 gcc_assert (can_change_mode);
7456 PUT_MODE (cc_src, mode);
7461 if (set_mode != mode)
7463 /* We found a matching expression in the
7464 wrong mode, but we don't have room to
7465 store it in the array. Punt. This case
7469 /* INSN sets CC_REG to a value equal to CC_SRC
7470 with the right mode. We can simply delete
7475 /* We found an instruction to delete. Keep looking,
7476 in the hopes of finding a three-way jump. */
7480 /* We found an instruction which sets the condition
7481 code, so don't look any farther. */
7485 /* If INSN sets CC_REG in some other way, don't look any
7487 if (reg_set_p (cc_reg, insn))
7491 /* If we fell off the bottom of the block, we can keep looking
7492 through successors. We pass CAN_CHANGE_MODE as false because
7493 we aren't prepared to handle compatibility between the
7494 further blocks and this block. */
7497 enum machine_mode submode;
7499 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
7500 if (submode != VOIDmode)
7502 gcc_assert (submode == mode);
7504 can_change_mode = false;
7512 /* Now INSN_COUNT is the number of instructions we found which set
7513 CC_REG to a value equivalent to CC_SRC. The instructions are in
7514 INSNS. The modes used by those instructions are in MODES. */
7517 for (i = 0; i < insn_count; ++i)
7519 if (modes[i] != mode)
7521 /* We need to change the mode of CC_REG in INSNS[i] and
7522 subsequent instructions. */
7525 if (GET_MODE (cc_reg) == mode)
7528 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7530 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7534 delete_insn (insns[i]);
7540 /* If we have a fixed condition code register (or two), walk through
7541 the instructions and try to eliminate duplicate assignments. */
7544 cse_condition_code_reg (void)
7546 unsigned int cc_regno_1;
7547 unsigned int cc_regno_2;
7552 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7555 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7556 if (cc_regno_2 != INVALID_REGNUM)
7557 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7559 cc_reg_2 = NULL_RTX;
7568 enum machine_mode mode;
7569 enum machine_mode orig_mode;
7571 /* Look for blocks which end with a conditional jump based on a
7572 condition code register. Then look for the instruction which
7573 sets the condition code register. Then look through the
7574 successor blocks for instructions which set the condition
7575 code register to the same value. There are other possible
7576 uses of the condition code register, but these are by far the
7577 most common and the ones which we are most likely to be able
7580 last_insn = BB_END (bb);
7581 if (!JUMP_P (last_insn))
7584 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7586 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7591 cc_src_insn = NULL_RTX;
7593 for (insn = PREV_INSN (last_insn);
7594 insn && insn != PREV_INSN (BB_HEAD (bb));
7595 insn = PREV_INSN (insn))
7599 if (! INSN_P (insn))
7601 set = single_set (insn);
7603 && REG_P (SET_DEST (set))
7604 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7607 cc_src = SET_SRC (set);
7610 else if (reg_set_p (cc_reg, insn))
7617 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7620 /* Now CC_REG is a condition code register used for a
7621 conditional jump at the end of the block, and CC_SRC, in
7622 CC_SRC_INSN, is the value to which that condition code
7623 register is set, and CC_SRC is still meaningful at the end of
7626 orig_mode = GET_MODE (cc_src);
7627 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
7628 if (mode != VOIDmode)
7630 gcc_assert (mode == GET_MODE (cc_src));
7631 if (mode != orig_mode)
7633 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7635 /* Change the mode of CC_REG in CC_SRC_INSN to
7636 GET_MODE (NEWREG). */
7637 for_each_rtx (&PATTERN (cc_src_insn), cse_change_cc_mode,
7639 for_each_rtx (®_NOTES (cc_src_insn), cse_change_cc_mode,
7642 /* Do the same in the following insns that use the
7643 current value of CC_REG within BB. */
7644 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7645 NEXT_INSN (last_insn),