1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92, 93, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Must precede rtl.h for FFS. */
27 #include "hard-reg-set.h"
30 #include "insn-config.h"
35 /* The basic idea of common subexpression elimination is to go
36 through the code, keeping a record of expressions that would
37 have the same value at the current scan point, and replacing
38 expressions encountered with the cheapest equivalent expression.
40 It is too complicated to keep track of the different possibilities
41 when control paths merge; so, at each label, we forget all that is
42 known and start fresh. This can be described as processing each
43 basic block separately. Note, however, that these are not quite
44 the same as the basic blocks found by a later pass and used for
45 data flow analysis and register packing. We do not need to start fresh
46 after a conditional jump instruction if there is no label there.
48 We use two data structures to record the equivalent expressions:
49 a hash table for most expressions, and several vectors together
50 with "quantity numbers" to record equivalent (pseudo) registers.
52 The use of the special data structure for registers is desirable
53 because it is faster. It is possible because registers references
54 contain a fairly small number, the register number, taken from
55 a contiguously allocated series, and two register references are
56 identical if they have the same number. General expressions
57 do not have any such thing, so the only way to retrieve the
58 information recorded on an expression other than a register
59 is to keep it in a hash table.
61 Registers and "quantity numbers":
63 At the start of each basic block, all of the (hardware and pseudo)
64 registers used in the function are given distinct quantity
65 numbers to indicate their contents. During scan, when the code
66 copies one register into another, we copy the quantity number.
67 When a register is loaded in any other way, we allocate a new
68 quantity number to describe the value generated by this operation.
69 `reg_qty' records what quantity a register is currently thought
72 All real quantity numbers are greater than or equal to `max_reg'.
73 If register N has not been assigned a quantity, reg_qty[N] will equal N.
75 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
76 variables should be referenced with an index below `max_reg'.
78 We also maintain a bidirectional chain of registers for each
79 quantity number. `qty_first_reg', `qty_last_reg',
80 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
82 The first register in a chain is the one whose lifespan is least local.
83 Among equals, it is the one that was seen first.
84 We replace any equivalent register with that one.
86 If two registers have the same quantity number, it must be true that
87 REG expressions with `qty_mode' must be in the hash table for both
88 registers and must be in the same class.
90 The converse is not true. Since hard registers may be referenced in
91 any mode, two REG expressions might be equivalent in the hash table
92 but not have the same quantity number if the quantity number of one
93 of the registers is not the same mode as those expressions.
95 Constants and quantity numbers
97 When a quantity has a known constant value, that value is stored
98 in the appropriate element of qty_const. This is in addition to
99 putting the constant in the hash table as is usual for non-regs.
101 Whether a reg or a constant is preferred is determined by the configuration
102 macro CONST_COSTS and will often depend on the constant value. In any
103 event, expressions containing constants can be simplified, by fold_rtx.
105 When a quantity has a known nearly constant value (such as an address
106 of a stack slot), that value is stored in the appropriate element
109 Integer constants don't have a machine mode. However, cse
110 determines the intended machine mode from the destination
111 of the instruction that moves the constant. The machine mode
112 is recorded in the hash table along with the actual RTL
113 constant expression so that different modes are kept separate.
117 To record known equivalences among expressions in general
118 we use a hash table called `table'. It has a fixed number of buckets
119 that contain chains of `struct table_elt' elements for expressions.
120 These chains connect the elements whose expressions have the same
123 Other chains through the same elements connect the elements which
124 currently have equivalent values.
126 Register references in an expression are canonicalized before hashing
127 the expression. This is done using `reg_qty' and `qty_first_reg'.
128 The hash code of a register reference is computed using the quantity
129 number, not the register number.
131 When the value of an expression changes, it is necessary to remove from the
132 hash table not just that expression but all expressions whose values
133 could be different as a result.
135 1. If the value changing is in memory, except in special cases
136 ANYTHING referring to memory could be changed. That is because
137 nobody knows where a pointer does not point.
138 The function `invalidate_memory' removes what is necessary.
140 The special cases are when the address is constant or is
141 a constant plus a fixed register such as the frame pointer
142 or a static chain pointer. When such addresses are stored in,
143 we can tell exactly which other such addresses must be invalidated
144 due to overlap. `invalidate' does this.
145 All expressions that refer to non-constant
146 memory addresses are also invalidated. `invalidate_memory' does this.
148 2. If the value changing is a register, all expressions
149 containing references to that register, and only those,
152 Because searching the entire hash table for expressions that contain
153 a register is very slow, we try to figure out when it isn't necessary.
154 Precisely, this is necessary only when expressions have been
155 entered in the hash table using this register, and then the value has
156 changed, and then another expression wants to be added to refer to
157 the register's new value. This sequence of circumstances is rare
158 within any one basic block.
160 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
161 reg_tick[i] is incremented whenever a value is stored in register i.
162 reg_in_table[i] holds -1 if no references to register i have been
163 entered in the table; otherwise, it contains the value reg_tick[i] had
164 when the references were entered. If we want to enter a reference
165 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
166 Until we want to enter a new entry, the mere fact that the two vectors
167 don't match makes the entries be ignored if anyone tries to match them.
169 Registers themselves are entered in the hash table as well as in
170 the equivalent-register chains. However, the vectors `reg_tick'
171 and `reg_in_table' do not apply to expressions which are simple
172 register references. These expressions are removed from the table
173 immediately when they become invalid, and this can be done even if
174 we do not immediately search for all the expressions that refer to
177 A CLOBBER rtx in an instruction invalidates its operand for further
178 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
179 invalidates everything that resides in memory.
183 Constant expressions that differ only by an additive integer
184 are called related. When a constant expression is put in
185 the table, the related expression with no constant term
186 is also entered. These are made to point at each other
187 so that it is possible to find out if there exists any
188 register equivalent to an expression related to a given expression. */
190 /* One plus largest register number used in this function. */
194 /* Length of vectors indexed by quantity number.
195 We know in advance we will not need a quantity number this big. */
199 /* Next quantity number to be allocated.
200 This is 1 + the largest number needed so far. */
204 /* Indexed by quantity number, gives the first (or last) (pseudo) register
205 in the chain of registers that currently contain this quantity. */
207 static int *qty_first_reg;
208 static int *qty_last_reg;
210 /* Index by quantity number, gives the mode of the quantity. */
212 static enum machine_mode *qty_mode;
214 /* Indexed by quantity number, gives the rtx of the constant value of the
215 quantity, or zero if it does not have a known value.
216 A sum of the frame pointer (or arg pointer) plus a constant
217 can also be entered here. */
219 static rtx *qty_const;
221 /* Indexed by qty number, gives the insn that stored the constant value
222 recorded in `qty_const'. */
224 static rtx *qty_const_insn;
226 /* The next three variables are used to track when a comparison between a
227 quantity and some constant or register has been passed. In that case, we
228 know the results of the comparison in case we see it again. These variables
229 record a comparison that is known to be true. */
231 /* Indexed by qty number, gives the rtx code of a comparison with a known
232 result involving this quantity. If none, it is UNKNOWN. */
233 static enum rtx_code *qty_comparison_code;
235 /* Indexed by qty number, gives the constant being compared against in a
236 comparison of known result. If no such comparison, it is undefined.
237 If the comparison is not with a constant, it is zero. */
239 static rtx *qty_comparison_const;
241 /* Indexed by qty number, gives the quantity being compared against in a
242 comparison of known result. If no such comparison, if it undefined.
243 If the comparison is not with a register, it is -1. */
245 static int *qty_comparison_qty;
248 /* For machines that have a CC0, we do not record its value in the hash
249 table since its use is guaranteed to be the insn immediately following
250 its definition and any other insn is presumed to invalidate it.
252 Instead, we store below the value last assigned to CC0. If it should
253 happen to be a constant, it is stored in preference to the actual
254 assigned value. In case it is a constant, we store the mode in which
255 the constant should be interpreted. */
257 static rtx prev_insn_cc0;
258 static enum machine_mode prev_insn_cc0_mode;
261 /* Previous actual insn. 0 if at first insn of basic block. */
263 static rtx prev_insn;
265 /* Insn being scanned. */
267 static rtx this_insn;
269 /* Index by (pseudo) register number, gives the quantity number
270 of the register's current contents. */
274 /* Index by (pseudo) register number, gives the number of the next (or
275 previous) (pseudo) register in the chain of registers sharing the same
278 Or -1 if this register is at the end of the chain.
280 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
282 static int *reg_next_eqv;
283 static int *reg_prev_eqv;
285 /* Index by (pseudo) register number, gives the number of times
286 that register has been altered in the current basic block. */
288 static int *reg_tick;
290 /* Index by (pseudo) register number, gives the reg_tick value at which
291 rtx's containing this register are valid in the hash table.
292 If this does not equal the current reg_tick value, such expressions
293 existing in the hash table are invalid.
294 If this is -1, no expressions containing this register have been
295 entered in the table. */
297 static int *reg_in_table;
299 /* A HARD_REG_SET containing all the hard registers for which there is
300 currently a REG expression in the hash table. Note the difference
301 from the above variables, which indicate if the REG is mentioned in some
302 expression in the table. */
304 static HARD_REG_SET hard_regs_in_table;
306 /* A HARD_REG_SET containing all the hard registers that are invalidated
309 static HARD_REG_SET regs_invalidated_by_call;
311 /* Two vectors of ints:
312 one containing max_reg -1's; the other max_reg + 500 (an approximation
313 for max_qty) elements where element i contains i.
314 These are used to initialize various other vectors fast. */
316 static int *all_minus_one;
317 static int *consec_ints;
319 /* CUID of insn that starts the basic block currently being cse-processed. */
321 static int cse_basic_block_start;
323 /* CUID of insn that ends the basic block currently being cse-processed. */
325 static int cse_basic_block_end;
327 /* Vector mapping INSN_UIDs to cuids.
328 The cuids are like uids but increase monotonically always.
329 We use them to see whether a reg is used outside a given basic block. */
331 static int *uid_cuid;
333 /* Highest UID in UID_CUID. */
336 /* Get the cuid of an insn. */
338 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
340 /* Nonzero if cse has altered conditional jump insns
341 in such a way that jump optimization should be redone. */
343 static int cse_jumps_altered;
345 /* canon_hash stores 1 in do_not_record
346 if it notices a reference to CC0, PC, or some other volatile
349 static int do_not_record;
351 #ifdef LOAD_EXTEND_OP
353 /* Scratch rtl used when looking for load-extended copy of a MEM. */
354 static rtx memory_extend_rtx;
357 /* canon_hash stores 1 in hash_arg_in_memory
358 if it notices a reference to memory within the expression being hashed. */
360 static int hash_arg_in_memory;
362 /* canon_hash stores 1 in hash_arg_in_struct
363 if it notices a reference to memory that's part of a structure. */
365 static int hash_arg_in_struct;
367 /* The hash table contains buckets which are chains of `struct table_elt's,
368 each recording one expression's information.
369 That expression is in the `exp' field.
371 Those elements with the same hash code are chained in both directions
372 through the `next_same_hash' and `prev_same_hash' fields.
374 Each set of expressions with equivalent values
375 are on a two-way chain through the `next_same_value'
376 and `prev_same_value' fields, and all point with
377 the `first_same_value' field at the first element in
378 that chain. The chain is in order of increasing cost.
379 Each element's cost value is in its `cost' field.
381 The `in_memory' field is nonzero for elements that
382 involve any reference to memory. These elements are removed
383 whenever a write is done to an unidentified location in memory.
384 To be safe, we assume that a memory address is unidentified unless
385 the address is either a symbol constant or a constant plus
386 the frame pointer or argument pointer.
388 The `in_struct' field is nonzero for elements that
389 involve any reference to memory inside a structure or array.
391 The `related_value' field is used to connect related expressions
392 (that differ by adding an integer).
393 The related expressions are chained in a circular fashion.
394 `related_value' is zero for expressions for which this
397 The `cost' field stores the cost of this element's expression.
399 The `is_const' flag is set if the element is a constant (including
402 The `flag' field is used as a temporary during some search routines.
404 The `mode' field is usually the same as GET_MODE (`exp'), but
405 if `exp' is a CONST_INT and has no machine mode then the `mode'
406 field is the mode it was being used as. Each constant is
407 recorded separately for each mode it is used with. */
413 struct table_elt *next_same_hash;
414 struct table_elt *prev_same_hash;
415 struct table_elt *next_same_value;
416 struct table_elt *prev_same_value;
417 struct table_elt *first_same_value;
418 struct table_elt *related_value;
420 enum machine_mode mode;
427 /* We don't want a lot of buckets, because we rarely have very many
428 things stored in the hash table, and a lot of buckets slows
429 down a lot of loops that happen frequently. */
432 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
433 register (hard registers may require `do_not_record' to be set). */
436 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
437 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
438 : canon_hash (X, M) % NBUCKETS)
440 /* Determine whether register number N is considered a fixed register for CSE.
441 It is desirable to replace other regs with fixed regs, to reduce need for
443 A reg wins if it is either the frame pointer or designated as fixed,
444 but not if it is an overlapping register. */
445 #ifdef OVERLAPPING_REGNO_P
446 #define FIXED_REGNO_P(N) \
447 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
448 || fixed_regs[N] || global_regs[N]) \
449 && ! OVERLAPPING_REGNO_P ((N)))
451 #define FIXED_REGNO_P(N) \
452 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
453 || fixed_regs[N] || global_regs[N])
456 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
457 hard registers and pointers into the frame are the cheapest with a cost
458 of 0. Next come pseudos with a cost of one and other hard registers with
459 a cost of 2. Aside from these special cases, call `rtx_cost'. */
461 #define CHEAP_REGNO(N) \
462 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
463 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
464 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
465 || ((N) < FIRST_PSEUDO_REGISTER \
466 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
468 /* A register is cheap if it is a user variable assigned to the register
469 or if its register number always corresponds to a cheap register. */
471 #define CHEAP_REG(N) \
472 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
473 || CHEAP_REGNO (REGNO (N)))
476 (GET_CODE (X) == REG \
477 ? (CHEAP_REG (X) ? 0 \
478 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
480 : rtx_cost (X, SET) * 2)
482 /* Determine if the quantity number for register X represents a valid index
483 into the `qty_...' variables. */
485 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
487 static struct table_elt *table[NBUCKETS];
489 /* Chain of `struct table_elt's made so far for this function
490 but currently removed from the table. */
492 static struct table_elt *free_element_chain;
494 /* Number of `struct table_elt' structures made so far for this function. */
496 static int n_elements_made;
498 /* Maximum value `n_elements_made' has had so far in this compilation
499 for functions previously processed. */
501 static int max_elements_made;
503 /* Surviving equivalence class when two equivalence classes are merged
504 by recording the effects of a jump in the last insn. Zero if the
505 last insn was not a conditional jump. */
507 static struct table_elt *last_jump_equiv_class;
509 /* Set to the cost of a constant pool reference if one was found for a
510 symbolic constant. If this was found, it means we should try to
511 convert constants into constant pool entries if they don't fit in
514 static int constant_pool_entries_cost;
516 /* Bits describing what kind of values in memory must be invalidated
517 for a particular instruction. If all three bits are zero,
518 no memory refs need to be invalidated. Each bit is more powerful
519 than the preceding ones, and if a bit is set then the preceding
522 Here is how the bits are set:
523 Pushing onto the stack invalidates only the stack pointer,
524 writing at a fixed address invalidates only variable addresses,
525 writing in a structure element at variable address
526 invalidates all but scalar variables,
527 and writing in anything else at variable address invalidates everything. */
531 int sp : 1; /* Invalidate stack pointer. */
532 int var : 1; /* Invalidate variable addresses. */
533 int nonscalar : 1; /* Invalidate all but scalar variables. */
534 int all : 1; /* Invalidate all memory refs. */
537 /* Define maximum length of a branch path. */
539 #define PATHLENGTH 10
541 /* This data describes a block that will be processed by cse_basic_block. */
543 struct cse_basic_block_data {
544 /* Lowest CUID value of insns in block. */
546 /* Highest CUID value of insns in block. */
548 /* Total number of SETs in block. */
550 /* Last insn in the block. */
552 /* Size of current branch path, if any. */
554 /* Current branch path, indicating which branches will be taken. */
556 /* The branch insn. */
558 /* Whether it should be taken or not. AROUND is the same as taken
559 except that it is used when the destination label is not preceded
561 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
565 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
566 virtual regs here because the simplify_*_operation routines are called
567 by integrate.c, which is called before virtual register instantiation. */
569 #define FIXED_BASE_PLUS_P(X) \
570 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
571 || (X) == arg_pointer_rtx \
572 || (X) == virtual_stack_vars_rtx \
573 || (X) == virtual_incoming_args_rtx \
574 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
575 && (XEXP (X, 0) == frame_pointer_rtx \
576 || XEXP (X, 0) == hard_frame_pointer_rtx \
577 || XEXP (X, 0) == arg_pointer_rtx \
578 || XEXP (X, 0) == virtual_stack_vars_rtx \
579 || XEXP (X, 0) == virtual_incoming_args_rtx)))
581 /* Similar, but also allows reference to the stack pointer.
583 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
584 arg_pointer_rtx by itself is nonzero, because on at least one machine,
585 the i960, the arg pointer is zero when it is unused. */
587 #define NONZERO_BASE_PLUS_P(X) \
588 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
589 || (X) == virtual_stack_vars_rtx \
590 || (X) == virtual_incoming_args_rtx \
591 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
592 && (XEXP (X, 0) == frame_pointer_rtx \
593 || XEXP (X, 0) == hard_frame_pointer_rtx \
594 || XEXP (X, 0) == arg_pointer_rtx \
595 || XEXP (X, 0) == virtual_stack_vars_rtx \
596 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
597 || (X) == stack_pointer_rtx \
598 || (X) == virtual_stack_dynamic_rtx \
599 || (X) == virtual_outgoing_args_rtx \
600 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
601 && (XEXP (X, 0) == stack_pointer_rtx \
602 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
603 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
605 static void new_basic_block PROTO((void));
606 static void make_new_qty PROTO((int));
607 static void make_regs_eqv PROTO((int, int));
608 static void delete_reg_equiv PROTO((int));
609 static int mention_regs PROTO((rtx));
610 static int insert_regs PROTO((rtx, struct table_elt *, int));
611 static void free_element PROTO((struct table_elt *));
612 static void remove_from_table PROTO((struct table_elt *, unsigned));
613 static struct table_elt *get_element PROTO((void));
614 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
615 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
616 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
617 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
619 static void merge_equiv_classes PROTO((struct table_elt *,
620 struct table_elt *));
621 static void invalidate PROTO((rtx));
622 static void remove_invalid_refs PROTO((int));
623 static void rehash_using_reg PROTO((rtx));
624 static void invalidate_memory PROTO((struct write_data *));
625 static void invalidate_for_call PROTO((void));
626 static rtx use_related_value PROTO((rtx, struct table_elt *));
627 static unsigned canon_hash PROTO((rtx, enum machine_mode));
628 static unsigned safe_hash PROTO((rtx, enum machine_mode));
629 static int exp_equiv_p PROTO((rtx, rtx, int, int));
630 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
633 static int refers_to_p PROTO((rtx, rtx));
634 static int refers_to_mem_p PROTO((rtx, rtx, HOST_WIDE_INT,
636 static int cse_rtx_addr_varies_p PROTO((rtx));
637 static rtx canon_reg PROTO((rtx, rtx));
638 static void find_best_addr PROTO((rtx, rtx *));
639 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
641 enum machine_mode *));
642 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
644 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
646 static rtx fold_rtx PROTO((rtx, rtx));
647 static rtx equiv_constant PROTO((rtx));
648 static void record_jump_equiv PROTO((rtx, int));
649 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
651 static void cse_insn PROTO((rtx, int));
652 static void note_mem_written PROTO((rtx, struct write_data *));
653 static void invalidate_from_clobbers PROTO((struct write_data *, rtx));
654 static rtx cse_process_notes PROTO((rtx, rtx));
655 static void cse_around_loop PROTO((rtx));
656 static void invalidate_skipped_set PROTO((rtx, rtx));
657 static void invalidate_skipped_block PROTO((rtx));
658 static void cse_check_loop_start PROTO((rtx, rtx));
659 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
660 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
661 static void count_reg_usage PROTO((rtx, int *, rtx, int));
663 extern int rtx_equal_function_value_matters;
665 /* Return an estimate of the cost of computing rtx X.
666 One use is in cse, to decide which expression to keep in the hash table.
667 Another is in rtl generation, to pick the cheapest way to multiply.
668 Other uses like the latter are expected in the future. */
670 /* Return the right cost to give to an operation
671 to make the cost of the corresponding register-to-register instruction
672 N times that of a fast register-to-register instruction. */
674 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
677 rtx_cost (x, outer_code)
679 enum rtx_code outer_code;
682 register enum rtx_code code;
689 /* Compute the default costs of certain things.
690 Note that RTX_COSTS can override the defaults. */
696 /* Count multiplication by 2**n as a shift,
697 because if we are considering it, we would output it as a shift. */
698 if (GET_CODE (XEXP (x, 1)) == CONST_INT
699 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
702 total = COSTS_N_INSNS (5);
708 total = COSTS_N_INSNS (7);
711 /* Used in loop.c and combine.c as a marker. */
715 /* We don't want these to be used in substitutions because
716 we have no way of validating the resulting insn. So assign
717 anything containing an ASM_OPERANDS a very high cost. */
727 return ! CHEAP_REG (x);
730 /* If we can't tie these modes, make this expensive. The larger
731 the mode, the more expensive it is. */
732 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
733 return COSTS_N_INSNS (2
734 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
737 RTX_COSTS (x, code, outer_code);
739 CONST_COSTS (x, code, outer_code);
742 /* Sum the costs of the sub-rtx's, plus cost of this operation,
743 which is already in total. */
745 fmt = GET_RTX_FORMAT (code);
746 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
748 total += rtx_cost (XEXP (x, i), code);
749 else if (fmt[i] == 'E')
750 for (j = 0; j < XVECLEN (x, i); j++)
751 total += rtx_cost (XVECEXP (x, i, j), code);
756 /* Clear the hash table and initialize each register with its own quantity,
757 for a new basic block. */
766 bzero (reg_tick, max_reg * sizeof (int));
768 bcopy (all_minus_one, reg_in_table, max_reg * sizeof (int));
769 bcopy (consec_ints, reg_qty, max_reg * sizeof (int));
770 CLEAR_HARD_REG_SET (hard_regs_in_table);
772 /* The per-quantity values used to be initialized here, but it is
773 much faster to initialize each as it is made in `make_new_qty'. */
775 for (i = 0; i < NBUCKETS; i++)
777 register struct table_elt *this, *next;
778 for (this = table[i]; this; this = next)
780 next = this->next_same_hash;
785 bzero (table, sizeof table);
794 /* Say that register REG contains a quantity not in any register before
795 and initialize that quantity. */
803 if (next_qty >= max_qty)
806 q = reg_qty[reg] = next_qty++;
807 qty_first_reg[q] = reg;
808 qty_last_reg[q] = reg;
809 qty_const[q] = qty_const_insn[q] = 0;
810 qty_comparison_code[q] = UNKNOWN;
812 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
815 /* Make reg NEW equivalent to reg OLD.
816 OLD is not changing; NEW is. */
819 make_regs_eqv (new, old)
820 register int new, old;
822 register int lastr, firstr;
823 register int q = reg_qty[old];
825 /* Nothing should become eqv until it has a "non-invalid" qty number. */
826 if (! REGNO_QTY_VALID_P (old))
830 firstr = qty_first_reg[q];
831 lastr = qty_last_reg[q];
833 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
834 hard regs. Among pseudos, if NEW will live longer than any other reg
835 of the same qty, and that is beyond the current basic block,
836 make it the new canonical replacement for this qty. */
837 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
838 /* Certain fixed registers might be of the class NO_REGS. This means
839 that not only can they not be allocated by the compiler, but
840 they cannot be used in substitutions or canonicalizations
842 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
843 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
844 || (new >= FIRST_PSEUDO_REGISTER
845 && (firstr < FIRST_PSEUDO_REGISTER
846 || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end
847 || (uid_cuid[regno_first_uid[new]]
848 < cse_basic_block_start))
849 && (uid_cuid[regno_last_uid[new]]
850 > uid_cuid[regno_last_uid[firstr]]))))))
852 reg_prev_eqv[firstr] = new;
853 reg_next_eqv[new] = firstr;
854 reg_prev_eqv[new] = -1;
855 qty_first_reg[q] = new;
859 /* If NEW is a hard reg (known to be non-fixed), insert at end.
860 Otherwise, insert before any non-fixed hard regs that are at the
861 end. Registers of class NO_REGS cannot be used as an
862 equivalent for anything. */
863 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
864 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
865 && new >= FIRST_PSEUDO_REGISTER)
866 lastr = reg_prev_eqv[lastr];
867 reg_next_eqv[new] = reg_next_eqv[lastr];
868 if (reg_next_eqv[lastr] >= 0)
869 reg_prev_eqv[reg_next_eqv[lastr]] = new;
871 qty_last_reg[q] = new;
872 reg_next_eqv[lastr] = new;
873 reg_prev_eqv[new] = lastr;
877 /* Remove REG from its equivalence class. */
880 delete_reg_equiv (reg)
883 register int q = reg_qty[reg];
886 /* If invalid, do nothing. */
890 p = reg_prev_eqv[reg];
891 n = reg_next_eqv[reg];
900 qty_first_reg[q] = n;
905 /* Remove any invalid expressions from the hash table
906 that refer to any of the registers contained in expression X.
908 Make sure that newly inserted references to those registers
909 as subexpressions will be considered valid.
911 mention_regs is not called when a register itself
912 is being stored in the table.
914 Return 1 if we have done something that may have changed the hash code
921 register enum rtx_code code;
924 register int changed = 0;
932 register int regno = REGNO (x);
933 register int endregno
934 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
935 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
938 for (i = regno; i < endregno; i++)
940 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
941 remove_invalid_refs (i);
943 reg_in_table[i] = reg_tick[i];
949 /* If X is a comparison or a COMPARE and either operand is a register
950 that does not have a quantity, give it one. This is so that a later
951 call to record_jump_equiv won't cause X to be assigned a different
952 hash code and not found in the table after that call.
954 It is not necessary to do this here, since rehash_using_reg can
955 fix up the table later, but doing this here eliminates the need to
956 call that expensive function in the most common case where the only
957 use of the register is in the comparison. */
959 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
961 if (GET_CODE (XEXP (x, 0)) == REG
962 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
963 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
965 rehash_using_reg (XEXP (x, 0));
969 if (GET_CODE (XEXP (x, 1)) == REG
970 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
971 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
973 rehash_using_reg (XEXP (x, 1));
978 fmt = GET_RTX_FORMAT (code);
979 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
981 changed |= mention_regs (XEXP (x, i));
982 else if (fmt[i] == 'E')
983 for (j = 0; j < XVECLEN (x, i); j++)
984 changed |= mention_regs (XVECEXP (x, i, j));
989 /* Update the register quantities for inserting X into the hash table
990 with a value equivalent to CLASSP.
991 (If the class does not contain a REG, it is irrelevant.)
992 If MODIFIED is nonzero, X is a destination; it is being modified.
993 Note that delete_reg_equiv should be called on a register
994 before insert_regs is done on that register with MODIFIED != 0.
996 Nonzero value means that elements of reg_qty have changed
997 so X's hash code may be different. */
1000 insert_regs (x, classp, modified)
1002 struct table_elt *classp;
1005 if (GET_CODE (x) == REG)
1007 register int regno = REGNO (x);
1009 /* If REGNO is in the equivalence table already but is of the
1010 wrong mode for that equivalence, don't do anything here. */
1012 if (REGNO_QTY_VALID_P (regno)
1013 && qty_mode[reg_qty[regno]] != GET_MODE (x))
1016 if (modified || ! REGNO_QTY_VALID_P (regno))
1019 for (classp = classp->first_same_value;
1021 classp = classp->next_same_value)
1022 if (GET_CODE (classp->exp) == REG
1023 && GET_MODE (classp->exp) == GET_MODE (x))
1025 make_regs_eqv (regno, REGNO (classp->exp));
1029 make_new_qty (regno);
1030 qty_mode[reg_qty[regno]] = GET_MODE (x);
1037 /* If X is a SUBREG, we will likely be inserting the inner register in the
1038 table. If that register doesn't have an assigned quantity number at
1039 this point but does later, the insertion that we will be doing now will
1040 not be accessible because its hash code will have changed. So assign
1041 a quantity number now. */
1043 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1044 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1046 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1047 mention_regs (SUBREG_REG (x));
1051 return mention_regs (x);
1054 /* Look in or update the hash table. */
1056 /* Put the element ELT on the list of free elements. */
1060 struct table_elt *elt;
1062 elt->next_same_hash = free_element_chain;
1063 free_element_chain = elt;
1066 /* Return an element that is free for use. */
1068 static struct table_elt *
1071 struct table_elt *elt = free_element_chain;
1074 free_element_chain = elt->next_same_hash;
1078 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1081 /* Remove table element ELT from use in the table.
1082 HASH is its hash code, made using the HASH macro.
1083 It's an argument because often that is known in advance
1084 and we save much time not recomputing it. */
1087 remove_from_table (elt, hash)
1088 register struct table_elt *elt;
1094 /* Mark this element as removed. See cse_insn. */
1095 elt->first_same_value = 0;
1097 /* Remove the table element from its equivalence class. */
1100 register struct table_elt *prev = elt->prev_same_value;
1101 register struct table_elt *next = elt->next_same_value;
1103 if (next) next->prev_same_value = prev;
1106 prev->next_same_value = next;
1109 register struct table_elt *newfirst = next;
1112 next->first_same_value = newfirst;
1113 next = next->next_same_value;
1118 /* Remove the table element from its hash bucket. */
1121 register struct table_elt *prev = elt->prev_same_hash;
1122 register struct table_elt *next = elt->next_same_hash;
1124 if (next) next->prev_same_hash = prev;
1127 prev->next_same_hash = next;
1128 else if (table[hash] == elt)
1132 /* This entry is not in the proper hash bucket. This can happen
1133 when two classes were merged by `merge_equiv_classes'. Search
1134 for the hash bucket that it heads. This happens only very
1135 rarely, so the cost is acceptable. */
1136 for (hash = 0; hash < NBUCKETS; hash++)
1137 if (table[hash] == elt)
1142 /* Remove the table element from its related-value circular chain. */
1144 if (elt->related_value != 0 && elt->related_value != elt)
1146 register struct table_elt *p = elt->related_value;
1147 while (p->related_value != elt)
1148 p = p->related_value;
1149 p->related_value = elt->related_value;
1150 if (p->related_value == p)
1151 p->related_value = 0;
1157 /* Look up X in the hash table and return its table element,
1158 or 0 if X is not in the table.
1160 MODE is the machine-mode of X, or if X is an integer constant
1161 with VOIDmode then MODE is the mode with which X will be used.
1163 Here we are satisfied to find an expression whose tree structure
1166 static struct table_elt *
1167 lookup (x, hash, mode)
1170 enum machine_mode mode;
1172 register struct table_elt *p;
1174 for (p = table[hash]; p; p = p->next_same_hash)
1175 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1176 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1182 /* Like `lookup' but don't care whether the table element uses invalid regs.
1183 Also ignore discrepancies in the machine mode of a register. */
1185 static struct table_elt *
1186 lookup_for_remove (x, hash, mode)
1189 enum machine_mode mode;
1191 register struct table_elt *p;
1193 if (GET_CODE (x) == REG)
1195 int regno = REGNO (x);
1196 /* Don't check the machine mode when comparing registers;
1197 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1198 for (p = table[hash]; p; p = p->next_same_hash)
1199 if (GET_CODE (p->exp) == REG
1200 && REGNO (p->exp) == regno)
1205 for (p = table[hash]; p; p = p->next_same_hash)
1206 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1213 /* Look for an expression equivalent to X and with code CODE.
1214 If one is found, return that expression. */
1217 lookup_as_function (x, code)
1221 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1226 for (p = p->first_same_value; p; p = p->next_same_value)
1228 if (GET_CODE (p->exp) == code
1229 /* Make sure this is a valid entry in the table. */
1230 && exp_equiv_p (p->exp, p->exp, 1, 0))
1237 /* Insert X in the hash table, assuming HASH is its hash code
1238 and CLASSP is an element of the class it should go in
1239 (or 0 if a new class should be made).
1240 It is inserted at the proper position to keep the class in
1241 the order cheapest first.
1243 MODE is the machine-mode of X, or if X is an integer constant
1244 with VOIDmode then MODE is the mode with which X will be used.
1246 For elements of equal cheapness, the most recent one
1247 goes in front, except that the first element in the list
1248 remains first unless a cheaper element is added. The order of
1249 pseudo-registers does not matter, as canon_reg will be called to
1250 find the cheapest when a register is retrieved from the table.
1252 The in_memory field in the hash table element is set to 0.
1253 The caller must set it nonzero if appropriate.
1255 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1256 and if insert_regs returns a nonzero value
1257 you must then recompute its hash code before calling here.
1259 If necessary, update table showing constant values of quantities. */
1261 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1263 static struct table_elt *
1264 insert (x, classp, hash, mode)
1266 register struct table_elt *classp;
1268 enum machine_mode mode;
1270 register struct table_elt *elt;
1272 /* If X is a register and we haven't made a quantity for it,
1273 something is wrong. */
1274 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1277 /* If X is a hard register, show it is being put in the table. */
1278 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1280 int regno = REGNO (x);
1281 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1284 for (i = regno; i < endregno; i++)
1285 SET_HARD_REG_BIT (hard_regs_in_table, i);
1289 /* Put an element for X into the right hash bucket. */
1291 elt = get_element ();
1293 elt->cost = COST (x);
1294 elt->next_same_value = 0;
1295 elt->prev_same_value = 0;
1296 elt->next_same_hash = table[hash];
1297 elt->prev_same_hash = 0;
1298 elt->related_value = 0;
1301 elt->is_const = (CONSTANT_P (x)
1302 /* GNU C++ takes advantage of this for `this'
1303 (and other const values). */
1304 || (RTX_UNCHANGING_P (x)
1305 && GET_CODE (x) == REG
1306 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1307 || FIXED_BASE_PLUS_P (x));
1310 table[hash]->prev_same_hash = elt;
1313 /* Put it into the proper value-class. */
1316 classp = classp->first_same_value;
1317 if (CHEAPER (elt, classp))
1318 /* Insert at the head of the class */
1320 register struct table_elt *p;
1321 elt->next_same_value = classp;
1322 classp->prev_same_value = elt;
1323 elt->first_same_value = elt;
1325 for (p = classp; p; p = p->next_same_value)
1326 p->first_same_value = elt;
1330 /* Insert not at head of the class. */
1331 /* Put it after the last element cheaper than X. */
1332 register struct table_elt *p, *next;
1333 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1335 /* Put it after P and before NEXT. */
1336 elt->next_same_value = next;
1338 next->prev_same_value = elt;
1339 elt->prev_same_value = p;
1340 p->next_same_value = elt;
1341 elt->first_same_value = classp;
1345 elt->first_same_value = elt;
1347 /* If this is a constant being set equivalent to a register or a register
1348 being set equivalent to a constant, note the constant equivalence.
1350 If this is a constant, it cannot be equivalent to a different constant,
1351 and a constant is the only thing that can be cheaper than a register. So
1352 we know the register is the head of the class (before the constant was
1355 If this is a register that is not already known equivalent to a
1356 constant, we must check the entire class.
1358 If this is a register that is already known equivalent to an insn,
1359 update `qty_const_insn' to show that `this_insn' is the latest
1360 insn making that quantity equivalent to the constant. */
1362 if (elt->is_const && classp && GET_CODE (classp->exp) == REG)
1364 qty_const[reg_qty[REGNO (classp->exp)]]
1365 = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1366 qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1369 else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]])
1371 register struct table_elt *p;
1373 for (p = classp; p != 0; p = p->next_same_value)
1377 qty_const[reg_qty[REGNO (x)]]
1378 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1379 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1385 else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1386 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1387 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1389 /* If this is a constant with symbolic value,
1390 and it has a term with an explicit integer value,
1391 link it up with related expressions. */
1392 if (GET_CODE (x) == CONST)
1394 rtx subexp = get_related_value (x);
1396 struct table_elt *subelt, *subelt_prev;
1400 /* Get the integer-free subexpression in the hash table. */
1401 subhash = safe_hash (subexp, mode) % NBUCKETS;
1402 subelt = lookup (subexp, subhash, mode);
1404 subelt = insert (subexp, NULL_PTR, subhash, mode);
1405 /* Initialize SUBELT's circular chain if it has none. */
1406 if (subelt->related_value == 0)
1407 subelt->related_value = subelt;
1408 /* Find the element in the circular chain that precedes SUBELT. */
1409 subelt_prev = subelt;
1410 while (subelt_prev->related_value != subelt)
1411 subelt_prev = subelt_prev->related_value;
1412 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1413 This way the element that follows SUBELT is the oldest one. */
1414 elt->related_value = subelt_prev->related_value;
1415 subelt_prev->related_value = elt;
1422 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1423 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1424 the two classes equivalent.
1426 CLASS1 will be the surviving class; CLASS2 should not be used after this
1429 Any invalid entries in CLASS2 will not be copied. */
1432 merge_equiv_classes (class1, class2)
1433 struct table_elt *class1, *class2;
1435 struct table_elt *elt, *next, *new;
1437 /* Ensure we start with the head of the classes. */
1438 class1 = class1->first_same_value;
1439 class2 = class2->first_same_value;
1441 /* If they were already equal, forget it. */
1442 if (class1 == class2)
1445 for (elt = class2; elt; elt = next)
1449 enum machine_mode mode = elt->mode;
1451 next = elt->next_same_value;
1453 /* Remove old entry, make a new one in CLASS1's class.
1454 Don't do this for invalid entries as we cannot find their
1455 hash code (it also isn't necessary). */
1456 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1458 hash_arg_in_memory = 0;
1459 hash_arg_in_struct = 0;
1460 hash = HASH (exp, mode);
1462 if (GET_CODE (exp) == REG)
1463 delete_reg_equiv (REGNO (exp));
1465 remove_from_table (elt, hash);
1467 if (insert_regs (exp, class1, 0))
1468 hash = HASH (exp, mode);
1469 new = insert (exp, class1, hash, mode);
1470 new->in_memory = hash_arg_in_memory;
1471 new->in_struct = hash_arg_in_struct;
1476 /* Remove from the hash table, or mark as invalid,
1477 all expressions whose values could be altered by storing in X.
1478 X is a register, a subreg, or a memory reference with nonvarying address
1479 (because, when a memory reference with a varying address is stored in,
1480 all memory references are removed by invalidate_memory
1481 so specific invalidation is superfluous).
1483 A nonvarying address may be just a register or just
1484 a symbol reference, or it may be either of those plus
1485 a numeric offset. */
1492 register struct table_elt *p;
1494 HOST_WIDE_INT start, end;
1496 /* If X is a register, dependencies on its contents
1497 are recorded through the qty number mechanism.
1498 Just change the qty number of the register,
1499 mark it as invalid for expressions that refer to it,
1500 and remove it itself. */
1502 if (GET_CODE (x) == REG)
1504 register int regno = REGNO (x);
1505 register unsigned hash = HASH (x, GET_MODE (x));
1507 /* Remove REGNO from any quantity list it might be on and indicate
1508 that it's value might have changed. If it is a pseudo, remove its
1509 entry from the hash table.
1511 For a hard register, we do the first two actions above for any
1512 additional hard registers corresponding to X. Then, if any of these
1513 registers are in the table, we must remove any REG entries that
1514 overlap these registers. */
1516 delete_reg_equiv (regno);
1519 if (regno >= FIRST_PSEUDO_REGISTER)
1520 remove_from_table (lookup_for_remove (x, hash, GET_MODE (x)), hash);
1523 HOST_WIDE_INT in_table
1524 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1525 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1526 int tregno, tendregno;
1527 register struct table_elt *p, *next;
1529 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1531 for (i = regno + 1; i < endregno; i++)
1533 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1534 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1535 delete_reg_equiv (i);
1540 for (hash = 0; hash < NBUCKETS; hash++)
1541 for (p = table[hash]; p; p = next)
1543 next = p->next_same_hash;
1545 if (GET_CODE (p->exp) != REG
1546 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1549 tregno = REGNO (p->exp);
1551 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1552 if (tendregno > regno && tregno < endregno)
1553 remove_from_table (p, hash);
1560 if (GET_CODE (x) == SUBREG)
1562 if (GET_CODE (SUBREG_REG (x)) != REG)
1564 invalidate (SUBREG_REG (x));
1568 /* X is not a register; it must be a memory reference with
1569 a nonvarying address. Remove all hash table elements
1570 that refer to overlapping pieces of memory. */
1572 if (GET_CODE (x) != MEM)
1575 set_nonvarying_address_components (XEXP (x, 0), GET_MODE_SIZE (GET_MODE (x)),
1576 &base, &start, &end);
1578 for (i = 0; i < NBUCKETS; i++)
1580 register struct table_elt *next;
1581 for (p = table[i]; p; p = next)
1583 next = p->next_same_hash;
1584 if (refers_to_mem_p (p->exp, base, start, end))
1585 remove_from_table (p, i);
1590 /* Remove all expressions that refer to register REGNO,
1591 since they are already invalid, and we are about to
1592 mark that register valid again and don't want the old
1593 expressions to reappear as valid. */
1596 remove_invalid_refs (regno)
1600 register struct table_elt *p, *next;
1602 for (i = 0; i < NBUCKETS; i++)
1603 for (p = table[i]; p; p = next)
1605 next = p->next_same_hash;
1606 if (GET_CODE (p->exp) != REG
1607 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1608 remove_from_table (p, i);
1612 /* Recompute the hash codes of any valid entries in the hash table that
1613 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1615 This is called when we make a jump equivalence. */
1618 rehash_using_reg (x)
1622 struct table_elt *p, *next;
1625 if (GET_CODE (x) == SUBREG)
1628 /* If X is not a register or if the register is known not to be in any
1629 valid entries in the table, we have no work to do. */
1631 if (GET_CODE (x) != REG
1632 || reg_in_table[REGNO (x)] < 0
1633 || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1636 /* Scan all hash chains looking for valid entries that mention X.
1637 If we find one and it is in the wrong hash chain, move it. We can skip
1638 objects that are registers, since they are handled specially. */
1640 for (i = 0; i < NBUCKETS; i++)
1641 for (p = table[i]; p; p = next)
1643 next = p->next_same_hash;
1644 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1645 && exp_equiv_p (p->exp, p->exp, 1, 0)
1646 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1648 if (p->next_same_hash)
1649 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1651 if (p->prev_same_hash)
1652 p->prev_same_hash->next_same_hash = p->next_same_hash;
1654 table[i] = p->next_same_hash;
1656 p->next_same_hash = table[hash];
1657 p->prev_same_hash = 0;
1659 table[hash]->prev_same_hash = p;
1665 /* Remove from the hash table all expressions that reference memory,
1666 or some of them as specified by *WRITES. */
1669 invalidate_memory (writes)
1670 struct write_data *writes;
1673 register struct table_elt *p, *next;
1674 int all = writes->all;
1675 int nonscalar = writes->nonscalar;
1677 for (i = 0; i < NBUCKETS; i++)
1678 for (p = table[i]; p; p = next)
1680 next = p->next_same_hash;
1683 || (nonscalar && p->in_struct)
1684 || cse_rtx_addr_varies_p (p->exp)))
1685 remove_from_table (p, i);
1689 /* Remove from the hash table any expression that is a call-clobbered
1690 register. Also update their TICK values. */
1693 invalidate_for_call ()
1695 int regno, endregno;
1698 struct table_elt *p, *next;
1701 /* Go through all the hard registers. For each that is clobbered in
1702 a CALL_INSN, remove the register from quantity chains and update
1703 reg_tick if defined. Also see if any of these registers is currently
1706 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1707 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1709 delete_reg_equiv (regno);
1710 if (reg_tick[regno] >= 0)
1713 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1716 /* In the case where we have no call-clobbered hard registers in the
1717 table, we are done. Otherwise, scan the table and remove any
1718 entry that overlaps a call-clobbered register. */
1721 for (hash = 0; hash < NBUCKETS; hash++)
1722 for (p = table[hash]; p; p = next)
1724 next = p->next_same_hash;
1726 if (GET_CODE (p->exp) != REG
1727 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1730 regno = REGNO (p->exp);
1731 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1733 for (i = regno; i < endregno; i++)
1734 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1736 remove_from_table (p, hash);
1742 /* Given an expression X of type CONST,
1743 and ELT which is its table entry (or 0 if it
1744 is not in the hash table),
1745 return an alternate expression for X as a register plus integer.
1746 If none can be found, return 0. */
1749 use_related_value (x, elt)
1751 struct table_elt *elt;
1753 register struct table_elt *relt = 0;
1754 register struct table_elt *p, *q;
1755 HOST_WIDE_INT offset;
1757 /* First, is there anything related known?
1758 If we have a table element, we can tell from that.
1759 Otherwise, must look it up. */
1761 if (elt != 0 && elt->related_value != 0)
1763 else if (elt == 0 && GET_CODE (x) == CONST)
1765 rtx subexp = get_related_value (x);
1767 relt = lookup (subexp,
1768 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1775 /* Search all related table entries for one that has an
1776 equivalent register. */
1781 /* This loop is strange in that it is executed in two different cases.
1782 The first is when X is already in the table. Then it is searching
1783 the RELATED_VALUE list of X's class (RELT). The second case is when
1784 X is not in the table. Then RELT points to a class for the related
1787 Ensure that, whatever case we are in, that we ignore classes that have
1788 the same value as X. */
1790 if (rtx_equal_p (x, p->exp))
1793 for (q = p->first_same_value; q; q = q->next_same_value)
1794 if (GET_CODE (q->exp) == REG)
1800 p = p->related_value;
1802 /* We went all the way around, so there is nothing to be found.
1803 Alternatively, perhaps RELT was in the table for some other reason
1804 and it has no related values recorded. */
1805 if (p == relt || p == 0)
1812 offset = (get_integer_term (x) - get_integer_term (p->exp));
1813 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1814 return plus_constant (q->exp, offset);
1817 /* Hash an rtx. We are careful to make sure the value is never negative.
1818 Equivalent registers hash identically.
1819 MODE is used in hashing for CONST_INTs only;
1820 otherwise the mode of X is used.
1822 Store 1 in do_not_record if any subexpression is volatile.
1824 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1825 which does not have the RTX_UNCHANGING_P bit set.
1826 In this case, also store 1 in hash_arg_in_struct
1827 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1829 Note that cse_insn knows that the hash code of a MEM expression
1830 is just (int) MEM plus the hash code of the address. */
1833 canon_hash (x, mode)
1835 enum machine_mode mode;
1838 register unsigned hash = 0;
1839 register enum rtx_code code;
1842 /* repeat is used to turn tail-recursion into iteration. */
1847 code = GET_CODE (x);
1852 register int regno = REGNO (x);
1854 /* On some machines, we can't record any non-fixed hard register,
1855 because extending its life will cause reload problems. We
1856 consider ap, fp, and sp to be fixed for this purpose.
1857 On all machines, we can't record any global registers. */
1859 if (regno < FIRST_PSEUDO_REGISTER
1860 && (global_regs[regno]
1861 #ifdef SMALL_REGISTER_CLASSES
1862 || (! fixed_regs[regno]
1863 && regno != FRAME_POINTER_REGNUM
1864 && regno != HARD_FRAME_POINTER_REGNUM
1865 && regno != ARG_POINTER_REGNUM
1866 && regno != STACK_POINTER_REGNUM)
1873 hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno];
1879 unsigned HOST_WIDE_INT tem = INTVAL (x);
1880 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
1885 /* This is like the general case, except that it only counts
1886 the integers representing the constant. */
1887 hash += (unsigned) code + (unsigned) GET_MODE (x);
1888 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1890 unsigned tem = XINT (x, i);
1895 /* Assume there is only one rtx object for any given label. */
1898 += ((unsigned) LABEL_REF << 7) + (unsigned HOST_WIDE_INT) XEXP (x, 0);
1903 += ((unsigned) SYMBOL_REF << 7) + (unsigned HOST_WIDE_INT) XEXP (x, 0);
1907 if (MEM_VOLATILE_P (x))
1912 if (! RTX_UNCHANGING_P (x))
1914 hash_arg_in_memory = 1;
1915 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
1917 /* Now that we have already found this special case,
1918 might as well speed it up as much as possible. */
1919 hash += (unsigned) MEM;
1930 case UNSPEC_VOLATILE:
1935 if (MEM_VOLATILE_P (x))
1942 i = GET_RTX_LENGTH (code) - 1;
1943 hash += (unsigned) code + (unsigned) GET_MODE (x);
1944 fmt = GET_RTX_FORMAT (code);
1949 rtx tem = XEXP (x, i);
1952 /* If the operand is a REG that is equivalent to a constant, hash
1953 as if we were hashing the constant, since we will be comparing
1955 if (tem != 0 && GET_CODE (tem) == REG
1956 && REGNO_QTY_VALID_P (REGNO (tem))
1957 && qty_mode[reg_qty[REGNO (tem)]] == GET_MODE (tem)
1958 && (tem1 = qty_const[reg_qty[REGNO (tem)]]) != 0
1959 && CONSTANT_P (tem1))
1962 /* If we are about to do the last recursive call
1963 needed at this level, change it into iteration.
1964 This function is called enough to be worth it. */
1970 hash += canon_hash (tem, 0);
1972 else if (fmt[i] == 'E')
1973 for (j = 0; j < XVECLEN (x, i); j++)
1974 hash += canon_hash (XVECEXP (x, i, j), 0);
1975 else if (fmt[i] == 's')
1977 register unsigned char *p = (unsigned char *) XSTR (x, i);
1982 else if (fmt[i] == 'i')
1984 register unsigned tem = XINT (x, i);
1993 /* Like canon_hash but with no side effects. */
1998 enum machine_mode mode;
2000 int save_do_not_record = do_not_record;
2001 int save_hash_arg_in_memory = hash_arg_in_memory;
2002 int save_hash_arg_in_struct = hash_arg_in_struct;
2003 unsigned hash = canon_hash (x, mode);
2004 hash_arg_in_memory = save_hash_arg_in_memory;
2005 hash_arg_in_struct = save_hash_arg_in_struct;
2006 do_not_record = save_do_not_record;
2010 /* Return 1 iff X and Y would canonicalize into the same thing,
2011 without actually constructing the canonicalization of either one.
2012 If VALIDATE is nonzero,
2013 we assume X is an expression being processed from the rtl
2014 and Y was found in the hash table. We check register refs
2015 in Y for being marked as valid.
2017 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2018 that is known to be in the register. Ordinarily, we don't allow them
2019 to match, because letting them match would cause unpredictable results
2020 in all the places that search a hash table chain for an equivalent
2021 for a given value. A possible equivalent that has different structure
2022 has its hash code computed from different data. Whether the hash code
2023 is the same as that of the the given value is pure luck. */
2026 exp_equiv_p (x, y, validate, equal_values)
2032 register enum rtx_code code;
2035 /* Note: it is incorrect to assume an expression is equivalent to itself
2036 if VALIDATE is nonzero. */
2037 if (x == y && !validate)
2039 if (x == 0 || y == 0)
2042 code = GET_CODE (x);
2043 if (code != GET_CODE (y))
2048 /* If X is a constant and Y is a register or vice versa, they may be
2049 equivalent. We only have to validate if Y is a register. */
2050 if (CONSTANT_P (x) && GET_CODE (y) == REG
2051 && REGNO_QTY_VALID_P (REGNO (y))
2052 && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
2053 && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
2054 && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
2057 if (CONSTANT_P (y) && code == REG
2058 && REGNO_QTY_VALID_P (REGNO (x))
2059 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2060 && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
2066 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2067 if (GET_MODE (x) != GET_MODE (y))
2077 return INTVAL (x) == INTVAL (y);
2081 return XEXP (x, 0) == XEXP (y, 0);
2085 int regno = REGNO (y);
2087 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2088 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2091 /* If the quantities are not the same, the expressions are not
2092 equivalent. If there are and we are not to validate, they
2093 are equivalent. Otherwise, ensure all regs are up-to-date. */
2095 if (reg_qty[REGNO (x)] != reg_qty[regno])
2101 for (i = regno; i < endregno; i++)
2102 if (reg_in_table[i] != reg_tick[i])
2108 /* For commutative operations, check both orders. */
2116 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2117 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2118 validate, equal_values))
2119 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2120 validate, equal_values)
2121 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2122 validate, equal_values)));
2125 /* Compare the elements. If any pair of corresponding elements
2126 fail to match, return 0 for the whole things. */
2128 fmt = GET_RTX_FORMAT (code);
2129 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2134 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2139 if (XVECLEN (x, i) != XVECLEN (y, i))
2141 for (j = 0; j < XVECLEN (x, i); j++)
2142 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2143 validate, equal_values))
2148 if (strcmp (XSTR (x, i), XSTR (y, i)))
2153 if (XINT (x, i) != XINT (y, i))
2158 if (XWINT (x, i) != XWINT (y, i))
2173 /* Return 1 iff any subexpression of X matches Y.
2174 Here we do not require that X or Y be valid (for registers referred to)
2175 for being in the hash table. */
2182 register enum rtx_code code;
2188 if (x == 0 || y == 0)
2191 code = GET_CODE (x);
2192 /* If X as a whole has the same code as Y, they may match.
2194 if (code == GET_CODE (y))
2196 if (exp_equiv_p (x, y, 0, 1))
2200 /* X does not match, so try its subexpressions. */
2202 fmt = GET_RTX_FORMAT (code);
2203 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2212 if (refers_to_p (XEXP (x, i), y))
2215 else if (fmt[i] == 'E')
2218 for (j = 0; j < XVECLEN (x, i); j++)
2219 if (refers_to_p (XVECEXP (x, i, j), y))
2226 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2227 set PBASE, PSTART, and PEND which correspond to the base of the address,
2228 the starting offset, and ending offset respectively.
2230 ADDR is known to be a nonvarying address.
2232 cse_address_varies_p returns zero for nonvarying addresses. */
2235 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2239 HOST_WIDE_INT *pstart, *pend;
2248 /* Registers with nonvarying addresses usually have constant equivalents;
2249 but the frame pointer register is also possible. */
2250 if (GET_CODE (base) == REG
2252 && REGNO_QTY_VALID_P (REGNO (base))
2253 && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
2254 && qty_const[reg_qty[REGNO (base)]] != 0)
2255 base = qty_const[reg_qty[REGNO (base)]];
2256 else if (GET_CODE (base) == PLUS
2257 && GET_CODE (XEXP (base, 1)) == CONST_INT
2258 && GET_CODE (XEXP (base, 0)) == REG
2260 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2261 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2262 == GET_MODE (XEXP (base, 0)))
2263 && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
2265 start = INTVAL (XEXP (base, 1));
2266 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2269 /* By definition, operand1 of a LO_SUM is the associated constant
2270 address. Use the associated constant address as the base instead. */
2271 if (GET_CODE (base) == LO_SUM)
2272 base = XEXP (base, 1);
2274 /* Strip off CONST. */
2275 if (GET_CODE (base) == CONST)
2276 base = XEXP (base, 0);
2278 if (GET_CODE (base) == PLUS
2279 && GET_CODE (XEXP (base, 1)) == CONST_INT)
2281 start += INTVAL (XEXP (base, 1));
2282 base = XEXP (base, 0);
2287 /* Set the return values. */
2293 /* Return 1 iff any subexpression of X refers to memory
2294 at an address of BASE plus some offset
2295 such that any of the bytes' offsets fall between START (inclusive)
2296 and END (exclusive).
2298 The value is undefined if X is a varying address (as determined by
2299 cse_rtx_addr_varies_p). This function is not used in such cases.
2301 When used in the cse pass, `qty_const' is nonzero, and it is used
2302 to treat an address that is a register with a known constant value
2303 as if it were that constant value.
2304 In the loop pass, `qty_const' is zero, so this is not done. */
2307 refers_to_mem_p (x, base, start, end)
2309 HOST_WIDE_INT start, end;
2311 register HOST_WIDE_INT i;
2312 register enum rtx_code code;
2315 if (GET_CODE (base) == CONST_INT)
2317 start += INTVAL (base);
2318 end += INTVAL (base);
2326 code = GET_CODE (x);
2329 register rtx addr = XEXP (x, 0); /* Get the address. */
2331 HOST_WIDE_INT mystart, myend;
2333 set_nonvarying_address_components (addr, GET_MODE_SIZE (GET_MODE (x)),
2334 &mybase, &mystart, &myend);
2337 /* refers_to_mem_p is never called with varying addresses.
2338 If the base addresses are not equal, there is no chance
2339 of the memory addresses conflicting. */
2340 if (! rtx_equal_p (mybase, base))
2343 return myend > start && mystart < end;
2346 /* X does not match, so try its subexpressions. */
2348 fmt = GET_RTX_FORMAT (code);
2349 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2358 if (refers_to_mem_p (XEXP (x, i), base, start, end))
2361 else if (fmt[i] == 'E')
2364 for (j = 0; j < XVECLEN (x, i); j++)
2365 if (refers_to_mem_p (XVECEXP (x, i, j), base, start, end))
2372 /* Nonzero if X refers to memory at a varying address;
2373 except that a register which has at the moment a known constant value
2374 isn't considered variable. */
2377 cse_rtx_addr_varies_p (x)
2380 /* We need not check for X and the equivalence class being of the same
2381 mode because if X is equivalent to a constant in some mode, it
2382 doesn't vary in any mode. */
2384 if (GET_CODE (x) == MEM
2385 && GET_CODE (XEXP (x, 0)) == REG
2386 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2387 && GET_MODE (XEXP (x, 0)) == qty_mode[reg_qty[REGNO (XEXP (x, 0))]]
2388 && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0)
2391 if (GET_CODE (x) == MEM
2392 && GET_CODE (XEXP (x, 0)) == PLUS
2393 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
2394 && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
2395 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0)))
2396 && (GET_MODE (XEXP (XEXP (x, 0), 0))
2397 == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2398 && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2401 return rtx_addr_varies_p (x);
2404 /* Canonicalize an expression:
2405 replace each register reference inside it
2406 with the "oldest" equivalent register.
2408 If INSN is non-zero and we are replacing a pseudo with a hard register
2409 or vice versa, validate_change is used to ensure that INSN remains valid
2410 after we make our substitution. The calls are made with IN_GROUP non-zero
2411 so apply_change_group must be called upon the outermost return from this
2412 function (unless INSN is zero). The result of apply_change_group can
2413 generally be discarded since the changes we are making are optional. */
2421 register enum rtx_code code;
2427 code = GET_CODE (x);
2445 /* Never replace a hard reg, because hard regs can appear
2446 in more than one machine mode, and we must preserve the mode
2447 of each occurrence. Also, some hard regs appear in
2448 MEMs that are shared and mustn't be altered. Don't try to
2449 replace any reg that maps to a reg of class NO_REGS. */
2450 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2451 || ! REGNO_QTY_VALID_P (REGNO (x)))
2454 first = qty_first_reg[reg_qty[REGNO (x)]];
2455 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2456 : REGNO_REG_CLASS (first) == NO_REGS ? x
2457 : gen_rtx (REG, qty_mode[reg_qty[REGNO (x)]], first));
2461 fmt = GET_RTX_FORMAT (code);
2462 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2468 rtx new = canon_reg (XEXP (x, i), insn);
2470 /* If replacing pseudo with hard reg or vice versa, ensure the
2471 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2472 if (insn != 0 && new != 0
2473 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2474 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2475 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2476 || insn_n_dups[recog_memoized (insn)] > 0))
2477 validate_change (insn, &XEXP (x, i), new, 1);
2481 else if (fmt[i] == 'E')
2482 for (j = 0; j < XVECLEN (x, i); j++)
2483 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2489 /* LOC is a location with INSN that is an operand address (the contents of
2490 a MEM). Find the best equivalent address to use that is valid for this
2493 On most CISC machines, complicated address modes are costly, and rtx_cost
2494 is a good approximation for that cost. However, most RISC machines have
2495 only a few (usually only one) memory reference formats. If an address is
2496 valid at all, it is often just as cheap as any other address. Hence, for
2497 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2498 costs of various addresses. For two addresses of equal cost, choose the one
2499 with the highest `rtx_cost' value as that has the potential of eliminating
2500 the most insns. For equal costs, we choose the first in the equivalence
2501 class. Note that we ignore the fact that pseudo registers are cheaper
2502 than hard registers here because we would also prefer the pseudo registers.
2506 find_best_addr (insn, loc)
2510 struct table_elt *elt, *p;
2513 int found_better = 1;
2514 int save_do_not_record = do_not_record;
2515 int save_hash_arg_in_memory = hash_arg_in_memory;
2516 int save_hash_arg_in_struct = hash_arg_in_struct;
2521 /* Do not try to replace constant addresses or addresses of local and
2522 argument slots. These MEM expressions are made only once and inserted
2523 in many instructions, as well as being used to control symbol table
2524 output. It is not safe to clobber them.
2526 There are some uncommon cases where the address is already in a register
2527 for some reason, but we cannot take advantage of that because we have
2528 no easy way to unshare the MEM. In addition, looking up all stack
2529 addresses is costly. */
2530 if ((GET_CODE (addr) == PLUS
2531 && GET_CODE (XEXP (addr, 0)) == REG
2532 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2533 && (regno = REGNO (XEXP (addr, 0)),
2534 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2535 || regno == ARG_POINTER_REGNUM))
2536 || (GET_CODE (addr) == REG
2537 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2538 || regno == HARD_FRAME_POINTER_REGNUM
2539 || regno == ARG_POINTER_REGNUM))
2540 || CONSTANT_ADDRESS_P (addr))
2543 /* If this address is not simply a register, try to fold it. This will
2544 sometimes simplify the expression. Many simplifications
2545 will not be valid, but some, usually applying the associative rule, will
2546 be valid and produce better code. */
2547 if (GET_CODE (addr) != REG
2548 && validate_change (insn, loc, fold_rtx (addr, insn), 0))
2551 /* If this address is not in the hash table, we can't look for equivalences
2552 of the whole address. Also, ignore if volatile. */
2555 hash = HASH (addr, Pmode);
2556 addr_volatile = do_not_record;
2557 do_not_record = save_do_not_record;
2558 hash_arg_in_memory = save_hash_arg_in_memory;
2559 hash_arg_in_struct = save_hash_arg_in_struct;
2564 elt = lookup (addr, hash, Pmode);
2566 #ifndef ADDRESS_COST
2569 our_cost = elt->cost;
2571 /* Find the lowest cost below ours that works. */
2572 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2573 if (elt->cost < our_cost
2574 && (GET_CODE (elt->exp) == REG
2575 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2576 && validate_change (insn, loc,
2577 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2584 /* We need to find the best (under the criteria documented above) entry
2585 in the class that is valid. We use the `flag' field to indicate
2586 choices that were invalid and iterate until we can't find a better
2587 one that hasn't already been tried. */
2589 for (p = elt->first_same_value; p; p = p->next_same_value)
2592 while (found_better)
2594 int best_addr_cost = ADDRESS_COST (*loc);
2595 int best_rtx_cost = (elt->cost + 1) >> 1;
2596 struct table_elt *best_elt = elt;
2599 for (p = elt->first_same_value; p; p = p->next_same_value)
2601 && (GET_CODE (p->exp) == REG
2602 || exp_equiv_p (p->exp, p->exp, 1, 0))
2603 && (ADDRESS_COST (p->exp) < best_addr_cost
2604 || (ADDRESS_COST (p->exp) == best_addr_cost
2605 && (p->cost + 1) >> 1 > best_rtx_cost)))
2608 best_addr_cost = ADDRESS_COST (p->exp);
2609 best_rtx_cost = (p->cost + 1) >> 1;
2615 if (validate_change (insn, loc,
2616 canon_reg (copy_rtx (best_elt->exp),
2625 /* If the address is a binary operation with the first operand a register
2626 and the second a constant, do the same as above, but looking for
2627 equivalences of the register. Then try to simplify before checking for
2628 the best address to use. This catches a few cases: First is when we
2629 have REG+const and the register is another REG+const. We can often merge
2630 the constants and eliminate one insn and one register. It may also be
2631 that a machine has a cheap REG+REG+const. Finally, this improves the
2632 code on the Alpha for unaligned byte stores. */
2634 if (flag_expensive_optimizations
2635 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2636 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2637 && GET_CODE (XEXP (*loc, 0)) == REG
2638 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2640 rtx c = XEXP (*loc, 1);
2643 hash = HASH (XEXP (*loc, 0), Pmode);
2644 do_not_record = save_do_not_record;
2645 hash_arg_in_memory = save_hash_arg_in_memory;
2646 hash_arg_in_struct = save_hash_arg_in_struct;
2648 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2652 /* We need to find the best (under the criteria documented above) entry
2653 in the class that is valid. We use the `flag' field to indicate
2654 choices that were invalid and iterate until we can't find a better
2655 one that hasn't already been tried. */
2657 for (p = elt->first_same_value; p; p = p->next_same_value)
2660 while (found_better)
2662 int best_addr_cost = ADDRESS_COST (*loc);
2663 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2664 struct table_elt *best_elt = elt;
2665 rtx best_rtx = *loc;
2668 /* This is at worst case an O(n^2) algorithm, so limit our search
2669 to the first 32 elements on the list. This avoids trouble
2670 compiling code with very long basic blocks that can easily
2671 call cse_gen_binary so many times that we run out of memory. */
2674 for (p = elt->first_same_value, count = 0;
2676 p = p->next_same_value, count++)
2678 && (GET_CODE (p->exp) == REG
2679 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2681 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
2683 if ((ADDRESS_COST (new) < best_addr_cost
2684 || (ADDRESS_COST (new) == best_addr_cost
2685 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2688 best_addr_cost = ADDRESS_COST (new);
2689 best_rtx_cost = (COST (new) + 1) >> 1;
2697 if (validate_change (insn, loc,
2698 canon_reg (copy_rtx (best_rtx),
2709 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2710 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2711 what values are being compared.
2713 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2714 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2715 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2716 compared to produce cc0.
2718 The return value is the comparison operator and is either the code of
2719 A or the code corresponding to the inverse of the comparison. */
2721 static enum rtx_code
2722 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2725 enum machine_mode *pmode1, *pmode2;
2729 arg1 = *parg1, arg2 = *parg2;
2731 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2733 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2735 /* Set non-zero when we find something of interest. */
2737 int reverse_code = 0;
2738 struct table_elt *p = 0;
2740 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2741 On machines with CC0, this is the only case that can occur, since
2742 fold_rtx will return the COMPARE or item being compared with zero
2745 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2748 /* If ARG1 is a comparison operator and CODE is testing for
2749 STORE_FLAG_VALUE, get the inner arguments. */
2751 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2754 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2755 && code == LT && STORE_FLAG_VALUE == -1)
2756 #ifdef FLOAT_STORE_FLAG_VALUE
2757 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2758 && FLOAT_STORE_FLAG_VALUE < 0)
2763 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2764 && code == GE && STORE_FLAG_VALUE == -1)
2765 #ifdef FLOAT_STORE_FLAG_VALUE
2766 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2767 && FLOAT_STORE_FLAG_VALUE < 0)
2770 x = arg1, reverse_code = 1;
2773 /* ??? We could also check for
2775 (ne (and (eq (...) (const_int 1))) (const_int 0))
2777 and related forms, but let's wait until we see them occurring. */
2780 /* Look up ARG1 in the hash table and see if it has an equivalence
2781 that lets us see what is being compared. */
2782 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2784 if (p) p = p->first_same_value;
2786 for (; p; p = p->next_same_value)
2788 enum machine_mode inner_mode = GET_MODE (p->exp);
2790 /* If the entry isn't valid, skip it. */
2791 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2794 if (GET_CODE (p->exp) == COMPARE
2795 /* Another possibility is that this machine has a compare insn
2796 that includes the comparison code. In that case, ARG1 would
2797 be equivalent to a comparison operation that would set ARG1 to
2798 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2799 ORIG_CODE is the actual comparison being done; if it is an EQ,
2800 we must reverse ORIG_CODE. On machine with a negative value
2801 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2804 && GET_MODE_CLASS (inner_mode) == MODE_INT
2805 && (GET_MODE_BITSIZE (inner_mode)
2806 <= HOST_BITS_PER_WIDE_INT)
2807 && (STORE_FLAG_VALUE
2808 & ((HOST_WIDE_INT) 1
2809 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2810 #ifdef FLOAT_STORE_FLAG_VALUE
2812 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2813 && FLOAT_STORE_FLAG_VALUE < 0)
2816 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2821 else if ((code == EQ
2823 && GET_MODE_CLASS (inner_mode) == MODE_INT
2824 && (GET_MODE_BITSIZE (inner_mode)
2825 <= HOST_BITS_PER_WIDE_INT)
2826 && (STORE_FLAG_VALUE
2827 & ((HOST_WIDE_INT) 1
2828 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2829 #ifdef FLOAT_STORE_FLAG_VALUE
2831 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2832 && FLOAT_STORE_FLAG_VALUE < 0)
2835 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2842 /* If this is fp + constant, the equivalent is a better operand since
2843 it may let us predict the value of the comparison. */
2844 else if (NONZERO_BASE_PLUS_P (p->exp))
2851 /* If we didn't find a useful equivalence for ARG1, we are done.
2852 Otherwise, set up for the next iteration. */
2856 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2857 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
2858 code = GET_CODE (x);
2861 code = reverse_condition (code);
2864 /* Return our results. Return the modes from before fold_rtx
2865 because fold_rtx might produce const_int, and then it's too late. */
2866 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2867 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2872 /* Try to simplify a unary operation CODE whose output mode is to be
2873 MODE with input operand OP whose mode was originally OP_MODE.
2874 Return zero if no simplification can be made. */
2877 simplify_unary_operation (code, mode, op, op_mode)
2879 enum machine_mode mode;
2881 enum machine_mode op_mode;
2883 register int width = GET_MODE_BITSIZE (mode);
2885 /* The order of these tests is critical so that, for example, we don't
2886 check the wrong mode (input vs. output) for a conversion operation,
2887 such as FIX. At some point, this should be simplified. */
2889 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2890 if (code == FLOAT && GET_CODE (op) == CONST_INT)
2894 #ifdef REAL_ARITHMETIC
2895 REAL_VALUE_FROM_INT (d, INTVAL (op), INTVAL (op) < 0 ? ~0 : 0);
2897 d = (double) INTVAL (op);
2899 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2901 else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_INT)
2905 #ifdef REAL_ARITHMETIC
2906 REAL_VALUE_FROM_INT (d, INTVAL (op), 0);
2908 d = (double) (unsigned int) INTVAL (op);
2910 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2913 else if (code == FLOAT && GET_CODE (op) == CONST_DOUBLE
2914 && GET_MODE (op) == VOIDmode)
2918 #ifdef REAL_ARITHMETIC
2919 REAL_VALUE_FROM_INT (d, CONST_DOUBLE_LOW (op), CONST_DOUBLE_HIGH (op));
2921 if (CONST_DOUBLE_HIGH (op) < 0)
2923 d = (double) (~ CONST_DOUBLE_HIGH (op));
2924 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2925 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2926 d += (double) (unsigned HOST_WIDE_INT) (~ CONST_DOUBLE_LOW (op));
2931 d = (double) CONST_DOUBLE_HIGH (op);
2932 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2933 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2934 d += (double) (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
2936 #endif /* REAL_ARITHMETIC */
2937 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2939 else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_DOUBLE
2940 && GET_MODE (op) == VOIDmode)
2944 #ifdef REAL_ARITHMETIC
2945 REAL_VALUE_FROM_UNSIGNED_INT (d, CONST_DOUBLE_LOW (op),
2946 CONST_DOUBLE_HIGH (op));
2948 d = (double) CONST_DOUBLE_HIGH (op);
2949 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2950 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2951 d += (double) (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
2952 #endif /* REAL_ARITHMETIC */
2953 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2957 if (GET_CODE (op) == CONST_INT
2958 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
2960 register HOST_WIDE_INT arg0 = INTVAL (op);
2961 register HOST_WIDE_INT val;
2974 val = (arg0 >= 0 ? arg0 : - arg0);
2978 /* Don't use ffs here. Instead, get low order bit and then its
2979 number. If arg0 is zero, this will return 0, as desired. */
2980 arg0 &= GET_MODE_MASK (mode);
2981 val = exact_log2 (arg0 & (- arg0)) + 1;
2989 if (op_mode == VOIDmode)
2991 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
2993 /* If we were really extending the mode,
2994 we would have to distinguish between zero-extension
2995 and sign-extension. */
2996 if (width != GET_MODE_BITSIZE (op_mode))
3000 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3001 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3007 if (op_mode == VOIDmode)
3009 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3011 /* If we were really extending the mode,
3012 we would have to distinguish between zero-extension
3013 and sign-extension. */
3014 if (width != GET_MODE_BITSIZE (op_mode))
3018 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3021 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3023 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3024 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3037 /* Clear the bits that don't belong in our mode,
3038 unless they and our sign bit are all one.
3039 So we get either a reasonable negative value or a reasonable
3040 unsigned value for this mode. */
3041 if (width < HOST_BITS_PER_WIDE_INT
3042 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3043 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3044 val &= (1 << width) - 1;
3046 return GEN_INT (val);
3049 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3050 for a DImode operation on a CONST_INT. */
3051 else if (GET_MODE (op) == VOIDmode && width == HOST_BITS_PER_INT * 2
3052 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3054 HOST_WIDE_INT l1, h1, lv, hv;
3056 if (GET_CODE (op) == CONST_DOUBLE)
3057 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3059 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3069 neg_double (l1, h1, &lv, &hv);
3074 neg_double (l1, h1, &lv, &hv);
3082 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3084 lv = exact_log2 (l1 & (-l1)) + 1;
3088 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3089 return GEN_INT (l1 & GET_MODE_MASK (mode));
3095 if (op_mode == VOIDmode
3096 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3100 lv = l1 & GET_MODE_MASK (op_mode);
3104 if (op_mode == VOIDmode
3105 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3109 lv = l1 & GET_MODE_MASK (op_mode);
3110 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3111 && (lv & ((HOST_WIDE_INT) 1
3112 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3113 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3115 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3126 return immed_double_const (lv, hv, mode);
3129 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3130 else if (GET_CODE (op) == CONST_DOUBLE
3131 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3137 if (setjmp (handler))
3138 /* There used to be a warning here, but that is inadvisable.
3139 People may want to cause traps, and the natural way
3140 to do it should not get a warning. */
3143 set_float_handler (handler);
3145 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3150 d = REAL_VALUE_NEGATE (d);
3154 if (REAL_VALUE_NEGATIVE (d))
3155 d = REAL_VALUE_NEGATE (d);
3158 case FLOAT_TRUNCATE:
3159 d = real_value_truncate (mode, d);
3163 /* All this does is change the mode. */
3167 d = REAL_VALUE_RNDZINT (d);
3171 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3181 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3182 set_float_handler (NULL_PTR);
3185 else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE_CLASS (mode) == MODE_INT
3186 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3192 if (setjmp (handler))
3195 set_float_handler (handler);
3197 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3202 val = REAL_VALUE_FIX (d);
3206 val = REAL_VALUE_UNSIGNED_FIX (d);
3213 set_float_handler (NULL_PTR);
3215 /* Clear the bits that don't belong in our mode,
3216 unless they and our sign bit are all one.
3217 So we get either a reasonable negative value or a reasonable
3218 unsigned value for this mode. */
3219 if (width < HOST_BITS_PER_WIDE_INT
3220 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3221 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3222 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3224 return GEN_INT (val);
3227 /* This was formerly used only for non-IEEE float.
3228 eggert@twinsun.com says it is safe for IEEE also. */
3231 /* There are some simplifications we can do even if the operands
3237 /* (not (not X)) == X, similarly for NEG. */
3238 if (GET_CODE (op) == code)
3239 return XEXP (op, 0);
3243 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3244 becomes just the MINUS if its mode is MODE. This allows
3245 folding switch statements on machines using casesi (such as
3247 if (GET_CODE (op) == TRUNCATE
3248 && GET_MODE (XEXP (op, 0)) == mode
3249 && GET_CODE (XEXP (op, 0)) == MINUS
3250 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3251 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3252 return XEXP (op, 0);
3260 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3261 and OP1. Return 0 if no simplification is possible.
3263 Don't use this for relational operations such as EQ or LT.
3264 Use simplify_relational_operation instead. */
3267 simplify_binary_operation (code, mode, op0, op1)
3269 enum machine_mode mode;
3272 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3274 int width = GET_MODE_BITSIZE (mode);
3277 /* Relational operations don't work here. We must know the mode
3278 of the operands in order to do the comparison correctly.
3279 Assuming a full word can give incorrect results.
3280 Consider comparing 128 with -128 in QImode. */
3282 if (GET_RTX_CLASS (code) == '<')
3285 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3286 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3287 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3288 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3290 REAL_VALUE_TYPE f0, f1, value;
3293 if (setjmp (handler))
3296 set_float_handler (handler);
3298 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3299 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3300 f0 = real_value_truncate (mode, f0);
3301 f1 = real_value_truncate (mode, f1);
3303 #ifdef REAL_ARITHMETIC
3304 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3318 #ifndef REAL_INFINITY
3325 value = MIN (f0, f1);
3328 value = MAX (f0, f1);
3335 value = real_value_truncate (mode, value);
3336 set_float_handler (NULL_PTR);
3337 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3339 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3341 /* We can fold some multi-word operations. */
3342 if (GET_MODE_CLASS (mode) == MODE_INT
3343 && width == HOST_BITS_PER_WIDE_INT * 2
3344 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3345 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3347 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3349 if (GET_CODE (op0) == CONST_DOUBLE)
3350 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3352 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3354 if (GET_CODE (op1) == CONST_DOUBLE)
3355 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3357 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3362 /* A - B == A + (-B). */
3363 neg_double (l2, h2, &lv, &hv);
3366 /* .. fall through ... */
3369 add_double (l1, h1, l2, h2, &lv, &hv);
3373 mul_double (l1, h1, l2, h2, &lv, &hv);
3376 case DIV: case MOD: case UDIV: case UMOD:
3377 /* We'd need to include tree.h to do this and it doesn't seem worth
3382 lv = l1 & l2, hv = h1 & h2;
3386 lv = l1 | l2, hv = h1 | h2;
3390 lv = l1 ^ l2, hv = h1 ^ h2;
3396 && ((unsigned HOST_WIDE_INT) l1
3397 < (unsigned HOST_WIDE_INT) l2)))
3406 && ((unsigned HOST_WIDE_INT) l1
3407 > (unsigned HOST_WIDE_INT) l2)))
3414 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3416 && ((unsigned HOST_WIDE_INT) l1
3417 < (unsigned HOST_WIDE_INT) l2)))
3424 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3426 && ((unsigned HOST_WIDE_INT) l1
3427 > (unsigned HOST_WIDE_INT) l2)))
3433 case LSHIFTRT: case ASHIFTRT:
3435 case ROTATE: case ROTATERT:
3436 #ifdef SHIFT_COUNT_TRUNCATED
3437 if (SHIFT_COUNT_TRUNCATED)
3438 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3441 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3444 if (code == LSHIFTRT || code == ASHIFTRT)
3445 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3447 else if (code == ASHIFT)
3448 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3449 else if (code == ROTATE)
3450 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3451 else /* code == ROTATERT */
3452 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3459 return immed_double_const (lv, hv, mode);
3462 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3463 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3465 /* Even if we can't compute a constant result,
3466 there are some cases worth simplifying. */
3471 /* In IEEE floating point, x+0 is not the same as x. Similarly
3472 for the other optimizations below. */
3473 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3474 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3477 if (op1 == CONST0_RTX (mode))
3480 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3481 if (GET_CODE (op0) == NEG)
3482 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3483 else if (GET_CODE (op1) == NEG)
3484 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3486 /* Handle both-operands-constant cases. We can only add
3487 CONST_INTs to constants since the sum of relocatable symbols
3488 can't be handled by most assemblers. Don't add CONST_INT
3489 to CONST_INT since overflow won't be computed properly if wider
3490 than HOST_BITS_PER_WIDE_INT. */
3492 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3493 && GET_CODE (op1) == CONST_INT)
3494 return plus_constant (op0, INTVAL (op1));
3495 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3496 && GET_CODE (op0) == CONST_INT)
3497 return plus_constant (op1, INTVAL (op0));
3499 /* See if this is something like X * C - X or vice versa or
3500 if the multiplication is written as a shift. If so, we can
3501 distribute and make a new multiply, shift, or maybe just
3502 have X (if C is 2 in the example above). But don't make
3503 real multiply if we didn't have one before. */
3505 if (! FLOAT_MODE_P (mode))
3507 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3508 rtx lhs = op0, rhs = op1;
3511 if (GET_CODE (lhs) == NEG)
3512 coeff0 = -1, lhs = XEXP (lhs, 0);
3513 else if (GET_CODE (lhs) == MULT
3514 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3516 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3519 else if (GET_CODE (lhs) == ASHIFT
3520 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3521 && INTVAL (XEXP (lhs, 1)) >= 0
3522 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3524 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3525 lhs = XEXP (lhs, 0);
3528 if (GET_CODE (rhs) == NEG)
3529 coeff1 = -1, rhs = XEXP (rhs, 0);
3530 else if (GET_CODE (rhs) == MULT
3531 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3533 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3536 else if (GET_CODE (rhs) == ASHIFT
3537 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3538 && INTVAL (XEXP (rhs, 1)) >= 0
3539 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3541 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3542 rhs = XEXP (rhs, 0);
3545 if (rtx_equal_p (lhs, rhs))
3547 tem = cse_gen_binary (MULT, mode, lhs,
3548 GEN_INT (coeff0 + coeff1));
3549 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3553 /* If one of the operands is a PLUS or a MINUS, see if we can
3554 simplify this by the associative law.
3555 Don't use the associative law for floating point.
3556 The inaccuracy makes it nonassociative,
3557 and subtle programs can break if operations are associated. */
3559 if (INTEGRAL_MODE_P (mode)
3560 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3561 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3562 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3568 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3569 using cc0, in which case we want to leave it as a COMPARE
3570 so we can distinguish it from a register-register-copy.
3572 In IEEE floating point, x-0 is not the same as x. */
3574 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3575 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3576 && op1 == CONST0_RTX (mode))
3579 /* Do nothing here. */
3584 /* None of these optimizations can be done for IEEE
3586 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3587 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3590 /* We can't assume x-x is 0 even with non-IEEE floating point,
3591 but since it is zero except in very strange circumstances, we
3592 will treat it as zero with -ffast-math. */
3593 if (rtx_equal_p (op0, op1)
3594 && ! side_effects_p (op0)
3595 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3596 return CONST0_RTX (mode);
3598 /* Change subtraction from zero into negation. */
3599 if (op0 == CONST0_RTX (mode))
3600 return gen_rtx (NEG, mode, op1);
3602 /* (-1 - a) is ~a. */
3603 if (op0 == constm1_rtx)
3604 return gen_rtx (NOT, mode, op1);
3606 /* Subtracting 0 has no effect. */
3607 if (op1 == CONST0_RTX (mode))
3610 /* See if this is something like X * C - X or vice versa or
3611 if the multiplication is written as a shift. If so, we can
3612 distribute and make a new multiply, shift, or maybe just
3613 have X (if C is 2 in the example above). But don't make
3614 real multiply if we didn't have one before. */
3616 if (! FLOAT_MODE_P (mode))
3618 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3619 rtx lhs = op0, rhs = op1;
3622 if (GET_CODE (lhs) == NEG)
3623 coeff0 = -1, lhs = XEXP (lhs, 0);
3624 else if (GET_CODE (lhs) == MULT
3625 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3627 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3630 else if (GET_CODE (lhs) == ASHIFT
3631 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3632 && INTVAL (XEXP (lhs, 1)) >= 0
3633 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3635 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3636 lhs = XEXP (lhs, 0);
3639 if (GET_CODE (rhs) == NEG)
3640 coeff1 = - 1, rhs = XEXP (rhs, 0);
3641 else if (GET_CODE (rhs) == MULT
3642 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3644 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3647 else if (GET_CODE (rhs) == ASHIFT
3648 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3649 && INTVAL (XEXP (rhs, 1)) >= 0
3650 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3652 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3653 rhs = XEXP (rhs, 0);
3656 if (rtx_equal_p (lhs, rhs))
3658 tem = cse_gen_binary (MULT, mode, lhs,
3659 GEN_INT (coeff0 - coeff1));
3660 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3664 /* (a - (-b)) -> (a + b). */
3665 if (GET_CODE (op1) == NEG)
3666 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
3668 /* If one of the operands is a PLUS or a MINUS, see if we can
3669 simplify this by the associative law.
3670 Don't use the associative law for floating point.
3671 The inaccuracy makes it nonassociative,
3672 and subtle programs can break if operations are associated. */
3674 if (INTEGRAL_MODE_P (mode)
3675 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3676 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3677 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3680 /* Don't let a relocatable value get a negative coeff. */
3681 if (GET_CODE (op1) == CONST_INT && GET_MODE (op1) != VOIDmode)
3682 return plus_constant (op0, - INTVAL (op1));
3686 if (op1 == constm1_rtx)
3688 tem = simplify_unary_operation (NEG, mode, op0, mode);
3690 return tem ? tem : gen_rtx (NEG, mode, op0);
3693 /* In IEEE floating point, x*0 is not always 0. */
3694 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3695 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3696 && op1 == CONST0_RTX (mode)
3697 && ! side_effects_p (op0))
3700 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3701 However, ANSI says we can drop signals,
3702 so we can do this anyway. */
3703 if (op1 == CONST1_RTX (mode))
3706 /* Convert multiply by constant power of two into shift unless
3707 we are still generating RTL. This test is a kludge. */
3708 if (GET_CODE (op1) == CONST_INT
3709 && (val = exact_log2 (INTVAL (op1))) >= 0
3710 && ! rtx_equal_function_value_matters)
3711 return gen_rtx (ASHIFT, mode, op0, GEN_INT (val));
3713 if (GET_CODE (op1) == CONST_DOUBLE
3714 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
3718 int op1is2, op1ism1;
3720 if (setjmp (handler))
3723 set_float_handler (handler);
3724 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3725 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
3726 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
3727 set_float_handler (NULL_PTR);
3729 /* x*2 is x+x and x*(-1) is -x */
3730 if (op1is2 && GET_MODE (op0) == mode)
3731 return gen_rtx (PLUS, mode, op0, copy_rtx (op0));
3733 else if (op1ism1 && GET_MODE (op0) == mode)
3734 return gen_rtx (NEG, mode, op0);
3739 if (op1 == const0_rtx)
3741 if (GET_CODE (op1) == CONST_INT
3742 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3744 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3746 /* A | (~A) -> -1 */
3747 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3748 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3749 && ! side_effects_p (op0)
3750 && GET_MODE_CLASS (mode) != MODE_CC)
3755 if (op1 == const0_rtx)
3757 if (GET_CODE (op1) == CONST_INT
3758 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3759 return gen_rtx (NOT, mode, op0);
3760 if (op0 == op1 && ! side_effects_p (op0)
3761 && GET_MODE_CLASS (mode) != MODE_CC)
3766 if (op1 == const0_rtx && ! side_effects_p (op0))
3768 if (GET_CODE (op1) == CONST_INT
3769 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3771 if (op0 == op1 && ! side_effects_p (op0)
3772 && GET_MODE_CLASS (mode) != MODE_CC)
3775 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3776 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3777 && ! side_effects_p (op0)
3778 && GET_MODE_CLASS (mode) != MODE_CC)
3783 /* Convert divide by power of two into shift (divide by 1 handled
3785 if (GET_CODE (op1) == CONST_INT
3786 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
3787 return gen_rtx (LSHIFTRT, mode, op0, GEN_INT (arg1));
3789 /* ... fall through ... */
3792 if (op1 == CONST1_RTX (mode))
3795 /* In IEEE floating point, 0/x is not always 0. */
3796 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3797 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3798 && op0 == CONST0_RTX (mode)
3799 && ! side_effects_p (op1))
3802 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3803 /* Change division by a constant into multiplication. Only do
3804 this with -ffast-math until an expert says it is safe in
3806 else if (GET_CODE (op1) == CONST_DOUBLE
3807 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
3808 && op1 != CONST0_RTX (mode)
3812 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3814 if (! REAL_VALUES_EQUAL (d, dconst0))
3816 #if defined (REAL_ARITHMETIC)
3817 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
3818 return gen_rtx (MULT, mode, op0,
3819 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
3821 return gen_rtx (MULT, mode, op0,
3822 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
3830 /* Handle modulus by power of two (mod with 1 handled below). */
3831 if (GET_CODE (op1) == CONST_INT
3832 && exact_log2 (INTVAL (op1)) > 0)
3833 return gen_rtx (AND, mode, op0, GEN_INT (INTVAL (op1) - 1));
3835 /* ... fall through ... */
3838 if ((op0 == const0_rtx || op1 == const1_rtx)
3839 && ! side_effects_p (op0) && ! side_effects_p (op1))
3845 /* Rotating ~0 always results in ~0. */
3846 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
3847 && INTVAL (op0) == GET_MODE_MASK (mode)
3848 && ! side_effects_p (op1))
3851 /* ... fall through ... */
3856 if (op1 == const0_rtx)
3858 if (op0 == const0_rtx && ! side_effects_p (op1))
3863 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
3864 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
3865 && ! side_effects_p (op0))
3867 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3872 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
3874 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
3875 && ! side_effects_p (op0))
3877 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3882 if (op1 == const0_rtx && ! side_effects_p (op0))
3884 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3889 if (op1 == constm1_rtx && ! side_effects_p (op0))
3891 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3902 /* Get the integer argument values in two forms:
3903 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3905 arg0 = INTVAL (op0);
3906 arg1 = INTVAL (op1);
3908 if (width < HOST_BITS_PER_WIDE_INT)
3910 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
3911 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
3914 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
3915 arg0s |= ((HOST_WIDE_INT) (-1) << width);
3918 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
3919 arg1s |= ((HOST_WIDE_INT) (-1) << width);
3927 /* Compute the value of the arithmetic. */
3932 val = arg0s + arg1s;
3936 val = arg0s - arg1s;
3940 val = arg0s * arg1s;
3946 val = arg0s / arg1s;
3952 val = arg0s % arg1s;
3958 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
3964 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
3980 /* If shift count is undefined, don't fold it; let the machine do
3981 what it wants. But truncate it if the machine will do that. */
3985 #ifdef SHIFT_COUNT_TRUNCATED
3986 if (SHIFT_COUNT_TRUNCATED)
3990 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
3997 #ifdef SHIFT_COUNT_TRUNCATED
3998 if (SHIFT_COUNT_TRUNCATED)
4002 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4009 #ifdef SHIFT_COUNT_TRUNCATED
4010 if (SHIFT_COUNT_TRUNCATED)
4014 val = arg0s >> arg1;
4016 /* Bootstrap compiler may not have sign extended the right shift.
4017 Manually extend the sign to insure bootstrap cc matches gcc. */
4018 if (arg0s < 0 && arg1 > 0)
4019 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4028 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4029 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4037 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4038 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4042 /* Do nothing here. */
4046 val = arg0s <= arg1s ? arg0s : arg1s;
4050 val = ((unsigned HOST_WIDE_INT) arg0
4051 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4055 val = arg0s > arg1s ? arg0s : arg1s;
4059 val = ((unsigned HOST_WIDE_INT) arg0
4060 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4067 /* Clear the bits that don't belong in our mode, unless they and our sign
4068 bit are all one. So we get either a reasonable negative value or a
4069 reasonable unsigned value for this mode. */
4070 if (width < HOST_BITS_PER_WIDE_INT
4071 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4072 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4073 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4075 return GEN_INT (val);
4078 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4081 Rather than test for specific case, we do this by a brute-force method
4082 and do all possible simplifications until no more changes occur. Then
4083 we rebuild the operation. */
4086 simplify_plus_minus (code, mode, op0, op1)
4088 enum machine_mode mode;
4094 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4095 int first = 1, negate = 0, changed;
4098 bzero (ops, sizeof ops);
4100 /* Set up the two operands and then expand them until nothing has been
4101 changed. If we run out of room in our array, give up; this should
4102 almost never happen. */
4104 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4111 for (i = 0; i < n_ops; i++)
4112 switch (GET_CODE (ops[i]))
4119 ops[n_ops] = XEXP (ops[i], 1);
4120 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4121 ops[i] = XEXP (ops[i], 0);
4127 ops[i] = XEXP (ops[i], 0);
4128 negs[i] = ! negs[i];
4133 ops[i] = XEXP (ops[i], 0);
4139 /* ~a -> (-a - 1) */
4142 ops[n_ops] = constm1_rtx;
4143 negs[n_ops++] = negs[i];
4144 ops[i] = XEXP (ops[i], 0);
4145 negs[i] = ! negs[i];
4152 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4157 /* If we only have two operands, we can't do anything. */
4161 /* Now simplify each pair of operands until nothing changes. The first
4162 time through just simplify constants against each other. */
4169 for (i = 0; i < n_ops - 1; i++)
4170 for (j = i + 1; j < n_ops; j++)
4171 if (ops[i] != 0 && ops[j] != 0
4172 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4174 rtx lhs = ops[i], rhs = ops[j];
4175 enum rtx_code ncode = PLUS;
4177 if (negs[i] && ! negs[j])
4178 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4179 else if (! negs[i] && negs[j])
4182 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4185 ops[i] = tem, ops[j] = 0;
4186 negs[i] = negs[i] && negs[j];
4187 if (GET_CODE (tem) == NEG)
4188 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4190 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4191 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4199 /* Pack all the operands to the lower-numbered entries and give up if
4200 we didn't reduce the number of operands we had. Make sure we
4201 count a CONST as two operands. If we have the same number of
4202 operands, but have made more CONSTs than we had, this is also
4203 an improvement, so accept it. */
4205 for (i = 0, j = 0; j < n_ops; j++)
4208 ops[i] = ops[j], negs[i++] = negs[j];
4209 if (GET_CODE (ops[j]) == CONST)
4213 if (i + n_consts > input_ops
4214 || (i + n_consts == input_ops && n_consts <= input_consts))
4219 /* If we have a CONST_INT, put it last. */
4220 for (i = 0; i < n_ops - 1; i++)
4221 if (GET_CODE (ops[i]) == CONST_INT)
4223 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4224 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4227 /* Put a non-negated operand first. If there aren't any, make all
4228 operands positive and negate the whole thing later. */
4229 for (i = 0; i < n_ops && negs[i]; i++)
4234 for (i = 0; i < n_ops; i++)
4240 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4241 j = negs[0], negs[0] = negs[i], negs[i] = j;
4244 /* Now make the result by performing the requested operations. */
4246 for (i = 1; i < n_ops; i++)
4247 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4249 return negate ? gen_rtx (NEG, mode, result) : result;
4252 /* Make a binary operation by properly ordering the operands and
4253 seeing if the expression folds. */
4256 cse_gen_binary (code, mode, op0, op1)
4258 enum machine_mode mode;
4263 /* Put complex operands first and constants second if commutative. */
4264 if (GET_RTX_CLASS (code) == 'c'
4265 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4266 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4267 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4268 || (GET_CODE (op0) == SUBREG
4269 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4270 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4271 tem = op0, op0 = op1, op1 = tem;
4273 /* If this simplifies, do it. */
4274 tem = simplify_binary_operation (code, mode, op0, op1);
4279 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4280 just form the operation. */
4282 if (code == PLUS && GET_CODE (op1) == CONST_INT
4283 && GET_MODE (op0) != VOIDmode)
4284 return plus_constant (op0, INTVAL (op1));
4285 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4286 && GET_MODE (op0) != VOIDmode)
4287 return plus_constant (op0, - INTVAL (op1));
4289 return gen_rtx (code, mode, op0, op1);
4292 /* Like simplify_binary_operation except used for relational operators.
4293 MODE is the mode of the operands, not that of the result. If MODE
4294 is VOIDmode, both operands must also be VOIDmode and we compare the
4295 operands in "infinite precision".
4297 If no simplification is possible, this function returns zero. Otherwise,
4298 it returns either const_true_rtx or const0_rtx. */
4301 simplify_relational_operation (code, mode, op0, op1)
4303 enum machine_mode mode;
4306 int equal, op0lt, op0ltu, op1lt, op1ltu;
4309 /* If op0 is a compare, extract the comparison arguments from it. */
4310 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4311 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4313 /* We can't simplify MODE_CC values since we don't know what the
4314 actual comparison is. */
4315 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4322 /* For integer comparisons of A and B maybe we can simplify A - B and can
4323 then simplify a comparison of that with zero. If A and B are both either
4324 a register or a CONST_INT, this can't help; testing for these cases will
4325 prevent infinite recursion here and speed things up.
4327 If CODE is an unsigned comparison, we can only do this if A - B is a
4328 constant integer, and then we have to compare that integer with zero as a
4329 signed comparison. Note that this will give the incorrect result from
4330 comparisons that overflow. Since these are undefined, this is probably
4331 OK. If it causes a problem, we can check for A or B being an address
4332 (fp + const or SYMBOL_REF) and only do it in that case. */
4334 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4335 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4336 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4337 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4338 && (GET_CODE (tem) == CONST_INT
4339 || (code != GTU && code != GEU &&
4340 code != LTU && code != LEU)))
4341 return simplify_relational_operation (signed_condition (code),
4342 mode, tem, const0_rtx);
4344 /* For non-IEEE floating-point, if the two operands are equal, we know the
4346 if (rtx_equal_p (op0, op1)
4347 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4348 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4349 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4351 /* If the operands are floating-point constants, see if we can fold
4353 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4354 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4355 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4357 REAL_VALUE_TYPE d0, d1;
4360 if (setjmp (handler))
4363 set_float_handler (handler);
4364 REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
4365 REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
4366 equal = REAL_VALUES_EQUAL (d0, d1);
4367 op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
4368 op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
4369 set_float_handler (NULL_PTR);
4371 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4373 /* Otherwise, see if the operands are both integers. */
4374 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4375 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4376 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4378 int width = GET_MODE_BITSIZE (mode);
4379 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4380 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4382 /* Get the two words comprising each integer constant. */
4383 if (GET_CODE (op0) == CONST_DOUBLE)
4385 l0u = l0s = CONST_DOUBLE_LOW (op0);
4386 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4390 l0u = l0s = INTVAL (op0);
4391 h0u = 0, h0s = l0s < 0 ? -1 : 0;
4394 if (GET_CODE (op1) == CONST_DOUBLE)
4396 l1u = l1s = CONST_DOUBLE_LOW (op1);
4397 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4401 l1u = l1s = INTVAL (op1);
4402 h1u = 0, h1s = l1s < 0 ? -1 : 0;
4405 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4406 we have to sign or zero-extend the values. */
4407 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4408 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4410 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4412 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4413 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4415 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4416 l0s |= ((HOST_WIDE_INT) (-1) << width);
4418 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4419 l1s |= ((HOST_WIDE_INT) (-1) << width);
4422 equal = (h0u == h1u && l0u == l1u);
4423 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4424 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4425 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4426 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4429 /* Otherwise, there are some code-specific tests we can make. */
4435 /* References to the frame plus a constant or labels cannot
4436 be zero, but a SYMBOL_REF can due to #pragma weak. */
4437 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4438 || GET_CODE (op0) == LABEL_REF)
4439 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4440 /* On some machines, the ap reg can be 0 sometimes. */
4441 && op0 != arg_pointer_rtx
4448 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4449 || GET_CODE (op0) == LABEL_REF)
4450 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4451 && op0 != arg_pointer_rtx
4454 return const_true_rtx;
4458 /* Unsigned values are never negative. */
4459 if (op1 == const0_rtx)
4460 return const_true_rtx;
4464 if (op1 == const0_rtx)
4469 /* Unsigned values are never greater than the largest
4471 if (GET_CODE (op1) == CONST_INT
4472 && INTVAL (op1) == GET_MODE_MASK (mode)
4473 && INTEGRAL_MODE_P (mode))
4474 return const_true_rtx;
4478 if (GET_CODE (op1) == CONST_INT
4479 && INTVAL (op1) == GET_MODE_MASK (mode)
4480 && INTEGRAL_MODE_P (mode))
4488 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4493 return equal ? const_true_rtx : const0_rtx;
4495 return ! equal ? const_true_rtx : const0_rtx;
4497 return op0lt ? const_true_rtx : const0_rtx;
4499 return op1lt ? const_true_rtx : const0_rtx;
4501 return op0ltu ? const_true_rtx : const0_rtx;
4503 return op1ltu ? const_true_rtx : const0_rtx;
4505 return equal || op0lt ? const_true_rtx : const0_rtx;
4507 return equal || op1lt ? const_true_rtx : const0_rtx;
4509 return equal || op0ltu ? const_true_rtx : const0_rtx;
4511 return equal || op1ltu ? const_true_rtx : const0_rtx;
4517 /* Simplify CODE, an operation with result mode MODE and three operands,
4518 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4519 a constant. Return 0 if no simplifications is possible. */
4522 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4524 enum machine_mode mode, op0_mode;
4527 int width = GET_MODE_BITSIZE (mode);
4529 /* VOIDmode means "infinite" precision. */
4531 width = HOST_BITS_PER_WIDE_INT;
4537 if (GET_CODE (op0) == CONST_INT
4538 && GET_CODE (op1) == CONST_INT
4539 && GET_CODE (op2) == CONST_INT
4540 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4541 && width <= HOST_BITS_PER_WIDE_INT)
4543 /* Extracting a bit-field from a constant */
4544 HOST_WIDE_INT val = INTVAL (op0);
4547 val >>= (GET_MODE_BITSIZE (op0_mode) - INTVAL (op2) - INTVAL (op1));
4549 val >>= INTVAL (op2);
4551 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4553 /* First zero-extend. */
4554 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4555 /* If desired, propagate sign bit. */
4556 if (code == SIGN_EXTRACT
4557 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4558 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4561 /* Clear the bits that don't belong in our mode,
4562 unless they and our sign bit are all one.
4563 So we get either a reasonable negative value or a reasonable
4564 unsigned value for this mode. */
4565 if (width < HOST_BITS_PER_WIDE_INT
4566 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4567 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4568 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4570 return GEN_INT (val);
4575 if (GET_CODE (op0) == CONST_INT)
4576 return op0 != const0_rtx ? op1 : op2;
4586 /* If X is a nontrivial arithmetic operation on an argument
4587 for which a constant value can be determined, return
4588 the result of operating on that value, as a constant.
4589 Otherwise, return X, possibly with one or more operands
4590 modified by recursive calls to this function.
4592 If X is a register whose contents are known, we do NOT
4593 return those contents here. equiv_constant is called to
4596 INSN is the insn that we may be modifying. If it is 0, make a copy
4597 of X before modifying it. */
4604 register enum rtx_code code;
4605 register enum machine_mode mode;
4612 /* Folded equivalents of first two operands of X. */
4616 /* Constant equivalents of first three operands of X;
4617 0 when no such equivalent is known. */
4622 /* The mode of the first operand of X. We need this for sign and zero
4624 enum machine_mode mode_arg0;
4629 mode = GET_MODE (x);
4630 code = GET_CODE (x);
4639 /* No use simplifying an EXPR_LIST
4640 since they are used only for lists of args
4641 in a function call's REG_EQUAL note. */
4647 return prev_insn_cc0;
4651 /* If the next insn is a CODE_LABEL followed by a jump table,
4652 PC's value is a LABEL_REF pointing to that label. That
4653 lets us fold switch statements on the Vax. */
4654 if (insn && GET_CODE (insn) == JUMP_INSN)
4656 rtx next = next_nonnote_insn (insn);
4658 if (next && GET_CODE (next) == CODE_LABEL
4659 && NEXT_INSN (next) != 0
4660 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4661 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4662 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4663 return gen_rtx (LABEL_REF, Pmode, next);
4668 /* See if we previously assigned a constant value to this SUBREG. */
4669 if ((new = lookup_as_function (x, CONST_INT)) != 0
4670 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
4673 /* If this is a paradoxical SUBREG, we have no idea what value the
4674 extra bits would have. However, if the operand is equivalent
4675 to a SUBREG whose operand is the same as our mode, and all the
4676 modes are within a word, we can just use the inner operand
4677 because these SUBREGs just say how to treat the register.
4679 Similarly if we find an integer constant. */
4681 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4683 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
4684 struct table_elt *elt;
4686 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
4687 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
4688 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
4690 for (elt = elt->first_same_value;
4691 elt; elt = elt->next_same_value)
4693 if (CONSTANT_P (elt->exp)
4694 && GET_MODE (elt->exp) == VOIDmode)
4697 if (GET_CODE (elt->exp) == SUBREG
4698 && GET_MODE (SUBREG_REG (elt->exp)) == mode
4699 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4700 return copy_rtx (SUBREG_REG (elt->exp));
4706 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4707 We might be able to if the SUBREG is extracting a single word in an
4708 integral mode or extracting the low part. */
4710 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
4711 const_arg0 = equiv_constant (folded_arg0);
4713 folded_arg0 = const_arg0;
4715 if (folded_arg0 != SUBREG_REG (x))
4719 if (GET_MODE_CLASS (mode) == MODE_INT
4720 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4721 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
4722 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
4723 GET_MODE (SUBREG_REG (x)));
4724 if (new == 0 && subreg_lowpart_p (x))
4725 new = gen_lowpart_if_possible (mode, folded_arg0);
4730 /* If this is a narrowing SUBREG and our operand is a REG, see if
4731 we can find an equivalence for REG that is an arithmetic operation
4732 in a wider mode where both operands are paradoxical SUBREGs
4733 from objects of our result mode. In that case, we couldn't report
4734 an equivalent value for that operation, since we don't know what the
4735 extra bits will be. But we can find an equivalence for this SUBREG
4736 by folding that operation is the narrow mode. This allows us to
4737 fold arithmetic in narrow modes when the machine only supports
4738 word-sized arithmetic.
4740 Also look for a case where we have a SUBREG whose operand is the
4741 same as our result. If both modes are smaller than a word, we
4742 are simply interpreting a register in different modes and we
4743 can use the inner value. */
4745 if (GET_CODE (folded_arg0) == REG
4746 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
4747 && subreg_lowpart_p (x))
4749 struct table_elt *elt;
4751 /* We can use HASH here since we know that canon_hash won't be
4753 elt = lookup (folded_arg0,
4754 HASH (folded_arg0, GET_MODE (folded_arg0)),
4755 GET_MODE (folded_arg0));
4758 elt = elt->first_same_value;
4760 for (; elt; elt = elt->next_same_value)
4762 enum rtx_code eltcode = GET_CODE (elt->exp);
4764 /* Just check for unary and binary operations. */
4765 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
4766 && GET_CODE (elt->exp) != SIGN_EXTEND
4767 && GET_CODE (elt->exp) != ZERO_EXTEND
4768 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4769 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
4771 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
4773 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4774 op0 = fold_rtx (op0, NULL_RTX);
4776 op0 = equiv_constant (op0);
4778 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
4781 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
4782 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
4783 && eltcode != DIV && eltcode != MOD
4784 && eltcode != UDIV && eltcode != UMOD
4785 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
4786 && eltcode != ROTATE && eltcode != ROTATERT
4787 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4788 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
4790 || CONSTANT_P (XEXP (elt->exp, 0)))
4791 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
4792 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
4794 || CONSTANT_P (XEXP (elt->exp, 1))))
4796 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
4797 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
4799 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4800 op0 = fold_rtx (op0, NULL_RTX);
4803 op0 = equiv_constant (op0);
4805 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
4806 op1 = fold_rtx (op1, NULL_RTX);
4809 op1 = equiv_constant (op1);
4811 /* If we are looking for the low SImode part of
4812 (ashift:DI c (const_int 32)), it doesn't work
4813 to compute that in SImode, because a 32-bit shift
4814 in SImode is unpredictable. We know the value is 0. */
4816 && GET_CODE (elt->exp) == ASHIFT
4817 && GET_CODE (op1) == CONST_INT
4818 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
4820 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
4822 /* If the count fits in the inner mode's width,
4823 but exceeds the outer mode's width,
4824 the value will get truncated to 0
4828 /* If the count exceeds even the inner mode's width,
4829 don't fold this expression. */
4832 else if (op0 && op1)
4833 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
4837 else if (GET_CODE (elt->exp) == SUBREG
4838 && GET_MODE (SUBREG_REG (elt->exp)) == mode
4839 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
4841 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4842 new = copy_rtx (SUBREG_REG (elt->exp));
4853 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4854 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4855 new = lookup_as_function (XEXP (x, 0), code);
4857 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
4861 /* If we are not actually processing an insn, don't try to find the
4862 best address. Not only don't we care, but we could modify the
4863 MEM in an invalid way since we have no insn to validate against. */
4865 find_best_addr (insn, &XEXP (x, 0));
4868 /* Even if we don't fold in the insn itself,
4869 we can safely do so here, in hopes of getting a constant. */
4870 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
4872 HOST_WIDE_INT offset = 0;
4874 if (GET_CODE (addr) == REG
4875 && REGNO_QTY_VALID_P (REGNO (addr))
4876 && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
4877 && qty_const[reg_qty[REGNO (addr)]] != 0)
4878 addr = qty_const[reg_qty[REGNO (addr)]];
4880 /* If address is constant, split it into a base and integer offset. */
4881 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
4883 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
4884 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
4886 base = XEXP (XEXP (addr, 0), 0);
4887 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
4889 else if (GET_CODE (addr) == LO_SUM
4890 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
4891 base = XEXP (addr, 1);
4893 /* If this is a constant pool reference, we can fold it into its
4894 constant to allow better value tracking. */
4895 if (base && GET_CODE (base) == SYMBOL_REF
4896 && CONSTANT_POOL_ADDRESS_P (base))
4898 rtx constant = get_pool_constant (base);
4899 enum machine_mode const_mode = get_pool_mode (base);
4902 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
4903 constant_pool_entries_cost = COST (constant);
4905 /* If we are loading the full constant, we have an equivalence. */
4906 if (offset == 0 && mode == const_mode)
4909 /* If this actually isn't a constant (wierd!), we can't do
4910 anything. Otherwise, handle the two most common cases:
4911 extracting a word from a multi-word constant, and extracting
4912 the low-order bits. Other cases don't seem common enough to
4914 if (! CONSTANT_P (constant))
4917 if (GET_MODE_CLASS (mode) == MODE_INT
4918 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4919 && offset % UNITS_PER_WORD == 0
4920 && (new = operand_subword (constant,
4921 offset / UNITS_PER_WORD,
4922 0, const_mode)) != 0)
4925 if (((BYTES_BIG_ENDIAN
4926 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
4927 || (! BYTES_BIG_ENDIAN && offset == 0))
4928 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
4932 /* If this is a reference to a label at a known position in a jump
4933 table, we also know its value. */
4934 if (base && GET_CODE (base) == LABEL_REF)
4936 rtx label = XEXP (base, 0);
4937 rtx table_insn = NEXT_INSN (label);
4939 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
4940 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
4942 rtx table = PATTERN (table_insn);
4945 && (offset / GET_MODE_SIZE (GET_MODE (table))
4946 < XVECLEN (table, 0)))
4947 return XVECEXP (table, 0,
4948 offset / GET_MODE_SIZE (GET_MODE (table)));
4950 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
4951 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
4953 rtx table = PATTERN (table_insn);
4956 && (offset / GET_MODE_SIZE (GET_MODE (table))
4957 < XVECLEN (table, 1)))
4959 offset /= GET_MODE_SIZE (GET_MODE (table));
4960 new = gen_rtx (MINUS, Pmode, XVECEXP (table, 1, offset),
4963 if (GET_MODE (table) != Pmode)
4964 new = gen_rtx (TRUNCATE, GET_MODE (table), new);
4978 mode_arg0 = VOIDmode;
4980 /* Try folding our operands.
4981 Then see which ones have constant values known. */
4983 fmt = GET_RTX_FORMAT (code);
4984 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4987 rtx arg = XEXP (x, i);
4988 rtx folded_arg = arg, const_arg = 0;
4989 enum machine_mode mode_arg = GET_MODE (arg);
4990 rtx cheap_arg, expensive_arg;
4991 rtx replacements[2];
4994 /* Most arguments are cheap, so handle them specially. */
4995 switch (GET_CODE (arg))
4998 /* This is the same as calling equiv_constant; it is duplicated
5000 if (REGNO_QTY_VALID_P (REGNO (arg))
5001 && qty_const[reg_qty[REGNO (arg)]] != 0
5002 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
5003 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
5005 = gen_lowpart_if_possible (GET_MODE (arg),
5006 qty_const[reg_qty[REGNO (arg)]]);
5019 folded_arg = prev_insn_cc0;
5020 mode_arg = prev_insn_cc0_mode;
5021 const_arg = equiv_constant (folded_arg);
5026 folded_arg = fold_rtx (arg, insn);
5027 const_arg = equiv_constant (folded_arg);
5030 /* For the first three operands, see if the operand
5031 is constant or equivalent to a constant. */
5035 folded_arg0 = folded_arg;
5036 const_arg0 = const_arg;
5037 mode_arg0 = mode_arg;
5040 folded_arg1 = folded_arg;
5041 const_arg1 = const_arg;
5044 const_arg2 = const_arg;
5048 /* Pick the least expensive of the folded argument and an
5049 equivalent constant argument. */
5050 if (const_arg == 0 || const_arg == folded_arg
5051 || COST (const_arg) > COST (folded_arg))
5052 cheap_arg = folded_arg, expensive_arg = const_arg;
5054 cheap_arg = const_arg, expensive_arg = folded_arg;
5056 /* Try to replace the operand with the cheapest of the two
5057 possibilities. If it doesn't work and this is either of the first
5058 two operands of a commutative operation, try swapping them.
5059 If THAT fails, try the more expensive, provided it is cheaper
5060 than what is already there. */
5062 if (cheap_arg == XEXP (x, i))
5065 if (insn == 0 && ! copied)
5071 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5073 j < 2 && replacements[j]
5074 && COST (replacements[j]) < COST (XEXP (x, i));
5077 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5080 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5082 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5083 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5085 if (apply_change_group ())
5087 /* Swap them back to be invalid so that this loop can
5088 continue and flag them to be swapped back later. */
5091 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5100 else if (fmt[i] == 'E')
5101 /* Don't try to fold inside of a vector of expressions.
5102 Doing nothing is harmless. */
5105 /* If a commutative operation, place a constant integer as the second
5106 operand unless the first operand is also a constant integer. Otherwise,
5107 place any constant second unless the first operand is also a constant. */
5109 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5111 if (must_swap || (const_arg0
5113 || (GET_CODE (const_arg0) == CONST_INT
5114 && GET_CODE (const_arg1) != CONST_INT))))
5116 register rtx tem = XEXP (x, 0);
5118 if (insn == 0 && ! copied)
5124 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5125 validate_change (insn, &XEXP (x, 1), tem, 1);
5126 if (apply_change_group ())
5128 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5129 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5134 /* If X is an arithmetic operation, see if we can simplify it. */
5136 switch (GET_RTX_CLASS (code))
5139 /* We can't simplify extension ops unless we know the original mode. */
5140 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5141 && mode_arg0 == VOIDmode)
5143 new = simplify_unary_operation (code, mode,
5144 const_arg0 ? const_arg0 : folded_arg0,
5149 /* See what items are actually being compared and set FOLDED_ARG[01]
5150 to those values and CODE to the actual comparison code. If any are
5151 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5152 do anything if both operands are already known to be constant. */
5154 if (const_arg0 == 0 || const_arg1 == 0)
5156 struct table_elt *p0, *p1;
5157 rtx true = const_true_rtx, false = const0_rtx;
5158 enum machine_mode mode_arg1;
5160 #ifdef FLOAT_STORE_FLAG_VALUE
5161 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5163 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5165 false = CONST0_RTX (mode);
5169 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5170 &mode_arg0, &mode_arg1);
5171 const_arg0 = equiv_constant (folded_arg0);
5172 const_arg1 = equiv_constant (folded_arg1);
5174 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5175 what kinds of things are being compared, so we can't do
5176 anything with this comparison. */
5178 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5181 /* If we do not now have two constants being compared, see if we
5182 can nevertheless deduce some things about the comparison. */
5183 if (const_arg0 == 0 || const_arg1 == 0)
5185 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
5186 constant? These aren't zero, but we don't know their sign. */
5187 if (const_arg1 == const0_rtx
5188 && (NONZERO_BASE_PLUS_P (folded_arg0)
5189 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5191 || GET_CODE (folded_arg0) == SYMBOL_REF
5193 || GET_CODE (folded_arg0) == LABEL_REF
5194 || GET_CODE (folded_arg0) == CONST))
5198 else if (code == NE)
5202 /* See if the two operands are the same. We don't do this
5203 for IEEE floating-point since we can't assume x == x
5204 since x might be a NaN. */
5206 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5207 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5208 && (folded_arg0 == folded_arg1
5209 || (GET_CODE (folded_arg0) == REG
5210 && GET_CODE (folded_arg1) == REG
5211 && (reg_qty[REGNO (folded_arg0)]
5212 == reg_qty[REGNO (folded_arg1)]))
5213 || ((p0 = lookup (folded_arg0,
5214 (safe_hash (folded_arg0, mode_arg0)
5215 % NBUCKETS), mode_arg0))
5216 && (p1 = lookup (folded_arg1,
5217 (safe_hash (folded_arg1, mode_arg0)
5218 % NBUCKETS), mode_arg0))
5219 && p0->first_same_value == p1->first_same_value)))
5220 return ((code == EQ || code == LE || code == GE
5221 || code == LEU || code == GEU)
5224 /* If FOLDED_ARG0 is a register, see if the comparison we are
5225 doing now is either the same as we did before or the reverse
5226 (we only check the reverse if not floating-point). */
5227 else if (GET_CODE (folded_arg0) == REG)
5229 int qty = reg_qty[REGNO (folded_arg0)];
5231 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5232 && (comparison_dominates_p (qty_comparison_code[qty], code)
5233 || (comparison_dominates_p (qty_comparison_code[qty],
5234 reverse_condition (code))
5235 && ! FLOAT_MODE_P (mode_arg0)))
5236 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5238 && rtx_equal_p (qty_comparison_const[qty],
5240 || (GET_CODE (folded_arg1) == REG
5241 && (reg_qty[REGNO (folded_arg1)]
5242 == qty_comparison_qty[qty]))))
5243 return (comparison_dominates_p (qty_comparison_code[qty],
5250 /* If we are comparing against zero, see if the first operand is
5251 equivalent to an IOR with a constant. If so, we may be able to
5252 determine the result of this comparison. */
5254 if (const_arg1 == const0_rtx)
5256 rtx y = lookup_as_function (folded_arg0, IOR);
5260 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5261 && GET_CODE (inner_const) == CONST_INT
5262 && INTVAL (inner_const) != 0)
5264 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5265 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5266 && (INTVAL (inner_const)
5267 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5268 rtx true = const_true_rtx, false = const0_rtx;
5270 #ifdef FLOAT_STORE_FLAG_VALUE
5271 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5273 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5275 false = CONST0_RTX (mode);
5297 new = simplify_relational_operation (code, mode_arg0,
5298 const_arg0 ? const_arg0 : folded_arg0,
5299 const_arg1 ? const_arg1 : folded_arg1);
5300 #ifdef FLOAT_STORE_FLAG_VALUE
5301 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5302 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5303 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5312 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5313 with that LABEL_REF as its second operand. If so, the result is
5314 the first operand of that MINUS. This handles switches with an
5315 ADDR_DIFF_VEC table. */
5316 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5318 rtx y = lookup_as_function (folded_arg0, MINUS);
5320 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5321 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5325 /* If second operand is a register equivalent to a negative
5326 CONST_INT, see if we can find a register equivalent to the
5327 positive constant. Make a MINUS if so. Don't do this for
5328 a negative constant since we might then alternate between
5329 chosing positive and negative constants. Having the positive
5330 constant previously-used is the more common case. */
5331 if (const_arg1 && GET_CODE (const_arg1) == CONST_INT
5332 && INTVAL (const_arg1) < 0 && GET_CODE (folded_arg1) == REG)
5334 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5336 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5340 for (p = p->first_same_value; p; p = p->next_same_value)
5341 if (GET_CODE (p->exp) == REG)
5342 return cse_gen_binary (MINUS, mode, folded_arg0,
5343 canon_reg (p->exp, NULL_RTX));
5348 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5349 If so, produce (PLUS Z C2-C). */
5350 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5352 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5353 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5354 return fold_rtx (plus_constant (copy_rtx (y),
5355 -INTVAL (const_arg1)),
5359 /* ... fall through ... */
5362 case SMIN: case SMAX: case UMIN: case UMAX:
5363 case IOR: case AND: case XOR:
5364 case MULT: case DIV: case UDIV:
5365 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5366 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5367 is known to be of similar form, we may be able to replace the
5368 operation with a combined operation. This may eliminate the
5369 intermediate operation if every use is simplified in this way.
5370 Note that the similar optimization done by combine.c only works
5371 if the intermediate operation's result has only one reference. */
5373 if (GET_CODE (folded_arg0) == REG
5374 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5377 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5378 rtx y = lookup_as_function (folded_arg0, code);
5380 enum rtx_code associate_code;
5384 || 0 == (inner_const
5385 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5386 || GET_CODE (inner_const) != CONST_INT
5387 /* If we have compiled a statement like
5388 "if (x == (x & mask1))", and now are looking at
5389 "x & mask2", we will have a case where the first operand
5390 of Y is the same as our first operand. Unless we detect
5391 this case, an infinite loop will result. */
5392 || XEXP (y, 0) == folded_arg0)
5395 /* Don't associate these operations if they are a PLUS with the
5396 same constant and it is a power of two. These might be doable
5397 with a pre- or post-increment. Similarly for two subtracts of
5398 identical powers of two with post decrement. */
5400 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5402 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5403 || exact_log2 (INTVAL (const_arg1)) >= 0
5405 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5406 || exact_log2 (- INTVAL (const_arg1)) >= 0
5411 /* Compute the code used to compose the constants. For example,
5412 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5415 = (code == MULT || code == DIV || code == UDIV ? MULT
5416 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5418 new_const = simplify_binary_operation (associate_code, mode,
5419 const_arg1, inner_const);
5424 /* If we are associating shift operations, don't let this
5425 produce a shift of the size of the object or larger.
5426 This could occur when we follow a sign-extend by a right
5427 shift on a machine that does a sign-extend as a pair
5430 if (is_shift && GET_CODE (new_const) == CONST_INT
5431 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5433 /* As an exception, we can turn an ASHIFTRT of this
5434 form into a shift of the number of bits - 1. */
5435 if (code == ASHIFTRT)
5436 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5441 y = copy_rtx (XEXP (y, 0));
5443 /* If Y contains our first operand (the most common way this
5444 can happen is if Y is a MEM), we would do into an infinite
5445 loop if we tried to fold it. So don't in that case. */
5447 if (! reg_mentioned_p (folded_arg0, y))
5448 y = fold_rtx (y, insn);
5450 return cse_gen_binary (code, mode, y, new_const);
5454 new = simplify_binary_operation (code, mode,
5455 const_arg0 ? const_arg0 : folded_arg0,
5456 const_arg1 ? const_arg1 : folded_arg1);
5460 /* (lo_sum (high X) X) is simply X. */
5461 if (code == LO_SUM && const_arg0 != 0
5462 && GET_CODE (const_arg0) == HIGH
5463 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5469 new = simplify_ternary_operation (code, mode, mode_arg0,
5470 const_arg0 ? const_arg0 : folded_arg0,
5471 const_arg1 ? const_arg1 : folded_arg1,
5472 const_arg2 ? const_arg2 : XEXP (x, 2));
5476 return new ? new : x;
5479 /* Return a constant value currently equivalent to X.
5480 Return 0 if we don't know one. */
5486 if (GET_CODE (x) == REG
5487 && REGNO_QTY_VALID_P (REGNO (x))
5488 && qty_const[reg_qty[REGNO (x)]])
5489 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
5491 if (x != 0 && CONSTANT_P (x))
5494 /* If X is a MEM, try to fold it outside the context of any insn to see if
5495 it might be equivalent to a constant. That handles the case where it
5496 is a constant-pool reference. Then try to look it up in the hash table
5497 in case it is something whose value we have seen before. */
5499 if (GET_CODE (x) == MEM)
5501 struct table_elt *elt;
5503 x = fold_rtx (x, NULL_RTX);
5507 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5511 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5512 if (elt->is_const && CONSTANT_P (elt->exp))
5519 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5520 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5521 least-significant part of X.
5522 MODE specifies how big a part of X to return.
5524 If the requested operation cannot be done, 0 is returned.
5526 This is similar to gen_lowpart in emit-rtl.c. */
5529 gen_lowpart_if_possible (mode, x)
5530 enum machine_mode mode;
5533 rtx result = gen_lowpart_common (mode, x);
5537 else if (GET_CODE (x) == MEM)
5539 /* This is the only other case we handle. */
5540 register int offset = 0;
5543 #if WORDS_BIG_ENDIAN
5544 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
5545 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
5547 #if BYTES_BIG_ENDIAN
5548 /* Adjust the address so that the address-after-the-data
5550 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
5551 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
5553 new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset));
5554 if (! memory_address_p (mode, XEXP (new, 0)))
5556 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
5557 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
5558 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
5565 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5566 branch. It will be zero if not.
5568 In certain cases, this can cause us to add an equivalence. For example,
5569 if we are following the taken case of
5571 we can add the fact that `i' and '2' are now equivalent.
5573 In any case, we can record that this comparison was passed. If the same
5574 comparison is seen later, we will know its value. */
5577 record_jump_equiv (insn, taken)
5581 int cond_known_true;
5583 enum machine_mode mode, mode0, mode1;
5584 int reversed_nonequality = 0;
5587 /* Ensure this is the right kind of insn. */
5588 if (! condjump_p (insn) || simplejump_p (insn))
5591 /* See if this jump condition is known true or false. */
5593 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
5595 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
5597 /* Get the type of comparison being done and the operands being compared.
5598 If we had to reverse a non-equality condition, record that fact so we
5599 know that it isn't valid for floating-point. */
5600 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
5601 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
5602 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
5604 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
5605 if (! cond_known_true)
5607 reversed_nonequality = (code != EQ && code != NE);
5608 code = reverse_condition (code);
5611 /* The mode is the mode of the non-constant. */
5613 if (mode1 != VOIDmode)
5616 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
5619 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5620 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5621 Make any useful entries we can with that information. Called from
5622 above function and called recursively. */
5625 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
5627 enum machine_mode mode;
5629 int reversed_nonequality;
5631 unsigned op0_hash, op1_hash;
5632 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
5633 struct table_elt *op0_elt, *op1_elt;
5635 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5636 we know that they are also equal in the smaller mode (this is also
5637 true for all smaller modes whether or not there is a SUBREG, but
5638 is not worth testing for with no SUBREG. */
5640 /* Note that GET_MODE (op0) may not equal MODE. */
5641 if (code == EQ && GET_CODE (op0) == SUBREG
5642 && (GET_MODE_SIZE (GET_MODE (op0))
5643 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5645 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5646 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5648 record_jump_cond (code, mode, SUBREG_REG (op0),
5649 tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5650 reversed_nonequality);
5653 if (code == EQ && GET_CODE (op1) == SUBREG
5654 && (GET_MODE_SIZE (GET_MODE (op1))
5655 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5657 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5658 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5660 record_jump_cond (code, mode, SUBREG_REG (op1),
5661 tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5662 reversed_nonequality);
5665 /* Similarly, if this is an NE comparison, and either is a SUBREG
5666 making a smaller mode, we know the whole thing is also NE. */
5668 /* Note that GET_MODE (op0) may not equal MODE;
5669 if we test MODE instead, we can get an infinite recursion
5670 alternating between two modes each wider than MODE. */
5672 if (code == NE && GET_CODE (op0) == SUBREG
5673 && subreg_lowpart_p (op0)
5674 && (GET_MODE_SIZE (GET_MODE (op0))
5675 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5677 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5678 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5680 record_jump_cond (code, mode, SUBREG_REG (op0),
5681 tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5682 reversed_nonequality);
5685 if (code == NE && GET_CODE (op1) == SUBREG
5686 && subreg_lowpart_p (op1)
5687 && (GET_MODE_SIZE (GET_MODE (op1))
5688 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5690 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5691 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5693 record_jump_cond (code, mode, SUBREG_REG (op1),
5694 tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5695 reversed_nonequality);
5698 /* Hash both operands. */
5701 hash_arg_in_memory = 0;
5702 hash_arg_in_struct = 0;
5703 op0_hash = HASH (op0, mode);
5704 op0_in_memory = hash_arg_in_memory;
5705 op0_in_struct = hash_arg_in_struct;
5711 hash_arg_in_memory = 0;
5712 hash_arg_in_struct = 0;
5713 op1_hash = HASH (op1, mode);
5714 op1_in_memory = hash_arg_in_memory;
5715 op1_in_struct = hash_arg_in_struct;
5720 /* Look up both operands. */
5721 op0_elt = lookup (op0, op0_hash, mode);
5722 op1_elt = lookup (op1, op1_hash, mode);
5724 /* If we aren't setting two things equal all we can do is save this
5725 comparison. Similarly if this is floating-point. In the latter
5726 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5727 If we record the equality, we might inadvertently delete code
5728 whose intent was to change -0 to +0. */
5730 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
5732 /* If we reversed a floating-point comparison, if OP0 is not a
5733 register, or if OP1 is neither a register or constant, we can't
5736 if (GET_CODE (op1) != REG)
5737 op1 = equiv_constant (op1);
5739 if ((reversed_nonequality && FLOAT_MODE_P (mode))
5740 || GET_CODE (op0) != REG || op1 == 0)
5743 /* Put OP0 in the hash table if it isn't already. This gives it a
5744 new quantity number. */
5747 if (insert_regs (op0, NULL_PTR, 0))
5749 rehash_using_reg (op0);
5750 op0_hash = HASH (op0, mode);
5752 /* If OP0 is contained in OP1, this changes its hash code
5753 as well. Faster to rehash than to check, except
5754 for the simple case of a constant. */
5755 if (! CONSTANT_P (op1))
5756 op1_hash = HASH (op1,mode);
5759 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
5760 op0_elt->in_memory = op0_in_memory;
5761 op0_elt->in_struct = op0_in_struct;
5764 qty_comparison_code[reg_qty[REGNO (op0)]] = code;
5765 if (GET_CODE (op1) == REG)
5767 /* Look it up again--in case op0 and op1 are the same. */
5768 op1_elt = lookup (op1, op1_hash, mode);
5770 /* Put OP1 in the hash table so it gets a new quantity number. */
5773 if (insert_regs (op1, NULL_PTR, 0))
5775 rehash_using_reg (op1);
5776 op1_hash = HASH (op1, mode);
5779 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
5780 op1_elt->in_memory = op1_in_memory;
5781 op1_elt->in_struct = op1_in_struct;
5784 qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
5785 qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
5789 qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
5790 qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
5796 /* If either side is still missing an equivalence, make it now,
5797 then merge the equivalences. */
5801 if (insert_regs (op0, NULL_PTR, 0))
5803 rehash_using_reg (op0);
5804 op0_hash = HASH (op0, mode);
5807 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
5808 op0_elt->in_memory = op0_in_memory;
5809 op0_elt->in_struct = op0_in_struct;
5814 if (insert_regs (op1, NULL_PTR, 0))
5816 rehash_using_reg (op1);
5817 op1_hash = HASH (op1, mode);
5820 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
5821 op1_elt->in_memory = op1_in_memory;
5822 op1_elt->in_struct = op1_in_struct;
5825 merge_equiv_classes (op0_elt, op1_elt);
5826 last_jump_equiv_class = op0_elt;
5829 /* CSE processing for one instruction.
5830 First simplify sources and addresses of all assignments
5831 in the instruction, using previously-computed equivalents values.
5832 Then install the new sources and destinations in the table
5833 of available values.
5835 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5838 /* Data on one SET contained in the instruction. */
5842 /* The SET rtx itself. */
5844 /* The SET_SRC of the rtx (the original value, if it is changing). */
5846 /* The hash-table element for the SET_SRC of the SET. */
5847 struct table_elt *src_elt;
5848 /* Hash value for the SET_SRC. */
5850 /* Hash value for the SET_DEST. */
5852 /* The SET_DEST, with SUBREG, etc., stripped. */
5854 /* Place where the pointer to the INNER_DEST was found. */
5855 rtx *inner_dest_loc;
5856 /* Nonzero if the SET_SRC is in memory. */
5858 /* Nonzero if the SET_SRC is in a structure. */
5860 /* Nonzero if the SET_SRC contains something
5861 whose value cannot be predicted and understood. */
5863 /* Original machine mode, in case it becomes a CONST_INT. */
5864 enum machine_mode mode;
5865 /* A constant equivalent for SET_SRC, if any. */
5867 /* Hash value of constant equivalent for SET_SRC. */
5868 unsigned src_const_hash;
5869 /* Table entry for constant equivalent for SET_SRC, if any. */
5870 struct table_elt *src_const_elt;
5874 cse_insn (insn, in_libcall_block)
5876 int in_libcall_block;
5878 register rtx x = PATTERN (insn);
5881 register int n_sets = 0;
5883 /* Records what this insn does to set CC0. */
5884 rtx this_insn_cc0 = 0;
5885 enum machine_mode this_insn_cc0_mode;
5886 struct write_data writes_memory;
5887 static struct write_data init = {0, 0, 0, 0};
5890 struct table_elt *src_eqv_elt = 0;
5891 int src_eqv_volatile;
5892 int src_eqv_in_memory;
5893 int src_eqv_in_struct;
5894 unsigned src_eqv_hash;
5899 writes_memory = init;
5901 /* Find all the SETs and CLOBBERs in this instruction.
5902 Record all the SETs in the array `set' and count them.
5903 Also determine whether there is a CLOBBER that invalidates
5904 all memory references, or all references at varying addresses. */
5906 if (GET_CODE (insn) == CALL_INSN)
5908 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
5909 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
5910 invalidate (SET_DEST (XEXP (tem, 0)));
5913 if (GET_CODE (x) == SET)
5915 sets = (struct set *) alloca (sizeof (struct set));
5918 /* Ignore SETs that are unconditional jumps.
5919 They never need cse processing, so this does not hurt.
5920 The reason is not efficiency but rather
5921 so that we can test at the end for instructions
5922 that have been simplified to unconditional jumps
5923 and not be misled by unchanged instructions
5924 that were unconditional jumps to begin with. */
5925 if (SET_DEST (x) == pc_rtx
5926 && GET_CODE (SET_SRC (x)) == LABEL_REF)
5929 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5930 The hard function value register is used only once, to copy to
5931 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5932 Ensure we invalidate the destination register. On the 80386 no
5933 other code would invalidate it since it is a fixed_reg.
5934 We need not check the return of apply_change_group; see canon_reg. */
5936 else if (GET_CODE (SET_SRC (x)) == CALL)
5938 canon_reg (SET_SRC (x), insn);
5939 apply_change_group ();
5940 fold_rtx (SET_SRC (x), insn);
5941 invalidate (SET_DEST (x));
5946 else if (GET_CODE (x) == PARALLEL)
5948 register int lim = XVECLEN (x, 0);
5950 sets = (struct set *) alloca (lim * sizeof (struct set));
5952 /* Find all regs explicitly clobbered in this insn,
5953 and ensure they are not replaced with any other regs
5954 elsewhere in this insn.
5955 When a reg that is clobbered is also used for input,
5956 we should presume that that is for a reason,
5957 and we should not substitute some other register
5958 which is not supposed to be clobbered.
5959 Therefore, this loop cannot be merged into the one below
5960 because a CALL may precede a CLOBBER and refer to the
5961 value clobbered. We must not let a canonicalization do
5962 anything in that case. */
5963 for (i = 0; i < lim; i++)
5965 register rtx y = XVECEXP (x, 0, i);
5966 if (GET_CODE (y) == CLOBBER)
5968 rtx clobbered = XEXP (y, 0);
5970 if (GET_CODE (clobbered) == REG
5971 || GET_CODE (clobbered) == SUBREG)
5972 invalidate (clobbered);
5973 else if (GET_CODE (clobbered) == STRICT_LOW_PART
5974 || GET_CODE (clobbered) == ZERO_EXTRACT)
5975 invalidate (XEXP (clobbered, 0));
5979 for (i = 0; i < lim; i++)
5981 register rtx y = XVECEXP (x, 0, i);
5982 if (GET_CODE (y) == SET)
5984 /* As above, we ignore unconditional jumps and call-insns and
5985 ignore the result of apply_change_group. */
5986 if (GET_CODE (SET_SRC (y)) == CALL)
5988 canon_reg (SET_SRC (y), insn);
5989 apply_change_group ();
5990 fold_rtx (SET_SRC (y), insn);
5991 invalidate (SET_DEST (y));
5993 else if (SET_DEST (y) == pc_rtx
5994 && GET_CODE (SET_SRC (y)) == LABEL_REF)
5997 sets[n_sets++].rtl = y;
5999 else if (GET_CODE (y) == CLOBBER)
6001 /* If we clobber memory, take note of that,
6002 and canon the address.
6003 This does nothing when a register is clobbered
6004 because we have already invalidated the reg. */
6005 if (GET_CODE (XEXP (y, 0)) == MEM)
6007 canon_reg (XEXP (y, 0), NULL_RTX);
6008 note_mem_written (XEXP (y, 0), &writes_memory);
6011 else if (GET_CODE (y) == USE
6012 && ! (GET_CODE (XEXP (y, 0)) == REG
6013 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6014 canon_reg (y, NULL_RTX);
6015 else if (GET_CODE (y) == CALL)
6017 /* The result of apply_change_group can be ignored; see
6019 canon_reg (y, insn);
6020 apply_change_group ();
6025 else if (GET_CODE (x) == CLOBBER)
6027 if (GET_CODE (XEXP (x, 0)) == MEM)
6029 canon_reg (XEXP (x, 0), NULL_RTX);
6030 note_mem_written (XEXP (x, 0), &writes_memory);
6034 /* Canonicalize a USE of a pseudo register or memory location. */
6035 else if (GET_CODE (x) == USE
6036 && ! (GET_CODE (XEXP (x, 0)) == REG
6037 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6038 canon_reg (XEXP (x, 0), NULL_RTX);
6039 else if (GET_CODE (x) == CALL)
6041 /* The result of apply_change_group can be ignored; see canon_reg. */
6042 canon_reg (x, insn);
6043 apply_change_group ();
6047 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6048 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6049 is handled specially for this case, and if it isn't set, then there will
6050 be no equivalence for the destinatation. */
6051 if (n_sets == 1 && REG_NOTES (insn) != 0
6052 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6053 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6054 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6055 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6057 /* Canonicalize sources and addresses of destinations.
6058 We do this in a separate pass to avoid problems when a MATCH_DUP is
6059 present in the insn pattern. In that case, we want to ensure that
6060 we don't break the duplicate nature of the pattern. So we will replace
6061 both operands at the same time. Otherwise, we would fail to find an
6062 equivalent substitution in the loop calling validate_change below.
6064 We used to suppress canonicalization of DEST if it appears in SRC,
6065 but we don't do this any more. */
6067 for (i = 0; i < n_sets; i++)
6069 rtx dest = SET_DEST (sets[i].rtl);
6070 rtx src = SET_SRC (sets[i].rtl);
6071 rtx new = canon_reg (src, insn);
6073 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6074 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6075 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6076 || insn_n_dups[recog_memoized (insn)] > 0)
6077 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6079 SET_SRC (sets[i].rtl) = new;
6081 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6083 validate_change (insn, &XEXP (dest, 1),
6084 canon_reg (XEXP (dest, 1), insn), 1);
6085 validate_change (insn, &XEXP (dest, 2),
6086 canon_reg (XEXP (dest, 2), insn), 1);
6089 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6090 || GET_CODE (dest) == ZERO_EXTRACT
6091 || GET_CODE (dest) == SIGN_EXTRACT)
6092 dest = XEXP (dest, 0);
6094 if (GET_CODE (dest) == MEM)
6095 canon_reg (dest, insn);
6098 /* Now that we have done all the replacements, we can apply the change
6099 group and see if they all work. Note that this will cause some
6100 canonicalizations that would have worked individually not to be applied
6101 because some other canonicalization didn't work, but this should not
6104 The result of apply_change_group can be ignored; see canon_reg. */
6106 apply_change_group ();
6108 /* Set sets[i].src_elt to the class each source belongs to.
6109 Detect assignments from or to volatile things
6110 and set set[i] to zero so they will be ignored
6111 in the rest of this function.
6113 Nothing in this loop changes the hash table or the register chains. */
6115 for (i = 0; i < n_sets; i++)
6117 register rtx src, dest;
6118 register rtx src_folded;
6119 register struct table_elt *elt = 0, *p;
6120 enum machine_mode mode;
6123 rtx src_related = 0;
6124 struct table_elt *src_const_elt = 0;
6125 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6126 int src_related_cost = 10000, src_elt_cost = 10000;
6127 /* Set non-zero if we need to call force_const_mem on with the
6128 contents of src_folded before using it. */
6129 int src_folded_force_flag = 0;
6131 dest = SET_DEST (sets[i].rtl);
6132 src = SET_SRC (sets[i].rtl);
6134 /* If SRC is a constant that has no machine mode,
6135 hash it with the destination's machine mode.
6136 This way we can keep different modes separate. */
6138 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6139 sets[i].mode = mode;
6143 enum machine_mode eqvmode = mode;
6144 if (GET_CODE (dest) == STRICT_LOW_PART)
6145 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6147 hash_arg_in_memory = 0;
6148 hash_arg_in_struct = 0;
6149 src_eqv = fold_rtx (src_eqv, insn);
6150 src_eqv_hash = HASH (src_eqv, eqvmode);
6152 /* Find the equivalence class for the equivalent expression. */
6155 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6157 src_eqv_volatile = do_not_record;
6158 src_eqv_in_memory = hash_arg_in_memory;
6159 src_eqv_in_struct = hash_arg_in_struct;
6162 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6163 value of the INNER register, not the destination. So it is not
6164 a legal substitution for the source. But save it for later. */
6165 if (GET_CODE (dest) == STRICT_LOW_PART)
6168 src_eqv_here = src_eqv;
6170 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6171 simplified result, which may not necessarily be valid. */
6172 src_folded = fold_rtx (src, insn);
6174 /* If storing a constant in a bitfield, pre-truncate the constant
6175 so we will be able to record it later. */
6176 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6177 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6179 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6181 if (GET_CODE (src) == CONST_INT
6182 && GET_CODE (width) == CONST_INT
6183 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6184 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6186 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6187 << INTVAL (width)) - 1));
6190 /* Compute SRC's hash code, and also notice if it
6191 should not be recorded at all. In that case,
6192 prevent any further processing of this assignment. */
6194 hash_arg_in_memory = 0;
6195 hash_arg_in_struct = 0;
6198 sets[i].src_hash = HASH (src, mode);
6199 sets[i].src_volatile = do_not_record;
6200 sets[i].src_in_memory = hash_arg_in_memory;
6201 sets[i].src_in_struct = hash_arg_in_struct;
6204 /* It is no longer clear why we used to do this, but it doesn't
6205 appear to still be needed. So let's try without it since this
6206 code hurts cse'ing widened ops. */
6207 /* If source is a perverse subreg (such as QI treated as an SI),
6208 treat it as volatile. It may do the work of an SI in one context
6209 where the extra bits are not being used, but cannot replace an SI
6211 if (GET_CODE (src) == SUBREG
6212 && (GET_MODE_SIZE (GET_MODE (src))
6213 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6214 sets[i].src_volatile = 1;
6217 /* Locate all possible equivalent forms for SRC. Try to replace
6218 SRC in the insn with each cheaper equivalent.
6220 We have the following types of equivalents: SRC itself, a folded
6221 version, a value given in a REG_EQUAL note, or a value related
6224 Each of these equivalents may be part of an additional class
6225 of equivalents (if more than one is in the table, they must be in
6226 the same class; we check for this).
6228 If the source is volatile, we don't do any table lookups.
6230 We note any constant equivalent for possible later use in a
6233 if (!sets[i].src_volatile)
6234 elt = lookup (src, sets[i].src_hash, mode);
6236 sets[i].src_elt = elt;
6238 if (elt && src_eqv_here && src_eqv_elt)
6240 if (elt->first_same_value != src_eqv_elt->first_same_value)
6242 /* The REG_EQUAL is indicating that two formerly distinct
6243 classes are now equivalent. So merge them. */
6244 merge_equiv_classes (elt, src_eqv_elt);
6245 src_eqv_hash = HASH (src_eqv, elt->mode);
6246 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6252 else if (src_eqv_elt)
6255 /* Try to find a constant somewhere and record it in `src_const'.
6256 Record its table element, if any, in `src_const_elt'. Look in
6257 any known equivalences first. (If the constant is not in the
6258 table, also set `sets[i].src_const_hash'). */
6260 for (p = elt->first_same_value; p; p = p->next_same_value)
6264 src_const_elt = elt;
6269 && (CONSTANT_P (src_folded)
6270 /* Consider (minus (label_ref L1) (label_ref L2)) as
6271 "constant" here so we will record it. This allows us
6272 to fold switch statements when an ADDR_DIFF_VEC is used. */
6273 || (GET_CODE (src_folded) == MINUS
6274 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6275 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6276 src_const = src_folded, src_const_elt = elt;
6277 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6278 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6280 /* If we don't know if the constant is in the table, get its
6281 hash code and look it up. */
6282 if (src_const && src_const_elt == 0)
6284 sets[i].src_const_hash = HASH (src_const, mode);
6285 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6288 sets[i].src_const = src_const;
6289 sets[i].src_const_elt = src_const_elt;
6291 /* If the constant and our source are both in the table, mark them as
6292 equivalent. Otherwise, if a constant is in the table but the source
6293 isn't, set ELT to it. */
6294 if (src_const_elt && elt
6295 && src_const_elt->first_same_value != elt->first_same_value)
6296 merge_equiv_classes (elt, src_const_elt);
6297 else if (src_const_elt && elt == 0)
6298 elt = src_const_elt;
6300 /* See if there is a register linearly related to a constant
6301 equivalent of SRC. */
6303 && (GET_CODE (src_const) == CONST
6304 || (src_const_elt && src_const_elt->related_value != 0)))
6306 src_related = use_related_value (src_const, src_const_elt);
6309 struct table_elt *src_related_elt
6310 = lookup (src_related, HASH (src_related, mode), mode);
6311 if (src_related_elt && elt)
6313 if (elt->first_same_value
6314 != src_related_elt->first_same_value)
6315 /* This can occur when we previously saw a CONST
6316 involving a SYMBOL_REF and then see the SYMBOL_REF
6317 twice. Merge the involved classes. */
6318 merge_equiv_classes (elt, src_related_elt);
6321 src_related_elt = 0;
6323 else if (src_related_elt && elt == 0)
6324 elt = src_related_elt;
6328 /* See if we have a CONST_INT that is already in a register in a
6331 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6332 && GET_MODE_CLASS (mode) == MODE_INT
6333 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6335 enum machine_mode wider_mode;
6337 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6338 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6339 && src_related == 0;
6340 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6342 struct table_elt *const_elt
6343 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6348 for (const_elt = const_elt->first_same_value;
6349 const_elt; const_elt = const_elt->next_same_value)
6350 if (GET_CODE (const_elt->exp) == REG)
6352 src_related = gen_lowpart_if_possible (mode,
6359 /* Another possibility is that we have an AND with a constant in
6360 a mode narrower than a word. If so, it might have been generated
6361 as part of an "if" which would narrow the AND. If we already
6362 have done the AND in a wider mode, we can use a SUBREG of that
6365 if (flag_expensive_optimizations && ! src_related
6366 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6367 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6369 enum machine_mode tmode;
6370 rtx new_and = gen_rtx (AND, VOIDmode, NULL_RTX, XEXP (src, 1));
6372 for (tmode = GET_MODE_WIDER_MODE (mode);
6373 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6374 tmode = GET_MODE_WIDER_MODE (tmode))
6376 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6377 struct table_elt *larger_elt;
6381 PUT_MODE (new_and, tmode);
6382 XEXP (new_and, 0) = inner;
6383 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6384 if (larger_elt == 0)
6387 for (larger_elt = larger_elt->first_same_value;
6388 larger_elt; larger_elt = larger_elt->next_same_value)
6389 if (GET_CODE (larger_elt->exp) == REG)
6392 = gen_lowpart_if_possible (mode, larger_elt->exp);
6402 #ifdef LOAD_EXTEND_OP
6403 /* See if a MEM has already been loaded with a widening operation;
6404 if it has, we can use a subreg of that. Many CISC machines
6405 also have such operations, but this is only likely to be
6406 beneficial these machines. */
6408 if (flag_expensive_optimizations && src_related == 0
6409 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6410 && GET_MODE_CLASS (mode) == MODE_INT
6411 && GET_CODE (src) == MEM && ! do_not_record
6412 && LOAD_EXTEND_OP (mode) != NIL)
6414 enum machine_mode tmode;
6416 /* Set what we are trying to extend and the operation it might
6417 have been extended with. */
6418 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6419 XEXP (memory_extend_rtx, 0) = src;
6421 for (tmode = GET_MODE_WIDER_MODE (mode);
6422 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6423 tmode = GET_MODE_WIDER_MODE (tmode))
6425 struct table_elt *larger_elt;
6427 PUT_MODE (memory_extend_rtx, tmode);
6428 larger_elt = lookup (memory_extend_rtx,
6429 HASH (memory_extend_rtx, tmode), tmode);
6430 if (larger_elt == 0)
6433 for (larger_elt = larger_elt->first_same_value;
6434 larger_elt; larger_elt = larger_elt->next_same_value)
6435 if (GET_CODE (larger_elt->exp) == REG)
6437 src_related = gen_lowpart_if_possible (mode,
6446 #endif /* LOAD_EXTEND_OP */
6448 if (src == src_folded)
6451 /* At this point, ELT, if non-zero, points to a class of expressions
6452 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6453 and SRC_RELATED, if non-zero, each contain additional equivalent
6454 expressions. Prune these latter expressions by deleting expressions
6455 already in the equivalence class.
6457 Check for an equivalent identical to the destination. If found,
6458 this is the preferred equivalent since it will likely lead to
6459 elimination of the insn. Indicate this by placing it in
6462 if (elt) elt = elt->first_same_value;
6463 for (p = elt; p; p = p->next_same_value)
6465 enum rtx_code code = GET_CODE (p->exp);
6467 /* If the expression is not valid, ignore it. Then we do not
6468 have to check for validity below. In most cases, we can use
6469 `rtx_equal_p', since canonicalization has already been done. */
6470 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6473 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6475 else if (src_folded && GET_CODE (src_folded) == code
6476 && rtx_equal_p (src_folded, p->exp))
6478 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6479 && rtx_equal_p (src_eqv_here, p->exp))
6481 else if (src_related && GET_CODE (src_related) == code
6482 && rtx_equal_p (src_related, p->exp))
6485 /* This is the same as the destination of the insns, we want
6486 to prefer it. Copy it to src_related. The code below will
6487 then give it a negative cost. */
6488 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
6493 /* Find the cheapest valid equivalent, trying all the available
6494 possibilities. Prefer items not in the hash table to ones
6495 that are when they are equal cost. Note that we can never
6496 worsen an insn as the current contents will also succeed.
6497 If we find an equivalent identical to the destination, use it as best,
6498 since this insn will probably be eliminated in that case. */
6501 if (rtx_equal_p (src, dest))
6504 src_cost = COST (src);
6509 if (rtx_equal_p (src_eqv_here, dest))
6512 src_eqv_cost = COST (src_eqv_here);
6517 if (rtx_equal_p (src_folded, dest))
6518 src_folded_cost = -1;
6520 src_folded_cost = COST (src_folded);
6525 if (rtx_equal_p (src_related, dest))
6526 src_related_cost = -1;
6528 src_related_cost = COST (src_related);
6531 /* If this was an indirect jump insn, a known label will really be
6532 cheaper even though it looks more expensive. */
6533 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
6534 src_folded = src_const, src_folded_cost = -1;
6536 /* Terminate loop when replacement made. This must terminate since
6537 the current contents will be tested and will always be valid. */
6542 /* Skip invalid entries. */
6543 while (elt && GET_CODE (elt->exp) != REG
6544 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6545 elt = elt->next_same_value;
6547 if (elt) src_elt_cost = elt->cost;
6549 /* Find cheapest and skip it for the next time. For items
6550 of equal cost, use this order:
6551 src_folded, src, src_eqv, src_related and hash table entry. */
6552 if (src_folded_cost <= src_cost
6553 && src_folded_cost <= src_eqv_cost
6554 && src_folded_cost <= src_related_cost
6555 && src_folded_cost <= src_elt_cost)
6557 trial = src_folded, src_folded_cost = 10000;
6558 if (src_folded_force_flag)
6559 trial = force_const_mem (mode, trial);
6561 else if (src_cost <= src_eqv_cost
6562 && src_cost <= src_related_cost
6563 && src_cost <= src_elt_cost)
6564 trial = src, src_cost = 10000;
6565 else if (src_eqv_cost <= src_related_cost
6566 && src_eqv_cost <= src_elt_cost)
6567 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
6568 else if (src_related_cost <= src_elt_cost)
6569 trial = copy_rtx (src_related), src_related_cost = 10000;
6572 trial = copy_rtx (elt->exp);
6573 elt = elt->next_same_value;
6574 src_elt_cost = 10000;
6577 /* We don't normally have an insn matching (set (pc) (pc)), so
6578 check for this separately here. We will delete such an
6581 Tablejump insns contain a USE of the table, so simply replacing
6582 the operand with the constant won't match. This is simply an
6583 unconditional branch, however, and is therefore valid. Just
6584 insert the substitution here and we will delete and re-emit
6587 if (n_sets == 1 && dest == pc_rtx
6589 || (GET_CODE (trial) == LABEL_REF
6590 && ! condjump_p (insn))))
6592 /* If TRIAL is a label in front of a jump table, we are
6593 really falling through the switch (this is how casesi
6594 insns work), so we must branch around the table. */
6595 if (GET_CODE (trial) == CODE_LABEL
6596 && NEXT_INSN (trial) != 0
6597 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
6598 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
6599 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
6601 trial = gen_rtx (LABEL_REF, Pmode, get_label_after (trial));
6603 SET_SRC (sets[i].rtl) = trial;
6604 cse_jumps_altered = 1;
6608 /* Look for a substitution that makes a valid insn. */
6609 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
6611 /* The result of apply_change_group can be ignored; see
6614 validate_change (insn, &SET_SRC (sets[i].rtl),
6615 canon_reg (SET_SRC (sets[i].rtl), insn),
6617 apply_change_group ();
6621 /* If we previously found constant pool entries for
6622 constants and this is a constant, try making a
6623 pool entry. Put it in src_folded unless we already have done
6624 this since that is where it likely came from. */
6626 else if (constant_pool_entries_cost
6627 && CONSTANT_P (trial)
6628 && (src_folded == 0 || GET_CODE (src_folded) != MEM)
6629 && GET_MODE_CLASS (mode) != MODE_CC)
6631 src_folded_force_flag = 1;
6633 src_folded_cost = constant_pool_entries_cost;
6637 src = SET_SRC (sets[i].rtl);
6639 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6640 However, there is an important exception: If both are registers
6641 that are not the head of their equivalence class, replace SET_SRC
6642 with the head of the class. If we do not do this, we will have
6643 both registers live over a portion of the basic block. This way,
6644 their lifetimes will likely abut instead of overlapping. */
6645 if (GET_CODE (dest) == REG
6646 && REGNO_QTY_VALID_P (REGNO (dest))
6647 && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
6648 && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
6649 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
6650 /* Don't do this if the original insn had a hard reg as
6652 && (GET_CODE (sets[i].src) != REG
6653 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
6654 /* We can't call canon_reg here because it won't do anything if
6655 SRC is a hard register. */
6657 int first = qty_first_reg[reg_qty[REGNO (src)]];
6659 src = SET_SRC (sets[i].rtl)
6660 = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
6661 : gen_rtx (REG, GET_MODE (src), first);
6663 /* If we had a constant that is cheaper than what we are now
6664 setting SRC to, use that constant. We ignored it when we
6665 thought we could make this into a no-op. */
6666 if (src_const && COST (src_const) < COST (src)
6667 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0))
6671 /* If we made a change, recompute SRC values. */
6672 if (src != sets[i].src)
6675 hash_arg_in_memory = 0;
6676 hash_arg_in_struct = 0;
6678 sets[i].src_hash = HASH (src, mode);
6679 sets[i].src_volatile = do_not_record;
6680 sets[i].src_in_memory = hash_arg_in_memory;
6681 sets[i].src_in_struct = hash_arg_in_struct;
6682 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
6685 /* If this is a single SET, we are setting a register, and we have an
6686 equivalent constant, we want to add a REG_NOTE. We don't want
6687 to write a REG_EQUAL note for a constant pseudo since verifying that
6688 that pseudo hasn't been eliminated is a pain. Such a note also
6689 won't help anything. */
6690 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
6691 && GET_CODE (src_const) != REG)
6693 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6695 /* Record the actual constant value in a REG_EQUAL note, making
6696 a new one if one does not already exist. */
6698 XEXP (tem, 0) = src_const;
6700 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL,
6701 src_const, REG_NOTES (insn));
6703 /* If storing a constant value in a register that
6704 previously held the constant value 0,
6705 record this fact with a REG_WAS_0 note on this insn.
6707 Note that the *register* is required to have previously held 0,
6708 not just any register in the quantity and we must point to the
6709 insn that set that register to zero.
6711 Rather than track each register individually, we just see if
6712 the last set for this quantity was for this register. */
6714 if (REGNO_QTY_VALID_P (REGNO (dest))
6715 && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
6717 /* See if we previously had a REG_WAS_0 note. */
6718 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6719 rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
6721 if ((tem = single_set (const_insn)) != 0
6722 && rtx_equal_p (SET_DEST (tem), dest))
6725 XEXP (note, 0) = const_insn;
6727 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0,
6728 const_insn, REG_NOTES (insn));
6733 /* Now deal with the destination. */
6735 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
6737 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6738 to the MEM or REG within it. */
6739 while (GET_CODE (dest) == SIGN_EXTRACT
6740 || GET_CODE (dest) == ZERO_EXTRACT
6741 || GET_CODE (dest) == SUBREG
6742 || GET_CODE (dest) == STRICT_LOW_PART)
6744 sets[i].inner_dest_loc = &XEXP (dest, 0);
6745 dest = XEXP (dest, 0);
6748 sets[i].inner_dest = dest;
6750 if (GET_CODE (dest) == MEM)
6752 dest = fold_rtx (dest, insn);
6754 /* Decide whether we invalidate everything in memory,
6755 or just things at non-fixed places.
6756 Writing a large aggregate must invalidate everything
6757 because we don't know how long it is. */
6758 note_mem_written (dest, &writes_memory);
6761 /* Compute the hash code of the destination now,
6762 before the effects of this instruction are recorded,
6763 since the register values used in the address computation
6764 are those before this instruction. */
6765 sets[i].dest_hash = HASH (dest, mode);
6767 /* Don't enter a bit-field in the hash table
6768 because the value in it after the store
6769 may not equal what was stored, due to truncation. */
6771 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6772 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6774 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6776 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
6777 && GET_CODE (width) == CONST_INT
6778 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6779 && ! (INTVAL (src_const)
6780 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6781 /* Exception: if the value is constant,
6782 and it won't be truncated, record it. */
6786 /* This is chosen so that the destination will be invalidated
6787 but no new value will be recorded.
6788 We must invalidate because sometimes constant
6789 values can be recorded for bitfields. */
6790 sets[i].src_elt = 0;
6791 sets[i].src_volatile = 1;
6797 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6799 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
6801 PUT_CODE (insn, NOTE);
6802 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
6803 NOTE_SOURCE_FILE (insn) = 0;
6804 cse_jumps_altered = 1;
6805 /* One less use of the label this insn used to jump to. */
6806 --LABEL_NUSES (JUMP_LABEL (insn));
6807 /* No more processing for this set. */
6811 /* If this SET is now setting PC to a label, we know it used to
6812 be a conditional or computed branch. So we see if we can follow
6813 it. If it was a computed branch, delete it and re-emit. */
6814 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
6818 /* If this is not in the format for a simple branch and
6819 we are the only SET in it, re-emit it. */
6820 if (! simplejump_p (insn) && n_sets == 1)
6822 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
6823 JUMP_LABEL (new) = XEXP (src, 0);
6824 LABEL_NUSES (XEXP (src, 0))++;
6829 /* Otherwise, force rerecognition, since it probably had
6830 a different pattern before.
6831 This shouldn't really be necessary, since whatever
6832 changed the source value above should have done this.
6833 Until the right place is found, might as well do this here. */
6834 INSN_CODE (insn) = -1;
6836 /* Now that we've converted this jump to an unconditional jump,
6837 there is dead code after it. Delete the dead code until we
6838 reach a BARRIER, the end of the function, or a label. Do
6839 not delete NOTEs except for NOTE_INSN_DELETED since later
6840 phases assume these notes are retained. */
6844 while (NEXT_INSN (p) != 0
6845 && GET_CODE (NEXT_INSN (p)) != BARRIER
6846 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
6848 if (GET_CODE (NEXT_INSN (p)) != NOTE
6849 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
6850 delete_insn (NEXT_INSN (p));
6855 /* If we don't have a BARRIER immediately after INSN, put one there.
6856 Much code assumes that there are no NOTEs between a JUMP_INSN and
6859 if (NEXT_INSN (insn) == 0
6860 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
6861 emit_barrier_after (insn);
6863 /* We might have two BARRIERs separated by notes. Delete the second
6866 if (p != insn && NEXT_INSN (p) != 0
6867 && GET_CODE (NEXT_INSN (p)) == BARRIER)
6868 delete_insn (NEXT_INSN (p));
6870 cse_jumps_altered = 1;
6874 /* If destination is volatile, invalidate it and then do no further
6875 processing for this assignment. */
6877 else if (do_not_record)
6879 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
6880 || GET_CODE (dest) == MEM)
6882 else if (GET_CODE (dest) == STRICT_LOW_PART
6883 || GET_CODE (dest) == ZERO_EXTRACT)
6884 invalidate (XEXP (dest, 0));
6888 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
6889 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
6892 /* If setting CC0, record what it was set to, or a constant, if it
6893 is equivalent to a constant. If it is being set to a floating-point
6894 value, make a COMPARE with the appropriate constant of 0. If we
6895 don't do this, later code can interpret this as a test against
6896 const0_rtx, which can cause problems if we try to put it into an
6897 insn as a floating-point operand. */
6898 if (dest == cc0_rtx)
6900 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
6901 this_insn_cc0_mode = mode;
6902 if (FLOAT_MODE_P (mode))
6903 this_insn_cc0 = gen_rtx (COMPARE, VOIDmode, this_insn_cc0,
6909 /* Now enter all non-volatile source expressions in the hash table
6910 if they are not already present.
6911 Record their equivalence classes in src_elt.
6912 This way we can insert the corresponding destinations into
6913 the same classes even if the actual sources are no longer in them
6914 (having been invalidated). */
6916 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
6917 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
6919 register struct table_elt *elt;
6920 register struct table_elt *classp = sets[0].src_elt;
6921 rtx dest = SET_DEST (sets[0].rtl);
6922 enum machine_mode eqvmode = GET_MODE (dest);
6924 if (GET_CODE (dest) == STRICT_LOW_PART)
6926 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6929 if (insert_regs (src_eqv, classp, 0))
6930 src_eqv_hash = HASH (src_eqv, eqvmode);
6931 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
6932 elt->in_memory = src_eqv_in_memory;
6933 elt->in_struct = src_eqv_in_struct;
6936 /* Check to see if src_eqv_elt is the same as a set source which
6937 does not yet have an elt, and if so set the elt of the set source
6939 for (i = 0; i < n_sets; i++)
6940 if (sets[i].rtl && sets[i].src_elt == 0
6941 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
6942 sets[i].src_elt = src_eqv_elt;
6945 for (i = 0; i < n_sets; i++)
6946 if (sets[i].rtl && ! sets[i].src_volatile
6947 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
6949 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
6951 /* REG_EQUAL in setting a STRICT_LOW_PART
6952 gives an equivalent for the entire destination register,
6953 not just for the subreg being stored in now.
6954 This is a more interesting equivalence, so we arrange later
6955 to treat the entire reg as the destination. */
6956 sets[i].src_elt = src_eqv_elt;
6957 sets[i].src_hash = src_eqv_hash;
6961 /* Insert source and constant equivalent into hash table, if not
6963 register struct table_elt *classp = src_eqv_elt;
6964 register rtx src = sets[i].src;
6965 register rtx dest = SET_DEST (sets[i].rtl);
6966 enum machine_mode mode
6967 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6969 if (sets[i].src_elt == 0)
6971 register struct table_elt *elt;
6973 /* Note that these insert_regs calls cannot remove
6974 any of the src_elt's, because they would have failed to
6975 match if not still valid. */
6976 if (insert_regs (src, classp, 0))
6977 sets[i].src_hash = HASH (src, mode);
6978 elt = insert (src, classp, sets[i].src_hash, mode);
6979 elt->in_memory = sets[i].src_in_memory;
6980 elt->in_struct = sets[i].src_in_struct;
6981 sets[i].src_elt = classp = elt;
6984 if (sets[i].src_const && sets[i].src_const_elt == 0
6985 && src != sets[i].src_const
6986 && ! rtx_equal_p (sets[i].src_const, src))
6987 sets[i].src_elt = insert (sets[i].src_const, classp,
6988 sets[i].src_const_hash, mode);
6991 else if (sets[i].src_elt == 0)
6992 /* If we did not insert the source into the hash table (e.g., it was
6993 volatile), note the equivalence class for the REG_EQUAL value, if any,
6994 so that the destination goes into that class. */
6995 sets[i].src_elt = src_eqv_elt;
6997 invalidate_from_clobbers (&writes_memory, x);
6999 /* Some registers are invalidated by subroutine calls. Memory is
7000 invalidated by non-constant calls. */
7002 if (GET_CODE (insn) == CALL_INSN)
7004 static struct write_data everything = {0, 1, 1, 1};
7006 if (! CONST_CALL_P (insn))
7007 invalidate_memory (&everything);
7008 invalidate_for_call ();
7011 /* Now invalidate everything set by this instruction.
7012 If a SUBREG or other funny destination is being set,
7013 sets[i].rtl is still nonzero, so here we invalidate the reg
7014 a part of which is being set. */
7016 for (i = 0; i < n_sets; i++)
7019 register rtx dest = sets[i].inner_dest;
7021 /* Needed for registers to remove the register from its
7022 previous quantity's chain.
7023 Needed for memory if this is a nonvarying address, unless
7024 we have just done an invalidate_memory that covers even those. */
7025 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7026 || (! writes_memory.all && ! cse_rtx_addr_varies_p (dest)))
7028 else if (GET_CODE (dest) == STRICT_LOW_PART
7029 || GET_CODE (dest) == ZERO_EXTRACT)
7030 invalidate (XEXP (dest, 0));
7033 /* Make sure registers mentioned in destinations
7034 are safe for use in an expression to be inserted.
7035 This removes from the hash table
7036 any invalid entry that refers to one of these registers.
7038 We don't care about the return value from mention_regs because
7039 we are going to hash the SET_DEST values unconditionally. */
7041 for (i = 0; i < n_sets; i++)
7042 if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG)
7043 mention_regs (SET_DEST (sets[i].rtl));
7045 /* We may have just removed some of the src_elt's from the hash table.
7046 So replace each one with the current head of the same class. */
7048 for (i = 0; i < n_sets; i++)
7051 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7052 /* If elt was removed, find current head of same class,
7053 or 0 if nothing remains of that class. */
7055 register struct table_elt *elt = sets[i].src_elt;
7057 while (elt && elt->prev_same_value)
7058 elt = elt->prev_same_value;
7060 while (elt && elt->first_same_value == 0)
7061 elt = elt->next_same_value;
7062 sets[i].src_elt = elt ? elt->first_same_value : 0;
7066 /* Now insert the destinations into their equivalence classes. */
7068 for (i = 0; i < n_sets; i++)
7071 register rtx dest = SET_DEST (sets[i].rtl);
7072 register struct table_elt *elt;
7074 /* Don't record value if we are not supposed to risk allocating
7075 floating-point values in registers that might be wider than
7077 if ((flag_float_store
7078 && GET_CODE (dest) == MEM
7079 && FLOAT_MODE_P (GET_MODE (dest)))
7080 /* Don't record values of destinations set inside a libcall block
7081 since we might delete the libcall. Things should have been set
7082 up so we won't want to reuse such a value, but we play it safe
7085 /* If we didn't put a REG_EQUAL value or a source into the hash
7086 table, there is no point is recording DEST. */
7087 || sets[i].src_elt == 0)
7090 /* STRICT_LOW_PART isn't part of the value BEING set,
7091 and neither is the SUBREG inside it.
7092 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7093 if (GET_CODE (dest) == STRICT_LOW_PART)
7094 dest = SUBREG_REG (XEXP (dest, 0));
7096 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7097 /* Registers must also be inserted into chains for quantities. */
7098 if (insert_regs (dest, sets[i].src_elt, 1))
7099 /* If `insert_regs' changes something, the hash code must be
7101 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7103 elt = insert (dest, sets[i].src_elt,
7104 sets[i].dest_hash, GET_MODE (dest));
7105 elt->in_memory = GET_CODE (sets[i].inner_dest) == MEM;
7108 /* This implicitly assumes a whole struct
7109 need not have MEM_IN_STRUCT_P.
7110 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7111 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7112 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7115 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7116 narrower than M2, and both M1 and M2 are the same number of words,
7117 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7118 make that equivalence as well.
7120 However, BAR may have equivalences for which gen_lowpart_if_possible
7121 will produce a simpler value than gen_lowpart_if_possible applied to
7122 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7123 BAR's equivalences. If we don't get a simplified form, make
7124 the SUBREG. It will not be used in an equivalence, but will
7125 cause two similar assignments to be detected.
7127 Note the loop below will find SUBREG_REG (DEST) since we have
7128 already entered SRC and DEST of the SET in the table. */
7130 if (GET_CODE (dest) == SUBREG
7131 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) / UNITS_PER_WORD
7132 == GET_MODE_SIZE (GET_MODE (dest)) / UNITS_PER_WORD)
7133 && (GET_MODE_SIZE (GET_MODE (dest))
7134 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7135 && sets[i].src_elt != 0)
7137 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7138 struct table_elt *elt, *classp = 0;
7140 for (elt = sets[i].src_elt->first_same_value; elt;
7141 elt = elt->next_same_value)
7145 struct table_elt *src_elt;
7147 /* Ignore invalid entries. */
7148 if (GET_CODE (elt->exp) != REG
7149 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7152 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7154 new_src = gen_rtx (SUBREG, new_mode, elt->exp, 0);
7156 src_hash = HASH (new_src, new_mode);
7157 src_elt = lookup (new_src, src_hash, new_mode);
7159 /* Put the new source in the hash table is if isn't
7163 if (insert_regs (new_src, classp, 0))
7164 src_hash = HASH (new_src, new_mode);
7165 src_elt = insert (new_src, classp, src_hash, new_mode);
7166 src_elt->in_memory = elt->in_memory;
7167 src_elt->in_struct = elt->in_struct;
7169 else if (classp && classp != src_elt->first_same_value)
7170 /* Show that two things that we've seen before are
7171 actually the same. */
7172 merge_equiv_classes (src_elt, classp);
7174 classp = src_elt->first_same_value;
7179 /* Special handling for (set REG0 REG1)
7180 where REG0 is the "cheapest", cheaper than REG1.
7181 After cse, REG1 will probably not be used in the sequel,
7182 so (if easily done) change this insn to (set REG1 REG0) and
7183 replace REG1 with REG0 in the previous insn that computed their value.
7184 Then REG1 will become a dead store and won't cloud the situation
7185 for later optimizations.
7187 Do not make this change if REG1 is a hard register, because it will
7188 then be used in the sequel and we may be changing a two-operand insn
7189 into a three-operand insn.
7191 Also do not do this if we are operating on a copy of INSN. */
7193 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7194 && NEXT_INSN (PREV_INSN (insn)) == insn
7195 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7196 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7197 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7198 && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
7199 == REGNO (SET_DEST (sets[0].rtl))))
7201 rtx prev = PREV_INSN (insn);
7202 while (prev && GET_CODE (prev) == NOTE)
7203 prev = PREV_INSN (prev);
7205 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7206 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7208 rtx dest = SET_DEST (sets[0].rtl);
7209 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7211 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7212 validate_change (insn, & SET_DEST (sets[0].rtl),
7213 SET_SRC (sets[0].rtl), 1);
7214 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7215 apply_change_group ();
7217 /* If REG1 was equivalent to a constant, REG0 is not. */
7219 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7221 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7222 any REG_WAS_0 note on INSN to PREV. */
7223 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7225 remove_note (prev, note);
7227 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7230 remove_note (insn, note);
7231 XEXP (note, 1) = REG_NOTES (prev);
7232 REG_NOTES (prev) = note;
7237 /* If this is a conditional jump insn, record any known equivalences due to
7238 the condition being tested. */
7240 last_jump_equiv_class = 0;
7241 if (GET_CODE (insn) == JUMP_INSN
7242 && n_sets == 1 && GET_CODE (x) == SET
7243 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7244 record_jump_equiv (insn, 0);
7247 /* If the previous insn set CC0 and this insn no longer references CC0,
7248 delete the previous insn. Here we use the fact that nothing expects CC0
7249 to be valid over an insn, which is true until the final pass. */
7250 if (prev_insn && GET_CODE (prev_insn) == INSN
7251 && (tem = single_set (prev_insn)) != 0
7252 && SET_DEST (tem) == cc0_rtx
7253 && ! reg_mentioned_p (cc0_rtx, x))
7255 PUT_CODE (prev_insn, NOTE);
7256 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7257 NOTE_SOURCE_FILE (prev_insn) = 0;
7260 prev_insn_cc0 = this_insn_cc0;
7261 prev_insn_cc0_mode = this_insn_cc0_mode;
7267 /* Store 1 in *WRITES_PTR for those categories of memory ref
7268 that must be invalidated when the expression WRITTEN is stored in.
7269 If WRITTEN is null, say everything must be invalidated. */
7272 note_mem_written (written, writes_ptr)
7274 struct write_data *writes_ptr;
7276 static struct write_data everything = {0, 1, 1, 1};
7279 *writes_ptr = everything;
7280 else if (GET_CODE (written) == MEM)
7282 /* Pushing or popping the stack invalidates just the stack pointer. */
7283 rtx addr = XEXP (written, 0);
7284 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7285 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7286 && GET_CODE (XEXP (addr, 0)) == REG
7287 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7292 else if (GET_MODE (written) == BLKmode)
7293 *writes_ptr = everything;
7294 /* (mem (scratch)) means clobber everything. */
7295 else if (GET_CODE (addr) == SCRATCH)
7296 *writes_ptr = everything;
7297 else if (cse_rtx_addr_varies_p (written))
7299 /* A varying address that is a sum indicates an array element,
7300 and that's just as good as a structure element
7301 in implying that we need not invalidate scalar variables.
7302 However, we must allow QImode aliasing of scalars, because the
7303 ANSI C standard allows character pointers to alias anything. */
7304 if (! ((MEM_IN_STRUCT_P (written)
7305 || GET_CODE (XEXP (written, 0)) == PLUS)
7306 && GET_MODE (written) != QImode))
7307 writes_ptr->all = 1;
7308 writes_ptr->nonscalar = 1;
7310 writes_ptr->var = 1;
7314 /* Perform invalidation on the basis of everything about an insn
7315 except for invalidating the actual places that are SET in it.
7316 This includes the places CLOBBERed, and anything that might
7317 alias with something that is SET or CLOBBERed.
7319 W points to the writes_memory for this insn, a struct write_data
7320 saying which kinds of memory references must be invalidated.
7321 X is the pattern of the insn. */
7324 invalidate_from_clobbers (w, x)
7325 struct write_data *w;
7328 /* If W->var is not set, W specifies no action.
7329 If W->all is set, this step gets all memory refs
7330 so they can be ignored in the rest of this function. */
7332 invalidate_memory (w);
7336 if (reg_tick[STACK_POINTER_REGNUM] >= 0)
7337 reg_tick[STACK_POINTER_REGNUM]++;
7339 /* This should be *very* rare. */
7340 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7341 invalidate (stack_pointer_rtx);
7344 if (GET_CODE (x) == CLOBBER)
7346 rtx ref = XEXP (x, 0);
7349 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7350 || (GET_CODE (ref) == MEM && ! w->all))
7352 else if (GET_CODE (ref) == STRICT_LOW_PART
7353 || GET_CODE (ref) == ZERO_EXTRACT)
7354 invalidate (XEXP (ref, 0));
7357 else if (GET_CODE (x) == PARALLEL)
7360 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
7362 register rtx y = XVECEXP (x, 0, i);
7363 if (GET_CODE (y) == CLOBBER)
7365 rtx ref = XEXP (y, 0);
7368 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7369 || (GET_CODE (ref) == MEM && !w->all))
7371 else if (GET_CODE (ref) == STRICT_LOW_PART
7372 || GET_CODE (ref) == ZERO_EXTRACT)
7373 invalidate (XEXP (ref, 0));
7380 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7381 and replace any registers in them with either an equivalent constant
7382 or the canonical form of the register. If we are inside an address,
7383 only do this if the address remains valid.
7385 OBJECT is 0 except when within a MEM in which case it is the MEM.
7387 Return the replacement for X. */
7390 cse_process_notes (x, object)
7394 enum rtx_code code = GET_CODE (x);
7395 char *fmt = GET_RTX_FORMAT (code);
7411 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
7416 if (REG_NOTE_KIND (x) == REG_EQUAL)
7417 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
7419 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
7425 rtx new = cse_process_notes (XEXP (x, 0), object);
7426 /* We don't substitute VOIDmode constants into these rtx,
7427 since they would impede folding. */
7428 if (GET_MODE (new) != VOIDmode)
7429 validate_change (object, &XEXP (x, 0), new, 0);
7434 i = reg_qty[REGNO (x)];
7436 /* Return a constant or a constant register. */
7437 if (REGNO_QTY_VALID_P (REGNO (x))
7438 && qty_const[i] != 0
7439 && (CONSTANT_P (qty_const[i])
7440 || GET_CODE (qty_const[i]) == REG))
7442 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
7447 /* Otherwise, canonicalize this register. */
7448 return canon_reg (x, NULL_RTX);
7451 for (i = 0; i < GET_RTX_LENGTH (code); i++)
7453 validate_change (object, &XEXP (x, i),
7454 cse_process_notes (XEXP (x, i), object), 0);
7459 /* Find common subexpressions between the end test of a loop and the beginning
7460 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7462 Often we have a loop where an expression in the exit test is used
7463 in the body of the loop. For example "while (*p) *q++ = *p++;".
7464 Because of the way we duplicate the loop exit test in front of the loop,
7465 however, we don't detect that common subexpression. This will be caught
7466 when global cse is implemented, but this is a quite common case.
7468 This function handles the most common cases of these common expressions.
7469 It is called after we have processed the basic block ending with the
7470 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7471 jumps to a label used only once. */
7474 cse_around_loop (loop_start)
7479 struct table_elt *p;
7481 /* If the jump at the end of the loop doesn't go to the start, we don't
7483 for (insn = PREV_INSN (loop_start);
7484 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
7485 insn = PREV_INSN (insn))
7489 || GET_CODE (insn) != NOTE
7490 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
7493 /* If the last insn of the loop (the end test) was an NE comparison,
7494 we will interpret it as an EQ comparison, since we fell through
7495 the loop. Any equivalences resulting from that comparison are
7496 therefore not valid and must be invalidated. */
7497 if (last_jump_equiv_class)
7498 for (p = last_jump_equiv_class->first_same_value; p;
7499 p = p->next_same_value)
7500 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
7501 || GET_CODE (p->exp) == SUBREG)
7502 invalidate (p->exp);
7503 else if (GET_CODE (p->exp) == STRICT_LOW_PART
7504 || GET_CODE (p->exp) == ZERO_EXTRACT)
7505 invalidate (XEXP (p->exp, 0));
7507 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7508 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7510 The only thing we do with SET_DEST is invalidate entries, so we
7511 can safely process each SET in order. It is slightly less efficient
7512 to do so, but we only want to handle the most common cases. */
7514 for (insn = NEXT_INSN (loop_start);
7515 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
7516 && ! (GET_CODE (insn) == NOTE
7517 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
7518 insn = NEXT_INSN (insn))
7520 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7521 && (GET_CODE (PATTERN (insn)) == SET
7522 || GET_CODE (PATTERN (insn)) == CLOBBER))
7523 cse_set_around_loop (PATTERN (insn), insn, loop_start);
7524 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7525 && GET_CODE (PATTERN (insn)) == PARALLEL)
7526 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7527 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
7528 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
7529 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
7534 /* Variable used for communications between the next two routines. */
7536 static struct write_data skipped_writes_memory;
7538 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7539 since they are done elsewhere. This function is called via note_stores. */
7542 invalidate_skipped_set (dest, set)
7546 if (GET_CODE (set) == CLOBBER
7553 if (GET_CODE (dest) == MEM)
7554 note_mem_written (dest, &skipped_writes_memory);
7556 /* There are times when an address can appear varying and be a PLUS
7557 during this scan when it would be a fixed address were we to know
7558 the proper equivalences. So promote "nonscalar" to be "all". */
7559 if (skipped_writes_memory.nonscalar)
7560 skipped_writes_memory.all = 1;
7562 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7563 || (! skipped_writes_memory.all && ! cse_rtx_addr_varies_p (dest)))
7565 else if (GET_CODE (dest) == STRICT_LOW_PART
7566 || GET_CODE (dest) == ZERO_EXTRACT)
7567 invalidate (XEXP (dest, 0));
7570 /* Invalidate all insns from START up to the end of the function or the
7571 next label. This called when we wish to CSE around a block that is
7572 conditionally executed. */
7575 invalidate_skipped_block (start)
7579 static struct write_data init = {0, 0, 0, 0};
7580 static struct write_data everything = {0, 1, 1, 1};
7582 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
7583 insn = NEXT_INSN (insn))
7585 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7588 skipped_writes_memory = init;
7590 if (GET_CODE (insn) == CALL_INSN)
7592 invalidate_for_call ();
7593 skipped_writes_memory = everything;
7596 note_stores (PATTERN (insn), invalidate_skipped_set);
7597 invalidate_from_clobbers (&skipped_writes_memory, PATTERN (insn));
7601 /* Used for communication between the following two routines; contains a
7602 value to be checked for modification. */
7604 static rtx cse_check_loop_start_value;
7606 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7607 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7610 cse_check_loop_start (x, set)
7614 if (cse_check_loop_start_value == 0
7615 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
7618 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
7619 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
7620 cse_check_loop_start_value = 0;
7623 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7624 a loop that starts with the label at LOOP_START.
7626 If X is a SET, we see if its SET_SRC is currently in our hash table.
7627 If so, we see if it has a value equal to some register used only in the
7628 loop exit code (as marked by jump.c).
7630 If those two conditions are true, we search backwards from the start of
7631 the loop to see if that same value was loaded into a register that still
7632 retains its value at the start of the loop.
7634 If so, we insert an insn after the load to copy the destination of that
7635 load into the equivalent register and (try to) replace our SET_SRC with that
7638 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7641 cse_set_around_loop (x, insn, loop_start)
7646 struct table_elt *src_elt;
7647 static struct write_data init = {0, 0, 0, 0};
7648 struct write_data writes_memory;
7650 writes_memory = init;
7652 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7653 are setting PC or CC0 or whose SET_SRC is already a register. */
7654 if (GET_CODE (x) == SET
7655 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
7656 && GET_CODE (SET_SRC (x)) != REG)
7658 src_elt = lookup (SET_SRC (x),
7659 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
7660 GET_MODE (SET_DEST (x)));
7663 for (src_elt = src_elt->first_same_value; src_elt;
7664 src_elt = src_elt->next_same_value)
7665 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
7666 && COST (src_elt->exp) < COST (SET_SRC (x)))
7670 /* Look for an insn in front of LOOP_START that sets
7671 something in the desired mode to SET_SRC (x) before we hit
7672 a label or CALL_INSN. */
7674 for (p = prev_nonnote_insn (loop_start);
7675 p && GET_CODE (p) != CALL_INSN
7676 && GET_CODE (p) != CODE_LABEL;
7677 p = prev_nonnote_insn (p))
7678 if ((set = single_set (p)) != 0
7679 && GET_CODE (SET_DEST (set)) == REG
7680 && GET_MODE (SET_DEST (set)) == src_elt->mode
7681 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
7683 /* We now have to ensure that nothing between P
7684 and LOOP_START modified anything referenced in
7685 SET_SRC (x). We know that nothing within the loop
7686 can modify it, or we would have invalidated it in
7690 cse_check_loop_start_value = SET_SRC (x);
7691 for (q = p; q != loop_start; q = NEXT_INSN (q))
7692 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
7693 note_stores (PATTERN (q), cse_check_loop_start);
7695 /* If nothing was changed and we can replace our
7696 SET_SRC, add an insn after P to copy its destination
7697 to what we will be replacing SET_SRC with. */
7698 if (cse_check_loop_start_value
7699 && validate_change (insn, &SET_SRC (x),
7701 emit_insn_after (gen_move_insn (src_elt->exp,
7709 /* Now invalidate anything modified by X. */
7710 note_mem_written (SET_DEST (x), &writes_memory);
7712 if (writes_memory.var)
7713 invalidate_memory (&writes_memory);
7715 /* See comment on similar code in cse_insn for explanation of these tests. */
7716 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
7717 || (GET_CODE (SET_DEST (x)) == MEM && ! writes_memory.all
7718 && ! cse_rtx_addr_varies_p (SET_DEST (x))))
7719 invalidate (SET_DEST (x));
7720 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
7721 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
7722 invalidate (XEXP (SET_DEST (x), 0));
7725 /* Find the end of INSN's basic block and return its range,
7726 the total number of SETs in all the insns of the block, the last insn of the
7727 block, and the branch path.
7729 The branch path indicates which branches should be followed. If a non-zero
7730 path size is specified, the block should be rescanned and a different set
7731 of branches will be taken. The branch path is only used if
7732 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7734 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7735 used to describe the block. It is filled in with the information about
7736 the current block. The incoming structure's branch path, if any, is used
7737 to construct the output branch path. */
7740 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
7742 struct cse_basic_block_data *data;
7749 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
7750 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
7751 int path_size = data->path_size;
7755 /* Update the previous branch path, if any. If the last branch was
7756 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7757 shorten the path by one and look at the previous branch. We know that
7758 at least one branch must have been taken if PATH_SIZE is non-zero. */
7759 while (path_size > 0)
7761 if (data->path[path_size - 1].status != NOT_TAKEN)
7763 data->path[path_size - 1].status = NOT_TAKEN;
7770 /* Scan to end of this basic block. */
7771 while (p && GET_CODE (p) != CODE_LABEL)
7773 /* Don't cse out the end of a loop. This makes a difference
7774 only for the unusual loops that always execute at least once;
7775 all other loops have labels there so we will stop in any case.
7776 Cse'ing out the end of the loop is dangerous because it
7777 might cause an invariant expression inside the loop
7778 to be reused after the end of the loop. This would make it
7779 hard to move the expression out of the loop in loop.c,
7780 especially if it is one of several equivalent expressions
7781 and loop.c would like to eliminate it.
7783 If we are running after loop.c has finished, we can ignore
7784 the NOTE_INSN_LOOP_END. */
7786 if (! after_loop && GET_CODE (p) == NOTE
7787 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
7790 /* Don't cse over a call to setjmp; on some machines (eg vax)
7791 the regs restored by the longjmp come from
7792 a later time than the setjmp. */
7793 if (GET_CODE (p) == NOTE
7794 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
7797 /* A PARALLEL can have lots of SETs in it,
7798 especially if it is really an ASM_OPERANDS. */
7799 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
7800 && GET_CODE (PATTERN (p)) == PARALLEL)
7801 nsets += XVECLEN (PATTERN (p), 0);
7802 else if (GET_CODE (p) != NOTE)
7805 /* Ignore insns made by CSE; they cannot affect the boundaries of
7808 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
7809 high_cuid = INSN_CUID (p);
7810 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
7811 low_cuid = INSN_CUID (p);
7813 /* See if this insn is in our branch path. If it is and we are to
7815 if (path_entry < path_size && data->path[path_entry].branch == p)
7817 if (data->path[path_entry].status != NOT_TAKEN)
7820 /* Point to next entry in path, if any. */
7824 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7825 was specified, we haven't reached our maximum path length, there are
7826 insns following the target of the jump, this is the only use of the
7827 jump label, and the target label is preceded by a BARRIER.
7829 Alternatively, we can follow the jump if it branches around a
7830 block of code and there are no other branches into the block.
7831 In this case invalidate_skipped_block will be called to invalidate any
7832 registers set in the block when following the jump. */
7834 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
7835 && GET_CODE (p) == JUMP_INSN
7836 && GET_CODE (PATTERN (p)) == SET
7837 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
7838 && LABEL_NUSES (JUMP_LABEL (p)) == 1
7839 && NEXT_INSN (JUMP_LABEL (p)) != 0)
7841 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
7842 if ((GET_CODE (q) != NOTE
7843 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
7844 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
7845 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
7848 /* If we ran into a BARRIER, this code is an extension of the
7849 basic block when the branch is taken. */
7850 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
7852 /* Don't allow ourself to keep walking around an
7853 always-executed loop. */
7854 if (next_real_insn (q) == next)
7860 /* Similarly, don't put a branch in our path more than once. */
7861 for (i = 0; i < path_entry; i++)
7862 if (data->path[i].branch == p)
7865 if (i != path_entry)
7868 data->path[path_entry].branch = p;
7869 data->path[path_entry++].status = TAKEN;
7871 /* This branch now ends our path. It was possible that we
7872 didn't see this branch the last time around (when the
7873 insn in front of the target was a JUMP_INSN that was
7874 turned into a no-op). */
7875 path_size = path_entry;
7878 /* Mark block so we won't scan it again later. */
7879 PUT_MODE (NEXT_INSN (p), QImode);
7881 /* Detect a branch around a block of code. */
7882 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
7886 if (next_real_insn (q) == next)
7892 for (i = 0; i < path_entry; i++)
7893 if (data->path[i].branch == p)
7896 if (i != path_entry)
7899 /* This is no_labels_between_p (p, q) with an added check for
7900 reaching the end of a function (in case Q precedes P). */
7901 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
7902 if (GET_CODE (tmp) == CODE_LABEL)
7907 data->path[path_entry].branch = p;
7908 data->path[path_entry++].status = AROUND;
7910 path_size = path_entry;
7913 /* Mark block so we won't scan it again later. */
7914 PUT_MODE (NEXT_INSN (p), QImode);
7921 data->low_cuid = low_cuid;
7922 data->high_cuid = high_cuid;
7923 data->nsets = nsets;
7926 /* If all jumps in the path are not taken, set our path length to zero
7927 so a rescan won't be done. */
7928 for (i = path_size - 1; i >= 0; i--)
7929 if (data->path[i].status != NOT_TAKEN)
7933 data->path_size = 0;
7935 data->path_size = path_size;
7937 /* End the current branch path. */
7938 data->path[path_size].branch = 0;
7941 /* Perform cse on the instructions of a function.
7942 F is the first instruction.
7943 NREGS is one plus the highest pseudo-reg number used in the instruction.
7945 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7946 (only if -frerun-cse-after-loop).
7948 Returns 1 if jump_optimize should be redone due to simplifications
7949 in conditional jump instructions. */
7952 cse_main (f, nregs, after_loop, file)
7958 struct cse_basic_block_data val;
7959 register rtx insn = f;
7962 cse_jumps_altered = 0;
7963 constant_pool_entries_cost = 0;
7970 all_minus_one = (int *) alloca (nregs * sizeof (int));
7971 consec_ints = (int *) alloca (nregs * sizeof (int));
7973 for (i = 0; i < nregs; i++)
7975 all_minus_one[i] = -1;
7979 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
7980 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
7981 reg_qty = (int *) alloca (nregs * sizeof (int));
7982 reg_in_table = (int *) alloca (nregs * sizeof (int));
7983 reg_tick = (int *) alloca (nregs * sizeof (int));
7985 #ifdef LOAD_EXTEND_OP
7987 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7988 and change the code and mode as appropriate. */
7989 memory_extend_rtx = gen_rtx (ZERO_EXTEND, VOIDmode, 0);
7992 /* Discard all the free elements of the previous function
7993 since they are allocated in the temporarily obstack. */
7994 bzero (table, sizeof table);
7995 free_element_chain = 0;
7996 n_elements_made = 0;
7998 /* Find the largest uid. */
8000 max_uid = get_max_uid ();
8001 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8002 bzero (uid_cuid, (max_uid + 1) * sizeof (int));
8004 /* Compute the mapping from uids to cuids.
8005 CUIDs are numbers assigned to insns, like uids,
8006 except that cuids increase monotonically through the code.
8007 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8008 between two insns is not affected by -g. */
8010 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8012 if (GET_CODE (insn) != NOTE
8013 || NOTE_LINE_NUMBER (insn) < 0)
8014 INSN_CUID (insn) = ++i;
8016 /* Give a line number note the same cuid as preceding insn. */
8017 INSN_CUID (insn) = i;
8020 /* Initialize which registers are clobbered by calls. */
8022 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8024 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8025 if ((call_used_regs[i]
8026 /* Used to check !fixed_regs[i] here, but that isn't safe;
8027 fixed regs are still call-clobbered, and sched can get
8028 confused if they can "live across calls".
8030 The frame pointer is always preserved across calls. The arg
8031 pointer is if it is fixed. The stack pointer usually is, unless
8032 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8033 will be present. If we are generating PIC code, the PIC offset
8034 table register is preserved across calls. */
8036 && i != STACK_POINTER_REGNUM
8037 && i != FRAME_POINTER_REGNUM
8038 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8039 && i != HARD_FRAME_POINTER_REGNUM
8041 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8042 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8044 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8045 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8049 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8051 /* Loop over basic blocks.
8052 Compute the maximum number of qty's needed for each basic block
8053 (which is 2 for each SET). */
8057 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8058 flag_cse_skip_blocks);
8060 /* If this basic block was already processed or has no sets, skip it. */
8061 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8063 PUT_MODE (insn, VOIDmode);
8064 insn = (val.last ? NEXT_INSN (val.last) : 0);
8069 cse_basic_block_start = val.low_cuid;
8070 cse_basic_block_end = val.high_cuid;
8071 max_qty = val.nsets * 2;
8074 fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
8075 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8078 /* Make MAX_QTY bigger to give us room to optimize
8079 past the end of this basic block, if that should prove useful. */
8085 /* If this basic block is being extended by following certain jumps,
8086 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8087 Otherwise, we start after this basic block. */
8088 if (val.path_size > 0)
8089 cse_basic_block (insn, val.last, val.path, 0);
8092 int old_cse_jumps_altered = cse_jumps_altered;
8095 /* When cse changes a conditional jump to an unconditional
8096 jump, we want to reprocess the block, since it will give
8097 us a new branch path to investigate. */
8098 cse_jumps_altered = 0;
8099 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8100 if (cse_jumps_altered == 0
8101 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8104 cse_jumps_altered |= old_cse_jumps_altered;
8112 /* Tell refers_to_mem_p that qty_const info is not available. */
8115 if (max_elements_made < n_elements_made)
8116 max_elements_made = n_elements_made;
8118 return cse_jumps_altered;
8121 /* Process a single basic block. FROM and TO and the limits of the basic
8122 block. NEXT_BRANCH points to the branch path when following jumps or
8123 a null path when not following jumps.
8125 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8126 loop. This is true when we are being called for the last time on a
8127 block and this CSE pass is before loop.c. */
8130 cse_basic_block (from, to, next_branch, around_loop)
8131 register rtx from, to;
8132 struct branch_path *next_branch;
8137 int in_libcall_block = 0;
8139 /* Each of these arrays is undefined before max_reg, so only allocate
8140 the space actually needed and adjust the start below. */
8142 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8143 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8144 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8145 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8146 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8148 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8149 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8150 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8152 qty_first_reg -= max_reg;
8153 qty_last_reg -= max_reg;
8154 qty_mode -= max_reg;
8155 qty_const -= max_reg;
8156 qty_const_insn -= max_reg;
8157 qty_comparison_code -= max_reg;
8158 qty_comparison_qty -= max_reg;
8159 qty_comparison_const -= max_reg;
8163 /* TO might be a label. If so, protect it from being deleted. */
8164 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8167 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8169 register enum rtx_code code;
8171 /* See if this is a branch that is part of the path. If so, and it is
8172 to be taken, do so. */
8173 if (next_branch->branch == insn)
8175 enum taken status = next_branch++->status;
8176 if (status != NOT_TAKEN)
8178 if (status == TAKEN)
8179 record_jump_equiv (insn, 1);
8181 invalidate_skipped_block (NEXT_INSN (insn));
8183 /* Set the last insn as the jump insn; it doesn't affect cc0.
8184 Then follow this branch. */
8189 insn = JUMP_LABEL (insn);
8194 code = GET_CODE (insn);
8195 if (GET_MODE (insn) == QImode)
8196 PUT_MODE (insn, VOIDmode);
8198 if (GET_RTX_CLASS (code) == 'i')
8200 /* Process notes first so we have all notes in canonical forms when
8201 looking for duplicate operations. */
8203 if (REG_NOTES (insn))
8204 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8206 /* Track when we are inside in LIBCALL block. Inside such a block,
8207 we do not want to record destinations. The last insn of a
8208 LIBCALL block is not considered to be part of the block, since
8209 its destination is the result of the block and hence should be
8212 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
8213 in_libcall_block = 1;
8214 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8215 in_libcall_block = 0;
8217 cse_insn (insn, in_libcall_block);
8220 /* If INSN is now an unconditional jump, skip to the end of our
8221 basic block by pretending that we just did the last insn in the
8222 basic block. If we are jumping to the end of our block, show
8223 that we can have one usage of TO. */
8225 if (simplejump_p (insn))
8230 if (JUMP_LABEL (insn) == to)
8233 /* Maybe TO was deleted because the jump is unconditional.
8234 If so, there is nothing left in this basic block. */
8235 /* ??? Perhaps it would be smarter to set TO
8236 to whatever follows this insn,
8237 and pretend the basic block had always ended here. */
8238 if (INSN_DELETED_P (to))
8241 insn = PREV_INSN (to);
8244 /* See if it is ok to keep on going past the label
8245 which used to end our basic block. Remember that we incremented
8246 the count of that label, so we decrement it here. If we made
8247 a jump unconditional, TO_USAGE will be one; in that case, we don't
8248 want to count the use in that jump. */
8250 if (to != 0 && NEXT_INSN (insn) == to
8251 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8253 struct cse_basic_block_data val;
8255 insn = NEXT_INSN (to);
8257 if (LABEL_NUSES (to) == 0)
8260 /* Find the end of the following block. Note that we won't be
8261 following branches in this case. If TO was the last insn
8262 in the function, we are done. Similarly, if we deleted the
8263 insn after TO, it must have been because it was preceded by
8264 a BARRIER. In that case, we are done with this block because it
8265 has no continuation. */
8267 if (insn == 0 || INSN_DELETED_P (insn))
8272 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8274 /* If the tables we allocated have enough space left
8275 to handle all the SETs in the next basic block,
8276 continue through it. Otherwise, return,
8277 and that block will be scanned individually. */
8278 if (val.nsets * 2 + next_qty > max_qty)
8281 cse_basic_block_start = val.low_cuid;
8282 cse_basic_block_end = val.high_cuid;
8285 /* Prevent TO from being deleted if it is a label. */
8286 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8289 /* Back up so we process the first insn in the extension. */
8290 insn = PREV_INSN (insn);
8294 if (next_qty > max_qty)
8297 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8298 the previous insn is the only insn that branches to the head of a loop,
8299 we can cse into the loop. Don't do this if we changed the jump
8300 structure of a loop unless we aren't going to be following jumps. */
8302 if ((cse_jumps_altered == 0
8303 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8304 && around_loop && to != 0
8305 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8306 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8307 && JUMP_LABEL (PREV_INSN (to)) != 0
8308 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8309 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8311 return to ? NEXT_INSN (to) : 0;
8314 /* Count the number of times registers are used (not set) in X.
8315 COUNTS is an array in which we accumulate the count, INCR is how much
8316 we count each register usage.
8318 Don't count a usage of DEST, which is the SET_DEST of a SET which
8319 contains X in its SET_SRC. This is because such a SET does not
8320 modify the liveness of DEST. */
8323 count_reg_usage (x, counts, dest, incr)
8336 switch (code = GET_CODE (x))
8340 counts[REGNO (x)] += incr;
8354 /* Unless we are setting a REG, count everything in SET_DEST. */
8355 if (GET_CODE (SET_DEST (x)) != REG)
8356 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
8358 /* If SRC has side-effects, then we can't delete this insn, so the
8359 usage of SET_DEST inside SRC counts.
8361 ??? Strictly-speaking, we might be preserving this insn
8362 because some other SET has side-effects, but that's hard
8363 to do and can't happen now. */
8364 count_reg_usage (SET_SRC (x), counts,
8365 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
8370 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
8372 /* ... falls through ... */
8375 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
8377 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8380 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
8385 if (REG_NOTE_KIND (x) == REG_EQUAL
8386 || GET_CODE (XEXP (x,0)) == USE)
8387 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
8388 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
8392 fmt = GET_RTX_FORMAT (code);
8393 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8396 count_reg_usage (XEXP (x, i), counts, dest, incr);
8397 else if (fmt[i] == 'E')
8398 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8399 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
8403 /* Scan all the insns and delete any that are dead; i.e., they store a register
8404 that is never used or they copy a register to itself.
8406 This is used to remove insns made obviously dead by cse. It improves the
8407 heuristics in loop since it won't try to move dead invariants out of loops
8408 or make givs for dead quantities. The remaining passes of the compilation
8409 are also sped up. */
8412 delete_dead_from_cse (insns, nreg)
8416 int *counts = (int *) alloca (nreg * sizeof (int));
8422 /* First count the number of times each register is used. */
8423 bzero (counts, sizeof (int) * nreg);
8424 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
8425 count_reg_usage (insn, counts, NULL_RTX, 1);
8427 /* Go from the last insn to the first and delete insns that only set unused
8428 registers or copy a register to itself. As we delete an insn, remove
8429 usage counts for registers it uses. */
8430 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
8434 prev = prev_real_insn (insn);
8436 /* Don't delete any insns that are part of a libcall block.
8437 Flow or loop might get confused if we did that. Remember
8438 that we are scanning backwards. */
8439 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8444 else if (GET_CODE (PATTERN (insn)) == SET)
8446 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
8447 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
8451 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
8452 && ! side_effects_p (SET_SRC (PATTERN (insn)))
8453 && ((tem = next_nonnote_insn (insn)) == 0
8454 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8455 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8458 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
8459 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
8460 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
8461 || side_effects_p (SET_SRC (PATTERN (insn))))
8464 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
8465 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8467 rtx elt = XVECEXP (PATTERN (insn), 0, i);
8469 if (GET_CODE (elt) == SET)
8471 if (GET_CODE (SET_DEST (elt)) == REG
8472 && SET_DEST (elt) == SET_SRC (elt))
8476 else if (GET_CODE (SET_DEST (elt)) == CC0
8477 && ! side_effects_p (SET_SRC (elt))
8478 && ((tem = next_nonnote_insn (insn)) == 0
8479 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8480 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8483 else if (GET_CODE (SET_DEST (elt)) != REG
8484 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
8485 || counts[REGNO (SET_DEST (elt))] != 0
8486 || side_effects_p (SET_SRC (elt)))
8489 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
8495 /* If this is a dead insn, delete it and show registers in it aren't
8500 count_reg_usage (insn, counts, NULL_RTX, -1);
8504 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
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