1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
31 #include "basic-block.h"
34 #include "insn-config.h"
45 #include "rtlhooks-def.h"
46 #include "tree-pass.h"
50 /* The basic idea of common subexpression elimination is to go
51 through the code, keeping a record of expressions that would
52 have the same value at the current scan point, and replacing
53 expressions encountered with the cheapest equivalent expression.
55 It is too complicated to keep track of the different possibilities
56 when control paths merge in this code; so, at each label, we forget all
57 that is known and start fresh. This can be described as processing each
58 extended basic block separately. We have a separate pass to perform
61 Note CSE can turn a conditional or computed jump into a nop or
62 an unconditional jump. When this occurs we arrange to run the jump
63 optimizer after CSE to delete the unreachable code.
65 We use two data structures to record the equivalent expressions:
66 a hash table for most expressions, and a vector of "quantity
67 numbers" to record equivalent (pseudo) registers.
69 The use of the special data structure for registers is desirable
70 because it is faster. It is possible because registers references
71 contain a fairly small number, the register number, taken from
72 a contiguously allocated series, and two register references are
73 identical if they have the same number. General expressions
74 do not have any such thing, so the only way to retrieve the
75 information recorded on an expression other than a register
76 is to keep it in a hash table.
78 Registers and "quantity numbers":
80 At the start of each basic block, all of the (hardware and pseudo)
81 registers used in the function are given distinct quantity
82 numbers to indicate their contents. During scan, when the code
83 copies one register into another, we copy the quantity number.
84 When a register is loaded in any other way, we allocate a new
85 quantity number to describe the value generated by this operation.
86 `REG_QTY (N)' records what quantity register N is currently thought
89 All real quantity numbers are greater than or equal to zero.
90 If register N has not been assigned a quantity, `REG_QTY (N)' will
91 equal -N - 1, which is always negative.
93 Quantity numbers below zero do not exist and none of the `qty_table'
94 entries should be referenced with a negative index.
96 We also maintain a bidirectional chain of registers for each
97 quantity number. The `qty_table` members `first_reg' and `last_reg',
98 and `reg_eqv_table' members `next' and `prev' hold these chains.
100 The first register in a chain is the one whose lifespan is least local.
101 Among equals, it is the one that was seen first.
102 We replace any equivalent register with that one.
104 If two registers have the same quantity number, it must be true that
105 REG expressions with qty_table `mode' must be in the hash table for both
106 registers and must be in the same class.
108 The converse is not true. Since hard registers may be referenced in
109 any mode, two REG expressions might be equivalent in the hash table
110 but not have the same quantity number if the quantity number of one
111 of the registers is not the same mode as those expressions.
113 Constants and quantity numbers
115 When a quantity has a known constant value, that value is stored
116 in the appropriate qty_table `const_rtx'. This is in addition to
117 putting the constant in the hash table as is usual for non-regs.
119 Whether a reg or a constant is preferred is determined by the configuration
120 macro CONST_COSTS and will often depend on the constant value. In any
121 event, expressions containing constants can be simplified, by fold_rtx.
123 When a quantity has a known nearly constant value (such as an address
124 of a stack slot), that value is stored in the appropriate qty_table
127 Integer constants don't have a machine mode. However, cse
128 determines the intended machine mode from the destination
129 of the instruction that moves the constant. The machine mode
130 is recorded in the hash table along with the actual RTL
131 constant expression so that different modes are kept separate.
135 To record known equivalences among expressions in general
136 we use a hash table called `table'. It has a fixed number of buckets
137 that contain chains of `struct table_elt' elements for expressions.
138 These chains connect the elements whose expressions have the same
141 Other chains through the same elements connect the elements which
142 currently have equivalent values.
144 Register references in an expression are canonicalized before hashing
145 the expression. This is done using `reg_qty' and qty_table `first_reg'.
146 The hash code of a register reference is computed using the quantity
147 number, not the register number.
149 When the value of an expression changes, it is necessary to remove from the
150 hash table not just that expression but all expressions whose values
151 could be different as a result.
153 1. If the value changing is in memory, except in special cases
154 ANYTHING referring to memory could be changed. That is because
155 nobody knows where a pointer does not point.
156 The function `invalidate_memory' removes what is necessary.
158 The special cases are when the address is constant or is
159 a constant plus a fixed register such as the frame pointer
160 or a static chain pointer. When such addresses are stored in,
161 we can tell exactly which other such addresses must be invalidated
162 due to overlap. `invalidate' does this.
163 All expressions that refer to non-constant
164 memory addresses are also invalidated. `invalidate_memory' does this.
166 2. If the value changing is a register, all expressions
167 containing references to that register, and only those,
170 Because searching the entire hash table for expressions that contain
171 a register is very slow, we try to figure out when it isn't necessary.
172 Precisely, this is necessary only when expressions have been
173 entered in the hash table using this register, and then the value has
174 changed, and then another expression wants to be added to refer to
175 the register's new value. This sequence of circumstances is rare
176 within any one basic block.
178 `REG_TICK' and `REG_IN_TABLE', accessors for members of
179 cse_reg_info, are used to detect this case. REG_TICK (i) is
180 incremented whenever a value is stored in register i.
181 REG_IN_TABLE (i) holds -1 if no references to register i have been
182 entered in the table; otherwise, it contains the value REG_TICK (i)
183 had when the references were entered. If we want to enter a
184 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
185 remove old references. Until we want to enter a new entry, the
186 mere fact that the two vectors don't match makes the entries be
187 ignored if anyone tries to match them.
189 Registers themselves are entered in the hash table as well as in
190 the equivalent-register chains. However, `REG_TICK' and
191 `REG_IN_TABLE' do not apply to expressions which are simple
192 register references. These expressions are removed from the table
193 immediately when they become invalid, and this can be done even if
194 we do not immediately search for all the expressions that refer to
197 A CLOBBER rtx in an instruction invalidates its operand for further
198 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
199 invalidates everything that resides in memory.
203 Constant expressions that differ only by an additive integer
204 are called related. When a constant expression is put in
205 the table, the related expression with no constant term
206 is also entered. These are made to point at each other
207 so that it is possible to find out if there exists any
208 register equivalent to an expression related to a given expression. */
210 /* Length of qty_table vector. We know in advance we will not need
211 a quantity number this big. */
215 /* Next quantity number to be allocated.
216 This is 1 + the largest number needed so far. */
220 /* Per-qty information tracking.
222 `first_reg' and `last_reg' track the head and tail of the
223 chain of registers which currently contain this quantity.
225 `mode' contains the machine mode of this quantity.
227 `const_rtx' holds the rtx of the constant value of this
228 quantity, if known. A summations of the frame/arg pointer
229 and a constant can also be entered here. When this holds
230 a known value, `const_insn' is the insn which stored the
233 `comparison_{code,const,qty}' are used to track when a
234 comparison between a quantity and some constant or register has
235 been passed. In such a case, we know the results of the comparison
236 in case we see it again. These members record a comparison that
237 is known to be true. `comparison_code' holds the rtx code of such
238 a comparison, else it is set to UNKNOWN and the other two
239 comparison members are undefined. `comparison_const' holds
240 the constant being compared against, or zero if the comparison
241 is not against a constant. `comparison_qty' holds the quantity
242 being compared against when the result is known. If the comparison
243 is not with a register, `comparison_qty' is -1. */
245 struct qty_table_elem
249 rtx comparison_const;
251 unsigned int first_reg, last_reg;
252 /* The sizes of these fields should match the sizes of the
253 code and mode fields of struct rtx_def (see rtl.h). */
254 ENUM_BITFIELD(rtx_code) comparison_code : 16;
255 ENUM_BITFIELD(machine_mode) mode : 8;
258 /* The table of all qtys, indexed by qty number. */
259 static struct qty_table_elem *qty_table;
261 /* Structure used to pass arguments via for_each_rtx to function
262 cse_change_cc_mode. */
263 struct change_cc_mode_args
270 /* For machines that have a CC0, we do not record its value in the hash
271 table since its use is guaranteed to be the insn immediately following
272 its definition and any other insn is presumed to invalidate it.
274 Instead, we store below the current and last value assigned to CC0.
275 If it should happen to be a constant, it is stored in preference
276 to the actual assigned value. In case it is a constant, we store
277 the mode in which the constant should be interpreted. */
279 static rtx this_insn_cc0, prev_insn_cc0;
280 static enum machine_mode this_insn_cc0_mode, prev_insn_cc0_mode;
283 /* Insn being scanned. */
285 static rtx this_insn;
286 static bool optimize_this_for_speed_p;
288 /* Index by register number, gives the number of the next (or
289 previous) register in the chain of registers sharing the same
292 Or -1 if this register is at the end of the chain.
294 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
296 /* Per-register equivalence chain. */
302 /* The table of all register equivalence chains. */
303 static struct reg_eqv_elem *reg_eqv_table;
307 /* The timestamp at which this register is initialized. */
308 unsigned int timestamp;
310 /* The quantity number of the register's current contents. */
313 /* The number of times the register has been altered in the current
317 /* The REG_TICK value at which rtx's containing this register are
318 valid in the hash table. If this does not equal the current
319 reg_tick value, such expressions existing in the hash table are
323 /* The SUBREG that was set when REG_TICK was last incremented. Set
324 to -1 if the last store was to the whole register, not a subreg. */
325 unsigned int subreg_ticked;
328 /* A table of cse_reg_info indexed by register numbers. */
329 static struct cse_reg_info *cse_reg_info_table;
331 /* The size of the above table. */
332 static unsigned int cse_reg_info_table_size;
334 /* The index of the first entry that has not been initialized. */
335 static unsigned int cse_reg_info_table_first_uninitialized;
337 /* The timestamp at the beginning of the current run of
338 cse_extended_basic_block. We increment this variable at the beginning of
339 the current run of cse_extended_basic_block. The timestamp field of a
340 cse_reg_info entry matches the value of this variable if and only
341 if the entry has been initialized during the current run of
342 cse_extended_basic_block. */
343 static unsigned int cse_reg_info_timestamp;
345 /* A HARD_REG_SET containing all the hard registers for which there is
346 currently a REG expression in the hash table. Note the difference
347 from the above variables, which indicate if the REG is mentioned in some
348 expression in the table. */
350 static HARD_REG_SET hard_regs_in_table;
352 /* True if CSE has altered the CFG. */
353 static bool cse_cfg_altered;
355 /* True if CSE has altered conditional jump insns in such a way
356 that jump optimization should be redone. */
357 static bool cse_jumps_altered;
359 /* True if we put a LABEL_REF into the hash table for an INSN
360 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
361 to put in the note. */
362 static bool recorded_label_ref;
364 /* canon_hash stores 1 in do_not_record
365 if it notices a reference to CC0, PC, or some other volatile
368 static int do_not_record;
370 /* canon_hash stores 1 in hash_arg_in_memory
371 if it notices a reference to memory within the expression being hashed. */
373 static int hash_arg_in_memory;
375 /* The hash table contains buckets which are chains of `struct table_elt's,
376 each recording one expression's information.
377 That expression is in the `exp' field.
379 The canon_exp field contains a canonical (from the point of view of
380 alias analysis) version of the `exp' field.
382 Those elements with the same hash code are chained in both directions
383 through the `next_same_hash' and `prev_same_hash' fields.
385 Each set of expressions with equivalent values
386 are on a two-way chain through the `next_same_value'
387 and `prev_same_value' fields, and all point with
388 the `first_same_value' field at the first element in
389 that chain. The chain is in order of increasing cost.
390 Each element's cost value is in its `cost' field.
392 The `in_memory' field is nonzero for elements that
393 involve any reference to memory. These elements are removed
394 whenever a write is done to an unidentified location in memory.
395 To be safe, we assume that a memory address is unidentified unless
396 the address is either a symbol constant or a constant plus
397 the frame pointer or argument pointer.
399 The `related_value' field is used to connect related expressions
400 (that differ by adding an integer).
401 The related expressions are chained in a circular fashion.
402 `related_value' is zero for expressions for which this
405 The `cost' field stores the cost of this element's expression.
406 The `regcost' field stores the value returned by approx_reg_cost for
407 this element's expression.
409 The `is_const' flag is set if the element is a constant (including
412 The `flag' field is used as a temporary during some search routines.
414 The `mode' field is usually the same as GET_MODE (`exp'), but
415 if `exp' is a CONST_INT and has no machine mode then the `mode'
416 field is the mode it was being used as. Each constant is
417 recorded separately for each mode it is used with. */
423 struct table_elt *next_same_hash;
424 struct table_elt *prev_same_hash;
425 struct table_elt *next_same_value;
426 struct table_elt *prev_same_value;
427 struct table_elt *first_same_value;
428 struct table_elt *related_value;
431 /* The size of this field should match the size
432 of the mode field of struct rtx_def (see rtl.h). */
433 ENUM_BITFIELD(machine_mode) mode : 8;
439 /* We don't want a lot of buckets, because we rarely have very many
440 things stored in the hash table, and a lot of buckets slows
441 down a lot of loops that happen frequently. */
443 #define HASH_SIZE (1 << HASH_SHIFT)
444 #define HASH_MASK (HASH_SIZE - 1)
446 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
447 register (hard registers may require `do_not_record' to be set). */
450 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
451 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
452 : canon_hash (X, M)) & HASH_MASK)
454 /* Like HASH, but without side-effects. */
455 #define SAFE_HASH(X, M) \
456 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
457 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
458 : safe_hash (X, M)) & HASH_MASK)
460 /* Determine whether register number N is considered a fixed register for the
461 purpose of approximating register costs.
462 It is desirable to replace other regs with fixed regs, to reduce need for
464 A reg wins if it is either the frame pointer or designated as fixed. */
465 #define FIXED_REGNO_P(N) \
466 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
467 || fixed_regs[N] || global_regs[N])
469 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
470 hard registers and pointers into the frame are the cheapest with a cost
471 of 0. Next come pseudos with a cost of one and other hard registers with
472 a cost of 2. Aside from these special cases, call `rtx_cost'. */
474 #define CHEAP_REGNO(N) \
475 (REGNO_PTR_FRAME_P(N) \
476 || (HARD_REGISTER_NUM_P (N) \
477 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
479 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
480 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
482 /* Get the number of times this register has been updated in this
485 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
487 /* Get the point at which REG was recorded in the table. */
489 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
491 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
494 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
496 /* Get the quantity number for REG. */
498 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
500 /* Determine if the quantity number for register X represents a valid index
501 into the qty_table. */
503 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
505 static struct table_elt *table[HASH_SIZE];
507 /* Chain of `struct table_elt's made so far for this function
508 but currently removed from the table. */
510 static struct table_elt *free_element_chain;
512 /* Set to the cost of a constant pool reference if one was found for a
513 symbolic constant. If this was found, it means we should try to
514 convert constants into constant pool entries if they don't fit in
517 static int constant_pool_entries_cost;
518 static int constant_pool_entries_regcost;
520 /* This data describes a block that will be processed by
521 cse_extended_basic_block. */
523 struct cse_basic_block_data
525 /* Total number of SETs in block. */
527 /* Size of current branch path, if any. */
529 /* Current path, indicating which basic_blocks will be processed. */
532 /* The basic block for this path entry. */
538 /* Pointers to the live in/live out bitmaps for the boundaries of the
540 static bitmap cse_ebb_live_in, cse_ebb_live_out;
542 /* A simple bitmap to track which basic blocks have been visited
543 already as part of an already processed extended basic block. */
544 static sbitmap cse_visited_basic_blocks;
546 static bool fixed_base_plus_p (rtx x);
547 static int notreg_cost (rtx, enum rtx_code);
548 static int approx_reg_cost_1 (rtx *, void *);
549 static int approx_reg_cost (rtx);
550 static int preferable (int, int, int, int);
551 static void new_basic_block (void);
552 static void make_new_qty (unsigned int, enum machine_mode);
553 static void make_regs_eqv (unsigned int, unsigned int);
554 static void delete_reg_equiv (unsigned int);
555 static int mention_regs (rtx);
556 static int insert_regs (rtx, struct table_elt *, int);
557 static void remove_from_table (struct table_elt *, unsigned);
558 static void remove_pseudo_from_table (rtx, unsigned);
559 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
560 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
561 static rtx lookup_as_function (rtx, enum rtx_code);
562 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
564 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
565 static void invalidate (rtx, enum machine_mode);
566 static bool cse_rtx_varies_p (const_rtx, bool);
567 static void remove_invalid_refs (unsigned int);
568 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
570 static void rehash_using_reg (rtx);
571 static void invalidate_memory (void);
572 static void invalidate_for_call (void);
573 static rtx use_related_value (rtx, struct table_elt *);
575 static inline unsigned canon_hash (rtx, enum machine_mode);
576 static inline unsigned safe_hash (rtx, enum machine_mode);
577 static inline unsigned hash_rtx_string (const char *);
579 static rtx canon_reg (rtx, rtx);
580 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
582 enum machine_mode *);
583 static rtx fold_rtx (rtx, rtx);
584 static rtx equiv_constant (rtx);
585 static void record_jump_equiv (rtx, bool);
586 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
588 static void cse_insn (rtx);
589 static void cse_prescan_path (struct cse_basic_block_data *);
590 static void invalidate_from_clobbers (rtx);
591 static rtx cse_process_notes (rtx, rtx, bool *);
592 static void cse_extended_basic_block (struct cse_basic_block_data *);
593 static void count_reg_usage (rtx, int *, rtx, int);
594 static int check_for_label_ref (rtx *, void *);
595 extern void dump_class (struct table_elt*);
596 static void get_cse_reg_info_1 (unsigned int regno);
597 static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
598 static int check_dependence (rtx *, void *);
600 static void flush_hash_table (void);
601 static bool insn_live_p (rtx, int *);
602 static bool set_live_p (rtx, rtx, int *);
603 static int cse_change_cc_mode (rtx *, void *);
604 static void cse_change_cc_mode_insn (rtx, rtx);
605 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
606 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
609 #undef RTL_HOOKS_GEN_LOWPART
610 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
612 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
614 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
615 virtual regs here because the simplify_*_operation routines are called
616 by integrate.c, which is called before virtual register instantiation. */
619 fixed_base_plus_p (rtx x)
621 switch (GET_CODE (x))
624 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
626 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
628 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
629 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
634 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
636 return fixed_base_plus_p (XEXP (x, 0));
643 /* Dump the expressions in the equivalence class indicated by CLASSP.
644 This function is used only for debugging. */
646 dump_class (struct table_elt *classp)
648 struct table_elt *elt;
650 fprintf (stderr, "Equivalence chain for ");
651 print_rtl (stderr, classp->exp);
652 fprintf (stderr, ": \n");
654 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
656 print_rtl (stderr, elt->exp);
657 fprintf (stderr, "\n");
661 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
664 approx_reg_cost_1 (rtx *xp, void *data)
667 int *cost_p = (int *) data;
671 unsigned int regno = REGNO (x);
673 if (! CHEAP_REGNO (regno))
675 if (regno < FIRST_PSEUDO_REGISTER)
677 if (SMALL_REGISTER_CLASSES)
689 /* Return an estimate of the cost of the registers used in an rtx.
690 This is mostly the number of different REG expressions in the rtx;
691 however for some exceptions like fixed registers we use a cost of
692 0. If any other hard register reference occurs, return MAX_COST. */
695 approx_reg_cost (rtx x)
699 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
705 /* Return a negative value if an rtx A, whose costs are given by COST_A
706 and REGCOST_A, is more desirable than an rtx B.
707 Return a positive value if A is less desirable, or 0 if the two are
710 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
712 /* First, get rid of cases involving expressions that are entirely
714 if (cost_a != cost_b)
716 if (cost_a == MAX_COST)
718 if (cost_b == MAX_COST)
722 /* Avoid extending lifetimes of hardregs. */
723 if (regcost_a != regcost_b)
725 if (regcost_a == MAX_COST)
727 if (regcost_b == MAX_COST)
731 /* Normal operation costs take precedence. */
732 if (cost_a != cost_b)
733 return cost_a - cost_b;
734 /* Only if these are identical consider effects on register pressure. */
735 if (regcost_a != regcost_b)
736 return regcost_a - regcost_b;
740 /* Internal function, to compute cost when X is not a register; called
741 from COST macro to keep it simple. */
744 notreg_cost (rtx x, enum rtx_code outer)
746 return ((GET_CODE (x) == SUBREG
747 && REG_P (SUBREG_REG (x))
748 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
749 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
750 && (GET_MODE_SIZE (GET_MODE (x))
751 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
752 && subreg_lowpart_p (x)
753 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
754 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
756 : rtx_cost (x, outer, optimize_this_for_speed_p) * 2);
760 /* Initialize CSE_REG_INFO_TABLE. */
763 init_cse_reg_info (unsigned int nregs)
765 /* Do we need to grow the table? */
766 if (nregs > cse_reg_info_table_size)
768 unsigned int new_size;
770 if (cse_reg_info_table_size < 2048)
772 /* Compute a new size that is a power of 2 and no smaller
773 than the large of NREGS and 64. */
774 new_size = (cse_reg_info_table_size
775 ? cse_reg_info_table_size : 64);
777 while (new_size < nregs)
782 /* If we need a big table, allocate just enough to hold
787 /* Reallocate the table with NEW_SIZE entries. */
788 if (cse_reg_info_table)
789 free (cse_reg_info_table);
790 cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
791 cse_reg_info_table_size = new_size;
792 cse_reg_info_table_first_uninitialized = 0;
795 /* Do we have all of the first NREGS entries initialized? */
796 if (cse_reg_info_table_first_uninitialized < nregs)
798 unsigned int old_timestamp = cse_reg_info_timestamp - 1;
801 /* Put the old timestamp on newly allocated entries so that they
802 will all be considered out of date. We do not touch those
803 entries beyond the first NREGS entries to be nice to the
805 for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
806 cse_reg_info_table[i].timestamp = old_timestamp;
808 cse_reg_info_table_first_uninitialized = nregs;
812 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
815 get_cse_reg_info_1 (unsigned int regno)
817 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
818 entry will be considered to have been initialized. */
819 cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
821 /* Initialize the rest of the entry. */
822 cse_reg_info_table[regno].reg_tick = 1;
823 cse_reg_info_table[regno].reg_in_table = -1;
824 cse_reg_info_table[regno].subreg_ticked = -1;
825 cse_reg_info_table[regno].reg_qty = -regno - 1;
828 /* Find a cse_reg_info entry for REGNO. */
830 static inline struct cse_reg_info *
831 get_cse_reg_info (unsigned int regno)
833 struct cse_reg_info *p = &cse_reg_info_table[regno];
835 /* If this entry has not been initialized, go ahead and initialize
837 if (p->timestamp != cse_reg_info_timestamp)
838 get_cse_reg_info_1 (regno);
843 /* Clear the hash table and initialize each register with its own quantity,
844 for a new basic block. */
847 new_basic_block (void)
853 /* Invalidate cse_reg_info_table. */
854 cse_reg_info_timestamp++;
856 /* Clear out hash table state for this pass. */
857 CLEAR_HARD_REG_SET (hard_regs_in_table);
859 /* The per-quantity values used to be initialized here, but it is
860 much faster to initialize each as it is made in `make_new_qty'. */
862 for (i = 0; i < HASH_SIZE; i++)
864 struct table_elt *first;
869 struct table_elt *last = first;
873 while (last->next_same_hash != NULL)
874 last = last->next_same_hash;
876 /* Now relink this hash entire chain into
877 the free element list. */
879 last->next_same_hash = free_element_chain;
880 free_element_chain = first;
889 /* Say that register REG contains a quantity in mode MODE not in any
890 register before and initialize that quantity. */
893 make_new_qty (unsigned int reg, enum machine_mode mode)
896 struct qty_table_elem *ent;
897 struct reg_eqv_elem *eqv;
899 gcc_assert (next_qty < max_qty);
901 q = REG_QTY (reg) = next_qty++;
903 ent->first_reg = reg;
906 ent->const_rtx = ent->const_insn = NULL_RTX;
907 ent->comparison_code = UNKNOWN;
909 eqv = ®_eqv_table[reg];
910 eqv->next = eqv->prev = -1;
913 /* Make reg NEW equivalent to reg OLD.
914 OLD is not changing; NEW is. */
917 make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
919 unsigned int lastr, firstr;
920 int q = REG_QTY (old_reg);
921 struct qty_table_elem *ent;
925 /* Nothing should become eqv until it has a "non-invalid" qty number. */
926 gcc_assert (REGNO_QTY_VALID_P (old_reg));
928 REG_QTY (new_reg) = q;
929 firstr = ent->first_reg;
930 lastr = ent->last_reg;
932 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
933 hard regs. Among pseudos, if NEW will live longer than any other reg
934 of the same qty, and that is beyond the current basic block,
935 make it the new canonical replacement for this qty. */
936 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
937 /* Certain fixed registers might be of the class NO_REGS. This means
938 that not only can they not be allocated by the compiler, but
939 they cannot be used in substitutions or canonicalizations
941 && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
942 && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
943 || (new_reg >= FIRST_PSEUDO_REGISTER
944 && (firstr < FIRST_PSEUDO_REGISTER
945 || (bitmap_bit_p (cse_ebb_live_out, new_reg)
946 && !bitmap_bit_p (cse_ebb_live_out, firstr))
947 || (bitmap_bit_p (cse_ebb_live_in, new_reg)
948 && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
950 reg_eqv_table[firstr].prev = new_reg;
951 reg_eqv_table[new_reg].next = firstr;
952 reg_eqv_table[new_reg].prev = -1;
953 ent->first_reg = new_reg;
957 /* If NEW is a hard reg (known to be non-fixed), insert at end.
958 Otherwise, insert before any non-fixed hard regs that are at the
959 end. Registers of class NO_REGS cannot be used as an
960 equivalent for anything. */
961 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
962 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
963 && new_reg >= FIRST_PSEUDO_REGISTER)
964 lastr = reg_eqv_table[lastr].prev;
965 reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
966 if (reg_eqv_table[lastr].next >= 0)
967 reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
969 qty_table[q].last_reg = new_reg;
970 reg_eqv_table[lastr].next = new_reg;
971 reg_eqv_table[new_reg].prev = lastr;
975 /* Remove REG from its equivalence class. */
978 delete_reg_equiv (unsigned int reg)
980 struct qty_table_elem *ent;
981 int q = REG_QTY (reg);
984 /* If invalid, do nothing. */
985 if (! REGNO_QTY_VALID_P (reg))
990 p = reg_eqv_table[reg].prev;
991 n = reg_eqv_table[reg].next;
994 reg_eqv_table[n].prev = p;
998 reg_eqv_table[p].next = n;
1002 REG_QTY (reg) = -reg - 1;
1005 /* Remove any invalid expressions from the hash table
1006 that refer to any of the registers contained in expression X.
1008 Make sure that newly inserted references to those registers
1009 as subexpressions will be considered valid.
1011 mention_regs is not called when a register itself
1012 is being stored in the table.
1014 Return 1 if we have done something that may have changed the hash code
1018 mention_regs (rtx x)
1028 code = GET_CODE (x);
1031 unsigned int regno = REGNO (x);
1032 unsigned int endregno = END_REGNO (x);
1035 for (i = regno; i < endregno; i++)
1037 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1038 remove_invalid_refs (i);
1040 REG_IN_TABLE (i) = REG_TICK (i);
1041 SUBREG_TICKED (i) = -1;
1047 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1048 pseudo if they don't use overlapping words. We handle only pseudos
1049 here for simplicity. */
1050 if (code == SUBREG && REG_P (SUBREG_REG (x))
1051 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1053 unsigned int i = REGNO (SUBREG_REG (x));
1055 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1057 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1058 the last store to this register really stored into this
1059 subreg, then remove the memory of this subreg.
1060 Otherwise, remove any memory of the entire register and
1061 all its subregs from the table. */
1062 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1063 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1064 remove_invalid_refs (i);
1066 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1069 REG_IN_TABLE (i) = REG_TICK (i);
1070 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1074 /* If X is a comparison or a COMPARE and either operand is a register
1075 that does not have a quantity, give it one. This is so that a later
1076 call to record_jump_equiv won't cause X to be assigned a different
1077 hash code and not found in the table after that call.
1079 It is not necessary to do this here, since rehash_using_reg can
1080 fix up the table later, but doing this here eliminates the need to
1081 call that expensive function in the most common case where the only
1082 use of the register is in the comparison. */
1084 if (code == COMPARE || COMPARISON_P (x))
1086 if (REG_P (XEXP (x, 0))
1087 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1088 if (insert_regs (XEXP (x, 0), NULL, 0))
1090 rehash_using_reg (XEXP (x, 0));
1094 if (REG_P (XEXP (x, 1))
1095 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1096 if (insert_regs (XEXP (x, 1), NULL, 0))
1098 rehash_using_reg (XEXP (x, 1));
1103 fmt = GET_RTX_FORMAT (code);
1104 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1106 changed |= mention_regs (XEXP (x, i));
1107 else if (fmt[i] == 'E')
1108 for (j = 0; j < XVECLEN (x, i); j++)
1109 changed |= mention_regs (XVECEXP (x, i, j));
1114 /* Update the register quantities for inserting X into the hash table
1115 with a value equivalent to CLASSP.
1116 (If the class does not contain a REG, it is irrelevant.)
1117 If MODIFIED is nonzero, X is a destination; it is being modified.
1118 Note that delete_reg_equiv should be called on a register
1119 before insert_regs is done on that register with MODIFIED != 0.
1121 Nonzero value means that elements of reg_qty have changed
1122 so X's hash code may be different. */
1125 insert_regs (rtx x, struct table_elt *classp, int modified)
1129 unsigned int regno = REGNO (x);
1132 /* If REGNO is in the equivalence table already but is of the
1133 wrong mode for that equivalence, don't do anything here. */
1135 qty_valid = REGNO_QTY_VALID_P (regno);
1138 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1140 if (ent->mode != GET_MODE (x))
1144 if (modified || ! qty_valid)
1147 for (classp = classp->first_same_value;
1149 classp = classp->next_same_value)
1150 if (REG_P (classp->exp)
1151 && GET_MODE (classp->exp) == GET_MODE (x))
1153 unsigned c_regno = REGNO (classp->exp);
1155 gcc_assert (REGNO_QTY_VALID_P (c_regno));
1157 /* Suppose that 5 is hard reg and 100 and 101 are
1160 (set (reg:si 100) (reg:si 5))
1161 (set (reg:si 5) (reg:si 100))
1162 (set (reg:di 101) (reg:di 5))
1164 We would now set REG_QTY (101) = REG_QTY (5), but the
1165 entry for 5 is in SImode. When we use this later in
1166 copy propagation, we get the register in wrong mode. */
1167 if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1170 make_regs_eqv (regno, c_regno);
1174 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1175 than REG_IN_TABLE to find out if there was only a single preceding
1176 invalidation - for the SUBREG - or another one, which would be
1177 for the full register. However, if we find here that REG_TICK
1178 indicates that the register is invalid, it means that it has
1179 been invalidated in a separate operation. The SUBREG might be used
1180 now (then this is a recursive call), or we might use the full REG
1181 now and a SUBREG of it later. So bump up REG_TICK so that
1182 mention_regs will do the right thing. */
1184 && REG_IN_TABLE (regno) >= 0
1185 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1187 make_new_qty (regno, GET_MODE (x));
1194 /* If X is a SUBREG, we will likely be inserting the inner register in the
1195 table. If that register doesn't have an assigned quantity number at
1196 this point but does later, the insertion that we will be doing now will
1197 not be accessible because its hash code will have changed. So assign
1198 a quantity number now. */
1200 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1201 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1203 insert_regs (SUBREG_REG (x), NULL, 0);
1208 return mention_regs (x);
1211 /* Look in or update the hash table. */
1213 /* Remove table element ELT from use in the table.
1214 HASH is its hash code, made using the HASH macro.
1215 It's an argument because often that is known in advance
1216 and we save much time not recomputing it. */
1219 remove_from_table (struct table_elt *elt, unsigned int hash)
1224 /* Mark this element as removed. See cse_insn. */
1225 elt->first_same_value = 0;
1227 /* Remove the table element from its equivalence class. */
1230 struct table_elt *prev = elt->prev_same_value;
1231 struct table_elt *next = elt->next_same_value;
1234 next->prev_same_value = prev;
1237 prev->next_same_value = next;
1240 struct table_elt *newfirst = next;
1243 next->first_same_value = newfirst;
1244 next = next->next_same_value;
1249 /* Remove the table element from its hash bucket. */
1252 struct table_elt *prev = elt->prev_same_hash;
1253 struct table_elt *next = elt->next_same_hash;
1256 next->prev_same_hash = prev;
1259 prev->next_same_hash = next;
1260 else if (table[hash] == elt)
1264 /* This entry is not in the proper hash bucket. This can happen
1265 when two classes were merged by `merge_equiv_classes'. Search
1266 for the hash bucket that it heads. This happens only very
1267 rarely, so the cost is acceptable. */
1268 for (hash = 0; hash < HASH_SIZE; hash++)
1269 if (table[hash] == elt)
1274 /* Remove the table element from its related-value circular chain. */
1276 if (elt->related_value != 0 && elt->related_value != elt)
1278 struct table_elt *p = elt->related_value;
1280 while (p->related_value != elt)
1281 p = p->related_value;
1282 p->related_value = elt->related_value;
1283 if (p->related_value == p)
1284 p->related_value = 0;
1287 /* Now add it to the free element chain. */
1288 elt->next_same_hash = free_element_chain;
1289 free_element_chain = elt;
1292 /* Same as above, but X is a pseudo-register. */
1295 remove_pseudo_from_table (rtx x, unsigned int hash)
1297 struct table_elt *elt;
1299 /* Because a pseudo-register can be referenced in more than one
1300 mode, we might have to remove more than one table entry. */
1301 while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1302 remove_from_table (elt, hash);
1305 /* Look up X in the hash table and return its table element,
1306 or 0 if X is not in the table.
1308 MODE is the machine-mode of X, or if X is an integer constant
1309 with VOIDmode then MODE is the mode with which X will be used.
1311 Here we are satisfied to find an expression whose tree structure
1314 static struct table_elt *
1315 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1317 struct table_elt *p;
1319 for (p = table[hash]; p; p = p->next_same_hash)
1320 if (mode == p->mode && ((x == p->exp && REG_P (x))
1321 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1327 /* Like `lookup' but don't care whether the table element uses invalid regs.
1328 Also ignore discrepancies in the machine mode of a register. */
1330 static struct table_elt *
1331 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1333 struct table_elt *p;
1337 unsigned int regno = REGNO (x);
1339 /* Don't check the machine mode when comparing registers;
1340 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1341 for (p = table[hash]; p; p = p->next_same_hash)
1343 && REGNO (p->exp) == regno)
1348 for (p = table[hash]; p; p = p->next_same_hash)
1350 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1357 /* Look for an expression equivalent to X and with code CODE.
1358 If one is found, return that expression. */
1361 lookup_as_function (rtx x, enum rtx_code code)
1364 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1366 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1367 long as we are narrowing. So if we looked in vain for a mode narrower
1368 than word_mode before, look for word_mode now. */
1369 if (p == 0 && code == CONST_INT
1370 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1373 PUT_MODE (x, word_mode);
1374 p = lookup (x, SAFE_HASH (x, VOIDmode), word_mode);
1380 for (p = p->first_same_value; p; p = p->next_same_value)
1381 if (GET_CODE (p->exp) == code
1382 /* Make sure this is a valid entry in the table. */
1383 && exp_equiv_p (p->exp, p->exp, 1, false))
1389 /* Insert X in the hash table, assuming HASH is its hash code
1390 and CLASSP is an element of the class it should go in
1391 (or 0 if a new class should be made).
1392 It is inserted at the proper position to keep the class in
1393 the order cheapest first.
1395 MODE is the machine-mode of X, or if X is an integer constant
1396 with VOIDmode then MODE is the mode with which X will be used.
1398 For elements of equal cheapness, the most recent one
1399 goes in front, except that the first element in the list
1400 remains first unless a cheaper element is added. The order of
1401 pseudo-registers does not matter, as canon_reg will be called to
1402 find the cheapest when a register is retrieved from the table.
1404 The in_memory field in the hash table element is set to 0.
1405 The caller must set it nonzero if appropriate.
1407 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1408 and if insert_regs returns a nonzero value
1409 you must then recompute its hash code before calling here.
1411 If necessary, update table showing constant values of quantities. */
1413 #define CHEAPER(X, Y) \
1414 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1416 static struct table_elt *
1417 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1419 struct table_elt *elt;
1421 /* If X is a register and we haven't made a quantity for it,
1422 something is wrong. */
1423 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1425 /* If X is a hard register, show it is being put in the table. */
1426 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1427 add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1429 /* Put an element for X into the right hash bucket. */
1431 elt = free_element_chain;
1433 free_element_chain = elt->next_same_hash;
1435 elt = XNEW (struct table_elt);
1438 elt->canon_exp = NULL_RTX;
1439 elt->cost = COST (x);
1440 elt->regcost = approx_reg_cost (x);
1441 elt->next_same_value = 0;
1442 elt->prev_same_value = 0;
1443 elt->next_same_hash = table[hash];
1444 elt->prev_same_hash = 0;
1445 elt->related_value = 0;
1448 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1451 table[hash]->prev_same_hash = elt;
1454 /* Put it into the proper value-class. */
1457 classp = classp->first_same_value;
1458 if (CHEAPER (elt, classp))
1459 /* Insert at the head of the class. */
1461 struct table_elt *p;
1462 elt->next_same_value = classp;
1463 classp->prev_same_value = elt;
1464 elt->first_same_value = elt;
1466 for (p = classp; p; p = p->next_same_value)
1467 p->first_same_value = elt;
1471 /* Insert not at head of the class. */
1472 /* Put it after the last element cheaper than X. */
1473 struct table_elt *p, *next;
1475 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1478 /* Put it after P and before NEXT. */
1479 elt->next_same_value = next;
1481 next->prev_same_value = elt;
1483 elt->prev_same_value = p;
1484 p->next_same_value = elt;
1485 elt->first_same_value = classp;
1489 elt->first_same_value = elt;
1491 /* If this is a constant being set equivalent to a register or a register
1492 being set equivalent to a constant, note the constant equivalence.
1494 If this is a constant, it cannot be equivalent to a different constant,
1495 and a constant is the only thing that can be cheaper than a register. So
1496 we know the register is the head of the class (before the constant was
1499 If this is a register that is not already known equivalent to a
1500 constant, we must check the entire class.
1502 If this is a register that is already known equivalent to an insn,
1503 update the qtys `const_insn' to show that `this_insn' is the latest
1504 insn making that quantity equivalent to the constant. */
1506 if (elt->is_const && classp && REG_P (classp->exp)
1509 int exp_q = REG_QTY (REGNO (classp->exp));
1510 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1512 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1513 exp_ent->const_insn = this_insn;
1518 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1521 struct table_elt *p;
1523 for (p = classp; p != 0; p = p->next_same_value)
1525 if (p->is_const && !REG_P (p->exp))
1527 int x_q = REG_QTY (REGNO (x));
1528 struct qty_table_elem *x_ent = &qty_table[x_q];
1531 = gen_lowpart (GET_MODE (x), p->exp);
1532 x_ent->const_insn = this_insn;
1539 && qty_table[REG_QTY (REGNO (x))].const_rtx
1540 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1541 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1543 /* If this is a constant with symbolic value,
1544 and it has a term with an explicit integer value,
1545 link it up with related expressions. */
1546 if (GET_CODE (x) == CONST)
1548 rtx subexp = get_related_value (x);
1550 struct table_elt *subelt, *subelt_prev;
1554 /* Get the integer-free subexpression in the hash table. */
1555 subhash = SAFE_HASH (subexp, mode);
1556 subelt = lookup (subexp, subhash, mode);
1558 subelt = insert (subexp, NULL, subhash, mode);
1559 /* Initialize SUBELT's circular chain if it has none. */
1560 if (subelt->related_value == 0)
1561 subelt->related_value = subelt;
1562 /* Find the element in the circular chain that precedes SUBELT. */
1563 subelt_prev = subelt;
1564 while (subelt_prev->related_value != subelt)
1565 subelt_prev = subelt_prev->related_value;
1566 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1567 This way the element that follows SUBELT is the oldest one. */
1568 elt->related_value = subelt_prev->related_value;
1569 subelt_prev->related_value = elt;
1576 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1577 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1578 the two classes equivalent.
1580 CLASS1 will be the surviving class; CLASS2 should not be used after this
1583 Any invalid entries in CLASS2 will not be copied. */
1586 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1588 struct table_elt *elt, *next, *new_elt;
1590 /* Ensure we start with the head of the classes. */
1591 class1 = class1->first_same_value;
1592 class2 = class2->first_same_value;
1594 /* If they were already equal, forget it. */
1595 if (class1 == class2)
1598 for (elt = class2; elt; elt = next)
1602 enum machine_mode mode = elt->mode;
1604 next = elt->next_same_value;
1606 /* Remove old entry, make a new one in CLASS1's class.
1607 Don't do this for invalid entries as we cannot find their
1608 hash code (it also isn't necessary). */
1609 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1611 bool need_rehash = false;
1613 hash_arg_in_memory = 0;
1614 hash = HASH (exp, mode);
1618 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1619 delete_reg_equiv (REGNO (exp));
1622 if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1623 remove_pseudo_from_table (exp, hash);
1625 remove_from_table (elt, hash);
1627 if (insert_regs (exp, class1, 0) || need_rehash)
1629 rehash_using_reg (exp);
1630 hash = HASH (exp, mode);
1632 new_elt = insert (exp, class1, hash, mode);
1633 new_elt->in_memory = hash_arg_in_memory;
1638 /* Flush the entire hash table. */
1641 flush_hash_table (void)
1644 struct table_elt *p;
1646 for (i = 0; i < HASH_SIZE; i++)
1647 for (p = table[i]; p; p = table[i])
1649 /* Note that invalidate can remove elements
1650 after P in the current hash chain. */
1652 invalidate (p->exp, VOIDmode);
1654 remove_from_table (p, i);
1658 /* Function called for each rtx to check whether true dependence exist. */
1659 struct check_dependence_data
1661 enum machine_mode mode;
1667 check_dependence (rtx *x, void *data)
1669 struct check_dependence_data *d = (struct check_dependence_data *) data;
1670 if (*x && MEM_P (*x))
1671 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1677 /* Remove from the hash table, or mark as invalid, all expressions whose
1678 values could be altered by storing in X. X is a register, a subreg, or
1679 a memory reference with nonvarying address (because, when a memory
1680 reference with a varying address is stored in, all memory references are
1681 removed by invalidate_memory so specific invalidation is superfluous).
1682 FULL_MODE, if not VOIDmode, indicates that this much should be
1683 invalidated instead of just the amount indicated by the mode of X. This
1684 is only used for bitfield stores into memory.
1686 A nonvarying address may be just a register or just a symbol reference,
1687 or it may be either of those plus a numeric offset. */
1690 invalidate (rtx x, enum machine_mode full_mode)
1693 struct table_elt *p;
1696 switch (GET_CODE (x))
1700 /* If X is a register, dependencies on its contents are recorded
1701 through the qty number mechanism. Just change the qty number of
1702 the register, mark it as invalid for expressions that refer to it,
1703 and remove it itself. */
1704 unsigned int regno = REGNO (x);
1705 unsigned int hash = HASH (x, GET_MODE (x));
1707 /* Remove REGNO from any quantity list it might be on and indicate
1708 that its value might have changed. If it is a pseudo, remove its
1709 entry from the hash table.
1711 For a hard register, we do the first two actions above for any
1712 additional hard registers corresponding to X. Then, if any of these
1713 registers are in the table, we must remove any REG entries that
1714 overlap these registers. */
1716 delete_reg_equiv (regno);
1718 SUBREG_TICKED (regno) = -1;
1720 if (regno >= FIRST_PSEUDO_REGISTER)
1721 remove_pseudo_from_table (x, hash);
1724 HOST_WIDE_INT in_table
1725 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1726 unsigned int endregno = END_HARD_REGNO (x);
1727 unsigned int tregno, tendregno, rn;
1728 struct table_elt *p, *next;
1730 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1732 for (rn = regno + 1; rn < endregno; rn++)
1734 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1735 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1736 delete_reg_equiv (rn);
1738 SUBREG_TICKED (rn) = -1;
1742 for (hash = 0; hash < HASH_SIZE; hash++)
1743 for (p = table[hash]; p; p = next)
1745 next = p->next_same_hash;
1748 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1751 tregno = REGNO (p->exp);
1752 tendregno = END_HARD_REGNO (p->exp);
1753 if (tendregno > regno && tregno < endregno)
1754 remove_from_table (p, hash);
1761 invalidate (SUBREG_REG (x), VOIDmode);
1765 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1766 invalidate (XVECEXP (x, 0, i), VOIDmode);
1770 /* This is part of a disjoint return value; extract the location in
1771 question ignoring the offset. */
1772 invalidate (XEXP (x, 0), VOIDmode);
1776 addr = canon_rtx (get_addr (XEXP (x, 0)));
1777 /* Calculate the canonical version of X here so that
1778 true_dependence doesn't generate new RTL for X on each call. */
1781 /* Remove all hash table elements that refer to overlapping pieces of
1783 if (full_mode == VOIDmode)
1784 full_mode = GET_MODE (x);
1786 for (i = 0; i < HASH_SIZE; i++)
1788 struct table_elt *next;
1790 for (p = table[i]; p; p = next)
1792 next = p->next_same_hash;
1795 struct check_dependence_data d;
1797 /* Just canonicalize the expression once;
1798 otherwise each time we call invalidate
1799 true_dependence will canonicalize the
1800 expression again. */
1802 p->canon_exp = canon_rtx (p->exp);
1806 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1807 remove_from_table (p, i);
1818 /* Remove all expressions that refer to register REGNO,
1819 since they are already invalid, and we are about to
1820 mark that register valid again and don't want the old
1821 expressions to reappear as valid. */
1824 remove_invalid_refs (unsigned int regno)
1827 struct table_elt *p, *next;
1829 for (i = 0; i < HASH_SIZE; i++)
1830 for (p = table[i]; p; p = next)
1832 next = p->next_same_hash;
1834 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1835 remove_from_table (p, i);
1839 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1842 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1843 enum machine_mode mode)
1846 struct table_elt *p, *next;
1847 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1849 for (i = 0; i < HASH_SIZE; i++)
1850 for (p = table[i]; p; p = next)
1853 next = p->next_same_hash;
1856 && (GET_CODE (exp) != SUBREG
1857 || !REG_P (SUBREG_REG (exp))
1858 || REGNO (SUBREG_REG (exp)) != regno
1859 || (((SUBREG_BYTE (exp)
1860 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1861 && SUBREG_BYTE (exp) <= end))
1862 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1863 remove_from_table (p, i);
1867 /* Recompute the hash codes of any valid entries in the hash table that
1868 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1870 This is called when we make a jump equivalence. */
1873 rehash_using_reg (rtx x)
1876 struct table_elt *p, *next;
1879 if (GET_CODE (x) == SUBREG)
1882 /* If X is not a register or if the register is known not to be in any
1883 valid entries in the table, we have no work to do. */
1886 || REG_IN_TABLE (REGNO (x)) < 0
1887 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1890 /* Scan all hash chains looking for valid entries that mention X.
1891 If we find one and it is in the wrong hash chain, move it. */
1893 for (i = 0; i < HASH_SIZE; i++)
1894 for (p = table[i]; p; p = next)
1896 next = p->next_same_hash;
1897 if (reg_mentioned_p (x, p->exp)
1898 && exp_equiv_p (p->exp, p->exp, 1, false)
1899 && i != (hash = SAFE_HASH (p->exp, p->mode)))
1901 if (p->next_same_hash)
1902 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1904 if (p->prev_same_hash)
1905 p->prev_same_hash->next_same_hash = p->next_same_hash;
1907 table[i] = p->next_same_hash;
1909 p->next_same_hash = table[hash];
1910 p->prev_same_hash = 0;
1912 table[hash]->prev_same_hash = p;
1918 /* Remove from the hash table any expression that is a call-clobbered
1919 register. Also update their TICK values. */
1922 invalidate_for_call (void)
1924 unsigned int regno, endregno;
1927 struct table_elt *p, *next;
1930 /* Go through all the hard registers. For each that is clobbered in
1931 a CALL_INSN, remove the register from quantity chains and update
1932 reg_tick if defined. Also see if any of these registers is currently
1935 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1936 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1938 delete_reg_equiv (regno);
1939 if (REG_TICK (regno) >= 0)
1942 SUBREG_TICKED (regno) = -1;
1945 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1948 /* In the case where we have no call-clobbered hard registers in the
1949 table, we are done. Otherwise, scan the table and remove any
1950 entry that overlaps a call-clobbered register. */
1953 for (hash = 0; hash < HASH_SIZE; hash++)
1954 for (p = table[hash]; p; p = next)
1956 next = p->next_same_hash;
1959 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1962 regno = REGNO (p->exp);
1963 endregno = END_HARD_REGNO (p->exp);
1965 for (i = regno; i < endregno; i++)
1966 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1968 remove_from_table (p, hash);
1974 /* Given an expression X of type CONST,
1975 and ELT which is its table entry (or 0 if it
1976 is not in the hash table),
1977 return an alternate expression for X as a register plus integer.
1978 If none can be found, return 0. */
1981 use_related_value (rtx x, struct table_elt *elt)
1983 struct table_elt *relt = 0;
1984 struct table_elt *p, *q;
1985 HOST_WIDE_INT offset;
1987 /* First, is there anything related known?
1988 If we have a table element, we can tell from that.
1989 Otherwise, must look it up. */
1991 if (elt != 0 && elt->related_value != 0)
1993 else if (elt == 0 && GET_CODE (x) == CONST)
1995 rtx subexp = get_related_value (x);
1997 relt = lookup (subexp,
1998 SAFE_HASH (subexp, GET_MODE (subexp)),
2005 /* Search all related table entries for one that has an
2006 equivalent register. */
2011 /* This loop is strange in that it is executed in two different cases.
2012 The first is when X is already in the table. Then it is searching
2013 the RELATED_VALUE list of X's class (RELT). The second case is when
2014 X is not in the table. Then RELT points to a class for the related
2017 Ensure that, whatever case we are in, that we ignore classes that have
2018 the same value as X. */
2020 if (rtx_equal_p (x, p->exp))
2023 for (q = p->first_same_value; q; q = q->next_same_value)
2030 p = p->related_value;
2032 /* We went all the way around, so there is nothing to be found.
2033 Alternatively, perhaps RELT was in the table for some other reason
2034 and it has no related values recorded. */
2035 if (p == relt || p == 0)
2042 offset = (get_integer_term (x) - get_integer_term (p->exp));
2043 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2044 return plus_constant (q->exp, offset);
2048 /* Hash a string. Just add its bytes up. */
2049 static inline unsigned
2050 hash_rtx_string (const char *ps)
2053 const unsigned char *p = (const unsigned char *) ps;
2062 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2063 When the callback returns true, we continue with the new rtx. */
2066 hash_rtx_cb (const_rtx x, enum machine_mode mode,
2067 int *do_not_record_p, int *hash_arg_in_memory_p,
2068 bool have_reg_qty, hash_rtx_callback_function cb)
2074 enum machine_mode newmode;
2077 /* Used to turn recursion into iteration. We can't rely on GCC's
2078 tail-recursion elimination since we need to keep accumulating values
2084 /* Invoke the callback first. */
2086 && ((*cb) (x, mode, &newx, &newmode)))
2088 hash += hash_rtx_cb (newx, newmode, do_not_record_p,
2089 hash_arg_in_memory_p, have_reg_qty, cb);
2093 code = GET_CODE (x);
2098 unsigned int regno = REGNO (x);
2100 if (do_not_record_p && !reload_completed)
2102 /* On some machines, we can't record any non-fixed hard register,
2103 because extending its life will cause reload problems. We
2104 consider ap, fp, sp, gp to be fixed for this purpose.
2106 We also consider CCmode registers to be fixed for this purpose;
2107 failure to do so leads to failure to simplify 0<100 type of
2110 On all machines, we can't record any global registers.
2111 Nor should we record any register that is in a small
2112 class, as defined by CLASS_LIKELY_SPILLED_P. */
2115 if (regno >= FIRST_PSEUDO_REGISTER)
2117 else if (x == frame_pointer_rtx
2118 || x == hard_frame_pointer_rtx
2119 || x == arg_pointer_rtx
2120 || x == stack_pointer_rtx
2121 || x == pic_offset_table_rtx)
2123 else if (global_regs[regno])
2125 else if (fixed_regs[regno])
2127 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2129 else if (SMALL_REGISTER_CLASSES)
2131 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2138 *do_not_record_p = 1;
2143 hash += ((unsigned int) REG << 7);
2144 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2148 /* We handle SUBREG of a REG specially because the underlying
2149 reg changes its hash value with every value change; we don't
2150 want to have to forget unrelated subregs when one subreg changes. */
2153 if (REG_P (SUBREG_REG (x)))
2155 hash += (((unsigned int) SUBREG << 7)
2156 + REGNO (SUBREG_REG (x))
2157 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2164 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2165 + (unsigned int) INTVAL (x));
2169 /* This is like the general case, except that it only counts
2170 the integers representing the constant. */
2171 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2172 if (GET_MODE (x) != VOIDmode)
2173 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2175 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2176 + (unsigned int) CONST_DOUBLE_HIGH (x));
2180 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2181 hash += fixed_hash (CONST_FIXED_VALUE (x));
2189 units = CONST_VECTOR_NUNITS (x);
2191 for (i = 0; i < units; ++i)
2193 elt = CONST_VECTOR_ELT (x, i);
2194 hash += hash_rtx_cb (elt, GET_MODE (elt),
2195 do_not_record_p, hash_arg_in_memory_p,
2202 /* Assume there is only one rtx object for any given label. */
2204 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2205 differences and differences between each stage's debugging dumps. */
2206 hash += (((unsigned int) LABEL_REF << 7)
2207 + CODE_LABEL_NUMBER (XEXP (x, 0)));
2212 /* Don't hash on the symbol's address to avoid bootstrap differences.
2213 Different hash values may cause expressions to be recorded in
2214 different orders and thus different registers to be used in the
2215 final assembler. This also avoids differences in the dump files
2216 between various stages. */
2218 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2221 h += (h << 7) + *p++; /* ??? revisit */
2223 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2228 /* We don't record if marked volatile or if BLKmode since we don't
2229 know the size of the move. */
2230 if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2232 *do_not_record_p = 1;
2235 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2236 *hash_arg_in_memory_p = 1;
2238 /* Now that we have already found this special case,
2239 might as well speed it up as much as possible. */
2240 hash += (unsigned) MEM;
2245 /* A USE that mentions non-volatile memory needs special
2246 handling since the MEM may be BLKmode which normally
2247 prevents an entry from being made. Pure calls are
2248 marked by a USE which mentions BLKmode memory.
2249 See calls.c:emit_call_1. */
2250 if (MEM_P (XEXP (x, 0))
2251 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2253 hash += (unsigned) USE;
2256 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2257 *hash_arg_in_memory_p = 1;
2259 /* Now that we have already found this special case,
2260 might as well speed it up as much as possible. */
2261 hash += (unsigned) MEM;
2276 case UNSPEC_VOLATILE:
2277 if (do_not_record_p) {
2278 *do_not_record_p = 1;
2286 if (do_not_record_p && MEM_VOLATILE_P (x))
2288 *do_not_record_p = 1;
2293 /* We don't want to take the filename and line into account. */
2294 hash += (unsigned) code + (unsigned) GET_MODE (x)
2295 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2296 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2297 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2299 if (ASM_OPERANDS_INPUT_LENGTH (x))
2301 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2303 hash += (hash_rtx_cb (ASM_OPERANDS_INPUT (x, i),
2304 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2305 do_not_record_p, hash_arg_in_memory_p,
2308 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2311 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2312 x = ASM_OPERANDS_INPUT (x, 0);
2313 mode = GET_MODE (x);
2325 i = GET_RTX_LENGTH (code) - 1;
2326 hash += (unsigned) code + (unsigned) GET_MODE (x);
2327 fmt = GET_RTX_FORMAT (code);
2333 /* If we are about to do the last recursive call
2334 needed at this level, change it into iteration.
2335 This function is called enough to be worth it. */
2342 hash += hash_rtx_cb (XEXP (x, i), 0, do_not_record_p,
2343 hash_arg_in_memory_p,
2348 for (j = 0; j < XVECLEN (x, i); j++)
2349 hash += hash_rtx_cb (XVECEXP (x, i, j), 0, do_not_record_p,
2350 hash_arg_in_memory_p,
2355 hash += hash_rtx_string (XSTR (x, i));
2359 hash += (unsigned int) XINT (x, i);
2374 /* Hash an rtx. We are careful to make sure the value is never negative.
2375 Equivalent registers hash identically.
2376 MODE is used in hashing for CONST_INTs only;
2377 otherwise the mode of X is used.
2379 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2381 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2382 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2384 Note that cse_insn knows that the hash code of a MEM expression
2385 is just (int) MEM plus the hash code of the address. */
2388 hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p,
2389 int *hash_arg_in_memory_p, bool have_reg_qty)
2391 return hash_rtx_cb (x, mode, do_not_record_p,
2392 hash_arg_in_memory_p, have_reg_qty, NULL);
2395 /* Hash an rtx X for cse via hash_rtx.
2396 Stores 1 in do_not_record if any subexpression is volatile.
2397 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2398 does not have the RTX_UNCHANGING_P bit set. */
2400 static inline unsigned
2401 canon_hash (rtx x, enum machine_mode mode)
2403 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2406 /* Like canon_hash but with no side effects, i.e. do_not_record
2407 and hash_arg_in_memory are not changed. */
2409 static inline unsigned
2410 safe_hash (rtx x, enum machine_mode mode)
2412 int dummy_do_not_record;
2413 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2416 /* Return 1 iff X and Y would canonicalize into the same thing,
2417 without actually constructing the canonicalization of either one.
2418 If VALIDATE is nonzero,
2419 we assume X is an expression being processed from the rtl
2420 and Y was found in the hash table. We check register refs
2421 in Y for being marked as valid.
2423 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2426 exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2432 /* Note: it is incorrect to assume an expression is equivalent to itself
2433 if VALIDATE is nonzero. */
2434 if (x == y && !validate)
2437 if (x == 0 || y == 0)
2440 code = GET_CODE (x);
2441 if (code != GET_CODE (y))
2444 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2445 if (GET_MODE (x) != GET_MODE (y))
2458 return XEXP (x, 0) == XEXP (y, 0);
2461 return XSTR (x, 0) == XSTR (y, 0);
2465 return REGNO (x) == REGNO (y);
2468 unsigned int regno = REGNO (y);
2470 unsigned int endregno = END_REGNO (y);
2472 /* If the quantities are not the same, the expressions are not
2473 equivalent. If there are and we are not to validate, they
2474 are equivalent. Otherwise, ensure all regs are up-to-date. */
2476 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2482 for (i = regno; i < endregno; i++)
2483 if (REG_IN_TABLE (i) != REG_TICK (i))
2492 /* A volatile mem should not be considered equivalent to any
2494 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2497 /* Can't merge two expressions in different alias sets, since we
2498 can decide that the expression is transparent in a block when
2499 it isn't, due to it being set with the different alias set.
2501 Also, can't merge two expressions with different MEM_ATTRS.
2502 They could e.g. be two different entities allocated into the
2503 same space on the stack (see e.g. PR25130). In that case, the
2504 MEM addresses can be the same, even though the two MEMs are
2505 absolutely not equivalent.
2507 But because really all MEM attributes should be the same for
2508 equivalent MEMs, we just use the invariant that MEMs that have
2509 the same attributes share the same mem_attrs data structure. */
2510 if (MEM_ATTRS (x) != MEM_ATTRS (y))
2515 /* For commutative operations, check both orders. */
2523 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2525 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2526 validate, for_gcse))
2527 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2529 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2530 validate, for_gcse)));
2533 /* We don't use the generic code below because we want to
2534 disregard filename and line numbers. */
2536 /* A volatile asm isn't equivalent to any other. */
2537 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2540 if (GET_MODE (x) != GET_MODE (y)
2541 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2542 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2543 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2544 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2545 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2548 if (ASM_OPERANDS_INPUT_LENGTH (x))
2550 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2551 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2552 ASM_OPERANDS_INPUT (y, i),
2554 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2555 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2565 /* Compare the elements. If any pair of corresponding elements
2566 fail to match, return 0 for the whole thing. */
2568 fmt = GET_RTX_FORMAT (code);
2569 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2574 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2575 validate, for_gcse))
2580 if (XVECLEN (x, i) != XVECLEN (y, i))
2582 for (j = 0; j < XVECLEN (x, i); j++)
2583 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2584 validate, for_gcse))
2589 if (strcmp (XSTR (x, i), XSTR (y, i)))
2594 if (XINT (x, i) != XINT (y, i))
2599 if (XWINT (x, i) != XWINT (y, i))
2615 /* Return 1 if X has a value that can vary even between two
2616 executions of the program. 0 means X can be compared reliably
2617 against certain constants or near-constants. */
2620 cse_rtx_varies_p (const_rtx x, bool from_alias)
2622 /* We need not check for X and the equivalence class being of the same
2623 mode because if X is equivalent to a constant in some mode, it
2624 doesn't vary in any mode. */
2627 && REGNO_QTY_VALID_P (REGNO (x)))
2629 int x_q = REG_QTY (REGNO (x));
2630 struct qty_table_elem *x_ent = &qty_table[x_q];
2632 if (GET_MODE (x) == x_ent->mode
2633 && x_ent->const_rtx != NULL_RTX)
2637 if (GET_CODE (x) == PLUS
2638 && GET_CODE (XEXP (x, 1)) == CONST_INT
2639 && REG_P (XEXP (x, 0))
2640 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2642 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2643 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2645 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2646 && x0_ent->const_rtx != NULL_RTX)
2650 /* This can happen as the result of virtual register instantiation, if
2651 the initial constant is too large to be a valid address. This gives
2652 us a three instruction sequence, load large offset into a register,
2653 load fp minus a constant into a register, then a MEM which is the
2654 sum of the two `constant' registers. */
2655 if (GET_CODE (x) == PLUS
2656 && REG_P (XEXP (x, 0))
2657 && REG_P (XEXP (x, 1))
2658 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2659 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2661 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2662 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2663 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2664 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2666 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2667 && x0_ent->const_rtx != NULL_RTX
2668 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2669 && x1_ent->const_rtx != NULL_RTX)
2673 return rtx_varies_p (x, from_alias);
2676 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2677 the result if necessary. INSN is as for canon_reg. */
2680 validate_canon_reg (rtx *xloc, rtx insn)
2684 rtx new_rtx = canon_reg (*xloc, insn);
2686 /* If replacing pseudo with hard reg or vice versa, ensure the
2687 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2688 gcc_assert (insn && new_rtx);
2689 validate_change (insn, xloc, new_rtx, 1);
2693 /* Canonicalize an expression:
2694 replace each register reference inside it
2695 with the "oldest" equivalent register.
2697 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2698 after we make our substitution. The calls are made with IN_GROUP nonzero
2699 so apply_change_group must be called upon the outermost return from this
2700 function (unless INSN is zero). The result of apply_change_group can
2701 generally be discarded since the changes we are making are optional. */
2704 canon_reg (rtx x, rtx insn)
2713 code = GET_CODE (x);
2733 struct qty_table_elem *ent;
2735 /* Never replace a hard reg, because hard regs can appear
2736 in more than one machine mode, and we must preserve the mode
2737 of each occurrence. Also, some hard regs appear in
2738 MEMs that are shared and mustn't be altered. Don't try to
2739 replace any reg that maps to a reg of class NO_REGS. */
2740 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2741 || ! REGNO_QTY_VALID_P (REGNO (x)))
2744 q = REG_QTY (REGNO (x));
2745 ent = &qty_table[q];
2746 first = ent->first_reg;
2747 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2748 : REGNO_REG_CLASS (first) == NO_REGS ? x
2749 : gen_rtx_REG (ent->mode, first));
2756 fmt = GET_RTX_FORMAT (code);
2757 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2762 validate_canon_reg (&XEXP (x, i), insn);
2763 else if (fmt[i] == 'E')
2764 for (j = 0; j < XVECLEN (x, i); j++)
2765 validate_canon_reg (&XVECEXP (x, i, j), insn);
2771 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2772 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2773 what values are being compared.
2775 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2776 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2777 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2778 compared to produce cc0.
2780 The return value is the comparison operator and is either the code of
2781 A or the code corresponding to the inverse of the comparison. */
2783 static enum rtx_code
2784 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2785 enum machine_mode *pmode1, enum machine_mode *pmode2)
2789 arg1 = *parg1, arg2 = *parg2;
2791 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2793 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2795 /* Set nonzero when we find something of interest. */
2797 int reverse_code = 0;
2798 struct table_elt *p = 0;
2800 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2801 On machines with CC0, this is the only case that can occur, since
2802 fold_rtx will return the COMPARE or item being compared with zero
2805 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2808 /* If ARG1 is a comparison operator and CODE is testing for
2809 STORE_FLAG_VALUE, get the inner arguments. */
2811 else if (COMPARISON_P (arg1))
2813 #ifdef FLOAT_STORE_FLAG_VALUE
2814 REAL_VALUE_TYPE fsfv;
2818 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2819 && code == LT && STORE_FLAG_VALUE == -1)
2820 #ifdef FLOAT_STORE_FLAG_VALUE
2821 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2822 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2823 REAL_VALUE_NEGATIVE (fsfv)))
2828 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2829 && code == GE && STORE_FLAG_VALUE == -1)
2830 #ifdef FLOAT_STORE_FLAG_VALUE
2831 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2832 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2833 REAL_VALUE_NEGATIVE (fsfv)))
2836 x = arg1, reverse_code = 1;
2839 /* ??? We could also check for
2841 (ne (and (eq (...) (const_int 1))) (const_int 0))
2843 and related forms, but let's wait until we see them occurring. */
2846 /* Look up ARG1 in the hash table and see if it has an equivalence
2847 that lets us see what is being compared. */
2848 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
2851 p = p->first_same_value;
2853 /* If what we compare is already known to be constant, that is as
2855 We need to break the loop in this case, because otherwise we
2856 can have an infinite loop when looking at a reg that is known
2857 to be a constant which is the same as a comparison of a reg
2858 against zero which appears later in the insn stream, which in
2859 turn is constant and the same as the comparison of the first reg
2865 for (; p; p = p->next_same_value)
2867 enum machine_mode inner_mode = GET_MODE (p->exp);
2868 #ifdef FLOAT_STORE_FLAG_VALUE
2869 REAL_VALUE_TYPE fsfv;
2872 /* If the entry isn't valid, skip it. */
2873 if (! exp_equiv_p (p->exp, p->exp, 1, false))
2876 if (GET_CODE (p->exp) == COMPARE
2877 /* Another possibility is that this machine has a compare insn
2878 that includes the comparison code. In that case, ARG1 would
2879 be equivalent to a comparison operation that would set ARG1 to
2880 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2881 ORIG_CODE is the actual comparison being done; if it is an EQ,
2882 we must reverse ORIG_CODE. On machine with a negative value
2883 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2886 && GET_MODE_CLASS (inner_mode) == MODE_INT
2887 && (GET_MODE_BITSIZE (inner_mode)
2888 <= HOST_BITS_PER_WIDE_INT)
2889 && (STORE_FLAG_VALUE
2890 & ((HOST_WIDE_INT) 1
2891 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2892 #ifdef FLOAT_STORE_FLAG_VALUE
2894 && SCALAR_FLOAT_MODE_P (inner_mode)
2895 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2896 REAL_VALUE_NEGATIVE (fsfv)))
2899 && COMPARISON_P (p->exp)))
2904 else if ((code == EQ
2906 && GET_MODE_CLASS (inner_mode) == MODE_INT
2907 && (GET_MODE_BITSIZE (inner_mode)
2908 <= HOST_BITS_PER_WIDE_INT)
2909 && (STORE_FLAG_VALUE
2910 & ((HOST_WIDE_INT) 1
2911 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2912 #ifdef FLOAT_STORE_FLAG_VALUE
2914 && SCALAR_FLOAT_MODE_P (inner_mode)
2915 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2916 REAL_VALUE_NEGATIVE (fsfv)))
2919 && COMPARISON_P (p->exp))
2926 /* If this non-trapping address, e.g. fp + constant, the
2927 equivalent is a better operand since it may let us predict
2928 the value of the comparison. */
2929 else if (!rtx_addr_can_trap_p (p->exp))
2936 /* If we didn't find a useful equivalence for ARG1, we are done.
2937 Otherwise, set up for the next iteration. */
2941 /* If we need to reverse the comparison, make sure that that is
2942 possible -- we can't necessarily infer the value of GE from LT
2943 with floating-point operands. */
2946 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
2947 if (reversed == UNKNOWN)
2952 else if (COMPARISON_P (x))
2953 code = GET_CODE (x);
2954 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2957 /* Return our results. Return the modes from before fold_rtx
2958 because fold_rtx might produce const_int, and then it's too late. */
2959 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2960 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2965 /* If X is a nontrivial arithmetic operation on an argument for which
2966 a constant value can be determined, return the result of operating
2967 on that value, as a constant. Otherwise, return X, possibly with
2968 one or more operands changed to a forward-propagated constant.
2970 If X is a register whose contents are known, we do NOT return
2971 those contents here; equiv_constant is called to perform that task.
2972 For SUBREGs and MEMs, we do that both here and in equiv_constant.
2974 INSN is the insn that we may be modifying. If it is 0, make a copy
2975 of X before modifying it. */
2978 fold_rtx (rtx x, rtx insn)
2981 enum machine_mode mode;
2987 /* Operands of X. */
2991 /* Constant equivalents of first three operands of X;
2992 0 when no such equivalent is known. */
2997 /* The mode of the first operand of X. We need this for sign and zero
2999 enum machine_mode mode_arg0;
3004 /* Try to perform some initial simplifications on X. */
3005 code = GET_CODE (x);
3010 if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3023 /* No use simplifying an EXPR_LIST
3024 since they are used only for lists of args
3025 in a function call's REG_EQUAL note. */
3031 return prev_insn_cc0;
3037 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3038 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3039 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3043 #ifdef NO_FUNCTION_CSE
3045 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3050 /* Anything else goes through the loop below. */
3055 mode = GET_MODE (x);
3059 mode_arg0 = VOIDmode;
3061 /* Try folding our operands.
3062 Then see which ones have constant values known. */
3064 fmt = GET_RTX_FORMAT (code);
3065 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3068 rtx folded_arg = XEXP (x, i), const_arg;
3069 enum machine_mode mode_arg = GET_MODE (folded_arg);
3071 switch (GET_CODE (folded_arg))
3076 const_arg = equiv_constant (folded_arg);
3086 const_arg = folded_arg;
3091 folded_arg = prev_insn_cc0;
3092 mode_arg = prev_insn_cc0_mode;
3093 const_arg = equiv_constant (folded_arg);
3098 folded_arg = fold_rtx (folded_arg, insn);
3099 const_arg = equiv_constant (folded_arg);
3103 /* For the first three operands, see if the operand
3104 is constant or equivalent to a constant. */
3108 folded_arg0 = folded_arg;
3109 const_arg0 = const_arg;
3110 mode_arg0 = mode_arg;
3113 folded_arg1 = folded_arg;
3114 const_arg1 = const_arg;
3117 const_arg2 = const_arg;
3121 /* Pick the least expensive of the argument and an equivalent constant
3124 && const_arg != folded_arg
3125 && COST_IN (const_arg, code) <= COST_IN (folded_arg, code)
3127 /* It's not safe to substitute the operand of a conversion
3128 operator with a constant, as the conversion's identity
3129 depends upon the mode of its operand. This optimization
3130 is handled by the call to simplify_unary_operation. */
3131 && (GET_RTX_CLASS (code) != RTX_UNARY
3132 || GET_MODE (const_arg) == mode_arg0
3133 || (code != ZERO_EXTEND
3134 && code != SIGN_EXTEND
3136 && code != FLOAT_TRUNCATE
3137 && code != FLOAT_EXTEND
3140 && code != UNSIGNED_FLOAT
3141 && code != UNSIGNED_FIX)))
3142 folded_arg = const_arg;
3144 if (folded_arg == XEXP (x, i))
3147 if (insn == NULL_RTX && !changed)
3150 validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3155 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3156 consistent with the order in X. */
3157 if (canonicalize_change_group (insn, x))
3160 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3161 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3164 apply_change_group ();
3167 /* If X is an arithmetic operation, see if we can simplify it. */
3169 switch (GET_RTX_CLASS (code))
3175 /* We can't simplify extension ops unless we know the
3177 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3178 && mode_arg0 == VOIDmode)
3181 /* If we had a CONST, strip it off and put it back later if we
3183 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3184 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3186 new_rtx = simplify_unary_operation (code, mode,
3187 const_arg0 ? const_arg0 : folded_arg0,
3189 /* NEG of PLUS could be converted into MINUS, but that causes
3190 expressions of the form
3191 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3192 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3193 FIXME: those ports should be fixed. */
3194 if (new_rtx != 0 && is_const
3195 && GET_CODE (new_rtx) == PLUS
3196 && (GET_CODE (XEXP (new_rtx, 0)) == SYMBOL_REF
3197 || GET_CODE (XEXP (new_rtx, 0)) == LABEL_REF)
3198 && GET_CODE (XEXP (new_rtx, 1)) == CONST_INT)
3199 new_rtx = gen_rtx_CONST (mode, new_rtx);
3204 case RTX_COMM_COMPARE:
3205 /* See what items are actually being compared and set FOLDED_ARG[01]
3206 to those values and CODE to the actual comparison code. If any are
3207 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3208 do anything if both operands are already known to be constant. */
3210 /* ??? Vector mode comparisons are not supported yet. */
3211 if (VECTOR_MODE_P (mode))
3214 if (const_arg0 == 0 || const_arg1 == 0)
3216 struct table_elt *p0, *p1;
3217 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3218 enum machine_mode mode_arg1;
3220 #ifdef FLOAT_STORE_FLAG_VALUE
3221 if (SCALAR_FLOAT_MODE_P (mode))
3223 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3224 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3225 false_rtx = CONST0_RTX (mode);
3229 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3230 &mode_arg0, &mode_arg1);
3232 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3233 what kinds of things are being compared, so we can't do
3234 anything with this comparison. */
3236 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3239 const_arg0 = equiv_constant (folded_arg0);
3240 const_arg1 = equiv_constant (folded_arg1);
3242 /* If we do not now have two constants being compared, see
3243 if we can nevertheless deduce some things about the
3245 if (const_arg0 == 0 || const_arg1 == 0)
3247 if (const_arg1 != NULL)
3249 rtx cheapest_simplification;
3252 struct table_elt *p;
3254 /* See if we can find an equivalent of folded_arg0
3255 that gets us a cheaper expression, possibly a
3256 constant through simplifications. */
3257 p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3262 cheapest_simplification = x;
3263 cheapest_cost = COST (x);
3265 for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3269 /* If the entry isn't valid, skip it. */
3270 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3273 /* Try to simplify using this equivalence. */
3275 = simplify_relational_operation (code, mode,
3280 if (simp_result == NULL)
3283 cost = COST (simp_result);
3284 if (cost < cheapest_cost)
3286 cheapest_cost = cost;
3287 cheapest_simplification = simp_result;
3291 /* If we have a cheaper expression now, use that
3292 and try folding it further, from the top. */
3293 if (cheapest_simplification != x)
3294 return fold_rtx (copy_rtx (cheapest_simplification),
3299 /* See if the two operands are the same. */
3301 if ((REG_P (folded_arg0)
3302 && REG_P (folded_arg1)
3303 && (REG_QTY (REGNO (folded_arg0))
3304 == REG_QTY (REGNO (folded_arg1))))
3305 || ((p0 = lookup (folded_arg0,
3306 SAFE_HASH (folded_arg0, mode_arg0),
3308 && (p1 = lookup (folded_arg1,
3309 SAFE_HASH (folded_arg1, mode_arg0),
3311 && p0->first_same_value == p1->first_same_value))
3312 folded_arg1 = folded_arg0;
3314 /* If FOLDED_ARG0 is a register, see if the comparison we are
3315 doing now is either the same as we did before or the reverse
3316 (we only check the reverse if not floating-point). */
3317 else if (REG_P (folded_arg0))
3319 int qty = REG_QTY (REGNO (folded_arg0));
3321 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3323 struct qty_table_elem *ent = &qty_table[qty];
3325 if ((comparison_dominates_p (ent->comparison_code, code)
3326 || (! FLOAT_MODE_P (mode_arg0)
3327 && comparison_dominates_p (ent->comparison_code,
3328 reverse_condition (code))))
3329 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3331 && rtx_equal_p (ent->comparison_const,
3333 || (REG_P (folded_arg1)
3334 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3335 return (comparison_dominates_p (ent->comparison_code, code)
3336 ? true_rtx : false_rtx);
3342 /* If we are comparing against zero, see if the first operand is
3343 equivalent to an IOR with a constant. If so, we may be able to
3344 determine the result of this comparison. */
3345 if (const_arg1 == const0_rtx && !const_arg0)
3347 rtx y = lookup_as_function (folded_arg0, IOR);
3351 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3352 && GET_CODE (inner_const) == CONST_INT
3353 && INTVAL (inner_const) != 0)
3354 folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3358 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3359 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3360 new_rtx = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3365 case RTX_COMM_ARITH:
3369 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3370 with that LABEL_REF as its second operand. If so, the result is
3371 the first operand of that MINUS. This handles switches with an
3372 ADDR_DIFF_VEC table. */
3373 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3376 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3377 : lookup_as_function (folded_arg0, MINUS);
3379 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3380 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3383 /* Now try for a CONST of a MINUS like the above. */
3384 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3385 : lookup_as_function (folded_arg0, CONST))) != 0
3386 && GET_CODE (XEXP (y, 0)) == MINUS
3387 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3388 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3389 return XEXP (XEXP (y, 0), 0);
3392 /* Likewise if the operands are in the other order. */
3393 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3396 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3397 : lookup_as_function (folded_arg1, MINUS);
3399 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3400 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3403 /* Now try for a CONST of a MINUS like the above. */
3404 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3405 : lookup_as_function (folded_arg1, CONST))) != 0
3406 && GET_CODE (XEXP (y, 0)) == MINUS
3407 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3408 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
3409 return XEXP (XEXP (y, 0), 0);
3412 /* If second operand is a register equivalent to a negative
3413 CONST_INT, see if we can find a register equivalent to the
3414 positive constant. Make a MINUS if so. Don't do this for
3415 a non-negative constant since we might then alternate between
3416 choosing positive and negative constants. Having the positive
3417 constant previously-used is the more common case. Be sure
3418 the resulting constant is non-negative; if const_arg1 were
3419 the smallest negative number this would overflow: depending
3420 on the mode, this would either just be the same value (and
3421 hence not save anything) or be incorrect. */
3422 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
3423 && INTVAL (const_arg1) < 0
3424 /* This used to test
3426 -INTVAL (const_arg1) >= 0
3428 But The Sun V5.0 compilers mis-compiled that test. So
3429 instead we test for the problematic value in a more direct
3430 manner and hope the Sun compilers get it correct. */
3431 && INTVAL (const_arg1) !=
3432 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3433 && REG_P (folded_arg1))
3435 rtx new_const = GEN_INT (-INTVAL (const_arg1));
3437 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3440 for (p = p->first_same_value; p; p = p->next_same_value)
3442 return simplify_gen_binary (MINUS, mode, folded_arg0,
3443 canon_reg (p->exp, NULL_RTX));
3448 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3449 If so, produce (PLUS Z C2-C). */
3450 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
3452 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3453 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
3454 return fold_rtx (plus_constant (copy_rtx (y),
3455 -INTVAL (const_arg1)),
3462 case SMIN: case SMAX: case UMIN: case UMAX:
3463 case IOR: case AND: case XOR:
3465 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3466 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3467 is known to be of similar form, we may be able to replace the
3468 operation with a combined operation. This may eliminate the
3469 intermediate operation if every use is simplified in this way.
3470 Note that the similar optimization done by combine.c only works
3471 if the intermediate operation's result has only one reference. */
3473 if (REG_P (folded_arg0)
3474 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
3477 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3478 rtx y, inner_const, new_const;
3479 enum rtx_code associate_code;
3482 && (INTVAL (const_arg1) >= GET_MODE_BITSIZE (mode)
3483 || INTVAL (const_arg1) < 0))
3485 if (SHIFT_COUNT_TRUNCATED)
3486 const_arg1 = GEN_INT (INTVAL (const_arg1)
3487 & (GET_MODE_BITSIZE (mode) - 1));
3492 y = lookup_as_function (folded_arg0, code);
3496 /* If we have compiled a statement like
3497 "if (x == (x & mask1))", and now are looking at
3498 "x & mask2", we will have a case where the first operand
3499 of Y is the same as our first operand. Unless we detect
3500 this case, an infinite loop will result. */
3501 if (XEXP (y, 0) == folded_arg0)
3504 inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3505 if (!inner_const || GET_CODE (inner_const) != CONST_INT)
3508 /* Don't associate these operations if they are a PLUS with the
3509 same constant and it is a power of two. These might be doable
3510 with a pre- or post-increment. Similarly for two subtracts of
3511 identical powers of two with post decrement. */
3513 if (code == PLUS && const_arg1 == inner_const
3514 && ((HAVE_PRE_INCREMENT
3515 && exact_log2 (INTVAL (const_arg1)) >= 0)
3516 || (HAVE_POST_INCREMENT
3517 && exact_log2 (INTVAL (const_arg1)) >= 0)
3518 || (HAVE_PRE_DECREMENT
3519 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3520 || (HAVE_POST_DECREMENT
3521 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3524 /* ??? Vector mode shifts by scalar
3525 shift operand are not supported yet. */
3526 if (is_shift && VECTOR_MODE_P (mode))
3530 && (INTVAL (inner_const) >= GET_MODE_BITSIZE (mode)
3531 || INTVAL (inner_const) < 0))
3533 if (SHIFT_COUNT_TRUNCATED)
3534 inner_const = GEN_INT (INTVAL (inner_const)
3535 & (GET_MODE_BITSIZE (mode) - 1));
3540 /* Compute the code used to compose the constants. For example,
3541 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3543 associate_code = (is_shift || code == MINUS ? PLUS : code);
3545 new_const = simplify_binary_operation (associate_code, mode,
3546 const_arg1, inner_const);
3551 /* If we are associating shift operations, don't let this
3552 produce a shift of the size of the object or larger.
3553 This could occur when we follow a sign-extend by a right
3554 shift on a machine that does a sign-extend as a pair
3558 && GET_CODE (new_const) == CONST_INT
3559 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
3561 /* As an exception, we can turn an ASHIFTRT of this
3562 form into a shift of the number of bits - 1. */
3563 if (code == ASHIFTRT)
3564 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3565 else if (!side_effects_p (XEXP (y, 0)))
3566 return CONST0_RTX (mode);
3571 y = copy_rtx (XEXP (y, 0));
3573 /* If Y contains our first operand (the most common way this
3574 can happen is if Y is a MEM), we would do into an infinite
3575 loop if we tried to fold it. So don't in that case. */
3577 if (! reg_mentioned_p (folded_arg0, y))
3578 y = fold_rtx (y, insn);
3580 return simplify_gen_binary (code, mode, y, new_const);
3584 case DIV: case UDIV:
3585 /* ??? The associative optimization performed immediately above is
3586 also possible for DIV and UDIV using associate_code of MULT.
3587 However, we would need extra code to verify that the
3588 multiplication does not overflow, that is, there is no overflow
3589 in the calculation of new_const. */
3596 new_rtx = simplify_binary_operation (code, mode,
3597 const_arg0 ? const_arg0 : folded_arg0,
3598 const_arg1 ? const_arg1 : folded_arg1);
3602 /* (lo_sum (high X) X) is simply X. */
3603 if (code == LO_SUM && const_arg0 != 0
3604 && GET_CODE (const_arg0) == HIGH
3605 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3610 case RTX_BITFIELD_OPS:
3611 new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3612 const_arg0 ? const_arg0 : folded_arg0,
3613 const_arg1 ? const_arg1 : folded_arg1,
3614 const_arg2 ? const_arg2 : XEXP (x, 2));
3621 return new_rtx ? new_rtx : x;
3624 /* Return a constant value currently equivalent to X.
3625 Return 0 if we don't know one. */
3628 equiv_constant (rtx x)
3631 && REGNO_QTY_VALID_P (REGNO (x)))
3633 int x_q = REG_QTY (REGNO (x));
3634 struct qty_table_elem *x_ent = &qty_table[x_q];
3636 if (x_ent->const_rtx)
3637 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3640 if (x == 0 || CONSTANT_P (x))
3643 if (GET_CODE (x) == SUBREG)
3647 /* See if we previously assigned a constant value to this SUBREG. */
3648 if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3649 || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3650 || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3653 if (REG_P (SUBREG_REG (x))
3654 && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3655 return simplify_subreg (GET_MODE (x), SUBREG_REG (x),
3656 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3661 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3662 the hash table in case its value was seen before. */
3666 struct table_elt *elt;
3668 x = avoid_constant_pool_reference (x);
3672 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3676 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3677 if (elt->is_const && CONSTANT_P (elt->exp))
3684 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3687 In certain cases, this can cause us to add an equivalence. For example,
3688 if we are following the taken case of
3690 we can add the fact that `i' and '2' are now equivalent.
3692 In any case, we can record that this comparison was passed. If the same
3693 comparison is seen later, we will know its value. */
3696 record_jump_equiv (rtx insn, bool taken)
3698 int cond_known_true;
3701 enum machine_mode mode, mode0, mode1;
3702 int reversed_nonequality = 0;
3705 /* Ensure this is the right kind of insn. */
3706 gcc_assert (any_condjump_p (insn));
3708 set = pc_set (insn);
3710 /* See if this jump condition is known true or false. */
3712 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3714 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3716 /* Get the type of comparison being done and the operands being compared.
3717 If we had to reverse a non-equality condition, record that fact so we
3718 know that it isn't valid for floating-point. */
3719 code = GET_CODE (XEXP (SET_SRC (set), 0));
3720 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3721 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3723 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3724 if (! cond_known_true)
3726 code = reversed_comparison_code_parts (code, op0, op1, insn);
3728 /* Don't remember if we can't find the inverse. */
3729 if (code == UNKNOWN)
3733 /* The mode is the mode of the non-constant. */
3735 if (mode1 != VOIDmode)
3738 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
3741 /* Yet another form of subreg creation. In this case, we want something in
3742 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3745 record_jump_cond_subreg (enum machine_mode mode, rtx op)
3747 enum machine_mode op_mode = GET_MODE (op);
3748 if (op_mode == mode || op_mode == VOIDmode)
3750 return lowpart_subreg (mode, op, op_mode);
3753 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3754 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3755 Make any useful entries we can with that information. Called from
3756 above function and called recursively. */
3759 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
3760 rtx op1, int reversed_nonequality)
3762 unsigned op0_hash, op1_hash;
3763 int op0_in_memory, op1_in_memory;
3764 struct table_elt *op0_elt, *op1_elt;
3766 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3767 we know that they are also equal in the smaller mode (this is also
3768 true for all smaller modes whether or not there is a SUBREG, but
3769 is not worth testing for with no SUBREG). */
3771 /* Note that GET_MODE (op0) may not equal MODE. */
3772 if (code == EQ && GET_CODE (op0) == SUBREG
3773 && (GET_MODE_SIZE (GET_MODE (op0))
3774 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3776 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3777 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3779 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3780 reversed_nonequality);
3783 if (code == EQ && GET_CODE (op1) == SUBREG
3784 && (GET_MODE_SIZE (GET_MODE (op1))
3785 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
3787 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3788 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3790 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3791 reversed_nonequality);
3794 /* Similarly, if this is an NE comparison, and either is a SUBREG
3795 making a smaller mode, we know the whole thing is also NE. */
3797 /* Note that GET_MODE (op0) may not equal MODE;
3798 if we test MODE instead, we can get an infinite recursion
3799 alternating between two modes each wider than MODE. */
3801 if (code == NE && GET_CODE (op0) == SUBREG
3802 && subreg_lowpart_p (op0)
3803 && (GET_MODE_SIZE (GET_MODE (op0))
3804 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3806 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3807 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3809 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3810 reversed_nonequality);
3813 if (code == NE && GET_CODE (op1) == SUBREG
3814 && subreg_lowpart_p (op1)
3815 && (GET_MODE_SIZE (GET_MODE (op1))
3816 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
3818 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3819 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3821 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3822 reversed_nonequality);
3825 /* Hash both operands. */
3828 hash_arg_in_memory = 0;
3829 op0_hash = HASH (op0, mode);
3830 op0_in_memory = hash_arg_in_memory;
3836 hash_arg_in_memory = 0;
3837 op1_hash = HASH (op1, mode);
3838 op1_in_memory = hash_arg_in_memory;
3843 /* Look up both operands. */
3844 op0_elt = lookup (op0, op0_hash, mode);
3845 op1_elt = lookup (op1, op1_hash, mode);
3847 /* If both operands are already equivalent or if they are not in the
3848 table but are identical, do nothing. */
3849 if ((op0_elt != 0 && op1_elt != 0
3850 && op0_elt->first_same_value == op1_elt->first_same_value)
3851 || op0 == op1 || rtx_equal_p (op0, op1))
3854 /* If we aren't setting two things equal all we can do is save this
3855 comparison. Similarly if this is floating-point. In the latter
3856 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
3857 If we record the equality, we might inadvertently delete code
3858 whose intent was to change -0 to +0. */
3860 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
3862 struct qty_table_elem *ent;
3865 /* If we reversed a floating-point comparison, if OP0 is not a
3866 register, or if OP1 is neither a register or constant, we can't
3870 op1 = equiv_constant (op1);
3872 if ((reversed_nonequality && FLOAT_MODE_P (mode))
3873 || !REG_P (op0) || op1 == 0)
3876 /* Put OP0 in the hash table if it isn't already. This gives it a
3877 new quantity number. */
3880 if (insert_regs (op0, NULL, 0))
3882 rehash_using_reg (op0);
3883 op0_hash = HASH (op0, mode);
3885 /* If OP0 is contained in OP1, this changes its hash code
3886 as well. Faster to rehash than to check, except
3887 for the simple case of a constant. */
3888 if (! CONSTANT_P (op1))
3889 op1_hash = HASH (op1,mode);
3892 op0_elt = insert (op0, NULL, op0_hash, mode);
3893 op0_elt->in_memory = op0_in_memory;
3896 qty = REG_QTY (REGNO (op0));
3897 ent = &qty_table[qty];
3899 ent->comparison_code = code;
3902 /* Look it up again--in case op0 and op1 are the same. */
3903 op1_elt = lookup (op1, op1_hash, mode);
3905 /* Put OP1 in the hash table so it gets a new quantity number. */
3908 if (insert_regs (op1, NULL, 0))
3910 rehash_using_reg (op1);
3911 op1_hash = HASH (op1, mode);
3914 op1_elt = insert (op1, NULL, op1_hash, mode);
3915 op1_elt->in_memory = op1_in_memory;
3918 ent->comparison_const = NULL_RTX;
3919 ent->comparison_qty = REG_QTY (REGNO (op1));
3923 ent->comparison_const = op1;
3924 ent->comparison_qty = -1;
3930 /* If either side is still missing an equivalence, make it now,
3931 then merge the equivalences. */
3935 if (insert_regs (op0, NULL, 0))
3937 rehash_using_reg (op0);
3938 op0_hash = HASH (op0, mode);
3941 op0_elt = insert (op0, NULL, op0_hash, mode);
3942 op0_elt->in_memory = op0_in_memory;
3947 if (insert_regs (op1, NULL, 0))
3949 rehash_using_reg (op1);
3950 op1_hash = HASH (op1, mode);
3953 op1_elt = insert (op1, NULL, op1_hash, mode);
3954 op1_elt->in_memory = op1_in_memory;
3957 merge_equiv_classes (op0_elt, op1_elt);
3960 /* CSE processing for one instruction.
3961 First simplify sources and addresses of all assignments
3962 in the instruction, using previously-computed equivalents values.
3963 Then install the new sources and destinations in the table
3964 of available values. */
3966 /* Data on one SET contained in the instruction. */
3970 /* The SET rtx itself. */
3972 /* The SET_SRC of the rtx (the original value, if it is changing). */
3974 /* The hash-table element for the SET_SRC of the SET. */
3975 struct table_elt *src_elt;
3976 /* Hash value for the SET_SRC. */
3978 /* Hash value for the SET_DEST. */
3980 /* The SET_DEST, with SUBREG, etc., stripped. */
3982 /* Nonzero if the SET_SRC is in memory. */
3984 /* Nonzero if the SET_SRC contains something
3985 whose value cannot be predicted and understood. */
3987 /* Original machine mode, in case it becomes a CONST_INT.
3988 The size of this field should match the size of the mode
3989 field of struct rtx_def (see rtl.h). */
3990 ENUM_BITFIELD(machine_mode) mode : 8;
3991 /* A constant equivalent for SET_SRC, if any. */
3993 /* Hash value of constant equivalent for SET_SRC. */
3994 unsigned src_const_hash;
3995 /* Table entry for constant equivalent for SET_SRC, if any. */
3996 struct table_elt *src_const_elt;
3997 /* Table entry for the destination address. */
3998 struct table_elt *dest_addr_elt;
4004 rtx x = PATTERN (insn);
4010 struct table_elt *src_eqv_elt = 0;
4011 int src_eqv_volatile = 0;
4012 int src_eqv_in_memory = 0;
4013 unsigned src_eqv_hash = 0;
4015 struct set *sets = (struct set *) 0;
4019 /* Records what this insn does to set CC0. */
4021 this_insn_cc0_mode = VOIDmode;
4024 /* Find all the SETs and CLOBBERs in this instruction.
4025 Record all the SETs in the array `set' and count them.
4026 Also determine whether there is a CLOBBER that invalidates
4027 all memory references, or all references at varying addresses. */
4031 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4033 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4034 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4035 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4039 if (GET_CODE (x) == SET)
4041 sets = XALLOCA (struct set);
4044 /* Ignore SETs that are unconditional jumps.
4045 They never need cse processing, so this does not hurt.
4046 The reason is not efficiency but rather
4047 so that we can test at the end for instructions
4048 that have been simplified to unconditional jumps
4049 and not be misled by unchanged instructions
4050 that were unconditional jumps to begin with. */
4051 if (SET_DEST (x) == pc_rtx
4052 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4055 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4056 The hard function value register is used only once, to copy to
4057 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4058 Ensure we invalidate the destination register. On the 80386 no
4059 other code would invalidate it since it is a fixed_reg.
4060 We need not check the return of apply_change_group; see canon_reg. */
4062 else if (GET_CODE (SET_SRC (x)) == CALL)
4064 canon_reg (SET_SRC (x), insn);
4065 apply_change_group ();
4066 fold_rtx (SET_SRC (x), insn);
4067 invalidate (SET_DEST (x), VOIDmode);
4072 else if (GET_CODE (x) == PARALLEL)
4074 int lim = XVECLEN (x, 0);
4076 sets = XALLOCAVEC (struct set, lim);
4078 /* Find all regs explicitly clobbered in this insn,
4079 and ensure they are not replaced with any other regs
4080 elsewhere in this insn.
4081 When a reg that is clobbered is also used for input,
4082 we should presume that that is for a reason,
4083 and we should not substitute some other register
4084 which is not supposed to be clobbered.
4085 Therefore, this loop cannot be merged into the one below
4086 because a CALL may precede a CLOBBER and refer to the
4087 value clobbered. We must not let a canonicalization do
4088 anything in that case. */
4089 for (i = 0; i < lim; i++)
4091 rtx y = XVECEXP (x, 0, i);
4092 if (GET_CODE (y) == CLOBBER)
4094 rtx clobbered = XEXP (y, 0);
4096 if (REG_P (clobbered)
4097 || GET_CODE (clobbered) == SUBREG)
4098 invalidate (clobbered, VOIDmode);
4099 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4100 || GET_CODE (clobbered) == ZERO_EXTRACT)
4101 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4105 for (i = 0; i < lim; i++)
4107 rtx y = XVECEXP (x, 0, i);
4108 if (GET_CODE (y) == SET)
4110 /* As above, we ignore unconditional jumps and call-insns and
4111 ignore the result of apply_change_group. */
4112 if (GET_CODE (SET_SRC (y)) == CALL)
4114 canon_reg (SET_SRC (y), insn);
4115 apply_change_group ();
4116 fold_rtx (SET_SRC (y), insn);
4117 invalidate (SET_DEST (y), VOIDmode);
4119 else if (SET_DEST (y) == pc_rtx
4120 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4123 sets[n_sets++].rtl = y;
4125 else if (GET_CODE (y) == CLOBBER)
4127 /* If we clobber memory, canon the address.
4128 This does nothing when a register is clobbered
4129 because we have already invalidated the reg. */
4130 if (MEM_P (XEXP (y, 0)))
4131 canon_reg (XEXP (y, 0), insn);
4133 else if (GET_CODE (y) == USE
4134 && ! (REG_P (XEXP (y, 0))
4135 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4136 canon_reg (y, insn);
4137 else if (GET_CODE (y) == CALL)
4139 /* The result of apply_change_group can be ignored; see
4141 canon_reg (y, insn);
4142 apply_change_group ();
4147 else if (GET_CODE (x) == CLOBBER)
4149 if (MEM_P (XEXP (x, 0)))
4150 canon_reg (XEXP (x, 0), insn);
4153 /* Canonicalize a USE of a pseudo register or memory location. */
4154 else if (GET_CODE (x) == USE
4155 && ! (REG_P (XEXP (x, 0))
4156 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4157 canon_reg (XEXP (x, 0), insn);
4158 else if (GET_CODE (x) == CALL)
4160 /* The result of apply_change_group can be ignored; see canon_reg. */
4161 canon_reg (x, insn);
4162 apply_change_group ();
4166 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4167 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4168 is handled specially for this case, and if it isn't set, then there will
4169 be no equivalence for the destination. */
4170 if (n_sets == 1 && REG_NOTES (insn) != 0
4171 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4172 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4173 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4175 /* The result of apply_change_group can be ignored; see canon_reg. */
4176 canon_reg (XEXP (tem, 0), insn);
4177 apply_change_group ();
4178 src_eqv = fold_rtx (XEXP (tem, 0), insn);
4179 XEXP (tem, 0) = copy_rtx (src_eqv);
4180 df_notes_rescan (insn);
4183 /* Canonicalize sources and addresses of destinations.
4184 We do this in a separate pass to avoid problems when a MATCH_DUP is
4185 present in the insn pattern. In that case, we want to ensure that
4186 we don't break the duplicate nature of the pattern. So we will replace
4187 both operands at the same time. Otherwise, we would fail to find an
4188 equivalent substitution in the loop calling validate_change below.
4190 We used to suppress canonicalization of DEST if it appears in SRC,
4191 but we don't do this any more. */
4193 for (i = 0; i < n_sets; i++)
4195 rtx dest = SET_DEST (sets[i].rtl);
4196 rtx src = SET_SRC (sets[i].rtl);
4197 rtx new_rtx = canon_reg (src, insn);
4199 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4201 if (GET_CODE (dest) == ZERO_EXTRACT)
4203 validate_change (insn, &XEXP (dest, 1),
4204 canon_reg (XEXP (dest, 1), insn), 1);
4205 validate_change (insn, &XEXP (dest, 2),
4206 canon_reg (XEXP (dest, 2), insn), 1);
4209 while (GET_CODE (dest) == SUBREG
4210 || GET_CODE (dest) == ZERO_EXTRACT
4211 || GET_CODE (dest) == STRICT_LOW_PART)
4212 dest = XEXP (dest, 0);
4215 canon_reg (dest, insn);
4218 /* Now that we have done all the replacements, we can apply the change
4219 group and see if they all work. Note that this will cause some
4220 canonicalizations that would have worked individually not to be applied
4221 because some other canonicalization didn't work, but this should not
4224 The result of apply_change_group can be ignored; see canon_reg. */
4226 apply_change_group ();
4228 /* Set sets[i].src_elt to the class each source belongs to.
4229 Detect assignments from or to volatile things
4230 and set set[i] to zero so they will be ignored
4231 in the rest of this function.
4233 Nothing in this loop changes the hash table or the register chains. */
4235 for (i = 0; i < n_sets; i++)
4239 struct table_elt *elt = 0, *p;
4240 enum machine_mode mode;
4243 rtx src_related = 0;
4244 struct table_elt *src_const_elt = 0;
4245 int src_cost = MAX_COST;
4246 int src_eqv_cost = MAX_COST;
4247 int src_folded_cost = MAX_COST;
4248 int src_related_cost = MAX_COST;
4249 int src_elt_cost = MAX_COST;
4250 int src_regcost = MAX_COST;
4251 int src_eqv_regcost = MAX_COST;
4252 int src_folded_regcost = MAX_COST;
4253 int src_related_regcost = MAX_COST;
4254 int src_elt_regcost = MAX_COST;
4255 /* Set nonzero if we need to call force_const_mem on with the
4256 contents of src_folded before using it. */
4257 int src_folded_force_flag = 0;
4259 dest = SET_DEST (sets[i].rtl);
4260 src = SET_SRC (sets[i].rtl);
4262 /* If SRC is a constant that has no machine mode,
4263 hash it with the destination's machine mode.
4264 This way we can keep different modes separate. */
4266 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4267 sets[i].mode = mode;
4271 enum machine_mode eqvmode = mode;
4272 if (GET_CODE (dest) == STRICT_LOW_PART)
4273 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4275 hash_arg_in_memory = 0;
4276 src_eqv_hash = HASH (src_eqv, eqvmode);
4278 /* Find the equivalence class for the equivalent expression. */
4281 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4283 src_eqv_volatile = do_not_record;
4284 src_eqv_in_memory = hash_arg_in_memory;
4287 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4288 value of the INNER register, not the destination. So it is not
4289 a valid substitution for the source. But save it for later. */
4290 if (GET_CODE (dest) == STRICT_LOW_PART)
4293 src_eqv_here = src_eqv;
4295 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4296 simplified result, which may not necessarily be valid. */
4297 src_folded = fold_rtx (src, insn);
4300 /* ??? This caused bad code to be generated for the m68k port with -O2.
4301 Suppose src is (CONST_INT -1), and that after truncation src_folded
4302 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4303 At the end we will add src and src_const to the same equivalence
4304 class. We now have 3 and -1 on the same equivalence class. This
4305 causes later instructions to be mis-optimized. */
4306 /* If storing a constant in a bitfield, pre-truncate the constant
4307 so we will be able to record it later. */
4308 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4310 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4312 if (GET_CODE (src) == CONST_INT
4313 && GET_CODE (width) == CONST_INT
4314 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4315 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4317 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4318 << INTVAL (width)) - 1));
4322 /* Compute SRC's hash code, and also notice if it
4323 should not be recorded at all. In that case,
4324 prevent any further processing of this assignment. */
4326 hash_arg_in_memory = 0;
4329 sets[i].src_hash = HASH (src, mode);
4330 sets[i].src_volatile = do_not_record;
4331 sets[i].src_in_memory = hash_arg_in_memory;
4333 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4334 a pseudo, do not record SRC. Using SRC as a replacement for
4335 anything else will be incorrect in that situation. Note that
4336 this usually occurs only for stack slots, in which case all the
4337 RTL would be referring to SRC, so we don't lose any optimization
4338 opportunities by not having SRC in the hash table. */
4341 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4343 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4344 sets[i].src_volatile = 1;
4347 /* It is no longer clear why we used to do this, but it doesn't
4348 appear to still be needed. So let's try without it since this
4349 code hurts cse'ing widened ops. */
4350 /* If source is a paradoxical subreg (such as QI treated as an SI),
4351 treat it as volatile. It may do the work of an SI in one context
4352 where the extra bits are not being used, but cannot replace an SI
4354 if (GET_CODE (src) == SUBREG
4355 && (GET_MODE_SIZE (GET_MODE (src))
4356 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4357 sets[i].src_volatile = 1;
4360 /* Locate all possible equivalent forms for SRC. Try to replace
4361 SRC in the insn with each cheaper equivalent.
4363 We have the following types of equivalents: SRC itself, a folded
4364 version, a value given in a REG_EQUAL note, or a value related
4367 Each of these equivalents may be part of an additional class
4368 of equivalents (if more than one is in the table, they must be in
4369 the same class; we check for this).
4371 If the source is volatile, we don't do any table lookups.
4373 We note any constant equivalent for possible later use in a
4376 if (!sets[i].src_volatile)
4377 elt = lookup (src, sets[i].src_hash, mode);
4379 sets[i].src_elt = elt;
4381 if (elt && src_eqv_here && src_eqv_elt)
4383 if (elt->first_same_value != src_eqv_elt->first_same_value)
4385 /* The REG_EQUAL is indicating that two formerly distinct
4386 classes are now equivalent. So merge them. */
4387 merge_equiv_classes (elt, src_eqv_elt);
4388 src_eqv_hash = HASH (src_eqv, elt->mode);
4389 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4395 else if (src_eqv_elt)
4398 /* Try to find a constant somewhere and record it in `src_const'.
4399 Record its table element, if any, in `src_const_elt'. Look in
4400 any known equivalences first. (If the constant is not in the
4401 table, also set `sets[i].src_const_hash'). */
4403 for (p = elt->first_same_value; p; p = p->next_same_value)
4407 src_const_elt = elt;
4412 && (CONSTANT_P (src_folded)
4413 /* Consider (minus (label_ref L1) (label_ref L2)) as
4414 "constant" here so we will record it. This allows us
4415 to fold switch statements when an ADDR_DIFF_VEC is used. */
4416 || (GET_CODE (src_folded) == MINUS
4417 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4418 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4419 src_const = src_folded, src_const_elt = elt;
4420 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4421 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4423 /* If we don't know if the constant is in the table, get its
4424 hash code and look it up. */
4425 if (src_const && src_const_elt == 0)
4427 sets[i].src_const_hash = HASH (src_const, mode);
4428 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4431 sets[i].src_const = src_const;
4432 sets[i].src_const_elt = src_const_elt;
4434 /* If the constant and our source are both in the table, mark them as
4435 equivalent. Otherwise, if a constant is in the table but the source
4436 isn't, set ELT to it. */
4437 if (src_const_elt && elt
4438 && src_const_elt->first_same_value != elt->first_same_value)
4439 merge_equiv_classes (elt, src_const_elt);
4440 else if (src_const_elt && elt == 0)
4441 elt = src_const_elt;
4443 /* See if there is a register linearly related to a constant
4444 equivalent of SRC. */
4446 && (GET_CODE (src_const) == CONST
4447 || (src_const_elt && src_const_elt->related_value != 0)))
4449 src_related = use_related_value (src_const, src_const_elt);
4452 struct table_elt *src_related_elt
4453 = lookup (src_related, HASH (src_related, mode), mode);
4454 if (src_related_elt && elt)
4456 if (elt->first_same_value
4457 != src_related_elt->first_same_value)
4458 /* This can occur when we previously saw a CONST
4459 involving a SYMBOL_REF and then see the SYMBOL_REF
4460 twice. Merge the involved classes. */
4461 merge_equiv_classes (elt, src_related_elt);
4464 src_related_elt = 0;
4466 else if (src_related_elt && elt == 0)
4467 elt = src_related_elt;
4471 /* See if we have a CONST_INT that is already in a register in a
4474 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
4475 && GET_MODE_CLASS (mode) == MODE_INT
4476 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
4478 enum machine_mode wider_mode;
4480 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4481 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
4482 && src_related == 0;
4483 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4485 struct table_elt *const_elt
4486 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4491 for (const_elt = const_elt->first_same_value;
4492 const_elt; const_elt = const_elt->next_same_value)
4493 if (REG_P (const_elt->exp))
4495 src_related = gen_lowpart (mode, const_elt->exp);
4501 /* Another possibility is that we have an AND with a constant in
4502 a mode narrower than a word. If so, it might have been generated
4503 as part of an "if" which would narrow the AND. If we already
4504 have done the AND in a wider mode, we can use a SUBREG of that
4507 if (flag_expensive_optimizations && ! src_related
4508 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
4509 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4511 enum machine_mode tmode;
4512 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4514 for (tmode = GET_MODE_WIDER_MODE (mode);
4515 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4516 tmode = GET_MODE_WIDER_MODE (tmode))
4518 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4519 struct table_elt *larger_elt;
4523 PUT_MODE (new_and, tmode);
4524 XEXP (new_and, 0) = inner;
4525 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4526 if (larger_elt == 0)
4529 for (larger_elt = larger_elt->first_same_value;
4530 larger_elt; larger_elt = larger_elt->next_same_value)
4531 if (REG_P (larger_elt->exp))
4534 = gen_lowpart (mode, larger_elt->exp);
4544 #ifdef LOAD_EXTEND_OP
4545 /* See if a MEM has already been loaded with a widening operation;
4546 if it has, we can use a subreg of that. Many CISC machines
4547 also have such operations, but this is only likely to be
4548 beneficial on these machines. */
4550 if (flag_expensive_optimizations && src_related == 0
4551 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4552 && GET_MODE_CLASS (mode) == MODE_INT
4553 && MEM_P (src) && ! do_not_record
4554 && LOAD_EXTEND_OP (mode) != UNKNOWN)
4556 struct rtx_def memory_extend_buf;
4557 rtx memory_extend_rtx = &memory_extend_buf;
4558 enum machine_mode tmode;
4560 /* Set what we are trying to extend and the operation it might
4561 have been extended with. */
4562 memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx));
4563 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
4564 XEXP (memory_extend_rtx, 0) = src;
4566 for (tmode = GET_MODE_WIDER_MODE (mode);
4567 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4568 tmode = GET_MODE_WIDER_MODE (tmode))
4570 struct table_elt *larger_elt;
4572 PUT_MODE (memory_extend_rtx, tmode);
4573 larger_elt = lookup (memory_extend_rtx,
4574 HASH (memory_extend_rtx, tmode), tmode);
4575 if (larger_elt == 0)
4578 for (larger_elt = larger_elt->first_same_value;
4579 larger_elt; larger_elt = larger_elt->next_same_value)
4580 if (REG_P (larger_elt->exp))
4582 src_related = gen_lowpart (mode, larger_elt->exp);
4590 #endif /* LOAD_EXTEND_OP */
4592 if (src == src_folded)
4595 /* At this point, ELT, if nonzero, points to a class of expressions
4596 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4597 and SRC_RELATED, if nonzero, each contain additional equivalent
4598 expressions. Prune these latter expressions by deleting expressions
4599 already in the equivalence class.
4601 Check for an equivalent identical to the destination. If found,
4602 this is the preferred equivalent since it will likely lead to
4603 elimination of the insn. Indicate this by placing it in
4607 elt = elt->first_same_value;
4608 for (p = elt; p; p = p->next_same_value)
4610 enum rtx_code code = GET_CODE (p->exp);
4612 /* If the expression is not valid, ignore it. Then we do not
4613 have to check for validity below. In most cases, we can use
4614 `rtx_equal_p', since canonicalization has already been done. */
4615 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
4618 /* Also skip paradoxical subregs, unless that's what we're
4621 && (GET_MODE_SIZE (GET_MODE (p->exp))
4622 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
4624 && GET_CODE (src) == SUBREG
4625 && GET_MODE (src) == GET_MODE (p->exp)
4626 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4627 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
4630 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
4632 else if (src_folded && GET_CODE (src_folded) == code
4633 && rtx_equal_p (src_folded, p->exp))
4635 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
4636 && rtx_equal_p (src_eqv_here, p->exp))
4638 else if (src_related && GET_CODE (src_related) == code
4639 && rtx_equal_p (src_related, p->exp))
4642 /* This is the same as the destination of the insns, we want
4643 to prefer it. Copy it to src_related. The code below will
4644 then give it a negative cost. */
4645 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
4649 /* Find the cheapest valid equivalent, trying all the available
4650 possibilities. Prefer items not in the hash table to ones
4651 that are when they are equal cost. Note that we can never
4652 worsen an insn as the current contents will also succeed.
4653 If we find an equivalent identical to the destination, use it as best,
4654 since this insn will probably be eliminated in that case. */
4657 if (rtx_equal_p (src, dest))
4658 src_cost = src_regcost = -1;
4661 src_cost = COST (src);
4662 src_regcost = approx_reg_cost (src);
4668 if (rtx_equal_p (src_eqv_here, dest))
4669 src_eqv_cost = src_eqv_regcost = -1;
4672 src_eqv_cost = COST (src_eqv_here);
4673 src_eqv_regcost = approx_reg_cost (src_eqv_here);
4679 if (rtx_equal_p (src_folded, dest))
4680 src_folded_cost = src_folded_regcost = -1;
4683 src_folded_cost = COST (src_folded);
4684 src_folded_regcost = approx_reg_cost (src_folded);
4690 if (rtx_equal_p (src_related, dest))
4691 src_related_cost = src_related_regcost = -1;
4694 src_related_cost = COST (src_related);
4695 src_related_regcost = approx_reg_cost (src_related);
4699 /* If this was an indirect jump insn, a known label will really be
4700 cheaper even though it looks more expensive. */
4701 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
4702 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
4704 /* Terminate loop when replacement made. This must terminate since
4705 the current contents will be tested and will always be valid. */
4710 /* Skip invalid entries. */
4711 while (elt && !REG_P (elt->exp)
4712 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
4713 elt = elt->next_same_value;
4715 /* A paradoxical subreg would be bad here: it'll be the right
4716 size, but later may be adjusted so that the upper bits aren't
4717 what we want. So reject it. */
4719 && GET_CODE (elt->exp) == SUBREG
4720 && (GET_MODE_SIZE (GET_MODE (elt->exp))
4721 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
4722 /* It is okay, though, if the rtx we're trying to match
4723 will ignore any of the bits we can't predict. */
4725 && GET_CODE (src) == SUBREG
4726 && GET_MODE (src) == GET_MODE (elt->exp)
4727 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4728 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
4730 elt = elt->next_same_value;
4736 src_elt_cost = elt->cost;
4737 src_elt_regcost = elt->regcost;
4740 /* Find cheapest and skip it for the next time. For items
4741 of equal cost, use this order:
4742 src_folded, src, src_eqv, src_related and hash table entry. */
4744 && preferable (src_folded_cost, src_folded_regcost,
4745 src_cost, src_regcost) <= 0
4746 && preferable (src_folded_cost, src_folded_regcost,
4747 src_eqv_cost, src_eqv_regcost) <= 0
4748 && preferable (src_folded_cost, src_folded_regcost,
4749 src_related_cost, src_related_regcost) <= 0
4750 && preferable (src_folded_cost, src_folded_regcost,
4751 src_elt_cost, src_elt_regcost) <= 0)
4753 trial = src_folded, src_folded_cost = MAX_COST;
4754 if (src_folded_force_flag)
4756 rtx forced = force_const_mem (mode, trial);
4762 && preferable (src_cost, src_regcost,
4763 src_eqv_cost, src_eqv_regcost) <= 0
4764 && preferable (src_cost, src_regcost,
4765 src_related_cost, src_related_regcost) <= 0
4766 && preferable (src_cost, src_regcost,
4767 src_elt_cost, src_elt_regcost) <= 0)
4768 trial = src, src_cost = MAX_COST;
4769 else if (src_eqv_here
4770 && preferable (src_eqv_cost, src_eqv_regcost,
4771 src_related_cost, src_related_regcost) <= 0
4772 && preferable (src_eqv_cost, src_eqv_regcost,
4773 src_elt_cost, src_elt_regcost) <= 0)
4774 trial = src_eqv_here, src_eqv_cost = MAX_COST;
4775 else if (src_related
4776 && preferable (src_related_cost, src_related_regcost,
4777 src_elt_cost, src_elt_regcost) <= 0)
4778 trial = src_related, src_related_cost = MAX_COST;
4782 elt = elt->next_same_value;
4783 src_elt_cost = MAX_COST;
4786 /* Avoid creation of overlapping memory moves. */
4787 if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl)))
4791 /* BLKmode moves are not handled by cse anyway. */
4792 if (GET_MODE (trial) == BLKmode)
4795 src = canon_rtx (trial);
4796 dest = canon_rtx (SET_DEST (sets[i].rtl));
4798 if (!MEM_P (src) || !MEM_P (dest)
4799 || !nonoverlapping_memrefs_p (src, dest))
4803 /* We don't normally have an insn matching (set (pc) (pc)), so
4804 check for this separately here. We will delete such an
4807 For other cases such as a table jump or conditional jump
4808 where we know the ultimate target, go ahead and replace the
4809 operand. While that may not make a valid insn, we will
4810 reemit the jump below (and also insert any necessary
4812 if (n_sets == 1 && dest == pc_rtx
4814 || (GET_CODE (trial) == LABEL_REF
4815 && ! condjump_p (insn))))
4817 /* Don't substitute non-local labels, this confuses CFG. */
4818 if (GET_CODE (trial) == LABEL_REF
4819 && LABEL_REF_NONLOCAL_P (trial))
4822 SET_SRC (sets[i].rtl) = trial;
4823 cse_jumps_altered = true;
4827 /* Reject certain invalid forms of CONST that we create. */
4828 else if (CONSTANT_P (trial)
4829 && GET_CODE (trial) == CONST
4830 /* Reject cases that will cause decode_rtx_const to
4831 die. On the alpha when simplifying a switch, we
4832 get (const (truncate (minus (label_ref)
4834 && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
4835 /* Likewise on IA-64, except without the
4837 || (GET_CODE (XEXP (trial, 0)) == MINUS
4838 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
4839 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
4840 /* Do nothing for this case. */
4843 /* Look for a substitution that makes a valid insn. */
4844 else if (validate_unshare_change
4845 (insn, &SET_SRC (sets[i].rtl), trial, 0))
4847 rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
4849 /* The result of apply_change_group can be ignored; see
4852 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4853 apply_change_group ();
4858 /* If we previously found constant pool entries for
4859 constants and this is a constant, try making a
4860 pool entry. Put it in src_folded unless we already have done
4861 this since that is where it likely came from. */
4863 else if (constant_pool_entries_cost
4864 && CONSTANT_P (trial)
4866 || (!MEM_P (src_folded)
4867 && ! src_folded_force_flag))
4868 && GET_MODE_CLASS (mode) != MODE_CC
4869 && mode != VOIDmode)
4871 src_folded_force_flag = 1;
4873 src_folded_cost = constant_pool_entries_cost;
4874 src_folded_regcost = constant_pool_entries_regcost;
4878 src = SET_SRC (sets[i].rtl);
4880 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
4881 However, there is an important exception: If both are registers
4882 that are not the head of their equivalence class, replace SET_SRC
4883 with the head of the class. If we do not do this, we will have
4884 both registers live over a portion of the basic block. This way,
4885 their lifetimes will likely abut instead of overlapping. */
4887 && REGNO_QTY_VALID_P (REGNO (dest)))
4889 int dest_q = REG_QTY (REGNO (dest));
4890 struct qty_table_elem *dest_ent = &qty_table[dest_q];
4892 if (dest_ent->mode == GET_MODE (dest)
4893 && dest_ent->first_reg != REGNO (dest)
4894 && REG_P (src) && REGNO (src) == REGNO (dest)
4895 /* Don't do this if the original insn had a hard reg as
4896 SET_SRC or SET_DEST. */
4897 && (!REG_P (sets[i].src)
4898 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
4899 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
4900 /* We can't call canon_reg here because it won't do anything if
4901 SRC is a hard register. */
4903 int src_q = REG_QTY (REGNO (src));
4904 struct qty_table_elem *src_ent = &qty_table[src_q];
4905 int first = src_ent->first_reg;
4907 = (first >= FIRST_PSEUDO_REGISTER
4908 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
4910 /* We must use validate-change even for this, because this
4911 might be a special no-op instruction, suitable only to
4913 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
4916 /* If we had a constant that is cheaper than what we are now
4917 setting SRC to, use that constant. We ignored it when we
4918 thought we could make this into a no-op. */
4919 if (src_const && COST (src_const) < COST (src)
4920 && validate_change (insn, &SET_SRC (sets[i].rtl),
4927 /* If we made a change, recompute SRC values. */
4928 if (src != sets[i].src)
4931 hash_arg_in_memory = 0;
4933 sets[i].src_hash = HASH (src, mode);
4934 sets[i].src_volatile = do_not_record;
4935 sets[i].src_in_memory = hash_arg_in_memory;
4936 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
4939 /* If this is a single SET, we are setting a register, and we have an
4940 equivalent constant, we want to add a REG_NOTE. We don't want
4941 to write a REG_EQUAL note for a constant pseudo since verifying that
4942 that pseudo hasn't been eliminated is a pain. Such a note also
4943 won't help anything.
4945 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
4946 which can be created for a reference to a compile time computable
4947 entry in a jump table. */
4949 if (n_sets == 1 && src_const && REG_P (dest)
4950 && !REG_P (src_const)
4951 && ! (GET_CODE (src_const) == CONST
4952 && GET_CODE (XEXP (src_const, 0)) == MINUS
4953 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
4954 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
4956 /* We only want a REG_EQUAL note if src_const != src. */
4957 if (! rtx_equal_p (src, src_const))
4959 /* Make sure that the rtx is not shared. */
4960 src_const = copy_rtx (src_const);
4962 /* Record the actual constant value in a REG_EQUAL note,
4963 making a new one if one does not already exist. */
4964 set_unique_reg_note (insn, REG_EQUAL, src_const);
4965 df_notes_rescan (insn);
4969 /* Now deal with the destination. */
4972 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
4973 while (GET_CODE (dest) == SUBREG
4974 || GET_CODE (dest) == ZERO_EXTRACT
4975 || GET_CODE (dest) == STRICT_LOW_PART)
4976 dest = XEXP (dest, 0);
4978 sets[i].inner_dest = dest;
4982 #ifdef PUSH_ROUNDING
4983 /* Stack pushes invalidate the stack pointer. */
4984 rtx addr = XEXP (dest, 0);
4985 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
4986 && XEXP (addr, 0) == stack_pointer_rtx)
4987 invalidate (stack_pointer_rtx, VOIDmode);
4989 dest = fold_rtx (dest, insn);
4992 /* Compute the hash code of the destination now,
4993 before the effects of this instruction are recorded,
4994 since the register values used in the address computation
4995 are those before this instruction. */
4996 sets[i].dest_hash = HASH (dest, mode);
4998 /* Don't enter a bit-field in the hash table
4999 because the value in it after the store
5000 may not equal what was stored, due to truncation. */
5002 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5004 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5006 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5007 && GET_CODE (width) == CONST_INT
5008 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5009 && ! (INTVAL (src_const)
5010 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5011 /* Exception: if the value is constant,
5012 and it won't be truncated, record it. */
5016 /* This is chosen so that the destination will be invalidated
5017 but no new value will be recorded.
5018 We must invalidate because sometimes constant
5019 values can be recorded for bitfields. */
5020 sets[i].src_elt = 0;
5021 sets[i].src_volatile = 1;
5027 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5029 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5031 /* One less use of the label this insn used to jump to. */
5032 delete_insn_and_edges (insn);
5033 cse_jumps_altered = true;
5034 /* No more processing for this set. */
5038 /* If this SET is now setting PC to a label, we know it used to
5039 be a conditional or computed branch. */
5040 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5041 && !LABEL_REF_NONLOCAL_P (src))
5043 /* We reemit the jump in as many cases as possible just in
5044 case the form of an unconditional jump is significantly
5045 different than a computed jump or conditional jump.
5047 If this insn has multiple sets, then reemitting the
5048 jump is nontrivial. So instead we just force rerecognition
5049 and hope for the best. */
5054 new_rtx = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5055 JUMP_LABEL (new_rtx) = XEXP (src, 0);
5056 LABEL_NUSES (XEXP (src, 0))++;
5058 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5059 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5062 XEXP (note, 1) = NULL_RTX;
5063 REG_NOTES (new_rtx) = note;
5066 delete_insn_and_edges (insn);
5070 INSN_CODE (insn) = -1;
5072 /* Do not bother deleting any unreachable code, let jump do it. */
5073 cse_jumps_altered = true;
5077 /* If destination is volatile, invalidate it and then do no further
5078 processing for this assignment. */
5080 else if (do_not_record)
5082 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5083 invalidate (dest, VOIDmode);
5084 else if (MEM_P (dest))
5085 invalidate (dest, VOIDmode);
5086 else if (GET_CODE (dest) == STRICT_LOW_PART
5087 || GET_CODE (dest) == ZERO_EXTRACT)
5088 invalidate (XEXP (dest, 0), GET_MODE (dest));
5092 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5093 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5096 /* If setting CC0, record what it was set to, or a constant, if it
5097 is equivalent to a constant. If it is being set to a floating-point
5098 value, make a COMPARE with the appropriate constant of 0. If we
5099 don't do this, later code can interpret this as a test against
5100 const0_rtx, which can cause problems if we try to put it into an
5101 insn as a floating-point operand. */
5102 if (dest == cc0_rtx)
5104 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5105 this_insn_cc0_mode = mode;
5106 if (FLOAT_MODE_P (mode))
5107 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5113 /* Now enter all non-volatile source expressions in the hash table
5114 if they are not already present.
5115 Record their equivalence classes in src_elt.
5116 This way we can insert the corresponding destinations into
5117 the same classes even if the actual sources are no longer in them
5118 (having been invalidated). */
5120 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5121 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5123 struct table_elt *elt;
5124 struct table_elt *classp = sets[0].src_elt;
5125 rtx dest = SET_DEST (sets[0].rtl);
5126 enum machine_mode eqvmode = GET_MODE (dest);
5128 if (GET_CODE (dest) == STRICT_LOW_PART)
5130 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5133 if (insert_regs (src_eqv, classp, 0))
5135 rehash_using_reg (src_eqv);
5136 src_eqv_hash = HASH (src_eqv, eqvmode);
5138 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5139 elt->in_memory = src_eqv_in_memory;
5142 /* Check to see if src_eqv_elt is the same as a set source which
5143 does not yet have an elt, and if so set the elt of the set source
5145 for (i = 0; i < n_sets; i++)
5146 if (sets[i].rtl && sets[i].src_elt == 0
5147 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5148 sets[i].src_elt = src_eqv_elt;
5151 for (i = 0; i < n_sets; i++)
5152 if (sets[i].rtl && ! sets[i].src_volatile
5153 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5155 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5157 /* REG_EQUAL in setting a STRICT_LOW_PART
5158 gives an equivalent for the entire destination register,
5159 not just for the subreg being stored in now.
5160 This is a more interesting equivalence, so we arrange later
5161 to treat the entire reg as the destination. */
5162 sets[i].src_elt = src_eqv_elt;
5163 sets[i].src_hash = src_eqv_hash;
5167 /* Insert source and constant equivalent into hash table, if not
5169 struct table_elt *classp = src_eqv_elt;
5170 rtx src = sets[i].src;
5171 rtx dest = SET_DEST (sets[i].rtl);
5172 enum machine_mode mode
5173 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5175 /* It's possible that we have a source value known to be
5176 constant but don't have a REG_EQUAL note on the insn.
5177 Lack of a note will mean src_eqv_elt will be NULL. This
5178 can happen where we've generated a SUBREG to access a
5179 CONST_INT that is already in a register in a wider mode.
5180 Ensure that the source expression is put in the proper
5183 classp = sets[i].src_const_elt;
5185 if (sets[i].src_elt == 0)
5187 struct table_elt *elt;
5189 /* Note that these insert_regs calls cannot remove
5190 any of the src_elt's, because they would have failed to
5191 match if not still valid. */
5192 if (insert_regs (src, classp, 0))
5194 rehash_using_reg (src);
5195 sets[i].src_hash = HASH (src, mode);
5197 elt = insert (src, classp, sets[i].src_hash, mode);
5198 elt->in_memory = sets[i].src_in_memory;
5199 sets[i].src_elt = classp = elt;
5201 if (sets[i].src_const && sets[i].src_const_elt == 0
5202 && src != sets[i].src_const
5203 && ! rtx_equal_p (sets[i].src_const, src))
5204 sets[i].src_elt = insert (sets[i].src_const, classp,
5205 sets[i].src_const_hash, mode);
5208 else if (sets[i].src_elt == 0)
5209 /* If we did not insert the source into the hash table (e.g., it was
5210 volatile), note the equivalence class for the REG_EQUAL value, if any,
5211 so that the destination goes into that class. */
5212 sets[i].src_elt = src_eqv_elt;
5214 /* Record destination addresses in the hash table. This allows us to
5215 check if they are invalidated by other sets. */
5216 for (i = 0; i < n_sets; i++)
5220 rtx x = sets[i].inner_dest;
5221 struct table_elt *elt;
5222 enum machine_mode mode;
5228 mode = GET_MODE (x);
5229 hash = HASH (x, mode);
5230 elt = lookup (x, hash, mode);
5233 if (insert_regs (x, NULL, 0))
5235 rtx dest = SET_DEST (sets[i].rtl);
5237 rehash_using_reg (x);
5238 hash = HASH (x, mode);
5239 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5241 elt = insert (x, NULL, hash, mode);
5244 sets[i].dest_addr_elt = elt;
5247 sets[i].dest_addr_elt = NULL;
5251 invalidate_from_clobbers (x);
5253 /* Some registers are invalidated by subroutine calls. Memory is
5254 invalidated by non-constant calls. */
5258 if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5259 invalidate_memory ();
5260 invalidate_for_call ();
5263 /* Now invalidate everything set by this instruction.
5264 If a SUBREG or other funny destination is being set,
5265 sets[i].rtl is still nonzero, so here we invalidate the reg
5266 a part of which is being set. */
5268 for (i = 0; i < n_sets; i++)
5271 /* We can't use the inner dest, because the mode associated with
5272 a ZERO_EXTRACT is significant. */
5273 rtx dest = SET_DEST (sets[i].rtl);
5275 /* Needed for registers to remove the register from its
5276 previous quantity's chain.
5277 Needed for memory if this is a nonvarying address, unless
5278 we have just done an invalidate_memory that covers even those. */
5279 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5280 invalidate (dest, VOIDmode);
5281 else if (MEM_P (dest))
5282 invalidate (dest, VOIDmode);
5283 else if (GET_CODE (dest) == STRICT_LOW_PART
5284 || GET_CODE (dest) == ZERO_EXTRACT)
5285 invalidate (XEXP (dest, 0), GET_MODE (dest));
5288 /* A volatile ASM invalidates everything. */
5289 if (NONJUMP_INSN_P (insn)
5290 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5291 && MEM_VOLATILE_P (PATTERN (insn)))
5292 flush_hash_table ();
5294 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5295 the regs restored by the longjmp come from a later time
5297 if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5299 flush_hash_table ();
5303 /* Make sure registers mentioned in destinations
5304 are safe for use in an expression to be inserted.
5305 This removes from the hash table
5306 any invalid entry that refers to one of these registers.
5308 We don't care about the return value from mention_regs because
5309 we are going to hash the SET_DEST values unconditionally. */
5311 for (i = 0; i < n_sets; i++)
5315 rtx x = SET_DEST (sets[i].rtl);
5321 /* We used to rely on all references to a register becoming
5322 inaccessible when a register changes to a new quantity,
5323 since that changes the hash code. However, that is not
5324 safe, since after HASH_SIZE new quantities we get a
5325 hash 'collision' of a register with its own invalid
5326 entries. And since SUBREGs have been changed not to
5327 change their hash code with the hash code of the register,
5328 it wouldn't work any longer at all. So we have to check
5329 for any invalid references lying around now.
5330 This code is similar to the REG case in mention_regs,
5331 but it knows that reg_tick has been incremented, and
5332 it leaves reg_in_table as -1 . */
5333 unsigned int regno = REGNO (x);
5334 unsigned int endregno = END_REGNO (x);
5337 for (i = regno; i < endregno; i++)
5339 if (REG_IN_TABLE (i) >= 0)
5341 remove_invalid_refs (i);
5342 REG_IN_TABLE (i) = -1;
5349 /* We may have just removed some of the src_elt's from the hash table.
5350 So replace each one with the current head of the same class.
5351 Also check if destination addresses have been removed. */
5353 for (i = 0; i < n_sets; i++)
5356 if (sets[i].dest_addr_elt
5357 && sets[i].dest_addr_elt->first_same_value == 0)
5359 /* The elt was removed, which means this destination is not
5360 valid after this instruction. */
5361 sets[i].rtl = NULL_RTX;
5363 else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5364 /* If elt was removed, find current head of same class,
5365 or 0 if nothing remains of that class. */
5367 struct table_elt *elt = sets[i].src_elt;
5369 while (elt && elt->prev_same_value)
5370 elt = elt->prev_same_value;
5372 while (elt && elt->first_same_value == 0)
5373 elt = elt->next_same_value;
5374 sets[i].src_elt = elt ? elt->first_same_value : 0;
5378 /* Now insert the destinations into their equivalence classes. */
5380 for (i = 0; i < n_sets; i++)
5383 rtx dest = SET_DEST (sets[i].rtl);
5384 struct table_elt *elt;
5386 /* Don't record value if we are not supposed to risk allocating
5387 floating-point values in registers that might be wider than
5389 if ((flag_float_store
5391 && FLOAT_MODE_P (GET_MODE (dest)))
5392 /* Don't record BLKmode values, because we don't know the
5393 size of it, and can't be sure that other BLKmode values
5394 have the same or smaller size. */
5395 || GET_MODE (dest) == BLKmode
5396 /* If we didn't put a REG_EQUAL value or a source into the hash
5397 table, there is no point is recording DEST. */
5398 || sets[i].src_elt == 0
5399 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5400 or SIGN_EXTEND, don't record DEST since it can cause
5401 some tracking to be wrong.
5403 ??? Think about this more later. */
5404 || (GET_CODE (dest) == SUBREG
5405 && (GET_MODE_SIZE (GET_MODE (dest))
5406 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5407 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5408 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5411 /* STRICT_LOW_PART isn't part of the value BEING set,
5412 and neither is the SUBREG inside it.
5413 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5414 if (GET_CODE (dest) == STRICT_LOW_PART)
5415 dest = SUBREG_REG (XEXP (dest, 0));
5417 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5418 /* Registers must also be inserted into chains for quantities. */
5419 if (insert_regs (dest, sets[i].src_elt, 1))
5421 /* If `insert_regs' changes something, the hash code must be
5423 rehash_using_reg (dest);
5424 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5427 elt = insert (dest, sets[i].src_elt,
5428 sets[i].dest_hash, GET_MODE (dest));
5430 elt->in_memory = (MEM_P (sets[i].inner_dest)
5431 && !MEM_READONLY_P (sets[i].inner_dest));
5433 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5434 narrower than M2, and both M1 and M2 are the same number of words,
5435 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5436 make that equivalence as well.
5438 However, BAR may have equivalences for which gen_lowpart
5439 will produce a simpler value than gen_lowpart applied to
5440 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5441 BAR's equivalences. If we don't get a simplified form, make
5442 the SUBREG. It will not be used in an equivalence, but will
5443 cause two similar assignments to be detected.
5445 Note the loop below will find SUBREG_REG (DEST) since we have
5446 already entered SRC and DEST of the SET in the table. */
5448 if (GET_CODE (dest) == SUBREG
5449 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5451 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
5452 && (GET_MODE_SIZE (GET_MODE (dest))
5453 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5454 && sets[i].src_elt != 0)
5456 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5457 struct table_elt *elt, *classp = 0;
5459 for (elt = sets[i].src_elt->first_same_value; elt;
5460 elt = elt->next_same_value)
5464 struct table_elt *src_elt;
5467 /* Ignore invalid entries. */
5468 if (!REG_P (elt->exp)
5469 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5472 /* We may have already been playing subreg games. If the
5473 mode is already correct for the destination, use it. */
5474 if (GET_MODE (elt->exp) == new_mode)
5478 /* Calculate big endian correction for the SUBREG_BYTE.
5479 We have already checked that M1 (GET_MODE (dest))
5480 is not narrower than M2 (new_mode). */
5481 if (BYTES_BIG_ENDIAN)
5482 byte = (GET_MODE_SIZE (GET_MODE (dest))
5483 - GET_MODE_SIZE (new_mode));
5485 new_src = simplify_gen_subreg (new_mode, elt->exp,
5486 GET_MODE (dest), byte);
5489 /* The call to simplify_gen_subreg fails if the value
5490 is VOIDmode, yet we can't do any simplification, e.g.
5491 for EXPR_LISTs denoting function call results.
5492 It is invalid to construct a SUBREG with a VOIDmode
5493 SUBREG_REG, hence a zero new_src means we can't do
5494 this substitution. */
5498 src_hash = HASH (new_src, new_mode);
5499 src_elt = lookup (new_src, src_hash, new_mode);
5501 /* Put the new source in the hash table is if isn't
5505 if (insert_regs (new_src, classp, 0))
5507 rehash_using_reg (new_src);
5508 src_hash = HASH (new_src, new_mode);
5510 src_elt = insert (new_src, classp, src_hash, new_mode);
5511 src_elt->in_memory = elt->in_memory;
5513 else if (classp && classp != src_elt->first_same_value)
5514 /* Show that two things that we've seen before are
5515 actually the same. */
5516 merge_equiv_classes (src_elt, classp);
5518 classp = src_elt->first_same_value;
5519 /* Ignore invalid entries. */
5521 && !REG_P (classp->exp)
5522 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
5523 classp = classp->next_same_value;
5528 /* Special handling for (set REG0 REG1) where REG0 is the
5529 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5530 be used in the sequel, so (if easily done) change this insn to
5531 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5532 that computed their value. Then REG1 will become a dead store
5533 and won't cloud the situation for later optimizations.
5535 Do not make this change if REG1 is a hard register, because it will
5536 then be used in the sequel and we may be changing a two-operand insn
5537 into a three-operand insn.
5539 Also do not do this if we are operating on a copy of INSN. */
5541 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
5542 && NEXT_INSN (PREV_INSN (insn)) == insn
5543 && REG_P (SET_SRC (sets[0].rtl))
5544 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5545 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
5547 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
5548 struct qty_table_elem *src_ent = &qty_table[src_q];
5550 if (src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
5552 /* Scan for the previous nonnote insn, but stop at a basic
5555 rtx bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
5558 prev = PREV_INSN (prev);
5560 while (prev != bb_head && NOTE_P (prev));
5562 /* Do not swap the registers around if the previous instruction
5563 attaches a REG_EQUIV note to REG1.
5565 ??? It's not entirely clear whether we can transfer a REG_EQUIV
5566 from the pseudo that originally shadowed an incoming argument
5567 to another register. Some uses of REG_EQUIV might rely on it
5568 being attached to REG1 rather than REG2.
5570 This section previously turned the REG_EQUIV into a REG_EQUAL
5571 note. We cannot do that because REG_EQUIV may provide an
5572 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
5573 if (NONJUMP_INSN_P (prev)
5574 && GET_CODE (PATTERN (prev)) == SET
5575 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
5576 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
5578 rtx dest = SET_DEST (sets[0].rtl);
5579 rtx src = SET_SRC (sets[0].rtl);
5582 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
5583 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
5584 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
5585 apply_change_group ();
5587 /* If INSN has a REG_EQUAL note, and this note mentions
5588 REG0, then we must delete it, because the value in
5589 REG0 has changed. If the note's value is REG1, we must
5590 also delete it because that is now this insn's dest. */
5591 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5593 && (reg_mentioned_p (dest, XEXP (note, 0))
5594 || rtx_equal_p (src, XEXP (note, 0))))
5595 remove_note (insn, note);
5603 /* Remove from the hash table all expressions that reference memory. */
5606 invalidate_memory (void)
5609 struct table_elt *p, *next;
5611 for (i = 0; i < HASH_SIZE; i++)
5612 for (p = table[i]; p; p = next)
5614 next = p->next_same_hash;
5616 remove_from_table (p, i);
5620 /* Perform invalidation on the basis of everything about an insn
5621 except for invalidating the actual places that are SET in it.
5622 This includes the places CLOBBERed, and anything that might
5623 alias with something that is SET or CLOBBERed.
5625 X is the pattern of the insn. */
5628 invalidate_from_clobbers (rtx x)
5630 if (GET_CODE (x) == CLOBBER)
5632 rtx ref = XEXP (x, 0);
5635 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5637 invalidate (ref, VOIDmode);
5638 else if (GET_CODE (ref) == STRICT_LOW_PART
5639 || GET_CODE (ref) == ZERO_EXTRACT)
5640 invalidate (XEXP (ref, 0), GET_MODE (ref));
5643 else if (GET_CODE (x) == PARALLEL)
5646 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
5648 rtx y = XVECEXP (x, 0, i);
5649 if (GET_CODE (y) == CLOBBER)
5651 rtx ref = XEXP (y, 0);
5652 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5654 invalidate (ref, VOIDmode);
5655 else if (GET_CODE (ref) == STRICT_LOW_PART
5656 || GET_CODE (ref) == ZERO_EXTRACT)
5657 invalidate (XEXP (ref, 0), GET_MODE (ref));
5663 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
5664 and replace any registers in them with either an equivalent constant
5665 or the canonical form of the register. If we are inside an address,
5666 only do this if the address remains valid.
5668 OBJECT is 0 except when within a MEM in which case it is the MEM.
5670 Return the replacement for X. */
5673 cse_process_notes_1 (rtx x, rtx object, bool *changed)
5675 enum rtx_code code = GET_CODE (x);
5676 const char *fmt = GET_RTX_FORMAT (code);
5694 validate_change (x, &XEXP (x, 0),
5695 cse_process_notes (XEXP (x, 0), x, changed), 0);
5700 if (REG_NOTE_KIND (x) == REG_EQUAL)
5701 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed);
5703 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed);
5710 rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed);
5711 /* We don't substitute VOIDmode constants into these rtx,
5712 since they would impede folding. */
5713 if (GET_MODE (new_rtx) != VOIDmode)
5714 validate_change (object, &XEXP (x, 0), new_rtx, 0);
5719 i = REG_QTY (REGNO (x));
5721 /* Return a constant or a constant register. */
5722 if (REGNO_QTY_VALID_P (REGNO (x)))
5724 struct qty_table_elem *ent = &qty_table[i];
5726 if (ent->const_rtx != NULL_RTX
5727 && (CONSTANT_P (ent->const_rtx)
5728 || REG_P (ent->const_rtx)))
5730 rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
5732 return copy_rtx (new_rtx);
5736 /* Otherwise, canonicalize this register. */
5737 return canon_reg (x, NULL_RTX);
5743 for (i = 0; i < GET_RTX_LENGTH (code); i++)
5745 validate_change (object, &XEXP (x, i),
5746 cse_process_notes (XEXP (x, i), object, changed), 0);
5752 cse_process_notes (rtx x, rtx object, bool *changed)
5754 rtx new_rtx = cse_process_notes_1 (x, object, changed);
5761 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
5763 DATA is a pointer to a struct cse_basic_block_data, that is used to
5765 It is filled with a queue of basic blocks, starting with FIRST_BB
5766 and following a trace through the CFG.
5768 If all paths starting at FIRST_BB have been followed, or no new path
5769 starting at FIRST_BB can be constructed, this function returns FALSE.
5770 Otherwise, DATA->path is filled and the function returns TRUE indicating
5771 that a path to follow was found.
5773 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
5774 block in the path will be FIRST_BB. */
5777 cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
5784 SET_BIT (cse_visited_basic_blocks, first_bb->index);
5786 /* See if there is a previous path. */
5787 path_size = data->path_size;
5789 /* There is a previous path. Make sure it started with FIRST_BB. */
5791 gcc_assert (data->path[0].bb == first_bb);
5793 /* There was only one basic block in the last path. Clear the path and
5794 return, so that paths starting at another basic block can be tried. */
5801 /* If the path was empty from the beginning, construct a new path. */
5803 data->path[path_size++].bb = first_bb;
5806 /* Otherwise, path_size must be equal to or greater than 2, because
5807 a previous path exists that is at least two basic blocks long.
5809 Update the previous branch path, if any. If the last branch was
5810 previously along the branch edge, take the fallthrough edge now. */
5811 while (path_size >= 2)
5813 basic_block last_bb_in_path, previous_bb_in_path;
5817 last_bb_in_path = data->path[path_size].bb;
5818 previous_bb_in_path = data->path[path_size - 1].bb;
5820 /* If we previously followed a path along the branch edge, try
5821 the fallthru edge now. */
5822 if (EDGE_COUNT (previous_bb_in_path->succs) == 2
5823 && any_condjump_p (BB_END (previous_bb_in_path))
5824 && (e = find_edge (previous_bb_in_path, last_bb_in_path))
5825 && e == BRANCH_EDGE (previous_bb_in_path))
5827 bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
5828 if (bb != EXIT_BLOCK_PTR
5829 && single_pred_p (bb)
5830 /* We used to assert here that we would only see blocks
5831 that we have not visited yet. But we may end up
5832 visiting basic blocks twice if the CFG has changed
5833 in this run of cse_main, because when the CFG changes
5834 the topological sort of the CFG also changes. A basic
5835 blocks that previously had more than two predecessors
5836 may now have a single predecessor, and become part of
5837 a path that starts at another basic block.
5839 We still want to visit each basic block only once, so
5840 halt the path here if we have already visited BB. */
5841 && !TEST_BIT (cse_visited_basic_blocks, bb->index))
5843 SET_BIT (cse_visited_basic_blocks, bb->index);
5844 data->path[path_size++].bb = bb;
5849 data->path[path_size].bb = NULL;
5852 /* If only one block remains in the path, bail. */
5860 /* Extend the path if possible. */
5863 bb = data->path[path_size - 1].bb;
5864 while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH))
5866 if (single_succ_p (bb))
5867 e = single_succ_edge (bb);
5868 else if (EDGE_COUNT (bb->succs) == 2
5869 && any_condjump_p (BB_END (bb)))
5871 /* First try to follow the branch. If that doesn't lead
5872 to a useful path, follow the fallthru edge. */
5873 e = BRANCH_EDGE (bb);
5874 if (!single_pred_p (e->dest))
5875 e = FALLTHRU_EDGE (bb);
5880 if (e && e->dest != EXIT_BLOCK_PTR
5881 && single_pred_p (e->dest)
5882 /* Avoid visiting basic blocks twice. The large comment
5883 above explains why this can happen. */
5884 && !TEST_BIT (cse_visited_basic_blocks, e->dest->index))
5886 basic_block bb2 = e->dest;
5887 SET_BIT (cse_visited_basic_blocks, bb2->index);
5888 data->path[path_size++].bb = bb2;
5897 data->path_size = path_size;
5898 return path_size != 0;
5901 /* Dump the path in DATA to file F. NSETS is the number of sets
5905 cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
5909 fprintf (f, ";; Following path with %d sets: ", nsets);
5910 for (path_entry = 0; path_entry < data->path_size; path_entry++)
5911 fprintf (f, "%d ", (data->path[path_entry].bb)->index);
5912 fputc ('\n', dump_file);
5917 /* Return true if BB has exception handling successor edges. */
5920 have_eh_succ_edges (basic_block bb)
5925 FOR_EACH_EDGE (e, ei, bb->succs)
5926 if (e->flags & EDGE_EH)
5933 /* Scan to the end of the path described by DATA. Return an estimate of
5934 the total number of SETs of all insns in the path. */
5937 cse_prescan_path (struct cse_basic_block_data *data)
5940 int path_size = data->path_size;
5943 /* Scan to end of each basic block in the path. */
5944 for (path_entry = 0; path_entry < path_size; path_entry++)
5949 bb = data->path[path_entry].bb;
5951 FOR_BB_INSNS (bb, insn)
5956 /* A PARALLEL can have lots of SETs in it,
5957 especially if it is really an ASM_OPERANDS. */
5958 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5959 nsets += XVECLEN (PATTERN (insn), 0);
5965 data->nsets = nsets;
5968 /* Process a single extended basic block described by EBB_DATA. */
5971 cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
5973 int path_size = ebb_data->path_size;
5977 /* Allocate the space needed by qty_table. */
5978 qty_table = XNEWVEC (struct qty_table_elem, max_qty);
5981 cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
5982 cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
5983 for (path_entry = 0; path_entry < path_size; path_entry++)
5988 bb = ebb_data->path[path_entry].bb;
5990 /* Invalidate recorded information for eh regs if there is an EH
5991 edge pointing to that bb. */
5992 if (bb_has_eh_pred (bb))
5994 struct df_ref **def_rec;
5996 for (def_rec = df_get_artificial_defs (bb->index); *def_rec; def_rec++)
5998 struct df_ref *def = *def_rec;
5999 if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6000 invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6004 FOR_BB_INSNS (bb, insn)
6006 optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6007 /* If we have processed 1,000 insns, flush the hash table to
6008 avoid extreme quadratic behavior. We must not include NOTEs
6009 in the count since there may be more of them when generating
6010 debugging information. If we clear the table at different
6011 times, code generated with -g -O might be different than code
6012 generated with -O but not -g.
6014 FIXME: This is a real kludge and needs to be done some other
6017 && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS))
6019 flush_hash_table ();
6025 /* Process notes first so we have all notes in canonical forms
6026 when looking for duplicate operations. */
6027 if (REG_NOTES (insn))
6029 bool changed = false;
6030 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn),
6031 NULL_RTX, &changed);
6033 df_notes_rescan (insn);
6038 /* If we haven't already found an insn where we added a LABEL_REF,
6040 if (INSN_P (insn) && !recorded_label_ref
6041 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
6043 recorded_label_ref = true;
6046 /* If the previous insn set CC0 and this insn no longer
6047 references CC0, delete the previous insn. Here we use
6048 fact that nothing expects CC0 to be valid over an insn,
6049 which is true until the final pass. */
6053 prev_insn = PREV_INSN (insn);
6054 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6055 && (tem = single_set (prev_insn)) != 0
6056 && SET_DEST (tem) == cc0_rtx
6057 && ! reg_mentioned_p (cc0_rtx, PATTERN (insn)))
6058 delete_insn (prev_insn);
6061 /* If this insn is not the last insn in the basic block,
6062 it will be PREV_INSN(insn) in the next iteration. If
6063 we recorded any CC0-related information for this insn,
6065 if (insn != BB_END (bb))
6067 prev_insn_cc0 = this_insn_cc0;
6068 prev_insn_cc0_mode = this_insn_cc0_mode;
6074 /* With non-call exceptions, we are not always able to update
6075 the CFG properly inside cse_insn. So clean up possibly
6076 redundant EH edges here. */
6077 if (flag_non_call_exceptions && have_eh_succ_edges (bb))
6078 cse_cfg_altered |= purge_dead_edges (bb);
6080 /* If we changed a conditional jump, we may have terminated
6081 the path we are following. Check that by verifying that
6082 the edge we would take still exists. If the edge does
6083 not exist anymore, purge the remainder of the path.
6084 Note that this will cause us to return to the caller. */
6085 if (path_entry < path_size - 1)
6087 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6088 if (!find_edge (bb, next_bb))
6094 /* If we truncate the path, we must also reset the
6095 visited bit on the remaining blocks in the path,
6096 or we will never visit them at all. */
6097 RESET_BIT (cse_visited_basic_blocks,
6098 ebb_data->path[path_size].bb->index);
6099 ebb_data->path[path_size].bb = NULL;
6101 while (path_size - 1 != path_entry);
6102 ebb_data->path_size = path_size;
6106 /* If this is a conditional jump insn, record any known
6107 equivalences due to the condition being tested. */
6109 if (path_entry < path_size - 1
6111 && single_set (insn)
6112 && any_condjump_p (insn))
6114 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6115 bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6116 record_jump_equiv (insn, taken);
6120 /* Clear the CC0-tracking related insns, they can't provide
6121 useful information across basic block boundaries. */
6126 gcc_assert (next_qty <= max_qty);
6132 /* Perform cse on the instructions of a function.
6133 F is the first instruction.
6134 NREGS is one plus the highest pseudo-reg number used in the instruction.
6136 Return 2 if jump optimizations should be redone due to simplifications
6137 in conditional jump instructions.
6138 Return 1 if the CFG should be cleaned up because it has been modified.
6139 Return 0 otherwise. */
6142 cse_main (rtx f ATTRIBUTE_UNUSED, int nregs)
6144 struct cse_basic_block_data ebb_data;
6146 int *rc_order = XNEWVEC (int, last_basic_block);
6149 df_set_flags (DF_LR_RUN_DCE);
6151 df_set_flags (DF_DEFER_INSN_RESCAN);
6153 reg_scan (get_insns (), max_reg_num ());
6154 init_cse_reg_info (nregs);
6156 ebb_data.path = XNEWVEC (struct branch_path,
6157 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6159 cse_cfg_altered = false;
6160 cse_jumps_altered = false;
6161 recorded_label_ref = false;
6162 constant_pool_entries_cost = 0;
6163 constant_pool_entries_regcost = 0;
6164 ebb_data.path_size = 0;
6166 rtl_hooks = cse_rtl_hooks;
6169 init_alias_analysis ();
6171 reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6173 /* Set up the table of already visited basic blocks. */
6174 cse_visited_basic_blocks = sbitmap_alloc (last_basic_block);
6175 sbitmap_zero (cse_visited_basic_blocks);
6177 /* Loop over basic blocks in reverse completion order (RPO),
6178 excluding the ENTRY and EXIT blocks. */
6179 n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6181 while (i < n_blocks)
6183 /* Find the first block in the RPO queue that we have not yet
6184 processed before. */
6187 bb = BASIC_BLOCK (rc_order[i++]);
6189 while (TEST_BIT (cse_visited_basic_blocks, bb->index)
6192 /* Find all paths starting with BB, and process them. */
6193 while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6195 /* Pre-scan the path. */
6196 cse_prescan_path (&ebb_data);
6198 /* If this basic block has no sets, skip it. */
6199 if (ebb_data.nsets == 0)
6202 /* Get a reasonable estimate for the maximum number of qty's
6203 needed for this path. For this, we take the number of sets
6204 and multiply that by MAX_RECOG_OPERANDS. */
6205 max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6207 /* Dump the path we're about to process. */
6209 cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6211 cse_extended_basic_block (&ebb_data);
6216 end_alias_analysis ();
6217 free (reg_eqv_table);
6218 free (ebb_data.path);
6219 sbitmap_free (cse_visited_basic_blocks);
6221 rtl_hooks = general_rtl_hooks;
6223 if (cse_jumps_altered || recorded_label_ref)
6225 else if (cse_cfg_altered)
6231 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for
6232 which there isn't a REG_LABEL_OPERAND note.
6233 Return one if so. DATA is the insn. */
6236 check_for_label_ref (rtx *rtl, void *data)
6238 rtx insn = (rtx) data;
6240 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6241 note for it, we must rerun jump since it needs to place the note. If
6242 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6243 don't do this since no REG_LABEL_OPERAND will be added. */
6244 return (GET_CODE (*rtl) == LABEL_REF
6245 && ! LABEL_REF_NONLOCAL_P (*rtl)
6247 || !label_is_jump_target_p (XEXP (*rtl, 0), insn))
6248 && LABEL_P (XEXP (*rtl, 0))
6249 && INSN_UID (XEXP (*rtl, 0)) != 0
6250 && ! find_reg_note (insn, REG_LABEL_OPERAND, XEXP (*rtl, 0)));
6253 /* Count the number of times registers are used (not set) in X.
6254 COUNTS is an array in which we accumulate the count, INCR is how much
6255 we count each register usage.
6257 Don't count a usage of DEST, which is the SET_DEST of a SET which
6258 contains X in its SET_SRC. This is because such a SET does not
6259 modify the liveness of DEST.
6260 DEST is set to pc_rtx for a trapping insn, which means that we must count
6261 uses of a SET_DEST regardless because the insn can't be deleted here. */
6264 count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6274 switch (code = GET_CODE (x))
6278 counts[REGNO (x)] += incr;
6293 /* If we are clobbering a MEM, mark any registers inside the address
6295 if (MEM_P (XEXP (x, 0)))
6296 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6300 /* Unless we are setting a REG, count everything in SET_DEST. */
6301 if (!REG_P (SET_DEST (x)))
6302 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6303 count_reg_usage (SET_SRC (x), counts,
6304 dest ? dest : SET_DEST (x),
6311 /* We expect dest to be NULL_RTX here. If the insn may trap, mark
6312 this fact by setting DEST to pc_rtx. */
6313 if (flag_non_call_exceptions && may_trap_p (PATTERN (x)))
6315 if (code == CALL_INSN)
6316 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6317 count_reg_usage (PATTERN (x), counts, dest, incr);
6319 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6322 note = find_reg_equal_equiv_note (x);
6325 rtx eqv = XEXP (note, 0);
6327 if (GET_CODE (eqv) == EXPR_LIST)
6328 /* This REG_EQUAL note describes the result of a function call.
6329 Process all the arguments. */
6332 count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6333 eqv = XEXP (eqv, 1);
6335 while (eqv && GET_CODE (eqv) == EXPR_LIST);
6337 count_reg_usage (eqv, counts, dest, incr);
6342 if (REG_NOTE_KIND (x) == REG_EQUAL
6343 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6344 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6345 involving registers in the address. */
6346 || GET_CODE (XEXP (x, 0)) == CLOBBER)
6347 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6349 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6353 /* If the asm is volatile, then this insn cannot be deleted,
6354 and so the inputs *must* be live. */
6355 if (MEM_VOLATILE_P (x))
6357 /* Iterate over just the inputs, not the constraints as well. */
6358 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6359 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6369 fmt = GET_RTX_FORMAT (code);
6370 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6373 count_reg_usage (XEXP (x, i), counts, dest, incr);
6374 else if (fmt[i] == 'E')
6375 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6376 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6380 /* Return true if set is live. */
6382 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
6389 if (set_noop_p (set))
6393 else if (GET_CODE (SET_DEST (set)) == CC0
6394 && !side_effects_p (SET_SRC (set))
6395 && ((tem = next_nonnote_insn (insn)) == 0
6397 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
6400 else if (!REG_P (SET_DEST (set))
6401 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
6402 || counts[REGNO (SET_DEST (set))] != 0
6403 || side_effects_p (SET_SRC (set)))
6408 /* Return true if insn is live. */
6411 insn_live_p (rtx insn, int *counts)
6414 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
6416 else if (GET_CODE (PATTERN (insn)) == SET)
6417 return set_live_p (PATTERN (insn), insn, counts);
6418 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6420 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6422 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6424 if (GET_CODE (elt) == SET)
6426 if (set_live_p (elt, insn, counts))
6429 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6438 /* Scan all the insns and delete any that are dead; i.e., they store a register
6439 that is never used or they copy a register to itself.
6441 This is used to remove insns made obviously dead by cse, loop or other
6442 optimizations. It improves the heuristics in loop since it won't try to
6443 move dead invariants out of loops or make givs for dead quantities. The
6444 remaining passes of the compilation are also sped up. */
6447 delete_trivially_dead_insns (rtx insns, int nreg)
6453 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
6454 /* First count the number of times each register is used. */
6455 counts = XCNEWVEC (int, nreg);
6456 for (insn = insns; insn; insn = NEXT_INSN (insn))
6458 count_reg_usage (insn, counts, NULL_RTX, 1);
6460 /* Go from the last insn to the first and delete insns that only set unused
6461 registers or copy a register to itself. As we delete an insn, remove
6462 usage counts for registers it uses.
6464 The first jump optimization pass may leave a real insn as the last
6465 insn in the function. We must not skip that insn or we may end
6466 up deleting code that is not really dead. */
6467 for (insn = get_last_insn (); insn; insn = prev)
6471 prev = PREV_INSN (insn);
6475 live_insn = insn_live_p (insn, counts);
6477 /* If this is a dead insn, delete it and show registers in it aren't
6480 if (! live_insn && dbg_cnt (delete_trivial_dead))
6482 count_reg_usage (insn, counts, NULL_RTX, -1);
6483 delete_insn_and_edges (insn);
6488 if (dump_file && ndead)
6489 fprintf (dump_file, "Deleted %i trivially dead insns\n",
6493 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
6497 /* This function is called via for_each_rtx. The argument, NEWREG, is
6498 a condition code register with the desired mode. If we are looking
6499 at the same register in a different mode, replace it with
6503 cse_change_cc_mode (rtx *loc, void *data)
6505 struct change_cc_mode_args* args = (struct change_cc_mode_args*)data;
6509 && REGNO (*loc) == REGNO (args->newreg)
6510 && GET_MODE (*loc) != GET_MODE (args->newreg))
6512 validate_change (args->insn, loc, args->newreg, 1);
6519 /* Change the mode of any reference to the register REGNO (NEWREG) to
6520 GET_MODE (NEWREG) in INSN. */
6523 cse_change_cc_mode_insn (rtx insn, rtx newreg)
6525 struct change_cc_mode_args args;
6532 args.newreg = newreg;
6534 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args);
6535 for_each_rtx (®_NOTES (insn), cse_change_cc_mode, &args);
6537 /* If the following assertion was triggered, there is most probably
6538 something wrong with the cc_modes_compatible back end function.
6539 CC modes only can be considered compatible if the insn - with the mode
6540 replaced by any of the compatible modes - can still be recognized. */
6541 success = apply_change_group ();
6542 gcc_assert (success);
6545 /* Change the mode of any reference to the register REGNO (NEWREG) to
6546 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
6547 any instruction which modifies NEWREG. */
6550 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
6554 for (insn = start; insn != end; insn = NEXT_INSN (insn))
6556 if (! INSN_P (insn))
6559 if (reg_set_p (newreg, insn))
6562 cse_change_cc_mode_insn (insn, newreg);
6566 /* BB is a basic block which finishes with CC_REG as a condition code
6567 register which is set to CC_SRC. Look through the successors of BB
6568 to find blocks which have a single predecessor (i.e., this one),
6569 and look through those blocks for an assignment to CC_REG which is
6570 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
6571 permitted to change the mode of CC_SRC to a compatible mode. This
6572 returns VOIDmode if no equivalent assignments were found.
6573 Otherwise it returns the mode which CC_SRC should wind up with.
6575 The main complexity in this function is handling the mode issues.
6576 We may have more than one duplicate which we can eliminate, and we
6577 try to find a mode which will work for multiple duplicates. */
6579 static enum machine_mode
6580 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
6583 enum machine_mode mode;
6584 unsigned int insn_count;
6587 enum machine_mode modes[2];
6593 /* We expect to have two successors. Look at both before picking
6594 the final mode for the comparison. If we have more successors
6595 (i.e., some sort of table jump, although that seems unlikely),
6596 then we require all beyond the first two to use the same
6599 found_equiv = false;
6600 mode = GET_MODE (cc_src);
6602 FOR_EACH_EDGE (e, ei, bb->succs)
6607 if (e->flags & EDGE_COMPLEX)
6610 if (EDGE_COUNT (e->dest->preds) != 1
6611 || e->dest == EXIT_BLOCK_PTR)
6614 end = NEXT_INSN (BB_END (e->dest));
6615 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
6619 if (! INSN_P (insn))
6622 /* If CC_SRC is modified, we have to stop looking for
6623 something which uses it. */
6624 if (modified_in_p (cc_src, insn))
6627 /* Check whether INSN sets CC_REG to CC_SRC. */
6628 set = single_set (insn);
6630 && REG_P (SET_DEST (set))
6631 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
6634 enum machine_mode set_mode;
6635 enum machine_mode comp_mode;
6638 set_mode = GET_MODE (SET_SRC (set));
6639 comp_mode = set_mode;
6640 if (rtx_equal_p (cc_src, SET_SRC (set)))
6642 else if (GET_CODE (cc_src) == COMPARE
6643 && GET_CODE (SET_SRC (set)) == COMPARE
6645 && rtx_equal_p (XEXP (cc_src, 0),
6646 XEXP (SET_SRC (set), 0))
6647 && rtx_equal_p (XEXP (cc_src, 1),
6648 XEXP (SET_SRC (set), 1)))
6651 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
6652 if (comp_mode != VOIDmode
6653 && (can_change_mode || comp_mode == mode))
6660 if (insn_count < ARRAY_SIZE (insns))
6662 insns[insn_count] = insn;
6663 modes[insn_count] = set_mode;
6664 last_insns[insn_count] = end;
6667 if (mode != comp_mode)
6669 gcc_assert (can_change_mode);
6672 /* The modified insn will be re-recognized later. */
6673 PUT_MODE (cc_src, mode);
6678 if (set_mode != mode)
6680 /* We found a matching expression in the
6681 wrong mode, but we don't have room to
6682 store it in the array. Punt. This case
6686 /* INSN sets CC_REG to a value equal to CC_SRC
6687 with the right mode. We can simply delete
6692 /* We found an instruction to delete. Keep looking,
6693 in the hopes of finding a three-way jump. */
6697 /* We found an instruction which sets the condition
6698 code, so don't look any farther. */
6702 /* If INSN sets CC_REG in some other way, don't look any
6704 if (reg_set_p (cc_reg, insn))
6708 /* If we fell off the bottom of the block, we can keep looking
6709 through successors. We pass CAN_CHANGE_MODE as false because
6710 we aren't prepared to handle compatibility between the
6711 further blocks and this block. */
6714 enum machine_mode submode;
6716 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
6717 if (submode != VOIDmode)
6719 gcc_assert (submode == mode);
6721 can_change_mode = false;
6729 /* Now INSN_COUNT is the number of instructions we found which set
6730 CC_REG to a value equivalent to CC_SRC. The instructions are in
6731 INSNS. The modes used by those instructions are in MODES. */
6734 for (i = 0; i < insn_count; ++i)
6736 if (modes[i] != mode)
6738 /* We need to change the mode of CC_REG in INSNS[i] and
6739 subsequent instructions. */
6742 if (GET_MODE (cc_reg) == mode)
6745 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
6747 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
6751 delete_insn_and_edges (insns[i]);
6757 /* If we have a fixed condition code register (or two), walk through
6758 the instructions and try to eliminate duplicate assignments. */
6761 cse_condition_code_reg (void)
6763 unsigned int cc_regno_1;
6764 unsigned int cc_regno_2;
6769 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
6772 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
6773 if (cc_regno_2 != INVALID_REGNUM)
6774 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
6776 cc_reg_2 = NULL_RTX;
6785 enum machine_mode mode;
6786 enum machine_mode orig_mode;
6788 /* Look for blocks which end with a conditional jump based on a
6789 condition code register. Then look for the instruction which
6790 sets the condition code register. Then look through the
6791 successor blocks for instructions which set the condition
6792 code register to the same value. There are other possible
6793 uses of the condition code register, but these are by far the
6794 most common and the ones which we are most likely to be able
6797 last_insn = BB_END (bb);
6798 if (!JUMP_P (last_insn))
6801 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
6803 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
6808 cc_src_insn = NULL_RTX;
6810 for (insn = PREV_INSN (last_insn);
6811 insn && insn != PREV_INSN (BB_HEAD (bb));
6812 insn = PREV_INSN (insn))
6816 if (! INSN_P (insn))
6818 set = single_set (insn);
6820 && REG_P (SET_DEST (set))
6821 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
6824 cc_src = SET_SRC (set);
6827 else if (reg_set_p (cc_reg, insn))
6834 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
6837 /* Now CC_REG is a condition code register used for a
6838 conditional jump at the end of the block, and CC_SRC, in
6839 CC_SRC_INSN, is the value to which that condition code
6840 register is set, and CC_SRC is still meaningful at the end of
6843 orig_mode = GET_MODE (cc_src);
6844 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
6845 if (mode != VOIDmode)
6847 gcc_assert (mode == GET_MODE (cc_src));
6848 if (mode != orig_mode)
6850 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
6852 cse_change_cc_mode_insn (cc_src_insn, newreg);
6854 /* Do the same in the following insns that use the
6855 current value of CC_REG within BB. */
6856 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
6857 NEXT_INSN (last_insn),
6865 /* Perform common subexpression elimination. Nonzero value from
6866 `cse_main' means that jumps were simplified and some code may now
6867 be unreachable, so do jump optimization again. */
6869 gate_handle_cse (void)
6871 return optimize > 0;
6875 rest_of_handle_cse (void)
6880 dump_flow_info (dump_file, dump_flags);
6882 tem = cse_main (get_insns (), max_reg_num ());
6884 /* If we are not running more CSE passes, then we are no longer
6885 expecting CSE to be run. But always rerun it in a cheap mode. */
6886 cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
6890 timevar_push (TV_JUMP);
6891 rebuild_jump_labels (get_insns ());
6893 timevar_pop (TV_JUMP);
6895 else if (tem == 1 || optimize > 1)
6901 struct rtl_opt_pass pass_cse =
6906 gate_handle_cse, /* gate */
6907 rest_of_handle_cse, /* execute */
6910 0, /* static_pass_number */
6912 0, /* properties_required */
6913 0, /* properties_provided */
6914 0, /* properties_destroyed */
6915 0, /* todo_flags_start */
6916 TODO_df_finish | TODO_verify_rtl_sharing |
6919 TODO_verify_flow, /* todo_flags_finish */
6925 gate_handle_cse2 (void)
6927 return optimize > 0 && flag_rerun_cse_after_loop;
6930 /* Run second CSE pass after loop optimizations. */
6932 rest_of_handle_cse2 (void)
6937 dump_flow_info (dump_file, dump_flags);
6939 tem = cse_main (get_insns (), max_reg_num ());
6941 /* Run a pass to eliminate duplicated assignments to condition code
6942 registers. We have to run this after bypass_jumps, because it
6943 makes it harder for that pass to determine whether a jump can be
6945 cse_condition_code_reg ();
6947 delete_trivially_dead_insns (get_insns (), max_reg_num ());
6951 timevar_push (TV_JUMP);
6952 rebuild_jump_labels (get_insns ());
6954 timevar_pop (TV_JUMP);
6959 cse_not_expected = 1;
6964 struct rtl_opt_pass pass_cse2 =
6969 gate_handle_cse2, /* gate */
6970 rest_of_handle_cse2, /* execute */
6973 0, /* static_pass_number */
6974 TV_CSE2, /* tv_id */
6975 0, /* properties_required */
6976 0, /* properties_provided */
6977 0, /* properties_destroyed */
6978 0, /* todo_flags_start */
6979 TODO_df_finish | TODO_verify_rtl_sharing |
6982 TODO_verify_flow /* todo_flags_finish */