1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
31 #include "basic-block.h"
34 #include "insn-config.h"
45 #include "rtlhooks-def.h"
46 #include "tree-pass.h"
50 /* The basic idea of common subexpression elimination is to go
51 through the code, keeping a record of expressions that would
52 have the same value at the current scan point, and replacing
53 expressions encountered with the cheapest equivalent expression.
55 It is too complicated to keep track of the different possibilities
56 when control paths merge in this code; so, at each label, we forget all
57 that is known and start fresh. This can be described as processing each
58 extended basic block separately. We have a separate pass to perform
61 Note CSE can turn a conditional or computed jump into a nop or
62 an unconditional jump. When this occurs we arrange to run the jump
63 optimizer after CSE to delete the unreachable code.
65 We use two data structures to record the equivalent expressions:
66 a hash table for most expressions, and a vector of "quantity
67 numbers" to record equivalent (pseudo) registers.
69 The use of the special data structure for registers is desirable
70 because it is faster. It is possible because registers references
71 contain a fairly small number, the register number, taken from
72 a contiguously allocated series, and two register references are
73 identical if they have the same number. General expressions
74 do not have any such thing, so the only way to retrieve the
75 information recorded on an expression other than a register
76 is to keep it in a hash table.
78 Registers and "quantity numbers":
80 At the start of each basic block, all of the (hardware and pseudo)
81 registers used in the function are given distinct quantity
82 numbers to indicate their contents. During scan, when the code
83 copies one register into another, we copy the quantity number.
84 When a register is loaded in any other way, we allocate a new
85 quantity number to describe the value generated by this operation.
86 `REG_QTY (N)' records what quantity register N is currently thought
89 All real quantity numbers are greater than or equal to zero.
90 If register N has not been assigned a quantity, `REG_QTY (N)' will
91 equal -N - 1, which is always negative.
93 Quantity numbers below zero do not exist and none of the `qty_table'
94 entries should be referenced with a negative index.
96 We also maintain a bidirectional chain of registers for each
97 quantity number. The `qty_table` members `first_reg' and `last_reg',
98 and `reg_eqv_table' members `next' and `prev' hold these chains.
100 The first register in a chain is the one whose lifespan is least local.
101 Among equals, it is the one that was seen first.
102 We replace any equivalent register with that one.
104 If two registers have the same quantity number, it must be true that
105 REG expressions with qty_table `mode' must be in the hash table for both
106 registers and must be in the same class.
108 The converse is not true. Since hard registers may be referenced in
109 any mode, two REG expressions might be equivalent in the hash table
110 but not have the same quantity number if the quantity number of one
111 of the registers is not the same mode as those expressions.
113 Constants and quantity numbers
115 When a quantity has a known constant value, that value is stored
116 in the appropriate qty_table `const_rtx'. This is in addition to
117 putting the constant in the hash table as is usual for non-regs.
119 Whether a reg or a constant is preferred is determined by the configuration
120 macro CONST_COSTS and will often depend on the constant value. In any
121 event, expressions containing constants can be simplified, by fold_rtx.
123 When a quantity has a known nearly constant value (such as an address
124 of a stack slot), that value is stored in the appropriate qty_table
127 Integer constants don't have a machine mode. However, cse
128 determines the intended machine mode from the destination
129 of the instruction that moves the constant. The machine mode
130 is recorded in the hash table along with the actual RTL
131 constant expression so that different modes are kept separate.
135 To record known equivalences among expressions in general
136 we use a hash table called `table'. It has a fixed number of buckets
137 that contain chains of `struct table_elt' elements for expressions.
138 These chains connect the elements whose expressions have the same
141 Other chains through the same elements connect the elements which
142 currently have equivalent values.
144 Register references in an expression are canonicalized before hashing
145 the expression. This is done using `reg_qty' and qty_table `first_reg'.
146 The hash code of a register reference is computed using the quantity
147 number, not the register number.
149 When the value of an expression changes, it is necessary to remove from the
150 hash table not just that expression but all expressions whose values
151 could be different as a result.
153 1. If the value changing is in memory, except in special cases
154 ANYTHING referring to memory could be changed. That is because
155 nobody knows where a pointer does not point.
156 The function `invalidate_memory' removes what is necessary.
158 The special cases are when the address is constant or is
159 a constant plus a fixed register such as the frame pointer
160 or a static chain pointer. When such addresses are stored in,
161 we can tell exactly which other such addresses must be invalidated
162 due to overlap. `invalidate' does this.
163 All expressions that refer to non-constant
164 memory addresses are also invalidated. `invalidate_memory' does this.
166 2. If the value changing is a register, all expressions
167 containing references to that register, and only those,
170 Because searching the entire hash table for expressions that contain
171 a register is very slow, we try to figure out when it isn't necessary.
172 Precisely, this is necessary only when expressions have been
173 entered in the hash table using this register, and then the value has
174 changed, and then another expression wants to be added to refer to
175 the register's new value. This sequence of circumstances is rare
176 within any one basic block.
178 `REG_TICK' and `REG_IN_TABLE', accessors for members of
179 cse_reg_info, are used to detect this case. REG_TICK (i) is
180 incremented whenever a value is stored in register i.
181 REG_IN_TABLE (i) holds -1 if no references to register i have been
182 entered in the table; otherwise, it contains the value REG_TICK (i)
183 had when the references were entered. If we want to enter a
184 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
185 remove old references. Until we want to enter a new entry, the
186 mere fact that the two vectors don't match makes the entries be
187 ignored if anyone tries to match them.
189 Registers themselves are entered in the hash table as well as in
190 the equivalent-register chains. However, `REG_TICK' and
191 `REG_IN_TABLE' do not apply to expressions which are simple
192 register references. These expressions are removed from the table
193 immediately when they become invalid, and this can be done even if
194 we do not immediately search for all the expressions that refer to
197 A CLOBBER rtx in an instruction invalidates its operand for further
198 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
199 invalidates everything that resides in memory.
203 Constant expressions that differ only by an additive integer
204 are called related. When a constant expression is put in
205 the table, the related expression with no constant term
206 is also entered. These are made to point at each other
207 so that it is possible to find out if there exists any
208 register equivalent to an expression related to a given expression. */
210 /* Length of qty_table vector. We know in advance we will not need
211 a quantity number this big. */
215 /* Next quantity number to be allocated.
216 This is 1 + the largest number needed so far. */
220 /* Per-qty information tracking.
222 `first_reg' and `last_reg' track the head and tail of the
223 chain of registers which currently contain this quantity.
225 `mode' contains the machine mode of this quantity.
227 `const_rtx' holds the rtx of the constant value of this
228 quantity, if known. A summations of the frame/arg pointer
229 and a constant can also be entered here. When this holds
230 a known value, `const_insn' is the insn which stored the
233 `comparison_{code,const,qty}' are used to track when a
234 comparison between a quantity and some constant or register has
235 been passed. In such a case, we know the results of the comparison
236 in case we see it again. These members record a comparison that
237 is known to be true. `comparison_code' holds the rtx code of such
238 a comparison, else it is set to UNKNOWN and the other two
239 comparison members are undefined. `comparison_const' holds
240 the constant being compared against, or zero if the comparison
241 is not against a constant. `comparison_qty' holds the quantity
242 being compared against when the result is known. If the comparison
243 is not with a register, `comparison_qty' is -1. */
245 struct qty_table_elem
249 rtx comparison_const;
251 unsigned int first_reg, last_reg;
252 /* The sizes of these fields should match the sizes of the
253 code and mode fields of struct rtx_def (see rtl.h). */
254 ENUM_BITFIELD(rtx_code) comparison_code : 16;
255 ENUM_BITFIELD(machine_mode) mode : 8;
258 /* The table of all qtys, indexed by qty number. */
259 static struct qty_table_elem *qty_table;
261 /* Structure used to pass arguments via for_each_rtx to function
262 cse_change_cc_mode. */
263 struct change_cc_mode_args
270 /* For machines that have a CC0, we do not record its value in the hash
271 table since its use is guaranteed to be the insn immediately following
272 its definition and any other insn is presumed to invalidate it.
274 Instead, we store below the current and last value assigned to CC0.
275 If it should happen to be a constant, it is stored in preference
276 to the actual assigned value. In case it is a constant, we store
277 the mode in which the constant should be interpreted. */
279 static rtx this_insn_cc0, prev_insn_cc0;
280 static enum machine_mode this_insn_cc0_mode, prev_insn_cc0_mode;
283 /* Insn being scanned. */
285 static rtx this_insn;
286 static bool optimize_this_for_speed_p;
288 /* Index by register number, gives the number of the next (or
289 previous) register in the chain of registers sharing the same
292 Or -1 if this register is at the end of the chain.
294 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
296 /* Per-register equivalence chain. */
302 /* The table of all register equivalence chains. */
303 static struct reg_eqv_elem *reg_eqv_table;
307 /* The timestamp at which this register is initialized. */
308 unsigned int timestamp;
310 /* The quantity number of the register's current contents. */
313 /* The number of times the register has been altered in the current
317 /* The REG_TICK value at which rtx's containing this register are
318 valid in the hash table. If this does not equal the current
319 reg_tick value, such expressions existing in the hash table are
323 /* The SUBREG that was set when REG_TICK was last incremented. Set
324 to -1 if the last store was to the whole register, not a subreg. */
325 unsigned int subreg_ticked;
328 /* A table of cse_reg_info indexed by register numbers. */
329 static struct cse_reg_info *cse_reg_info_table;
331 /* The size of the above table. */
332 static unsigned int cse_reg_info_table_size;
334 /* The index of the first entry that has not been initialized. */
335 static unsigned int cse_reg_info_table_first_uninitialized;
337 /* The timestamp at the beginning of the current run of
338 cse_extended_basic_block. We increment this variable at the beginning of
339 the current run of cse_extended_basic_block. The timestamp field of a
340 cse_reg_info entry matches the value of this variable if and only
341 if the entry has been initialized during the current run of
342 cse_extended_basic_block. */
343 static unsigned int cse_reg_info_timestamp;
345 /* A HARD_REG_SET containing all the hard registers for which there is
346 currently a REG expression in the hash table. Note the difference
347 from the above variables, which indicate if the REG is mentioned in some
348 expression in the table. */
350 static HARD_REG_SET hard_regs_in_table;
352 /* True if CSE has altered the CFG. */
353 static bool cse_cfg_altered;
355 /* True if CSE has altered conditional jump insns in such a way
356 that jump optimization should be redone. */
357 static bool cse_jumps_altered;
359 /* True if we put a LABEL_REF into the hash table for an INSN
360 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
361 to put in the note. */
362 static bool recorded_label_ref;
364 /* canon_hash stores 1 in do_not_record
365 if it notices a reference to CC0, PC, or some other volatile
368 static int do_not_record;
370 /* canon_hash stores 1 in hash_arg_in_memory
371 if it notices a reference to memory within the expression being hashed. */
373 static int hash_arg_in_memory;
375 /* The hash table contains buckets which are chains of `struct table_elt's,
376 each recording one expression's information.
377 That expression is in the `exp' field.
379 The canon_exp field contains a canonical (from the point of view of
380 alias analysis) version of the `exp' field.
382 Those elements with the same hash code are chained in both directions
383 through the `next_same_hash' and `prev_same_hash' fields.
385 Each set of expressions with equivalent values
386 are on a two-way chain through the `next_same_value'
387 and `prev_same_value' fields, and all point with
388 the `first_same_value' field at the first element in
389 that chain. The chain is in order of increasing cost.
390 Each element's cost value is in its `cost' field.
392 The `in_memory' field is nonzero for elements that
393 involve any reference to memory. These elements are removed
394 whenever a write is done to an unidentified location in memory.
395 To be safe, we assume that a memory address is unidentified unless
396 the address is either a symbol constant or a constant plus
397 the frame pointer or argument pointer.
399 The `related_value' field is used to connect related expressions
400 (that differ by adding an integer).
401 The related expressions are chained in a circular fashion.
402 `related_value' is zero for expressions for which this
405 The `cost' field stores the cost of this element's expression.
406 The `regcost' field stores the value returned by approx_reg_cost for
407 this element's expression.
409 The `is_const' flag is set if the element is a constant (including
412 The `flag' field is used as a temporary during some search routines.
414 The `mode' field is usually the same as GET_MODE (`exp'), but
415 if `exp' is a CONST_INT and has no machine mode then the `mode'
416 field is the mode it was being used as. Each constant is
417 recorded separately for each mode it is used with. */
423 struct table_elt *next_same_hash;
424 struct table_elt *prev_same_hash;
425 struct table_elt *next_same_value;
426 struct table_elt *prev_same_value;
427 struct table_elt *first_same_value;
428 struct table_elt *related_value;
431 /* The size of this field should match the size
432 of the mode field of struct rtx_def (see rtl.h). */
433 ENUM_BITFIELD(machine_mode) mode : 8;
439 /* We don't want a lot of buckets, because we rarely have very many
440 things stored in the hash table, and a lot of buckets slows
441 down a lot of loops that happen frequently. */
443 #define HASH_SIZE (1 << HASH_SHIFT)
444 #define HASH_MASK (HASH_SIZE - 1)
446 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
447 register (hard registers may require `do_not_record' to be set). */
450 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
451 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
452 : canon_hash (X, M)) & HASH_MASK)
454 /* Like HASH, but without side-effects. */
455 #define SAFE_HASH(X, M) \
456 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
457 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
458 : safe_hash (X, M)) & HASH_MASK)
460 /* Determine whether register number N is considered a fixed register for the
461 purpose of approximating register costs.
462 It is desirable to replace other regs with fixed regs, to reduce need for
464 A reg wins if it is either the frame pointer or designated as fixed. */
465 #define FIXED_REGNO_P(N) \
466 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
467 || fixed_regs[N] || global_regs[N])
469 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
470 hard registers and pointers into the frame are the cheapest with a cost
471 of 0. Next come pseudos with a cost of one and other hard registers with
472 a cost of 2. Aside from these special cases, call `rtx_cost'. */
474 #define CHEAP_REGNO(N) \
475 (REGNO_PTR_FRAME_P(N) \
476 || (HARD_REGISTER_NUM_P (N) \
477 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
479 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
480 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
482 /* Get the number of times this register has been updated in this
485 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
487 /* Get the point at which REG was recorded in the table. */
489 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
491 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
494 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
496 /* Get the quantity number for REG. */
498 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
500 /* Determine if the quantity number for register X represents a valid index
501 into the qty_table. */
503 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
505 static struct table_elt *table[HASH_SIZE];
507 /* Chain of `struct table_elt's made so far for this function
508 but currently removed from the table. */
510 static struct table_elt *free_element_chain;
512 /* Set to the cost of a constant pool reference if one was found for a
513 symbolic constant. If this was found, it means we should try to
514 convert constants into constant pool entries if they don't fit in
517 static int constant_pool_entries_cost;
518 static int constant_pool_entries_regcost;
520 /* This data describes a block that will be processed by
521 cse_extended_basic_block. */
523 struct cse_basic_block_data
525 /* Total number of SETs in block. */
527 /* Size of current branch path, if any. */
529 /* Current path, indicating which basic_blocks will be processed. */
532 /* The basic block for this path entry. */
538 /* Pointers to the live in/live out bitmaps for the boundaries of the
540 static bitmap cse_ebb_live_in, cse_ebb_live_out;
542 /* A simple bitmap to track which basic blocks have been visited
543 already as part of an already processed extended basic block. */
544 static sbitmap cse_visited_basic_blocks;
546 static bool fixed_base_plus_p (rtx x);
547 static int notreg_cost (rtx, enum rtx_code);
548 static int approx_reg_cost_1 (rtx *, void *);
549 static int approx_reg_cost (rtx);
550 static int preferable (int, int, int, int);
551 static void new_basic_block (void);
552 static void make_new_qty (unsigned int, enum machine_mode);
553 static void make_regs_eqv (unsigned int, unsigned int);
554 static void delete_reg_equiv (unsigned int);
555 static int mention_regs (rtx);
556 static int insert_regs (rtx, struct table_elt *, int);
557 static void remove_from_table (struct table_elt *, unsigned);
558 static void remove_pseudo_from_table (rtx, unsigned);
559 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
560 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
561 static rtx lookup_as_function (rtx, enum rtx_code);
562 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
564 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
565 static void invalidate (rtx, enum machine_mode);
566 static bool cse_rtx_varies_p (const_rtx, bool);
567 static void remove_invalid_refs (unsigned int);
568 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
570 static void rehash_using_reg (rtx);
571 static void invalidate_memory (void);
572 static void invalidate_for_call (void);
573 static rtx use_related_value (rtx, struct table_elt *);
575 static inline unsigned canon_hash (rtx, enum machine_mode);
576 static inline unsigned safe_hash (rtx, enum machine_mode);
577 static inline unsigned hash_rtx_string (const char *);
579 static rtx canon_reg (rtx, rtx);
580 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
582 enum machine_mode *);
583 static rtx fold_rtx (rtx, rtx);
584 static rtx equiv_constant (rtx);
585 static void record_jump_equiv (rtx, bool);
586 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
588 static void cse_insn (rtx);
589 static void cse_prescan_path (struct cse_basic_block_data *);
590 static void invalidate_from_clobbers (rtx);
591 static rtx cse_process_notes (rtx, rtx, bool *);
592 static void cse_extended_basic_block (struct cse_basic_block_data *);
593 static void count_reg_usage (rtx, int *, rtx, int);
594 static int check_for_label_ref (rtx *, void *);
595 extern void dump_class (struct table_elt*);
596 static void get_cse_reg_info_1 (unsigned int regno);
597 static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
598 static int check_dependence (rtx *, void *);
600 static void flush_hash_table (void);
601 static bool insn_live_p (rtx, int *);
602 static bool set_live_p (rtx, rtx, int *);
603 static int cse_change_cc_mode (rtx *, void *);
604 static void cse_change_cc_mode_insn (rtx, rtx);
605 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
606 static enum machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
610 #undef RTL_HOOKS_GEN_LOWPART
611 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
613 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
615 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
616 virtual regs here because the simplify_*_operation routines are called
617 by integrate.c, which is called before virtual register instantiation. */
620 fixed_base_plus_p (rtx x)
622 switch (GET_CODE (x))
625 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
627 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
629 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
630 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
635 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
637 return fixed_base_plus_p (XEXP (x, 0));
644 /* Dump the expressions in the equivalence class indicated by CLASSP.
645 This function is used only for debugging. */
647 dump_class (struct table_elt *classp)
649 struct table_elt *elt;
651 fprintf (stderr, "Equivalence chain for ");
652 print_rtl (stderr, classp->exp);
653 fprintf (stderr, ": \n");
655 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
657 print_rtl (stderr, elt->exp);
658 fprintf (stderr, "\n");
662 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
665 approx_reg_cost_1 (rtx *xp, void *data)
668 int *cost_p = (int *) data;
672 unsigned int regno = REGNO (x);
674 if (! CHEAP_REGNO (regno))
676 if (regno < FIRST_PSEUDO_REGISTER)
678 if (SMALL_REGISTER_CLASSES)
690 /* Return an estimate of the cost of the registers used in an rtx.
691 This is mostly the number of different REG expressions in the rtx;
692 however for some exceptions like fixed registers we use a cost of
693 0. If any other hard register reference occurs, return MAX_COST. */
696 approx_reg_cost (rtx x)
700 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
706 /* Return a negative value if an rtx A, whose costs are given by COST_A
707 and REGCOST_A, is more desirable than an rtx B.
708 Return a positive value if A is less desirable, or 0 if the two are
711 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
713 /* First, get rid of cases involving expressions that are entirely
715 if (cost_a != cost_b)
717 if (cost_a == MAX_COST)
719 if (cost_b == MAX_COST)
723 /* Avoid extending lifetimes of hardregs. */
724 if (regcost_a != regcost_b)
726 if (regcost_a == MAX_COST)
728 if (regcost_b == MAX_COST)
732 /* Normal operation costs take precedence. */
733 if (cost_a != cost_b)
734 return cost_a - cost_b;
735 /* Only if these are identical consider effects on register pressure. */
736 if (regcost_a != regcost_b)
737 return regcost_a - regcost_b;
741 /* Internal function, to compute cost when X is not a register; called
742 from COST macro to keep it simple. */
745 notreg_cost (rtx x, enum rtx_code outer)
747 return ((GET_CODE (x) == SUBREG
748 && REG_P (SUBREG_REG (x))
749 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
750 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
751 && (GET_MODE_SIZE (GET_MODE (x))
752 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
753 && subreg_lowpart_p (x)
754 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
755 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
757 : rtx_cost (x, outer, optimize_this_for_speed_p) * 2);
761 /* Initialize CSE_REG_INFO_TABLE. */
764 init_cse_reg_info (unsigned int nregs)
766 /* Do we need to grow the table? */
767 if (nregs > cse_reg_info_table_size)
769 unsigned int new_size;
771 if (cse_reg_info_table_size < 2048)
773 /* Compute a new size that is a power of 2 and no smaller
774 than the large of NREGS and 64. */
775 new_size = (cse_reg_info_table_size
776 ? cse_reg_info_table_size : 64);
778 while (new_size < nregs)
783 /* If we need a big table, allocate just enough to hold
788 /* Reallocate the table with NEW_SIZE entries. */
789 if (cse_reg_info_table)
790 free (cse_reg_info_table);
791 cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
792 cse_reg_info_table_size = new_size;
793 cse_reg_info_table_first_uninitialized = 0;
796 /* Do we have all of the first NREGS entries initialized? */
797 if (cse_reg_info_table_first_uninitialized < nregs)
799 unsigned int old_timestamp = cse_reg_info_timestamp - 1;
802 /* Put the old timestamp on newly allocated entries so that they
803 will all be considered out of date. We do not touch those
804 entries beyond the first NREGS entries to be nice to the
806 for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
807 cse_reg_info_table[i].timestamp = old_timestamp;
809 cse_reg_info_table_first_uninitialized = nregs;
813 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
816 get_cse_reg_info_1 (unsigned int regno)
818 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
819 entry will be considered to have been initialized. */
820 cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
822 /* Initialize the rest of the entry. */
823 cse_reg_info_table[regno].reg_tick = 1;
824 cse_reg_info_table[regno].reg_in_table = -1;
825 cse_reg_info_table[regno].subreg_ticked = -1;
826 cse_reg_info_table[regno].reg_qty = -regno - 1;
829 /* Find a cse_reg_info entry for REGNO. */
831 static inline struct cse_reg_info *
832 get_cse_reg_info (unsigned int regno)
834 struct cse_reg_info *p = &cse_reg_info_table[regno];
836 /* If this entry has not been initialized, go ahead and initialize
838 if (p->timestamp != cse_reg_info_timestamp)
839 get_cse_reg_info_1 (regno);
844 /* Clear the hash table and initialize each register with its own quantity,
845 for a new basic block. */
848 new_basic_block (void)
854 /* Invalidate cse_reg_info_table. */
855 cse_reg_info_timestamp++;
857 /* Clear out hash table state for this pass. */
858 CLEAR_HARD_REG_SET (hard_regs_in_table);
860 /* The per-quantity values used to be initialized here, but it is
861 much faster to initialize each as it is made in `make_new_qty'. */
863 for (i = 0; i < HASH_SIZE; i++)
865 struct table_elt *first;
870 struct table_elt *last = first;
874 while (last->next_same_hash != NULL)
875 last = last->next_same_hash;
877 /* Now relink this hash entire chain into
878 the free element list. */
880 last->next_same_hash = free_element_chain;
881 free_element_chain = first;
890 /* Say that register REG contains a quantity in mode MODE not in any
891 register before and initialize that quantity. */
894 make_new_qty (unsigned int reg, enum machine_mode mode)
897 struct qty_table_elem *ent;
898 struct reg_eqv_elem *eqv;
900 gcc_assert (next_qty < max_qty);
902 q = REG_QTY (reg) = next_qty++;
904 ent->first_reg = reg;
907 ent->const_rtx = ent->const_insn = NULL_RTX;
908 ent->comparison_code = UNKNOWN;
910 eqv = ®_eqv_table[reg];
911 eqv->next = eqv->prev = -1;
914 /* Make reg NEW equivalent to reg OLD.
915 OLD is not changing; NEW is. */
918 make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
920 unsigned int lastr, firstr;
921 int q = REG_QTY (old_reg);
922 struct qty_table_elem *ent;
926 /* Nothing should become eqv until it has a "non-invalid" qty number. */
927 gcc_assert (REGNO_QTY_VALID_P (old_reg));
929 REG_QTY (new_reg) = q;
930 firstr = ent->first_reg;
931 lastr = ent->last_reg;
933 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
934 hard regs. Among pseudos, if NEW will live longer than any other reg
935 of the same qty, and that is beyond the current basic block,
936 make it the new canonical replacement for this qty. */
937 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
938 /* Certain fixed registers might be of the class NO_REGS. This means
939 that not only can they not be allocated by the compiler, but
940 they cannot be used in substitutions or canonicalizations
942 && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
943 && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
944 || (new_reg >= FIRST_PSEUDO_REGISTER
945 && (firstr < FIRST_PSEUDO_REGISTER
946 || (bitmap_bit_p (cse_ebb_live_out, new_reg)
947 && !bitmap_bit_p (cse_ebb_live_out, firstr))
948 || (bitmap_bit_p (cse_ebb_live_in, new_reg)
949 && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
951 reg_eqv_table[firstr].prev = new_reg;
952 reg_eqv_table[new_reg].next = firstr;
953 reg_eqv_table[new_reg].prev = -1;
954 ent->first_reg = new_reg;
958 /* If NEW is a hard reg (known to be non-fixed), insert at end.
959 Otherwise, insert before any non-fixed hard regs that are at the
960 end. Registers of class NO_REGS cannot be used as an
961 equivalent for anything. */
962 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
963 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
964 && new_reg >= FIRST_PSEUDO_REGISTER)
965 lastr = reg_eqv_table[lastr].prev;
966 reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
967 if (reg_eqv_table[lastr].next >= 0)
968 reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
970 qty_table[q].last_reg = new_reg;
971 reg_eqv_table[lastr].next = new_reg;
972 reg_eqv_table[new_reg].prev = lastr;
976 /* Remove REG from its equivalence class. */
979 delete_reg_equiv (unsigned int reg)
981 struct qty_table_elem *ent;
982 int q = REG_QTY (reg);
985 /* If invalid, do nothing. */
986 if (! REGNO_QTY_VALID_P (reg))
991 p = reg_eqv_table[reg].prev;
992 n = reg_eqv_table[reg].next;
995 reg_eqv_table[n].prev = p;
999 reg_eqv_table[p].next = n;
1003 REG_QTY (reg) = -reg - 1;
1006 /* Remove any invalid expressions from the hash table
1007 that refer to any of the registers contained in expression X.
1009 Make sure that newly inserted references to those registers
1010 as subexpressions will be considered valid.
1012 mention_regs is not called when a register itself
1013 is being stored in the table.
1015 Return 1 if we have done something that may have changed the hash code
1019 mention_regs (rtx x)
1029 code = GET_CODE (x);
1032 unsigned int regno = REGNO (x);
1033 unsigned int endregno = END_REGNO (x);
1036 for (i = regno; i < endregno; i++)
1038 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1039 remove_invalid_refs (i);
1041 REG_IN_TABLE (i) = REG_TICK (i);
1042 SUBREG_TICKED (i) = -1;
1048 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1049 pseudo if they don't use overlapping words. We handle only pseudos
1050 here for simplicity. */
1051 if (code == SUBREG && REG_P (SUBREG_REG (x))
1052 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1054 unsigned int i = REGNO (SUBREG_REG (x));
1056 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1058 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1059 the last store to this register really stored into this
1060 subreg, then remove the memory of this subreg.
1061 Otherwise, remove any memory of the entire register and
1062 all its subregs from the table. */
1063 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1064 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1065 remove_invalid_refs (i);
1067 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1070 REG_IN_TABLE (i) = REG_TICK (i);
1071 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1075 /* If X is a comparison or a COMPARE and either operand is a register
1076 that does not have a quantity, give it one. This is so that a later
1077 call to record_jump_equiv won't cause X to be assigned a different
1078 hash code and not found in the table after that call.
1080 It is not necessary to do this here, since rehash_using_reg can
1081 fix up the table later, but doing this here eliminates the need to
1082 call that expensive function in the most common case where the only
1083 use of the register is in the comparison. */
1085 if (code == COMPARE || COMPARISON_P (x))
1087 if (REG_P (XEXP (x, 0))
1088 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1089 if (insert_regs (XEXP (x, 0), NULL, 0))
1091 rehash_using_reg (XEXP (x, 0));
1095 if (REG_P (XEXP (x, 1))
1096 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1097 if (insert_regs (XEXP (x, 1), NULL, 0))
1099 rehash_using_reg (XEXP (x, 1));
1104 fmt = GET_RTX_FORMAT (code);
1105 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1107 changed |= mention_regs (XEXP (x, i));
1108 else if (fmt[i] == 'E')
1109 for (j = 0; j < XVECLEN (x, i); j++)
1110 changed |= mention_regs (XVECEXP (x, i, j));
1115 /* Update the register quantities for inserting X into the hash table
1116 with a value equivalent to CLASSP.
1117 (If the class does not contain a REG, it is irrelevant.)
1118 If MODIFIED is nonzero, X is a destination; it is being modified.
1119 Note that delete_reg_equiv should be called on a register
1120 before insert_regs is done on that register with MODIFIED != 0.
1122 Nonzero value means that elements of reg_qty have changed
1123 so X's hash code may be different. */
1126 insert_regs (rtx x, struct table_elt *classp, int modified)
1130 unsigned int regno = REGNO (x);
1133 /* If REGNO is in the equivalence table already but is of the
1134 wrong mode for that equivalence, don't do anything here. */
1136 qty_valid = REGNO_QTY_VALID_P (regno);
1139 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1141 if (ent->mode != GET_MODE (x))
1145 if (modified || ! qty_valid)
1148 for (classp = classp->first_same_value;
1150 classp = classp->next_same_value)
1151 if (REG_P (classp->exp)
1152 && GET_MODE (classp->exp) == GET_MODE (x))
1154 unsigned c_regno = REGNO (classp->exp);
1156 gcc_assert (REGNO_QTY_VALID_P (c_regno));
1158 /* Suppose that 5 is hard reg and 100 and 101 are
1161 (set (reg:si 100) (reg:si 5))
1162 (set (reg:si 5) (reg:si 100))
1163 (set (reg:di 101) (reg:di 5))
1165 We would now set REG_QTY (101) = REG_QTY (5), but the
1166 entry for 5 is in SImode. When we use this later in
1167 copy propagation, we get the register in wrong mode. */
1168 if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1171 make_regs_eqv (regno, c_regno);
1175 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1176 than REG_IN_TABLE to find out if there was only a single preceding
1177 invalidation - for the SUBREG - or another one, which would be
1178 for the full register. However, if we find here that REG_TICK
1179 indicates that the register is invalid, it means that it has
1180 been invalidated in a separate operation. The SUBREG might be used
1181 now (then this is a recursive call), or we might use the full REG
1182 now and a SUBREG of it later. So bump up REG_TICK so that
1183 mention_regs will do the right thing. */
1185 && REG_IN_TABLE (regno) >= 0
1186 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1188 make_new_qty (regno, GET_MODE (x));
1195 /* If X is a SUBREG, we will likely be inserting the inner register in the
1196 table. If that register doesn't have an assigned quantity number at
1197 this point but does later, the insertion that we will be doing now will
1198 not be accessible because its hash code will have changed. So assign
1199 a quantity number now. */
1201 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1202 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1204 insert_regs (SUBREG_REG (x), NULL, 0);
1209 return mention_regs (x);
1212 /* Look in or update the hash table. */
1214 /* Remove table element ELT from use in the table.
1215 HASH is its hash code, made using the HASH macro.
1216 It's an argument because often that is known in advance
1217 and we save much time not recomputing it. */
1220 remove_from_table (struct table_elt *elt, unsigned int hash)
1225 /* Mark this element as removed. See cse_insn. */
1226 elt->first_same_value = 0;
1228 /* Remove the table element from its equivalence class. */
1231 struct table_elt *prev = elt->prev_same_value;
1232 struct table_elt *next = elt->next_same_value;
1235 next->prev_same_value = prev;
1238 prev->next_same_value = next;
1241 struct table_elt *newfirst = next;
1244 next->first_same_value = newfirst;
1245 next = next->next_same_value;
1250 /* Remove the table element from its hash bucket. */
1253 struct table_elt *prev = elt->prev_same_hash;
1254 struct table_elt *next = elt->next_same_hash;
1257 next->prev_same_hash = prev;
1260 prev->next_same_hash = next;
1261 else if (table[hash] == elt)
1265 /* This entry is not in the proper hash bucket. This can happen
1266 when two classes were merged by `merge_equiv_classes'. Search
1267 for the hash bucket that it heads. This happens only very
1268 rarely, so the cost is acceptable. */
1269 for (hash = 0; hash < HASH_SIZE; hash++)
1270 if (table[hash] == elt)
1275 /* Remove the table element from its related-value circular chain. */
1277 if (elt->related_value != 0 && elt->related_value != elt)
1279 struct table_elt *p = elt->related_value;
1281 while (p->related_value != elt)
1282 p = p->related_value;
1283 p->related_value = elt->related_value;
1284 if (p->related_value == p)
1285 p->related_value = 0;
1288 /* Now add it to the free element chain. */
1289 elt->next_same_hash = free_element_chain;
1290 free_element_chain = elt;
1293 /* Same as above, but X is a pseudo-register. */
1296 remove_pseudo_from_table (rtx x, unsigned int hash)
1298 struct table_elt *elt;
1300 /* Because a pseudo-register can be referenced in more than one
1301 mode, we might have to remove more than one table entry. */
1302 while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1303 remove_from_table (elt, hash);
1306 /* Look up X in the hash table and return its table element,
1307 or 0 if X is not in the table.
1309 MODE is the machine-mode of X, or if X is an integer constant
1310 with VOIDmode then MODE is the mode with which X will be used.
1312 Here we are satisfied to find an expression whose tree structure
1315 static struct table_elt *
1316 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1318 struct table_elt *p;
1320 for (p = table[hash]; p; p = p->next_same_hash)
1321 if (mode == p->mode && ((x == p->exp && REG_P (x))
1322 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1328 /* Like `lookup' but don't care whether the table element uses invalid regs.
1329 Also ignore discrepancies in the machine mode of a register. */
1331 static struct table_elt *
1332 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1334 struct table_elt *p;
1338 unsigned int regno = REGNO (x);
1340 /* Don't check the machine mode when comparing registers;
1341 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1342 for (p = table[hash]; p; p = p->next_same_hash)
1344 && REGNO (p->exp) == regno)
1349 for (p = table[hash]; p; p = p->next_same_hash)
1351 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1358 /* Look for an expression equivalent to X and with code CODE.
1359 If one is found, return that expression. */
1362 lookup_as_function (rtx x, enum rtx_code code)
1365 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1370 for (p = p->first_same_value; p; p = p->next_same_value)
1371 if (GET_CODE (p->exp) == code
1372 /* Make sure this is a valid entry in the table. */
1373 && exp_equiv_p (p->exp, p->exp, 1, false))
1379 /* Insert X in the hash table, assuming HASH is its hash code
1380 and CLASSP is an element of the class it should go in
1381 (or 0 if a new class should be made).
1382 It is inserted at the proper position to keep the class in
1383 the order cheapest first.
1385 MODE is the machine-mode of X, or if X is an integer constant
1386 with VOIDmode then MODE is the mode with which X will be used.
1388 For elements of equal cheapness, the most recent one
1389 goes in front, except that the first element in the list
1390 remains first unless a cheaper element is added. The order of
1391 pseudo-registers does not matter, as canon_reg will be called to
1392 find the cheapest when a register is retrieved from the table.
1394 The in_memory field in the hash table element is set to 0.
1395 The caller must set it nonzero if appropriate.
1397 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1398 and if insert_regs returns a nonzero value
1399 you must then recompute its hash code before calling here.
1401 If necessary, update table showing constant values of quantities. */
1403 #define CHEAPER(X, Y) \
1404 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1406 static struct table_elt *
1407 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1409 struct table_elt *elt;
1411 /* If X is a register and we haven't made a quantity for it,
1412 something is wrong. */
1413 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1415 /* If X is a hard register, show it is being put in the table. */
1416 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1417 add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1419 /* Put an element for X into the right hash bucket. */
1421 elt = free_element_chain;
1423 free_element_chain = elt->next_same_hash;
1425 elt = XNEW (struct table_elt);
1428 elt->canon_exp = NULL_RTX;
1429 elt->cost = COST (x);
1430 elt->regcost = approx_reg_cost (x);
1431 elt->next_same_value = 0;
1432 elt->prev_same_value = 0;
1433 elt->next_same_hash = table[hash];
1434 elt->prev_same_hash = 0;
1435 elt->related_value = 0;
1438 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1441 table[hash]->prev_same_hash = elt;
1444 /* Put it into the proper value-class. */
1447 classp = classp->first_same_value;
1448 if (CHEAPER (elt, classp))
1449 /* Insert at the head of the class. */
1451 struct table_elt *p;
1452 elt->next_same_value = classp;
1453 classp->prev_same_value = elt;
1454 elt->first_same_value = elt;
1456 for (p = classp; p; p = p->next_same_value)
1457 p->first_same_value = elt;
1461 /* Insert not at head of the class. */
1462 /* Put it after the last element cheaper than X. */
1463 struct table_elt *p, *next;
1465 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1468 /* Put it after P and before NEXT. */
1469 elt->next_same_value = next;
1471 next->prev_same_value = elt;
1473 elt->prev_same_value = p;
1474 p->next_same_value = elt;
1475 elt->first_same_value = classp;
1479 elt->first_same_value = elt;
1481 /* If this is a constant being set equivalent to a register or a register
1482 being set equivalent to a constant, note the constant equivalence.
1484 If this is a constant, it cannot be equivalent to a different constant,
1485 and a constant is the only thing that can be cheaper than a register. So
1486 we know the register is the head of the class (before the constant was
1489 If this is a register that is not already known equivalent to a
1490 constant, we must check the entire class.
1492 If this is a register that is already known equivalent to an insn,
1493 update the qtys `const_insn' to show that `this_insn' is the latest
1494 insn making that quantity equivalent to the constant. */
1496 if (elt->is_const && classp && REG_P (classp->exp)
1499 int exp_q = REG_QTY (REGNO (classp->exp));
1500 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1502 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1503 exp_ent->const_insn = this_insn;
1508 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1511 struct table_elt *p;
1513 for (p = classp; p != 0; p = p->next_same_value)
1515 if (p->is_const && !REG_P (p->exp))
1517 int x_q = REG_QTY (REGNO (x));
1518 struct qty_table_elem *x_ent = &qty_table[x_q];
1521 = gen_lowpart (GET_MODE (x), p->exp);
1522 x_ent->const_insn = this_insn;
1529 && qty_table[REG_QTY (REGNO (x))].const_rtx
1530 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1531 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1533 /* If this is a constant with symbolic value,
1534 and it has a term with an explicit integer value,
1535 link it up with related expressions. */
1536 if (GET_CODE (x) == CONST)
1538 rtx subexp = get_related_value (x);
1540 struct table_elt *subelt, *subelt_prev;
1544 /* Get the integer-free subexpression in the hash table. */
1545 subhash = SAFE_HASH (subexp, mode);
1546 subelt = lookup (subexp, subhash, mode);
1548 subelt = insert (subexp, NULL, subhash, mode);
1549 /* Initialize SUBELT's circular chain if it has none. */
1550 if (subelt->related_value == 0)
1551 subelt->related_value = subelt;
1552 /* Find the element in the circular chain that precedes SUBELT. */
1553 subelt_prev = subelt;
1554 while (subelt_prev->related_value != subelt)
1555 subelt_prev = subelt_prev->related_value;
1556 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1557 This way the element that follows SUBELT is the oldest one. */
1558 elt->related_value = subelt_prev->related_value;
1559 subelt_prev->related_value = elt;
1566 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1567 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1568 the two classes equivalent.
1570 CLASS1 will be the surviving class; CLASS2 should not be used after this
1573 Any invalid entries in CLASS2 will not be copied. */
1576 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1578 struct table_elt *elt, *next, *new_elt;
1580 /* Ensure we start with the head of the classes. */
1581 class1 = class1->first_same_value;
1582 class2 = class2->first_same_value;
1584 /* If they were already equal, forget it. */
1585 if (class1 == class2)
1588 for (elt = class2; elt; elt = next)
1592 enum machine_mode mode = elt->mode;
1594 next = elt->next_same_value;
1596 /* Remove old entry, make a new one in CLASS1's class.
1597 Don't do this for invalid entries as we cannot find their
1598 hash code (it also isn't necessary). */
1599 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1601 bool need_rehash = false;
1603 hash_arg_in_memory = 0;
1604 hash = HASH (exp, mode);
1608 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1609 delete_reg_equiv (REGNO (exp));
1612 if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1613 remove_pseudo_from_table (exp, hash);
1615 remove_from_table (elt, hash);
1617 if (insert_regs (exp, class1, 0) || need_rehash)
1619 rehash_using_reg (exp);
1620 hash = HASH (exp, mode);
1622 new_elt = insert (exp, class1, hash, mode);
1623 new_elt->in_memory = hash_arg_in_memory;
1628 /* Flush the entire hash table. */
1631 flush_hash_table (void)
1634 struct table_elt *p;
1636 for (i = 0; i < HASH_SIZE; i++)
1637 for (p = table[i]; p; p = table[i])
1639 /* Note that invalidate can remove elements
1640 after P in the current hash chain. */
1642 invalidate (p->exp, VOIDmode);
1644 remove_from_table (p, i);
1648 /* Function called for each rtx to check whether true dependence exist. */
1649 struct check_dependence_data
1651 enum machine_mode mode;
1657 check_dependence (rtx *x, void *data)
1659 struct check_dependence_data *d = (struct check_dependence_data *) data;
1660 if (*x && MEM_P (*x))
1661 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1667 /* Remove from the hash table, or mark as invalid, all expressions whose
1668 values could be altered by storing in X. X is a register, a subreg, or
1669 a memory reference with nonvarying address (because, when a memory
1670 reference with a varying address is stored in, all memory references are
1671 removed by invalidate_memory so specific invalidation is superfluous).
1672 FULL_MODE, if not VOIDmode, indicates that this much should be
1673 invalidated instead of just the amount indicated by the mode of X. This
1674 is only used for bitfield stores into memory.
1676 A nonvarying address may be just a register or just a symbol reference,
1677 or it may be either of those plus a numeric offset. */
1680 invalidate (rtx x, enum machine_mode full_mode)
1683 struct table_elt *p;
1686 switch (GET_CODE (x))
1690 /* If X is a register, dependencies on its contents are recorded
1691 through the qty number mechanism. Just change the qty number of
1692 the register, mark it as invalid for expressions that refer to it,
1693 and remove it itself. */
1694 unsigned int regno = REGNO (x);
1695 unsigned int hash = HASH (x, GET_MODE (x));
1697 /* Remove REGNO from any quantity list it might be on and indicate
1698 that its value might have changed. If it is a pseudo, remove its
1699 entry from the hash table.
1701 For a hard register, we do the first two actions above for any
1702 additional hard registers corresponding to X. Then, if any of these
1703 registers are in the table, we must remove any REG entries that
1704 overlap these registers. */
1706 delete_reg_equiv (regno);
1708 SUBREG_TICKED (regno) = -1;
1710 if (regno >= FIRST_PSEUDO_REGISTER)
1711 remove_pseudo_from_table (x, hash);
1714 HOST_WIDE_INT in_table
1715 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1716 unsigned int endregno = END_HARD_REGNO (x);
1717 unsigned int tregno, tendregno, rn;
1718 struct table_elt *p, *next;
1720 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1722 for (rn = regno + 1; rn < endregno; rn++)
1724 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1725 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1726 delete_reg_equiv (rn);
1728 SUBREG_TICKED (rn) = -1;
1732 for (hash = 0; hash < HASH_SIZE; hash++)
1733 for (p = table[hash]; p; p = next)
1735 next = p->next_same_hash;
1738 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1741 tregno = REGNO (p->exp);
1742 tendregno = END_HARD_REGNO (p->exp);
1743 if (tendregno > regno && tregno < endregno)
1744 remove_from_table (p, hash);
1751 invalidate (SUBREG_REG (x), VOIDmode);
1755 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1756 invalidate (XVECEXP (x, 0, i), VOIDmode);
1760 /* This is part of a disjoint return value; extract the location in
1761 question ignoring the offset. */
1762 invalidate (XEXP (x, 0), VOIDmode);
1766 addr = canon_rtx (get_addr (XEXP (x, 0)));
1767 /* Calculate the canonical version of X here so that
1768 true_dependence doesn't generate new RTL for X on each call. */
1771 /* Remove all hash table elements that refer to overlapping pieces of
1773 if (full_mode == VOIDmode)
1774 full_mode = GET_MODE (x);
1776 for (i = 0; i < HASH_SIZE; i++)
1778 struct table_elt *next;
1780 for (p = table[i]; p; p = next)
1782 next = p->next_same_hash;
1785 struct check_dependence_data d;
1787 /* Just canonicalize the expression once;
1788 otherwise each time we call invalidate
1789 true_dependence will canonicalize the
1790 expression again. */
1792 p->canon_exp = canon_rtx (p->exp);
1796 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1797 remove_from_table (p, i);
1808 /* Remove all expressions that refer to register REGNO,
1809 since they are already invalid, and we are about to
1810 mark that register valid again and don't want the old
1811 expressions to reappear as valid. */
1814 remove_invalid_refs (unsigned int regno)
1817 struct table_elt *p, *next;
1819 for (i = 0; i < HASH_SIZE; i++)
1820 for (p = table[i]; p; p = next)
1822 next = p->next_same_hash;
1824 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1825 remove_from_table (p, i);
1829 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1832 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1833 enum machine_mode mode)
1836 struct table_elt *p, *next;
1837 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1839 for (i = 0; i < HASH_SIZE; i++)
1840 for (p = table[i]; p; p = next)
1843 next = p->next_same_hash;
1846 && (GET_CODE (exp) != SUBREG
1847 || !REG_P (SUBREG_REG (exp))
1848 || REGNO (SUBREG_REG (exp)) != regno
1849 || (((SUBREG_BYTE (exp)
1850 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1851 && SUBREG_BYTE (exp) <= end))
1852 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1853 remove_from_table (p, i);
1857 /* Recompute the hash codes of any valid entries in the hash table that
1858 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1860 This is called when we make a jump equivalence. */
1863 rehash_using_reg (rtx x)
1866 struct table_elt *p, *next;
1869 if (GET_CODE (x) == SUBREG)
1872 /* If X is not a register or if the register is known not to be in any
1873 valid entries in the table, we have no work to do. */
1876 || REG_IN_TABLE (REGNO (x)) < 0
1877 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1880 /* Scan all hash chains looking for valid entries that mention X.
1881 If we find one and it is in the wrong hash chain, move it. */
1883 for (i = 0; i < HASH_SIZE; i++)
1884 for (p = table[i]; p; p = next)
1886 next = p->next_same_hash;
1887 if (reg_mentioned_p (x, p->exp)
1888 && exp_equiv_p (p->exp, p->exp, 1, false)
1889 && i != (hash = SAFE_HASH (p->exp, p->mode)))
1891 if (p->next_same_hash)
1892 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1894 if (p->prev_same_hash)
1895 p->prev_same_hash->next_same_hash = p->next_same_hash;
1897 table[i] = p->next_same_hash;
1899 p->next_same_hash = table[hash];
1900 p->prev_same_hash = 0;
1902 table[hash]->prev_same_hash = p;
1908 /* Remove from the hash table any expression that is a call-clobbered
1909 register. Also update their TICK values. */
1912 invalidate_for_call (void)
1914 unsigned int regno, endregno;
1917 struct table_elt *p, *next;
1920 /* Go through all the hard registers. For each that is clobbered in
1921 a CALL_INSN, remove the register from quantity chains and update
1922 reg_tick if defined. Also see if any of these registers is currently
1925 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1926 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1928 delete_reg_equiv (regno);
1929 if (REG_TICK (regno) >= 0)
1932 SUBREG_TICKED (regno) = -1;
1935 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1938 /* In the case where we have no call-clobbered hard registers in the
1939 table, we are done. Otherwise, scan the table and remove any
1940 entry that overlaps a call-clobbered register. */
1943 for (hash = 0; hash < HASH_SIZE; hash++)
1944 for (p = table[hash]; p; p = next)
1946 next = p->next_same_hash;
1949 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1952 regno = REGNO (p->exp);
1953 endregno = END_HARD_REGNO (p->exp);
1955 for (i = regno; i < endregno; i++)
1956 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1958 remove_from_table (p, hash);
1964 /* Given an expression X of type CONST,
1965 and ELT which is its table entry (or 0 if it
1966 is not in the hash table),
1967 return an alternate expression for X as a register plus integer.
1968 If none can be found, return 0. */
1971 use_related_value (rtx x, struct table_elt *elt)
1973 struct table_elt *relt = 0;
1974 struct table_elt *p, *q;
1975 HOST_WIDE_INT offset;
1977 /* First, is there anything related known?
1978 If we have a table element, we can tell from that.
1979 Otherwise, must look it up. */
1981 if (elt != 0 && elt->related_value != 0)
1983 else if (elt == 0 && GET_CODE (x) == CONST)
1985 rtx subexp = get_related_value (x);
1987 relt = lookup (subexp,
1988 SAFE_HASH (subexp, GET_MODE (subexp)),
1995 /* Search all related table entries for one that has an
1996 equivalent register. */
2001 /* This loop is strange in that it is executed in two different cases.
2002 The first is when X is already in the table. Then it is searching
2003 the RELATED_VALUE list of X's class (RELT). The second case is when
2004 X is not in the table. Then RELT points to a class for the related
2007 Ensure that, whatever case we are in, that we ignore classes that have
2008 the same value as X. */
2010 if (rtx_equal_p (x, p->exp))
2013 for (q = p->first_same_value; q; q = q->next_same_value)
2020 p = p->related_value;
2022 /* We went all the way around, so there is nothing to be found.
2023 Alternatively, perhaps RELT was in the table for some other reason
2024 and it has no related values recorded. */
2025 if (p == relt || p == 0)
2032 offset = (get_integer_term (x) - get_integer_term (p->exp));
2033 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2034 return plus_constant (q->exp, offset);
2038 /* Hash a string. Just add its bytes up. */
2039 static inline unsigned
2040 hash_rtx_string (const char *ps)
2043 const unsigned char *p = (const unsigned char *) ps;
2052 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2053 When the callback returns true, we continue with the new rtx. */
2056 hash_rtx_cb (const_rtx x, enum machine_mode mode,
2057 int *do_not_record_p, int *hash_arg_in_memory_p,
2058 bool have_reg_qty, hash_rtx_callback_function cb)
2064 enum machine_mode newmode;
2067 /* Used to turn recursion into iteration. We can't rely on GCC's
2068 tail-recursion elimination since we need to keep accumulating values
2074 /* Invoke the callback first. */
2076 && ((*cb) (x, mode, &newx, &newmode)))
2078 hash += hash_rtx_cb (newx, newmode, do_not_record_p,
2079 hash_arg_in_memory_p, have_reg_qty, cb);
2083 code = GET_CODE (x);
2088 unsigned int regno = REGNO (x);
2090 if (do_not_record_p && !reload_completed)
2092 /* On some machines, we can't record any non-fixed hard register,
2093 because extending its life will cause reload problems. We
2094 consider ap, fp, sp, gp to be fixed for this purpose.
2096 We also consider CCmode registers to be fixed for this purpose;
2097 failure to do so leads to failure to simplify 0<100 type of
2100 On all machines, we can't record any global registers.
2101 Nor should we record any register that is in a small
2102 class, as defined by CLASS_LIKELY_SPILLED_P. */
2105 if (regno >= FIRST_PSEUDO_REGISTER)
2107 else if (x == frame_pointer_rtx
2108 || x == hard_frame_pointer_rtx
2109 || x == arg_pointer_rtx
2110 || x == stack_pointer_rtx
2111 || x == pic_offset_table_rtx)
2113 else if (global_regs[regno])
2115 else if (fixed_regs[regno])
2117 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2119 else if (SMALL_REGISTER_CLASSES)
2121 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2128 *do_not_record_p = 1;
2133 hash += ((unsigned int) REG << 7);
2134 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2138 /* We handle SUBREG of a REG specially because the underlying
2139 reg changes its hash value with every value change; we don't
2140 want to have to forget unrelated subregs when one subreg changes. */
2143 if (REG_P (SUBREG_REG (x)))
2145 hash += (((unsigned int) SUBREG << 7)
2146 + REGNO (SUBREG_REG (x))
2147 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2154 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2155 + (unsigned int) INTVAL (x));
2159 /* This is like the general case, except that it only counts
2160 the integers representing the constant. */
2161 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2162 if (GET_MODE (x) != VOIDmode)
2163 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2165 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2166 + (unsigned int) CONST_DOUBLE_HIGH (x));
2170 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2171 hash += fixed_hash (CONST_FIXED_VALUE (x));
2179 units = CONST_VECTOR_NUNITS (x);
2181 for (i = 0; i < units; ++i)
2183 elt = CONST_VECTOR_ELT (x, i);
2184 hash += hash_rtx_cb (elt, GET_MODE (elt),
2185 do_not_record_p, hash_arg_in_memory_p,
2192 /* Assume there is only one rtx object for any given label. */
2194 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2195 differences and differences between each stage's debugging dumps. */
2196 hash += (((unsigned int) LABEL_REF << 7)
2197 + CODE_LABEL_NUMBER (XEXP (x, 0)));
2202 /* Don't hash on the symbol's address to avoid bootstrap differences.
2203 Different hash values may cause expressions to be recorded in
2204 different orders and thus different registers to be used in the
2205 final assembler. This also avoids differences in the dump files
2206 between various stages. */
2208 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2211 h += (h << 7) + *p++; /* ??? revisit */
2213 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2218 /* We don't record if marked volatile or if BLKmode since we don't
2219 know the size of the move. */
2220 if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2222 *do_not_record_p = 1;
2225 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2226 *hash_arg_in_memory_p = 1;
2228 /* Now that we have already found this special case,
2229 might as well speed it up as much as possible. */
2230 hash += (unsigned) MEM;
2235 /* A USE that mentions non-volatile memory needs special
2236 handling since the MEM may be BLKmode which normally
2237 prevents an entry from being made. Pure calls are
2238 marked by a USE which mentions BLKmode memory.
2239 See calls.c:emit_call_1. */
2240 if (MEM_P (XEXP (x, 0))
2241 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2243 hash += (unsigned) USE;
2246 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2247 *hash_arg_in_memory_p = 1;
2249 /* Now that we have already found this special case,
2250 might as well speed it up as much as possible. */
2251 hash += (unsigned) MEM;
2266 case UNSPEC_VOLATILE:
2267 if (do_not_record_p) {
2268 *do_not_record_p = 1;
2276 if (do_not_record_p && MEM_VOLATILE_P (x))
2278 *do_not_record_p = 1;
2283 /* We don't want to take the filename and line into account. */
2284 hash += (unsigned) code + (unsigned) GET_MODE (x)
2285 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2286 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2287 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2289 if (ASM_OPERANDS_INPUT_LENGTH (x))
2291 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2293 hash += (hash_rtx_cb (ASM_OPERANDS_INPUT (x, i),
2294 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2295 do_not_record_p, hash_arg_in_memory_p,
2298 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2301 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2302 x = ASM_OPERANDS_INPUT (x, 0);
2303 mode = GET_MODE (x);
2315 i = GET_RTX_LENGTH (code) - 1;
2316 hash += (unsigned) code + (unsigned) GET_MODE (x);
2317 fmt = GET_RTX_FORMAT (code);
2323 /* If we are about to do the last recursive call
2324 needed at this level, change it into iteration.
2325 This function is called enough to be worth it. */
2332 hash += hash_rtx_cb (XEXP (x, i), 0, do_not_record_p,
2333 hash_arg_in_memory_p,
2338 for (j = 0; j < XVECLEN (x, i); j++)
2339 hash += hash_rtx_cb (XVECEXP (x, i, j), 0, do_not_record_p,
2340 hash_arg_in_memory_p,
2345 hash += hash_rtx_string (XSTR (x, i));
2349 hash += (unsigned int) XINT (x, i);
2364 /* Hash an rtx. We are careful to make sure the value is never negative.
2365 Equivalent registers hash identically.
2366 MODE is used in hashing for CONST_INTs only;
2367 otherwise the mode of X is used.
2369 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2371 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2372 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2374 Note that cse_insn knows that the hash code of a MEM expression
2375 is just (int) MEM plus the hash code of the address. */
2378 hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p,
2379 int *hash_arg_in_memory_p, bool have_reg_qty)
2381 return hash_rtx_cb (x, mode, do_not_record_p,
2382 hash_arg_in_memory_p, have_reg_qty, NULL);
2385 /* Hash an rtx X for cse via hash_rtx.
2386 Stores 1 in do_not_record if any subexpression is volatile.
2387 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2388 does not have the RTX_UNCHANGING_P bit set. */
2390 static inline unsigned
2391 canon_hash (rtx x, enum machine_mode mode)
2393 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2396 /* Like canon_hash but with no side effects, i.e. do_not_record
2397 and hash_arg_in_memory are not changed. */
2399 static inline unsigned
2400 safe_hash (rtx x, enum machine_mode mode)
2402 int dummy_do_not_record;
2403 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2406 /* Return 1 iff X and Y would canonicalize into the same thing,
2407 without actually constructing the canonicalization of either one.
2408 If VALIDATE is nonzero,
2409 we assume X is an expression being processed from the rtl
2410 and Y was found in the hash table. We check register refs
2411 in Y for being marked as valid.
2413 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2416 exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2422 /* Note: it is incorrect to assume an expression is equivalent to itself
2423 if VALIDATE is nonzero. */
2424 if (x == y && !validate)
2427 if (x == 0 || y == 0)
2430 code = GET_CODE (x);
2431 if (code != GET_CODE (y))
2434 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2435 if (GET_MODE (x) != GET_MODE (y))
2448 return XEXP (x, 0) == XEXP (y, 0);
2451 return XSTR (x, 0) == XSTR (y, 0);
2455 return REGNO (x) == REGNO (y);
2458 unsigned int regno = REGNO (y);
2460 unsigned int endregno = END_REGNO (y);
2462 /* If the quantities are not the same, the expressions are not
2463 equivalent. If there are and we are not to validate, they
2464 are equivalent. Otherwise, ensure all regs are up-to-date. */
2466 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2472 for (i = regno; i < endregno; i++)
2473 if (REG_IN_TABLE (i) != REG_TICK (i))
2482 /* A volatile mem should not be considered equivalent to any
2484 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2487 /* Can't merge two expressions in different alias sets, since we
2488 can decide that the expression is transparent in a block when
2489 it isn't, due to it being set with the different alias set.
2491 Also, can't merge two expressions with different MEM_ATTRS.
2492 They could e.g. be two different entities allocated into the
2493 same space on the stack (see e.g. PR25130). In that case, the
2494 MEM addresses can be the same, even though the two MEMs are
2495 absolutely not equivalent.
2497 But because really all MEM attributes should be the same for
2498 equivalent MEMs, we just use the invariant that MEMs that have
2499 the same attributes share the same mem_attrs data structure. */
2500 if (MEM_ATTRS (x) != MEM_ATTRS (y))
2505 /* For commutative operations, check both orders. */
2513 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2515 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2516 validate, for_gcse))
2517 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2519 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2520 validate, for_gcse)));
2523 /* We don't use the generic code below because we want to
2524 disregard filename and line numbers. */
2526 /* A volatile asm isn't equivalent to any other. */
2527 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2530 if (GET_MODE (x) != GET_MODE (y)
2531 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2532 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2533 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2534 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2535 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2538 if (ASM_OPERANDS_INPUT_LENGTH (x))
2540 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2541 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2542 ASM_OPERANDS_INPUT (y, i),
2544 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2545 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2555 /* Compare the elements. If any pair of corresponding elements
2556 fail to match, return 0 for the whole thing. */
2558 fmt = GET_RTX_FORMAT (code);
2559 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2564 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2565 validate, for_gcse))
2570 if (XVECLEN (x, i) != XVECLEN (y, i))
2572 for (j = 0; j < XVECLEN (x, i); j++)
2573 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2574 validate, for_gcse))
2579 if (strcmp (XSTR (x, i), XSTR (y, i)))
2584 if (XINT (x, i) != XINT (y, i))
2589 if (XWINT (x, i) != XWINT (y, i))
2605 /* Return 1 if X has a value that can vary even between two
2606 executions of the program. 0 means X can be compared reliably
2607 against certain constants or near-constants. */
2610 cse_rtx_varies_p (const_rtx x, bool from_alias)
2612 /* We need not check for X and the equivalence class being of the same
2613 mode because if X is equivalent to a constant in some mode, it
2614 doesn't vary in any mode. */
2617 && REGNO_QTY_VALID_P (REGNO (x)))
2619 int x_q = REG_QTY (REGNO (x));
2620 struct qty_table_elem *x_ent = &qty_table[x_q];
2622 if (GET_MODE (x) == x_ent->mode
2623 && x_ent->const_rtx != NULL_RTX)
2627 if (GET_CODE (x) == PLUS
2628 && GET_CODE (XEXP (x, 1)) == CONST_INT
2629 && REG_P (XEXP (x, 0))
2630 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2632 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2633 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2635 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2636 && x0_ent->const_rtx != NULL_RTX)
2640 /* This can happen as the result of virtual register instantiation, if
2641 the initial constant is too large to be a valid address. This gives
2642 us a three instruction sequence, load large offset into a register,
2643 load fp minus a constant into a register, then a MEM which is the
2644 sum of the two `constant' registers. */
2645 if (GET_CODE (x) == PLUS
2646 && REG_P (XEXP (x, 0))
2647 && REG_P (XEXP (x, 1))
2648 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2649 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2651 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2652 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2653 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2654 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2656 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2657 && x0_ent->const_rtx != NULL_RTX
2658 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2659 && x1_ent->const_rtx != NULL_RTX)
2663 return rtx_varies_p (x, from_alias);
2666 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2667 the result if necessary. INSN is as for canon_reg. */
2670 validate_canon_reg (rtx *xloc, rtx insn)
2674 rtx new_rtx = canon_reg (*xloc, insn);
2676 /* If replacing pseudo with hard reg or vice versa, ensure the
2677 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2678 gcc_assert (insn && new_rtx);
2679 validate_change (insn, xloc, new_rtx, 1);
2683 /* Canonicalize an expression:
2684 replace each register reference inside it
2685 with the "oldest" equivalent register.
2687 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2688 after we make our substitution. The calls are made with IN_GROUP nonzero
2689 so apply_change_group must be called upon the outermost return from this
2690 function (unless INSN is zero). The result of apply_change_group can
2691 generally be discarded since the changes we are making are optional. */
2694 canon_reg (rtx x, rtx insn)
2703 code = GET_CODE (x);
2723 struct qty_table_elem *ent;
2725 /* Never replace a hard reg, because hard regs can appear
2726 in more than one machine mode, and we must preserve the mode
2727 of each occurrence. Also, some hard regs appear in
2728 MEMs that are shared and mustn't be altered. Don't try to
2729 replace any reg that maps to a reg of class NO_REGS. */
2730 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2731 || ! REGNO_QTY_VALID_P (REGNO (x)))
2734 q = REG_QTY (REGNO (x));
2735 ent = &qty_table[q];
2736 first = ent->first_reg;
2737 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2738 : REGNO_REG_CLASS (first) == NO_REGS ? x
2739 : gen_rtx_REG (ent->mode, first));
2746 fmt = GET_RTX_FORMAT (code);
2747 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2752 validate_canon_reg (&XEXP (x, i), insn);
2753 else if (fmt[i] == 'E')
2754 for (j = 0; j < XVECLEN (x, i); j++)
2755 validate_canon_reg (&XVECEXP (x, i, j), insn);
2761 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2762 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2763 what values are being compared.
2765 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2766 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2767 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2768 compared to produce cc0.
2770 The return value is the comparison operator and is either the code of
2771 A or the code corresponding to the inverse of the comparison. */
2773 static enum rtx_code
2774 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2775 enum machine_mode *pmode1, enum machine_mode *pmode2)
2779 arg1 = *parg1, arg2 = *parg2;
2781 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2783 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2785 /* Set nonzero when we find something of interest. */
2787 int reverse_code = 0;
2788 struct table_elt *p = 0;
2790 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2791 On machines with CC0, this is the only case that can occur, since
2792 fold_rtx will return the COMPARE or item being compared with zero
2795 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2798 /* If ARG1 is a comparison operator and CODE is testing for
2799 STORE_FLAG_VALUE, get the inner arguments. */
2801 else if (COMPARISON_P (arg1))
2803 #ifdef FLOAT_STORE_FLAG_VALUE
2804 REAL_VALUE_TYPE fsfv;
2808 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2809 && code == LT && STORE_FLAG_VALUE == -1)
2810 #ifdef FLOAT_STORE_FLAG_VALUE
2811 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2812 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2813 REAL_VALUE_NEGATIVE (fsfv)))
2818 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2819 && code == GE && STORE_FLAG_VALUE == -1)
2820 #ifdef FLOAT_STORE_FLAG_VALUE
2821 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
2822 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2823 REAL_VALUE_NEGATIVE (fsfv)))
2826 x = arg1, reverse_code = 1;
2829 /* ??? We could also check for
2831 (ne (and (eq (...) (const_int 1))) (const_int 0))
2833 and related forms, but let's wait until we see them occurring. */
2836 /* Look up ARG1 in the hash table and see if it has an equivalence
2837 that lets us see what is being compared. */
2838 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
2841 p = p->first_same_value;
2843 /* If what we compare is already known to be constant, that is as
2845 We need to break the loop in this case, because otherwise we
2846 can have an infinite loop when looking at a reg that is known
2847 to be a constant which is the same as a comparison of a reg
2848 against zero which appears later in the insn stream, which in
2849 turn is constant and the same as the comparison of the first reg
2855 for (; p; p = p->next_same_value)
2857 enum machine_mode inner_mode = GET_MODE (p->exp);
2858 #ifdef FLOAT_STORE_FLAG_VALUE
2859 REAL_VALUE_TYPE fsfv;
2862 /* If the entry isn't valid, skip it. */
2863 if (! exp_equiv_p (p->exp, p->exp, 1, false))
2866 if (GET_CODE (p->exp) == COMPARE
2867 /* Another possibility is that this machine has a compare insn
2868 that includes the comparison code. In that case, ARG1 would
2869 be equivalent to a comparison operation that would set ARG1 to
2870 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2871 ORIG_CODE is the actual comparison being done; if it is an EQ,
2872 we must reverse ORIG_CODE. On machine with a negative value
2873 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2876 && GET_MODE_CLASS (inner_mode) == MODE_INT
2877 && (GET_MODE_BITSIZE (inner_mode)
2878 <= HOST_BITS_PER_WIDE_INT)
2879 && (STORE_FLAG_VALUE
2880 & ((HOST_WIDE_INT) 1
2881 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2882 #ifdef FLOAT_STORE_FLAG_VALUE
2884 && SCALAR_FLOAT_MODE_P (inner_mode)
2885 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2886 REAL_VALUE_NEGATIVE (fsfv)))
2889 && COMPARISON_P (p->exp)))
2894 else if ((code == EQ
2896 && GET_MODE_CLASS (inner_mode) == MODE_INT
2897 && (GET_MODE_BITSIZE (inner_mode)
2898 <= HOST_BITS_PER_WIDE_INT)
2899 && (STORE_FLAG_VALUE
2900 & ((HOST_WIDE_INT) 1
2901 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2902 #ifdef FLOAT_STORE_FLAG_VALUE
2904 && SCALAR_FLOAT_MODE_P (inner_mode)
2905 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2906 REAL_VALUE_NEGATIVE (fsfv)))
2909 && COMPARISON_P (p->exp))
2916 /* If this non-trapping address, e.g. fp + constant, the
2917 equivalent is a better operand since it may let us predict
2918 the value of the comparison. */
2919 else if (!rtx_addr_can_trap_p (p->exp))
2926 /* If we didn't find a useful equivalence for ARG1, we are done.
2927 Otherwise, set up for the next iteration. */
2931 /* If we need to reverse the comparison, make sure that that is
2932 possible -- we can't necessarily infer the value of GE from LT
2933 with floating-point operands. */
2936 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
2937 if (reversed == UNKNOWN)
2942 else if (COMPARISON_P (x))
2943 code = GET_CODE (x);
2944 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2947 /* Return our results. Return the modes from before fold_rtx
2948 because fold_rtx might produce const_int, and then it's too late. */
2949 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2950 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2955 /* If X is a nontrivial arithmetic operation on an argument for which
2956 a constant value can be determined, return the result of operating
2957 on that value, as a constant. Otherwise, return X, possibly with
2958 one or more operands changed to a forward-propagated constant.
2960 If X is a register whose contents are known, we do NOT return
2961 those contents here; equiv_constant is called to perform that task.
2962 For SUBREGs and MEMs, we do that both here and in equiv_constant.
2964 INSN is the insn that we may be modifying. If it is 0, make a copy
2965 of X before modifying it. */
2968 fold_rtx (rtx x, rtx insn)
2971 enum machine_mode mode;
2977 /* Operands of X. */
2981 /* Constant equivalents of first three operands of X;
2982 0 when no such equivalent is known. */
2987 /* The mode of the first operand of X. We need this for sign and zero
2989 enum machine_mode mode_arg0;
2994 /* Try to perform some initial simplifications on X. */
2995 code = GET_CODE (x);
3000 if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3013 /* No use simplifying an EXPR_LIST
3014 since they are used only for lists of args
3015 in a function call's REG_EQUAL note. */
3021 return prev_insn_cc0;
3027 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3028 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3029 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3033 #ifdef NO_FUNCTION_CSE
3035 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3040 /* Anything else goes through the loop below. */
3045 mode = GET_MODE (x);
3049 mode_arg0 = VOIDmode;
3051 /* Try folding our operands.
3052 Then see which ones have constant values known. */
3054 fmt = GET_RTX_FORMAT (code);
3055 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3058 rtx folded_arg = XEXP (x, i), const_arg;
3059 enum machine_mode mode_arg = GET_MODE (folded_arg);
3061 switch (GET_CODE (folded_arg))
3066 const_arg = equiv_constant (folded_arg);
3076 const_arg = folded_arg;
3081 folded_arg = prev_insn_cc0;
3082 mode_arg = prev_insn_cc0_mode;
3083 const_arg = equiv_constant (folded_arg);
3088 folded_arg = fold_rtx (folded_arg, insn);
3089 const_arg = equiv_constant (folded_arg);
3093 /* For the first three operands, see if the operand
3094 is constant or equivalent to a constant. */
3098 folded_arg0 = folded_arg;
3099 const_arg0 = const_arg;
3100 mode_arg0 = mode_arg;
3103 folded_arg1 = folded_arg;
3104 const_arg1 = const_arg;
3107 const_arg2 = const_arg;
3111 /* Pick the least expensive of the argument and an equivalent constant
3114 && const_arg != folded_arg
3115 && COST_IN (const_arg, code) <= COST_IN (folded_arg, code)
3117 /* It's not safe to substitute the operand of a conversion
3118 operator with a constant, as the conversion's identity
3119 depends upon the mode of its operand. This optimization
3120 is handled by the call to simplify_unary_operation. */
3121 && (GET_RTX_CLASS (code) != RTX_UNARY
3122 || GET_MODE (const_arg) == mode_arg0
3123 || (code != ZERO_EXTEND
3124 && code != SIGN_EXTEND
3126 && code != FLOAT_TRUNCATE
3127 && code != FLOAT_EXTEND
3130 && code != UNSIGNED_FLOAT
3131 && code != UNSIGNED_FIX)))
3132 folded_arg = const_arg;
3134 if (folded_arg == XEXP (x, i))
3137 if (insn == NULL_RTX && !changed)
3140 validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3145 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3146 consistent with the order in X. */
3147 if (canonicalize_change_group (insn, x))
3150 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3151 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3154 apply_change_group ();
3157 /* If X is an arithmetic operation, see if we can simplify it. */
3159 switch (GET_RTX_CLASS (code))
3163 /* We can't simplify extension ops unless we know the
3165 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3166 && mode_arg0 == VOIDmode)
3169 new_rtx = simplify_unary_operation (code, mode,
3170 const_arg0 ? const_arg0 : folded_arg0,
3176 case RTX_COMM_COMPARE:
3177 /* See what items are actually being compared and set FOLDED_ARG[01]
3178 to those values and CODE to the actual comparison code. If any are
3179 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3180 do anything if both operands are already known to be constant. */
3182 /* ??? Vector mode comparisons are not supported yet. */
3183 if (VECTOR_MODE_P (mode))
3186 if (const_arg0 == 0 || const_arg1 == 0)
3188 struct table_elt *p0, *p1;
3189 rtx true_rtx, false_rtx;
3190 enum machine_mode mode_arg1;
3192 if (SCALAR_FLOAT_MODE_P (mode))
3194 #ifdef FLOAT_STORE_FLAG_VALUE
3195 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3196 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3198 true_rtx = NULL_RTX;
3200 false_rtx = CONST0_RTX (mode);
3204 true_rtx = const_true_rtx;
3205 false_rtx = const0_rtx;
3208 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3209 &mode_arg0, &mode_arg1);
3211 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3212 what kinds of things are being compared, so we can't do
3213 anything with this comparison. */
3215 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3218 const_arg0 = equiv_constant (folded_arg0);
3219 const_arg1 = equiv_constant (folded_arg1);
3221 /* If we do not now have two constants being compared, see
3222 if we can nevertheless deduce some things about the
3224 if (const_arg0 == 0 || const_arg1 == 0)
3226 if (const_arg1 != NULL)
3228 rtx cheapest_simplification;
3231 struct table_elt *p;
3233 /* See if we can find an equivalent of folded_arg0
3234 that gets us a cheaper expression, possibly a
3235 constant through simplifications. */
3236 p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3241 cheapest_simplification = x;
3242 cheapest_cost = COST (x);
3244 for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3248 /* If the entry isn't valid, skip it. */
3249 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3252 /* Try to simplify using this equivalence. */
3254 = simplify_relational_operation (code, mode,
3259 if (simp_result == NULL)
3262 cost = COST (simp_result);
3263 if (cost < cheapest_cost)
3265 cheapest_cost = cost;
3266 cheapest_simplification = simp_result;
3270 /* If we have a cheaper expression now, use that
3271 and try folding it further, from the top. */
3272 if (cheapest_simplification != x)
3273 return fold_rtx (copy_rtx (cheapest_simplification),
3278 /* See if the two operands are the same. */
3280 if ((REG_P (folded_arg0)
3281 && REG_P (folded_arg1)
3282 && (REG_QTY (REGNO (folded_arg0))
3283 == REG_QTY (REGNO (folded_arg1))))
3284 || ((p0 = lookup (folded_arg0,
3285 SAFE_HASH (folded_arg0, mode_arg0),
3287 && (p1 = lookup (folded_arg1,
3288 SAFE_HASH (folded_arg1, mode_arg0),
3290 && p0->first_same_value == p1->first_same_value))
3291 folded_arg1 = folded_arg0;
3293 /* If FOLDED_ARG0 is a register, see if the comparison we are
3294 doing now is either the same as we did before or the reverse
3295 (we only check the reverse if not floating-point). */
3296 else if (REG_P (folded_arg0))
3298 int qty = REG_QTY (REGNO (folded_arg0));
3300 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3302 struct qty_table_elem *ent = &qty_table[qty];
3304 if ((comparison_dominates_p (ent->comparison_code, code)
3305 || (! FLOAT_MODE_P (mode_arg0)
3306 && comparison_dominates_p (ent->comparison_code,
3307 reverse_condition (code))))
3308 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3310 && rtx_equal_p (ent->comparison_const,
3312 || (REG_P (folded_arg1)
3313 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3315 if (comparison_dominates_p (ent->comparison_code, code))
3330 /* If we are comparing against zero, see if the first operand is
3331 equivalent to an IOR with a constant. If so, we may be able to
3332 determine the result of this comparison. */
3333 if (const_arg1 == const0_rtx && !const_arg0)
3335 rtx y = lookup_as_function (folded_arg0, IOR);
3339 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3340 && GET_CODE (inner_const) == CONST_INT
3341 && INTVAL (inner_const) != 0)
3342 folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3346 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3347 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3348 new_rtx = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3353 case RTX_COMM_ARITH:
3357 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3358 with that LABEL_REF as its second operand. If so, the result is
3359 the first operand of that MINUS. This handles switches with an
3360 ADDR_DIFF_VEC table. */
3361 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3364 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3365 : lookup_as_function (folded_arg0, MINUS);
3367 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3368 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3371 /* Now try for a CONST of a MINUS like the above. */
3372 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3373 : lookup_as_function (folded_arg0, CONST))) != 0
3374 && GET_CODE (XEXP (y, 0)) == MINUS
3375 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3376 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3377 return XEXP (XEXP (y, 0), 0);
3380 /* Likewise if the operands are in the other order. */
3381 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3384 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3385 : lookup_as_function (folded_arg1, MINUS);
3387 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3388 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3391 /* Now try for a CONST of a MINUS like the above. */
3392 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3393 : lookup_as_function (folded_arg1, CONST))) != 0
3394 && GET_CODE (XEXP (y, 0)) == MINUS
3395 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3396 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
3397 return XEXP (XEXP (y, 0), 0);
3400 /* If second operand is a register equivalent to a negative
3401 CONST_INT, see if we can find a register equivalent to the
3402 positive constant. Make a MINUS if so. Don't do this for
3403 a non-negative constant since we might then alternate between
3404 choosing positive and negative constants. Having the positive
3405 constant previously-used is the more common case. Be sure
3406 the resulting constant is non-negative; if const_arg1 were
3407 the smallest negative number this would overflow: depending
3408 on the mode, this would either just be the same value (and
3409 hence not save anything) or be incorrect. */
3410 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
3411 && INTVAL (const_arg1) < 0
3412 /* This used to test
3414 -INTVAL (const_arg1) >= 0
3416 But The Sun V5.0 compilers mis-compiled that test. So
3417 instead we test for the problematic value in a more direct
3418 manner and hope the Sun compilers get it correct. */
3419 && INTVAL (const_arg1) !=
3420 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3421 && REG_P (folded_arg1))
3423 rtx new_const = GEN_INT (-INTVAL (const_arg1));
3425 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3428 for (p = p->first_same_value; p; p = p->next_same_value)
3430 return simplify_gen_binary (MINUS, mode, folded_arg0,
3431 canon_reg (p->exp, NULL_RTX));
3436 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3437 If so, produce (PLUS Z C2-C). */
3438 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
3440 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3441 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
3442 return fold_rtx (plus_constant (copy_rtx (y),
3443 -INTVAL (const_arg1)),
3450 case SMIN: case SMAX: case UMIN: case UMAX:
3451 case IOR: case AND: case XOR:
3453 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3454 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3455 is known to be of similar form, we may be able to replace the
3456 operation with a combined operation. This may eliminate the
3457 intermediate operation if every use is simplified in this way.
3458 Note that the similar optimization done by combine.c only works
3459 if the intermediate operation's result has only one reference. */
3461 if (REG_P (folded_arg0)
3462 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
3465 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3466 rtx y, inner_const, new_const;
3467 enum rtx_code associate_code;
3470 && (INTVAL (const_arg1) >= GET_MODE_BITSIZE (mode)
3471 || INTVAL (const_arg1) < 0))
3473 if (SHIFT_COUNT_TRUNCATED)
3474 const_arg1 = GEN_INT (INTVAL (const_arg1)
3475 & (GET_MODE_BITSIZE (mode) - 1));
3480 y = lookup_as_function (folded_arg0, code);
3484 /* If we have compiled a statement like
3485 "if (x == (x & mask1))", and now are looking at
3486 "x & mask2", we will have a case where the first operand
3487 of Y is the same as our first operand. Unless we detect
3488 this case, an infinite loop will result. */
3489 if (XEXP (y, 0) == folded_arg0)
3492 inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3493 if (!inner_const || GET_CODE (inner_const) != CONST_INT)
3496 /* Don't associate these operations if they are a PLUS with the
3497 same constant and it is a power of two. These might be doable
3498 with a pre- or post-increment. Similarly for two subtracts of
3499 identical powers of two with post decrement. */
3501 if (code == PLUS && const_arg1 == inner_const
3502 && ((HAVE_PRE_INCREMENT
3503 && exact_log2 (INTVAL (const_arg1)) >= 0)
3504 || (HAVE_POST_INCREMENT
3505 && exact_log2 (INTVAL (const_arg1)) >= 0)
3506 || (HAVE_PRE_DECREMENT
3507 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3508 || (HAVE_POST_DECREMENT
3509 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3512 /* ??? Vector mode shifts by scalar
3513 shift operand are not supported yet. */
3514 if (is_shift && VECTOR_MODE_P (mode))
3518 && (INTVAL (inner_const) >= GET_MODE_BITSIZE (mode)
3519 || INTVAL (inner_const) < 0))
3521 if (SHIFT_COUNT_TRUNCATED)
3522 inner_const = GEN_INT (INTVAL (inner_const)
3523 & (GET_MODE_BITSIZE (mode) - 1));
3528 /* Compute the code used to compose the constants. For example,
3529 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3531 associate_code = (is_shift || code == MINUS ? PLUS : code);
3533 new_const = simplify_binary_operation (associate_code, mode,
3534 const_arg1, inner_const);
3539 /* If we are associating shift operations, don't let this
3540 produce a shift of the size of the object or larger.
3541 This could occur when we follow a sign-extend by a right
3542 shift on a machine that does a sign-extend as a pair
3546 && GET_CODE (new_const) == CONST_INT
3547 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
3549 /* As an exception, we can turn an ASHIFTRT of this
3550 form into a shift of the number of bits - 1. */
3551 if (code == ASHIFTRT)
3552 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3553 else if (!side_effects_p (XEXP (y, 0)))
3554 return CONST0_RTX (mode);
3559 y = copy_rtx (XEXP (y, 0));
3561 /* If Y contains our first operand (the most common way this
3562 can happen is if Y is a MEM), we would do into an infinite
3563 loop if we tried to fold it. So don't in that case. */
3565 if (! reg_mentioned_p (folded_arg0, y))
3566 y = fold_rtx (y, insn);
3568 return simplify_gen_binary (code, mode, y, new_const);
3572 case DIV: case UDIV:
3573 /* ??? The associative optimization performed immediately above is
3574 also possible for DIV and UDIV using associate_code of MULT.
3575 However, we would need extra code to verify that the
3576 multiplication does not overflow, that is, there is no overflow
3577 in the calculation of new_const. */
3584 new_rtx = simplify_binary_operation (code, mode,
3585 const_arg0 ? const_arg0 : folded_arg0,
3586 const_arg1 ? const_arg1 : folded_arg1);
3590 /* (lo_sum (high X) X) is simply X. */
3591 if (code == LO_SUM && const_arg0 != 0
3592 && GET_CODE (const_arg0) == HIGH
3593 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3598 case RTX_BITFIELD_OPS:
3599 new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3600 const_arg0 ? const_arg0 : folded_arg0,
3601 const_arg1 ? const_arg1 : folded_arg1,
3602 const_arg2 ? const_arg2 : XEXP (x, 2));
3609 return new_rtx ? new_rtx : x;
3612 /* Return a constant value currently equivalent to X.
3613 Return 0 if we don't know one. */
3616 equiv_constant (rtx x)
3619 && REGNO_QTY_VALID_P (REGNO (x)))
3621 int x_q = REG_QTY (REGNO (x));
3622 struct qty_table_elem *x_ent = &qty_table[x_q];
3624 if (x_ent->const_rtx)
3625 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3628 if (x == 0 || CONSTANT_P (x))
3631 if (GET_CODE (x) == SUBREG)
3633 enum machine_mode mode = GET_MODE (x);
3634 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3637 /* See if we previously assigned a constant value to this SUBREG. */
3638 if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3639 || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3640 || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3643 /* If we didn't and if doing so makes sense, see if we previously
3644 assigned a constant value to the enclosing word mode SUBREG. */
3645 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode)
3646 && GET_MODE_SIZE (word_mode) < GET_MODE_SIZE (imode))
3648 int byte = SUBREG_BYTE (x) - subreg_lowpart_offset (mode, word_mode);
3649 if (byte >= 0 && (byte % UNITS_PER_WORD) == 0)
3651 rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte);
3652 new_rtx = lookup_as_function (y, CONST_INT);
3654 return gen_lowpart (mode, new_rtx);
3658 /* Otherwise see if we already have a constant for the inner REG. */
3659 if (REG_P (SUBREG_REG (x))
3660 && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3661 return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
3666 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3667 the hash table in case its value was seen before. */
3671 struct table_elt *elt;
3673 x = avoid_constant_pool_reference (x);
3677 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3681 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3682 if (elt->is_const && CONSTANT_P (elt->exp))
3689 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3692 In certain cases, this can cause us to add an equivalence. For example,
3693 if we are following the taken case of
3695 we can add the fact that `i' and '2' are now equivalent.
3697 In any case, we can record that this comparison was passed. If the same
3698 comparison is seen later, we will know its value. */
3701 record_jump_equiv (rtx insn, bool taken)
3703 int cond_known_true;
3706 enum machine_mode mode, mode0, mode1;
3707 int reversed_nonequality = 0;
3710 /* Ensure this is the right kind of insn. */
3711 gcc_assert (any_condjump_p (insn));
3713 set = pc_set (insn);
3715 /* See if this jump condition is known true or false. */
3717 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3719 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3721 /* Get the type of comparison being done and the operands being compared.
3722 If we had to reverse a non-equality condition, record that fact so we
3723 know that it isn't valid for floating-point. */
3724 code = GET_CODE (XEXP (SET_SRC (set), 0));
3725 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3726 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3728 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3729 if (! cond_known_true)
3731 code = reversed_comparison_code_parts (code, op0, op1, insn);
3733 /* Don't remember if we can't find the inverse. */
3734 if (code == UNKNOWN)
3738 /* The mode is the mode of the non-constant. */
3740 if (mode1 != VOIDmode)
3743 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
3746 /* Yet another form of subreg creation. In this case, we want something in
3747 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3750 record_jump_cond_subreg (enum machine_mode mode, rtx op)
3752 enum machine_mode op_mode = GET_MODE (op);
3753 if (op_mode == mode || op_mode == VOIDmode)
3755 return lowpart_subreg (mode, op, op_mode);
3758 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3759 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3760 Make any useful entries we can with that information. Called from
3761 above function and called recursively. */
3764 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
3765 rtx op1, int reversed_nonequality)
3767 unsigned op0_hash, op1_hash;
3768 int op0_in_memory, op1_in_memory;
3769 struct table_elt *op0_elt, *op1_elt;
3771 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3772 we know that they are also equal in the smaller mode (this is also
3773 true for all smaller modes whether or not there is a SUBREG, but
3774 is not worth testing for with no SUBREG). */
3776 /* Note that GET_MODE (op0) may not equal MODE. */
3777 if (code == EQ && GET_CODE (op0) == SUBREG
3778 && (GET_MODE_SIZE (GET_MODE (op0))
3779 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3781 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3782 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3784 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3785 reversed_nonequality);
3788 if (code == EQ && GET_CODE (op1) == SUBREG
3789 && (GET_MODE_SIZE (GET_MODE (op1))
3790 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
3792 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3793 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3795 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3796 reversed_nonequality);
3799 /* Similarly, if this is an NE comparison, and either is a SUBREG
3800 making a smaller mode, we know the whole thing is also NE. */
3802 /* Note that GET_MODE (op0) may not equal MODE;
3803 if we test MODE instead, we can get an infinite recursion
3804 alternating between two modes each wider than MODE. */
3806 if (code == NE && GET_CODE (op0) == SUBREG
3807 && subreg_lowpart_p (op0)
3808 && (GET_MODE_SIZE (GET_MODE (op0))
3809 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3811 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3812 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3814 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3815 reversed_nonequality);
3818 if (code == NE && GET_CODE (op1) == SUBREG
3819 && subreg_lowpart_p (op1)
3820 && (GET_MODE_SIZE (GET_MODE (op1))
3821 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
3823 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3824 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3826 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3827 reversed_nonequality);
3830 /* Hash both operands. */
3833 hash_arg_in_memory = 0;
3834 op0_hash = HASH (op0, mode);
3835 op0_in_memory = hash_arg_in_memory;
3841 hash_arg_in_memory = 0;
3842 op1_hash = HASH (op1, mode);
3843 op1_in_memory = hash_arg_in_memory;
3848 /* Look up both operands. */
3849 op0_elt = lookup (op0, op0_hash, mode);
3850 op1_elt = lookup (op1, op1_hash, mode);
3852 /* If both operands are already equivalent or if they are not in the
3853 table but are identical, do nothing. */
3854 if ((op0_elt != 0 && op1_elt != 0
3855 && op0_elt->first_same_value == op1_elt->first_same_value)
3856 || op0 == op1 || rtx_equal_p (op0, op1))
3859 /* If we aren't setting two things equal all we can do is save this
3860 comparison. Similarly if this is floating-point. In the latter
3861 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
3862 If we record the equality, we might inadvertently delete code
3863 whose intent was to change -0 to +0. */
3865 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
3867 struct qty_table_elem *ent;
3870 /* If we reversed a floating-point comparison, if OP0 is not a
3871 register, or if OP1 is neither a register or constant, we can't
3875 op1 = equiv_constant (op1);
3877 if ((reversed_nonequality && FLOAT_MODE_P (mode))
3878 || !REG_P (op0) || op1 == 0)
3881 /* Put OP0 in the hash table if it isn't already. This gives it a
3882 new quantity number. */
3885 if (insert_regs (op0, NULL, 0))
3887 rehash_using_reg (op0);
3888 op0_hash = HASH (op0, mode);
3890 /* If OP0 is contained in OP1, this changes its hash code
3891 as well. Faster to rehash than to check, except
3892 for the simple case of a constant. */
3893 if (! CONSTANT_P (op1))
3894 op1_hash = HASH (op1,mode);
3897 op0_elt = insert (op0, NULL, op0_hash, mode);
3898 op0_elt->in_memory = op0_in_memory;
3901 qty = REG_QTY (REGNO (op0));
3902 ent = &qty_table[qty];
3904 ent->comparison_code = code;
3907 /* Look it up again--in case op0 and op1 are the same. */
3908 op1_elt = lookup (op1, op1_hash, mode);
3910 /* Put OP1 in the hash table so it gets a new quantity number. */
3913 if (insert_regs (op1, NULL, 0))
3915 rehash_using_reg (op1);
3916 op1_hash = HASH (op1, mode);
3919 op1_elt = insert (op1, NULL, op1_hash, mode);
3920 op1_elt->in_memory = op1_in_memory;
3923 ent->comparison_const = NULL_RTX;
3924 ent->comparison_qty = REG_QTY (REGNO (op1));
3928 ent->comparison_const = op1;
3929 ent->comparison_qty = -1;
3935 /* If either side is still missing an equivalence, make it now,
3936 then merge the equivalences. */
3940 if (insert_regs (op0, NULL, 0))
3942 rehash_using_reg (op0);
3943 op0_hash = HASH (op0, mode);
3946 op0_elt = insert (op0, NULL, op0_hash, mode);
3947 op0_elt->in_memory = op0_in_memory;
3952 if (insert_regs (op1, NULL, 0))
3954 rehash_using_reg (op1);
3955 op1_hash = HASH (op1, mode);
3958 op1_elt = insert (op1, NULL, op1_hash, mode);
3959 op1_elt->in_memory = op1_in_memory;
3962 merge_equiv_classes (op0_elt, op1_elt);
3965 /* CSE processing for one instruction.
3966 First simplify sources and addresses of all assignments
3967 in the instruction, using previously-computed equivalents values.
3968 Then install the new sources and destinations in the table
3969 of available values. */
3971 /* Data on one SET contained in the instruction. */
3975 /* The SET rtx itself. */
3977 /* The SET_SRC of the rtx (the original value, if it is changing). */
3979 /* The hash-table element for the SET_SRC of the SET. */
3980 struct table_elt *src_elt;
3981 /* Hash value for the SET_SRC. */
3983 /* Hash value for the SET_DEST. */
3985 /* The SET_DEST, with SUBREG, etc., stripped. */
3987 /* Nonzero if the SET_SRC is in memory. */
3989 /* Nonzero if the SET_SRC contains something
3990 whose value cannot be predicted and understood. */
3992 /* Original machine mode, in case it becomes a CONST_INT.
3993 The size of this field should match the size of the mode
3994 field of struct rtx_def (see rtl.h). */
3995 ENUM_BITFIELD(machine_mode) mode : 8;
3996 /* A constant equivalent for SET_SRC, if any. */
3998 /* Hash value of constant equivalent for SET_SRC. */
3999 unsigned src_const_hash;
4000 /* Table entry for constant equivalent for SET_SRC, if any. */
4001 struct table_elt *src_const_elt;
4002 /* Table entry for the destination address. */
4003 struct table_elt *dest_addr_elt;
4009 rtx x = PATTERN (insn);
4015 struct table_elt *src_eqv_elt = 0;
4016 int src_eqv_volatile = 0;
4017 int src_eqv_in_memory = 0;
4018 unsigned src_eqv_hash = 0;
4020 struct set *sets = (struct set *) 0;
4024 /* Records what this insn does to set CC0. */
4026 this_insn_cc0_mode = VOIDmode;
4029 /* Find all the SETs and CLOBBERs in this instruction.
4030 Record all the SETs in the array `set' and count them.
4031 Also determine whether there is a CLOBBER that invalidates
4032 all memory references, or all references at varying addresses. */
4036 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4038 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4039 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4040 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4044 if (GET_CODE (x) == SET)
4046 sets = XALLOCA (struct set);
4049 /* Ignore SETs that are unconditional jumps.
4050 They never need cse processing, so this does not hurt.
4051 The reason is not efficiency but rather
4052 so that we can test at the end for instructions
4053 that have been simplified to unconditional jumps
4054 and not be misled by unchanged instructions
4055 that were unconditional jumps to begin with. */
4056 if (SET_DEST (x) == pc_rtx
4057 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4060 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4061 The hard function value register is used only once, to copy to
4062 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4063 Ensure we invalidate the destination register. On the 80386 no
4064 other code would invalidate it since it is a fixed_reg.
4065 We need not check the return of apply_change_group; see canon_reg. */
4067 else if (GET_CODE (SET_SRC (x)) == CALL)
4069 canon_reg (SET_SRC (x), insn);
4070 apply_change_group ();
4071 fold_rtx (SET_SRC (x), insn);
4072 invalidate (SET_DEST (x), VOIDmode);
4077 else if (GET_CODE (x) == PARALLEL)
4079 int lim = XVECLEN (x, 0);
4081 sets = XALLOCAVEC (struct set, lim);
4083 /* Find all regs explicitly clobbered in this insn,
4084 and ensure they are not replaced with any other regs
4085 elsewhere in this insn.
4086 When a reg that is clobbered is also used for input,
4087 we should presume that that is for a reason,
4088 and we should not substitute some other register
4089 which is not supposed to be clobbered.
4090 Therefore, this loop cannot be merged into the one below
4091 because a CALL may precede a CLOBBER and refer to the
4092 value clobbered. We must not let a canonicalization do
4093 anything in that case. */
4094 for (i = 0; i < lim; i++)
4096 rtx y = XVECEXP (x, 0, i);
4097 if (GET_CODE (y) == CLOBBER)
4099 rtx clobbered = XEXP (y, 0);
4101 if (REG_P (clobbered)
4102 || GET_CODE (clobbered) == SUBREG)
4103 invalidate (clobbered, VOIDmode);
4104 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4105 || GET_CODE (clobbered) == ZERO_EXTRACT)
4106 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4110 for (i = 0; i < lim; i++)
4112 rtx y = XVECEXP (x, 0, i);
4113 if (GET_CODE (y) == SET)
4115 /* As above, we ignore unconditional jumps and call-insns and
4116 ignore the result of apply_change_group. */
4117 if (GET_CODE (SET_SRC (y)) == CALL)
4119 canon_reg (SET_SRC (y), insn);
4120 apply_change_group ();
4121 fold_rtx (SET_SRC (y), insn);
4122 invalidate (SET_DEST (y), VOIDmode);
4124 else if (SET_DEST (y) == pc_rtx
4125 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4128 sets[n_sets++].rtl = y;
4130 else if (GET_CODE (y) == CLOBBER)
4132 /* If we clobber memory, canon the address.
4133 This does nothing when a register is clobbered
4134 because we have already invalidated the reg. */
4135 if (MEM_P (XEXP (y, 0)))
4136 canon_reg (XEXP (y, 0), insn);
4138 else if (GET_CODE (y) == USE
4139 && ! (REG_P (XEXP (y, 0))
4140 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4141 canon_reg (y, insn);
4142 else if (GET_CODE (y) == CALL)
4144 /* The result of apply_change_group can be ignored; see
4146 canon_reg (y, insn);
4147 apply_change_group ();
4152 else if (GET_CODE (x) == CLOBBER)
4154 if (MEM_P (XEXP (x, 0)))
4155 canon_reg (XEXP (x, 0), insn);
4158 /* Canonicalize a USE of a pseudo register or memory location. */
4159 else if (GET_CODE (x) == USE
4160 && ! (REG_P (XEXP (x, 0))
4161 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4162 canon_reg (XEXP (x, 0), insn);
4163 else if (GET_CODE (x) == CALL)
4165 /* The result of apply_change_group can be ignored; see canon_reg. */
4166 canon_reg (x, insn);
4167 apply_change_group ();
4171 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4172 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4173 is handled specially for this case, and if it isn't set, then there will
4174 be no equivalence for the destination. */
4175 if (n_sets == 1 && REG_NOTES (insn) != 0
4176 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4177 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4178 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4180 /* The result of apply_change_group can be ignored; see canon_reg. */
4181 canon_reg (XEXP (tem, 0), insn);
4182 apply_change_group ();
4183 src_eqv = fold_rtx (XEXP (tem, 0), insn);
4184 XEXP (tem, 0) = copy_rtx (src_eqv);
4185 df_notes_rescan (insn);
4188 /* Canonicalize sources and addresses of destinations.
4189 We do this in a separate pass to avoid problems when a MATCH_DUP is
4190 present in the insn pattern. In that case, we want to ensure that
4191 we don't break the duplicate nature of the pattern. So we will replace
4192 both operands at the same time. Otherwise, we would fail to find an
4193 equivalent substitution in the loop calling validate_change below.
4195 We used to suppress canonicalization of DEST if it appears in SRC,
4196 but we don't do this any more. */
4198 for (i = 0; i < n_sets; i++)
4200 rtx dest = SET_DEST (sets[i].rtl);
4201 rtx src = SET_SRC (sets[i].rtl);
4202 rtx new_rtx = canon_reg (src, insn);
4204 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4206 if (GET_CODE (dest) == ZERO_EXTRACT)
4208 validate_change (insn, &XEXP (dest, 1),
4209 canon_reg (XEXP (dest, 1), insn), 1);
4210 validate_change (insn, &XEXP (dest, 2),
4211 canon_reg (XEXP (dest, 2), insn), 1);
4214 while (GET_CODE (dest) == SUBREG
4215 || GET_CODE (dest) == ZERO_EXTRACT
4216 || GET_CODE (dest) == STRICT_LOW_PART)
4217 dest = XEXP (dest, 0);
4220 canon_reg (dest, insn);
4223 /* Now that we have done all the replacements, we can apply the change
4224 group and see if they all work. Note that this will cause some
4225 canonicalizations that would have worked individually not to be applied
4226 because some other canonicalization didn't work, but this should not
4229 The result of apply_change_group can be ignored; see canon_reg. */
4231 apply_change_group ();
4233 /* Set sets[i].src_elt to the class each source belongs to.
4234 Detect assignments from or to volatile things
4235 and set set[i] to zero so they will be ignored
4236 in the rest of this function.
4238 Nothing in this loop changes the hash table or the register chains. */
4240 for (i = 0; i < n_sets; i++)
4244 struct table_elt *elt = 0, *p;
4245 enum machine_mode mode;
4248 rtx src_related = 0;
4249 struct table_elt *src_const_elt = 0;
4250 int src_cost = MAX_COST;
4251 int src_eqv_cost = MAX_COST;
4252 int src_folded_cost = MAX_COST;
4253 int src_related_cost = MAX_COST;
4254 int src_elt_cost = MAX_COST;
4255 int src_regcost = MAX_COST;
4256 int src_eqv_regcost = MAX_COST;
4257 int src_folded_regcost = MAX_COST;
4258 int src_related_regcost = MAX_COST;
4259 int src_elt_regcost = MAX_COST;
4260 /* Set nonzero if we need to call force_const_mem on with the
4261 contents of src_folded before using it. */
4262 int src_folded_force_flag = 0;
4264 dest = SET_DEST (sets[i].rtl);
4265 src = SET_SRC (sets[i].rtl);
4267 /* If SRC is a constant that has no machine mode,
4268 hash it with the destination's machine mode.
4269 This way we can keep different modes separate. */
4271 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4272 sets[i].mode = mode;
4276 enum machine_mode eqvmode = mode;
4277 if (GET_CODE (dest) == STRICT_LOW_PART)
4278 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4280 hash_arg_in_memory = 0;
4281 src_eqv_hash = HASH (src_eqv, eqvmode);
4283 /* Find the equivalence class for the equivalent expression. */
4286 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4288 src_eqv_volatile = do_not_record;
4289 src_eqv_in_memory = hash_arg_in_memory;
4292 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4293 value of the INNER register, not the destination. So it is not
4294 a valid substitution for the source. But save it for later. */
4295 if (GET_CODE (dest) == STRICT_LOW_PART)
4298 src_eqv_here = src_eqv;
4300 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4301 simplified result, which may not necessarily be valid. */
4302 src_folded = fold_rtx (src, insn);
4305 /* ??? This caused bad code to be generated for the m68k port with -O2.
4306 Suppose src is (CONST_INT -1), and that after truncation src_folded
4307 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4308 At the end we will add src and src_const to the same equivalence
4309 class. We now have 3 and -1 on the same equivalence class. This
4310 causes later instructions to be mis-optimized. */
4311 /* If storing a constant in a bitfield, pre-truncate the constant
4312 so we will be able to record it later. */
4313 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4315 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4317 if (GET_CODE (src) == CONST_INT
4318 && GET_CODE (width) == CONST_INT
4319 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4320 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4322 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4323 << INTVAL (width)) - 1));
4327 /* Compute SRC's hash code, and also notice if it
4328 should not be recorded at all. In that case,
4329 prevent any further processing of this assignment. */
4331 hash_arg_in_memory = 0;
4334 sets[i].src_hash = HASH (src, mode);
4335 sets[i].src_volatile = do_not_record;
4336 sets[i].src_in_memory = hash_arg_in_memory;
4338 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4339 a pseudo, do not record SRC. Using SRC as a replacement for
4340 anything else will be incorrect in that situation. Note that
4341 this usually occurs only for stack slots, in which case all the
4342 RTL would be referring to SRC, so we don't lose any optimization
4343 opportunities by not having SRC in the hash table. */
4346 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4348 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4349 sets[i].src_volatile = 1;
4352 /* It is no longer clear why we used to do this, but it doesn't
4353 appear to still be needed. So let's try without it since this
4354 code hurts cse'ing widened ops. */
4355 /* If source is a paradoxical subreg (such as QI treated as an SI),
4356 treat it as volatile. It may do the work of an SI in one context
4357 where the extra bits are not being used, but cannot replace an SI
4359 if (GET_CODE (src) == SUBREG
4360 && (GET_MODE_SIZE (GET_MODE (src))
4361 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4362 sets[i].src_volatile = 1;
4365 /* Locate all possible equivalent forms for SRC. Try to replace
4366 SRC in the insn with each cheaper equivalent.
4368 We have the following types of equivalents: SRC itself, a folded
4369 version, a value given in a REG_EQUAL note, or a value related
4372 Each of these equivalents may be part of an additional class
4373 of equivalents (if more than one is in the table, they must be in
4374 the same class; we check for this).
4376 If the source is volatile, we don't do any table lookups.
4378 We note any constant equivalent for possible later use in a
4381 if (!sets[i].src_volatile)
4382 elt = lookup (src, sets[i].src_hash, mode);
4384 sets[i].src_elt = elt;
4386 if (elt && src_eqv_here && src_eqv_elt)
4388 if (elt->first_same_value != src_eqv_elt->first_same_value)
4390 /* The REG_EQUAL is indicating that two formerly distinct
4391 classes are now equivalent. So merge them. */
4392 merge_equiv_classes (elt, src_eqv_elt);
4393 src_eqv_hash = HASH (src_eqv, elt->mode);
4394 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4400 else if (src_eqv_elt)
4403 /* Try to find a constant somewhere and record it in `src_const'.
4404 Record its table element, if any, in `src_const_elt'. Look in
4405 any known equivalences first. (If the constant is not in the
4406 table, also set `sets[i].src_const_hash'). */
4408 for (p = elt->first_same_value; p; p = p->next_same_value)
4412 src_const_elt = elt;
4417 && (CONSTANT_P (src_folded)
4418 /* Consider (minus (label_ref L1) (label_ref L2)) as
4419 "constant" here so we will record it. This allows us
4420 to fold switch statements when an ADDR_DIFF_VEC is used. */
4421 || (GET_CODE (src_folded) == MINUS
4422 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4423 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4424 src_const = src_folded, src_const_elt = elt;
4425 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4426 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4428 /* If we don't know if the constant is in the table, get its
4429 hash code and look it up. */
4430 if (src_const && src_const_elt == 0)
4432 sets[i].src_const_hash = HASH (src_const, mode);
4433 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4436 sets[i].src_const = src_const;
4437 sets[i].src_const_elt = src_const_elt;
4439 /* If the constant and our source are both in the table, mark them as
4440 equivalent. Otherwise, if a constant is in the table but the source
4441 isn't, set ELT to it. */
4442 if (src_const_elt && elt
4443 && src_const_elt->first_same_value != elt->first_same_value)
4444 merge_equiv_classes (elt, src_const_elt);
4445 else if (src_const_elt && elt == 0)
4446 elt = src_const_elt;
4448 /* See if there is a register linearly related to a constant
4449 equivalent of SRC. */
4451 && (GET_CODE (src_const) == CONST
4452 || (src_const_elt && src_const_elt->related_value != 0)))
4454 src_related = use_related_value (src_const, src_const_elt);
4457 struct table_elt *src_related_elt
4458 = lookup (src_related, HASH (src_related, mode), mode);
4459 if (src_related_elt && elt)
4461 if (elt->first_same_value
4462 != src_related_elt->first_same_value)
4463 /* This can occur when we previously saw a CONST
4464 involving a SYMBOL_REF and then see the SYMBOL_REF
4465 twice. Merge the involved classes. */
4466 merge_equiv_classes (elt, src_related_elt);
4469 src_related_elt = 0;
4471 else if (src_related_elt && elt == 0)
4472 elt = src_related_elt;
4476 /* See if we have a CONST_INT that is already in a register in a
4479 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
4480 && GET_MODE_CLASS (mode) == MODE_INT
4481 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
4483 enum machine_mode wider_mode;
4485 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4486 wider_mode != VOIDmode
4487 && GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
4488 && src_related == 0;
4489 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4491 struct table_elt *const_elt
4492 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4497 for (const_elt = const_elt->first_same_value;
4498 const_elt; const_elt = const_elt->next_same_value)
4499 if (REG_P (const_elt->exp))
4501 src_related = gen_lowpart (mode, const_elt->exp);
4507 /* Another possibility is that we have an AND with a constant in
4508 a mode narrower than a word. If so, it might have been generated
4509 as part of an "if" which would narrow the AND. If we already
4510 have done the AND in a wider mode, we can use a SUBREG of that
4513 if (flag_expensive_optimizations && ! src_related
4514 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
4515 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4517 enum machine_mode tmode;
4518 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4520 for (tmode = GET_MODE_WIDER_MODE (mode);
4521 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4522 tmode = GET_MODE_WIDER_MODE (tmode))
4524 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4525 struct table_elt *larger_elt;
4529 PUT_MODE (new_and, tmode);
4530 XEXP (new_and, 0) = inner;
4531 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4532 if (larger_elt == 0)
4535 for (larger_elt = larger_elt->first_same_value;
4536 larger_elt; larger_elt = larger_elt->next_same_value)
4537 if (REG_P (larger_elt->exp))
4540 = gen_lowpart (mode, larger_elt->exp);
4550 #ifdef LOAD_EXTEND_OP
4551 /* See if a MEM has already been loaded with a widening operation;
4552 if it has, we can use a subreg of that. Many CISC machines
4553 also have such operations, but this is only likely to be
4554 beneficial on these machines. */
4556 if (flag_expensive_optimizations && src_related == 0
4557 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4558 && GET_MODE_CLASS (mode) == MODE_INT
4559 && MEM_P (src) && ! do_not_record
4560 && LOAD_EXTEND_OP (mode) != UNKNOWN)
4562 struct rtx_def memory_extend_buf;
4563 rtx memory_extend_rtx = &memory_extend_buf;
4564 enum machine_mode tmode;
4566 /* Set what we are trying to extend and the operation it might
4567 have been extended with. */
4568 memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx));
4569 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
4570 XEXP (memory_extend_rtx, 0) = src;
4572 for (tmode = GET_MODE_WIDER_MODE (mode);
4573 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4574 tmode = GET_MODE_WIDER_MODE (tmode))
4576 struct table_elt *larger_elt;
4578 PUT_MODE (memory_extend_rtx, tmode);
4579 larger_elt = lookup (memory_extend_rtx,
4580 HASH (memory_extend_rtx, tmode), tmode);
4581 if (larger_elt == 0)
4584 for (larger_elt = larger_elt->first_same_value;
4585 larger_elt; larger_elt = larger_elt->next_same_value)
4586 if (REG_P (larger_elt->exp))
4588 src_related = gen_lowpart (mode, larger_elt->exp);
4596 #endif /* LOAD_EXTEND_OP */
4598 if (src == src_folded)
4601 /* At this point, ELT, if nonzero, points to a class of expressions
4602 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4603 and SRC_RELATED, if nonzero, each contain additional equivalent
4604 expressions. Prune these latter expressions by deleting expressions
4605 already in the equivalence class.
4607 Check for an equivalent identical to the destination. If found,
4608 this is the preferred equivalent since it will likely lead to
4609 elimination of the insn. Indicate this by placing it in
4613 elt = elt->first_same_value;
4614 for (p = elt; p; p = p->next_same_value)
4616 enum rtx_code code = GET_CODE (p->exp);
4618 /* If the expression is not valid, ignore it. Then we do not
4619 have to check for validity below. In most cases, we can use
4620 `rtx_equal_p', since canonicalization has already been done. */
4621 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
4624 /* Also skip paradoxical subregs, unless that's what we're
4627 && (GET_MODE_SIZE (GET_MODE (p->exp))
4628 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
4630 && GET_CODE (src) == SUBREG
4631 && GET_MODE (src) == GET_MODE (p->exp)
4632 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4633 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
4636 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
4638 else if (src_folded && GET_CODE (src_folded) == code
4639 && rtx_equal_p (src_folded, p->exp))
4641 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
4642 && rtx_equal_p (src_eqv_here, p->exp))
4644 else if (src_related && GET_CODE (src_related) == code
4645 && rtx_equal_p (src_related, p->exp))
4648 /* This is the same as the destination of the insns, we want
4649 to prefer it. Copy it to src_related. The code below will
4650 then give it a negative cost. */
4651 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
4655 /* Find the cheapest valid equivalent, trying all the available
4656 possibilities. Prefer items not in the hash table to ones
4657 that are when they are equal cost. Note that we can never
4658 worsen an insn as the current contents will also succeed.
4659 If we find an equivalent identical to the destination, use it as best,
4660 since this insn will probably be eliminated in that case. */
4663 if (rtx_equal_p (src, dest))
4664 src_cost = src_regcost = -1;
4667 src_cost = COST (src);
4668 src_regcost = approx_reg_cost (src);
4674 if (rtx_equal_p (src_eqv_here, dest))
4675 src_eqv_cost = src_eqv_regcost = -1;
4678 src_eqv_cost = COST (src_eqv_here);
4679 src_eqv_regcost = approx_reg_cost (src_eqv_here);
4685 if (rtx_equal_p (src_folded, dest))
4686 src_folded_cost = src_folded_regcost = -1;
4689 src_folded_cost = COST (src_folded);
4690 src_folded_regcost = approx_reg_cost (src_folded);
4696 if (rtx_equal_p (src_related, dest))
4697 src_related_cost = src_related_regcost = -1;
4700 src_related_cost = COST (src_related);
4701 src_related_regcost = approx_reg_cost (src_related);
4705 /* If this was an indirect jump insn, a known label will really be
4706 cheaper even though it looks more expensive. */
4707 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
4708 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
4710 /* Terminate loop when replacement made. This must terminate since
4711 the current contents will be tested and will always be valid. */
4716 /* Skip invalid entries. */
4717 while (elt && !REG_P (elt->exp)
4718 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
4719 elt = elt->next_same_value;
4721 /* A paradoxical subreg would be bad here: it'll be the right
4722 size, but later may be adjusted so that the upper bits aren't
4723 what we want. So reject it. */
4725 && GET_CODE (elt->exp) == SUBREG
4726 && (GET_MODE_SIZE (GET_MODE (elt->exp))
4727 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
4728 /* It is okay, though, if the rtx we're trying to match
4729 will ignore any of the bits we can't predict. */
4731 && GET_CODE (src) == SUBREG
4732 && GET_MODE (src) == GET_MODE (elt->exp)
4733 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4734 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
4736 elt = elt->next_same_value;
4742 src_elt_cost = elt->cost;
4743 src_elt_regcost = elt->regcost;
4746 /* Find cheapest and skip it for the next time. For items
4747 of equal cost, use this order:
4748 src_folded, src, src_eqv, src_related and hash table entry. */
4750 && preferable (src_folded_cost, src_folded_regcost,
4751 src_cost, src_regcost) <= 0
4752 && preferable (src_folded_cost, src_folded_regcost,
4753 src_eqv_cost, src_eqv_regcost) <= 0
4754 && preferable (src_folded_cost, src_folded_regcost,
4755 src_related_cost, src_related_regcost) <= 0
4756 && preferable (src_folded_cost, src_folded_regcost,
4757 src_elt_cost, src_elt_regcost) <= 0)
4759 trial = src_folded, src_folded_cost = MAX_COST;
4760 if (src_folded_force_flag)
4762 rtx forced = force_const_mem (mode, trial);
4768 && preferable (src_cost, src_regcost,
4769 src_eqv_cost, src_eqv_regcost) <= 0
4770 && preferable (src_cost, src_regcost,
4771 src_related_cost, src_related_regcost) <= 0
4772 && preferable (src_cost, src_regcost,
4773 src_elt_cost, src_elt_regcost) <= 0)
4774 trial = src, src_cost = MAX_COST;
4775 else if (src_eqv_here
4776 && preferable (src_eqv_cost, src_eqv_regcost,
4777 src_related_cost, src_related_regcost) <= 0
4778 && preferable (src_eqv_cost, src_eqv_regcost,
4779 src_elt_cost, src_elt_regcost) <= 0)
4780 trial = src_eqv_here, src_eqv_cost = MAX_COST;
4781 else if (src_related
4782 && preferable (src_related_cost, src_related_regcost,
4783 src_elt_cost, src_elt_regcost) <= 0)
4784 trial = src_related, src_related_cost = MAX_COST;
4788 elt = elt->next_same_value;
4789 src_elt_cost = MAX_COST;
4792 /* Avoid creation of overlapping memory moves. */
4793 if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl)))
4797 /* BLKmode moves are not handled by cse anyway. */
4798 if (GET_MODE (trial) == BLKmode)
4801 src = canon_rtx (trial);
4802 dest = canon_rtx (SET_DEST (sets[i].rtl));
4804 if (!MEM_P (src) || !MEM_P (dest)
4805 || !nonoverlapping_memrefs_p (src, dest))
4809 /* We don't normally have an insn matching (set (pc) (pc)), so
4810 check for this separately here. We will delete such an
4813 For other cases such as a table jump or conditional jump
4814 where we know the ultimate target, go ahead and replace the
4815 operand. While that may not make a valid insn, we will
4816 reemit the jump below (and also insert any necessary
4818 if (n_sets == 1 && dest == pc_rtx
4820 || (GET_CODE (trial) == LABEL_REF
4821 && ! condjump_p (insn))))
4823 /* Don't substitute non-local labels, this confuses CFG. */
4824 if (GET_CODE (trial) == LABEL_REF
4825 && LABEL_REF_NONLOCAL_P (trial))
4828 SET_SRC (sets[i].rtl) = trial;
4829 cse_jumps_altered = true;
4833 /* Reject certain invalid forms of CONST that we create. */
4834 else if (CONSTANT_P (trial)
4835 && GET_CODE (trial) == CONST
4836 /* Reject cases that will cause decode_rtx_const to
4837 die. On the alpha when simplifying a switch, we
4838 get (const (truncate (minus (label_ref)
4840 && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
4841 /* Likewise on IA-64, except without the
4843 || (GET_CODE (XEXP (trial, 0)) == MINUS
4844 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
4845 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
4846 /* Do nothing for this case. */
4849 /* Look for a substitution that makes a valid insn. */
4850 else if (validate_unshare_change
4851 (insn, &SET_SRC (sets[i].rtl), trial, 0))
4853 rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
4855 /* The result of apply_change_group can be ignored; see
4858 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4859 apply_change_group ();
4864 /* If we previously found constant pool entries for
4865 constants and this is a constant, try making a
4866 pool entry. Put it in src_folded unless we already have done
4867 this since that is where it likely came from. */
4869 else if (constant_pool_entries_cost
4870 && CONSTANT_P (trial)
4872 || (!MEM_P (src_folded)
4873 && ! src_folded_force_flag))
4874 && GET_MODE_CLASS (mode) != MODE_CC
4875 && mode != VOIDmode)
4877 src_folded_force_flag = 1;
4879 src_folded_cost = constant_pool_entries_cost;
4880 src_folded_regcost = constant_pool_entries_regcost;
4884 src = SET_SRC (sets[i].rtl);
4886 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
4887 However, there is an important exception: If both are registers
4888 that are not the head of their equivalence class, replace SET_SRC
4889 with the head of the class. If we do not do this, we will have
4890 both registers live over a portion of the basic block. This way,
4891 their lifetimes will likely abut instead of overlapping. */
4893 && REGNO_QTY_VALID_P (REGNO (dest)))
4895 int dest_q = REG_QTY (REGNO (dest));
4896 struct qty_table_elem *dest_ent = &qty_table[dest_q];
4898 if (dest_ent->mode == GET_MODE (dest)
4899 && dest_ent->first_reg != REGNO (dest)
4900 && REG_P (src) && REGNO (src) == REGNO (dest)
4901 /* Don't do this if the original insn had a hard reg as
4902 SET_SRC or SET_DEST. */
4903 && (!REG_P (sets[i].src)
4904 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
4905 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
4906 /* We can't call canon_reg here because it won't do anything if
4907 SRC is a hard register. */
4909 int src_q = REG_QTY (REGNO (src));
4910 struct qty_table_elem *src_ent = &qty_table[src_q];
4911 int first = src_ent->first_reg;
4913 = (first >= FIRST_PSEUDO_REGISTER
4914 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
4916 /* We must use validate-change even for this, because this
4917 might be a special no-op instruction, suitable only to
4919 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
4922 /* If we had a constant that is cheaper than what we are now
4923 setting SRC to, use that constant. We ignored it when we
4924 thought we could make this into a no-op. */
4925 if (src_const && COST (src_const) < COST (src)
4926 && validate_change (insn, &SET_SRC (sets[i].rtl),
4933 /* If we made a change, recompute SRC values. */
4934 if (src != sets[i].src)
4937 hash_arg_in_memory = 0;
4939 sets[i].src_hash = HASH (src, mode);
4940 sets[i].src_volatile = do_not_record;
4941 sets[i].src_in_memory = hash_arg_in_memory;
4942 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
4945 /* If this is a single SET, we are setting a register, and we have an
4946 equivalent constant, we want to add a REG_NOTE. We don't want
4947 to write a REG_EQUAL note for a constant pseudo since verifying that
4948 that pseudo hasn't been eliminated is a pain. Such a note also
4949 won't help anything.
4951 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
4952 which can be created for a reference to a compile time computable
4953 entry in a jump table. */
4955 if (n_sets == 1 && src_const && REG_P (dest)
4956 && !REG_P (src_const)
4957 && ! (GET_CODE (src_const) == CONST
4958 && GET_CODE (XEXP (src_const, 0)) == MINUS
4959 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
4960 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
4962 /* We only want a REG_EQUAL note if src_const != src. */
4963 if (! rtx_equal_p (src, src_const))
4965 /* Make sure that the rtx is not shared. */
4966 src_const = copy_rtx (src_const);
4968 /* Record the actual constant value in a REG_EQUAL note,
4969 making a new one if one does not already exist. */
4970 set_unique_reg_note (insn, REG_EQUAL, src_const);
4971 df_notes_rescan (insn);
4975 /* Now deal with the destination. */
4978 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
4979 while (GET_CODE (dest) == SUBREG
4980 || GET_CODE (dest) == ZERO_EXTRACT
4981 || GET_CODE (dest) == STRICT_LOW_PART)
4982 dest = XEXP (dest, 0);
4984 sets[i].inner_dest = dest;
4988 #ifdef PUSH_ROUNDING
4989 /* Stack pushes invalidate the stack pointer. */
4990 rtx addr = XEXP (dest, 0);
4991 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
4992 && XEXP (addr, 0) == stack_pointer_rtx)
4993 invalidate (stack_pointer_rtx, VOIDmode);
4995 dest = fold_rtx (dest, insn);
4998 /* Compute the hash code of the destination now,
4999 before the effects of this instruction are recorded,
5000 since the register values used in the address computation
5001 are those before this instruction. */
5002 sets[i].dest_hash = HASH (dest, mode);
5004 /* Don't enter a bit-field in the hash table
5005 because the value in it after the store
5006 may not equal what was stored, due to truncation. */
5008 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5010 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5012 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5013 && GET_CODE (width) == CONST_INT
5014 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5015 && ! (INTVAL (src_const)
5016 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5017 /* Exception: if the value is constant,
5018 and it won't be truncated, record it. */
5022 /* This is chosen so that the destination will be invalidated
5023 but no new value will be recorded.
5024 We must invalidate because sometimes constant
5025 values can be recorded for bitfields. */
5026 sets[i].src_elt = 0;
5027 sets[i].src_volatile = 1;
5033 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5035 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5037 /* One less use of the label this insn used to jump to. */
5038 delete_insn_and_edges (insn);
5039 cse_jumps_altered = true;
5040 /* No more processing for this set. */
5044 /* If this SET is now setting PC to a label, we know it used to
5045 be a conditional or computed branch. */
5046 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5047 && !LABEL_REF_NONLOCAL_P (src))
5049 /* We reemit the jump in as many cases as possible just in
5050 case the form of an unconditional jump is significantly
5051 different than a computed jump or conditional jump.
5053 If this insn has multiple sets, then reemitting the
5054 jump is nontrivial. So instead we just force rerecognition
5055 and hope for the best. */
5060 new_rtx = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5061 JUMP_LABEL (new_rtx) = XEXP (src, 0);
5062 LABEL_NUSES (XEXP (src, 0))++;
5064 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5065 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5068 XEXP (note, 1) = NULL_RTX;
5069 REG_NOTES (new_rtx) = note;
5072 delete_insn_and_edges (insn);
5076 INSN_CODE (insn) = -1;
5078 /* Do not bother deleting any unreachable code, let jump do it. */
5079 cse_jumps_altered = true;
5083 /* If destination is volatile, invalidate it and then do no further
5084 processing for this assignment. */
5086 else if (do_not_record)
5088 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5089 invalidate (dest, VOIDmode);
5090 else if (MEM_P (dest))
5091 invalidate (dest, VOIDmode);
5092 else if (GET_CODE (dest) == STRICT_LOW_PART
5093 || GET_CODE (dest) == ZERO_EXTRACT)
5094 invalidate (XEXP (dest, 0), GET_MODE (dest));
5098 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5099 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5102 /* If setting CC0, record what it was set to, or a constant, if it
5103 is equivalent to a constant. If it is being set to a floating-point
5104 value, make a COMPARE with the appropriate constant of 0. If we
5105 don't do this, later code can interpret this as a test against
5106 const0_rtx, which can cause problems if we try to put it into an
5107 insn as a floating-point operand. */
5108 if (dest == cc0_rtx)
5110 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5111 this_insn_cc0_mode = mode;
5112 if (FLOAT_MODE_P (mode))
5113 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5119 /* Now enter all non-volatile source expressions in the hash table
5120 if they are not already present.
5121 Record their equivalence classes in src_elt.
5122 This way we can insert the corresponding destinations into
5123 the same classes even if the actual sources are no longer in them
5124 (having been invalidated). */
5126 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5127 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5129 struct table_elt *elt;
5130 struct table_elt *classp = sets[0].src_elt;
5131 rtx dest = SET_DEST (sets[0].rtl);
5132 enum machine_mode eqvmode = GET_MODE (dest);
5134 if (GET_CODE (dest) == STRICT_LOW_PART)
5136 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5139 if (insert_regs (src_eqv, classp, 0))
5141 rehash_using_reg (src_eqv);
5142 src_eqv_hash = HASH (src_eqv, eqvmode);
5144 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5145 elt->in_memory = src_eqv_in_memory;
5148 /* Check to see if src_eqv_elt is the same as a set source which
5149 does not yet have an elt, and if so set the elt of the set source
5151 for (i = 0; i < n_sets; i++)
5152 if (sets[i].rtl && sets[i].src_elt == 0
5153 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5154 sets[i].src_elt = src_eqv_elt;
5157 for (i = 0; i < n_sets; i++)
5158 if (sets[i].rtl && ! sets[i].src_volatile
5159 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5161 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5163 /* REG_EQUAL in setting a STRICT_LOW_PART
5164 gives an equivalent for the entire destination register,
5165 not just for the subreg being stored in now.
5166 This is a more interesting equivalence, so we arrange later
5167 to treat the entire reg as the destination. */
5168 sets[i].src_elt = src_eqv_elt;
5169 sets[i].src_hash = src_eqv_hash;
5173 /* Insert source and constant equivalent into hash table, if not
5175 struct table_elt *classp = src_eqv_elt;
5176 rtx src = sets[i].src;
5177 rtx dest = SET_DEST (sets[i].rtl);
5178 enum machine_mode mode
5179 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5181 /* It's possible that we have a source value known to be
5182 constant but don't have a REG_EQUAL note on the insn.
5183 Lack of a note will mean src_eqv_elt will be NULL. This
5184 can happen where we've generated a SUBREG to access a
5185 CONST_INT that is already in a register in a wider mode.
5186 Ensure that the source expression is put in the proper
5189 classp = sets[i].src_const_elt;
5191 if (sets[i].src_elt == 0)
5193 struct table_elt *elt;
5195 /* Note that these insert_regs calls cannot remove
5196 any of the src_elt's, because they would have failed to
5197 match if not still valid. */
5198 if (insert_regs (src, classp, 0))
5200 rehash_using_reg (src);
5201 sets[i].src_hash = HASH (src, mode);
5203 elt = insert (src, classp, sets[i].src_hash, mode);
5204 elt->in_memory = sets[i].src_in_memory;
5205 sets[i].src_elt = classp = elt;
5207 if (sets[i].src_const && sets[i].src_const_elt == 0
5208 && src != sets[i].src_const
5209 && ! rtx_equal_p (sets[i].src_const, src))
5210 sets[i].src_elt = insert (sets[i].src_const, classp,
5211 sets[i].src_const_hash, mode);
5214 else if (sets[i].src_elt == 0)
5215 /* If we did not insert the source into the hash table (e.g., it was
5216 volatile), note the equivalence class for the REG_EQUAL value, if any,
5217 so that the destination goes into that class. */
5218 sets[i].src_elt = src_eqv_elt;
5220 /* Record destination addresses in the hash table. This allows us to
5221 check if they are invalidated by other sets. */
5222 for (i = 0; i < n_sets; i++)
5226 rtx x = sets[i].inner_dest;
5227 struct table_elt *elt;
5228 enum machine_mode mode;
5234 mode = GET_MODE (x);
5235 hash = HASH (x, mode);
5236 elt = lookup (x, hash, mode);
5239 if (insert_regs (x, NULL, 0))
5241 rtx dest = SET_DEST (sets[i].rtl);
5243 rehash_using_reg (x);
5244 hash = HASH (x, mode);
5245 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5247 elt = insert (x, NULL, hash, mode);
5250 sets[i].dest_addr_elt = elt;
5253 sets[i].dest_addr_elt = NULL;
5257 invalidate_from_clobbers (x);
5259 /* Some registers are invalidated by subroutine calls. Memory is
5260 invalidated by non-constant calls. */
5264 if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5265 invalidate_memory ();
5266 invalidate_for_call ();
5269 /* Now invalidate everything set by this instruction.
5270 If a SUBREG or other funny destination is being set,
5271 sets[i].rtl is still nonzero, so here we invalidate the reg
5272 a part of which is being set. */
5274 for (i = 0; i < n_sets; i++)
5277 /* We can't use the inner dest, because the mode associated with
5278 a ZERO_EXTRACT is significant. */
5279 rtx dest = SET_DEST (sets[i].rtl);
5281 /* Needed for registers to remove the register from its
5282 previous quantity's chain.
5283 Needed for memory if this is a nonvarying address, unless
5284 we have just done an invalidate_memory that covers even those. */
5285 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5286 invalidate (dest, VOIDmode);
5287 else if (MEM_P (dest))
5288 invalidate (dest, VOIDmode);
5289 else if (GET_CODE (dest) == STRICT_LOW_PART
5290 || GET_CODE (dest) == ZERO_EXTRACT)
5291 invalidate (XEXP (dest, 0), GET_MODE (dest));
5294 /* A volatile ASM invalidates everything. */
5295 if (NONJUMP_INSN_P (insn)
5296 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5297 && MEM_VOLATILE_P (PATTERN (insn)))
5298 flush_hash_table ();
5300 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5301 the regs restored by the longjmp come from a later time
5303 if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5305 flush_hash_table ();
5309 /* Make sure registers mentioned in destinations
5310 are safe for use in an expression to be inserted.
5311 This removes from the hash table
5312 any invalid entry that refers to one of these registers.
5314 We don't care about the return value from mention_regs because
5315 we are going to hash the SET_DEST values unconditionally. */
5317 for (i = 0; i < n_sets; i++)
5321 rtx x = SET_DEST (sets[i].rtl);
5327 /* We used to rely on all references to a register becoming
5328 inaccessible when a register changes to a new quantity,
5329 since that changes the hash code. However, that is not
5330 safe, since after HASH_SIZE new quantities we get a
5331 hash 'collision' of a register with its own invalid
5332 entries. And since SUBREGs have been changed not to
5333 change their hash code with the hash code of the register,
5334 it wouldn't work any longer at all. So we have to check
5335 for any invalid references lying around now.
5336 This code is similar to the REG case in mention_regs,
5337 but it knows that reg_tick has been incremented, and
5338 it leaves reg_in_table as -1 . */
5339 unsigned int regno = REGNO (x);
5340 unsigned int endregno = END_REGNO (x);
5343 for (i = regno; i < endregno; i++)
5345 if (REG_IN_TABLE (i) >= 0)
5347 remove_invalid_refs (i);
5348 REG_IN_TABLE (i) = -1;
5355 /* We may have just removed some of the src_elt's from the hash table.
5356 So replace each one with the current head of the same class.
5357 Also check if destination addresses have been removed. */
5359 for (i = 0; i < n_sets; i++)
5362 if (sets[i].dest_addr_elt
5363 && sets[i].dest_addr_elt->first_same_value == 0)
5365 /* The elt was removed, which means this destination is not
5366 valid after this instruction. */
5367 sets[i].rtl = NULL_RTX;
5369 else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5370 /* If elt was removed, find current head of same class,
5371 or 0 if nothing remains of that class. */
5373 struct table_elt *elt = sets[i].src_elt;
5375 while (elt && elt->prev_same_value)
5376 elt = elt->prev_same_value;
5378 while (elt && elt->first_same_value == 0)
5379 elt = elt->next_same_value;
5380 sets[i].src_elt = elt ? elt->first_same_value : 0;
5384 /* Now insert the destinations into their equivalence classes. */
5386 for (i = 0; i < n_sets; i++)
5389 rtx dest = SET_DEST (sets[i].rtl);
5390 struct table_elt *elt;
5392 /* Don't record value if we are not supposed to risk allocating
5393 floating-point values in registers that might be wider than
5395 if ((flag_float_store
5397 && FLOAT_MODE_P (GET_MODE (dest)))
5398 /* Don't record BLKmode values, because we don't know the
5399 size of it, and can't be sure that other BLKmode values
5400 have the same or smaller size. */
5401 || GET_MODE (dest) == BLKmode
5402 /* If we didn't put a REG_EQUAL value or a source into the hash
5403 table, there is no point is recording DEST. */
5404 || sets[i].src_elt == 0
5405 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5406 or SIGN_EXTEND, don't record DEST since it can cause
5407 some tracking to be wrong.
5409 ??? Think about this more later. */
5410 || (GET_CODE (dest) == SUBREG
5411 && (GET_MODE_SIZE (GET_MODE (dest))
5412 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5413 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5414 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5417 /* STRICT_LOW_PART isn't part of the value BEING set,
5418 and neither is the SUBREG inside it.
5419 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5420 if (GET_CODE (dest) == STRICT_LOW_PART)
5421 dest = SUBREG_REG (XEXP (dest, 0));
5423 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5424 /* Registers must also be inserted into chains for quantities. */
5425 if (insert_regs (dest, sets[i].src_elt, 1))
5427 /* If `insert_regs' changes something, the hash code must be
5429 rehash_using_reg (dest);
5430 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5433 elt = insert (dest, sets[i].src_elt,
5434 sets[i].dest_hash, GET_MODE (dest));
5436 elt->in_memory = (MEM_P (sets[i].inner_dest)
5437 && !MEM_READONLY_P (sets[i].inner_dest));
5439 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5440 narrower than M2, and both M1 and M2 are the same number of words,
5441 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5442 make that equivalence as well.
5444 However, BAR may have equivalences for which gen_lowpart
5445 will produce a simpler value than gen_lowpart applied to
5446 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5447 BAR's equivalences. If we don't get a simplified form, make
5448 the SUBREG. It will not be used in an equivalence, but will
5449 cause two similar assignments to be detected.
5451 Note the loop below will find SUBREG_REG (DEST) since we have
5452 already entered SRC and DEST of the SET in the table. */
5454 if (GET_CODE (dest) == SUBREG
5455 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5457 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
5458 && (GET_MODE_SIZE (GET_MODE (dest))
5459 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5460 && sets[i].src_elt != 0)
5462 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5463 struct table_elt *elt, *classp = 0;
5465 for (elt = sets[i].src_elt->first_same_value; elt;
5466 elt = elt->next_same_value)
5470 struct table_elt *src_elt;
5473 /* Ignore invalid entries. */
5474 if (!REG_P (elt->exp)
5475 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5478 /* We may have already been playing subreg games. If the
5479 mode is already correct for the destination, use it. */
5480 if (GET_MODE (elt->exp) == new_mode)
5484 /* Calculate big endian correction for the SUBREG_BYTE.
5485 We have already checked that M1 (GET_MODE (dest))
5486 is not narrower than M2 (new_mode). */
5487 if (BYTES_BIG_ENDIAN)
5488 byte = (GET_MODE_SIZE (GET_MODE (dest))
5489 - GET_MODE_SIZE (new_mode));
5491 new_src = simplify_gen_subreg (new_mode, elt->exp,
5492 GET_MODE (dest), byte);
5495 /* The call to simplify_gen_subreg fails if the value
5496 is VOIDmode, yet we can't do any simplification, e.g.
5497 for EXPR_LISTs denoting function call results.
5498 It is invalid to construct a SUBREG with a VOIDmode
5499 SUBREG_REG, hence a zero new_src means we can't do
5500 this substitution. */
5504 src_hash = HASH (new_src, new_mode);
5505 src_elt = lookup (new_src, src_hash, new_mode);
5507 /* Put the new source in the hash table is if isn't
5511 if (insert_regs (new_src, classp, 0))
5513 rehash_using_reg (new_src);
5514 src_hash = HASH (new_src, new_mode);
5516 src_elt = insert (new_src, classp, src_hash, new_mode);
5517 src_elt->in_memory = elt->in_memory;
5519 else if (classp && classp != src_elt->first_same_value)
5520 /* Show that two things that we've seen before are
5521 actually the same. */
5522 merge_equiv_classes (src_elt, classp);
5524 classp = src_elt->first_same_value;
5525 /* Ignore invalid entries. */
5527 && !REG_P (classp->exp)
5528 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
5529 classp = classp->next_same_value;
5534 /* Special handling for (set REG0 REG1) where REG0 is the
5535 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5536 be used in the sequel, so (if easily done) change this insn to
5537 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5538 that computed their value. Then REG1 will become a dead store
5539 and won't cloud the situation for later optimizations.
5541 Do not make this change if REG1 is a hard register, because it will
5542 then be used in the sequel and we may be changing a two-operand insn
5543 into a three-operand insn.
5545 Also do not do this if we are operating on a copy of INSN. */
5547 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
5548 && NEXT_INSN (PREV_INSN (insn)) == insn
5549 && REG_P (SET_SRC (sets[0].rtl))
5550 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5551 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
5553 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
5554 struct qty_table_elem *src_ent = &qty_table[src_q];
5556 if (src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
5558 /* Scan for the previous nonnote insn, but stop at a basic
5561 rtx bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
5564 prev = PREV_INSN (prev);
5566 while (prev != bb_head && NOTE_P (prev));
5568 /* Do not swap the registers around if the previous instruction
5569 attaches a REG_EQUIV note to REG1.
5571 ??? It's not entirely clear whether we can transfer a REG_EQUIV
5572 from the pseudo that originally shadowed an incoming argument
5573 to another register. Some uses of REG_EQUIV might rely on it
5574 being attached to REG1 rather than REG2.
5576 This section previously turned the REG_EQUIV into a REG_EQUAL
5577 note. We cannot do that because REG_EQUIV may provide an
5578 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
5579 if (NONJUMP_INSN_P (prev)
5580 && GET_CODE (PATTERN (prev)) == SET
5581 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
5582 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
5584 rtx dest = SET_DEST (sets[0].rtl);
5585 rtx src = SET_SRC (sets[0].rtl);
5588 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
5589 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
5590 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
5591 apply_change_group ();
5593 /* If INSN has a REG_EQUAL note, and this note mentions
5594 REG0, then we must delete it, because the value in
5595 REG0 has changed. If the note's value is REG1, we must
5596 also delete it because that is now this insn's dest. */
5597 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5599 && (reg_mentioned_p (dest, XEXP (note, 0))
5600 || rtx_equal_p (src, XEXP (note, 0))))
5601 remove_note (insn, note);
5609 /* Remove from the hash table all expressions that reference memory. */
5612 invalidate_memory (void)
5615 struct table_elt *p, *next;
5617 for (i = 0; i < HASH_SIZE; i++)
5618 for (p = table[i]; p; p = next)
5620 next = p->next_same_hash;
5622 remove_from_table (p, i);
5626 /* Perform invalidation on the basis of everything about an insn
5627 except for invalidating the actual places that are SET in it.
5628 This includes the places CLOBBERed, and anything that might
5629 alias with something that is SET or CLOBBERed.
5631 X is the pattern of the insn. */
5634 invalidate_from_clobbers (rtx x)
5636 if (GET_CODE (x) == CLOBBER)
5638 rtx ref = XEXP (x, 0);
5641 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5643 invalidate (ref, VOIDmode);
5644 else if (GET_CODE (ref) == STRICT_LOW_PART
5645 || GET_CODE (ref) == ZERO_EXTRACT)
5646 invalidate (XEXP (ref, 0), GET_MODE (ref));
5649 else if (GET_CODE (x) == PARALLEL)
5652 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
5654 rtx y = XVECEXP (x, 0, i);
5655 if (GET_CODE (y) == CLOBBER)
5657 rtx ref = XEXP (y, 0);
5658 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5660 invalidate (ref, VOIDmode);
5661 else if (GET_CODE (ref) == STRICT_LOW_PART
5662 || GET_CODE (ref) == ZERO_EXTRACT)
5663 invalidate (XEXP (ref, 0), GET_MODE (ref));
5669 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
5670 and replace any registers in them with either an equivalent constant
5671 or the canonical form of the register. If we are inside an address,
5672 only do this if the address remains valid.
5674 OBJECT is 0 except when within a MEM in which case it is the MEM.
5676 Return the replacement for X. */
5679 cse_process_notes_1 (rtx x, rtx object, bool *changed)
5681 enum rtx_code code = GET_CODE (x);
5682 const char *fmt = GET_RTX_FORMAT (code);
5700 validate_change (x, &XEXP (x, 0),
5701 cse_process_notes (XEXP (x, 0), x, changed), 0);
5706 if (REG_NOTE_KIND (x) == REG_EQUAL)
5707 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed);
5709 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed);
5716 rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed);
5717 /* We don't substitute VOIDmode constants into these rtx,
5718 since they would impede folding. */
5719 if (GET_MODE (new_rtx) != VOIDmode)
5720 validate_change (object, &XEXP (x, 0), new_rtx, 0);
5725 i = REG_QTY (REGNO (x));
5727 /* Return a constant or a constant register. */
5728 if (REGNO_QTY_VALID_P (REGNO (x)))
5730 struct qty_table_elem *ent = &qty_table[i];
5732 if (ent->const_rtx != NULL_RTX
5733 && (CONSTANT_P (ent->const_rtx)
5734 || REG_P (ent->const_rtx)))
5736 rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
5738 return copy_rtx (new_rtx);
5742 /* Otherwise, canonicalize this register. */
5743 return canon_reg (x, NULL_RTX);
5749 for (i = 0; i < GET_RTX_LENGTH (code); i++)
5751 validate_change (object, &XEXP (x, i),
5752 cse_process_notes (XEXP (x, i), object, changed), 0);
5758 cse_process_notes (rtx x, rtx object, bool *changed)
5760 rtx new_rtx = cse_process_notes_1 (x, object, changed);
5767 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
5769 DATA is a pointer to a struct cse_basic_block_data, that is used to
5771 It is filled with a queue of basic blocks, starting with FIRST_BB
5772 and following a trace through the CFG.
5774 If all paths starting at FIRST_BB have been followed, or no new path
5775 starting at FIRST_BB can be constructed, this function returns FALSE.
5776 Otherwise, DATA->path is filled and the function returns TRUE indicating
5777 that a path to follow was found.
5779 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
5780 block in the path will be FIRST_BB. */
5783 cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
5790 SET_BIT (cse_visited_basic_blocks, first_bb->index);
5792 /* See if there is a previous path. */
5793 path_size = data->path_size;
5795 /* There is a previous path. Make sure it started with FIRST_BB. */
5797 gcc_assert (data->path[0].bb == first_bb);
5799 /* There was only one basic block in the last path. Clear the path and
5800 return, so that paths starting at another basic block can be tried. */
5807 /* If the path was empty from the beginning, construct a new path. */
5809 data->path[path_size++].bb = first_bb;
5812 /* Otherwise, path_size must be equal to or greater than 2, because
5813 a previous path exists that is at least two basic blocks long.
5815 Update the previous branch path, if any. If the last branch was
5816 previously along the branch edge, take the fallthrough edge now. */
5817 while (path_size >= 2)
5819 basic_block last_bb_in_path, previous_bb_in_path;
5823 last_bb_in_path = data->path[path_size].bb;
5824 previous_bb_in_path = data->path[path_size - 1].bb;
5826 /* If we previously followed a path along the branch edge, try
5827 the fallthru edge now. */
5828 if (EDGE_COUNT (previous_bb_in_path->succs) == 2
5829 && any_condjump_p (BB_END (previous_bb_in_path))
5830 && (e = find_edge (previous_bb_in_path, last_bb_in_path))
5831 && e == BRANCH_EDGE (previous_bb_in_path))
5833 bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
5834 if (bb != EXIT_BLOCK_PTR
5835 && single_pred_p (bb)
5836 /* We used to assert here that we would only see blocks
5837 that we have not visited yet. But we may end up
5838 visiting basic blocks twice if the CFG has changed
5839 in this run of cse_main, because when the CFG changes
5840 the topological sort of the CFG also changes. A basic
5841 blocks that previously had more than two predecessors
5842 may now have a single predecessor, and become part of
5843 a path that starts at another basic block.
5845 We still want to visit each basic block only once, so
5846 halt the path here if we have already visited BB. */
5847 && !TEST_BIT (cse_visited_basic_blocks, bb->index))
5849 SET_BIT (cse_visited_basic_blocks, bb->index);
5850 data->path[path_size++].bb = bb;
5855 data->path[path_size].bb = NULL;
5858 /* If only one block remains in the path, bail. */
5866 /* Extend the path if possible. */
5869 bb = data->path[path_size - 1].bb;
5870 while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH))
5872 if (single_succ_p (bb))
5873 e = single_succ_edge (bb);
5874 else if (EDGE_COUNT (bb->succs) == 2
5875 && any_condjump_p (BB_END (bb)))
5877 /* First try to follow the branch. If that doesn't lead
5878 to a useful path, follow the fallthru edge. */
5879 e = BRANCH_EDGE (bb);
5880 if (!single_pred_p (e->dest))
5881 e = FALLTHRU_EDGE (bb);
5886 if (e && e->dest != EXIT_BLOCK_PTR
5887 && single_pred_p (e->dest)
5888 /* Avoid visiting basic blocks twice. The large comment
5889 above explains why this can happen. */
5890 && !TEST_BIT (cse_visited_basic_blocks, e->dest->index))
5892 basic_block bb2 = e->dest;
5893 SET_BIT (cse_visited_basic_blocks, bb2->index);
5894 data->path[path_size++].bb = bb2;
5903 data->path_size = path_size;
5904 return path_size != 0;
5907 /* Dump the path in DATA to file F. NSETS is the number of sets
5911 cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
5915 fprintf (f, ";; Following path with %d sets: ", nsets);
5916 for (path_entry = 0; path_entry < data->path_size; path_entry++)
5917 fprintf (f, "%d ", (data->path[path_entry].bb)->index);
5918 fputc ('\n', dump_file);
5923 /* Return true if BB has exception handling successor edges. */
5926 have_eh_succ_edges (basic_block bb)
5931 FOR_EACH_EDGE (e, ei, bb->succs)
5932 if (e->flags & EDGE_EH)
5939 /* Scan to the end of the path described by DATA. Return an estimate of
5940 the total number of SETs of all insns in the path. */
5943 cse_prescan_path (struct cse_basic_block_data *data)
5946 int path_size = data->path_size;
5949 /* Scan to end of each basic block in the path. */
5950 for (path_entry = 0; path_entry < path_size; path_entry++)
5955 bb = data->path[path_entry].bb;
5957 FOR_BB_INSNS (bb, insn)
5962 /* A PARALLEL can have lots of SETs in it,
5963 especially if it is really an ASM_OPERANDS. */
5964 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5965 nsets += XVECLEN (PATTERN (insn), 0);
5971 data->nsets = nsets;
5974 /* Process a single extended basic block described by EBB_DATA. */
5977 cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
5979 int path_size = ebb_data->path_size;
5983 /* Allocate the space needed by qty_table. */
5984 qty_table = XNEWVEC (struct qty_table_elem, max_qty);
5987 cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
5988 cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
5989 for (path_entry = 0; path_entry < path_size; path_entry++)
5994 bb = ebb_data->path[path_entry].bb;
5996 /* Invalidate recorded information for eh regs if there is an EH
5997 edge pointing to that bb. */
5998 if (bb_has_eh_pred (bb))
6002 for (def_rec = df_get_artificial_defs (bb->index); *def_rec; def_rec++)
6004 df_ref def = *def_rec;
6005 if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6006 invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6010 FOR_BB_INSNS (bb, insn)
6012 optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6013 /* If we have processed 1,000 insns, flush the hash table to
6014 avoid extreme quadratic behavior. We must not include NOTEs
6015 in the count since there may be more of them when generating
6016 debugging information. If we clear the table at different
6017 times, code generated with -g -O might be different than code
6018 generated with -O but not -g.
6020 FIXME: This is a real kludge and needs to be done some other
6023 && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS))
6025 flush_hash_table ();
6031 /* Process notes first so we have all notes in canonical forms
6032 when looking for duplicate operations. */
6033 if (REG_NOTES (insn))
6035 bool changed = false;
6036 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn),
6037 NULL_RTX, &changed);
6039 df_notes_rescan (insn);
6044 /* If we haven't already found an insn where we added a LABEL_REF,
6046 if (INSN_P (insn) && !recorded_label_ref
6047 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
6049 recorded_label_ref = true;
6052 /* If the previous insn set CC0 and this insn no longer
6053 references CC0, delete the previous insn. Here we use
6054 fact that nothing expects CC0 to be valid over an insn,
6055 which is true until the final pass. */
6059 prev_insn = PREV_INSN (insn);
6060 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6061 && (tem = single_set (prev_insn)) != 0
6062 && SET_DEST (tem) == cc0_rtx
6063 && ! reg_mentioned_p (cc0_rtx, PATTERN (insn)))
6064 delete_insn (prev_insn);
6067 /* If this insn is not the last insn in the basic block,
6068 it will be PREV_INSN(insn) in the next iteration. If
6069 we recorded any CC0-related information for this insn,
6071 if (insn != BB_END (bb))
6073 prev_insn_cc0 = this_insn_cc0;
6074 prev_insn_cc0_mode = this_insn_cc0_mode;
6080 /* With non-call exceptions, we are not always able to update
6081 the CFG properly inside cse_insn. So clean up possibly
6082 redundant EH edges here. */
6083 if (flag_non_call_exceptions && have_eh_succ_edges (bb))
6084 cse_cfg_altered |= purge_dead_edges (bb);
6086 /* If we changed a conditional jump, we may have terminated
6087 the path we are following. Check that by verifying that
6088 the edge we would take still exists. If the edge does
6089 not exist anymore, purge the remainder of the path.
6090 Note that this will cause us to return to the caller. */
6091 if (path_entry < path_size - 1)
6093 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6094 if (!find_edge (bb, next_bb))
6100 /* If we truncate the path, we must also reset the
6101 visited bit on the remaining blocks in the path,
6102 or we will never visit them at all. */
6103 RESET_BIT (cse_visited_basic_blocks,
6104 ebb_data->path[path_size].bb->index);
6105 ebb_data->path[path_size].bb = NULL;
6107 while (path_size - 1 != path_entry);
6108 ebb_data->path_size = path_size;
6112 /* If this is a conditional jump insn, record any known
6113 equivalences due to the condition being tested. */
6115 if (path_entry < path_size - 1
6117 && single_set (insn)
6118 && any_condjump_p (insn))
6120 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6121 bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6122 record_jump_equiv (insn, taken);
6126 /* Clear the CC0-tracking related insns, they can't provide
6127 useful information across basic block boundaries. */
6132 gcc_assert (next_qty <= max_qty);
6138 /* Perform cse on the instructions of a function.
6139 F is the first instruction.
6140 NREGS is one plus the highest pseudo-reg number used in the instruction.
6142 Return 2 if jump optimizations should be redone due to simplifications
6143 in conditional jump instructions.
6144 Return 1 if the CFG should be cleaned up because it has been modified.
6145 Return 0 otherwise. */
6148 cse_main (rtx f ATTRIBUTE_UNUSED, int nregs)
6150 struct cse_basic_block_data ebb_data;
6152 int *rc_order = XNEWVEC (int, last_basic_block);
6155 df_set_flags (DF_LR_RUN_DCE);
6157 df_set_flags (DF_DEFER_INSN_RESCAN);
6159 reg_scan (get_insns (), max_reg_num ());
6160 init_cse_reg_info (nregs);
6162 ebb_data.path = XNEWVEC (struct branch_path,
6163 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6165 cse_cfg_altered = false;
6166 cse_jumps_altered = false;
6167 recorded_label_ref = false;
6168 constant_pool_entries_cost = 0;
6169 constant_pool_entries_regcost = 0;
6170 ebb_data.path_size = 0;
6172 rtl_hooks = cse_rtl_hooks;
6175 init_alias_analysis ();
6177 reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6179 /* Set up the table of already visited basic blocks. */
6180 cse_visited_basic_blocks = sbitmap_alloc (last_basic_block);
6181 sbitmap_zero (cse_visited_basic_blocks);
6183 /* Loop over basic blocks in reverse completion order (RPO),
6184 excluding the ENTRY and EXIT blocks. */
6185 n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6187 while (i < n_blocks)
6189 /* Find the first block in the RPO queue that we have not yet
6190 processed before. */
6193 bb = BASIC_BLOCK (rc_order[i++]);
6195 while (TEST_BIT (cse_visited_basic_blocks, bb->index)
6198 /* Find all paths starting with BB, and process them. */
6199 while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6201 /* Pre-scan the path. */
6202 cse_prescan_path (&ebb_data);
6204 /* If this basic block has no sets, skip it. */
6205 if (ebb_data.nsets == 0)
6208 /* Get a reasonable estimate for the maximum number of qty's
6209 needed for this path. For this, we take the number of sets
6210 and multiply that by MAX_RECOG_OPERANDS. */
6211 max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6213 /* Dump the path we're about to process. */
6215 cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6217 cse_extended_basic_block (&ebb_data);
6222 end_alias_analysis ();
6223 free (reg_eqv_table);
6224 free (ebb_data.path);
6225 sbitmap_free (cse_visited_basic_blocks);
6227 rtl_hooks = general_rtl_hooks;
6229 if (cse_jumps_altered || recorded_label_ref)
6231 else if (cse_cfg_altered)
6237 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for
6238 which there isn't a REG_LABEL_OPERAND note.
6239 Return one if so. DATA is the insn. */
6242 check_for_label_ref (rtx *rtl, void *data)
6244 rtx insn = (rtx) data;
6246 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6247 note for it, we must rerun jump since it needs to place the note. If
6248 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6249 don't do this since no REG_LABEL_OPERAND will be added. */
6250 return (GET_CODE (*rtl) == LABEL_REF
6251 && ! LABEL_REF_NONLOCAL_P (*rtl)
6253 || !label_is_jump_target_p (XEXP (*rtl, 0), insn))
6254 && LABEL_P (XEXP (*rtl, 0))
6255 && INSN_UID (XEXP (*rtl, 0)) != 0
6256 && ! find_reg_note (insn, REG_LABEL_OPERAND, XEXP (*rtl, 0)));
6259 /* Count the number of times registers are used (not set) in X.
6260 COUNTS is an array in which we accumulate the count, INCR is how much
6261 we count each register usage.
6263 Don't count a usage of DEST, which is the SET_DEST of a SET which
6264 contains X in its SET_SRC. This is because such a SET does not
6265 modify the liveness of DEST.
6266 DEST is set to pc_rtx for a trapping insn, which means that we must count
6267 uses of a SET_DEST regardless because the insn can't be deleted here. */
6270 count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6280 switch (code = GET_CODE (x))
6284 counts[REGNO (x)] += incr;
6299 /* If we are clobbering a MEM, mark any registers inside the address
6301 if (MEM_P (XEXP (x, 0)))
6302 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6306 /* Unless we are setting a REG, count everything in SET_DEST. */
6307 if (!REG_P (SET_DEST (x)))
6308 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6309 count_reg_usage (SET_SRC (x), counts,
6310 dest ? dest : SET_DEST (x),
6317 /* We expect dest to be NULL_RTX here. If the insn may trap, mark
6318 this fact by setting DEST to pc_rtx. */
6319 if (flag_non_call_exceptions && may_trap_p (PATTERN (x)))
6321 if (code == CALL_INSN)
6322 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6323 count_reg_usage (PATTERN (x), counts, dest, incr);
6325 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6328 note = find_reg_equal_equiv_note (x);
6331 rtx eqv = XEXP (note, 0);
6333 if (GET_CODE (eqv) == EXPR_LIST)
6334 /* This REG_EQUAL note describes the result of a function call.
6335 Process all the arguments. */
6338 count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6339 eqv = XEXP (eqv, 1);
6341 while (eqv && GET_CODE (eqv) == EXPR_LIST);
6343 count_reg_usage (eqv, counts, dest, incr);
6348 if (REG_NOTE_KIND (x) == REG_EQUAL
6349 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6350 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6351 involving registers in the address. */
6352 || GET_CODE (XEXP (x, 0)) == CLOBBER)
6353 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6355 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6359 /* If the asm is volatile, then this insn cannot be deleted,
6360 and so the inputs *must* be live. */
6361 if (MEM_VOLATILE_P (x))
6363 /* Iterate over just the inputs, not the constraints as well. */
6364 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6365 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6375 fmt = GET_RTX_FORMAT (code);
6376 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6379 count_reg_usage (XEXP (x, i), counts, dest, incr);
6380 else if (fmt[i] == 'E')
6381 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6382 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6386 /* Return true if set is live. */
6388 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
6395 if (set_noop_p (set))
6399 else if (GET_CODE (SET_DEST (set)) == CC0
6400 && !side_effects_p (SET_SRC (set))
6401 && ((tem = next_nonnote_insn (insn)) == 0
6403 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
6406 else if (!REG_P (SET_DEST (set))
6407 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
6408 || counts[REGNO (SET_DEST (set))] != 0
6409 || side_effects_p (SET_SRC (set)))
6414 /* Return true if insn is live. */
6417 insn_live_p (rtx insn, int *counts)
6420 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
6422 else if (GET_CODE (PATTERN (insn)) == SET)
6423 return set_live_p (PATTERN (insn), insn, counts);
6424 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6426 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6428 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6430 if (GET_CODE (elt) == SET)
6432 if (set_live_p (elt, insn, counts))
6435 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6444 /* Scan all the insns and delete any that are dead; i.e., they store a register
6445 that is never used or they copy a register to itself.
6447 This is used to remove insns made obviously dead by cse, loop or other
6448 optimizations. It improves the heuristics in loop since it won't try to
6449 move dead invariants out of loops or make givs for dead quantities. The
6450 remaining passes of the compilation are also sped up. */
6453 delete_trivially_dead_insns (rtx insns, int nreg)
6459 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
6460 /* First count the number of times each register is used. */
6461 counts = XCNEWVEC (int, nreg);
6462 for (insn = insns; insn; insn = NEXT_INSN (insn))
6464 count_reg_usage (insn, counts, NULL_RTX, 1);
6466 /* Go from the last insn to the first and delete insns that only set unused
6467 registers or copy a register to itself. As we delete an insn, remove
6468 usage counts for registers it uses.
6470 The first jump optimization pass may leave a real insn as the last
6471 insn in the function. We must not skip that insn or we may end
6472 up deleting code that is not really dead. */
6473 for (insn = get_last_insn (); insn; insn = prev)
6477 prev = PREV_INSN (insn);
6481 live_insn = insn_live_p (insn, counts);
6483 /* If this is a dead insn, delete it and show registers in it aren't
6486 if (! live_insn && dbg_cnt (delete_trivial_dead))
6488 count_reg_usage (insn, counts, NULL_RTX, -1);
6489 delete_insn_and_edges (insn);
6494 if (dump_file && ndead)
6495 fprintf (dump_file, "Deleted %i trivially dead insns\n",
6499 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
6503 /* This function is called via for_each_rtx. The argument, NEWREG, is
6504 a condition code register with the desired mode. If we are looking
6505 at the same register in a different mode, replace it with
6509 cse_change_cc_mode (rtx *loc, void *data)
6511 struct change_cc_mode_args* args = (struct change_cc_mode_args*)data;
6515 && REGNO (*loc) == REGNO (args->newreg)
6516 && GET_MODE (*loc) != GET_MODE (args->newreg))
6518 validate_change (args->insn, loc, args->newreg, 1);
6525 /* Change the mode of any reference to the register REGNO (NEWREG) to
6526 GET_MODE (NEWREG) in INSN. */
6529 cse_change_cc_mode_insn (rtx insn, rtx newreg)
6531 struct change_cc_mode_args args;
6538 args.newreg = newreg;
6540 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args);
6541 for_each_rtx (®_NOTES (insn), cse_change_cc_mode, &args);
6543 /* If the following assertion was triggered, there is most probably
6544 something wrong with the cc_modes_compatible back end function.
6545 CC modes only can be considered compatible if the insn - with the mode
6546 replaced by any of the compatible modes - can still be recognized. */
6547 success = apply_change_group ();
6548 gcc_assert (success);
6551 /* Change the mode of any reference to the register REGNO (NEWREG) to
6552 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
6553 any instruction which modifies NEWREG. */
6556 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
6560 for (insn = start; insn != end; insn = NEXT_INSN (insn))
6562 if (! INSN_P (insn))
6565 if (reg_set_p (newreg, insn))
6568 cse_change_cc_mode_insn (insn, newreg);
6572 /* BB is a basic block which finishes with CC_REG as a condition code
6573 register which is set to CC_SRC. Look through the successors of BB
6574 to find blocks which have a single predecessor (i.e., this one),
6575 and look through those blocks for an assignment to CC_REG which is
6576 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
6577 permitted to change the mode of CC_SRC to a compatible mode. This
6578 returns VOIDmode if no equivalent assignments were found.
6579 Otherwise it returns the mode which CC_SRC should wind up with.
6580 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
6581 but is passed unmodified down to recursive calls in order to prevent
6584 The main complexity in this function is handling the mode issues.
6585 We may have more than one duplicate which we can eliminate, and we
6586 try to find a mode which will work for multiple duplicates. */
6588 static enum machine_mode
6589 cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
6590 bool can_change_mode)
6593 enum machine_mode mode;
6594 unsigned int insn_count;
6597 enum machine_mode modes[2];
6603 /* We expect to have two successors. Look at both before picking
6604 the final mode for the comparison. If we have more successors
6605 (i.e., some sort of table jump, although that seems unlikely),
6606 then we require all beyond the first two to use the same
6609 found_equiv = false;
6610 mode = GET_MODE (cc_src);
6612 FOR_EACH_EDGE (e, ei, bb->succs)
6617 if (e->flags & EDGE_COMPLEX)
6620 if (EDGE_COUNT (e->dest->preds) != 1
6621 || e->dest == EXIT_BLOCK_PTR
6622 /* Avoid endless recursion on unreachable blocks. */
6623 || e->dest == orig_bb)
6626 end = NEXT_INSN (BB_END (e->dest));
6627 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
6631 if (! INSN_P (insn))
6634 /* If CC_SRC is modified, we have to stop looking for
6635 something which uses it. */
6636 if (modified_in_p (cc_src, insn))
6639 /* Check whether INSN sets CC_REG to CC_SRC. */
6640 set = single_set (insn);
6642 && REG_P (SET_DEST (set))
6643 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
6646 enum machine_mode set_mode;
6647 enum machine_mode comp_mode;
6650 set_mode = GET_MODE (SET_SRC (set));
6651 comp_mode = set_mode;
6652 if (rtx_equal_p (cc_src, SET_SRC (set)))
6654 else if (GET_CODE (cc_src) == COMPARE
6655 && GET_CODE (SET_SRC (set)) == COMPARE
6657 && rtx_equal_p (XEXP (cc_src, 0),
6658 XEXP (SET_SRC (set), 0))
6659 && rtx_equal_p (XEXP (cc_src, 1),
6660 XEXP (SET_SRC (set), 1)))
6663 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
6664 if (comp_mode != VOIDmode
6665 && (can_change_mode || comp_mode == mode))
6672 if (insn_count < ARRAY_SIZE (insns))
6674 insns[insn_count] = insn;
6675 modes[insn_count] = set_mode;
6676 last_insns[insn_count] = end;
6679 if (mode != comp_mode)
6681 gcc_assert (can_change_mode);
6684 /* The modified insn will be re-recognized later. */
6685 PUT_MODE (cc_src, mode);
6690 if (set_mode != mode)
6692 /* We found a matching expression in the
6693 wrong mode, but we don't have room to
6694 store it in the array. Punt. This case
6698 /* INSN sets CC_REG to a value equal to CC_SRC
6699 with the right mode. We can simply delete
6704 /* We found an instruction to delete. Keep looking,
6705 in the hopes of finding a three-way jump. */
6709 /* We found an instruction which sets the condition
6710 code, so don't look any farther. */
6714 /* If INSN sets CC_REG in some other way, don't look any
6716 if (reg_set_p (cc_reg, insn))
6720 /* If we fell off the bottom of the block, we can keep looking
6721 through successors. We pass CAN_CHANGE_MODE as false because
6722 we aren't prepared to handle compatibility between the
6723 further blocks and this block. */
6726 enum machine_mode submode;
6728 submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false);
6729 if (submode != VOIDmode)
6731 gcc_assert (submode == mode);
6733 can_change_mode = false;
6741 /* Now INSN_COUNT is the number of instructions we found which set
6742 CC_REG to a value equivalent to CC_SRC. The instructions are in
6743 INSNS. The modes used by those instructions are in MODES. */
6746 for (i = 0; i < insn_count; ++i)
6748 if (modes[i] != mode)
6750 /* We need to change the mode of CC_REG in INSNS[i] and
6751 subsequent instructions. */
6754 if (GET_MODE (cc_reg) == mode)
6757 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
6759 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
6763 delete_insn_and_edges (insns[i]);
6769 /* If we have a fixed condition code register (or two), walk through
6770 the instructions and try to eliminate duplicate assignments. */
6773 cse_condition_code_reg (void)
6775 unsigned int cc_regno_1;
6776 unsigned int cc_regno_2;
6781 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
6784 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
6785 if (cc_regno_2 != INVALID_REGNUM)
6786 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
6788 cc_reg_2 = NULL_RTX;
6797 enum machine_mode mode;
6798 enum machine_mode orig_mode;
6800 /* Look for blocks which end with a conditional jump based on a
6801 condition code register. Then look for the instruction which
6802 sets the condition code register. Then look through the
6803 successor blocks for instructions which set the condition
6804 code register to the same value. There are other possible
6805 uses of the condition code register, but these are by far the
6806 most common and the ones which we are most likely to be able
6809 last_insn = BB_END (bb);
6810 if (!JUMP_P (last_insn))
6813 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
6815 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
6820 cc_src_insn = NULL_RTX;
6822 for (insn = PREV_INSN (last_insn);
6823 insn && insn != PREV_INSN (BB_HEAD (bb));
6824 insn = PREV_INSN (insn))
6828 if (! INSN_P (insn))
6830 set = single_set (insn);
6832 && REG_P (SET_DEST (set))
6833 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
6836 cc_src = SET_SRC (set);
6839 else if (reg_set_p (cc_reg, insn))
6846 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
6849 /* Now CC_REG is a condition code register used for a
6850 conditional jump at the end of the block, and CC_SRC, in
6851 CC_SRC_INSN, is the value to which that condition code
6852 register is set, and CC_SRC is still meaningful at the end of
6855 orig_mode = GET_MODE (cc_src);
6856 mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true);
6857 if (mode != VOIDmode)
6859 gcc_assert (mode == GET_MODE (cc_src));
6860 if (mode != orig_mode)
6862 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
6864 cse_change_cc_mode_insn (cc_src_insn, newreg);
6866 /* Do the same in the following insns that use the
6867 current value of CC_REG within BB. */
6868 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
6869 NEXT_INSN (last_insn),
6877 /* Perform common subexpression elimination. Nonzero value from
6878 `cse_main' means that jumps were simplified and some code may now
6879 be unreachable, so do jump optimization again. */
6881 gate_handle_cse (void)
6883 return optimize > 0;
6887 rest_of_handle_cse (void)
6892 dump_flow_info (dump_file, dump_flags);
6894 tem = cse_main (get_insns (), max_reg_num ());
6896 /* If we are not running more CSE passes, then we are no longer
6897 expecting CSE to be run. But always rerun it in a cheap mode. */
6898 cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
6902 timevar_push (TV_JUMP);
6903 rebuild_jump_labels (get_insns ());
6905 timevar_pop (TV_JUMP);
6907 else if (tem == 1 || optimize > 1)
6913 struct rtl_opt_pass pass_cse =
6918 gate_handle_cse, /* gate */
6919 rest_of_handle_cse, /* execute */
6922 0, /* static_pass_number */
6924 0, /* properties_required */
6925 0, /* properties_provided */
6926 0, /* properties_destroyed */
6927 0, /* todo_flags_start */
6928 TODO_df_finish | TODO_verify_rtl_sharing |
6931 TODO_verify_flow, /* todo_flags_finish */
6937 gate_handle_cse2 (void)
6939 return optimize > 0 && flag_rerun_cse_after_loop;
6942 /* Run second CSE pass after loop optimizations. */
6944 rest_of_handle_cse2 (void)
6949 dump_flow_info (dump_file, dump_flags);
6951 tem = cse_main (get_insns (), max_reg_num ());
6953 /* Run a pass to eliminate duplicated assignments to condition code
6954 registers. We have to run this after bypass_jumps, because it
6955 makes it harder for that pass to determine whether a jump can be
6957 cse_condition_code_reg ();
6959 delete_trivially_dead_insns (get_insns (), max_reg_num ());
6963 timevar_push (TV_JUMP);
6964 rebuild_jump_labels (get_insns ());
6966 timevar_pop (TV_JUMP);
6971 cse_not_expected = 1;
6976 struct rtl_opt_pass pass_cse2 =
6981 gate_handle_cse2, /* gate */
6982 rest_of_handle_cse2, /* execute */
6985 0, /* static_pass_number */
6986 TV_CSE2, /* tv_id */
6987 0, /* properties_required */
6988 0, /* properties_provided */
6989 0, /* properties_destroyed */
6990 0, /* todo_flags_start */
6991 TODO_df_finish | TODO_verify_rtl_sharing |
6994 TODO_verify_flow /* todo_flags_finish */