1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
30 #include "basic-block.h"
33 #include "insn-config.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and a vector of "quantity
59 numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
85 entries should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. The `qty_table` members `first_reg' and `last_reg',
89 and `reg_eqv_table' members `next' and `prev' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with qty_table `mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate qty_table `const_rtx'. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate qty_table
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and qty_table `first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
203 /* One plus largest instruction UID used in this function at time of
206 static int max_insn_uid;
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
247 rtx comparison_const;
249 unsigned int first_reg, last_reg;
250 enum machine_mode mode;
251 enum rtx_code comparison_code;
254 /* The table of all qtys, indexed by qty number. */
255 static struct qty_table_elem *qty_table;
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0;
268 static enum machine_mode prev_insn_cc0_mode;
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn;
275 /* Insn being scanned. */
277 static rtx this_insn;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
287 /* Per-register equivalence chain. */
293 /* The table of all register equivalence chains. */
294 static struct reg_eqv_elem *reg_eqv_table;
298 /* Next in hash chain. */
299 struct cse_reg_info *hash_next;
301 /* The next cse_reg_info structure in the free or used list. */
302 struct cse_reg_info *next;
307 /* The quantity number of the register's current contents. */
310 /* The number of times the register has been altered in the current
314 /* The REG_TICK value at which rtx's containing this register are
315 valid in the hash table. If this does not equal the current
316 reg_tick value, such expressions existing in the hash table are
321 /* A free list of cse_reg_info entries. */
322 static struct cse_reg_info *cse_reg_info_free_list;
324 /* A used list of cse_reg_info entries. */
325 static struct cse_reg_info *cse_reg_info_used_list;
326 static struct cse_reg_info *cse_reg_info_used_list_end;
328 /* A mapping from registers to cse_reg_info data structures. */
329 #define REGHASH_SHIFT 7
330 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
331 #define REGHASH_MASK (REGHASH_SIZE - 1)
332 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
334 #define REGHASH_FN(REGNO) \
335 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
337 /* The last lookup we did into the cse_reg_info_tree. This allows us
338 to cache repeated lookups. */
339 static unsigned int cached_regno;
340 static struct cse_reg_info *cached_cse_reg_info;
342 /* A HARD_REG_SET containing all the hard registers for which there is
343 currently a REG expression in the hash table. Note the difference
344 from the above variables, which indicate if the REG is mentioned in some
345 expression in the table. */
347 static HARD_REG_SET hard_regs_in_table;
349 /* CUID of insn that starts the basic block currently being cse-processed. */
351 static int cse_basic_block_start;
353 /* CUID of insn that ends the basic block currently being cse-processed. */
355 static int cse_basic_block_end;
357 /* Vector mapping INSN_UIDs to cuids.
358 The cuids are like uids but increase monotonically always.
359 We use them to see whether a reg is used outside a given basic block. */
361 static int *uid_cuid;
363 /* Highest UID in UID_CUID. */
366 /* Get the cuid of an insn. */
368 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
370 /* Nonzero if this pass has made changes, and therefore it's
371 worthwhile to run the garbage collector. */
373 static int cse_altered;
375 /* Nonzero if cse has altered conditional jump insns
376 in such a way that jump optimization should be redone. */
378 static int cse_jumps_altered;
380 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
381 REG_LABEL, we have to rerun jump after CSE to put in the note. */
382 static int recorded_label_ref;
384 /* canon_hash stores 1 in do_not_record
385 if it notices a reference to CC0, PC, or some other volatile
388 static int do_not_record;
390 #ifdef LOAD_EXTEND_OP
392 /* Scratch rtl used when looking for load-extended copy of a MEM. */
393 static rtx memory_extend_rtx;
396 /* canon_hash stores 1 in hash_arg_in_memory
397 if it notices a reference to memory within the expression being hashed. */
399 static int hash_arg_in_memory;
401 /* The hash table contains buckets which are chains of `struct table_elt's,
402 each recording one expression's information.
403 That expression is in the `exp' field.
405 The canon_exp field contains a canonical (from the point of view of
406 alias analysis) version of the `exp' field.
408 Those elements with the same hash code are chained in both directions
409 through the `next_same_hash' and `prev_same_hash' fields.
411 Each set of expressions with equivalent values
412 are on a two-way chain through the `next_same_value'
413 and `prev_same_value' fields, and all point with
414 the `first_same_value' field at the first element in
415 that chain. The chain is in order of increasing cost.
416 Each element's cost value is in its `cost' field.
418 The `in_memory' field is nonzero for elements that
419 involve any reference to memory. These elements are removed
420 whenever a write is done to an unidentified location in memory.
421 To be safe, we assume that a memory address is unidentified unless
422 the address is either a symbol constant or a constant plus
423 the frame pointer or argument pointer.
425 The `related_value' field is used to connect related expressions
426 (that differ by adding an integer).
427 The related expressions are chained in a circular fashion.
428 `related_value' is zero for expressions for which this
431 The `cost' field stores the cost of this element's expression.
432 The `regcost' field stores the value returned by approx_reg_cost for
433 this element's expression.
435 The `is_const' flag is set if the element is a constant (including
438 The `flag' field is used as a temporary during some search routines.
440 The `mode' field is usually the same as GET_MODE (`exp'), but
441 if `exp' is a CONST_INT and has no machine mode then the `mode'
442 field is the mode it was being used as. Each constant is
443 recorded separately for each mode it is used with. */
449 struct table_elt *next_same_hash;
450 struct table_elt *prev_same_hash;
451 struct table_elt *next_same_value;
452 struct table_elt *prev_same_value;
453 struct table_elt *first_same_value;
454 struct table_elt *related_value;
457 enum machine_mode mode;
463 /* We don't want a lot of buckets, because we rarely have very many
464 things stored in the hash table, and a lot of buckets slows
465 down a lot of loops that happen frequently. */
467 #define HASH_SIZE (1 << HASH_SHIFT)
468 #define HASH_MASK (HASH_SIZE - 1)
470 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
471 register (hard registers may require `do_not_record' to be set). */
474 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
475 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
476 : canon_hash (X, M)) & HASH_MASK)
478 /* Determine whether register number N is considered a fixed register for the
479 purpose of approximating register costs.
480 It is desirable to replace other regs with fixed regs, to reduce need for
482 A reg wins if it is either the frame pointer or designated as fixed. */
483 #define FIXED_REGNO_P(N) \
484 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
485 || fixed_regs[N] || global_regs[N])
487 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
488 hard registers and pointers into the frame are the cheapest with a cost
489 of 0. Next come pseudos with a cost of one and other hard registers with
490 a cost of 2. Aside from these special cases, call `rtx_cost'. */
492 #define CHEAP_REGNO(N) \
493 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
494 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
495 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
496 || ((N) < FIRST_PSEUDO_REGISTER \
497 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
499 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
500 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
502 /* Get the info associated with register N. */
504 #define GET_CSE_REG_INFO(N) \
505 (((N) == cached_regno && cached_cse_reg_info) \
506 ? cached_cse_reg_info : get_cse_reg_info ((N)))
508 /* Get the number of times this register has been updated in this
511 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
513 /* Get the point at which REG was recorded in the table. */
515 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
517 /* Get the quantity number for REG. */
519 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
521 /* Determine if the quantity number for register X represents a valid index
522 into the qty_table. */
524 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
526 static struct table_elt *table[HASH_SIZE];
528 /* Chain of `struct table_elt's made so far for this function
529 but currently removed from the table. */
531 static struct table_elt *free_element_chain;
533 /* Number of `struct table_elt' structures made so far for this function. */
535 static int n_elements_made;
537 /* Maximum value `n_elements_made' has had so far in this compilation
538 for functions previously processed. */
540 static int max_elements_made;
542 /* Surviving equivalence class when two equivalence classes are merged
543 by recording the effects of a jump in the last insn. Zero if the
544 last insn was not a conditional jump. */
546 static struct table_elt *last_jump_equiv_class;
548 /* Set to the cost of a constant pool reference if one was found for a
549 symbolic constant. If this was found, it means we should try to
550 convert constants into constant pool entries if they don't fit in
553 static int constant_pool_entries_cost;
555 /* Define maximum length of a branch path. */
557 #define PATHLENGTH 10
559 /* This data describes a block that will be processed by cse_basic_block. */
561 struct cse_basic_block_data
563 /* Lowest CUID value of insns in block. */
565 /* Highest CUID value of insns in block. */
567 /* Total number of SETs in block. */
569 /* Last insn in the block. */
571 /* Size of current branch path, if any. */
573 /* Current branch path, indicating which branches will be taken. */
576 /* The branch insn. */
578 /* Whether it should be taken or not. AROUND is the same as taken
579 except that it is used when the destination label is not preceded
581 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
585 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
586 virtual regs here because the simplify_*_operation routines are called
587 by integrate.c, which is called before virtual register instantiation.
589 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
590 a header file so that their definitions can be shared with the
591 simplification routines in simplify-rtx.c. Until then, do not
592 change these macros without also changing the copy in simplify-rtx.c. */
594 #define FIXED_BASE_PLUS_P(X) \
595 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
596 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
597 || (X) == virtual_stack_vars_rtx \
598 || (X) == virtual_incoming_args_rtx \
599 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
600 && (XEXP (X, 0) == frame_pointer_rtx \
601 || XEXP (X, 0) == hard_frame_pointer_rtx \
602 || ((X) == arg_pointer_rtx \
603 && fixed_regs[ARG_POINTER_REGNUM]) \
604 || XEXP (X, 0) == virtual_stack_vars_rtx \
605 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
606 || GET_CODE (X) == ADDRESSOF)
608 /* Similar, but also allows reference to the stack pointer.
610 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
611 arg_pointer_rtx by itself is nonzero, because on at least one machine,
612 the i960, the arg pointer is zero when it is unused. */
614 #define NONZERO_BASE_PLUS_P(X) \
615 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
616 || (X) == virtual_stack_vars_rtx \
617 || (X) == virtual_incoming_args_rtx \
618 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
619 && (XEXP (X, 0) == frame_pointer_rtx \
620 || XEXP (X, 0) == hard_frame_pointer_rtx \
621 || ((X) == arg_pointer_rtx \
622 && fixed_regs[ARG_POINTER_REGNUM]) \
623 || XEXP (X, 0) == virtual_stack_vars_rtx \
624 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
625 || (X) == stack_pointer_rtx \
626 || (X) == virtual_stack_dynamic_rtx \
627 || (X) == virtual_outgoing_args_rtx \
628 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
629 && (XEXP (X, 0) == stack_pointer_rtx \
630 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
631 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
632 || GET_CODE (X) == ADDRESSOF)
634 static int notreg_cost PARAMS ((rtx, enum rtx_code));
635 static int approx_reg_cost_1 PARAMS ((rtx *, void *));
636 static int approx_reg_cost PARAMS ((rtx));
637 static int preferrable PARAMS ((int, int, int, int));
638 static void new_basic_block PARAMS ((void));
639 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
640 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
641 static void delete_reg_equiv PARAMS ((unsigned int));
642 static int mention_regs PARAMS ((rtx));
643 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
644 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
645 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
646 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
647 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
648 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
650 static void merge_equiv_classes PARAMS ((struct table_elt *,
651 struct table_elt *));
652 static void invalidate PARAMS ((rtx, enum machine_mode));
653 static int cse_rtx_varies_p PARAMS ((rtx, int));
654 static void remove_invalid_refs PARAMS ((unsigned int));
655 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
657 static void rehash_using_reg PARAMS ((rtx));
658 static void invalidate_memory PARAMS ((void));
659 static void invalidate_for_call PARAMS ((void));
660 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
661 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
662 static unsigned canon_hash_string PARAMS ((const char *));
663 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
664 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
665 static rtx canon_reg PARAMS ((rtx, rtx));
666 static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
667 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
669 enum machine_mode *));
670 static rtx fold_rtx PARAMS ((rtx, rtx));
671 static rtx equiv_constant PARAMS ((rtx));
672 static void record_jump_equiv PARAMS ((rtx, int));
673 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
675 static void cse_insn PARAMS ((rtx, rtx));
676 static int addr_affects_sp_p PARAMS ((rtx));
677 static void invalidate_from_clobbers PARAMS ((rtx));
678 static rtx cse_process_notes PARAMS ((rtx, rtx));
679 static void cse_around_loop PARAMS ((rtx));
680 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
681 static void invalidate_skipped_block PARAMS ((rtx));
682 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
683 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
684 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
685 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
686 static int check_for_label_ref PARAMS ((rtx *, void *));
687 extern void dump_class PARAMS ((struct table_elt*));
688 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
689 static int check_dependence PARAMS ((rtx *, void *));
691 static void flush_hash_table PARAMS ((void));
692 static bool insn_live_p PARAMS ((rtx, int *));
693 static bool set_live_p PARAMS ((rtx, rtx, int *));
694 static bool dead_libcall_p PARAMS ((rtx));
696 /* Dump the expressions in the equivalence class indicated by CLASSP.
697 This function is used only for debugging. */
700 struct table_elt *classp;
702 struct table_elt *elt;
704 fprintf (stderr, "Equivalence chain for ");
705 print_rtl (stderr, classp->exp);
706 fprintf (stderr, ": \n");
708 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
710 print_rtl (stderr, elt->exp);
711 fprintf (stderr, "\n");
715 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
718 approx_reg_cost_1 (xp, data)
723 regset set = (regset) data;
725 if (x && GET_CODE (x) == REG)
726 SET_REGNO_REG_SET (set, REGNO (x));
730 /* Return an estimate of the cost of the registers used in an rtx.
731 This is mostly the number of different REG expressions in the rtx;
732 however for some exceptions like fixed registers we use a cost of
733 0. If any other hard register reference occurs, return MAX_COST. */
745 for_each_rtx (&x, approx_reg_cost_1, (void *)&set);
747 EXECUTE_IF_SET_IN_REG_SET
750 if (! CHEAP_REGNO (i))
752 if (i < FIRST_PSEUDO_REGISTER)
755 cost += i < FIRST_PSEUDO_REGISTER ? 2 : 1;
759 CLEAR_REG_SET (&set);
760 return hardregs && SMALL_REGISTER_CLASSES ? MAX_COST : cost;
763 /* Return a negative value if an rtx A, whose costs are given by COST_A
764 and REGCOST_A, is more desirable than an rtx B.
765 Return a positive value if A is less desirable, or 0 if the two are
768 preferrable (cost_a, regcost_a, cost_b, regcost_b)
769 int cost_a, regcost_a, cost_b, regcost_b;
771 /* First, get rid of a cases involving expressions that are entirely
773 if (cost_a != cost_b)
775 if (cost_a == MAX_COST)
777 if (cost_b == MAX_COST)
781 /* Avoid extending lifetimes of hardregs. */
782 if (regcost_a != regcost_b)
784 if (regcost_a == MAX_COST)
786 if (regcost_b == MAX_COST)
790 /* Normal operation costs take precedence. */
791 if (cost_a != cost_b)
792 return cost_a - cost_b;
793 /* Only if these are identical consider effects on register pressure. */
794 if (regcost_a != regcost_b)
795 return regcost_a - regcost_b;
799 /* Internal function, to compute cost when X is not a register; called
800 from COST macro to keep it simple. */
803 notreg_cost (x, outer)
807 return ((GET_CODE (x) == SUBREG
808 && GET_CODE (SUBREG_REG (x)) == REG
809 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
810 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
811 && (GET_MODE_SIZE (GET_MODE (x))
812 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
813 && subreg_lowpart_p (x)
814 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
815 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
817 : rtx_cost (x, outer) * 2);
820 /* Return an estimate of the cost of computing rtx X.
821 One use is in cse, to decide which expression to keep in the hash table.
822 Another is in rtl generation, to pick the cheapest way to multiply.
823 Other uses like the latter are expected in the future. */
826 rtx_cost (x, outer_code)
828 enum rtx_code outer_code ATTRIBUTE_UNUSED;
838 /* Compute the default costs of certain things.
839 Note that RTX_COSTS can override the defaults. */
845 /* Count multiplication by 2**n as a shift,
846 because if we are considering it, we would output it as a shift. */
847 if (GET_CODE (XEXP (x, 1)) == CONST_INT
848 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
851 total = COSTS_N_INSNS (5);
857 total = COSTS_N_INSNS (7);
860 /* Used in loop.c and combine.c as a marker. */
864 total = COSTS_N_INSNS (1);
873 /* If we can't tie these modes, make this expensive. The larger
874 the mode, the more expensive it is. */
875 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
876 return COSTS_N_INSNS (2
877 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
881 RTX_COSTS (x, code, outer_code);
884 CONST_COSTS (x, code, outer_code);
888 #ifdef DEFAULT_RTX_COSTS
889 DEFAULT_RTX_COSTS (x, code, outer_code);
894 /* Sum the costs of the sub-rtx's, plus cost of this operation,
895 which is already in total. */
897 fmt = GET_RTX_FORMAT (code);
898 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
900 total += rtx_cost (XEXP (x, i), code);
901 else if (fmt[i] == 'E')
902 for (j = 0; j < XVECLEN (x, i); j++)
903 total += rtx_cost (XVECEXP (x, i, j), code);
908 /* Return cost of address expression X.
909 Expect that X is properly formed address reference. */
912 address_cost (x, mode)
914 enum machine_mode mode;
916 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
917 during CSE, such nodes are present. Using an ADDRESSOF node which
918 refers to the address of a REG is a good thing because we can then
919 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
921 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
924 /* We may be asked for cost of various unusual addresses, such as operands
925 of push instruction. It is not worthwhile to complicate writing
926 of ADDRESS_COST macro by such cases. */
928 if (!memory_address_p (mode, x))
931 return ADDRESS_COST (x);
933 return rtx_cost (x, MEM);
938 static struct cse_reg_info *
939 get_cse_reg_info (regno)
942 struct cse_reg_info **hash_head = ®_hash[REGHASH_FN (regno)];
943 struct cse_reg_info *p;
945 for (p = *hash_head; p != NULL; p = p->hash_next)
946 if (p->regno == regno)
951 /* Get a new cse_reg_info structure. */
952 if (cse_reg_info_free_list)
954 p = cse_reg_info_free_list;
955 cse_reg_info_free_list = p->next;
958 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
960 /* Insert into hash table. */
961 p->hash_next = *hash_head;
966 p->reg_in_table = -1;
969 p->next = cse_reg_info_used_list;
970 cse_reg_info_used_list = p;
971 if (!cse_reg_info_used_list_end)
972 cse_reg_info_used_list_end = p;
975 /* Cache this lookup; we tend to be looking up information about the
976 same register several times in a row. */
977 cached_regno = regno;
978 cached_cse_reg_info = p;
983 /* Clear the hash table and initialize each register with its own quantity,
984 for a new basic block. */
993 /* Clear out hash table state for this pass. */
995 memset ((char *) reg_hash, 0, sizeof reg_hash);
997 if (cse_reg_info_used_list)
999 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
1000 cse_reg_info_free_list = cse_reg_info_used_list;
1001 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
1003 cached_cse_reg_info = 0;
1005 CLEAR_HARD_REG_SET (hard_regs_in_table);
1007 /* The per-quantity values used to be initialized here, but it is
1008 much faster to initialize each as it is made in `make_new_qty'. */
1010 for (i = 0; i < HASH_SIZE; i++)
1012 struct table_elt *first;
1017 struct table_elt *last = first;
1021 while (last->next_same_hash != NULL)
1022 last = last->next_same_hash;
1024 /* Now relink this hash entire chain into
1025 the free element list. */
1027 last->next_same_hash = free_element_chain;
1028 free_element_chain = first;
1039 /* Say that register REG contains a quantity in mode MODE not in any
1040 register before and initialize that quantity. */
1043 make_new_qty (reg, mode)
1045 enum machine_mode mode;
1048 struct qty_table_elem *ent;
1049 struct reg_eqv_elem *eqv;
1051 if (next_qty >= max_qty)
1054 q = REG_QTY (reg) = next_qty++;
1055 ent = &qty_table[q];
1056 ent->first_reg = reg;
1057 ent->last_reg = reg;
1059 ent->const_rtx = ent->const_insn = NULL_RTX;
1060 ent->comparison_code = UNKNOWN;
1062 eqv = ®_eqv_table[reg];
1063 eqv->next = eqv->prev = -1;
1066 /* Make reg NEW equivalent to reg OLD.
1067 OLD is not changing; NEW is. */
1070 make_regs_eqv (new, old)
1071 unsigned int new, old;
1073 unsigned int lastr, firstr;
1074 int q = REG_QTY (old);
1075 struct qty_table_elem *ent;
1077 ent = &qty_table[q];
1079 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1080 if (! REGNO_QTY_VALID_P (old))
1084 firstr = ent->first_reg;
1085 lastr = ent->last_reg;
1087 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1088 hard regs. Among pseudos, if NEW will live longer than any other reg
1089 of the same qty, and that is beyond the current basic block,
1090 make it the new canonical replacement for this qty. */
1091 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1092 /* Certain fixed registers might be of the class NO_REGS. This means
1093 that not only can they not be allocated by the compiler, but
1094 they cannot be used in substitutions or canonicalizations
1096 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1097 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1098 || (new >= FIRST_PSEUDO_REGISTER
1099 && (firstr < FIRST_PSEUDO_REGISTER
1100 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1101 || (uid_cuid[REGNO_FIRST_UID (new)]
1102 < cse_basic_block_start))
1103 && (uid_cuid[REGNO_LAST_UID (new)]
1104 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1106 reg_eqv_table[firstr].prev = new;
1107 reg_eqv_table[new].next = firstr;
1108 reg_eqv_table[new].prev = -1;
1109 ent->first_reg = new;
1113 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1114 Otherwise, insert before any non-fixed hard regs that are at the
1115 end. Registers of class NO_REGS cannot be used as an
1116 equivalent for anything. */
1117 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1118 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1119 && new >= FIRST_PSEUDO_REGISTER)
1120 lastr = reg_eqv_table[lastr].prev;
1121 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1122 if (reg_eqv_table[lastr].next >= 0)
1123 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1125 qty_table[q].last_reg = new;
1126 reg_eqv_table[lastr].next = new;
1127 reg_eqv_table[new].prev = lastr;
1131 /* Remove REG from its equivalence class. */
1134 delete_reg_equiv (reg)
1137 struct qty_table_elem *ent;
1138 int q = REG_QTY (reg);
1141 /* If invalid, do nothing. */
1145 ent = &qty_table[q];
1147 p = reg_eqv_table[reg].prev;
1148 n = reg_eqv_table[reg].next;
1151 reg_eqv_table[n].prev = p;
1155 reg_eqv_table[p].next = n;
1159 REG_QTY (reg) = reg;
1162 /* Remove any invalid expressions from the hash table
1163 that refer to any of the registers contained in expression X.
1165 Make sure that newly inserted references to those registers
1166 as subexpressions will be considered valid.
1168 mention_regs is not called when a register itself
1169 is being stored in the table.
1171 Return 1 if we have done something that may have changed the hash code
1186 code = GET_CODE (x);
1189 unsigned int regno = REGNO (x);
1190 unsigned int endregno
1191 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1192 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1195 for (i = regno; i < endregno; i++)
1197 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1198 remove_invalid_refs (i);
1200 REG_IN_TABLE (i) = REG_TICK (i);
1206 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1207 pseudo if they don't use overlapping words. We handle only pseudos
1208 here for simplicity. */
1209 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1210 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1212 unsigned int i = REGNO (SUBREG_REG (x));
1214 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1216 /* If reg_tick has been incremented more than once since
1217 reg_in_table was last set, that means that the entire
1218 register has been set before, so discard anything memorized
1219 for the entire register, including all SUBREG expressions. */
1220 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1221 remove_invalid_refs (i);
1223 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1226 REG_IN_TABLE (i) = REG_TICK (i);
1230 /* If X is a comparison or a COMPARE and either operand is a register
1231 that does not have a quantity, give it one. This is so that a later
1232 call to record_jump_equiv won't cause X to be assigned a different
1233 hash code and not found in the table after that call.
1235 It is not necessary to do this here, since rehash_using_reg can
1236 fix up the table later, but doing this here eliminates the need to
1237 call that expensive function in the most common case where the only
1238 use of the register is in the comparison. */
1240 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1242 if (GET_CODE (XEXP (x, 0)) == REG
1243 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1244 if (insert_regs (XEXP (x, 0), NULL, 0))
1246 rehash_using_reg (XEXP (x, 0));
1250 if (GET_CODE (XEXP (x, 1)) == REG
1251 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1252 if (insert_regs (XEXP (x, 1), NULL, 0))
1254 rehash_using_reg (XEXP (x, 1));
1259 fmt = GET_RTX_FORMAT (code);
1260 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1262 changed |= mention_regs (XEXP (x, i));
1263 else if (fmt[i] == 'E')
1264 for (j = 0; j < XVECLEN (x, i); j++)
1265 changed |= mention_regs (XVECEXP (x, i, j));
1270 /* Update the register quantities for inserting X into the hash table
1271 with a value equivalent to CLASSP.
1272 (If the class does not contain a REG, it is irrelevant.)
1273 If MODIFIED is nonzero, X is a destination; it is being modified.
1274 Note that delete_reg_equiv should be called on a register
1275 before insert_regs is done on that register with MODIFIED != 0.
1277 Nonzero value means that elements of reg_qty have changed
1278 so X's hash code may be different. */
1281 insert_regs (x, classp, modified)
1283 struct table_elt *classp;
1286 if (GET_CODE (x) == REG)
1288 unsigned int regno = REGNO (x);
1291 /* If REGNO is in the equivalence table already but is of the
1292 wrong mode for that equivalence, don't do anything here. */
1294 qty_valid = REGNO_QTY_VALID_P (regno);
1297 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1299 if (ent->mode != GET_MODE (x))
1303 if (modified || ! qty_valid)
1306 for (classp = classp->first_same_value;
1308 classp = classp->next_same_value)
1309 if (GET_CODE (classp->exp) == REG
1310 && GET_MODE (classp->exp) == GET_MODE (x))
1312 make_regs_eqv (regno, REGNO (classp->exp));
1316 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1317 than REG_IN_TABLE to find out if there was only a single preceding
1318 invalidation - for the SUBREG - or another one, which would be
1319 for the full register. However, if we find here that REG_TICK
1320 indicates that the register is invalid, it means that it has
1321 been invalidated in a separate operation. The SUBREG might be used
1322 now (then this is a recursive call), or we might use the full REG
1323 now and a SUBREG of it later. So bump up REG_TICK so that
1324 mention_regs will do the right thing. */
1326 && REG_IN_TABLE (regno) >= 0
1327 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1329 make_new_qty (regno, GET_MODE (x));
1336 /* If X is a SUBREG, we will likely be inserting the inner register in the
1337 table. If that register doesn't have an assigned quantity number at
1338 this point but does later, the insertion that we will be doing now will
1339 not be accessible because its hash code will have changed. So assign
1340 a quantity number now. */
1342 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1343 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1345 insert_regs (SUBREG_REG (x), NULL, 0);
1350 return mention_regs (x);
1353 /* Look in or update the hash table. */
1355 /* Remove table element ELT from use in the table.
1356 HASH is its hash code, made using the HASH macro.
1357 It's an argument because often that is known in advance
1358 and we save much time not recomputing it. */
1361 remove_from_table (elt, hash)
1362 struct table_elt *elt;
1368 /* Mark this element as removed. See cse_insn. */
1369 elt->first_same_value = 0;
1371 /* Remove the table element from its equivalence class. */
1374 struct table_elt *prev = elt->prev_same_value;
1375 struct table_elt *next = elt->next_same_value;
1378 next->prev_same_value = prev;
1381 prev->next_same_value = next;
1384 struct table_elt *newfirst = next;
1387 next->first_same_value = newfirst;
1388 next = next->next_same_value;
1393 /* Remove the table element from its hash bucket. */
1396 struct table_elt *prev = elt->prev_same_hash;
1397 struct table_elt *next = elt->next_same_hash;
1400 next->prev_same_hash = prev;
1403 prev->next_same_hash = next;
1404 else if (table[hash] == elt)
1408 /* This entry is not in the proper hash bucket. This can happen
1409 when two classes were merged by `merge_equiv_classes'. Search
1410 for the hash bucket that it heads. This happens only very
1411 rarely, so the cost is acceptable. */
1412 for (hash = 0; hash < HASH_SIZE; hash++)
1413 if (table[hash] == elt)
1418 /* Remove the table element from its related-value circular chain. */
1420 if (elt->related_value != 0 && elt->related_value != elt)
1422 struct table_elt *p = elt->related_value;
1424 while (p->related_value != elt)
1425 p = p->related_value;
1426 p->related_value = elt->related_value;
1427 if (p->related_value == p)
1428 p->related_value = 0;
1431 /* Now add it to the free element chain. */
1432 elt->next_same_hash = free_element_chain;
1433 free_element_chain = elt;
1436 /* Look up X in the hash table and return its table element,
1437 or 0 if X is not in the table.
1439 MODE is the machine-mode of X, or if X is an integer constant
1440 with VOIDmode then MODE is the mode with which X will be used.
1442 Here we are satisfied to find an expression whose tree structure
1445 static struct table_elt *
1446 lookup (x, hash, mode)
1449 enum machine_mode mode;
1451 struct table_elt *p;
1453 for (p = table[hash]; p; p = p->next_same_hash)
1454 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1455 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1461 /* Like `lookup' but don't care whether the table element uses invalid regs.
1462 Also ignore discrepancies in the machine mode of a register. */
1464 static struct table_elt *
1465 lookup_for_remove (x, hash, mode)
1468 enum machine_mode mode;
1470 struct table_elt *p;
1472 if (GET_CODE (x) == REG)
1474 unsigned int regno = REGNO (x);
1476 /* Don't check the machine mode when comparing registers;
1477 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1478 for (p = table[hash]; p; p = p->next_same_hash)
1479 if (GET_CODE (p->exp) == REG
1480 && REGNO (p->exp) == regno)
1485 for (p = table[hash]; p; p = p->next_same_hash)
1486 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1493 /* Look for an expression equivalent to X and with code CODE.
1494 If one is found, return that expression. */
1497 lookup_as_function (x, code)
1502 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1504 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1505 long as we are narrowing. So if we looked in vain for a mode narrower
1506 than word_mode before, look for word_mode now. */
1507 if (p == 0 && code == CONST_INT
1508 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1511 PUT_MODE (x, word_mode);
1512 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1518 for (p = p->first_same_value; p; p = p->next_same_value)
1519 if (GET_CODE (p->exp) == code
1520 /* Make sure this is a valid entry in the table. */
1521 && exp_equiv_p (p->exp, p->exp, 1, 0))
1527 /* Insert X in the hash table, assuming HASH is its hash code
1528 and CLASSP is an element of the class it should go in
1529 (or 0 if a new class should be made).
1530 It is inserted at the proper position to keep the class in
1531 the order cheapest first.
1533 MODE is the machine-mode of X, or if X is an integer constant
1534 with VOIDmode then MODE is the mode with which X will be used.
1536 For elements of equal cheapness, the most recent one
1537 goes in front, except that the first element in the list
1538 remains first unless a cheaper element is added. The order of
1539 pseudo-registers does not matter, as canon_reg will be called to
1540 find the cheapest when a register is retrieved from the table.
1542 The in_memory field in the hash table element is set to 0.
1543 The caller must set it nonzero if appropriate.
1545 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1546 and if insert_regs returns a nonzero value
1547 you must then recompute its hash code before calling here.
1549 If necessary, update table showing constant values of quantities. */
1551 #define CHEAPER(X, Y) \
1552 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1554 static struct table_elt *
1555 insert (x, classp, hash, mode)
1557 struct table_elt *classp;
1559 enum machine_mode mode;
1561 struct table_elt *elt;
1563 /* If X is a register and we haven't made a quantity for it,
1564 something is wrong. */
1565 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1568 /* If X is a hard register, show it is being put in the table. */
1569 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1571 unsigned int regno = REGNO (x);
1572 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1575 for (i = regno; i < endregno; i++)
1576 SET_HARD_REG_BIT (hard_regs_in_table, i);
1579 /* Put an element for X into the right hash bucket. */
1581 elt = free_element_chain;
1583 free_element_chain = elt->next_same_hash;
1587 elt = (struct table_elt *) xmalloc (sizeof (struct table_elt));
1591 elt->canon_exp = NULL_RTX;
1592 elt->cost = COST (x);
1593 elt->regcost = approx_reg_cost (x);
1594 elt->next_same_value = 0;
1595 elt->prev_same_value = 0;
1596 elt->next_same_hash = table[hash];
1597 elt->prev_same_hash = 0;
1598 elt->related_value = 0;
1601 elt->is_const = (CONSTANT_P (x)
1602 /* GNU C++ takes advantage of this for `this'
1603 (and other const values). */
1604 || (RTX_UNCHANGING_P (x)
1605 && GET_CODE (x) == REG
1606 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1607 || FIXED_BASE_PLUS_P (x));
1610 table[hash]->prev_same_hash = elt;
1613 /* Put it into the proper value-class. */
1616 classp = classp->first_same_value;
1617 if (CHEAPER (elt, classp))
1618 /* Insert at the head of the class */
1620 struct table_elt *p;
1621 elt->next_same_value = classp;
1622 classp->prev_same_value = elt;
1623 elt->first_same_value = elt;
1625 for (p = classp; p; p = p->next_same_value)
1626 p->first_same_value = elt;
1630 /* Insert not at head of the class. */
1631 /* Put it after the last element cheaper than X. */
1632 struct table_elt *p, *next;
1634 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1637 /* Put it after P and before NEXT. */
1638 elt->next_same_value = next;
1640 next->prev_same_value = elt;
1642 elt->prev_same_value = p;
1643 p->next_same_value = elt;
1644 elt->first_same_value = classp;
1648 elt->first_same_value = elt;
1650 /* If this is a constant being set equivalent to a register or a register
1651 being set equivalent to a constant, note the constant equivalence.
1653 If this is a constant, it cannot be equivalent to a different constant,
1654 and a constant is the only thing that can be cheaper than a register. So
1655 we know the register is the head of the class (before the constant was
1658 If this is a register that is not already known equivalent to a
1659 constant, we must check the entire class.
1661 If this is a register that is already known equivalent to an insn,
1662 update the qtys `const_insn' to show that `this_insn' is the latest
1663 insn making that quantity equivalent to the constant. */
1665 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1666 && GET_CODE (x) != REG)
1668 int exp_q = REG_QTY (REGNO (classp->exp));
1669 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1671 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1672 exp_ent->const_insn = this_insn;
1675 else if (GET_CODE (x) == REG
1677 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1680 struct table_elt *p;
1682 for (p = classp; p != 0; p = p->next_same_value)
1684 if (p->is_const && GET_CODE (p->exp) != REG)
1686 int x_q = REG_QTY (REGNO (x));
1687 struct qty_table_elem *x_ent = &qty_table[x_q];
1690 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1691 x_ent->const_insn = this_insn;
1697 else if (GET_CODE (x) == REG
1698 && qty_table[REG_QTY (REGNO (x))].const_rtx
1699 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1700 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1702 /* If this is a constant with symbolic value,
1703 and it has a term with an explicit integer value,
1704 link it up with related expressions. */
1705 if (GET_CODE (x) == CONST)
1707 rtx subexp = get_related_value (x);
1709 struct table_elt *subelt, *subelt_prev;
1713 /* Get the integer-free subexpression in the hash table. */
1714 subhash = safe_hash (subexp, mode) & HASH_MASK;
1715 subelt = lookup (subexp, subhash, mode);
1717 subelt = insert (subexp, NULL, subhash, mode);
1718 /* Initialize SUBELT's circular chain if it has none. */
1719 if (subelt->related_value == 0)
1720 subelt->related_value = subelt;
1721 /* Find the element in the circular chain that precedes SUBELT. */
1722 subelt_prev = subelt;
1723 while (subelt_prev->related_value != subelt)
1724 subelt_prev = subelt_prev->related_value;
1725 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1726 This way the element that follows SUBELT is the oldest one. */
1727 elt->related_value = subelt_prev->related_value;
1728 subelt_prev->related_value = elt;
1735 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1736 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1737 the two classes equivalent.
1739 CLASS1 will be the surviving class; CLASS2 should not be used after this
1742 Any invalid entries in CLASS2 will not be copied. */
1745 merge_equiv_classes (class1, class2)
1746 struct table_elt *class1, *class2;
1748 struct table_elt *elt, *next, *new;
1750 /* Ensure we start with the head of the classes. */
1751 class1 = class1->first_same_value;
1752 class2 = class2->first_same_value;
1754 /* If they were already equal, forget it. */
1755 if (class1 == class2)
1758 for (elt = class2; elt; elt = next)
1762 enum machine_mode mode = elt->mode;
1764 next = elt->next_same_value;
1766 /* Remove old entry, make a new one in CLASS1's class.
1767 Don't do this for invalid entries as we cannot find their
1768 hash code (it also isn't necessary). */
1769 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1771 hash_arg_in_memory = 0;
1772 hash = HASH (exp, mode);
1774 if (GET_CODE (exp) == REG)
1775 delete_reg_equiv (REGNO (exp));
1777 remove_from_table (elt, hash);
1779 if (insert_regs (exp, class1, 0))
1781 rehash_using_reg (exp);
1782 hash = HASH (exp, mode);
1784 new = insert (exp, class1, hash, mode);
1785 new->in_memory = hash_arg_in_memory;
1790 /* Flush the entire hash table. */
1796 struct table_elt *p;
1798 for (i = 0; i < HASH_SIZE; i++)
1799 for (p = table[i]; p; p = table[i])
1801 /* Note that invalidate can remove elements
1802 after P in the current hash chain. */
1803 if (GET_CODE (p->exp) == REG)
1804 invalidate (p->exp, p->mode);
1806 remove_from_table (p, i);
1810 /* Function called for each rtx to check whether true dependence exist. */
1811 struct check_dependence_data
1813 enum machine_mode mode;
1818 check_dependence (x, data)
1822 struct check_dependence_data *d = (struct check_dependence_data *) data;
1823 if (*x && GET_CODE (*x) == MEM)
1824 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1829 /* Remove from the hash table, or mark as invalid, all expressions whose
1830 values could be altered by storing in X. X is a register, a subreg, or
1831 a memory reference with nonvarying address (because, when a memory
1832 reference with a varying address is stored in, all memory references are
1833 removed by invalidate_memory so specific invalidation is superfluous).
1834 FULL_MODE, if not VOIDmode, indicates that this much should be
1835 invalidated instead of just the amount indicated by the mode of X. This
1836 is only used for bitfield stores into memory.
1838 A nonvarying address may be just a register or just a symbol reference,
1839 or it may be either of those plus a numeric offset. */
1842 invalidate (x, full_mode)
1844 enum machine_mode full_mode;
1847 struct table_elt *p;
1849 switch (GET_CODE (x))
1853 /* If X is a register, dependencies on its contents are recorded
1854 through the qty number mechanism. Just change the qty number of
1855 the register, mark it as invalid for expressions that refer to it,
1856 and remove it itself. */
1857 unsigned int regno = REGNO (x);
1858 unsigned int hash = HASH (x, GET_MODE (x));
1860 /* Remove REGNO from any quantity list it might be on and indicate
1861 that its value might have changed. If it is a pseudo, remove its
1862 entry from the hash table.
1864 For a hard register, we do the first two actions above for any
1865 additional hard registers corresponding to X. Then, if any of these
1866 registers are in the table, we must remove any REG entries that
1867 overlap these registers. */
1869 delete_reg_equiv (regno);
1872 if (regno >= FIRST_PSEUDO_REGISTER)
1874 /* Because a register can be referenced in more than one mode,
1875 we might have to remove more than one table entry. */
1876 struct table_elt *elt;
1878 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1879 remove_from_table (elt, hash);
1883 HOST_WIDE_INT in_table
1884 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1885 unsigned int endregno
1886 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1887 unsigned int tregno, tendregno, rn;
1888 struct table_elt *p, *next;
1890 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1892 for (rn = regno + 1; rn < endregno; rn++)
1894 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1895 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1896 delete_reg_equiv (rn);
1901 for (hash = 0; hash < HASH_SIZE; hash++)
1902 for (p = table[hash]; p; p = next)
1904 next = p->next_same_hash;
1906 if (GET_CODE (p->exp) != REG
1907 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1910 tregno = REGNO (p->exp);
1912 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1913 if (tendregno > regno && tregno < endregno)
1914 remove_from_table (p, hash);
1921 invalidate (SUBREG_REG (x), VOIDmode);
1925 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1926 invalidate (XVECEXP (x, 0, i), VOIDmode);
1930 /* This is part of a disjoint return value; extract the location in
1931 question ignoring the offset. */
1932 invalidate (XEXP (x, 0), VOIDmode);
1936 /* Calculate the canonical version of X here so that
1937 true_dependence doesn't generate new RTL for X on each call. */
1940 /* Remove all hash table elements that refer to overlapping pieces of
1942 if (full_mode == VOIDmode)
1943 full_mode = GET_MODE (x);
1945 for (i = 0; i < HASH_SIZE; i++)
1947 struct table_elt *next;
1949 for (p = table[i]; p; p = next)
1951 next = p->next_same_hash;
1954 struct check_dependence_data d;
1956 /* Just canonicalize the expression once;
1957 otherwise each time we call invalidate
1958 true_dependence will canonicalize the
1959 expression again. */
1961 p->canon_exp = canon_rtx (p->exp);
1964 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1965 remove_from_table (p, i);
1976 /* Remove all expressions that refer to register REGNO,
1977 since they are already invalid, and we are about to
1978 mark that register valid again and don't want the old
1979 expressions to reappear as valid. */
1982 remove_invalid_refs (regno)
1986 struct table_elt *p, *next;
1988 for (i = 0; i < HASH_SIZE; i++)
1989 for (p = table[i]; p; p = next)
1991 next = p->next_same_hash;
1992 if (GET_CODE (p->exp) != REG
1993 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx*) 0))
1994 remove_from_table (p, i);
1998 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2001 remove_invalid_subreg_refs (regno, offset, mode)
2003 unsigned int offset;
2004 enum machine_mode mode;
2007 struct table_elt *p, *next;
2008 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
2010 for (i = 0; i < HASH_SIZE; i++)
2011 for (p = table[i]; p; p = next)
2014 next = p->next_same_hash;
2016 if (GET_CODE (exp) != REG
2017 && (GET_CODE (exp) != SUBREG
2018 || GET_CODE (SUBREG_REG (exp)) != REG
2019 || REGNO (SUBREG_REG (exp)) != regno
2020 || (((SUBREG_BYTE (exp)
2021 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
2022 && SUBREG_BYTE (exp) <= end))
2023 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx*) 0))
2024 remove_from_table (p, i);
2028 /* Recompute the hash codes of any valid entries in the hash table that
2029 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2031 This is called when we make a jump equivalence. */
2034 rehash_using_reg (x)
2038 struct table_elt *p, *next;
2041 if (GET_CODE (x) == SUBREG)
2044 /* If X is not a register or if the register is known not to be in any
2045 valid entries in the table, we have no work to do. */
2047 if (GET_CODE (x) != REG
2048 || REG_IN_TABLE (REGNO (x)) < 0
2049 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2052 /* Scan all hash chains looking for valid entries that mention X.
2053 If we find one and it is in the wrong hash chain, move it. We can skip
2054 objects that are registers, since they are handled specially. */
2056 for (i = 0; i < HASH_SIZE; i++)
2057 for (p = table[i]; p; p = next)
2059 next = p->next_same_hash;
2060 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2061 && exp_equiv_p (p->exp, p->exp, 1, 0)
2062 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2064 if (p->next_same_hash)
2065 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2067 if (p->prev_same_hash)
2068 p->prev_same_hash->next_same_hash = p->next_same_hash;
2070 table[i] = p->next_same_hash;
2072 p->next_same_hash = table[hash];
2073 p->prev_same_hash = 0;
2075 table[hash]->prev_same_hash = p;
2081 /* Remove from the hash table any expression that is a call-clobbered
2082 register. Also update their TICK values. */
2085 invalidate_for_call ()
2087 unsigned int regno, endregno;
2090 struct table_elt *p, *next;
2093 /* Go through all the hard registers. For each that is clobbered in
2094 a CALL_INSN, remove the register from quantity chains and update
2095 reg_tick if defined. Also see if any of these registers is currently
2098 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2099 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2101 delete_reg_equiv (regno);
2102 if (REG_TICK (regno) >= 0)
2105 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2108 /* In the case where we have no call-clobbered hard registers in the
2109 table, we are done. Otherwise, scan the table and remove any
2110 entry that overlaps a call-clobbered register. */
2113 for (hash = 0; hash < HASH_SIZE; hash++)
2114 for (p = table[hash]; p; p = next)
2116 next = p->next_same_hash;
2118 if (GET_CODE (p->exp) != REG
2119 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2122 regno = REGNO (p->exp);
2123 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2125 for (i = regno; i < endregno; i++)
2126 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2128 remove_from_table (p, hash);
2134 /* Given an expression X of type CONST,
2135 and ELT which is its table entry (or 0 if it
2136 is not in the hash table),
2137 return an alternate expression for X as a register plus integer.
2138 If none can be found, return 0. */
2141 use_related_value (x, elt)
2143 struct table_elt *elt;
2145 struct table_elt *relt = 0;
2146 struct table_elt *p, *q;
2147 HOST_WIDE_INT offset;
2149 /* First, is there anything related known?
2150 If we have a table element, we can tell from that.
2151 Otherwise, must look it up. */
2153 if (elt != 0 && elt->related_value != 0)
2155 else if (elt == 0 && GET_CODE (x) == CONST)
2157 rtx subexp = get_related_value (x);
2159 relt = lookup (subexp,
2160 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2167 /* Search all related table entries for one that has an
2168 equivalent register. */
2173 /* This loop is strange in that it is executed in two different cases.
2174 The first is when X is already in the table. Then it is searching
2175 the RELATED_VALUE list of X's class (RELT). The second case is when
2176 X is not in the table. Then RELT points to a class for the related
2179 Ensure that, whatever case we are in, that we ignore classes that have
2180 the same value as X. */
2182 if (rtx_equal_p (x, p->exp))
2185 for (q = p->first_same_value; q; q = q->next_same_value)
2186 if (GET_CODE (q->exp) == REG)
2192 p = p->related_value;
2194 /* We went all the way around, so there is nothing to be found.
2195 Alternatively, perhaps RELT was in the table for some other reason
2196 and it has no related values recorded. */
2197 if (p == relt || p == 0)
2204 offset = (get_integer_term (x) - get_integer_term (p->exp));
2205 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2206 return plus_constant (q->exp, offset);
2209 /* Hash a string. Just add its bytes up. */
2210 static inline unsigned
2211 canon_hash_string (ps)
2215 const unsigned char *p = (const unsigned char *)ps;
2224 /* Hash an rtx. We are careful to make sure the value is never negative.
2225 Equivalent registers hash identically.
2226 MODE is used in hashing for CONST_INTs only;
2227 otherwise the mode of X is used.
2229 Store 1 in do_not_record if any subexpression is volatile.
2231 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2232 which does not have the RTX_UNCHANGING_P bit set.
2234 Note that cse_insn knows that the hash code of a MEM expression
2235 is just (int) MEM plus the hash code of the address. */
2238 canon_hash (x, mode)
2240 enum machine_mode mode;
2247 /* repeat is used to turn tail-recursion into iteration. */
2252 code = GET_CODE (x);
2257 unsigned int regno = REGNO (x);
2259 /* On some machines, we can't record any non-fixed hard register,
2260 because extending its life will cause reload problems. We
2261 consider ap, fp, and sp to be fixed for this purpose.
2263 We also consider CCmode registers to be fixed for this purpose;
2264 failure to do so leads to failure to simplify 0<100 type of
2267 On all machines, we can't record any global registers.
2268 Nor should we record any register that is in a small
2269 class, as defined by CLASS_LIKELY_SPILLED_P. */
2271 if (regno < FIRST_PSEUDO_REGISTER
2272 && (global_regs[regno]
2273 || CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno))
2274 || (SMALL_REGISTER_CLASSES
2275 && ! fixed_regs[regno]
2276 && x != frame_pointer_rtx
2277 && x != hard_frame_pointer_rtx
2278 && x != arg_pointer_rtx
2279 && x != stack_pointer_rtx
2280 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2286 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2290 /* We handle SUBREG of a REG specially because the underlying
2291 reg changes its hash value with every value change; we don't
2292 want to have to forget unrelated subregs when one subreg changes. */
2295 if (GET_CODE (SUBREG_REG (x)) == REG)
2297 hash += (((unsigned) SUBREG << 7)
2298 + REGNO (SUBREG_REG (x))
2299 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2307 unsigned HOST_WIDE_INT tem = INTVAL (x);
2308 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2313 /* This is like the general case, except that it only counts
2314 the integers representing the constant. */
2315 hash += (unsigned) code + (unsigned) GET_MODE (x);
2316 if (GET_MODE (x) != VOIDmode)
2317 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2319 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2323 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2324 + (unsigned) CONST_DOUBLE_HIGH (x));
2332 units = CONST_VECTOR_NUNITS (x);
2334 for (i = 0; i < units; ++i)
2336 elt = CONST_VECTOR_ELT (x, i);
2337 hash += canon_hash (elt, GET_MODE (elt));
2343 /* Assume there is only one rtx object for any given label. */
2345 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2349 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2353 /* We don't record if marked volatile or if BLKmode since we don't
2354 know the size of the move. */
2355 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2360 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2362 hash_arg_in_memory = 1;
2364 /* Now that we have already found this special case,
2365 might as well speed it up as much as possible. */
2366 hash += (unsigned) MEM;
2371 /* A USE that mentions non-volatile memory needs special
2372 handling since the MEM may be BLKmode which normally
2373 prevents an entry from being made. Pure calls are
2374 marked by a USE which mentions BLKmode memory. */
2375 if (GET_CODE (XEXP (x, 0)) == MEM
2376 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2378 hash += (unsigned)USE;
2381 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2382 hash_arg_in_memory = 1;
2384 /* Now that we have already found this special case,
2385 might as well speed it up as much as possible. */
2386 hash += (unsigned) MEM;
2401 case UNSPEC_VOLATILE:
2406 if (MEM_VOLATILE_P (x))
2413 /* We don't want to take the filename and line into account. */
2414 hash += (unsigned) code + (unsigned) GET_MODE (x)
2415 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2416 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2417 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2419 if (ASM_OPERANDS_INPUT_LENGTH (x))
2421 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2423 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2424 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2425 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2429 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2430 x = ASM_OPERANDS_INPUT (x, 0);
2431 mode = GET_MODE (x);
2443 i = GET_RTX_LENGTH (code) - 1;
2444 hash += (unsigned) code + (unsigned) GET_MODE (x);
2445 fmt = GET_RTX_FORMAT (code);
2450 rtx tem = XEXP (x, i);
2452 /* If we are about to do the last recursive call
2453 needed at this level, change it into iteration.
2454 This function is called enough to be worth it. */
2460 hash += canon_hash (tem, 0);
2462 else if (fmt[i] == 'E')
2463 for (j = 0; j < XVECLEN (x, i); j++)
2464 hash += canon_hash (XVECEXP (x, i, j), 0);
2465 else if (fmt[i] == 's')
2466 hash += canon_hash_string (XSTR (x, i));
2467 else if (fmt[i] == 'i')
2469 unsigned tem = XINT (x, i);
2472 else if (fmt[i] == '0' || fmt[i] == 't')
2481 /* Like canon_hash but with no side effects. */
2486 enum machine_mode mode;
2488 int save_do_not_record = do_not_record;
2489 int save_hash_arg_in_memory = hash_arg_in_memory;
2490 unsigned hash = canon_hash (x, mode);
2491 hash_arg_in_memory = save_hash_arg_in_memory;
2492 do_not_record = save_do_not_record;
2496 /* Return 1 iff X and Y would canonicalize into the same thing,
2497 without actually constructing the canonicalization of either one.
2498 If VALIDATE is nonzero,
2499 we assume X is an expression being processed from the rtl
2500 and Y was found in the hash table. We check register refs
2501 in Y for being marked as valid.
2503 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2504 that is known to be in the register. Ordinarily, we don't allow them
2505 to match, because letting them match would cause unpredictable results
2506 in all the places that search a hash table chain for an equivalent
2507 for a given value. A possible equivalent that has different structure
2508 has its hash code computed from different data. Whether the hash code
2509 is the same as that of the given value is pure luck. */
2512 exp_equiv_p (x, y, validate, equal_values)
2521 /* Note: it is incorrect to assume an expression is equivalent to itself
2522 if VALIDATE is nonzero. */
2523 if (x == y && !validate)
2525 if (x == 0 || y == 0)
2528 code = GET_CODE (x);
2529 if (code != GET_CODE (y))
2534 /* If X is a constant and Y is a register or vice versa, they may be
2535 equivalent. We only have to validate if Y is a register. */
2536 if (CONSTANT_P (x) && GET_CODE (y) == REG
2537 && REGNO_QTY_VALID_P (REGNO (y)))
2539 int y_q = REG_QTY (REGNO (y));
2540 struct qty_table_elem *y_ent = &qty_table[y_q];
2542 if (GET_MODE (y) == y_ent->mode
2543 && rtx_equal_p (x, y_ent->const_rtx)
2544 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2548 if (CONSTANT_P (y) && code == REG
2549 && REGNO_QTY_VALID_P (REGNO (x)))
2551 int x_q = REG_QTY (REGNO (x));
2552 struct qty_table_elem *x_ent = &qty_table[x_q];
2554 if (GET_MODE (x) == x_ent->mode
2555 && rtx_equal_p (y, x_ent->const_rtx))
2562 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2563 if (GET_MODE (x) != GET_MODE (y))
2574 return XEXP (x, 0) == XEXP (y, 0);
2577 return XSTR (x, 0) == XSTR (y, 0);
2581 unsigned int regno = REGNO (y);
2582 unsigned int endregno
2583 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2584 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2587 /* If the quantities are not the same, the expressions are not
2588 equivalent. If there are and we are not to validate, they
2589 are equivalent. Otherwise, ensure all regs are up-to-date. */
2591 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2597 for (i = regno; i < endregno; i++)
2598 if (REG_IN_TABLE (i) != REG_TICK (i))
2604 /* For commutative operations, check both orders. */
2612 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2613 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2614 validate, equal_values))
2615 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2616 validate, equal_values)
2617 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2618 validate, equal_values)));
2621 /* We don't use the generic code below because we want to
2622 disregard filename and line numbers. */
2624 /* A volatile asm isn't equivalent to any other. */
2625 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2628 if (GET_MODE (x) != GET_MODE (y)
2629 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2630 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2631 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2632 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2633 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2636 if (ASM_OPERANDS_INPUT_LENGTH (x))
2638 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2639 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2640 ASM_OPERANDS_INPUT (y, i),
2641 validate, equal_values)
2642 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2643 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2653 /* Compare the elements. If any pair of corresponding elements
2654 fail to match, return 0 for the whole things. */
2656 fmt = GET_RTX_FORMAT (code);
2657 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2662 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2667 if (XVECLEN (x, i) != XVECLEN (y, i))
2669 for (j = 0; j < XVECLEN (x, i); j++)
2670 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2671 validate, equal_values))
2676 if (strcmp (XSTR (x, i), XSTR (y, i)))
2681 if (XINT (x, i) != XINT (y, i))
2686 if (XWINT (x, i) != XWINT (y, i))
2702 /* Return 1 if X has a value that can vary even between two
2703 executions of the program. 0 means X can be compared reliably
2704 against certain constants or near-constants. */
2707 cse_rtx_varies_p (x, from_alias)
2711 /* We need not check for X and the equivalence class being of the same
2712 mode because if X is equivalent to a constant in some mode, it
2713 doesn't vary in any mode. */
2715 if (GET_CODE (x) == REG
2716 && REGNO_QTY_VALID_P (REGNO (x)))
2718 int x_q = REG_QTY (REGNO (x));
2719 struct qty_table_elem *x_ent = &qty_table[x_q];
2721 if (GET_MODE (x) == x_ent->mode
2722 && x_ent->const_rtx != NULL_RTX)
2726 if (GET_CODE (x) == PLUS
2727 && GET_CODE (XEXP (x, 1)) == CONST_INT
2728 && GET_CODE (XEXP (x, 0)) == REG
2729 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2731 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2732 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2734 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2735 && x0_ent->const_rtx != NULL_RTX)
2739 /* This can happen as the result of virtual register instantiation, if
2740 the initial constant is too large to be a valid address. This gives
2741 us a three instruction sequence, load large offset into a register,
2742 load fp minus a constant into a register, then a MEM which is the
2743 sum of the two `constant' registers. */
2744 if (GET_CODE (x) == PLUS
2745 && GET_CODE (XEXP (x, 0)) == REG
2746 && GET_CODE (XEXP (x, 1)) == REG
2747 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2748 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2750 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2751 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2752 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2753 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2755 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2756 && x0_ent->const_rtx != NULL_RTX
2757 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2758 && x1_ent->const_rtx != NULL_RTX)
2762 return rtx_varies_p (x, from_alias);
2765 /* Canonicalize an expression:
2766 replace each register reference inside it
2767 with the "oldest" equivalent register.
2769 If INSN is non-zero and we are replacing a pseudo with a hard register
2770 or vice versa, validate_change is used to ensure that INSN remains valid
2771 after we make our substitution. The calls are made with IN_GROUP non-zero
2772 so apply_change_group must be called upon the outermost return from this
2773 function (unless INSN is zero). The result of apply_change_group can
2774 generally be discarded since the changes we are making are optional. */
2788 code = GET_CODE (x);
2807 struct qty_table_elem *ent;
2809 /* Never replace a hard reg, because hard regs can appear
2810 in more than one machine mode, and we must preserve the mode
2811 of each occurrence. Also, some hard regs appear in
2812 MEMs that are shared and mustn't be altered. Don't try to
2813 replace any reg that maps to a reg of class NO_REGS. */
2814 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2815 || ! REGNO_QTY_VALID_P (REGNO (x)))
2818 q = REG_QTY (REGNO (x));
2819 ent = &qty_table[q];
2820 first = ent->first_reg;
2821 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2822 : REGNO_REG_CLASS (first) == NO_REGS ? x
2823 : gen_rtx_REG (ent->mode, first));
2830 fmt = GET_RTX_FORMAT (code);
2831 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2837 rtx new = canon_reg (XEXP (x, i), insn);
2840 /* If replacing pseudo with hard reg or vice versa, ensure the
2841 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2842 if (insn != 0 && new != 0
2843 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2844 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2845 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2846 || (insn_code = recog_memoized (insn)) < 0
2847 || insn_data[insn_code].n_dups > 0))
2848 validate_change (insn, &XEXP (x, i), new, 1);
2852 else if (fmt[i] == 'E')
2853 for (j = 0; j < XVECLEN (x, i); j++)
2854 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2860 /* LOC is a location within INSN that is an operand address (the contents of
2861 a MEM). Find the best equivalent address to use that is valid for this
2864 On most CISC machines, complicated address modes are costly, and rtx_cost
2865 is a good approximation for that cost. However, most RISC machines have
2866 only a few (usually only one) memory reference formats. If an address is
2867 valid at all, it is often just as cheap as any other address. Hence, for
2868 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2869 costs of various addresses. For two addresses of equal cost, choose the one
2870 with the highest `rtx_cost' value as that has the potential of eliminating
2871 the most insns. For equal costs, we choose the first in the equivalence
2872 class. Note that we ignore the fact that pseudo registers are cheaper
2873 than hard registers here because we would also prefer the pseudo registers.
2877 find_best_addr (insn, loc, mode)
2880 enum machine_mode mode;
2882 struct table_elt *elt;
2885 struct table_elt *p;
2886 int found_better = 1;
2888 int save_do_not_record = do_not_record;
2889 int save_hash_arg_in_memory = hash_arg_in_memory;
2894 /* Do not try to replace constant addresses or addresses of local and
2895 argument slots. These MEM expressions are made only once and inserted
2896 in many instructions, as well as being used to control symbol table
2897 output. It is not safe to clobber them.
2899 There are some uncommon cases where the address is already in a register
2900 for some reason, but we cannot take advantage of that because we have
2901 no easy way to unshare the MEM. In addition, looking up all stack
2902 addresses is costly. */
2903 if ((GET_CODE (addr) == PLUS
2904 && GET_CODE (XEXP (addr, 0)) == REG
2905 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2906 && (regno = REGNO (XEXP (addr, 0)),
2907 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2908 || regno == ARG_POINTER_REGNUM))
2909 || (GET_CODE (addr) == REG
2910 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2911 || regno == HARD_FRAME_POINTER_REGNUM
2912 || regno == ARG_POINTER_REGNUM))
2913 || GET_CODE (addr) == ADDRESSOF
2914 || CONSTANT_ADDRESS_P (addr))
2917 /* If this address is not simply a register, try to fold it. This will
2918 sometimes simplify the expression. Many simplifications
2919 will not be valid, but some, usually applying the associative rule, will
2920 be valid and produce better code. */
2921 if (GET_CODE (addr) != REG)
2923 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2924 int addr_folded_cost = address_cost (folded, mode);
2925 int addr_cost = address_cost (addr, mode);
2927 if ((addr_folded_cost < addr_cost
2928 || (addr_folded_cost == addr_cost
2929 /* ??? The rtx_cost comparison is left over from an older
2930 version of this code. It is probably no longer helpful. */
2931 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2932 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2933 && validate_change (insn, loc, folded, 0))
2937 /* If this address is not in the hash table, we can't look for equivalences
2938 of the whole address. Also, ignore if volatile. */
2941 hash = HASH (addr, Pmode);
2942 addr_volatile = do_not_record;
2943 do_not_record = save_do_not_record;
2944 hash_arg_in_memory = save_hash_arg_in_memory;
2949 elt = lookup (addr, hash, Pmode);
2951 #ifndef ADDRESS_COST
2954 int our_cost = elt->cost;
2956 /* Find the lowest cost below ours that works. */
2957 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2958 if (elt->cost < our_cost
2959 && (GET_CODE (elt->exp) == REG
2960 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2961 && validate_change (insn, loc,
2962 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2969 /* We need to find the best (under the criteria documented above) entry
2970 in the class that is valid. We use the `flag' field to indicate
2971 choices that were invalid and iterate until we can't find a better
2972 one that hasn't already been tried. */
2974 for (p = elt->first_same_value; p; p = p->next_same_value)
2977 while (found_better)
2979 int best_addr_cost = address_cost (*loc, mode);
2980 int best_rtx_cost = (elt->cost + 1) >> 1;
2982 struct table_elt *best_elt = elt;
2985 for (p = elt->first_same_value; p; p = p->next_same_value)
2988 if ((GET_CODE (p->exp) == REG
2989 || exp_equiv_p (p->exp, p->exp, 1, 0))
2990 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2991 || (exp_cost == best_addr_cost
2992 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2995 best_addr_cost = exp_cost;
2996 best_rtx_cost = (p->cost + 1) >> 1;
3003 if (validate_change (insn, loc,
3004 canon_reg (copy_rtx (best_elt->exp),
3013 /* If the address is a binary operation with the first operand a register
3014 and the second a constant, do the same as above, but looking for
3015 equivalences of the register. Then try to simplify before checking for
3016 the best address to use. This catches a few cases: First is when we
3017 have REG+const and the register is another REG+const. We can often merge
3018 the constants and eliminate one insn and one register. It may also be
3019 that a machine has a cheap REG+REG+const. Finally, this improves the
3020 code on the Alpha for unaligned byte stores. */
3022 if (flag_expensive_optimizations
3023 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
3024 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
3025 && GET_CODE (XEXP (*loc, 0)) == REG
3026 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
3028 rtx c = XEXP (*loc, 1);
3031 hash = HASH (XEXP (*loc, 0), Pmode);
3032 do_not_record = save_do_not_record;
3033 hash_arg_in_memory = save_hash_arg_in_memory;
3035 elt = lookup (XEXP (*loc, 0), hash, Pmode);
3039 /* We need to find the best (under the criteria documented above) entry
3040 in the class that is valid. We use the `flag' field to indicate
3041 choices that were invalid and iterate until we can't find a better
3042 one that hasn't already been tried. */
3044 for (p = elt->first_same_value; p; p = p->next_same_value)
3047 while (found_better)
3049 int best_addr_cost = address_cost (*loc, mode);
3050 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3051 struct table_elt *best_elt = elt;
3052 rtx best_rtx = *loc;
3055 /* This is at worst case an O(n^2) algorithm, so limit our search
3056 to the first 32 elements on the list. This avoids trouble
3057 compiling code with very long basic blocks that can easily
3058 call simplify_gen_binary so many times that we run out of
3062 for (p = elt->first_same_value, count = 0;
3064 p = p->next_same_value, count++)
3066 && (GET_CODE (p->exp) == REG
3067 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3069 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3072 new_cost = address_cost (new, mode);
3074 if (new_cost < best_addr_cost
3075 || (new_cost == best_addr_cost
3076 && (COST (new) + 1) >> 1 > best_rtx_cost))
3079 best_addr_cost = new_cost;
3080 best_rtx_cost = (COST (new) + 1) >> 1;
3088 if (validate_change (insn, loc,
3089 canon_reg (copy_rtx (best_rtx),
3100 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3101 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3102 what values are being compared.
3104 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3105 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3106 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3107 compared to produce cc0.
3109 The return value is the comparison operator and is either the code of
3110 A or the code corresponding to the inverse of the comparison. */
3112 static enum rtx_code
3113 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3116 enum machine_mode *pmode1, *pmode2;
3120 arg1 = *parg1, arg2 = *parg2;
3122 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3124 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3126 /* Set non-zero when we find something of interest. */
3128 int reverse_code = 0;
3129 struct table_elt *p = 0;
3131 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3132 On machines with CC0, this is the only case that can occur, since
3133 fold_rtx will return the COMPARE or item being compared with zero
3136 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3139 /* If ARG1 is a comparison operator and CODE is testing for
3140 STORE_FLAG_VALUE, get the inner arguments. */
3142 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3145 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3146 && code == LT && STORE_FLAG_VALUE == -1)
3147 #ifdef FLOAT_STORE_FLAG_VALUE
3148 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3149 && (REAL_VALUE_NEGATIVE
3150 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3155 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3156 && code == GE && STORE_FLAG_VALUE == -1)
3157 #ifdef FLOAT_STORE_FLAG_VALUE
3158 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3159 && (REAL_VALUE_NEGATIVE
3160 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3163 x = arg1, reverse_code = 1;
3166 /* ??? We could also check for
3168 (ne (and (eq (...) (const_int 1))) (const_int 0))
3170 and related forms, but let's wait until we see them occurring. */
3173 /* Look up ARG1 in the hash table and see if it has an equivalence
3174 that lets us see what is being compared. */
3175 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3179 p = p->first_same_value;
3181 /* If what we compare is already known to be constant, that is as
3183 We need to break the loop in this case, because otherwise we
3184 can have an infinite loop when looking at a reg that is known
3185 to be a constant which is the same as a comparison of a reg
3186 against zero which appears later in the insn stream, which in
3187 turn is constant and the same as the comparison of the first reg
3193 for (; p; p = p->next_same_value)
3195 enum machine_mode inner_mode = GET_MODE (p->exp);
3197 /* If the entry isn't valid, skip it. */
3198 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3201 if (GET_CODE (p->exp) == COMPARE
3202 /* Another possibility is that this machine has a compare insn
3203 that includes the comparison code. In that case, ARG1 would
3204 be equivalent to a comparison operation that would set ARG1 to
3205 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3206 ORIG_CODE is the actual comparison being done; if it is an EQ,
3207 we must reverse ORIG_CODE. On machine with a negative value
3208 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3211 && GET_MODE_CLASS (inner_mode) == MODE_INT
3212 && (GET_MODE_BITSIZE (inner_mode)
3213 <= HOST_BITS_PER_WIDE_INT)
3214 && (STORE_FLAG_VALUE
3215 & ((HOST_WIDE_INT) 1
3216 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3217 #ifdef FLOAT_STORE_FLAG_VALUE
3219 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3220 && (REAL_VALUE_NEGATIVE
3221 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3224 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3229 else if ((code == EQ
3231 && GET_MODE_CLASS (inner_mode) == MODE_INT
3232 && (GET_MODE_BITSIZE (inner_mode)
3233 <= HOST_BITS_PER_WIDE_INT)
3234 && (STORE_FLAG_VALUE
3235 & ((HOST_WIDE_INT) 1
3236 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3237 #ifdef FLOAT_STORE_FLAG_VALUE
3239 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3240 && (REAL_VALUE_NEGATIVE
3241 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3244 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3251 /* If this is fp + constant, the equivalent is a better operand since
3252 it may let us predict the value of the comparison. */
3253 else if (NONZERO_BASE_PLUS_P (p->exp))
3260 /* If we didn't find a useful equivalence for ARG1, we are done.
3261 Otherwise, set up for the next iteration. */
3265 /* If we need to reverse the comparison, make sure that that is
3266 possible -- we can't necessarily infer the value of GE from LT
3267 with floating-point operands. */
3270 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3271 if (reversed == UNKNOWN)
3273 else code = reversed;
3275 else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3276 code = GET_CODE (x);
3277 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3280 /* Return our results. Return the modes from before fold_rtx
3281 because fold_rtx might produce const_int, and then it's too late. */
3282 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3283 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3288 /* If X is a nontrivial arithmetic operation on an argument
3289 for which a constant value can be determined, return
3290 the result of operating on that value, as a constant.
3291 Otherwise, return X, possibly with one or more operands
3292 modified by recursive calls to this function.
3294 If X is a register whose contents are known, we do NOT
3295 return those contents here. equiv_constant is called to
3298 INSN is the insn that we may be modifying. If it is 0, make a copy
3299 of X before modifying it. */
3307 enum machine_mode mode;
3314 /* Folded equivalents of first two operands of X. */
3318 /* Constant equivalents of first three operands of X;
3319 0 when no such equivalent is known. */
3324 /* The mode of the first operand of X. We need this for sign and zero
3326 enum machine_mode mode_arg0;
3331 mode = GET_MODE (x);
3332 code = GET_CODE (x);
3342 /* No use simplifying an EXPR_LIST
3343 since they are used only for lists of args
3344 in a function call's REG_EQUAL note. */
3346 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3347 want to (e.g.,) make (addressof (const_int 0)) just because
3348 the location is known to be zero. */
3354 return prev_insn_cc0;
3358 /* If the next insn is a CODE_LABEL followed by a jump table,
3359 PC's value is a LABEL_REF pointing to that label. That
3360 lets us fold switch statements on the VAX. */
3361 if (insn && GET_CODE (insn) == JUMP_INSN)
3363 rtx next = next_nonnote_insn (insn);
3365 if (next && GET_CODE (next) == CODE_LABEL
3366 && NEXT_INSN (next) != 0
3367 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3368 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3369 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3370 return gen_rtx_LABEL_REF (Pmode, next);
3375 /* See if we previously assigned a constant value to this SUBREG. */
3376 if ((new = lookup_as_function (x, CONST_INT)) != 0
3377 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3380 /* If this is a paradoxical SUBREG, we have no idea what value the
3381 extra bits would have. However, if the operand is equivalent
3382 to a SUBREG whose operand is the same as our mode, and all the
3383 modes are within a word, we can just use the inner operand
3384 because these SUBREGs just say how to treat the register.
3386 Similarly if we find an integer constant. */
3388 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3390 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3391 struct table_elt *elt;
3393 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3394 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3395 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3397 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3399 if (CONSTANT_P (elt->exp)
3400 && GET_MODE (elt->exp) == VOIDmode)
3403 if (GET_CODE (elt->exp) == SUBREG
3404 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3405 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3406 return copy_rtx (SUBREG_REG (elt->exp));
3412 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3413 We might be able to if the SUBREG is extracting a single word in an
3414 integral mode or extracting the low part. */
3416 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3417 const_arg0 = equiv_constant (folded_arg0);
3419 folded_arg0 = const_arg0;
3421 if (folded_arg0 != SUBREG_REG (x))
3423 new = simplify_subreg (mode, folded_arg0,
3424 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3429 /* If this is a narrowing SUBREG and our operand is a REG, see if
3430 we can find an equivalence for REG that is an arithmetic operation
3431 in a wider mode where both operands are paradoxical SUBREGs
3432 from objects of our result mode. In that case, we couldn't report
3433 an equivalent value for that operation, since we don't know what the
3434 extra bits will be. But we can find an equivalence for this SUBREG
3435 by folding that operation is the narrow mode. This allows us to
3436 fold arithmetic in narrow modes when the machine only supports
3437 word-sized arithmetic.
3439 Also look for a case where we have a SUBREG whose operand is the
3440 same as our result. If both modes are smaller than a word, we
3441 are simply interpreting a register in different modes and we
3442 can use the inner value. */
3444 if (GET_CODE (folded_arg0) == REG
3445 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3446 && subreg_lowpart_p (x))
3448 struct table_elt *elt;
3450 /* We can use HASH here since we know that canon_hash won't be
3452 elt = lookup (folded_arg0,
3453 HASH (folded_arg0, GET_MODE (folded_arg0)),
3454 GET_MODE (folded_arg0));
3457 elt = elt->first_same_value;
3459 for (; elt; elt = elt->next_same_value)
3461 enum rtx_code eltcode = GET_CODE (elt->exp);
3463 /* Just check for unary and binary operations. */
3464 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3465 && GET_CODE (elt->exp) != SIGN_EXTEND
3466 && GET_CODE (elt->exp) != ZERO_EXTEND
3467 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3468 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3470 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3472 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3473 op0 = fold_rtx (op0, NULL_RTX);
3475 op0 = equiv_constant (op0);
3477 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3480 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3481 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3482 && eltcode != DIV && eltcode != MOD
3483 && eltcode != UDIV && eltcode != UMOD
3484 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3485 && eltcode != ROTATE && eltcode != ROTATERT
3486 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3487 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3489 || CONSTANT_P (XEXP (elt->exp, 0)))
3490 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3491 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3493 || CONSTANT_P (XEXP (elt->exp, 1))))
3495 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3496 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3498 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3499 op0 = fold_rtx (op0, NULL_RTX);
3502 op0 = equiv_constant (op0);
3504 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3505 op1 = fold_rtx (op1, NULL_RTX);
3508 op1 = equiv_constant (op1);
3510 /* If we are looking for the low SImode part of
3511 (ashift:DI c (const_int 32)), it doesn't work
3512 to compute that in SImode, because a 32-bit shift
3513 in SImode is unpredictable. We know the value is 0. */
3515 && GET_CODE (elt->exp) == ASHIFT
3516 && GET_CODE (op1) == CONST_INT
3517 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3519 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3521 /* If the count fits in the inner mode's width,
3522 but exceeds the outer mode's width,
3523 the value will get truncated to 0
3527 /* If the count exceeds even the inner mode's width,
3528 don't fold this expression. */
3531 else if (op0 && op1)
3532 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3536 else if (GET_CODE (elt->exp) == SUBREG
3537 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3538 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3540 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3541 new = copy_rtx (SUBREG_REG (elt->exp));
3552 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3553 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3554 new = lookup_as_function (XEXP (x, 0), code);
3556 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3560 /* If we are not actually processing an insn, don't try to find the
3561 best address. Not only don't we care, but we could modify the
3562 MEM in an invalid way since we have no insn to validate against. */
3564 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3567 /* Even if we don't fold in the insn itself,
3568 we can safely do so here, in hopes of getting a constant. */
3569 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3571 HOST_WIDE_INT offset = 0;
3573 if (GET_CODE (addr) == REG
3574 && REGNO_QTY_VALID_P (REGNO (addr)))
3576 int addr_q = REG_QTY (REGNO (addr));
3577 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3579 if (GET_MODE (addr) == addr_ent->mode
3580 && addr_ent->const_rtx != NULL_RTX)
3581 addr = addr_ent->const_rtx;
3584 /* If address is constant, split it into a base and integer offset. */
3585 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3587 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3588 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3590 base = XEXP (XEXP (addr, 0), 0);
3591 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3593 else if (GET_CODE (addr) == LO_SUM
3594 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3595 base = XEXP (addr, 1);
3596 else if (GET_CODE (addr) == ADDRESSOF)
3597 return change_address (x, VOIDmode, addr);
3599 /* If this is a constant pool reference, we can fold it into its
3600 constant to allow better value tracking. */
3601 if (base && GET_CODE (base) == SYMBOL_REF
3602 && CONSTANT_POOL_ADDRESS_P (base))
3604 rtx constant = get_pool_constant (base);
3605 enum machine_mode const_mode = get_pool_mode (base);
3608 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3609 constant_pool_entries_cost = COST (constant);
3611 /* If we are loading the full constant, we have an equivalence. */
3612 if (offset == 0 && mode == const_mode)
3615 /* If this actually isn't a constant (weird!), we can't do
3616 anything. Otherwise, handle the two most common cases:
3617 extracting a word from a multi-word constant, and extracting
3618 the low-order bits. Other cases don't seem common enough to
3620 if (! CONSTANT_P (constant))
3623 if (GET_MODE_CLASS (mode) == MODE_INT
3624 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3625 && offset % UNITS_PER_WORD == 0
3626 && (new = operand_subword (constant,
3627 offset / UNITS_PER_WORD,
3628 0, const_mode)) != 0)
3631 if (((BYTES_BIG_ENDIAN
3632 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3633 || (! BYTES_BIG_ENDIAN && offset == 0))
3634 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3638 /* If this is a reference to a label at a known position in a jump
3639 table, we also know its value. */
3640 if (base && GET_CODE (base) == LABEL_REF)
3642 rtx label = XEXP (base, 0);
3643 rtx table_insn = NEXT_INSN (label);
3645 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3646 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3648 rtx table = PATTERN (table_insn);
3651 && (offset / GET_MODE_SIZE (GET_MODE (table))
3652 < XVECLEN (table, 0)))
3653 return XVECEXP (table, 0,
3654 offset / GET_MODE_SIZE (GET_MODE (table)));
3656 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3657 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3659 rtx table = PATTERN (table_insn);
3662 && (offset / GET_MODE_SIZE (GET_MODE (table))
3663 < XVECLEN (table, 1)))
3665 offset /= GET_MODE_SIZE (GET_MODE (table));
3666 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3669 if (GET_MODE (table) != Pmode)
3670 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3672 /* Indicate this is a constant. This isn't a
3673 valid form of CONST, but it will only be used
3674 to fold the next insns and then discarded, so
3677 Note this expression must be explicitly discarded,
3678 by cse_insn, else it may end up in a REG_EQUAL note
3679 and "escape" to cause problems elsewhere. */
3680 return gen_rtx_CONST (GET_MODE (new), new);
3688 #ifdef NO_FUNCTION_CSE
3690 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3696 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3697 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3698 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3708 mode_arg0 = VOIDmode;
3710 /* Try folding our operands.
3711 Then see which ones have constant values known. */
3713 fmt = GET_RTX_FORMAT (code);
3714 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3717 rtx arg = XEXP (x, i);
3718 rtx folded_arg = arg, const_arg = 0;
3719 enum machine_mode mode_arg = GET_MODE (arg);
3720 rtx cheap_arg, expensive_arg;
3721 rtx replacements[2];
3724 /* Most arguments are cheap, so handle them specially. */
3725 switch (GET_CODE (arg))
3728 /* This is the same as calling equiv_constant; it is duplicated
3730 if (REGNO_QTY_VALID_P (REGNO (arg)))
3732 int arg_q = REG_QTY (REGNO (arg));
3733 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3735 if (arg_ent->const_rtx != NULL_RTX
3736 && GET_CODE (arg_ent->const_rtx) != REG
3737 && GET_CODE (arg_ent->const_rtx) != PLUS)
3739 = gen_lowpart_if_possible (GET_MODE (arg),
3740 arg_ent->const_rtx);
3755 folded_arg = prev_insn_cc0;
3756 mode_arg = prev_insn_cc0_mode;
3757 const_arg = equiv_constant (folded_arg);
3762 folded_arg = fold_rtx (arg, insn);
3763 const_arg = equiv_constant (folded_arg);
3766 /* For the first three operands, see if the operand
3767 is constant or equivalent to a constant. */
3771 folded_arg0 = folded_arg;
3772 const_arg0 = const_arg;
3773 mode_arg0 = mode_arg;
3776 folded_arg1 = folded_arg;
3777 const_arg1 = const_arg;
3780 const_arg2 = const_arg;
3784 /* Pick the least expensive of the folded argument and an
3785 equivalent constant argument. */
3786 if (const_arg == 0 || const_arg == folded_arg
3787 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3788 cheap_arg = folded_arg, expensive_arg = const_arg;
3790 cheap_arg = const_arg, expensive_arg = folded_arg;
3792 /* Try to replace the operand with the cheapest of the two
3793 possibilities. If it doesn't work and this is either of the first
3794 two operands of a commutative operation, try swapping them.
3795 If THAT fails, try the more expensive, provided it is cheaper
3796 than what is already there. */
3798 if (cheap_arg == XEXP (x, i))
3801 if (insn == 0 && ! copied)
3807 /* Order the replacements from cheapest to most expensive. */
3808 replacements[0] = cheap_arg;
3809 replacements[1] = expensive_arg;
3811 for (j = 0; j < 2 && replacements[j]; j++)
3813 int old_cost = COST_IN (XEXP (x, i), code);
3814 int new_cost = COST_IN (replacements[j], code);
3816 /* Stop if what existed before was cheaper. Prefer constants
3817 in the case of a tie. */
3818 if (new_cost > old_cost
3819 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3822 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3825 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
3826 || code == LTGT || code == UNEQ || code == ORDERED
3827 || code == UNORDERED)
3829 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3830 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3832 if (apply_change_group ())
3834 /* Swap them back to be invalid so that this loop can
3835 continue and flag them to be swapped back later. */
3838 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3850 /* Don't try to fold inside of a vector of expressions.
3851 Doing nothing is harmless. */
3855 /* If a commutative operation, place a constant integer as the second
3856 operand unless the first operand is also a constant integer. Otherwise,
3857 place any constant second unless the first operand is also a constant. */
3859 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
3860 || code == LTGT || code == UNEQ || code == ORDERED
3861 || code == UNORDERED)
3863 if (must_swap || (const_arg0
3865 || (GET_CODE (const_arg0) == CONST_INT
3866 && GET_CODE (const_arg1) != CONST_INT))))
3868 rtx tem = XEXP (x, 0);
3870 if (insn == 0 && ! copied)
3876 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3877 validate_change (insn, &XEXP (x, 1), tem, 1);
3878 if (apply_change_group ())
3880 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3881 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3886 /* If X is an arithmetic operation, see if we can simplify it. */
3888 switch (GET_RTX_CLASS (code))
3894 /* We can't simplify extension ops unless we know the
3896 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3897 && mode_arg0 == VOIDmode)
3900 /* If we had a CONST, strip it off and put it back later if we
3902 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3903 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3905 new = simplify_unary_operation (code, mode,
3906 const_arg0 ? const_arg0 : folded_arg0,
3908 if (new != 0 && is_const)
3909 new = gen_rtx_CONST (mode, new);
3914 /* See what items are actually being compared and set FOLDED_ARG[01]
3915 to those values and CODE to the actual comparison code. If any are
3916 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3917 do anything if both operands are already known to be constant. */
3919 if (const_arg0 == 0 || const_arg1 == 0)
3921 struct table_elt *p0, *p1;
3922 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3923 enum machine_mode mode_arg1;
3925 #ifdef FLOAT_STORE_FLAG_VALUE
3926 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3928 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3929 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3930 false_rtx = CONST0_RTX (mode);
3934 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3935 &mode_arg0, &mode_arg1);
3936 const_arg0 = equiv_constant (folded_arg0);
3937 const_arg1 = equiv_constant (folded_arg1);
3939 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3940 what kinds of things are being compared, so we can't do
3941 anything with this comparison. */
3943 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3946 /* If we do not now have two constants being compared, see
3947 if we can nevertheless deduce some things about the
3949 if (const_arg0 == 0 || const_arg1 == 0)
3951 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3952 non-explicit constant? These aren't zero, but we
3953 don't know their sign. */
3954 if (const_arg1 == const0_rtx
3955 && (NONZERO_BASE_PLUS_P (folded_arg0)
3956 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3958 || GET_CODE (folded_arg0) == SYMBOL_REF
3960 || GET_CODE (folded_arg0) == LABEL_REF
3961 || GET_CODE (folded_arg0) == CONST))
3965 else if (code == NE)
3969 /* See if the two operands are the same. */
3971 if (folded_arg0 == folded_arg1
3972 || (GET_CODE (folded_arg0) == REG
3973 && GET_CODE (folded_arg1) == REG
3974 && (REG_QTY (REGNO (folded_arg0))
3975 == REG_QTY (REGNO (folded_arg1))))
3976 || ((p0 = lookup (folded_arg0,
3977 (safe_hash (folded_arg0, mode_arg0)
3978 & HASH_MASK), mode_arg0))
3979 && (p1 = lookup (folded_arg1,
3980 (safe_hash (folded_arg1, mode_arg0)
3981 & HASH_MASK), mode_arg0))
3982 && p0->first_same_value == p1->first_same_value))
3984 /* Sadly two equal NaNs are not equivalent. */
3985 if (!HONOR_NANS (mode_arg0))
3986 return ((code == EQ || code == LE || code == GE
3987 || code == LEU || code == GEU || code == UNEQ
3988 || code == UNLE || code == UNGE
3990 ? true_rtx : false_rtx);
3991 /* Take care for the FP compares we can resolve. */
3992 if (code == UNEQ || code == UNLE || code == UNGE)
3994 if (code == LTGT || code == LT || code == GT)
3998 /* If FOLDED_ARG0 is a register, see if the comparison we are
3999 doing now is either the same as we did before or the reverse
4000 (we only check the reverse if not floating-point). */
4001 else if (GET_CODE (folded_arg0) == REG)
4003 int qty = REG_QTY (REGNO (folded_arg0));
4005 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
4007 struct qty_table_elem *ent = &qty_table[qty];
4009 if ((comparison_dominates_p (ent->comparison_code, code)
4010 || (! FLOAT_MODE_P (mode_arg0)
4011 && comparison_dominates_p (ent->comparison_code,
4012 reverse_condition (code))))
4013 && (rtx_equal_p (ent->comparison_const, folded_arg1)
4015 && rtx_equal_p (ent->comparison_const,
4017 || (GET_CODE (folded_arg1) == REG
4018 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
4019 return (comparison_dominates_p (ent->comparison_code, code)
4020 ? true_rtx : false_rtx);
4026 /* If we are comparing against zero, see if the first operand is
4027 equivalent to an IOR with a constant. If so, we may be able to
4028 determine the result of this comparison. */
4030 if (const_arg1 == const0_rtx)
4032 rtx y = lookup_as_function (folded_arg0, IOR);
4036 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
4037 && GET_CODE (inner_const) == CONST_INT
4038 && INTVAL (inner_const) != 0)
4040 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
4041 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
4042 && (INTVAL (inner_const)
4043 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
4044 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
4046 #ifdef FLOAT_STORE_FLAG_VALUE
4047 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4049 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
4050 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4051 false_rtx = CONST0_RTX (mode);
4075 new = simplify_relational_operation (code,
4076 (mode_arg0 != VOIDmode
4078 : (GET_MODE (const_arg0
4082 ? GET_MODE (const_arg0
4085 : GET_MODE (const_arg1
4088 const_arg0 ? const_arg0 : folded_arg0,
4089 const_arg1 ? const_arg1 : folded_arg1);
4090 #ifdef FLOAT_STORE_FLAG_VALUE
4091 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4093 if (new == const0_rtx)
4094 new = CONST0_RTX (mode);
4096 new = (CONST_DOUBLE_FROM_REAL_VALUE
4097 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4107 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4108 with that LABEL_REF as its second operand. If so, the result is
4109 the first operand of that MINUS. This handles switches with an
4110 ADDR_DIFF_VEC table. */
4111 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4114 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4115 : lookup_as_function (folded_arg0, MINUS);
4117 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4118 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4121 /* Now try for a CONST of a MINUS like the above. */
4122 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4123 : lookup_as_function (folded_arg0, CONST))) != 0
4124 && GET_CODE (XEXP (y, 0)) == MINUS
4125 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4126 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4127 return XEXP (XEXP (y, 0), 0);
4130 /* Likewise if the operands are in the other order. */
4131 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4134 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4135 : lookup_as_function (folded_arg1, MINUS);
4137 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4138 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4141 /* Now try for a CONST of a MINUS like the above. */
4142 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4143 : lookup_as_function (folded_arg1, CONST))) != 0
4144 && GET_CODE (XEXP (y, 0)) == MINUS
4145 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4146 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4147 return XEXP (XEXP (y, 0), 0);
4150 /* If second operand is a register equivalent to a negative
4151 CONST_INT, see if we can find a register equivalent to the
4152 positive constant. Make a MINUS if so. Don't do this for
4153 a non-negative constant since we might then alternate between
4154 choosing positive and negative constants. Having the positive
4155 constant previously-used is the more common case. Be sure
4156 the resulting constant is non-negative; if const_arg1 were
4157 the smallest negative number this would overflow: depending
4158 on the mode, this would either just be the same value (and
4159 hence not save anything) or be incorrect. */
4160 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4161 && INTVAL (const_arg1) < 0
4162 /* This used to test
4164 -INTVAL (const_arg1) >= 0
4166 But The Sun V5.0 compilers mis-compiled that test. So
4167 instead we test for the problematic value in a more direct
4168 manner and hope the Sun compilers get it correct. */
4169 && INTVAL (const_arg1) !=
4170 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4171 && GET_CODE (folded_arg1) == REG)
4173 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4175 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4179 for (p = p->first_same_value; p; p = p->next_same_value)
4180 if (GET_CODE (p->exp) == REG)
4181 return simplify_gen_binary (MINUS, mode, folded_arg0,
4182 canon_reg (p->exp, NULL_RTX));
4187 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4188 If so, produce (PLUS Z C2-C). */
4189 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4191 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4192 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4193 return fold_rtx (plus_constant (copy_rtx (y),
4194 -INTVAL (const_arg1)),
4201 case SMIN: case SMAX: case UMIN: case UMAX:
4202 case IOR: case AND: case XOR:
4203 case MULT: case DIV: case UDIV:
4204 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4205 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4206 is known to be of similar form, we may be able to replace the
4207 operation with a combined operation. This may eliminate the
4208 intermediate operation if every use is simplified in this way.
4209 Note that the similar optimization done by combine.c only works
4210 if the intermediate operation's result has only one reference. */
4212 if (GET_CODE (folded_arg0) == REG
4213 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4216 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4217 rtx y = lookup_as_function (folded_arg0, code);
4219 enum rtx_code associate_code;
4223 || 0 == (inner_const
4224 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4225 || GET_CODE (inner_const) != CONST_INT
4226 /* If we have compiled a statement like
4227 "if (x == (x & mask1))", and now are looking at
4228 "x & mask2", we will have a case where the first operand
4229 of Y is the same as our first operand. Unless we detect
4230 this case, an infinite loop will result. */
4231 || XEXP (y, 0) == folded_arg0)
4234 /* Don't associate these operations if they are a PLUS with the
4235 same constant and it is a power of two. These might be doable
4236 with a pre- or post-increment. Similarly for two subtracts of
4237 identical powers of two with post decrement. */
4239 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4240 && ((HAVE_PRE_INCREMENT
4241 && exact_log2 (INTVAL (const_arg1)) >= 0)
4242 || (HAVE_POST_INCREMENT
4243 && exact_log2 (INTVAL (const_arg1)) >= 0)
4244 || (HAVE_PRE_DECREMENT
4245 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4246 || (HAVE_POST_DECREMENT
4247 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4250 /* Compute the code used to compose the constants. For example,
4251 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4254 = (code == MULT || code == DIV || code == UDIV ? MULT
4255 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4257 new_const = simplify_binary_operation (associate_code, mode,
4258 const_arg1, inner_const);
4263 /* If we are associating shift operations, don't let this
4264 produce a shift of the size of the object or larger.
4265 This could occur when we follow a sign-extend by a right
4266 shift on a machine that does a sign-extend as a pair
4269 if (is_shift && GET_CODE (new_const) == CONST_INT
4270 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4272 /* As an exception, we can turn an ASHIFTRT of this
4273 form into a shift of the number of bits - 1. */
4274 if (code == ASHIFTRT)
4275 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4280 y = copy_rtx (XEXP (y, 0));
4282 /* If Y contains our first operand (the most common way this
4283 can happen is if Y is a MEM), we would do into an infinite
4284 loop if we tried to fold it. So don't in that case. */
4286 if (! reg_mentioned_p (folded_arg0, y))
4287 y = fold_rtx (y, insn);
4289 return simplify_gen_binary (code, mode, y, new_const);
4297 new = simplify_binary_operation (code, mode,
4298 const_arg0 ? const_arg0 : folded_arg0,
4299 const_arg1 ? const_arg1 : folded_arg1);
4303 /* (lo_sum (high X) X) is simply X. */
4304 if (code == LO_SUM && const_arg0 != 0
4305 && GET_CODE (const_arg0) == HIGH
4306 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4312 new = simplify_ternary_operation (code, mode, mode_arg0,
4313 const_arg0 ? const_arg0 : folded_arg0,
4314 const_arg1 ? const_arg1 : folded_arg1,
4315 const_arg2 ? const_arg2 : XEXP (x, 2));
4319 /* Always eliminate CONSTANT_P_RTX at this stage. */
4320 if (code == CONSTANT_P_RTX)
4321 return (const_arg0 ? const1_rtx : const0_rtx);
4325 return new ? new : x;
4328 /* Return a constant value currently equivalent to X.
4329 Return 0 if we don't know one. */
4335 if (GET_CODE (x) == REG
4336 && REGNO_QTY_VALID_P (REGNO (x)))
4338 int x_q = REG_QTY (REGNO (x));
4339 struct qty_table_elem *x_ent = &qty_table[x_q];
4341 if (x_ent->const_rtx)
4342 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4345 if (x == 0 || CONSTANT_P (x))
4348 /* If X is a MEM, try to fold it outside the context of any insn to see if
4349 it might be equivalent to a constant. That handles the case where it
4350 is a constant-pool reference. Then try to look it up in the hash table
4351 in case it is something whose value we have seen before. */
4353 if (GET_CODE (x) == MEM)
4355 struct table_elt *elt;
4357 x = fold_rtx (x, NULL_RTX);
4361 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4365 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4366 if (elt->is_const && CONSTANT_P (elt->exp))
4373 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4374 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4375 least-significant part of X.
4376 MODE specifies how big a part of X to return.
4378 If the requested operation cannot be done, 0 is returned.
4380 This is similar to gen_lowpart in emit-rtl.c. */
4383 gen_lowpart_if_possible (mode, x)
4384 enum machine_mode mode;
4387 rtx result = gen_lowpart_common (mode, x);
4391 else if (GET_CODE (x) == MEM)
4393 /* This is the only other case we handle. */
4397 if (WORDS_BIG_ENDIAN)
4398 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4399 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4400 if (BYTES_BIG_ENDIAN)
4401 /* Adjust the address so that the address-after-the-data is
4403 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4404 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4406 new = adjust_address_nv (x, mode, offset);
4407 if (! memory_address_p (mode, XEXP (new, 0)))
4416 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4417 branch. It will be zero if not.
4419 In certain cases, this can cause us to add an equivalence. For example,
4420 if we are following the taken case of
4422 we can add the fact that `i' and '2' are now equivalent.
4424 In any case, we can record that this comparison was passed. If the same
4425 comparison is seen later, we will know its value. */
4428 record_jump_equiv (insn, taken)
4432 int cond_known_true;
4435 enum machine_mode mode, mode0, mode1;
4436 int reversed_nonequality = 0;
4439 /* Ensure this is the right kind of insn. */
4440 if (! any_condjump_p (insn))
4442 set = pc_set (insn);
4444 /* See if this jump condition is known true or false. */
4446 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4448 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4450 /* Get the type of comparison being done and the operands being compared.
4451 If we had to reverse a non-equality condition, record that fact so we
4452 know that it isn't valid for floating-point. */
4453 code = GET_CODE (XEXP (SET_SRC (set), 0));
4454 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4455 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4457 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4458 if (! cond_known_true)
4460 code = reversed_comparison_code_parts (code, op0, op1, insn);
4462 /* Don't remember if we can't find the inverse. */
4463 if (code == UNKNOWN)
4467 /* The mode is the mode of the non-constant. */
4469 if (mode1 != VOIDmode)
4472 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4475 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4476 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4477 Make any useful entries we can with that information. Called from
4478 above function and called recursively. */
4481 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4483 enum machine_mode mode;
4485 int reversed_nonequality;
4487 unsigned op0_hash, op1_hash;
4488 int op0_in_memory, op1_in_memory;
4489 struct table_elt *op0_elt, *op1_elt;
4491 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4492 we know that they are also equal in the smaller mode (this is also
4493 true for all smaller modes whether or not there is a SUBREG, but
4494 is not worth testing for with no SUBREG). */
4496 /* Note that GET_MODE (op0) may not equal MODE. */
4497 if (code == EQ && GET_CODE (op0) == SUBREG
4498 && (GET_MODE_SIZE (GET_MODE (op0))
4499 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4501 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4502 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4504 record_jump_cond (code, mode, SUBREG_REG (op0),
4505 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4506 reversed_nonequality);
4509 if (code == EQ && GET_CODE (op1) == SUBREG
4510 && (GET_MODE_SIZE (GET_MODE (op1))
4511 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4513 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4514 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4516 record_jump_cond (code, mode, SUBREG_REG (op1),
4517 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4518 reversed_nonequality);
4521 /* Similarly, if this is an NE comparison, and either is a SUBREG
4522 making a smaller mode, we know the whole thing is also NE. */
4524 /* Note that GET_MODE (op0) may not equal MODE;
4525 if we test MODE instead, we can get an infinite recursion
4526 alternating between two modes each wider than MODE. */
4528 if (code == NE && GET_CODE (op0) == SUBREG
4529 && subreg_lowpart_p (op0)
4530 && (GET_MODE_SIZE (GET_MODE (op0))
4531 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4533 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4534 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4536 record_jump_cond (code, mode, SUBREG_REG (op0),
4537 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4538 reversed_nonequality);
4541 if (code == NE && GET_CODE (op1) == SUBREG
4542 && subreg_lowpart_p (op1)
4543 && (GET_MODE_SIZE (GET_MODE (op1))
4544 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4546 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4547 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4549 record_jump_cond (code, mode, SUBREG_REG (op1),
4550 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4551 reversed_nonequality);
4554 /* Hash both operands. */
4557 hash_arg_in_memory = 0;
4558 op0_hash = HASH (op0, mode);
4559 op0_in_memory = hash_arg_in_memory;
4565 hash_arg_in_memory = 0;
4566 op1_hash = HASH (op1, mode);
4567 op1_in_memory = hash_arg_in_memory;
4572 /* Look up both operands. */
4573 op0_elt = lookup (op0, op0_hash, mode);
4574 op1_elt = lookup (op1, op1_hash, mode);
4576 /* If both operands are already equivalent or if they are not in the
4577 table but are identical, do nothing. */
4578 if ((op0_elt != 0 && op1_elt != 0
4579 && op0_elt->first_same_value == op1_elt->first_same_value)
4580 || op0 == op1 || rtx_equal_p (op0, op1))
4583 /* If we aren't setting two things equal all we can do is save this
4584 comparison. Similarly if this is floating-point. In the latter
4585 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4586 If we record the equality, we might inadvertently delete code
4587 whose intent was to change -0 to +0. */
4589 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4591 struct qty_table_elem *ent;
4594 /* If we reversed a floating-point comparison, if OP0 is not a
4595 register, or if OP1 is neither a register or constant, we can't
4598 if (GET_CODE (op1) != REG)
4599 op1 = equiv_constant (op1);
4601 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4602 || GET_CODE (op0) != REG || op1 == 0)
4605 /* Put OP0 in the hash table if it isn't already. This gives it a
4606 new quantity number. */
4609 if (insert_regs (op0, NULL, 0))
4611 rehash_using_reg (op0);
4612 op0_hash = HASH (op0, mode);
4614 /* If OP0 is contained in OP1, this changes its hash code
4615 as well. Faster to rehash than to check, except
4616 for the simple case of a constant. */
4617 if (! CONSTANT_P (op1))
4618 op1_hash = HASH (op1,mode);
4621 op0_elt = insert (op0, NULL, op0_hash, mode);
4622 op0_elt->in_memory = op0_in_memory;
4625 qty = REG_QTY (REGNO (op0));
4626 ent = &qty_table[qty];
4628 ent->comparison_code = code;
4629 if (GET_CODE (op1) == REG)
4631 /* Look it up again--in case op0 and op1 are the same. */
4632 op1_elt = lookup (op1, op1_hash, mode);
4634 /* Put OP1 in the hash table so it gets a new quantity number. */
4637 if (insert_regs (op1, NULL, 0))
4639 rehash_using_reg (op1);
4640 op1_hash = HASH (op1, mode);
4643 op1_elt = insert (op1, NULL, op1_hash, mode);
4644 op1_elt->in_memory = op1_in_memory;
4647 ent->comparison_const = NULL_RTX;
4648 ent->comparison_qty = REG_QTY (REGNO (op1));
4652 ent->comparison_const = op1;
4653 ent->comparison_qty = -1;
4659 /* If either side is still missing an equivalence, make it now,
4660 then merge the equivalences. */
4664 if (insert_regs (op0, NULL, 0))
4666 rehash_using_reg (op0);
4667 op0_hash = HASH (op0, mode);
4670 op0_elt = insert (op0, NULL, op0_hash, mode);
4671 op0_elt->in_memory = op0_in_memory;
4676 if (insert_regs (op1, NULL, 0))
4678 rehash_using_reg (op1);
4679 op1_hash = HASH (op1, mode);
4682 op1_elt = insert (op1, NULL, op1_hash, mode);
4683 op1_elt->in_memory = op1_in_memory;
4686 merge_equiv_classes (op0_elt, op1_elt);
4687 last_jump_equiv_class = op0_elt;
4690 /* CSE processing for one instruction.
4691 First simplify sources and addresses of all assignments
4692 in the instruction, using previously-computed equivalents values.
4693 Then install the new sources and destinations in the table
4694 of available values.
4696 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4697 the insn. It means that INSN is inside libcall block. In this
4698 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4700 /* Data on one SET contained in the instruction. */
4704 /* The SET rtx itself. */
4706 /* The SET_SRC of the rtx (the original value, if it is changing). */
4708 /* The hash-table element for the SET_SRC of the SET. */
4709 struct table_elt *src_elt;
4710 /* Hash value for the SET_SRC. */
4712 /* Hash value for the SET_DEST. */
4714 /* The SET_DEST, with SUBREG, etc., stripped. */
4716 /* Nonzero if the SET_SRC is in memory. */
4718 /* Nonzero if the SET_SRC contains something
4719 whose value cannot be predicted and understood. */
4721 /* Original machine mode, in case it becomes a CONST_INT. */
4722 enum machine_mode mode;
4723 /* A constant equivalent for SET_SRC, if any. */
4725 /* Original SET_SRC value used for libcall notes. */
4727 /* Hash value of constant equivalent for SET_SRC. */
4728 unsigned src_const_hash;
4729 /* Table entry for constant equivalent for SET_SRC, if any. */
4730 struct table_elt *src_const_elt;
4734 cse_insn (insn, libcall_insn)
4738 rtx x = PATTERN (insn);
4744 /* Records what this insn does to set CC0. */
4745 rtx this_insn_cc0 = 0;
4746 enum machine_mode this_insn_cc0_mode = VOIDmode;
4750 struct table_elt *src_eqv_elt = 0;
4751 int src_eqv_volatile = 0;
4752 int src_eqv_in_memory = 0;
4753 unsigned src_eqv_hash = 0;
4755 struct set *sets = (struct set *) 0;
4759 /* Find all the SETs and CLOBBERs in this instruction.
4760 Record all the SETs in the array `set' and count them.
4761 Also determine whether there is a CLOBBER that invalidates
4762 all memory references, or all references at varying addresses. */
4764 if (GET_CODE (insn) == CALL_INSN)
4766 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4768 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4769 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4770 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4774 if (GET_CODE (x) == SET)
4776 sets = (struct set *) alloca (sizeof (struct set));
4779 /* Ignore SETs that are unconditional jumps.
4780 They never need cse processing, so this does not hurt.
4781 The reason is not efficiency but rather
4782 so that we can test at the end for instructions
4783 that have been simplified to unconditional jumps
4784 and not be misled by unchanged instructions
4785 that were unconditional jumps to begin with. */
4786 if (SET_DEST (x) == pc_rtx
4787 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4790 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4791 The hard function value register is used only once, to copy to
4792 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4793 Ensure we invalidate the destination register. On the 80386 no
4794 other code would invalidate it since it is a fixed_reg.
4795 We need not check the return of apply_change_group; see canon_reg. */
4797 else if (GET_CODE (SET_SRC (x)) == CALL)
4799 canon_reg (SET_SRC (x), insn);
4800 apply_change_group ();
4801 fold_rtx (SET_SRC (x), insn);
4802 invalidate (SET_DEST (x), VOIDmode);
4807 else if (GET_CODE (x) == PARALLEL)
4809 int lim = XVECLEN (x, 0);
4811 sets = (struct set *) alloca (lim * sizeof (struct set));
4813 /* Find all regs explicitly clobbered in this insn,
4814 and ensure they are not replaced with any other regs
4815 elsewhere in this insn.
4816 When a reg that is clobbered is also used for input,
4817 we should presume that that is for a reason,
4818 and we should not substitute some other register
4819 which is not supposed to be clobbered.
4820 Therefore, this loop cannot be merged into the one below
4821 because a CALL may precede a CLOBBER and refer to the
4822 value clobbered. We must not let a canonicalization do
4823 anything in that case. */
4824 for (i = 0; i < lim; i++)
4826 rtx y = XVECEXP (x, 0, i);
4827 if (GET_CODE (y) == CLOBBER)
4829 rtx clobbered = XEXP (y, 0);
4831 if (GET_CODE (clobbered) == REG
4832 || GET_CODE (clobbered) == SUBREG)
4833 invalidate (clobbered, VOIDmode);
4834 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4835 || GET_CODE (clobbered) == ZERO_EXTRACT)
4836 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4840 for (i = 0; i < lim; i++)
4842 rtx y = XVECEXP (x, 0, i);
4843 if (GET_CODE (y) == SET)
4845 /* As above, we ignore unconditional jumps and call-insns and
4846 ignore the result of apply_change_group. */
4847 if (GET_CODE (SET_SRC (y)) == CALL)
4849 canon_reg (SET_SRC (y), insn);
4850 apply_change_group ();
4851 fold_rtx (SET_SRC (y), insn);
4852 invalidate (SET_DEST (y), VOIDmode);
4854 else if (SET_DEST (y) == pc_rtx
4855 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4858 sets[n_sets++].rtl = y;
4860 else if (GET_CODE (y) == CLOBBER)
4862 /* If we clobber memory, canon the address.
4863 This does nothing when a register is clobbered
4864 because we have already invalidated the reg. */
4865 if (GET_CODE (XEXP (y, 0)) == MEM)
4866 canon_reg (XEXP (y, 0), NULL_RTX);
4868 else if (GET_CODE (y) == USE
4869 && ! (GET_CODE (XEXP (y, 0)) == REG
4870 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4871 canon_reg (y, NULL_RTX);
4872 else if (GET_CODE (y) == CALL)
4874 /* The result of apply_change_group can be ignored; see
4876 canon_reg (y, insn);
4877 apply_change_group ();
4882 else if (GET_CODE (x) == CLOBBER)
4884 if (GET_CODE (XEXP (x, 0)) == MEM)
4885 canon_reg (XEXP (x, 0), NULL_RTX);
4888 /* Canonicalize a USE of a pseudo register or memory location. */
4889 else if (GET_CODE (x) == USE
4890 && ! (GET_CODE (XEXP (x, 0)) == REG
4891 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4892 canon_reg (XEXP (x, 0), NULL_RTX);
4893 else if (GET_CODE (x) == CALL)
4895 /* The result of apply_change_group can be ignored; see canon_reg. */
4896 canon_reg (x, insn);
4897 apply_change_group ();
4901 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4902 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4903 is handled specially for this case, and if it isn't set, then there will
4904 be no equivalence for the destination. */
4905 if (n_sets == 1 && REG_NOTES (insn) != 0
4906 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4907 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4908 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4909 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4911 /* Canonicalize sources and addresses of destinations.
4912 We do this in a separate pass to avoid problems when a MATCH_DUP is
4913 present in the insn pattern. In that case, we want to ensure that
4914 we don't break the duplicate nature of the pattern. So we will replace
4915 both operands at the same time. Otherwise, we would fail to find an
4916 equivalent substitution in the loop calling validate_change below.
4918 We used to suppress canonicalization of DEST if it appears in SRC,
4919 but we don't do this any more. */
4921 for (i = 0; i < n_sets; i++)
4923 rtx dest = SET_DEST (sets[i].rtl);
4924 rtx src = SET_SRC (sets[i].rtl);
4925 rtx new = canon_reg (src, insn);
4928 sets[i].orig_src = src;
4929 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4930 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4931 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4932 || (insn_code = recog_memoized (insn)) < 0
4933 || insn_data[insn_code].n_dups > 0)
4934 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4936 SET_SRC (sets[i].rtl) = new;
4938 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4940 validate_change (insn, &XEXP (dest, 1),
4941 canon_reg (XEXP (dest, 1), insn), 1);
4942 validate_change (insn, &XEXP (dest, 2),
4943 canon_reg (XEXP (dest, 2), insn), 1);
4946 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4947 || GET_CODE (dest) == ZERO_EXTRACT
4948 || GET_CODE (dest) == SIGN_EXTRACT)
4949 dest = XEXP (dest, 0);
4951 if (GET_CODE (dest) == MEM)
4952 canon_reg (dest, insn);
4955 /* Now that we have done all the replacements, we can apply the change
4956 group and see if they all work. Note that this will cause some
4957 canonicalizations that would have worked individually not to be applied
4958 because some other canonicalization didn't work, but this should not
4961 The result of apply_change_group can be ignored; see canon_reg. */
4963 apply_change_group ();
4965 /* Set sets[i].src_elt to the class each source belongs to.
4966 Detect assignments from or to volatile things
4967 and set set[i] to zero so they will be ignored
4968 in the rest of this function.
4970 Nothing in this loop changes the hash table or the register chains. */
4972 for (i = 0; i < n_sets; i++)
4976 struct table_elt *elt = 0, *p;
4977 enum machine_mode mode;
4980 rtx src_related = 0;
4981 struct table_elt *src_const_elt = 0;
4982 int src_cost = MAX_COST;
4983 int src_eqv_cost = MAX_COST;
4984 int src_folded_cost = MAX_COST;
4985 int src_related_cost = MAX_COST;
4986 int src_elt_cost = MAX_COST;
4987 int src_regcost = MAX_COST;
4988 int src_eqv_regcost = MAX_COST;
4989 int src_folded_regcost = MAX_COST;
4990 int src_related_regcost = MAX_COST;
4991 int src_elt_regcost = MAX_COST;
4992 /* Set non-zero if we need to call force_const_mem on with the
4993 contents of src_folded before using it. */
4994 int src_folded_force_flag = 0;
4996 dest = SET_DEST (sets[i].rtl);
4997 src = SET_SRC (sets[i].rtl);
4999 /* If SRC is a constant that has no machine mode,
5000 hash it with the destination's machine mode.
5001 This way we can keep different modes separate. */
5003 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5004 sets[i].mode = mode;
5008 enum machine_mode eqvmode = mode;
5009 if (GET_CODE (dest) == STRICT_LOW_PART)
5010 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5012 hash_arg_in_memory = 0;
5013 src_eqv = fold_rtx (src_eqv, insn);
5014 src_eqv_hash = HASH (src_eqv, eqvmode);
5016 /* Find the equivalence class for the equivalent expression. */
5019 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
5021 src_eqv_volatile = do_not_record;
5022 src_eqv_in_memory = hash_arg_in_memory;
5025 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5026 value of the INNER register, not the destination. So it is not
5027 a valid substitution for the source. But save it for later. */
5028 if (GET_CODE (dest) == STRICT_LOW_PART)
5031 src_eqv_here = src_eqv;
5033 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5034 simplified result, which may not necessarily be valid. */
5035 src_folded = fold_rtx (src, insn);
5038 /* ??? This caused bad code to be generated for the m68k port with -O2.
5039 Suppose src is (CONST_INT -1), and that after truncation src_folded
5040 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5041 At the end we will add src and src_const to the same equivalence
5042 class. We now have 3 and -1 on the same equivalence class. This
5043 causes later instructions to be mis-optimized. */
5044 /* If storing a constant in a bitfield, pre-truncate the constant
5045 so we will be able to record it later. */
5046 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5047 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5049 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5051 if (GET_CODE (src) == CONST_INT
5052 && GET_CODE (width) == CONST_INT
5053 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5054 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5056 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5057 << INTVAL (width)) - 1));
5061 /* Compute SRC's hash code, and also notice if it
5062 should not be recorded at all. In that case,
5063 prevent any further processing of this assignment. */
5065 hash_arg_in_memory = 0;
5068 sets[i].src_hash = HASH (src, mode);
5069 sets[i].src_volatile = do_not_record;
5070 sets[i].src_in_memory = hash_arg_in_memory;
5072 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5073 a pseudo, do not record SRC. Using SRC as a replacement for
5074 anything else will be incorrect in that situation. Note that
5075 this usually occurs only for stack slots, in which case all the
5076 RTL would be referring to SRC, so we don't lose any optimization
5077 opportunities by not having SRC in the hash table. */
5079 if (GET_CODE (src) == MEM
5080 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5081 && GET_CODE (dest) == REG
5082 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5083 sets[i].src_volatile = 1;
5086 /* It is no longer clear why we used to do this, but it doesn't
5087 appear to still be needed. So let's try without it since this
5088 code hurts cse'ing widened ops. */
5089 /* If source is a perverse subreg (such as QI treated as an SI),
5090 treat it as volatile. It may do the work of an SI in one context
5091 where the extra bits are not being used, but cannot replace an SI
5093 if (GET_CODE (src) == SUBREG
5094 && (GET_MODE_SIZE (GET_MODE (src))
5095 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5096 sets[i].src_volatile = 1;
5099 /* Locate all possible equivalent forms for SRC. Try to replace
5100 SRC in the insn with each cheaper equivalent.
5102 We have the following types of equivalents: SRC itself, a folded
5103 version, a value given in a REG_EQUAL note, or a value related
5106 Each of these equivalents may be part of an additional class
5107 of equivalents (if more than one is in the table, they must be in
5108 the same class; we check for this).
5110 If the source is volatile, we don't do any table lookups.
5112 We note any constant equivalent for possible later use in a
5115 if (!sets[i].src_volatile)
5116 elt = lookup (src, sets[i].src_hash, mode);
5118 sets[i].src_elt = elt;
5120 if (elt && src_eqv_here && src_eqv_elt)
5122 if (elt->first_same_value != src_eqv_elt->first_same_value)
5124 /* The REG_EQUAL is indicating that two formerly distinct
5125 classes are now equivalent. So merge them. */
5126 merge_equiv_classes (elt, src_eqv_elt);
5127 src_eqv_hash = HASH (src_eqv, elt->mode);
5128 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5134 else if (src_eqv_elt)
5137 /* Try to find a constant somewhere and record it in `src_const'.
5138 Record its table element, if any, in `src_const_elt'. Look in
5139 any known equivalences first. (If the constant is not in the
5140 table, also set `sets[i].src_const_hash'). */
5142 for (p = elt->first_same_value; p; p = p->next_same_value)
5146 src_const_elt = elt;
5151 && (CONSTANT_P (src_folded)
5152 /* Consider (minus (label_ref L1) (label_ref L2)) as
5153 "constant" here so we will record it. This allows us
5154 to fold switch statements when an ADDR_DIFF_VEC is used. */
5155 || (GET_CODE (src_folded) == MINUS
5156 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5157 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5158 src_const = src_folded, src_const_elt = elt;
5159 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5160 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5162 /* If we don't know if the constant is in the table, get its
5163 hash code and look it up. */
5164 if (src_const && src_const_elt == 0)
5166 sets[i].src_const_hash = HASH (src_const, mode);
5167 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5170 sets[i].src_const = src_const;
5171 sets[i].src_const_elt = src_const_elt;
5173 /* If the constant and our source are both in the table, mark them as
5174 equivalent. Otherwise, if a constant is in the table but the source
5175 isn't, set ELT to it. */
5176 if (src_const_elt && elt
5177 && src_const_elt->first_same_value != elt->first_same_value)
5178 merge_equiv_classes (elt, src_const_elt);
5179 else if (src_const_elt && elt == 0)
5180 elt = src_const_elt;
5182 /* See if there is a register linearly related to a constant
5183 equivalent of SRC. */
5185 && (GET_CODE (src_const) == CONST
5186 || (src_const_elt && src_const_elt->related_value != 0)))
5188 src_related = use_related_value (src_const, src_const_elt);
5191 struct table_elt *src_related_elt
5192 = lookup (src_related, HASH (src_related, mode), mode);
5193 if (src_related_elt && elt)
5195 if (elt->first_same_value
5196 != src_related_elt->first_same_value)
5197 /* This can occur when we previously saw a CONST
5198 involving a SYMBOL_REF and then see the SYMBOL_REF
5199 twice. Merge the involved classes. */
5200 merge_equiv_classes (elt, src_related_elt);
5203 src_related_elt = 0;
5205 else if (src_related_elt && elt == 0)
5206 elt = src_related_elt;
5210 /* See if we have a CONST_INT that is already in a register in a
5213 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5214 && GET_MODE_CLASS (mode) == MODE_INT
5215 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5217 enum machine_mode wider_mode;
5219 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5220 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5221 && src_related == 0;
5222 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5224 struct table_elt *const_elt
5225 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5230 for (const_elt = const_elt->first_same_value;
5231 const_elt; const_elt = const_elt->next_same_value)
5232 if (GET_CODE (const_elt->exp) == REG)
5234 src_related = gen_lowpart_if_possible (mode,
5241 /* Another possibility is that we have an AND with a constant in
5242 a mode narrower than a word. If so, it might have been generated
5243 as part of an "if" which would narrow the AND. If we already
5244 have done the AND in a wider mode, we can use a SUBREG of that
5247 if (flag_expensive_optimizations && ! src_related
5248 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5249 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5251 enum machine_mode tmode;
5252 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5254 for (tmode = GET_MODE_WIDER_MODE (mode);
5255 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5256 tmode = GET_MODE_WIDER_MODE (tmode))
5258 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5259 struct table_elt *larger_elt;
5263 PUT_MODE (new_and, tmode);
5264 XEXP (new_and, 0) = inner;
5265 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5266 if (larger_elt == 0)
5269 for (larger_elt = larger_elt->first_same_value;
5270 larger_elt; larger_elt = larger_elt->next_same_value)
5271 if (GET_CODE (larger_elt->exp) == REG)
5274 = gen_lowpart_if_possible (mode, larger_elt->exp);
5284 #ifdef LOAD_EXTEND_OP
5285 /* See if a MEM has already been loaded with a widening operation;
5286 if it has, we can use a subreg of that. Many CISC machines
5287 also have such operations, but this is only likely to be
5288 beneficial these machines. */
5290 if (flag_expensive_optimizations && src_related == 0
5291 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5292 && GET_MODE_CLASS (mode) == MODE_INT
5293 && GET_CODE (src) == MEM && ! do_not_record
5294 && LOAD_EXTEND_OP (mode) != NIL)
5296 enum machine_mode tmode;
5298 /* Set what we are trying to extend and the operation it might
5299 have been extended with. */
5300 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5301 XEXP (memory_extend_rtx, 0) = src;
5303 for (tmode = GET_MODE_WIDER_MODE (mode);
5304 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5305 tmode = GET_MODE_WIDER_MODE (tmode))
5307 struct table_elt *larger_elt;
5309 PUT_MODE (memory_extend_rtx, tmode);
5310 larger_elt = lookup (memory_extend_rtx,
5311 HASH (memory_extend_rtx, tmode), tmode);
5312 if (larger_elt == 0)
5315 for (larger_elt = larger_elt->first_same_value;
5316 larger_elt; larger_elt = larger_elt->next_same_value)
5317 if (GET_CODE (larger_elt->exp) == REG)
5319 src_related = gen_lowpart_if_possible (mode,
5328 #endif /* LOAD_EXTEND_OP */
5330 if (src == src_folded)
5333 /* At this point, ELT, if non-zero, points to a class of expressions
5334 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5335 and SRC_RELATED, if non-zero, each contain additional equivalent
5336 expressions. Prune these latter expressions by deleting expressions
5337 already in the equivalence class.
5339 Check for an equivalent identical to the destination. If found,
5340 this is the preferred equivalent since it will likely lead to
5341 elimination of the insn. Indicate this by placing it in
5345 elt = elt->first_same_value;
5346 for (p = elt; p; p = p->next_same_value)
5348 enum rtx_code code = GET_CODE (p->exp);
5350 /* If the expression is not valid, ignore it. Then we do not
5351 have to check for validity below. In most cases, we can use
5352 `rtx_equal_p', since canonicalization has already been done. */
5353 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5356 /* Also skip paradoxical subregs, unless that's what we're
5359 && (GET_MODE_SIZE (GET_MODE (p->exp))
5360 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5362 && GET_CODE (src) == SUBREG
5363 && GET_MODE (src) == GET_MODE (p->exp)
5364 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5365 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5368 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5370 else if (src_folded && GET_CODE (src_folded) == code
5371 && rtx_equal_p (src_folded, p->exp))
5373 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5374 && rtx_equal_p (src_eqv_here, p->exp))
5376 else if (src_related && GET_CODE (src_related) == code
5377 && rtx_equal_p (src_related, p->exp))
5380 /* This is the same as the destination of the insns, we want
5381 to prefer it. Copy it to src_related. The code below will
5382 then give it a negative cost. */
5383 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5387 /* Find the cheapest valid equivalent, trying all the available
5388 possibilities. Prefer items not in the hash table to ones
5389 that are when they are equal cost. Note that we can never
5390 worsen an insn as the current contents will also succeed.
5391 If we find an equivalent identical to the destination, use it as best,
5392 since this insn will probably be eliminated in that case. */
5395 if (rtx_equal_p (src, dest))
5396 src_cost = src_regcost = -1;
5399 src_cost = COST (src);
5400 src_regcost = approx_reg_cost (src);
5406 if (rtx_equal_p (src_eqv_here, dest))
5407 src_eqv_cost = src_eqv_regcost = -1;
5410 src_eqv_cost = COST (src_eqv_here);
5411 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5417 if (rtx_equal_p (src_folded, dest))
5418 src_folded_cost = src_folded_regcost = -1;
5421 src_folded_cost = COST (src_folded);
5422 src_folded_regcost = approx_reg_cost (src_folded);
5428 if (rtx_equal_p (src_related, dest))
5429 src_related_cost = src_related_regcost = -1;
5432 src_related_cost = COST (src_related);
5433 src_related_regcost = approx_reg_cost (src_related);
5437 /* If this was an indirect jump insn, a known label will really be
5438 cheaper even though it looks more expensive. */
5439 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5440 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5442 /* Terminate loop when replacement made. This must terminate since
5443 the current contents will be tested and will always be valid. */
5448 /* Skip invalid entries. */
5449 while (elt && GET_CODE (elt->exp) != REG
5450 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5451 elt = elt->next_same_value;
5453 /* A paradoxical subreg would be bad here: it'll be the right
5454 size, but later may be adjusted so that the upper bits aren't
5455 what we want. So reject it. */
5457 && GET_CODE (elt->exp) == SUBREG
5458 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5459 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5460 /* It is okay, though, if the rtx we're trying to match
5461 will ignore any of the bits we can't predict. */
5463 && GET_CODE (src) == SUBREG
5464 && GET_MODE (src) == GET_MODE (elt->exp)
5465 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5466 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5468 elt = elt->next_same_value;
5474 src_elt_cost = elt->cost;
5475 src_elt_regcost = elt->regcost;
5478 /* Find cheapest and skip it for the next time. For items
5479 of equal cost, use this order:
5480 src_folded, src, src_eqv, src_related and hash table entry. */
5482 && preferrable (src_folded_cost, src_folded_regcost,
5483 src_cost, src_regcost) <= 0
5484 && preferrable (src_folded_cost, src_folded_regcost,
5485 src_eqv_cost, src_eqv_regcost) <= 0
5486 && preferrable (src_folded_cost, src_folded_regcost,
5487 src_related_cost, src_related_regcost) <= 0
5488 && preferrable (src_folded_cost, src_folded_regcost,
5489 src_elt_cost, src_elt_regcost) <= 0)
5491 trial = src_folded, src_folded_cost = MAX_COST;
5492 if (src_folded_force_flag)
5493 trial = force_const_mem (mode, trial);
5496 && preferrable (src_cost, src_regcost,
5497 src_eqv_cost, src_eqv_regcost) <= 0
5498 && preferrable (src_cost, src_regcost,
5499 src_related_cost, src_related_regcost) <= 0
5500 && preferrable (src_cost, src_regcost,
5501 src_elt_cost, src_elt_regcost) <= 0)
5502 trial = src, src_cost = MAX_COST;
5503 else if (src_eqv_here
5504 && preferrable (src_eqv_cost, src_eqv_regcost,
5505 src_related_cost, src_related_regcost) <= 0
5506 && preferrable (src_eqv_cost, src_eqv_regcost,
5507 src_elt_cost, src_elt_regcost) <= 0)
5508 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5509 else if (src_related
5510 && preferrable (src_related_cost, src_related_regcost,
5511 src_elt_cost, src_elt_regcost) <= 0)
5512 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5515 trial = copy_rtx (elt->exp);
5516 elt = elt->next_same_value;
5517 src_elt_cost = MAX_COST;
5520 /* We don't normally have an insn matching (set (pc) (pc)), so
5521 check for this separately here. We will delete such an
5524 For other cases such as a table jump or conditional jump
5525 where we know the ultimate target, go ahead and replace the
5526 operand. While that may not make a valid insn, we will
5527 reemit the jump below (and also insert any necessary
5529 if (n_sets == 1 && dest == pc_rtx
5531 || (GET_CODE (trial) == LABEL_REF
5532 && ! condjump_p (insn))))
5534 SET_SRC (sets[i].rtl) = trial;
5535 cse_jumps_altered = 1;
5539 /* Look for a substitution that makes a valid insn. */
5540 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5542 /* If we just made a substitution inside a libcall, then we
5543 need to make the same substitution in any notes attached
5544 to the RETVAL insn. */
5546 && (GET_CODE (sets[i].orig_src) == REG
5547 || GET_CODE (sets[i].orig_src) == SUBREG
5548 || GET_CODE (sets[i].orig_src) == MEM))
5549 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5550 canon_reg (SET_SRC (sets[i].rtl), insn));
5552 /* The result of apply_change_group can be ignored; see
5555 validate_change (insn, &SET_SRC (sets[i].rtl),
5556 canon_reg (SET_SRC (sets[i].rtl), insn),
5558 apply_change_group ();
5562 /* If we previously found constant pool entries for
5563 constants and this is a constant, try making a
5564 pool entry. Put it in src_folded unless we already have done
5565 this since that is where it likely came from. */
5567 else if (constant_pool_entries_cost
5568 && CONSTANT_P (trial)
5569 /* Reject cases that will abort in decode_rtx_const.
5570 On the alpha when simplifying a switch, we get
5571 (const (truncate (minus (label_ref) (label_ref)))). */
5572 && ! (GET_CODE (trial) == CONST
5573 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5574 /* Likewise on IA-64, except without the truncate. */
5575 && ! (GET_CODE (trial) == CONST
5576 && GET_CODE (XEXP (trial, 0)) == MINUS
5577 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5578 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5580 || (GET_CODE (src_folded) != MEM
5581 && ! src_folded_force_flag))
5582 && GET_MODE_CLASS (mode) != MODE_CC
5583 && mode != VOIDmode)
5585 src_folded_force_flag = 1;
5587 src_folded_cost = constant_pool_entries_cost;
5591 src = SET_SRC (sets[i].rtl);
5593 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5594 However, there is an important exception: If both are registers
5595 that are not the head of their equivalence class, replace SET_SRC
5596 with the head of the class. If we do not do this, we will have
5597 both registers live over a portion of the basic block. This way,
5598 their lifetimes will likely abut instead of overlapping. */
5599 if (GET_CODE (dest) == REG
5600 && REGNO_QTY_VALID_P (REGNO (dest)))
5602 int dest_q = REG_QTY (REGNO (dest));
5603 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5605 if (dest_ent->mode == GET_MODE (dest)
5606 && dest_ent->first_reg != REGNO (dest)
5607 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5608 /* Don't do this if the original insn had a hard reg as
5609 SET_SRC or SET_DEST. */
5610 && (GET_CODE (sets[i].src) != REG
5611 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5612 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5613 /* We can't call canon_reg here because it won't do anything if
5614 SRC is a hard register. */
5616 int src_q = REG_QTY (REGNO (src));
5617 struct qty_table_elem *src_ent = &qty_table[src_q];
5618 int first = src_ent->first_reg;
5620 = (first >= FIRST_PSEUDO_REGISTER
5621 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5623 /* We must use validate-change even for this, because this
5624 might be a special no-op instruction, suitable only to
5626 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5629 /* If we had a constant that is cheaper than what we are now
5630 setting SRC to, use that constant. We ignored it when we
5631 thought we could make this into a no-op. */
5632 if (src_const && COST (src_const) < COST (src)
5633 && validate_change (insn, &SET_SRC (sets[i].rtl),
5640 /* If we made a change, recompute SRC values. */
5641 if (src != sets[i].src)
5645 hash_arg_in_memory = 0;
5647 sets[i].src_hash = HASH (src, mode);
5648 sets[i].src_volatile = do_not_record;
5649 sets[i].src_in_memory = hash_arg_in_memory;
5650 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5653 /* If this is a single SET, we are setting a register, and we have an
5654 equivalent constant, we want to add a REG_NOTE. We don't want
5655 to write a REG_EQUAL note for a constant pseudo since verifying that
5656 that pseudo hasn't been eliminated is a pain. Such a note also
5657 won't help anything.
5659 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5660 which can be created for a reference to a compile time computable
5661 entry in a jump table. */
5663 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5664 && GET_CODE (src_const) != REG
5665 && ! (GET_CODE (src_const) == CONST
5666 && GET_CODE (XEXP (src_const, 0)) == MINUS
5667 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5668 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5670 /* Make sure that the rtx is not shared with any other insn. */
5671 src_const = copy_rtx (src_const);
5673 /* Record the actual constant value in a REG_EQUAL note, making
5674 a new one if one does not already exist. */
5675 set_unique_reg_note (insn, REG_EQUAL, src_const);
5677 /* If storing a constant value in a register that
5678 previously held the constant value 0,
5679 record this fact with a REG_WAS_0 note on this insn.
5681 Note that the *register* is required to have previously held 0,
5682 not just any register in the quantity and we must point to the
5683 insn that set that register to zero.
5685 Rather than track each register individually, we just see if
5686 the last set for this quantity was for this register. */
5688 if (REGNO_QTY_VALID_P (REGNO (dest)))
5690 int dest_q = REG_QTY (REGNO (dest));
5691 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5693 if (dest_ent->const_rtx == const0_rtx)
5695 /* See if we previously had a REG_WAS_0 note. */
5696 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5697 rtx const_insn = dest_ent->const_insn;
5699 if ((tem = single_set (const_insn)) != 0
5700 && rtx_equal_p (SET_DEST (tem), dest))
5703 XEXP (note, 0) = const_insn;
5706 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5713 /* Now deal with the destination. */
5716 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5717 to the MEM or REG within it. */
5718 while (GET_CODE (dest) == SIGN_EXTRACT
5719 || GET_CODE (dest) == ZERO_EXTRACT
5720 || GET_CODE (dest) == SUBREG
5721 || GET_CODE (dest) == STRICT_LOW_PART)
5722 dest = XEXP (dest, 0);
5724 sets[i].inner_dest = dest;
5726 if (GET_CODE (dest) == MEM)
5728 #ifdef PUSH_ROUNDING
5729 /* Stack pushes invalidate the stack pointer. */
5730 rtx addr = XEXP (dest, 0);
5731 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5732 && XEXP (addr, 0) == stack_pointer_rtx)
5733 invalidate (stack_pointer_rtx, Pmode);
5735 dest = fold_rtx (dest, insn);
5738 /* Compute the hash code of the destination now,
5739 before the effects of this instruction are recorded,
5740 since the register values used in the address computation
5741 are those before this instruction. */
5742 sets[i].dest_hash = HASH (dest, mode);
5744 /* Don't enter a bit-field in the hash table
5745 because the value in it after the store
5746 may not equal what was stored, due to truncation. */
5748 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5749 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5751 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5753 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5754 && GET_CODE (width) == CONST_INT
5755 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5756 && ! (INTVAL (src_const)
5757 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5758 /* Exception: if the value is constant,
5759 and it won't be truncated, record it. */
5763 /* This is chosen so that the destination will be invalidated
5764 but no new value will be recorded.
5765 We must invalidate because sometimes constant
5766 values can be recorded for bitfields. */
5767 sets[i].src_elt = 0;
5768 sets[i].src_volatile = 1;
5774 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5776 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5778 /* One less use of the label this insn used to jump to. */
5780 cse_jumps_altered = 1;
5781 /* No more processing for this set. */
5785 /* If this SET is now setting PC to a label, we know it used to
5786 be a conditional or computed branch. */
5787 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5789 /* Now emit a BARRIER after the unconditional jump. */
5790 if (NEXT_INSN (insn) == 0
5791 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5792 emit_barrier_after (insn);
5794 /* We reemit the jump in as many cases as possible just in
5795 case the form of an unconditional jump is significantly
5796 different than a computed jump or conditional jump.
5798 If this insn has multiple sets, then reemitting the
5799 jump is nontrivial. So instead we just force rerecognition
5800 and hope for the best. */
5803 rtx new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5805 JUMP_LABEL (new) = XEXP (src, 0);
5806 LABEL_NUSES (XEXP (src, 0))++;
5810 /* Now emit a BARRIER after the unconditional jump. */
5811 if (NEXT_INSN (insn) == 0
5812 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5813 emit_barrier_after (insn);
5816 INSN_CODE (insn) = -1;
5818 never_reached_warning (insn, NULL);
5820 /* Do not bother deleting any unreachable code,
5821 let jump/flow do that. */
5823 cse_jumps_altered = 1;
5827 /* If destination is volatile, invalidate it and then do no further
5828 processing for this assignment. */
5830 else if (do_not_record)
5832 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5833 invalidate (dest, VOIDmode);
5834 else if (GET_CODE (dest) == MEM)
5836 /* Outgoing arguments for a libcall don't
5837 affect any recorded expressions. */
5838 if (! libcall_insn || insn == libcall_insn)
5839 invalidate (dest, VOIDmode);
5841 else if (GET_CODE (dest) == STRICT_LOW_PART
5842 || GET_CODE (dest) == ZERO_EXTRACT)
5843 invalidate (XEXP (dest, 0), GET_MODE (dest));
5847 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5848 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5851 /* If setting CC0, record what it was set to, or a constant, if it
5852 is equivalent to a constant. If it is being set to a floating-point
5853 value, make a COMPARE with the appropriate constant of 0. If we
5854 don't do this, later code can interpret this as a test against
5855 const0_rtx, which can cause problems if we try to put it into an
5856 insn as a floating-point operand. */
5857 if (dest == cc0_rtx)
5859 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5860 this_insn_cc0_mode = mode;
5861 if (FLOAT_MODE_P (mode))
5862 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5868 /* Now enter all non-volatile source expressions in the hash table
5869 if they are not already present.
5870 Record their equivalence classes in src_elt.
5871 This way we can insert the corresponding destinations into
5872 the same classes even if the actual sources are no longer in them
5873 (having been invalidated). */
5875 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5876 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5878 struct table_elt *elt;
5879 struct table_elt *classp = sets[0].src_elt;
5880 rtx dest = SET_DEST (sets[0].rtl);
5881 enum machine_mode eqvmode = GET_MODE (dest);
5883 if (GET_CODE (dest) == STRICT_LOW_PART)
5885 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5888 if (insert_regs (src_eqv, classp, 0))
5890 rehash_using_reg (src_eqv);
5891 src_eqv_hash = HASH (src_eqv, eqvmode);
5893 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5894 elt->in_memory = src_eqv_in_memory;
5897 /* Check to see if src_eqv_elt is the same as a set source which
5898 does not yet have an elt, and if so set the elt of the set source
5900 for (i = 0; i < n_sets; i++)
5901 if (sets[i].rtl && sets[i].src_elt == 0
5902 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5903 sets[i].src_elt = src_eqv_elt;
5906 for (i = 0; i < n_sets; i++)
5907 if (sets[i].rtl && ! sets[i].src_volatile
5908 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5910 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5912 /* REG_EQUAL in setting a STRICT_LOW_PART
5913 gives an equivalent for the entire destination register,
5914 not just for the subreg being stored in now.
5915 This is a more interesting equivalence, so we arrange later
5916 to treat the entire reg as the destination. */
5917 sets[i].src_elt = src_eqv_elt;
5918 sets[i].src_hash = src_eqv_hash;
5922 /* Insert source and constant equivalent into hash table, if not
5924 struct table_elt *classp = src_eqv_elt;
5925 rtx src = sets[i].src;
5926 rtx dest = SET_DEST (sets[i].rtl);
5927 enum machine_mode mode
5928 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5930 if (sets[i].src_elt == 0)
5932 /* Don't put a hard register source into the table if this is
5933 the last insn of a libcall. In this case, we only need
5934 to put src_eqv_elt in src_elt. */
5935 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5937 struct table_elt *elt;
5939 /* Note that these insert_regs calls cannot remove
5940 any of the src_elt's, because they would have failed to
5941 match if not still valid. */
5942 if (insert_regs (src, classp, 0))
5944 rehash_using_reg (src);
5945 sets[i].src_hash = HASH (src, mode);
5947 elt = insert (src, classp, sets[i].src_hash, mode);
5948 elt->in_memory = sets[i].src_in_memory;
5949 sets[i].src_elt = classp = elt;
5952 sets[i].src_elt = classp;
5954 if (sets[i].src_const && sets[i].src_const_elt == 0
5955 && src != sets[i].src_const
5956 && ! rtx_equal_p (sets[i].src_const, src))
5957 sets[i].src_elt = insert (sets[i].src_const, classp,
5958 sets[i].src_const_hash, mode);
5961 else if (sets[i].src_elt == 0)
5962 /* If we did not insert the source into the hash table (e.g., it was
5963 volatile), note the equivalence class for the REG_EQUAL value, if any,
5964 so that the destination goes into that class. */
5965 sets[i].src_elt = src_eqv_elt;
5967 invalidate_from_clobbers (x);
5969 /* Some registers are invalidated by subroutine calls. Memory is
5970 invalidated by non-constant calls. */
5972 if (GET_CODE (insn) == CALL_INSN)
5974 if (! CONST_OR_PURE_CALL_P (insn))
5975 invalidate_memory ();
5976 invalidate_for_call ();
5979 /* Now invalidate everything set by this instruction.
5980 If a SUBREG or other funny destination is being set,
5981 sets[i].rtl is still nonzero, so here we invalidate the reg
5982 a part of which is being set. */
5984 for (i = 0; i < n_sets; i++)
5987 /* We can't use the inner dest, because the mode associated with
5988 a ZERO_EXTRACT is significant. */
5989 rtx dest = SET_DEST (sets[i].rtl);
5991 /* Needed for registers to remove the register from its
5992 previous quantity's chain.
5993 Needed for memory if this is a nonvarying address, unless
5994 we have just done an invalidate_memory that covers even those. */
5995 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5996 invalidate (dest, VOIDmode);
5997 else if (GET_CODE (dest) == MEM)
5999 /* Outgoing arguments for a libcall don't
6000 affect any recorded expressions. */
6001 if (! libcall_insn || insn == libcall_insn)
6002 invalidate (dest, VOIDmode);
6004 else if (GET_CODE (dest) == STRICT_LOW_PART
6005 || GET_CODE (dest) == ZERO_EXTRACT)
6006 invalidate (XEXP (dest, 0), GET_MODE (dest));
6009 /* A volatile ASM invalidates everything. */
6010 if (GET_CODE (insn) == INSN
6011 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
6012 && MEM_VOLATILE_P (PATTERN (insn)))
6013 flush_hash_table ();
6015 /* Make sure registers mentioned in destinations
6016 are safe for use in an expression to be inserted.
6017 This removes from the hash table
6018 any invalid entry that refers to one of these registers.
6020 We don't care about the return value from mention_regs because
6021 we are going to hash the SET_DEST values unconditionally. */
6023 for (i = 0; i < n_sets; i++)
6027 rtx x = SET_DEST (sets[i].rtl);
6029 if (GET_CODE (x) != REG)
6033 /* We used to rely on all references to a register becoming
6034 inaccessible when a register changes to a new quantity,
6035 since that changes the hash code. However, that is not
6036 safe, since after HASH_SIZE new quantities we get a
6037 hash 'collision' of a register with its own invalid
6038 entries. And since SUBREGs have been changed not to
6039 change their hash code with the hash code of the register,
6040 it wouldn't work any longer at all. So we have to check
6041 for any invalid references lying around now.
6042 This code is similar to the REG case in mention_regs,
6043 but it knows that reg_tick has been incremented, and
6044 it leaves reg_in_table as -1 . */
6045 unsigned int regno = REGNO (x);
6046 unsigned int endregno
6047 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
6048 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
6051 for (i = regno; i < endregno; i++)
6053 if (REG_IN_TABLE (i) >= 0)
6055 remove_invalid_refs (i);
6056 REG_IN_TABLE (i) = -1;
6063 /* We may have just removed some of the src_elt's from the hash table.
6064 So replace each one with the current head of the same class. */
6066 for (i = 0; i < n_sets; i++)
6069 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6070 /* If elt was removed, find current head of same class,
6071 or 0 if nothing remains of that class. */
6073 struct table_elt *elt = sets[i].src_elt;
6075 while (elt && elt->prev_same_value)
6076 elt = elt->prev_same_value;
6078 while (elt && elt->first_same_value == 0)
6079 elt = elt->next_same_value;
6080 sets[i].src_elt = elt ? elt->first_same_value : 0;
6084 /* Now insert the destinations into their equivalence classes. */
6086 for (i = 0; i < n_sets; i++)
6089 rtx dest = SET_DEST (sets[i].rtl);
6090 rtx inner_dest = sets[i].inner_dest;
6091 struct table_elt *elt;
6093 /* Don't record value if we are not supposed to risk allocating
6094 floating-point values in registers that might be wider than
6096 if ((flag_float_store
6097 && GET_CODE (dest) == MEM
6098 && FLOAT_MODE_P (GET_MODE (dest)))
6099 /* Don't record BLKmode values, because we don't know the
6100 size of it, and can't be sure that other BLKmode values
6101 have the same or smaller size. */
6102 || GET_MODE (dest) == BLKmode
6103 /* Don't record values of destinations set inside a libcall block
6104 since we might delete the libcall. Things should have been set
6105 up so we won't want to reuse such a value, but we play it safe
6108 /* If we didn't put a REG_EQUAL value or a source into the hash
6109 table, there is no point is recording DEST. */
6110 || sets[i].src_elt == 0
6111 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6112 or SIGN_EXTEND, don't record DEST since it can cause
6113 some tracking to be wrong.
6115 ??? Think about this more later. */
6116 || (GET_CODE (dest) == SUBREG
6117 && (GET_MODE_SIZE (GET_MODE (dest))
6118 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6119 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6120 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6123 /* STRICT_LOW_PART isn't part of the value BEING set,
6124 and neither is the SUBREG inside it.
6125 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6126 if (GET_CODE (dest) == STRICT_LOW_PART)
6127 dest = SUBREG_REG (XEXP (dest, 0));
6129 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6130 /* Registers must also be inserted into chains for quantities. */
6131 if (insert_regs (dest, sets[i].src_elt, 1))
6133 /* If `insert_regs' changes something, the hash code must be
6135 rehash_using_reg (dest);
6136 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6139 if (GET_CODE (inner_dest) == MEM
6140 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6141 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6142 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6143 Consider the case in which the address of the MEM is
6144 passed to a function, which alters the MEM. Then, if we
6145 later use Y instead of the MEM we'll miss the update. */
6146 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6148 elt = insert (dest, sets[i].src_elt,
6149 sets[i].dest_hash, GET_MODE (dest));
6151 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6152 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6153 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
6156 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6157 narrower than M2, and both M1 and M2 are the same number of words,
6158 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6159 make that equivalence as well.
6161 However, BAR may have equivalences for which gen_lowpart_if_possible
6162 will produce a simpler value than gen_lowpart_if_possible applied to
6163 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6164 BAR's equivalences. If we don't get a simplified form, make
6165 the SUBREG. It will not be used in an equivalence, but will
6166 cause two similar assignments to be detected.
6168 Note the loop below will find SUBREG_REG (DEST) since we have
6169 already entered SRC and DEST of the SET in the table. */
6171 if (GET_CODE (dest) == SUBREG
6172 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6174 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6175 && (GET_MODE_SIZE (GET_MODE (dest))
6176 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6177 && sets[i].src_elt != 0)
6179 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6180 struct table_elt *elt, *classp = 0;
6182 for (elt = sets[i].src_elt->first_same_value; elt;
6183 elt = elt->next_same_value)
6187 struct table_elt *src_elt;
6189 /* Ignore invalid entries. */
6190 if (GET_CODE (elt->exp) != REG
6191 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6194 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
6196 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
6198 src_hash = HASH (new_src, new_mode);
6199 src_elt = lookup (new_src, src_hash, new_mode);
6201 /* Put the new source in the hash table is if isn't
6205 if (insert_regs (new_src, classp, 0))
6207 rehash_using_reg (new_src);
6208 src_hash = HASH (new_src, new_mode);
6210 src_elt = insert (new_src, classp, src_hash, new_mode);
6211 src_elt->in_memory = elt->in_memory;
6213 else if (classp && classp != src_elt->first_same_value)
6214 /* Show that two things that we've seen before are
6215 actually the same. */
6216 merge_equiv_classes (src_elt, classp);
6218 classp = src_elt->first_same_value;
6219 /* Ignore invalid entries. */
6221 && GET_CODE (classp->exp) != REG
6222 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6223 classp = classp->next_same_value;
6228 /* Special handling for (set REG0 REG1) where REG0 is the
6229 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6230 be used in the sequel, so (if easily done) change this insn to
6231 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6232 that computed their value. Then REG1 will become a dead store
6233 and won't cloud the situation for later optimizations.
6235 Do not make this change if REG1 is a hard register, because it will
6236 then be used in the sequel and we may be changing a two-operand insn
6237 into a three-operand insn.
6239 Also do not do this if we are operating on a copy of INSN.
6241 Also don't do this if INSN ends a libcall; this would cause an unrelated
6242 register to be set in the middle of a libcall, and we then get bad code
6243 if the libcall is deleted. */
6245 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6246 && NEXT_INSN (PREV_INSN (insn)) == insn
6247 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6248 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6249 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6251 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6252 struct qty_table_elem *src_ent = &qty_table[src_q];
6254 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6255 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6257 rtx prev = prev_nonnote_insn (insn);
6259 /* Do not swap the registers around if the previous instruction
6260 attaches a REG_EQUIV note to REG1.
6262 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6263 from the pseudo that originally shadowed an incoming argument
6264 to another register. Some uses of REG_EQUIV might rely on it
6265 being attached to REG1 rather than REG2.
6267 This section previously turned the REG_EQUIV into a REG_EQUAL
6268 note. We cannot do that because REG_EQUIV may provide an
6269 uninitialised stack slot when REG_PARM_STACK_SPACE is used. */
6271 if (prev != 0 && GET_CODE (prev) == INSN
6272 && GET_CODE (PATTERN (prev)) == SET
6273 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6274 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6276 rtx dest = SET_DEST (sets[0].rtl);
6277 rtx src = SET_SRC (sets[0].rtl);
6280 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6281 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6282 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6283 apply_change_group ();
6285 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6286 any REG_WAS_0 note on INSN to PREV. */
6287 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6289 remove_note (prev, note);
6291 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6294 remove_note (insn, note);
6295 XEXP (note, 1) = REG_NOTES (prev);
6296 REG_NOTES (prev) = note;
6299 /* If INSN has a REG_EQUAL note, and this note mentions
6300 REG0, then we must delete it, because the value in
6301 REG0 has changed. If the note's value is REG1, we must
6302 also delete it because that is now this insn's dest. */
6303 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6305 && (reg_mentioned_p (dest, XEXP (note, 0))
6306 || rtx_equal_p (src, XEXP (note, 0))))
6307 remove_note (insn, note);
6312 /* If this is a conditional jump insn, record any known equivalences due to
6313 the condition being tested. */
6315 last_jump_equiv_class = 0;
6316 if (GET_CODE (insn) == JUMP_INSN
6317 && n_sets == 1 && GET_CODE (x) == SET
6318 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6319 record_jump_equiv (insn, 0);
6322 /* If the previous insn set CC0 and this insn no longer references CC0,
6323 delete the previous insn. Here we use the fact that nothing expects CC0
6324 to be valid over an insn, which is true until the final pass. */
6325 if (prev_insn && GET_CODE (prev_insn) == INSN
6326 && (tem = single_set (prev_insn)) != 0
6327 && SET_DEST (tem) == cc0_rtx
6328 && ! reg_mentioned_p (cc0_rtx, x))
6329 delete_insn (prev_insn);
6331 prev_insn_cc0 = this_insn_cc0;
6332 prev_insn_cc0_mode = this_insn_cc0_mode;
6338 /* Remove from the hash table all expressions that reference memory. */
6341 invalidate_memory ()
6344 struct table_elt *p, *next;
6346 for (i = 0; i < HASH_SIZE; i++)
6347 for (p = table[i]; p; p = next)
6349 next = p->next_same_hash;
6351 remove_from_table (p, i);
6355 /* If ADDR is an address that implicitly affects the stack pointer, return
6356 1 and update the register tables to show the effect. Else, return 0. */
6359 addr_affects_sp_p (addr)
6362 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6363 && GET_CODE (XEXP (addr, 0)) == REG
6364 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6366 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6367 REG_TICK (STACK_POINTER_REGNUM)++;
6369 /* This should be *very* rare. */
6370 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6371 invalidate (stack_pointer_rtx, VOIDmode);
6379 /* Perform invalidation on the basis of everything about an insn
6380 except for invalidating the actual places that are SET in it.
6381 This includes the places CLOBBERed, and anything that might
6382 alias with something that is SET or CLOBBERed.
6384 X is the pattern of the insn. */
6387 invalidate_from_clobbers (x)
6390 if (GET_CODE (x) == CLOBBER)
6392 rtx ref = XEXP (x, 0);
6395 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6396 || GET_CODE (ref) == MEM)
6397 invalidate (ref, VOIDmode);
6398 else if (GET_CODE (ref) == STRICT_LOW_PART
6399 || GET_CODE (ref) == ZERO_EXTRACT)
6400 invalidate (XEXP (ref, 0), GET_MODE (ref));
6403 else if (GET_CODE (x) == PARALLEL)
6406 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6408 rtx y = XVECEXP (x, 0, i);
6409 if (GET_CODE (y) == CLOBBER)
6411 rtx ref = XEXP (y, 0);
6412 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6413 || GET_CODE (ref) == MEM)
6414 invalidate (ref, VOIDmode);
6415 else if (GET_CODE (ref) == STRICT_LOW_PART
6416 || GET_CODE (ref) == ZERO_EXTRACT)
6417 invalidate (XEXP (ref, 0), GET_MODE (ref));
6423 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6424 and replace any registers in them with either an equivalent constant
6425 or the canonical form of the register. If we are inside an address,
6426 only do this if the address remains valid.
6428 OBJECT is 0 except when within a MEM in which case it is the MEM.
6430 Return the replacement for X. */
6433 cse_process_notes (x, object)
6437 enum rtx_code code = GET_CODE (x);
6438 const char *fmt = GET_RTX_FORMAT (code);
6455 validate_change (x, &XEXP (x, 0),
6456 cse_process_notes (XEXP (x, 0), x), 0);
6461 if (REG_NOTE_KIND (x) == REG_EQUAL)
6462 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6464 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6471 rtx new = cse_process_notes (XEXP (x, 0), object);
6472 /* We don't substitute VOIDmode constants into these rtx,
6473 since they would impede folding. */
6474 if (GET_MODE (new) != VOIDmode)
6475 validate_change (object, &XEXP (x, 0), new, 0);
6480 i = REG_QTY (REGNO (x));
6482 /* Return a constant or a constant register. */
6483 if (REGNO_QTY_VALID_P (REGNO (x)))
6485 struct qty_table_elem *ent = &qty_table[i];
6487 if (ent->const_rtx != NULL_RTX
6488 && (CONSTANT_P (ent->const_rtx)
6489 || GET_CODE (ent->const_rtx) == REG))
6491 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6497 /* Otherwise, canonicalize this register. */
6498 return canon_reg (x, NULL_RTX);
6504 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6506 validate_change (object, &XEXP (x, i),
6507 cse_process_notes (XEXP (x, i), object), 0);
6512 /* Find common subexpressions between the end test of a loop and the beginning
6513 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6515 Often we have a loop where an expression in the exit test is used
6516 in the body of the loop. For example "while (*p) *q++ = *p++;".
6517 Because of the way we duplicate the loop exit test in front of the loop,
6518 however, we don't detect that common subexpression. This will be caught
6519 when global cse is implemented, but this is a quite common case.
6521 This function handles the most common cases of these common expressions.
6522 It is called after we have processed the basic block ending with the
6523 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6524 jumps to a label used only once. */
6527 cse_around_loop (loop_start)
6532 struct table_elt *p;
6534 /* If the jump at the end of the loop doesn't go to the start, we don't
6536 for (insn = PREV_INSN (loop_start);
6537 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6538 insn = PREV_INSN (insn))
6542 || GET_CODE (insn) != NOTE
6543 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6546 /* If the last insn of the loop (the end test) was an NE comparison,
6547 we will interpret it as an EQ comparison, since we fell through
6548 the loop. Any equivalences resulting from that comparison are
6549 therefore not valid and must be invalidated. */
6550 if (last_jump_equiv_class)
6551 for (p = last_jump_equiv_class->first_same_value; p;
6552 p = p->next_same_value)
6554 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6555 || (GET_CODE (p->exp) == SUBREG
6556 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6557 invalidate (p->exp, VOIDmode);
6558 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6559 || GET_CODE (p->exp) == ZERO_EXTRACT)
6560 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6563 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6564 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6566 The only thing we do with SET_DEST is invalidate entries, so we
6567 can safely process each SET in order. It is slightly less efficient
6568 to do so, but we only want to handle the most common cases.
6570 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6571 These pseudos won't have valid entries in any of the tables indexed
6572 by register number, such as reg_qty. We avoid out-of-range array
6573 accesses by not processing any instructions created after cse started. */
6575 for (insn = NEXT_INSN (loop_start);
6576 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6577 && INSN_UID (insn) < max_insn_uid
6578 && ! (GET_CODE (insn) == NOTE
6579 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6580 insn = NEXT_INSN (insn))
6583 && (GET_CODE (PATTERN (insn)) == SET
6584 || GET_CODE (PATTERN (insn)) == CLOBBER))
6585 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6586 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6587 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6588 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6589 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6590 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6595 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6596 since they are done elsewhere. This function is called via note_stores. */
6599 invalidate_skipped_set (dest, set, data)
6602 void *data ATTRIBUTE_UNUSED;
6604 enum rtx_code code = GET_CODE (dest);
6607 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6608 /* There are times when an address can appear varying and be a PLUS
6609 during this scan when it would be a fixed address were we to know
6610 the proper equivalences. So invalidate all memory if there is
6611 a BLKmode or nonscalar memory reference or a reference to a
6612 variable address. */
6613 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6614 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6616 invalidate_memory ();
6620 if (GET_CODE (set) == CLOBBER
6627 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6628 invalidate (XEXP (dest, 0), GET_MODE (dest));
6629 else if (code == REG || code == SUBREG || code == MEM)
6630 invalidate (dest, VOIDmode);
6633 /* Invalidate all insns from START up to the end of the function or the
6634 next label. This called when we wish to CSE around a block that is
6635 conditionally executed. */
6638 invalidate_skipped_block (start)
6643 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6644 insn = NEXT_INSN (insn))
6646 if (! INSN_P (insn))
6649 if (GET_CODE (insn) == CALL_INSN)
6651 if (! CONST_OR_PURE_CALL_P (insn))
6652 invalidate_memory ();
6653 invalidate_for_call ();
6656 invalidate_from_clobbers (PATTERN (insn));
6657 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6661 /* If modifying X will modify the value in *DATA (which is really an
6662 `rtx *'), indicate that fact by setting the pointed to value to
6666 cse_check_loop_start (x, set, data)
6668 rtx set ATTRIBUTE_UNUSED;
6671 rtx *cse_check_loop_start_value = (rtx *) data;
6673 if (*cse_check_loop_start_value == NULL_RTX
6674 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6677 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6678 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6679 *cse_check_loop_start_value = NULL_RTX;
6682 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6683 a loop that starts with the label at LOOP_START.
6685 If X is a SET, we see if its SET_SRC is currently in our hash table.
6686 If so, we see if it has a value equal to some register used only in the
6687 loop exit code (as marked by jump.c).
6689 If those two conditions are true, we search backwards from the start of
6690 the loop to see if that same value was loaded into a register that still
6691 retains its value at the start of the loop.
6693 If so, we insert an insn after the load to copy the destination of that
6694 load into the equivalent register and (try to) replace our SET_SRC with that
6697 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6700 cse_set_around_loop (x, insn, loop_start)
6705 struct table_elt *src_elt;
6707 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6708 are setting PC or CC0 or whose SET_SRC is already a register. */
6709 if (GET_CODE (x) == SET
6710 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6711 && GET_CODE (SET_SRC (x)) != REG)
6713 src_elt = lookup (SET_SRC (x),
6714 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6715 GET_MODE (SET_DEST (x)));
6718 for (src_elt = src_elt->first_same_value; src_elt;
6719 src_elt = src_elt->next_same_value)
6720 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6721 && COST (src_elt->exp) < COST (SET_SRC (x)))
6725 /* Look for an insn in front of LOOP_START that sets
6726 something in the desired mode to SET_SRC (x) before we hit
6727 a label or CALL_INSN. */
6729 for (p = prev_nonnote_insn (loop_start);
6730 p && GET_CODE (p) != CALL_INSN
6731 && GET_CODE (p) != CODE_LABEL;
6732 p = prev_nonnote_insn (p))
6733 if ((set = single_set (p)) != 0
6734 && GET_CODE (SET_DEST (set)) == REG
6735 && GET_MODE (SET_DEST (set)) == src_elt->mode
6736 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6738 /* We now have to ensure that nothing between P
6739 and LOOP_START modified anything referenced in
6740 SET_SRC (x). We know that nothing within the loop
6741 can modify it, or we would have invalidated it in
6744 rtx cse_check_loop_start_value = SET_SRC (x);
6745 for (q = p; q != loop_start; q = NEXT_INSN (q))
6747 note_stores (PATTERN (q),
6748 cse_check_loop_start,
6749 &cse_check_loop_start_value);
6751 /* If nothing was changed and we can replace our
6752 SET_SRC, add an insn after P to copy its destination
6753 to what we will be replacing SET_SRC with. */
6754 if (cse_check_loop_start_value
6755 && validate_change (insn, &SET_SRC (x),
6758 /* If this creates new pseudos, this is unsafe,
6759 because the regno of new pseudo is unsuitable
6760 to index into reg_qty when cse_insn processes
6761 the new insn. Therefore, if a new pseudo was
6762 created, discard this optimization. */
6763 int nregs = max_reg_num ();
6765 = gen_move_insn (src_elt->exp, SET_DEST (set));
6766 if (nregs != max_reg_num ())
6768 if (! validate_change (insn, &SET_SRC (x),
6773 emit_insn_after (move, p);
6780 /* Deal with the destination of X affecting the stack pointer. */
6781 addr_affects_sp_p (SET_DEST (x));
6783 /* See comment on similar code in cse_insn for explanation of these
6785 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6786 || GET_CODE (SET_DEST (x)) == MEM)
6787 invalidate (SET_DEST (x), VOIDmode);
6788 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6789 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6790 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6793 /* Find the end of INSN's basic block and return its range,
6794 the total number of SETs in all the insns of the block, the last insn of the
6795 block, and the branch path.
6797 The branch path indicates which branches should be followed. If a non-zero
6798 path size is specified, the block should be rescanned and a different set
6799 of branches will be taken. The branch path is only used if
6800 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6802 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6803 used to describe the block. It is filled in with the information about
6804 the current block. The incoming structure's branch path, if any, is used
6805 to construct the output branch path. */
6808 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6810 struct cse_basic_block_data *data;
6817 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6818 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6819 int path_size = data->path_size;
6823 /* Update the previous branch path, if any. If the last branch was
6824 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6825 shorten the path by one and look at the previous branch. We know that
6826 at least one branch must have been taken if PATH_SIZE is non-zero. */
6827 while (path_size > 0)
6829 if (data->path[path_size - 1].status != NOT_TAKEN)
6831 data->path[path_size - 1].status = NOT_TAKEN;
6838 /* If the first instruction is marked with QImode, that means we've
6839 already processed this block. Our caller will look at DATA->LAST
6840 to figure out where to go next. We want to return the next block
6841 in the instruction stream, not some branched-to block somewhere
6842 else. We accomplish this by pretending our called forbid us to
6843 follow jumps, or skip blocks. */
6844 if (GET_MODE (insn) == QImode)
6845 follow_jumps = skip_blocks = 0;
6847 /* Scan to end of this basic block. */
6848 while (p && GET_CODE (p) != CODE_LABEL)
6850 /* Don't cse out the end of a loop. This makes a difference
6851 only for the unusual loops that always execute at least once;
6852 all other loops have labels there so we will stop in any case.
6853 Cse'ing out the end of the loop is dangerous because it
6854 might cause an invariant expression inside the loop
6855 to be reused after the end of the loop. This would make it
6856 hard to move the expression out of the loop in loop.c,
6857 especially if it is one of several equivalent expressions
6858 and loop.c would like to eliminate it.
6860 If we are running after loop.c has finished, we can ignore
6861 the NOTE_INSN_LOOP_END. */
6863 if (! after_loop && GET_CODE (p) == NOTE
6864 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6867 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6868 the regs restored by the longjmp come from
6869 a later time than the setjmp. */
6870 if (PREV_INSN (p) && GET_CODE (PREV_INSN (p)) == CALL_INSN
6871 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6874 /* A PARALLEL can have lots of SETs in it,
6875 especially if it is really an ASM_OPERANDS. */
6876 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6877 nsets += XVECLEN (PATTERN (p), 0);
6878 else if (GET_CODE (p) != NOTE)
6881 /* Ignore insns made by CSE; they cannot affect the boundaries of
6884 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6885 high_cuid = INSN_CUID (p);
6886 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6887 low_cuid = INSN_CUID (p);
6889 /* See if this insn is in our branch path. If it is and we are to
6891 if (path_entry < path_size && data->path[path_entry].branch == p)
6893 if (data->path[path_entry].status != NOT_TAKEN)
6896 /* Point to next entry in path, if any. */
6900 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6901 was specified, we haven't reached our maximum path length, there are
6902 insns following the target of the jump, this is the only use of the
6903 jump label, and the target label is preceded by a BARRIER.
6905 Alternatively, we can follow the jump if it branches around a
6906 block of code and there are no other branches into the block.
6907 In this case invalidate_skipped_block will be called to invalidate any
6908 registers set in the block when following the jump. */
6910 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6911 && GET_CODE (p) == JUMP_INSN
6912 && GET_CODE (PATTERN (p)) == SET
6913 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6914 && JUMP_LABEL (p) != 0
6915 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6916 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6918 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6919 if ((GET_CODE (q) != NOTE
6920 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6921 || (PREV_INSN (q) && GET_CODE (PREV_INSN (q)) == CALL_INSN
6922 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6923 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6926 /* If we ran into a BARRIER, this code is an extension of the
6927 basic block when the branch is taken. */
6928 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6930 /* Don't allow ourself to keep walking around an
6931 always-executed loop. */
6932 if (next_real_insn (q) == next)
6938 /* Similarly, don't put a branch in our path more than once. */
6939 for (i = 0; i < path_entry; i++)
6940 if (data->path[i].branch == p)
6943 if (i != path_entry)
6946 data->path[path_entry].branch = p;
6947 data->path[path_entry++].status = TAKEN;
6949 /* This branch now ends our path. It was possible that we
6950 didn't see this branch the last time around (when the
6951 insn in front of the target was a JUMP_INSN that was
6952 turned into a no-op). */
6953 path_size = path_entry;
6956 /* Mark block so we won't scan it again later. */
6957 PUT_MODE (NEXT_INSN (p), QImode);
6959 /* Detect a branch around a block of code. */
6960 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6964 if (next_real_insn (q) == next)
6970 for (i = 0; i < path_entry; i++)
6971 if (data->path[i].branch == p)
6974 if (i != path_entry)
6977 /* This is no_labels_between_p (p, q) with an added check for
6978 reaching the end of a function (in case Q precedes P). */
6979 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6980 if (GET_CODE (tmp) == CODE_LABEL)
6985 data->path[path_entry].branch = p;
6986 data->path[path_entry++].status = AROUND;
6988 path_size = path_entry;
6991 /* Mark block so we won't scan it again later. */
6992 PUT_MODE (NEXT_INSN (p), QImode);
6999 data->low_cuid = low_cuid;
7000 data->high_cuid = high_cuid;
7001 data->nsets = nsets;
7004 /* If all jumps in the path are not taken, set our path length to zero
7005 so a rescan won't be done. */
7006 for (i = path_size - 1; i >= 0; i--)
7007 if (data->path[i].status != NOT_TAKEN)
7011 data->path_size = 0;
7013 data->path_size = path_size;
7015 /* End the current branch path. */
7016 data->path[path_size].branch = 0;
7019 /* Perform cse on the instructions of a function.
7020 F is the first instruction.
7021 NREGS is one plus the highest pseudo-reg number used in the instruction.
7023 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7024 (only if -frerun-cse-after-loop).
7026 Returns 1 if jump_optimize should be redone due to simplifications
7027 in conditional jump instructions. */
7030 cse_main (f, nregs, after_loop, file)
7036 struct cse_basic_block_data val;
7040 cse_jumps_altered = 0;
7041 recorded_label_ref = 0;
7042 constant_pool_entries_cost = 0;
7046 init_alias_analysis ();
7050 max_insn_uid = get_max_uid ();
7052 reg_eqv_table = (struct reg_eqv_elem *)
7053 xmalloc (nregs * sizeof (struct reg_eqv_elem));
7055 #ifdef LOAD_EXTEND_OP
7057 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7058 and change the code and mode as appropriate. */
7059 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7062 /* Reset the counter indicating how many elements have been made
7064 n_elements_made = 0;
7066 /* Find the largest uid. */
7068 max_uid = get_max_uid ();
7069 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
7071 /* Compute the mapping from uids to cuids.
7072 CUIDs are numbers assigned to insns, like uids,
7073 except that cuids increase monotonically through the code.
7074 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7075 between two insns is not affected by -g. */
7077 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7079 if (GET_CODE (insn) != NOTE
7080 || NOTE_LINE_NUMBER (insn) < 0)
7081 INSN_CUID (insn) = ++i;
7083 /* Give a line number note the same cuid as preceding insn. */
7084 INSN_CUID (insn) = i;
7087 ggc_push_context ();
7089 /* Loop over basic blocks.
7090 Compute the maximum number of qty's needed for each basic block
7091 (which is 2 for each SET). */
7096 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7097 flag_cse_skip_blocks);
7099 /* If this basic block was already processed or has no sets, skip it. */
7100 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7102 PUT_MODE (insn, VOIDmode);
7103 insn = (val.last ? NEXT_INSN (val.last) : 0);
7108 cse_basic_block_start = val.low_cuid;
7109 cse_basic_block_end = val.high_cuid;
7110 max_qty = val.nsets * 2;
7113 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7114 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7117 /* Make MAX_QTY bigger to give us room to optimize
7118 past the end of this basic block, if that should prove useful. */
7124 /* If this basic block is being extended by following certain jumps,
7125 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7126 Otherwise, we start after this basic block. */
7127 if (val.path_size > 0)
7128 cse_basic_block (insn, val.last, val.path, 0);
7131 int old_cse_jumps_altered = cse_jumps_altered;
7134 /* When cse changes a conditional jump to an unconditional
7135 jump, we want to reprocess the block, since it will give
7136 us a new branch path to investigate. */
7137 cse_jumps_altered = 0;
7138 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7139 if (cse_jumps_altered == 0
7140 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7143 cse_jumps_altered |= old_cse_jumps_altered;
7156 if (max_elements_made < n_elements_made)
7157 max_elements_made = n_elements_made;
7160 end_alias_analysis ();
7162 free (reg_eqv_table);
7164 return cse_jumps_altered || recorded_label_ref;
7167 /* Process a single basic block. FROM and TO and the limits of the basic
7168 block. NEXT_BRANCH points to the branch path when following jumps or
7169 a null path when not following jumps.
7171 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7172 loop. This is true when we are being called for the last time on a
7173 block and this CSE pass is before loop.c. */
7176 cse_basic_block (from, to, next_branch, around_loop)
7178 struct branch_path *next_branch;
7183 rtx libcall_insn = NULL_RTX;
7186 /* This array is undefined before max_reg, so only allocate
7187 the space actually needed and adjust the start. */
7190 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
7191 * sizeof (struct qty_table_elem));
7192 qty_table -= max_reg;
7196 /* TO might be a label. If so, protect it from being deleted. */
7197 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7200 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7202 enum rtx_code code = GET_CODE (insn);
7204 /* If we have processed 1,000 insns, flush the hash table to
7205 avoid extreme quadratic behavior. We must not include NOTEs
7206 in the count since there may be more of them when generating
7207 debugging information. If we clear the table at different
7208 times, code generated with -g -O might be different than code
7209 generated with -O but not -g.
7211 ??? This is a real kludge and needs to be done some other way.
7213 if (code != NOTE && num_insns++ > 1000)
7215 flush_hash_table ();
7219 /* See if this is a branch that is part of the path. If so, and it is
7220 to be taken, do so. */
7221 if (next_branch->branch == insn)
7223 enum taken status = next_branch++->status;
7224 if (status != NOT_TAKEN)
7226 if (status == TAKEN)
7227 record_jump_equiv (insn, 1);
7229 invalidate_skipped_block (NEXT_INSN (insn));
7231 /* Set the last insn as the jump insn; it doesn't affect cc0.
7232 Then follow this branch. */
7237 insn = JUMP_LABEL (insn);
7242 if (GET_MODE (insn) == QImode)
7243 PUT_MODE (insn, VOIDmode);
7245 if (GET_RTX_CLASS (code) == 'i')
7249 /* Process notes first so we have all notes in canonical forms when
7250 looking for duplicate operations. */
7252 if (REG_NOTES (insn))
7253 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7255 /* Track when we are inside in LIBCALL block. Inside such a block,
7256 we do not want to record destinations. The last insn of a
7257 LIBCALL block is not considered to be part of the block, since
7258 its destination is the result of the block and hence should be
7261 if (REG_NOTES (insn) != 0)
7263 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7264 libcall_insn = XEXP (p, 0);
7265 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7269 cse_insn (insn, libcall_insn);
7271 /* If we haven't already found an insn where we added a LABEL_REF,
7273 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7274 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7276 recorded_label_ref = 1;
7279 /* If INSN is now an unconditional jump, skip to the end of our
7280 basic block by pretending that we just did the last insn in the
7281 basic block. If we are jumping to the end of our block, show
7282 that we can have one usage of TO. */
7284 if (any_uncondjump_p (insn))
7288 free (qty_table + max_reg);
7292 if (JUMP_LABEL (insn) == to)
7295 /* Maybe TO was deleted because the jump is unconditional.
7296 If so, there is nothing left in this basic block. */
7297 /* ??? Perhaps it would be smarter to set TO
7298 to whatever follows this insn,
7299 and pretend the basic block had always ended here. */
7300 if (INSN_DELETED_P (to))
7303 insn = PREV_INSN (to);
7306 /* See if it is ok to keep on going past the label
7307 which used to end our basic block. Remember that we incremented
7308 the count of that label, so we decrement it here. If we made
7309 a jump unconditional, TO_USAGE will be one; in that case, we don't
7310 want to count the use in that jump. */
7312 if (to != 0 && NEXT_INSN (insn) == to
7313 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7315 struct cse_basic_block_data val;
7318 insn = NEXT_INSN (to);
7320 /* If TO was the last insn in the function, we are done. */
7323 free (qty_table + max_reg);
7327 /* If TO was preceded by a BARRIER we are done with this block
7328 because it has no continuation. */
7329 prev = prev_nonnote_insn (to);
7330 if (prev && GET_CODE (prev) == BARRIER)
7332 free (qty_table + max_reg);
7336 /* Find the end of the following block. Note that we won't be
7337 following branches in this case. */
7340 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7342 /* If the tables we allocated have enough space left
7343 to handle all the SETs in the next basic block,
7344 continue through it. Otherwise, return,
7345 and that block will be scanned individually. */
7346 if (val.nsets * 2 + next_qty > max_qty)
7349 cse_basic_block_start = val.low_cuid;
7350 cse_basic_block_end = val.high_cuid;
7353 /* Prevent TO from being deleted if it is a label. */
7354 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7357 /* Back up so we process the first insn in the extension. */
7358 insn = PREV_INSN (insn);
7362 if (next_qty > max_qty)
7365 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7366 the previous insn is the only insn that branches to the head of a loop,
7367 we can cse into the loop. Don't do this if we changed the jump
7368 structure of a loop unless we aren't going to be following jumps. */
7370 insn = prev_nonnote_insn(to);
7371 if ((cse_jumps_altered == 0
7372 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7373 && around_loop && to != 0
7374 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7375 && GET_CODE (insn) == JUMP_INSN
7376 && JUMP_LABEL (insn) != 0
7377 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7378 cse_around_loop (JUMP_LABEL (insn));
7380 free (qty_table + max_reg);
7382 return to ? NEXT_INSN (to) : 0;
7385 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7386 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7389 check_for_label_ref (rtl, data)
7393 rtx insn = (rtx) data;
7395 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7396 we must rerun jump since it needs to place the note. If this is a
7397 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7398 since no REG_LABEL will be added. */
7399 return (GET_CODE (*rtl) == LABEL_REF
7400 && ! LABEL_REF_NONLOCAL_P (*rtl)
7401 && LABEL_P (XEXP (*rtl, 0))
7402 && INSN_UID (XEXP (*rtl, 0)) != 0
7403 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7406 /* Count the number of times registers are used (not set) in X.
7407 COUNTS is an array in which we accumulate the count, INCR is how much
7408 we count each register usage.
7410 Don't count a usage of DEST, which is the SET_DEST of a SET which
7411 contains X in its SET_SRC. This is because such a SET does not
7412 modify the liveness of DEST. */
7415 count_reg_usage (x, counts, dest, incr)
7428 switch (code = GET_CODE (x))
7432 counts[REGNO (x)] += incr;
7446 /* If we are clobbering a MEM, mark any registers inside the address
7448 if (GET_CODE (XEXP (x, 0)) == MEM)
7449 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7453 /* Unless we are setting a REG, count everything in SET_DEST. */
7454 if (GET_CODE (SET_DEST (x)) != REG)
7455 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7457 /* If SRC has side-effects, then we can't delete this insn, so the
7458 usage of SET_DEST inside SRC counts.
7460 ??? Strictly-speaking, we might be preserving this insn
7461 because some other SET has side-effects, but that's hard
7462 to do and can't happen now. */
7463 count_reg_usage (SET_SRC (x), counts,
7464 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7469 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7474 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7476 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7479 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7484 if (REG_NOTE_KIND (x) == REG_EQUAL
7485 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7486 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7487 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7494 fmt = GET_RTX_FORMAT (code);
7495 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7498 count_reg_usage (XEXP (x, i), counts, dest, incr);
7499 else if (fmt[i] == 'E')
7500 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7501 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7505 /* Return true if set is live. */
7507 set_live_p (set, insn, counts)
7509 rtx insn ATTRIBUTE_UNUSED; /* Only used with HAVE_cc0. */
7516 if (set_noop_p (set))
7520 else if (GET_CODE (SET_DEST (set)) == CC0
7521 && !side_effects_p (SET_SRC (set))
7522 && ((tem = next_nonnote_insn (insn)) == 0
7524 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7527 else if (GET_CODE (SET_DEST (set)) != REG
7528 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7529 || counts[REGNO (SET_DEST (set))] != 0
7530 || side_effects_p (SET_SRC (set))
7531 /* An ADDRESSOF expression can turn into a use of the
7532 internal arg pointer, so always consider the
7533 internal arg pointer live. If it is truly dead,
7534 flow will delete the initializing insn. */
7535 || (SET_DEST (set) == current_function_internal_arg_pointer))
7540 /* Return true if insn is live. */
7543 insn_live_p (insn, counts)
7548 if (GET_CODE (PATTERN (insn)) == SET)
7549 return set_live_p (PATTERN (insn), insn, counts);
7550 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7552 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7554 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7556 if (GET_CODE (elt) == SET)
7558 if (set_live_p (elt, insn, counts))
7561 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7570 /* Return true if libcall is dead as a whole. */
7573 dead_libcall_p (insn)
7577 /* See if there's a REG_EQUAL note on this insn and try to
7578 replace the source with the REG_EQUAL expression.
7580 We assume that insns with REG_RETVALs can only be reg->reg
7581 copies at this point. */
7582 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7585 rtx set = single_set (insn);
7586 rtx new = simplify_rtx (XEXP (note, 0));
7589 new = XEXP (note, 0);
7591 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7593 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7600 /* Scan all the insns and delete any that are dead; i.e., they store a register
7601 that is never used or they copy a register to itself.
7603 This is used to remove insns made obviously dead by cse, loop or other
7604 optimizations. It improves the heuristics in loop since it won't try to
7605 move dead invariants out of loops or make givs for dead quantities. The
7606 remaining passes of the compilation are also sped up. */
7609 delete_trivially_dead_insns (insns, nreg)
7615 int in_libcall = 0, dead_libcall = 0;
7616 int ndead = 0, nlastdead, niterations = 0;
7618 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7619 /* First count the number of times each register is used. */
7620 counts = (int *) xcalloc (nreg, sizeof (int));
7621 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7622 count_reg_usage (insn, counts, NULL_RTX, 1);
7628 /* Go from the last insn to the first and delete insns that only set unused
7629 registers or copy a register to itself. As we delete an insn, remove
7630 usage counts for registers it uses.
7632 The first jump optimization pass may leave a real insn as the last
7633 insn in the function. We must not skip that insn or we may end
7634 up deleting code that is not really dead. */
7635 insn = get_last_insn ();
7636 if (! INSN_P (insn))
7637 insn = prev_real_insn (insn);
7639 for (; insn; insn = prev)
7643 prev = prev_real_insn (insn);
7645 /* Don't delete any insns that are part of a libcall block unless
7646 we can delete the whole libcall block.
7648 Flow or loop might get confused if we did that. Remember
7649 that we are scanning backwards. */
7650 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7654 dead_libcall = dead_libcall_p (insn);
7656 else if (in_libcall)
7657 live_insn = ! dead_libcall;
7659 live_insn = insn_live_p (insn, counts);
7661 /* If this is a dead insn, delete it and show registers in it aren't
7666 count_reg_usage (insn, counts, NULL_RTX, -1);
7667 delete_insn_and_edges (insn);
7671 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7677 } while (ndead != nlastdead);
7679 if (rtl_dump_file && ndead)
7680 fprintf (rtl_dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7681 ndead, niterations);
7684 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);