1 /* Subroutines for insn-output.c for AT&T we32000 Family.
2 Copyright (C) 1991, 1992, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
4 Contributed by John Wehle (john@feith1.uucp)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
26 #include "insn-config.h"
37 #include "target-def.h"
39 static void we32k_output_function_prologue PARAMS ((FILE *, HOST_WIDE_INT));
40 static void we32k_output_function_epilogue PARAMS ((FILE *, HOST_WIDE_INT));
42 /* Initialize the GCC target structure. */
43 #undef TARGET_ASM_FUNCTION_PROLOGUE
44 #define TARGET_ASM_FUNCTION_PROLOGUE we32k_output_function_prologue
45 #undef TARGET_ASM_FUNCTION_EPILOGUE
46 #define TARGET_ASM_FUNCTION_EPILOGUE we32k_output_function_epilogue
48 struct gcc_target targetm = TARGET_INITIALIZER;
50 /* Generate the assembly code for function entry. FILE is a stdio
51 stream to output the code to. SIZE is an int: how many units of
52 temporary storage to allocate.
54 Refer to the array `regs_ever_live' to determine which registers to
55 save; `regs_ever_live[I]' is nonzero if register number I is ever
56 used in the function. This function is responsible for knowing
57 which registers should not be saved even if used. */
60 we32k_output_function_prologue (file, size)
64 register int nregs_to_save;
66 extern char call_used_regs[];
69 for (regno = 8; regno > 2; regno--)
70 if (regs_ever_live[regno] && ! call_used_regs[regno])
71 nregs_to_save = (9 - regno);
73 fprintf (file, "\tsave &%d\n", nregs_to_save);
75 fprintf (file, "\taddw2 &%d,%%sp\n", (size + 3) & ~3);
78 /* This function generates the assembly code for function exit.
79 Args are as for output_function_prologue ().
81 The function epilogue should not depend on the current stack
82 pointer! It should use the frame pointer only. This is mandatory
83 because of alloca; we also take advantage of it to omit stack
84 adjustments before returning. */
87 we32k_output_function_epilogue (file, size)
89 HOST_WIDE_INT size ATTRIBUTE_UNUSED;
91 register int nregs_to_restore;
93 extern char call_used_regs[];
96 for (regno = 8; regno > 2; regno--)
97 if (regs_ever_live[regno] && ! call_used_regs[regno])
98 nregs_to_restore = (9 - regno);
100 fprintf (file, "\tret &%d\n", nregs_to_restore);
104 output_move_double (operands)
111 if (GET_CODE (operands[0]) == REG)
113 lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
114 msw_dreg = operands[0];
116 else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
117 lsw_operands[0] = adjust_address (operands[0], SImode, 4);
121 if (GET_CODE (operands[1]) == REG)
123 lsw_operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
124 lsw_sreg = lsw_operands[1];
126 else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1]))
128 lsw_operands[1] = adjust_address (operands[1], SImode, 4);
129 lsw_sreg = operands[1];
132 if (REG_P (lsw_sreg))
134 if (CONSTANT_ADDRESS_P (lsw_sreg))
139 if (GET_CODE (lsw_sreg) == MEM)
141 lsw_sreg = XEXP (lsw_sreg, 0);
144 if (GET_CODE (lsw_sreg) == PLUS)
146 if (CONSTANT_ADDRESS_P (XEXP (lsw_sreg, 1)))
148 lsw_sreg = XEXP (lsw_sreg, 0);
151 else if (CONSTANT_ADDRESS_P (XEXP (lsw_sreg, 0)))
153 lsw_sreg = XEXP (lsw_sreg, 1);
160 else if (GET_CODE (operands[1]) == CONST_DOUBLE)
162 lsw_operands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1]));
163 operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
165 else if (GET_CODE (operands[1]) == CONST_INT)
167 lsw_operands[1] = operands[1];
168 operands[1] = const0_rtx;
173 if (!msw_dreg || !lsw_sreg || REGNO (msw_dreg) != REGNO (lsw_sreg))
175 output_asm_insn ("movw %1, %0", operands);
176 output_asm_insn ("movw %1, %0", lsw_operands);
180 output_asm_insn ("movw %1, %0", lsw_operands);
181 output_asm_insn ("movw %1, %0", operands);
186 output_push_double (operands)
191 if (GET_CODE (operands[0]) == REG)
192 lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
193 else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
194 lsw_operands[0] = adjust_address (operands[0], SImode, 4);
195 else if (GET_CODE (operands[0]) == CONST_DOUBLE)
197 lsw_operands[0] = GEN_INT (CONST_DOUBLE_HIGH (operands[0]));
198 operands[0] = GEN_INT (CONST_DOUBLE_LOW (operands[0]));
200 else if (GET_CODE (operands[0]) == CONST_INT)
202 lsw_operands[0] = operands[0];
203 operands[0] = const0_rtx;
208 output_asm_insn ("pushw %0", operands);
209 output_asm_insn ("pushw %0", lsw_operands);