1 /* Definitions of target machine for GNU compiler. VAX version.
2 Copyright (C) 1987, 1988, 1991, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 /* Names to predefine in the preprocessor for this target machine. */
26 #define CPP_PREDEFINES "-Dvax -D__vax__ -Dunix -Asystem=unix -Asystem=bsd -Acpu=vax -Amachine=vax"
28 /* Use -J option for long branch support with Unix assembler. */
32 /* If using g-format floating point, alter math.h. */
34 #define CPP_SPEC "%{mg:%{!ansi:-DGFLOAT} -D__GFLOAT}"
36 /* Choose proper libraries depending on float format.
37 Note that there are no profiling libraries for g-format.
38 Also use -lg for the sake of dbx. */
40 #define LIB_SPEC "%{g:-lg}\
41 %{mg:%{lm:-lmg} -lcg \
42 %{p:%eprofiling not supported with -mg\n}\
43 %{pg:%eprofiling not supported with -mg\n}}\
44 %{!mg:%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}}"
46 /* Print subsidiary information on the compiler version in use. */
48 #ifndef TARGET_NAME /* A more specific value might be supplied via -D. */
49 #define TARGET_NAME "vax"
51 #define TARGET_VERSION fprintf (stderr, " (%s)", TARGET_NAME)
53 /* Run-time compilation parameters selecting different hardware subsets. */
55 extern int target_flags;
57 /* Macros used in the machine description to test the flags. */
59 /* Nonzero if compiling code that Unix assembler can assemble. */
60 #define TARGET_UNIX_ASM (target_flags & 1)
62 /* Nonzero if compiling with VAX-11 "C" style structure alignment */
63 #define TARGET_VAXC_ALIGNMENT (target_flags & 2)
65 /* Nonzero if compiling with `G'-format floating point */
66 #define TARGET_G_FLOAT (target_flags & 4)
68 /* Macro to define tables used to set the flags.
69 This is a list in braces of pairs in braces,
70 each pair being { "NAME", VALUE }
71 where VALUE is the bits to set or minus the bits to clear.
72 An empty string NAME is used to identify the default VALUE. */
74 #define TARGET_SWITCHES \
75 { {"unix", 1, "Generate code for UNIX assembler"}, \
76 {"gnu", -1, "Generate code for GNU assembler (gas)"}, \
77 {"vaxc-alignment", 2, "Use VAXC structure conventions"}, \
78 {"g", 4, "Generate GFLOAT double precision code"}, \
79 {"g-float", 4, "Generate GFLOAT double precision code"}, \
80 {"d", -4, "Generate DFLOAT double precision code"}, \
81 {"d-float", -4, "Generate DFLOAT double precision code"}, \
82 { "", TARGET_DEFAULT, 0}}
84 /* Default target_flags if no switches specified. */
86 #ifndef TARGET_DEFAULT
87 #define TARGET_DEFAULT 1
90 /* Target machine storage layout */
92 /* Define for software floating point emulation of VAX format
93 when cross compiling from a non-VAX host. */
94 /* #define REAL_ARITHMETIC */
96 /* Define this if most significant bit is lowest numbered
97 in instructions that operate on numbered bit-fields.
98 This is not true on the VAX. */
99 #define BITS_BIG_ENDIAN 0
101 /* Define this if most significant byte of a word is the lowest numbered. */
102 /* That is not true on the VAX. */
103 #define BYTES_BIG_ENDIAN 0
105 /* Define this if most significant word of a multiword number is the lowest
107 /* This is not true on the VAX. */
108 #define WORDS_BIG_ENDIAN 0
110 /* Number of bits in an addressable storage unit */
111 #define BITS_PER_UNIT 8
113 /* Width in bits of a "word", which is the contents of a machine register.
114 Note that this is not necessarily the width of data type `int';
115 if using 16-bit ints on a 68000, this would still be 32.
116 But on a machine with 16-bit registers, this would be 16. */
117 #define BITS_PER_WORD 32
119 /* Width of a word, in units (bytes). */
120 #define UNITS_PER_WORD 4
122 /* Width in bits of a pointer.
123 See also the macro `Pmode' defined below. */
124 #define POINTER_SIZE 32
126 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
127 #define PARM_BOUNDARY 32
129 /* Allocation boundary (in *bits*) for the code of a function. */
130 #define FUNCTION_BOUNDARY 16
132 /* Alignment of field after `int : 0' in a structure. */
133 #define EMPTY_FIELD_BOUNDARY (TARGET_VAXC_ALIGNMENT ? 8 : 32)
135 /* Every structure's size must be a multiple of this. */
136 #define STRUCTURE_SIZE_BOUNDARY 8
138 /* A bitfield declared as `int' forces `int' alignment for the struct. */
139 #define PCC_BITFIELD_TYPE_MATTERS (! TARGET_VAXC_ALIGNMENT)
141 /* No data type wants to be aligned rounder than this. */
142 #define BIGGEST_ALIGNMENT 32
144 /* No structure field wants to be aligned rounder than this. */
145 #define BIGGEST_FIELD_ALIGNMENT (TARGET_VAXC_ALIGNMENT ? 8 : 32)
147 /* Set this nonzero if move instructions will actually fail to work
148 when given unaligned data. */
149 #define STRICT_ALIGNMENT 0
151 /* Let's keep the stack somewhat aligned. */
152 #define STACK_BOUNDARY 32
154 /* The table of an ADDR_DIFF_VEC must be contiguous with the case
155 opcode, it is part of the case instruction. */
156 #define ADDR_VEC_ALIGN(ADDR_VEC) 0
158 /* Standard register usage. */
160 /* Number of actual hardware registers.
161 The hardware registers are assigned numbers for the compiler
162 from 0 to just below FIRST_PSEUDO_REGISTER.
163 All registers that the compiler knows about must be given numbers,
164 even those that are not normally considered general registers. */
165 #define FIRST_PSEUDO_REGISTER 16
167 /* 1 for registers that have pervasive standard uses
168 and are not available for the register allocator.
169 On the VAX, these are the AP, FP, SP and PC. */
170 #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1}
172 /* 1 for registers not available across function calls.
173 These must include the FIXED_REGISTERS and also any
174 registers that can be used without being saved.
175 The latter must include the registers where values are returned
176 and the register where structure-value addresses are passed.
177 Aside from that, you can include as many other registers as you like. */
178 #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1}
180 /* Return number of consecutive hard regs needed starting at reg REGNO
181 to hold something of mode MODE.
182 This is ordinarily the length in words of a value of mode MODE
183 but can be less for certain modes in special long registers.
184 On the VAX, all registers are one word long. */
185 #define HARD_REGNO_NREGS(REGNO, MODE) \
186 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
188 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
189 On the VAX, all registers can hold all modes. */
190 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
192 /* Value is 1 if it is a good idea to tie two pseudo registers
193 when one has mode MODE1 and one has mode MODE2.
194 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
195 for any hard reg, then this must be 0 for correct output. */
196 #define MODES_TIEABLE_P(MODE1, MODE2) 1
198 /* Specify the registers used for certain standard purposes.
199 The values of these macros are register numbers. */
201 /* VAX pc is overloaded on a register. */
204 /* Register to use for pushing function arguments. */
205 #define STACK_POINTER_REGNUM 14
207 /* Base register for access to local variables of the function. */
208 #define FRAME_POINTER_REGNUM 13
210 /* Value should be nonzero if functions must have frame pointers.
211 Zero means the frame pointer need not be set up (and parms
212 may be accessed via the stack pointer) in functions that seem suitable.
213 This is computed in `reload', in reload1.c. */
214 #define FRAME_POINTER_REQUIRED 1
216 /* Base register for access to arguments of the function. */
217 #define ARG_POINTER_REGNUM 12
219 /* Register in which static-chain is passed to a function. */
220 #define STATIC_CHAIN_REGNUM 0
222 /* Register in which address to store a structure value
223 is passed to a function. */
224 #define STRUCT_VALUE_REGNUM 1
226 /* Define the classes of registers for register constraints in the
227 machine description. Also define ranges of constants.
229 One of the classes must always be named ALL_REGS and include all hard regs.
230 If there is more than one class, another class must be named NO_REGS
231 and contain no registers.
233 The name GENERAL_REGS must be the name of a class (or an alias for
234 another name such as ALL_REGS). This is the class of registers
235 that is allowed by "g" or "r" in a register constraint.
236 Also, registers outside this class are allocated only when
237 instructions express preferences for them.
239 The classes must be numbered in nondecreasing order; that is,
240 a larger-numbered class must never be contained completely
241 in a smaller-numbered class.
243 For any two classes, it is very desirable that there be another
244 class that represents their union. */
246 /* The VAX has only one kind of registers, so NO_REGS and ALL_REGS
247 are the only classes. */
249 enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
251 #define N_REG_CLASSES (int) LIM_REG_CLASSES
253 /* Since GENERAL_REGS is the same class as ALL_REGS,
254 don't give it a different class number; just make it an alias. */
256 #define GENERAL_REGS ALL_REGS
258 /* Give names of register classes as strings for dump file. */
260 #define REG_CLASS_NAMES \
261 {"NO_REGS", "ALL_REGS" }
263 /* Define which registers fit in which classes.
264 This is an initializer for a vector of HARD_REG_SET
265 of length N_REG_CLASSES. */
267 #define REG_CLASS_CONTENTS {{0}, {0xffff}}
269 /* The same information, inverted:
270 Return the class number of the smallest class containing
271 reg number REGNO. This could be a conditional expression
272 or could index an array. */
274 #define REGNO_REG_CLASS(REGNO) ALL_REGS
276 /* The class value for index registers, and the one for base regs. */
278 #define INDEX_REG_CLASS ALL_REGS
279 #define BASE_REG_CLASS ALL_REGS
281 /* Get reg_class from a letter such as appears in the machine description. */
283 #define REG_CLASS_FROM_LETTER(C) NO_REGS
285 /* The letters I, J, K, L and M in a register constraint string
286 can be used to stand for particular ranges of immediate operands.
287 This macro defines what the ranges are.
288 C is the letter, and VALUE is a constant value.
289 Return 1 if VALUE is in the range specified by C.
291 `I' is the constant zero. */
293 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
294 ((C) == 'I' ? (VALUE) == 0 \
297 /* Similar, but for floating constants, and defining letters G and H.
298 Here VALUE is the CONST_DOUBLE rtx itself.
300 `G' is a floating-point zero. */
302 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
303 ((C) == 'G' ? ((VALUE) == CONST0_RTX (DFmode) \
304 || (VALUE) == CONST0_RTX (SFmode)) \
307 /* Optional extra constraints for this machine.
309 For the VAX, `Q' means that OP is a MEM that does not have a mode-dependent
312 #define EXTRA_CONSTRAINT(OP, C) \
314 ? GET_CODE (OP) == MEM && ! mode_dependent_address_p (XEXP (OP, 0)) \
317 /* Given an rtx X being reloaded into a reg required to be
318 in class CLASS, return the class of reg to actually use.
319 In general this is just CLASS; but on some machines
320 in some cases it is preferable to use a more restrictive class. */
322 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
324 /* Return the maximum number of consecutive registers
325 needed to represent mode MODE in a register of class CLASS. */
326 /* On the VAX, this is always the size of MODE in words,
327 since all registers are the same size. */
328 #define CLASS_MAX_NREGS(CLASS, MODE) \
329 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
331 /* Stack layout; function entry, exit and calling. */
333 /* Define this if pushing a word on the stack
334 makes the stack pointer a smaller address. */
335 #define STACK_GROWS_DOWNWARD
337 /* Define this if the nominal address of the stack frame
338 is at the high-address end of the local variables;
339 that is, each additional local variable allocated
340 goes at a more negative offset in the frame. */
341 #define FRAME_GROWS_DOWNWARD
343 /* Offset within stack frame to start allocating local variables at.
344 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
345 first local allocated. Otherwise, it is the offset to the BEGINNING
346 of the first local allocated. */
347 #define STARTING_FRAME_OFFSET 0
349 /* Given an rtx for the address of a frame,
350 return an rtx for the address of the word in the frame
351 that holds the dynamic chain--the previous frame's address. */
352 #define DYNAMIC_CHAIN_ADDRESS(FRAME) plus_constant ((FRAME), 12)
354 /* If we generate an insn to push BYTES bytes,
355 this says how many the stack pointer really advances by.
356 On the VAX, -(sp) pushes only the bytes of the operands. */
357 #define PUSH_ROUNDING(BYTES) (BYTES)
359 /* Offset of first parameter from the argument pointer register value. */
360 #define FIRST_PARM_OFFSET(FNDECL) 4
362 /* Value is the number of bytes of arguments automatically
363 popped when returning from a subroutine call.
364 FUNDECL is the declaration node of the function (as a tree),
365 FUNTYPE is the data type of the function (as a tree),
366 or for a library call it is an identifier node for the subroutine name.
367 SIZE is the number of bytes of arguments passed on the stack.
369 On the VAX, the RET insn pops a maximum of 255 args for any function. */
371 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
372 ((SIZE) > 255*4 ? 0 : (SIZE))
374 /* Define how to find the value returned by a function.
375 VALTYPE is the data type of the value (as a tree).
376 If the precise function being called is known, FUNC is its FUNCTION_DECL;
377 otherwise, FUNC is 0. */
379 /* On the VAX the return value is in R0 regardless. */
381 #define FUNCTION_VALUE(VALTYPE, FUNC) \
382 gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
384 /* Define how to find the value returned by a library function
385 assuming the value has mode MODE. */
387 /* On the VAX the return value is in R0 regardless. */
389 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
391 /* Define this if PCC uses the nonreentrant convention for returning
392 structure and union values. */
394 #define PCC_STATIC_STRUCT_RETURN
396 /* 1 if N is a possible register number for a function value.
397 On the VAX, R0 is the only register thus used. */
399 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
401 /* 1 if N is a possible register number for function argument passing.
402 On the VAX, no registers are used in this way. */
404 #define FUNCTION_ARG_REGNO_P(N) 0
406 /* Define a data type for recording info about an argument list
407 during the scan of that argument list. This data type should
408 hold all necessary information about the function itself
409 and about the args processed so far, enough to enable macros
410 such as FUNCTION_ARG to determine where the next arg should go.
412 On the VAX, this is a single integer, which is a number of bytes
413 of arguments scanned so far. */
415 #define CUMULATIVE_ARGS int
417 /* Initialize a variable CUM of type CUMULATIVE_ARGS
418 for a call to a function whose data type is FNTYPE.
419 For a library call, FNTYPE is 0.
421 On the VAX, the offset starts at 0. */
423 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
426 /* Update the data in CUM to advance over an argument
427 of mode MODE and data type TYPE.
428 (TYPE is null for libcalls where that information may not be available.) */
430 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
431 ((CUM) += ((MODE) != BLKmode \
432 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
433 : (int_size_in_bytes (TYPE) + 3) & ~3))
435 /* Define where to put the arguments to a function.
436 Value is zero to push the argument on the stack,
437 or a hard register in which to store the argument.
439 MODE is the argument's machine mode.
440 TYPE is the data type of the argument (as a tree).
441 This is null for libcalls where that information may
443 CUM is a variable of type CUMULATIVE_ARGS which gives info about
444 the preceding args and about the function being called.
445 NAMED is nonzero if this argument is a named parameter
446 (otherwise it is an extra parameter matching an ellipsis). */
448 /* On the VAX all args are pushed. */
450 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
452 /* Output assembler code to FILE to increment profiler label # LABELNO
453 for profiling a function entry. */
455 #define FUNCTION_PROFILER(FILE, LABELNO) \
456 fprintf (FILE, "\tmovab LP%d,r0\n\tjsb mcount\n", (LABELNO));
458 /* Output assembler code to FILE to initialize this source file's
459 basic block profiling info, if that has not already been done. */
461 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
462 fprintf (FILE, "\ttstl LPBX0\n\tjneq LPI%d\n\tpushal LPBX0\n\tcalls $1,__bb_init_func\nLPI%d:\n", \
465 /* Output assembler code to FILE to increment the entry-count for
466 the BLOCKNO'th basic block in this source file. This is a real pain in the
467 sphincter on a VAX, since we do not want to change any of the bits in the
468 processor status word. The way it is done here, it is pushed onto the stack
469 before any flags have changed, and then the stack is fixed up to account for
470 the fact that the instruction to restore the flags only reads a word.
471 It may seem a bit clumsy, but at least it works.
474 #define BLOCK_PROFILER(FILE, BLOCKNO) \
475 fprintf (FILE, "\tmovpsl -(sp)\n\tmovw (sp),2(sp)\n\taddl2 $2,sp\n\taddl2 $1,LPBX2+%d\n\tbicpsw $255\n\tbispsw (sp)+\n", \
478 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
479 the stack pointer does not matter. The value is tested only in
480 functions that have frame pointers.
481 No definition is equivalent to always zero. */
483 #define EXIT_IGNORE_STACK 1
485 /* Store in the variable DEPTH the initial difference between the
486 frame pointer reg contents and the stack pointer reg contents,
487 as of the start of the function body. This depends on the layout
488 of the fixed parts of the stack frame and on how registers are saved.
490 On the VAX, FRAME_POINTER_REQUIRED is always 1, so the definition of this
491 macro doesn't matter. But it must be defined. */
493 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0;
495 /* Output assembler code for a block containing the constant parts
496 of a trampoline, leaving space for the variable parts. */
498 /* On the VAX, the trampoline contains an entry mask and two instructions:
500 movl $STATIC,r0 (store the functions static chain)
501 jmp *$FUNCTION (jump to function code at address FUNCTION) */
503 #define TRAMPOLINE_TEMPLATE(FILE) \
505 assemble_aligned_integer (2, const0_rtx); \
506 assemble_aligned_integer (2, GEN_INT (0x8fd0)); \
507 assemble_aligned_integer (4, const0_rtx); \
508 assemble_aligned_integer (1, GEN_INT (0x50 + STATIC_CHAIN_REGNUM)); \
509 assemble_aligned_integer (2, GEN_INT (0x9f17)); \
510 assemble_aligned_integer (4, const0_rtx); \
513 /* Length in units of the trampoline for entering a nested function. */
515 #define TRAMPOLINE_SIZE 15
517 /* Emit RTL insns to initialize the variable parts of a trampoline.
518 FNADDR is an RTX for the address of the function's pure code.
519 CXT is an RTX for the static chain value for the function. */
521 /* We copy the register-mask from the function's pure code
522 to the start of the trampoline. */
523 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
525 emit_insn (gen_rtx_ASM_INPUT (VOIDmode, \
526 "movpsl -(sp)\n\tpushal 1(pc)\n\trei")); \
527 emit_move_insn (gen_rtx_MEM (HImode, TRAMP), \
528 gen_rtx_MEM (HImode, FNADDR)); \
529 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT);\
530 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 11)), \
531 plus_constant (FNADDR, 2)); \
534 /* Byte offset of return address in a stack frame. The "saved PC" field
535 is in element [4] when treating the frame as an array of longwords. */
537 #define RETURN_ADDRESS_OFFSET (4 * UNITS_PER_WORD) /* 16 */
539 /* A C expression whose value is RTL representing the value of the return
540 address for the frame COUNT steps up from the current frame.
541 FRAMEADDR is already the frame pointer of the COUNT frame, so we
544 #define RETURN_ADDR_RTX(COUNT, FRAME) \
546 ? gen_rtx_MEM (Pmode, plus_constant (FRAME, RETURN_ADDRESS_OFFSET)) \
550 /* Addressing modes, and classification of registers for them. */
552 #define HAVE_POST_INCREMENT 1
553 /* #define HAVE_POST_DECREMENT 0 */
555 #define HAVE_PRE_DECREMENT 1
556 /* #define HAVE_PRE_INCREMENT 0 */
558 /* Macros to check register numbers against specific register classes. */
560 /* These assume that REGNO is a hard or pseudo reg number.
561 They give nonzero only if REGNO is a hard reg of the suitable class
562 or a pseudo reg currently allocated to a suitable hard reg.
563 Since they use reg_renumber, they are safe only once reg_renumber
564 has been allocated, which happens in local-alloc.c. */
566 #define REGNO_OK_FOR_INDEX_P(regno) \
567 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
568 #define REGNO_OK_FOR_BASE_P(regno) \
569 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
571 /* Maximum number of registers that can appear in a valid memory address. */
573 #define MAX_REGS_PER_ADDRESS 2
575 /* 1 if X is an rtx for a constant that is a valid address. */
577 #define CONSTANT_ADDRESS_P(X) \
578 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
579 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
580 || GET_CODE (X) == HIGH)
582 /* Nonzero if the constant value X is a legitimate general operand.
583 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
585 #define LEGITIMATE_CONSTANT_P(X) 1
587 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
588 and check its validity for a certain class.
589 We have two alternate definitions for each of them.
590 The usual definition accepts all pseudo regs; the other rejects
591 them unless they have been allocated suitable hard regs.
592 The symbol REG_OK_STRICT causes the latter definition to be used.
594 Most source files want to accept pseudo regs in the hope that
595 they will get allocated to the class that the insn wants them to be in.
596 Source files for reload pass need to be strict.
597 After reload, it makes no difference, since pseudo regs have
598 been eliminated by then. */
600 #ifndef REG_OK_STRICT
602 /* Nonzero if X is a hard reg that can be used as an index
603 or if it is a pseudo reg. */
604 #define REG_OK_FOR_INDEX_P(X) 1
605 /* Nonzero if X is a hard reg that can be used as a base reg
606 or if it is a pseudo reg. */
607 #define REG_OK_FOR_BASE_P(X) 1
611 /* Nonzero if X is a hard reg that can be used as an index. */
612 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
613 /* Nonzero if X is a hard reg that can be used as a base reg. */
614 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
618 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
619 that is a valid memory address for an instruction.
620 The MODE argument is the machine mode for the MEM expression
621 that wants to use this address.
623 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
624 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
626 #ifdef NO_EXTERNAL_INDIRECT_ADDRESS
628 /* Zero if this contains a (CONST (PLUS (SYMBOL_REF) (...))) and the
629 symbol in the SYMBOL_REF is an external symbol. */
631 #define INDIRECTABLE_CONSTANT_P(X) \
632 (! (GET_CODE ((X)) == CONST \
633 && GET_CODE (XEXP ((X), 0)) == PLUS \
634 && GET_CODE (XEXP (XEXP ((X), 0), 0)) == SYMBOL_REF \
635 && SYMBOL_REF_FLAG (XEXP (XEXP ((X), 0), 0))))
637 /* Re-definition of CONSTANT_ADDRESS_P, which is true only when there
638 are no SYMBOL_REFs for external symbols present. */
640 #define INDIRECTABLE_CONSTANT_ADDRESS_P(X) \
641 (GET_CODE (X) == LABEL_REF \
642 || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_FLAG (X)) \
643 || (GET_CODE (X) == CONST && INDIRECTABLE_CONSTANT_P(X)) \
644 || GET_CODE (X) == CONST_INT)
647 /* Non-zero if X is an address which can be indirected. External symbols
648 could be in a sharable image library, so we disallow those. */
650 #define INDIRECTABLE_ADDRESS_P(X) \
651 (INDIRECTABLE_CONSTANT_ADDRESS_P (X) \
652 || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
653 || (GET_CODE (X) == PLUS \
654 && GET_CODE (XEXP (X, 0)) == REG \
655 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
656 && INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1))))
658 #else /* not NO_EXTERNAL_INDIRECT_ADDRESS */
660 #define INDIRECTABLE_CONSTANT_ADDRESS_P(X) CONSTANT_ADDRESS_P(X)
662 /* Non-zero if X is an address which can be indirected. */
663 #define INDIRECTABLE_ADDRESS_P(X) \
664 (CONSTANT_ADDRESS_P (X) \
665 || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
666 || (GET_CODE (X) == PLUS \
667 && GET_CODE (XEXP (X, 0)) == REG \
668 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
669 && CONSTANT_ADDRESS_P (XEXP (X, 1))))
671 #endif /* not NO_EXTERNAL_INDIRECT_ADDRESS */
673 /* Go to ADDR if X is a valid address not using indexing.
674 (This much is the easy part.) */
675 #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
676 { register rtx xfoob = (X); \
677 if (GET_CODE (xfoob) == REG) \
679 extern rtx *reg_equiv_mem; \
680 if (! reload_in_progress \
681 || reg_equiv_mem[REGNO (xfoob)] == 0 \
682 || INDIRECTABLE_ADDRESS_P (reg_equiv_mem[REGNO (xfoob)])) \
685 if (CONSTANT_ADDRESS_P (xfoob)) goto ADDR; \
686 if (INDIRECTABLE_ADDRESS_P (xfoob)) goto ADDR; \
687 xfoob = XEXP (X, 0); \
688 if (GET_CODE (X) == MEM && INDIRECTABLE_ADDRESS_P (xfoob)) \
690 if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
691 && GET_CODE (xfoob) == REG && REG_OK_FOR_BASE_P (xfoob)) \
694 /* 1 if PROD is either a reg times size of mode MODE
695 or just a reg, if MODE is just one byte.
696 This macro's expansion uses the temporary variables xfoo0 and xfoo1
697 that must be declared in the surrounding context. */
698 #define INDEX_TERM_P(PROD, MODE) \
699 (GET_MODE_SIZE (MODE) == 1 \
700 ? (GET_CODE (PROD) == REG && REG_OK_FOR_BASE_P (PROD)) \
701 : (GET_CODE (PROD) == MULT \
703 (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \
704 ((((GET_CODE (xfoo0) == CONST_INT \
705 && GET_CODE (xfoo1) == REG) \
706 && INTVAL (xfoo0) == (int)GET_MODE_SIZE (MODE)) \
707 && REG_OK_FOR_INDEX_P (xfoo1)) \
709 (((GET_CODE (xfoo1) == CONST_INT \
710 && GET_CODE (xfoo0) == REG) \
711 && INTVAL (xfoo1) == (int)GET_MODE_SIZE (MODE)) \
712 && REG_OK_FOR_INDEX_P (xfoo0))))))
714 /* Go to ADDR if X is the sum of a register
715 and a valid index term for mode MODE. */
716 #define GO_IF_REG_PLUS_INDEX(X, MODE, ADDR) \
717 { register rtx xfooa; \
718 if (GET_CODE (X) == PLUS) \
719 { if (GET_CODE (XEXP (X, 0)) == REG \
720 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
721 && (xfooa = XEXP (X, 1), \
722 INDEX_TERM_P (xfooa, MODE))) \
724 if (GET_CODE (XEXP (X, 1)) == REG \
725 && REG_OK_FOR_BASE_P (XEXP (X, 1)) \
726 && (xfooa = XEXP (X, 0), \
727 INDEX_TERM_P (xfooa, MODE))) \
730 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
731 { register rtx xfoo, xfoo0, xfoo1; \
732 GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
733 if (GET_CODE (X) == PLUS) \
734 { /* Handle <address>[index] represented with index-sum outermost */\
735 xfoo = XEXP (X, 0); \
736 if (INDEX_TERM_P (xfoo, MODE)) \
737 { GO_IF_NONINDEXED_ADDRESS (XEXP (X, 1), ADDR); } \
738 xfoo = XEXP (X, 1); \
739 if (INDEX_TERM_P (xfoo, MODE)) \
740 { GO_IF_NONINDEXED_ADDRESS (XEXP (X, 0), ADDR); } \
741 /* Handle offset(reg)[index] with offset added outermost */ \
742 if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 0))) \
743 { if (GET_CODE (XEXP (X, 1)) == REG \
744 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
746 GO_IF_REG_PLUS_INDEX (XEXP (X, 1), MODE, ADDR); } \
747 if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (X, 1))) \
748 { if (GET_CODE (XEXP (X, 0)) == REG \
749 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
751 GO_IF_REG_PLUS_INDEX (XEXP (X, 0), MODE, ADDR); } } }
753 /* Try machine-dependent ways of modifying an illegitimate address
754 to be legitimate. If we find one, return the new, valid address.
755 This macro is used in only one place: `memory_address' in explow.c.
757 OLDX is the address as it was before break_out_memory_refs was called.
758 In some cases it is useful to look at this to decide what needs to be done.
760 MODE and WIN are passed so that this macro can use
761 GO_IF_LEGITIMATE_ADDRESS.
763 It is always safe for this macro to do nothing. It exists to recognize
764 opportunities to optimize the output.
766 For the VAX, nothing needs to be done. */
768 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
770 /* Go to LABEL if ADDR (a legitimate address expression)
771 has an effect that depends on the machine mode it is used for.
772 On the VAX, the predecrement and postincrement address depend thus
773 (the amount of decrement or increment being the length of the operand)
774 and all indexed address depend thus (because the index scale factor
775 is the length of the operand). */
776 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
777 { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
779 if (GET_CODE (ADDR) == PLUS) \
780 { if (CONSTANT_ADDRESS_P (XEXP (ADDR, 0)) \
781 && GET_CODE (XEXP (ADDR, 1)) == REG); \
782 else if (CONSTANT_ADDRESS_P (XEXP (ADDR, 1)) \
783 && GET_CODE (XEXP (ADDR, 0)) == REG); \
786 /* Specify the machine mode that this machine uses
787 for the index in the tablejump instruction. */
788 #define CASE_VECTOR_MODE HImode
790 /* Define as C expression which evaluates to nonzero if the tablejump
791 instruction expects the table to contain offsets from the address of the
793 Do not define this if the table should contain absolute addresses. */
794 #define CASE_VECTOR_PC_RELATIVE 1
796 /* Define this if the case instruction drops through after the table
797 when the index is out of range. Don't define it if the case insn
798 jumps to the default label instead. */
799 #define CASE_DROPS_THROUGH
801 /* Define this as 1 if `char' should by default be signed; else as 0. */
802 #define DEFAULT_SIGNED_CHAR 1
804 /* This flag, if defined, says the same insns that convert to a signed fixnum
805 also convert validly to an unsigned one. */
806 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
808 /* Max number of bytes we can move from memory to memory
809 in one reasonably fast instruction. */
812 /* Define this if zero-extension is slow (more than one real instruction). */
813 /* #define SLOW_ZERO_EXTEND */
815 /* Nonzero if access to memory by bytes is slow and undesirable. */
816 #define SLOW_BYTE_ACCESS 0
818 /* Define if shifts truncate the shift count
819 which implies one can omit a sign-extension or zero-extension
821 /* #define SHIFT_COUNT_TRUNCATED */
823 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
824 is done just by pretending it is already truncated. */
825 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
827 /* When a prototype says `char' or `short', really pass an `int'.
828 (On the VAX, this is required for system-library compatibility.) */
829 #define PROMOTE_PROTOTYPES 1
831 /* Specify the machine mode that pointers have.
832 After generation of rtl, the compiler makes no further distinction
833 between pointers and any other objects of this machine mode. */
836 /* A function address in a call instruction
837 is a byte address (for indexing purposes)
838 so give the MEM rtx a byte's mode. */
839 #define FUNCTION_MODE QImode
841 /* This machine doesn't use IEEE floats. */
843 #define TARGET_FLOAT_FORMAT VAX_FLOAT_FORMAT
845 /* Compute the cost of computing a constant rtl expression RTX
846 whose rtx-code is CODE. The body of this macro is a portion
847 of a switch statement. If the code is computed here,
848 return it with a return statement. Otherwise, break from the switch. */
850 /* On a VAX, constants from 0..63 are cheap because they can use the
851 1 byte literal constant format. compare to -1 should be made cheap
852 so that decrement-and-branch insns can be formed more easily (if
853 the value -1 is copied to a register some decrement-and-branch patterns
856 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
858 if (INTVAL (RTX) == 0) return 0; \
859 if ((OUTER_CODE) == AND) \
860 return ((unsigned) ~INTVAL (RTX) <= 077) ? 1 : 2; \
861 if ((unsigned) INTVAL (RTX) <= 077) return 1; \
862 if ((OUTER_CODE) == COMPARE && INTVAL (RTX) == -1) \
864 if ((OUTER_CODE) == PLUS && (unsigned) -INTVAL (RTX) <= 077)\
871 if (GET_MODE_CLASS (GET_MODE (RTX)) == MODE_FLOAT) \
872 return vax_float_literal (RTX) ? 5 : 8; \
874 return (((CONST_DOUBLE_HIGH (RTX) == 0 \
875 && (unsigned) CONST_DOUBLE_LOW (RTX) < 64) \
876 || ((OUTER_CODE) == PLUS \
877 && CONST_DOUBLE_HIGH (RTX) == -1 \
878 && (unsigned)-CONST_DOUBLE_LOW (RTX) < 64)) \
881 #define RTX_COSTS(RTX,CODE,OUTER_CODE) case FIX: case FLOAT: \
882 case MULT: case DIV: case UDIV: case MOD: case UMOD: \
883 case ASHIFT: case LSHIFTRT: case ASHIFTRT: \
884 case ROTATE: case ROTATERT: case PLUS: case MINUS: case IOR: \
885 case XOR: case AND: case NEG: case NOT: case ZERO_EXTRACT: \
886 case SIGN_EXTRACT: case MEM: return vax_rtx_cost(RTX)
888 #define ADDRESS_COST(RTX) (1 + (GET_CODE (RTX) == REG ? 0 : vax_address_cost(RTX)))
890 /* Specify the cost of a branch insn; roughly the number of extra insns that
891 should be added to avoid a branch.
893 Branches are extremely cheap on the VAX while the shift insns often
894 used to replace branches can be expensive. */
896 #define BRANCH_COST 0
899 * We can use the BSD C library routines for the libgcc calls that are
900 * still generated, since that's what they boil down to anyways.
903 #define UDIVSI3_LIBCALL "*udiv"
904 #define UMODSI3_LIBCALL "*urem"
906 /* Check a `double' value for validity for a particular machine mode. */
908 /* note that it is very hard to accidentally create a number that fits in a
909 double but not in a float, since their ranges are almost the same */
911 #define CHECK_FLOAT_VALUE(MODE, D, OVERFLOW) \
912 ((OVERFLOW) = check_float_value (MODE, &D, OVERFLOW))
914 /* For future reference:
915 D Float: 9 bit, sign magnitude, excess 128 binary exponent
916 normalized 56 bit fraction, redundant bit not represented
917 approximately 16 decimal digits of precision
919 The values to use if we trust decimal to binary conversions:
920 #define MAX_D_FLOAT 1.7014118346046923e+38
921 #define MIN_D_FLOAT .29387358770557188e-38
923 G float: 12 bit, sign magnitude, excess 1024 binary exponent
924 normalized 53 bit fraction, redundant bit not represented
925 approximately 15 decimal digits precision
927 The values to use if we trust decimal to binary conversions:
928 #define MAX_G_FLOAT .898846567431157e+308
929 #define MIN_G_FLOAT .556268464626800e-308
932 /* Tell final.c how to eliminate redundant test instructions. */
934 /* Here we define machine-dependent flags and fields in cc_status
935 (see `conditions.h'). No extra ones are needed for the VAX. */
937 /* Store in cc_status the expressions
938 that the condition codes will describe
939 after execution of an instruction whose pattern is EXP.
940 Do not alter them if the instruction would not alter the cc's. */
942 #define NOTICE_UPDATE_CC(EXP, INSN) \
943 { if (GET_CODE (EXP) == SET) \
944 { if (GET_CODE (SET_SRC (EXP)) == CALL) \
946 else if (GET_CODE (SET_DEST (EXP)) != ZERO_EXTRACT \
947 && GET_CODE (SET_DEST (EXP)) != PC) \
949 cc_status.flags = 0; \
950 /* The integer operations below don't set carry or \
951 set it in an incompatible way. That's ok though \
952 as the Z bit is all we need when doing unsigned \
953 comparisons on the result of these insns (since \
954 they're always with 0). Set CC_NO_OVERFLOW to \
955 generate the correct unsigned branches. */ \
956 switch (GET_CODE (SET_SRC (EXP))) \
959 if (GET_MODE_CLASS (GET_MODE (EXP)) == MODE_FLOAT)\
967 cc_status.flags = CC_NO_OVERFLOW; \
972 cc_status.value1 = SET_DEST (EXP); \
973 cc_status.value2 = SET_SRC (EXP); } } \
974 else if (GET_CODE (EXP) == PARALLEL \
975 && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
977 if (GET_CODE (SET_SRC (XVECEXP (EXP, 0, 0))) == CALL) \
979 else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) != PC) \
980 { cc_status.flags = 0; \
981 cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
982 cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); } \
984 /* PARALLELs whose first element sets the PC are aob, \
985 sob insns. They do change the cc's. */ \
987 else CC_STATUS_INIT; \
988 if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
989 && cc_status.value2 \
990 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
991 cc_status.value2 = 0; \
992 if (cc_status.value1 && GET_CODE (cc_status.value1) == MEM \
993 && cc_status.value2 \
994 && GET_CODE (cc_status.value2) == MEM) \
995 cc_status.value2 = 0; }
996 /* Actual condition, one line up, should be that value2's address
997 depends on value1, but that is too much of a pain. */
999 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1000 { if (cc_status.flags & CC_NO_OVERFLOW) \
1004 /* Control the assembler format that we output. */
1006 /* Output at beginning of assembler file. */
1007 /* When debugging, we want to output an extra dummy label so that gas
1008 can distinguish between D_float and G_float prior to processing the
1009 .stabs directive identifying type double. */
1011 #define ASM_FILE_START(FILE) \
1013 fputs (ASM_APP_OFF, FILE); \
1014 if (write_symbols == DBX_DEBUG) \
1015 fprintf (FILE, "___vax_%c_doubles:\n", ASM_DOUBLE_CHAR); \
1019 /* Output to assembler file text saying following lines
1020 may contain character constants, extra white space, comments, etc. */
1022 #define ASM_APP_ON "#APP\n"
1024 /* Output to assembler file text saying following lines
1025 no longer contain unusual constructs. */
1027 #define ASM_APP_OFF "#NO_APP\n"
1029 /* Output before read-only data. */
1031 #define TEXT_SECTION_ASM_OP "\t.text"
1033 /* Output before writable data. */
1035 #define DATA_SECTION_ASM_OP "\t.data"
1037 /* How to refer to registers in assembler output.
1038 This sequence is indexed by compiler's hard-register-number (see above). */
1040 #define REGISTER_NAMES \
1041 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", \
1042 "r9", "r10", "r11", "ap", "fp", "sp", "pc"}
1044 /* This is BSD, so it wants DBX format. */
1046 #define DBX_DEBUGGING_INFO
1048 /* Do not break .stabs pseudos into continuations. */
1050 #define DBX_CONTIN_LENGTH 0
1052 /* This is the char to use for continuation (in case we need to turn
1053 continuation back on). */
1055 #define DBX_CONTIN_CHAR '?'
1057 /* Don't use the `xsfoo;' construct in DBX output; this system
1058 doesn't support it. */
1060 #define DBX_NO_XREFS
1062 /* Output the .stabs for a C `static' variable in the data section. */
1063 #define DBX_STATIC_STAB_DATA_SECTION
1065 /* VAX specific: which type character is used for type double? */
1067 #define ASM_DOUBLE_CHAR (TARGET_G_FLOAT ? 'g' : 'd')
1069 /* This is how to output the definition of a user-level label named NAME,
1070 such as the label on a static function or variable NAME. */
1072 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1073 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1075 /* This is how to output a command to make the user-level label named NAME
1076 defined for reference from other files. */
1078 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1079 do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1081 /* The prefix to add to user-visible assembler symbols. */
1083 #define USER_LABEL_PREFIX "_"
1085 /* This is how to output an internal numbered label where
1086 PREFIX is the class of label and NUM is the number within the class. */
1088 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1089 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1091 /* This is how to store into the string LABEL
1092 the symbol_ref name of an internal numbered label where
1093 PREFIX is the class of label and NUM is the number within the class.
1094 This is suitable for output with `assemble_name'. */
1096 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1097 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1099 /* This is how to output an insn to push a register on the stack.
1100 It need not be very fast code. */
1102 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1103 fprintf (FILE, "\tpushl %s\n", reg_names[REGNO])
1105 /* This is how to output an insn to pop a register from the stack.
1106 It need not be very fast code. */
1108 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1109 fprintf (FILE, "\tmovl (sp)+,%s\n", reg_names[REGNO])
1111 /* This is how to output an element of a case-vector that is absolute.
1112 (The VAX does not use such vectors,
1113 but we must define this macro anyway.) */
1115 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1116 fprintf (FILE, "\t.long L%d\n", VALUE)
1118 /* This is how to output an element of a case-vector that is relative. */
1120 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1121 fprintf (FILE, "\t.word L%d-L%d\n", VALUE, REL)
1123 /* This is how to output an assembler line
1124 that says to advance the location counter
1125 to a multiple of 2**LOG bytes. */
1127 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1128 fprintf (FILE, "\t.align %d\n", (LOG))
1130 /* This is how to output an assembler line
1131 that says to advance the location counter by SIZE bytes. */
1133 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1134 fprintf (FILE, "\t.space %u\n", (SIZE))
1136 /* This says how to output an assembler line
1137 to define a global common symbol. */
1139 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1140 ( fputs (".comm ", (FILE)), \
1141 assemble_name ((FILE), (NAME)), \
1142 fprintf ((FILE), ",%u\n", (ROUNDED)))
1144 /* This says how to output an assembler line
1145 to define a local common symbol. */
1147 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1148 ( fputs (".lcomm ", (FILE)), \
1149 assemble_name ((FILE), (NAME)), \
1150 fprintf ((FILE), ",%u\n", (ROUNDED)))
1152 /* Store in OUTPUT a string (made with alloca) containing
1153 an assembler-name for a local static variable named NAME.
1154 LABELNO is an integer which is different for each call. */
1156 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1157 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1158 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1160 /* Output code to add DELTA to the first argument, and then jump to FUNCTION.
1161 Used for C++ multiple inheritance.
1162 .mask ^m<r2,r3,r4,r5,r6,r7,r8,r9,r10,r11> #conservative entry mask
1163 addl2 $DELTA, 4(ap) #adjust first argument
1164 jmp FUNCTION+2 #jump beyond FUNCTION's entry mask
1166 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
1168 fprintf (FILE, "\t.word 0x0ffc\n"); \
1169 fprintf (FILE, "\taddl2 $%d,4(ap)\n", DELTA); \
1170 fprintf (FILE, "\tjmp "); \
1171 assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
1172 fprintf (FILE, "+2\n"); \
1175 /* Print an instruction operand X on file FILE.
1176 CODE is the code from the %-spec that requested printing this operand;
1177 if `%z3' was used to print operand 3, then CODE is 'z'.
1179 VAX operand formatting codes:
1182 C reverse branch condition
1183 D 64-bit immediate operand
1184 B the low 8 bits of the complement of a constant operand
1185 H the low 16 bits of the complement of a constant operand
1186 M a mask for the N highest bits of a word
1187 N the complement of a constant integer operand
1188 P constant operand plus 1
1189 R 32 - constant operand
1190 b the low 8 bits of a negated constant operand
1191 h the low 16 bits of a negated constant operand
1192 # 'd' or 'g' depending on whether dfloat or gfloat is used */
1194 /* The purpose of D is to get around a quirk or bug in VAX assembler
1195 whereby -1 in a 64-bit immediate operand means 0x00000000ffffffff,
1196 which is not a 64-bit minus one. */
1198 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1201 #define PRINT_OPERAND(FILE, X, CODE) \
1202 { if (CODE == '#') fputc (ASM_DOUBLE_CHAR, FILE); \
1203 else if (CODE == 'C') \
1204 fputs (rev_cond_name (X), FILE); \
1205 else if (CODE == 'D' && GET_CODE (X) == CONST_INT && INTVAL (X) < 0) \
1206 fprintf (FILE, "$0xffffffff%08x", INTVAL (X)); \
1207 else if (CODE == 'P' && GET_CODE (X) == CONST_INT) \
1208 fprintf (FILE, "$%d", INTVAL (X) + 1); \
1209 else if (CODE == 'N' && GET_CODE (X) == CONST_INT) \
1210 fprintf (FILE, "$%d", ~ INTVAL (X)); \
1211 /* rotl instruction cannot deal with negative arguments. */ \
1212 else if (CODE == 'R' && GET_CODE (X) == CONST_INT) \
1213 fprintf (FILE, "$%d", 32 - INTVAL (X)); \
1214 else if (CODE == 'H' && GET_CODE (X) == CONST_INT) \
1215 fprintf (FILE, "$%d", 0xffff & ~ INTVAL (X)); \
1216 else if (CODE == 'h' && GET_CODE (X) == CONST_INT) \
1217 fprintf (FILE, "$%d", (short) - INTVAL (x)); \
1218 else if (CODE == 'B' && GET_CODE (X) == CONST_INT) \
1219 fprintf (FILE, "$%d", 0xff & ~ INTVAL (X)); \
1220 else if (CODE == 'b' && GET_CODE (X) == CONST_INT) \
1221 fprintf (FILE, "$%d", 0xff & - INTVAL (X)); \
1222 else if (CODE == 'M' && GET_CODE (X) == CONST_INT) \
1223 fprintf (FILE, "$%d", ~((1 << INTVAL (x)) - 1)); \
1224 else if (GET_CODE (X) == REG) \
1225 fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1226 else if (GET_CODE (X) == MEM) \
1227 output_address (XEXP (X, 0)); \
1228 else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \
1229 { REAL_VALUE_TYPE r; char dstr[30]; \
1230 REAL_VALUE_FROM_CONST_DOUBLE (r, X); \
1231 REAL_VALUE_TO_DECIMAL (r, "%.20e", dstr); \
1232 fprintf (FILE, "$0f%s", dstr); } \
1233 else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == DFmode) \
1234 { REAL_VALUE_TYPE r; char dstr[30]; \
1235 REAL_VALUE_FROM_CONST_DOUBLE (r, X); \
1236 REAL_VALUE_TO_DECIMAL (r, "%.20e", dstr); \
1237 fprintf (FILE, "$0%c%s", ASM_DOUBLE_CHAR, dstr); } \
1238 else { putc ('$', FILE); output_addr_const (FILE, X); }}
1240 /* Print a memory operand whose address is X, on file FILE.
1241 This uses a function in output-vax.c. */
1243 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1244 print_operand_address (FILE, ADDR)