1 /* Subroutines for insn-output.c for Vax.
2 Copyright (C) 1987, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 #include "hard-reg-set.h"
27 #include "insn-config.h"
28 #include "conditions.h"
29 #include "insn-flags.h"
31 #include "insn-attr.h"
36 /* This is like nonimmediate_operand with a restriction on the type of MEM. */
39 split_quadword_operands (operands, low, n)
46 low[0] = low[1] = low[2] = 0;
47 for (i = 0; i < 3; i++)
50 /* it's already been figured out */;
51 else if (GET_CODE (operands[i]) == MEM
52 && (GET_CODE (XEXP (operands[i], 0)) == POST_INC))
54 rtx addr = XEXP (operands[i], 0);
55 operands[i] = low[i] = gen_rtx (MEM, SImode, addr);
56 if (which_alternative == 0 && i == 0)
58 addr = XEXP (operands[i], 0);
59 operands[i+1] = low[i+1] = gen_rtx (MEM, SImode, addr);
64 low[i] = operand_subword (operands[i], 0, 0, DImode);
65 operands[i] = operand_subword (operands[i], 1, 0, DImode);
70 print_operand_address (file, addr)
74 register rtx reg1, reg2, breg, ireg;
78 switch (GET_CODE (addr))
82 addr = XEXP (addr, 0);
86 fprintf (file, "(%s)", reg_names[REGNO (addr)]);
90 fprintf (file, "-(%s)", reg_names[REGNO (XEXP (addr, 0))]);
94 fprintf (file, "(%s)+", reg_names[REGNO (XEXP (addr, 0))]);
98 /* There can be either two or three things added here. One must be a
99 REG. One can be either a REG or a MULT of a REG and an appropriate
100 constant, and the third can only be a constant or a MEM.
102 We get these two or three things and put the constant or MEM in
103 OFFSET, the MULT or REG in IREG, and the REG in BREG. If we have
104 a register and can't tell yet if it is a base or index register,
107 reg1 = 0; ireg = 0; breg = 0; offset = 0;
109 if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
110 || GET_CODE (XEXP (addr, 0)) == MEM)
112 offset = XEXP (addr, 0);
113 addr = XEXP (addr, 1);
115 else if (CONSTANT_ADDRESS_P (XEXP (addr, 1))
116 || GET_CODE (XEXP (addr, 1)) == MEM)
118 offset = XEXP (addr, 1);
119 addr = XEXP (addr, 0);
121 else if (GET_CODE (XEXP (addr, 1)) == MULT)
123 ireg = XEXP (addr, 1);
124 addr = XEXP (addr, 0);
126 else if (GET_CODE (XEXP (addr, 0)) == MULT)
128 ireg = XEXP (addr, 0);
129 addr = XEXP (addr, 1);
131 else if (GET_CODE (XEXP (addr, 1)) == REG)
133 reg1 = XEXP (addr, 1);
134 addr = XEXP (addr, 0);
136 else if (GET_CODE (XEXP (addr, 0)) == REG)
138 reg1 = XEXP (addr, 0);
139 addr = XEXP (addr, 1);
144 if (GET_CODE (addr) == REG)
151 else if (GET_CODE (addr) == MULT)
153 else if (GET_CODE (addr) == PLUS)
155 if (CONSTANT_ADDRESS_P (XEXP (addr, 0))
156 || GET_CODE (XEXP (addr, 0)) == MEM)
160 if (GET_CODE (offset) == CONST_INT)
161 offset = plus_constant (XEXP (addr, 0), INTVAL (offset));
162 else if (GET_CODE (XEXP (addr, 0)) == CONST_INT)
163 offset = plus_constant (offset, INTVAL (XEXP (addr, 0)));
167 offset = XEXP (addr, 0);
169 else if (GET_CODE (XEXP (addr, 0)) == REG)
172 ireg = reg1, breg = XEXP (addr, 0), reg1 = 0;
174 reg1 = XEXP (addr, 0);
176 else if (GET_CODE (XEXP (addr, 0)) == MULT)
180 ireg = XEXP (addr, 0);
185 if (CONSTANT_ADDRESS_P (XEXP (addr, 1))
186 || GET_CODE (XEXP (addr, 1)) == MEM)
190 if (GET_CODE (offset) == CONST_INT)
191 offset = plus_constant (XEXP (addr, 1), INTVAL (offset));
192 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT)
193 offset = plus_constant (offset, INTVAL (XEXP (addr, 1)));
197 offset = XEXP (addr, 1);
199 else if (GET_CODE (XEXP (addr, 1)) == REG)
202 ireg = reg1, breg = XEXP (addr, 1), reg1 = 0;
204 reg1 = XEXP (addr, 1);
206 else if (GET_CODE (XEXP (addr, 1)) == MULT)
210 ireg = XEXP (addr, 1);
218 /* If REG1 is non-zero, figure out if it is a base or index register. */
221 if (breg != 0 || (offset && GET_CODE (offset) == MEM))
232 output_address (offset);
235 fprintf (file, "(%s)", reg_names[REGNO (breg)]);
239 if (GET_CODE (ireg) == MULT)
240 ireg = XEXP (ireg, 0);
241 if (GET_CODE (ireg) != REG)
243 fprintf (file, "[%s]", reg_names[REGNO (ireg)]);
248 output_addr_const (file, addr);
256 switch (GET_CODE (op))
288 register enum machine_mode mode;
290 union {double d; int i[2];} val;
292 if (GET_CODE (c) != CONST_DOUBLE)
297 if (c == const_tiny_rtx[(int) mode][0]
298 || c == const_tiny_rtx[(int) mode][1]
299 || c == const_tiny_rtx[(int) mode][2])
302 #if HOST_FLOAT_FORMAT == VAX_FLOAT_FORMAT
304 val.i[0] = CONST_DOUBLE_LOW (c);
305 val.i[1] = CONST_DOUBLE_HIGH (c);
307 for (i = 0; i < 7; i ++)
308 if (val.d == 1 << i || val.d == 1 / (1 << i))
315 /* Return the cost in cycles of a memory address, relative to register
318 Each of the following adds the indicated number of cycles:
322 1 - indexing and/or offset(register)
326 int vax_address_cost(addr)
329 int reg = 0, indexed = 0, indir = 0, offset = 0, predec = 0;
330 rtx plus_op0 = 0, plus_op1 = 0;
332 switch (GET_CODE (addr))
342 indexed = 1; /* 2 on VAX 2 */
345 /* byte offsets cost nothing (on a VAX 2, they cost 1 cycle) */
347 offset = (unsigned)(INTVAL(addr)+128) > 256;
351 offset = 1; /* 2 on VAX 2 */
353 case LABEL_REF: /* this is probably a byte offset from the pc */
359 plus_op1 = XEXP (addr, 0);
361 plus_op0 = XEXP (addr, 0);
362 addr = XEXP (addr, 1);
365 indir = 2; /* 3 on VAX 2 */
366 addr = XEXP (addr, 0);
370 /* Up to 3 things can be added in an address. They are stored in
371 plus_op0, plus_op1, and addr. */
385 /* Indexing and register+offset can both be used (except on a VAX 2)
386 without increasing execution time over either one alone. */
387 if (reg && indexed && offset)
388 return reg + indir + offset + predec;
389 return reg + indexed + indir + offset + predec;
393 /* Cost of an expression on a VAX. This version has costs tuned for the
394 CVAX chip (found in the VAX 3 series) with comments for variations on
401 register enum rtx_code code = GET_CODE (x);
402 enum machine_mode mode = GET_MODE (x);
404 int i = 0; /* may be modified in switch */
405 char *fmt = GET_RTX_FORMAT (code); /* may be modified in switch */
417 c = 16; /* 4 on VAX 9000 */
420 c = 9; /* 4 on VAX 9000, 12 on VAX 2 */
423 c = 16; /* 6 on VAX 9000, 28 on VAX 2 */
428 c = 10; /* 3-4 on VAX 9000, 20-28 on VAX 2 */
437 c = 30; /* highly variable */
438 else if (mode == DFmode)
439 /* divide takes 28 cycles if the result is not zero, 13 otherwise */
442 c = 11; /* 25 on VAX 2 */
451 c = 6 + (mode == DFmode) + (GET_MODE (XEXP (x, 0)) != SImode);
455 c = 7; /* 17 on VAX 2 */
463 c = 10; /* 6 on VAX 9000 */
467 c = 6; /* 5 on VAX 2, 4 on VAX 9000 */
468 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
469 fmt = "e"; /* all constant rotate counts are short */
472 /* Check for small negative integer operand: subl2 can be used with
473 a short positive constant instead. */
474 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
475 if ((unsigned)(INTVAL (XEXP (x, 1)) + 63) < 127)
478 c = (mode == DFmode) ? 13 : 8; /* 6/8 on VAX 9000, 16/15 on VAX 2 */
484 /* AND is special because the first operand is complemented. */
486 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
488 if ((unsigned)~INTVAL (XEXP (x, 0)) > 63)
497 else if (mode == SFmode)
499 else if (mode == DImode)
508 if (mode == DImode || mode == DFmode)
509 c = 5; /* 7 on VAX 2 */
511 c = 3; /* 4 on VAX 2 */
513 if (GET_CODE (x) == REG || GET_CODE (x) == POST_INC)
515 return c + vax_address_cost (x);
522 /* Now look inside the expression. Operands which are not registers or
523 short constants add to the cost.
525 FMT and I may have been adjusted in the switch above for instructions
526 which require special handling */
528 while (*fmt++ == 'e')
530 register rtx op = XEXP (x, i++);
531 code = GET_CODE (op);
533 /* A NOT is likely to be found as the first operand of an AND
534 (in which case the relevant cost is of the operand inside
535 the not) and not likely to be found anywhere else. */
537 op = XEXP (op, 0), code = GET_CODE (op);
542 if ((unsigned)INTVAL (op) > 63 && GET_MODE (x) != QImode)
543 c += 1; /* 2 on VAX 2 */
548 c += 1; /* 2 on VAX 2 */
551 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT)
553 /* Registers are faster than floating point constants -- even
554 those constants which can be encoded in a single byte. */
555 if (vax_float_literal (op))
558 c += (GET_MODE (x) == DFmode) ? 3 : 2;
562 if (CONST_DOUBLE_HIGH (op) != 0
563 || (unsigned)CONST_DOUBLE_LOW (op) > 63)
568 c += 1; /* 2 on VAX 2 */
569 if (GET_CODE (XEXP (op, 0)) != REG)
570 c += vax_address_cost (XEXP (op, 0));
583 /* Check a `double' value for validity for a particular machine mode. */
585 static char *float_strings[] =
587 "1.70141173319264430e+38", /* 2^127 (2^24 - 1) / 2^24 */
588 "-1.70141173319264430e+38",
589 "2.93873587705571877e-39", /* 2^-128 */
590 "-2.93873587705571877e-39"
593 static REAL_VALUE_TYPE float_values[4];
595 static int inited_float_values = 0;
599 check_float_value (mode, d, overflow)
600 enum machine_mode mode;
604 if (inited_float_values == 0)
607 for (i = 0; i < 4; i++)
609 float_values[i] = REAL_VALUE_ATOF (float_strings[i], DFmode);
612 inited_float_values = 1;
617 bcopy (&float_values[0], d, sizeof (REAL_VALUE_TYPE));
621 if ((mode) == SFmode)
624 bcopy (d, &r, sizeof (REAL_VALUE_TYPE));
625 if (REAL_VALUES_LESS (float_values[0], r))
627 bcopy (&float_values[0], d, sizeof (REAL_VALUE_TYPE));
630 else if (REAL_VALUES_LESS (r, float_values[1]))
632 bcopy (&float_values[1], d, sizeof (REAL_VALUE_TYPE));
635 else if (REAL_VALUES_LESS (dconst0, r)
636 && REAL_VALUES_LESS (r, float_values[2]))
638 bcopy (&dconst0, d, sizeof (REAL_VALUE_TYPE));
641 else if (REAL_VALUES_LESS (r, dconst0)
642 && REAL_VALUES_LESS (float_values[3], r))
644 bcopy (&dconst0, d, sizeof (REAL_VALUE_TYPE));
653 /* Additional support code for VMS target. */
655 /* Linked list of all externals that are to be emitted when optimizing
656 for the global pointer if they haven't been declared by the end of
657 the program with an appropriate .comm or initialization. */
661 struct extern_list *next; /* next external */
662 char *name; /* name of the external */
663 int size; /* external's actual size */
664 int in_const; /* section type flag */
665 } *extern_head = 0, *pending_head = 0;
667 /* Check whether NAME is already on the external definition list. If not,
668 add it to either that list or the pending definition list. */
671 vms_check_external (decl, name, pending)
676 register struct extern_list *p, *p0;
678 for (p = extern_head; p; p = p->next)
679 if (!strcmp (p->name, name))
682 for (p = pending_head, p0 = 0; p; p0 = p, p = p->next)
683 if (!strcmp (p->name, name))
688 /* Was pending, but may now be defined; move it to other list. */
689 if (p == pending_head)
693 p->next = extern_head;
698 /* Not previously seen; create a new list entry. */
699 p = (struct extern_list *)permalloc ((long) sizeof (struct extern_list));
704 /* Save the size and section type and link to `pending' list. */
705 p->size = (DECL_SIZE (decl) == 0) ? 0 :
706 TREE_INT_CST_LOW (size_binop (CEIL_DIV_EXPR, DECL_SIZE (decl),
707 size_int (BITS_PER_UNIT)));
708 p->in_const = (TREE_READONLY (decl) && ! TREE_THIS_VOLATILE (decl));
710 p->next = pending_head;
715 /* Size and section type don't matter; link to `declared' list. */
716 p->size = p->in_const = 0; /* arbitrary init */
718 p->next = extern_head;
725 vms_flush_pending_externals (file)
728 register struct extern_list *p;
732 /* Move next pending declaration to the "done" list. */
734 pending_head = p->next;
735 p->next = extern_head;
738 /* Now output the actual declaration. */
743 fputs (".comm ", file);
744 assemble_name (file, p->name);
745 fprintf (file, ",%d\n", p->size);
748 #endif /* VMS_TARGET */
751 /* Additional support code for VMS host. */
753 #ifdef QSORT_WORKAROUND
755 Do not use VAXCRTL's qsort() due to a severe bug: once you've
756 sorted something which has a size that's an exact multiple of 4
757 and is longword aligned, you cannot safely sort anything which
758 is either not a multiple of 4 in size or not longword aligned.
759 A static "move-by-longword" optimization flag inside qsort() is
760 never reset. This is known of affect VMS V4.6 through VMS V5.5-1,
761 and was finally fixed in VMS V5.5-2.
763 In this work-around an insertion sort is used for simplicity.
764 The qsort code from glibc should probably be used instead.
767 not_qsort (array, count, size, compare)
769 unsigned count, size;
773 if (size == sizeof (short))
776 register short *next, *prev;
777 short tmp, *base = array;
779 for (next = base, i = count - 1; i > 0; i--)
782 if ((*compare)(next, prev) < 0)
785 do *(prev + 1) = *prev;
786 while (--prev >= base ? (*compare)(&tmp, prev) < 0 : 0);
791 else if (size == sizeof (long))
794 register long *next, *prev;
795 long tmp, *base = array;
797 for (next = base, i = count - 1; i > 0; i--)
800 if ((*compare)(next, prev) < 0)
803 do *(prev + 1) = *prev;
804 while (--prev >= base ? (*compare)(&tmp, prev) < 0 : 0);
809 else /* arbitrary size */
812 extern void *alloca ();
815 register char *next, *prev, *tmp = alloca (size), *base = array;
817 for (next = base, i = count - 1; i > 0; i--)
818 { /* count-1 forward iterations */
819 prev = next, next += size; /* increment front pointer */
820 if ((*compare)(next, prev) < 0)
821 { /* found element out of order; move others up then re-insert */
822 memcpy (tmp, next, size); /* save smaller element */
823 do { memcpy (prev + size, prev, size); /* move larger elem. up */
824 prev -= size; /* decrement back pointer */
825 } while (prev >= base ? (*compare)(tmp, prev) < 0 : 0);
826 memcpy (prev + size, tmp, size); /* restore small element */
836 #endif /* QSORT_WORKAROUND */