1 ;; Predicate definitions for SPARC.
2 ;; Copyright (C) 2005, 2007, 2008, 2010 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 ;; Predicates for numerical constants.
22 ;; Return true if OP is the zero constant for MODE.
23 (define_predicate "const_zero_operand"
24 (and (match_code "const_int,const_double,const_vector")
25 (match_test "op == CONST0_RTX (mode)")))
27 ;; Return true if the integer representation of OP is
29 (define_predicate "const_all_ones_operand"
30 (match_code "const_int,const_double,const_vector")
32 if (GET_CODE (op) == CONST_INT && INTVAL (op) == -1)
34 #if HOST_BITS_PER_WIDE_INT == 32
35 if (GET_CODE (op) == CONST_DOUBLE
36 && GET_MODE (op) == VOIDmode
37 && CONST_DOUBLE_HIGH (op) == ~(HOST_WIDE_INT)0
38 && CONST_DOUBLE_LOW (op) == ~(HOST_WIDE_INT)0)
41 if (GET_CODE (op) == CONST_VECTOR)
43 int i, num_elem = CONST_VECTOR_NUNITS (op);
45 for (i = 0; i < num_elem; i++)
47 rtx n = CONST_VECTOR_ELT (op, i);
48 if (! const_all_ones_operand (n, mode))
56 ;; Return true if OP is the integer constant 4096.
57 (define_predicate "const_4096_operand"
58 (and (match_code "const_int")
59 (match_test "INTVAL (op) == 4096")))
61 ;; Return true if OP is a constant that is representable by a 13-bit
62 ;; signed field. This is an acceptable immediate operand for most
63 ;; 3-address instructions.
64 (define_predicate "small_int_operand"
65 (and (match_code "const_int")
66 (match_test "SPARC_SIMM13_P (INTVAL (op))")))
68 ;; Return true if OP is a constant operand for the umul instruction. That
69 ;; instruction sign-extends immediate values just like all other SPARC
70 ;; instructions, but interprets the extended result as an unsigned number.
71 (define_predicate "uns_small_int_operand"
72 (match_code "const_int,const_double")
74 #if HOST_BITS_PER_WIDE_INT == 32
75 return ((GET_CODE (op) == CONST_INT && (unsigned) INTVAL (op) < 0x1000)
76 || (GET_CODE (op) == CONST_DOUBLE
77 && CONST_DOUBLE_HIGH (op) == 0
78 && (unsigned) CONST_DOUBLE_LOW (op) - 0xFFFFF000 < 0x1000));
80 return (GET_CODE (op) == CONST_INT
81 && ((INTVAL (op) >= 0 && INTVAL (op) < 0x1000)
82 || (INTVAL (op) >= 0xFFFFF000
83 && INTVAL (op) <= 0xFFFFFFFF)));
87 ;; Return true if OP is a constant that can be loaded by the sethi instruction.
88 ;; The first test avoids emitting sethi to load zero for example.
89 (define_predicate "const_high_operand"
90 (and (match_code "const_int")
91 (and (not (match_operand 0 "small_int_operand"))
92 (match_test "SPARC_SETHI_P (INTVAL (op) & GET_MODE_MASK (mode))"))))
94 ;; Return true if OP is a constant whose 1's complement can be loaded by the
96 (define_predicate "const_compl_high_operand"
97 (and (match_code "const_int")
98 (and (not (match_operand 0 "small_int_operand"))
99 (match_test "SPARC_SETHI_P (~INTVAL (op) & GET_MODE_MASK (mode))"))))
101 ;; Return true if OP is a FP constant that needs to be loaded by the sethi/losum
102 ;; pair of instructions.
103 (define_predicate "fp_const_high_losum_operand"
104 (match_operand 0 "const_double_operand")
106 gcc_assert (mode == SFmode);
107 return fp_high_losum_p (op);
110 ;; Return true if OP is a const_double or const_vector.
111 (define_predicate "const_double_or_vector_operand"
112 (match_code "const_double,const_vector"))
114 ;; Return true if OP is Zero, or if the target is V7.
115 (define_predicate "zero_or_v7_operand"
116 (ior (match_test "op == const0_rtx")
117 (match_test "!TARGET_V8 && !TARGET_V9")))
119 ;; Predicates for symbolic constants.
121 ;; Return true if OP is either a symbol reference or a sum of a symbol
122 ;; reference and a constant.
123 (define_predicate "symbolic_operand"
124 (match_code "symbol_ref,label_ref,const")
126 enum machine_mode omode = GET_MODE (op);
128 if (omode != mode && omode != VOIDmode && mode != VOIDmode)
131 switch (GET_CODE (op))
134 return !SYMBOL_REF_TLS_MODEL (op);
141 return (((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
142 && !SYMBOL_REF_TLS_MODEL (XEXP (op, 0)))
143 || GET_CODE (XEXP (op, 0)) == LABEL_REF)
144 && GET_CODE (XEXP (op, 1)) == CONST_INT);
151 ;; Return true if OP is a symbolic operand for the TLS Global Dynamic model.
152 (define_predicate "tgd_symbolic_operand"
153 (and (match_code "symbol_ref")
154 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC")))
156 ;; Return true if OP is a symbolic operand for the TLS Local Dynamic model.
157 (define_predicate "tld_symbolic_operand"
158 (and (match_code "symbol_ref")
159 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
161 ;; Return true if OP is a symbolic operand for the TLS Initial Exec model.
162 (define_predicate "tie_symbolic_operand"
163 (and (match_code "symbol_ref")
164 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC")))
166 ;; Return true if OP is a symbolic operand for the TLS Local Exec model.
167 (define_predicate "tle_symbolic_operand"
168 (and (match_code "symbol_ref")
169 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC")))
171 ;; Return true if the operand is an argument used in generating PIC references
172 ;; in either the medium/low or embedded medium/anywhere code models on V9.
173 ;; Check for (const (minus (symbol_ref:GOT)
174 ;; (const (minus (label) (pc)))))
175 (define_predicate "medium_pic_operand"
178 /* Check for (const (minus (symbol_ref:GOT)
179 (const (minus (label) (pc))))). */
181 return GET_CODE (op) == MINUS
182 && GET_CODE (XEXP (op, 0)) == SYMBOL_REF
183 && GET_CODE (XEXP (op, 1)) == CONST
184 && GET_CODE (XEXP (XEXP (op, 1), 0)) == MINUS;
187 ;; Return true if OP is a LABEL_REF of mode MODE.
188 (define_predicate "label_ref_operand"
189 (and (match_code "label_ref")
190 (match_test "GET_MODE (op) == mode")))
192 ;; Return true if OP is a data segment reference. This includes the readonly
193 ;; data segment or, in other words, anything but the text segment.
194 ;; This is needed in the embedded medium/anywhere code model on V9. These
195 ;; values are accessed with EMBMEDANY_BASE_REG. */
196 (define_predicate "data_segment_operand"
197 (match_code "symbol_ref,plus,const")
199 switch (GET_CODE (op))
202 return ! SYMBOL_REF_FUNCTION_P (op);
204 /* Assume canonical format of symbol + constant.
207 return data_segment_operand (XEXP (op, 0), VOIDmode);
213 ;; Return true if OP is a text segment reference.
214 ;; This is needed in the embedded medium/anywhere code model on V9.
215 (define_predicate "text_segment_operand"
216 (match_code "label_ref,symbol_ref,plus,const")
218 switch (GET_CODE (op))
223 return SYMBOL_REF_FUNCTION_P (op);
225 /* Assume canonical format of symbol + constant.
228 return text_segment_operand (XEXP (op, 0), VOIDmode);
235 ;; Predicates for registers.
237 ;; Return true if OP is either the zero constant or a register.
238 (define_predicate "register_or_zero_operand"
239 (ior (match_operand 0 "register_operand")
240 (match_operand 0 "const_zero_operand")))
242 ;; Return true if OP is either the zero constant, the all-ones
243 ;; constant, or a register.
244 (define_predicate "register_or_zero_or_all_ones_operand"
245 (ior (match_operand 0 "register_or_zero_operand")
246 (match_operand 0 "const_all_ones_operand")))
248 ;; Return true if OP is a register operand in a floating point register.
249 (define_predicate "fp_register_operand"
250 (match_operand 0 "register_operand")
252 if (GET_CODE (op) == SUBREG)
253 op = SUBREG_REG (op); /* Possibly a MEM */
254 return REG_P (op) && SPARC_FP_REG_P (REGNO (op));
257 ;; Return true if OP is an integer register.
258 (define_special_predicate "int_register_operand"
259 (ior (match_test "register_operand (op, SImode)")
260 (match_test "TARGET_ARCH64 && register_operand (op, DImode)")))
262 ;; Return true if OP is a floating point condition code register.
263 (define_predicate "fcc_register_operand"
266 if (mode != VOIDmode && mode != GET_MODE (op))
269 && (GET_MODE (op) != CCFPmode && GET_MODE (op) != CCFPEmode))
272 #if 0 /* ??? 1 when %fcc0-3 are pseudos first. See gen_compare_reg(). */
273 if (reg_renumber == 0)
274 return REGNO (op) >= FIRST_PSEUDO_REGISTER;
275 return REGNO_OK_FOR_CCFP_P (REGNO (op));
277 return ((unsigned) REGNO (op) - SPARC_FIRST_V9_FCC_REG) < 4;
281 ;; Return true if OP is the floating point condition code register fcc0.
282 (define_predicate "fcc0_register_operand"
285 if (mode != VOIDmode && mode != GET_MODE (op))
288 && (GET_MODE (op) != CCFPmode && GET_MODE (op) != CCFPEmode))
291 return REGNO (op) == SPARC_FCC_REG;
294 ;; Return true if OP is an integer or floating point condition code register.
295 (define_predicate "icc_or_fcc_register_operand"
298 if (REGNO (op) == SPARC_ICC_REG)
300 if (mode != VOIDmode && mode != GET_MODE (op))
303 && GET_MODE (op) != CCmode && GET_MODE (op) != CCXmode)
309 return fcc_register_operand (op, mode);
313 ;; Predicates for arithmetic instructions.
315 ;; Return true if OP is a register, or is a constant that is representable
316 ;; by a 13-bit signed field. This is an acceptable operand for most
317 ;; 3-address instructions.
318 (define_predicate "arith_operand"
319 (ior (match_operand 0 "register_operand")
320 (match_operand 0 "small_int_operand")))
322 ;; 64-bit: Same as above.
323 ;; 32-bit: Return true if OP is a register, or is a constant that is
324 ;; representable by a couple of 13-bit signed fields. This is an
325 ;; acceptable operand for most 3-address splitters.
326 (define_predicate "arith_double_operand"
327 (match_code "const_int,const_double,reg,subreg")
329 bool arith_simple_operand = arith_operand (op, mode);
330 HOST_WIDE_INT m1, m2;
332 if (TARGET_ARCH64 || arith_simple_operand)
333 return arith_simple_operand;
335 #if HOST_BITS_PER_WIDE_INT == 32
336 if (GET_CODE (op) != CONST_DOUBLE)
338 m1 = CONST_DOUBLE_LOW (op);
339 m2 = CONST_DOUBLE_HIGH (op);
341 if (GET_CODE (op) != CONST_INT)
343 m1 = trunc_int_for_mode (INTVAL (op), SImode);
344 m2 = trunc_int_for_mode (INTVAL (op) >> 32, SImode);
347 return SPARC_SIMM13_P (m1) && SPARC_SIMM13_P (m2);
350 ;; Return true if OP is suitable as second operand for add/sub.
351 (define_predicate "arith_add_operand"
352 (ior (match_operand 0 "arith_operand")
353 (match_operand 0 "const_4096_operand")))
355 ;; Return true if OP is suitable as second double operand for add/sub.
356 (define_predicate "arith_double_add_operand"
357 (match_code "const_int,const_double,reg,subreg")
359 bool _arith_double_operand = arith_double_operand (op, mode);
361 if (_arith_double_operand)
364 return TARGET_ARCH64 && const_4096_operand (op, mode);
367 ;; Return true if OP is a register, or is a CONST_INT that can fit in a
368 ;; signed 10-bit immediate field. This is an acceptable SImode operand for
369 ;; the movrcc instructions.
370 (define_predicate "arith10_operand"
371 (ior (match_operand 0 "register_operand")
372 (and (match_code "const_int")
373 (match_test "SPARC_SIMM10_P (INTVAL (op))"))))
375 ;; Return true if OP is a register, or is a CONST_INT that can fit in a
376 ;; signed 11-bit immediate field. This is an acceptable SImode operand for
377 ;; the movcc instructions.
378 (define_predicate "arith11_operand"
379 (ior (match_operand 0 "register_operand")
380 (and (match_code "const_int")
381 (match_test "SPARC_SIMM11_P (INTVAL (op))"))))
383 ;; Return true if OP is a register or a constant for the umul instruction.
384 (define_predicate "uns_arith_operand"
385 (ior (match_operand 0 "register_operand")
386 (match_operand 0 "uns_small_int_operand")))
389 ;; Predicates for miscellaneous instructions.
391 ;; Return true if OP is valid for the lhs of a comparison insn.
392 (define_predicate "compare_operand"
393 (match_code "reg,subreg,zero_extract")
395 if (GET_CODE (op) == ZERO_EXTRACT)
396 return (register_operand (XEXP (op, 0), mode)
397 && small_int_operand (XEXP (op, 1), mode)
398 && small_int_operand (XEXP (op, 2), mode)
399 /* This matches cmp_zero_extract. */
401 && INTVAL (XEXP (op, 2)) > 19)
402 /* This matches cmp_zero_extract_sp64. */
405 && INTVAL (XEXP (op, 2)) > 51)));
407 return register_operand (op, mode);
410 ;; Return true if OP is a valid operand for the source of a move insn.
411 (define_predicate "input_operand"
412 (match_code "const_int,const_double,const_vector,reg,subreg,mem")
414 enum mode_class mclass;
416 /* If both modes are non-void they must be the same. */
417 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
420 mclass = GET_MODE_CLASS (mode);
422 /* Allow any 1-instruction integer constant. */
423 if (mclass == MODE_INT
424 && (small_int_operand (op, mode) || const_high_operand (op, mode)))
427 /* If 32-bit mode and this is a DImode constant, allow it
428 so that the splits can be generated. */
431 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
434 if (mclass == MODE_FLOAT && GET_CODE (op) == CONST_DOUBLE)
437 if (mclass == MODE_VECTOR_INT && GET_CODE (op) == CONST_VECTOR
438 && (const_zero_operand (op, mode)
439 || const_all_ones_operand (op, mode)))
442 if (register_operand (op, mode))
445 /* If this is a SUBREG, look inside so that we handle paradoxical ones. */
446 if (GET_CODE (op) == SUBREG)
447 op = SUBREG_REG (op);
449 /* Check for valid MEM forms. */
450 if (GET_CODE (op) == MEM)
451 return memory_address_p (mode, XEXP (op, 0));
456 ;; Return true if OP is an address suitable for a call insn.
457 ;; Call insn on SPARC can take a PC-relative constant address
458 ;; or any regular memory address.
459 (define_predicate "call_address_operand"
460 (ior (match_operand 0 "symbolic_operand")
461 (match_test "memory_address_p (Pmode, op)")))
463 ;; Return true if OP is an operand suitable for a call insn.
464 (define_predicate "call_operand"
465 (and (match_code "mem")
466 (match_test "call_address_operand (XEXP (op, 0), mode)")))
469 ;; Predicates for operators.
471 ;; Return true if OP is a comparison operator. This allows the use of
472 ;; MATCH_OPERATOR to recognize all the branch insns.
473 (define_predicate "noov_compare_operator"
474 (match_code "ne,eq,ge,gt,le,lt,geu,gtu,leu,ltu")
476 enum rtx_code code = GET_CODE (op);
477 if (GET_MODE (XEXP (op, 0)) == CC_NOOVmode
478 || GET_MODE (XEXP (op, 0)) == CCX_NOOVmode)
479 /* These are the only branches which work with CC_NOOVmode. */
480 return (code == EQ || code == NE || code == GE || code == LT);
484 ;; Return true if OP is a 64-bit comparison operator. This allows the use of
485 ;; MATCH_OPERATOR to recognize all the branch insns.
486 (define_predicate "noov_compare64_operator"
487 (and (match_code "ne,eq,ge,gt,le,lt,geu,gtu,leu,ltu")
488 (match_test "TARGET_V9"))
490 enum rtx_code code = GET_CODE (op);
491 if (GET_MODE (XEXP (op, 0)) == CCX_NOOVmode)
492 /* These are the only branches which work with CCX_NOOVmode. */
493 return (code == EQ || code == NE || code == GE || code == LT);
494 return (GET_MODE (XEXP (op, 0)) == CCXmode);
497 ;; Return true if OP is a comparison operator suitable for use in V9
498 ;; conditional move or branch on register contents instructions.
499 (define_predicate "v9_register_compare_operator"
500 (match_code "eq,ne,ge,lt,le,gt"))
502 ;; Return true if OP is an operator which can set the condition codes
503 ;; explicitly. We do not include PLUS and MINUS because these
504 ;; require CC_NOOVmode, which we handle explicitly.
505 (define_predicate "cc_arith_operator"
506 (match_code "and,ior,xor"))
508 ;; Return true if OP is an operator which can bitwise complement its
509 ;; second operand and set the condition codes explicitly.
510 ;; XOR is not here because combine canonicalizes (xor (not ...) ...)
511 ;; and (xor ... (not ...)) to (not (xor ...)). */
512 (define_predicate "cc_arith_not_operator"
513 (match_code "and,ior"))