1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 #include "coretypes.h"
32 #include "hard-reg-set.h"
34 #include "insn-config.h"
35 #include "conditions.h"
37 #include "insn-attr.h"
45 #include "basic-block.h"
46 #include "integrate.h"
49 #include "target-def.h"
51 #include "langhooks.h"
53 #include "tree-gimple.h"
55 /* Machine-specific symbol_ref flags. */
56 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
59 static bool s390_assemble_integer (rtx, unsigned int, int);
60 static void s390_encode_section_info (tree, rtx, int);
61 static bool s390_cannot_force_const_mem (rtx);
62 static rtx s390_delegitimize_address (rtx);
63 static bool s390_return_in_memory (tree, tree);
64 static void s390_init_builtins (void);
65 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
66 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
68 static enum attr_type s390_safe_attr_type (rtx);
70 static int s390_adjust_cost (rtx, rtx, rtx, int);
71 static int s390_adjust_priority (rtx, int);
72 static int s390_issue_rate (void);
73 static int s390_first_cycle_multipass_dfa_lookahead (void);
74 static bool s390_rtx_costs (rtx, int, int, int *);
75 static int s390_address_cost (rtx);
76 static void s390_reorg (void);
77 static bool s390_valid_pointer_mode (enum machine_mode);
78 static tree s390_build_builtin_va_list (void);
79 static tree s390_gimplify_va_arg (tree, tree, tree *, tree *);
80 static bool s390_function_ok_for_sibcall (tree, tree);
81 static bool s390_call_saved_register_used (tree);
82 static bool s390_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode mode,
85 #undef TARGET_ASM_ALIGNED_HI_OP
86 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
87 #undef TARGET_ASM_ALIGNED_DI_OP
88 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
89 #undef TARGET_ASM_INTEGER
90 #define TARGET_ASM_INTEGER s390_assemble_integer
92 #undef TARGET_ASM_OPEN_PAREN
93 #define TARGET_ASM_OPEN_PAREN ""
95 #undef TARGET_ASM_CLOSE_PAREN
96 #define TARGET_ASM_CLOSE_PAREN ""
98 #undef TARGET_ENCODE_SECTION_INFO
99 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
102 #undef TARGET_HAVE_TLS
103 #define TARGET_HAVE_TLS true
105 #undef TARGET_CANNOT_FORCE_CONST_MEM
106 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
108 #undef TARGET_DELEGITIMIZE_ADDRESS
109 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
111 #undef TARGET_RETURN_IN_MEMORY
112 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
114 #undef TARGET_INIT_BUILTINS
115 #define TARGET_INIT_BUILTINS s390_init_builtins
116 #undef TARGET_EXPAND_BUILTIN
117 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
119 #undef TARGET_ASM_OUTPUT_MI_THUNK
120 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
121 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
122 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
124 #undef TARGET_SCHED_ADJUST_COST
125 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
126 #undef TARGET_SCHED_ADJUST_PRIORITY
127 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
128 #undef TARGET_SCHED_ISSUE_RATE
129 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
130 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
131 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
133 #undef TARGET_RTX_COSTS
134 #define TARGET_RTX_COSTS s390_rtx_costs
135 #undef TARGET_ADDRESS_COST
136 #define TARGET_ADDRESS_COST s390_address_cost
138 #undef TARGET_MACHINE_DEPENDENT_REORG
139 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
141 #undef TARGET_VALID_POINTER_MODE
142 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
144 #undef TARGET_BUILD_BUILTIN_VA_LIST
145 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
146 #undef TARGET_GIMPLIFY_VA_ARG_EXPR
147 #define TARGET_GIMPLIFY_VA_ARG_EXPR s390_gimplify_va_arg
149 #undef TARGET_PROMOTE_FUNCTION_ARGS
150 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
151 #undef TARGET_PROMOTE_FUNCTION_RETURN
152 #define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
153 #undef TARGET_PASS_BY_REFERENCE
154 #define TARGET_PASS_BY_REFERENCE s390_pass_by_reference
156 #undef TARGET_FUNCTION_OK_FOR_SIBCALL
157 #define TARGET_FUNCTION_OK_FOR_SIBCALL s390_function_ok_for_sibcall
159 struct gcc_target targetm = TARGET_INITIALIZER;
161 extern int reload_completed;
163 /* The alias set for prologue/epilogue register save/restore. */
164 static int s390_sr_alias_set = 0;
166 /* Save information from a "cmpxx" operation until the branch or scc is
168 rtx s390_compare_op0, s390_compare_op1;
170 /* Structure used to hold the components of a S/390 memory
171 address. A legitimate address on S/390 is of the general
173 base + index + displacement
174 where any of the components is optional.
176 base and index are registers of the class ADDR_REGS,
177 displacement is an unsigned 12-bit immediate constant. */
187 /* Which cpu are we tuning for. */
188 enum processor_type s390_tune;
189 enum processor_flags s390_tune_flags;
190 /* Which instruction set architecture to use. */
191 enum processor_type s390_arch;
192 enum processor_flags s390_arch_flags;
194 /* Strings to hold which cpu and instruction set architecture to use. */
195 const char *s390_tune_string; /* for -mtune=<xxx> */
196 const char *s390_arch_string; /* for -march=<xxx> */
198 /* String to specify backchain mode. */
199 const char *s390_backchain_string = ""; /* "" no-backchain ,"1" backchain,
200 "2" kernel-backchain */
202 const char *s390_warn_framesize_string;
203 const char *s390_warn_dynamicstack_string;
204 const char *s390_stack_size_string;
205 const char *s390_stack_guard_string;
207 HOST_WIDE_INT s390_warn_framesize = 0;
208 bool s390_warn_dynamicstack_p = 0;
209 HOST_WIDE_INT s390_stack_size = 0;
210 HOST_WIDE_INT s390_stack_guard = 0;
212 /* The following structure is embedded in the machine
213 specific part of struct function. */
215 struct s390_frame_layout GTY (())
217 /* Offset within stack frame. */
218 HOST_WIDE_INT gprs_offset;
219 HOST_WIDE_INT f0_offset;
220 HOST_WIDE_INT f4_offset;
221 HOST_WIDE_INT f8_offset;
222 HOST_WIDE_INT backchain_offset;
224 /* Number of first and last gpr to be saved, restored. */
226 int first_restore_gpr;
228 int last_restore_gpr;
230 /* Bits standing for floating point registers. Set, if the
231 respective register has to be saved. Starting with reg 16 (f0)
232 at the rightmost bit.
233 Bit 15 - 8 7 6 5 4 3 2 1 0
234 fpr 15 - 8 7 5 3 1 6 4 2 0
235 reg 31 - 24 23 22 21 20 19 18 17 16 */
236 unsigned int fpr_bitmap;
238 /* Number of floating point registers f8-f15 which must be saved. */
241 /* Set if return address needs to be saved. */
242 bool save_return_addr_p;
244 /* Set if backchain needs to be saved. */
245 bool save_backchain_p;
247 /* Size of stack frame. */
248 HOST_WIDE_INT frame_size;
251 /* Define the structure for the machine field in struct function. */
253 struct machine_function GTY(())
255 struct s390_frame_layout frame_layout;
257 /* Literal pool base register. */
260 /* Some local-dynamic TLS symbol name. */
261 const char *some_ld_name;
264 /* Few accessor macros for struct cfun->machine->s390_frame_layout. */
266 #define cfun_frame_layout (cfun->machine->frame_layout)
267 #define cfun_save_high_fprs_p (!!cfun_frame_layout.high_fprs)
268 #define cfun_gprs_save_area_size ((cfun_frame_layout.last_save_gpr - \
269 cfun_frame_layout.first_save_gpr + 1) * UNITS_PER_WORD)
270 #define cfun_set_fpr_bit(BITNUM) (cfun->machine->frame_layout.fpr_bitmap |= \
272 #define cfun_fpr_bit_p(BITNUM) (!!(cfun->machine->frame_layout.fpr_bitmap & \
275 static int s390_match_ccmode_set (rtx, enum machine_mode);
276 static int s390_branch_condition_mask (rtx);
277 static const char *s390_branch_condition_mnemonic (rtx, int);
278 static int check_mode (rtx, enum machine_mode *);
279 static int general_s_operand (rtx, enum machine_mode, int);
280 static int s390_short_displacement (rtx);
281 static int s390_decompose_address (rtx, struct s390_address *);
282 static rtx get_thread_pointer (void);
283 static rtx legitimize_tls_address (rtx, rtx);
284 static void print_shift_count_operand (FILE *, rtx);
285 static const char *get_some_local_dynamic_name (void);
286 static int get_some_local_dynamic_name_1 (rtx *, void *);
287 static int reg_used_in_mem_p (int, rtx);
288 static int addr_generation_dependency_p (rtx, rtx);
289 static int s390_split_branches (void);
290 static void annotate_constant_pool_refs (rtx *x);
291 static void find_constant_pool_ref (rtx, rtx *);
292 static void replace_constant_pool_ref (rtx *, rtx, rtx);
293 static rtx find_ltrel_base (rtx);
294 static void replace_ltrel_base (rtx *);
295 static void s390_optimize_prologue (bool);
296 static int find_unused_clobbered_reg (void);
297 static void s390_frame_area (int *, int *);
298 static void s390_register_info (int, int);
299 static void s390_frame_info (int, int);
300 static rtx save_fpr (rtx, int, int);
301 static rtx restore_fpr (rtx, int, int);
302 static rtx save_gprs (rtx, int, int, int);
303 static rtx restore_gprs (rtx, int, int, int);
304 static int s390_function_arg_size (enum machine_mode, tree);
305 static bool s390_function_arg_float (enum machine_mode, tree);
306 static struct machine_function * s390_init_machine_status (void);
308 /* Check whether integer displacement is in range. */
309 #define DISP_IN_RANGE(d) \
310 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
311 : ((d) >= 0 && (d) <= 4095))
313 /* Return true if SET either doesn't set the CC register, or else
314 the source and destination have matching CC modes and that
315 CC mode is at least as constrained as REQ_MODE. */
318 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
320 enum machine_mode set_mode;
322 if (GET_CODE (set) != SET)
325 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
328 set_mode = GET_MODE (SET_DEST (set));
342 if (req_mode != set_mode)
347 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
348 && req_mode != CCSRmode && req_mode != CCURmode)
354 if (req_mode != CCAmode)
362 return (GET_MODE (SET_SRC (set)) == set_mode);
365 /* Return true if every SET in INSN that sets the CC register
366 has source and destination with matching CC modes and that
367 CC mode is at least as constrained as REQ_MODE.
368 If REQ_MODE is VOIDmode, always return false. */
371 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
375 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
376 if (req_mode == VOIDmode)
379 if (GET_CODE (PATTERN (insn)) == SET)
380 return s390_match_ccmode_set (PATTERN (insn), req_mode);
382 if (GET_CODE (PATTERN (insn)) == PARALLEL)
383 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
385 rtx set = XVECEXP (PATTERN (insn), 0, i);
386 if (GET_CODE (set) == SET)
387 if (!s390_match_ccmode_set (set, req_mode))
394 /* If a test-under-mask instruction can be used to implement
395 (compare (and ... OP1) OP2), return the CC mode required
396 to do that. Otherwise, return VOIDmode.
397 MIXED is true if the instruction can distinguish between
398 CC1 and CC2 for mixed selected bits (TMxx), it is false
399 if the instruction cannot (TM). */
402 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
406 /* ??? Fixme: should work on CONST_DOUBLE as well. */
407 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
410 /* Selected bits all zero: CC0. */
411 if (INTVAL (op2) == 0)
414 /* Selected bits all one: CC3. */
415 if (INTVAL (op2) == INTVAL (op1))
418 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
421 bit1 = exact_log2 (INTVAL (op2));
422 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
423 if (bit0 != -1 && bit1 != -1)
424 return bit0 > bit1 ? CCT1mode : CCT2mode;
430 /* Given a comparison code OP (EQ, NE, etc.) and the operands
431 OP0 and OP1 of a COMPARE, return the mode to be used for the
435 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
441 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
442 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
444 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
445 || GET_CODE (op1) == NEG)
446 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
449 if (GET_CODE (op0) == AND)
451 /* Check whether we can potentially do it via TM. */
452 enum machine_mode ccmode;
453 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
454 if (ccmode != VOIDmode)
456 /* Relax CCTmode to CCZmode to allow fall-back to AND
457 if that turns out to be beneficial. */
458 return ccmode == CCTmode ? CCZmode : ccmode;
462 if (register_operand (op0, HImode)
463 && GET_CODE (op1) == CONST_INT
464 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
466 if (register_operand (op0, QImode)
467 && GET_CODE (op1) == CONST_INT
468 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
477 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
478 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
480 if (INTVAL (XEXP((op0), 1)) < 0)
493 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
494 && GET_CODE (op1) != CONST_INT)
500 if (GET_CODE (op0) == PLUS
501 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
504 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
505 && GET_CODE (op1) != CONST_INT)
511 if (GET_CODE (op0) == MINUS
512 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
515 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
516 && GET_CODE (op1) != CONST_INT)
525 /* Replace the comparison OP0 CODE OP1 by a semantically equivalent one
526 that we can implement more efficiently. */
529 s390_canonicalize_comparison (enum rtx_code *code, rtx *op0, rtx *op1)
531 /* Convert ZERO_EXTRACT back to AND to enable TM patterns. */
532 if ((*code == EQ || *code == NE)
533 && *op1 == const0_rtx
534 && GET_CODE (*op0) == ZERO_EXTRACT
535 && GET_CODE (XEXP (*op0, 1)) == CONST_INT
536 && GET_CODE (XEXP (*op0, 2)) == CONST_INT
537 && SCALAR_INT_MODE_P (GET_MODE (XEXP (*op0, 0))))
539 rtx inner = XEXP (*op0, 0);
540 HOST_WIDE_INT modesize = GET_MODE_BITSIZE (GET_MODE (inner));
541 HOST_WIDE_INT len = INTVAL (XEXP (*op0, 1));
542 HOST_WIDE_INT pos = INTVAL (XEXP (*op0, 2));
544 if (len > 0 && len < modesize
545 && pos >= 0 && pos + len <= modesize
546 && modesize <= HOST_BITS_PER_WIDE_INT)
548 unsigned HOST_WIDE_INT block;
549 block = ((unsigned HOST_WIDE_INT) 1 << len) - 1;
550 block <<= modesize - pos - len;
552 *op0 = gen_rtx_AND (GET_MODE (inner), inner,
553 gen_int_mode (block, GET_MODE (inner)));
557 /* Narrow AND of memory against immediate to enable TM. */
558 if ((*code == EQ || *code == NE)
559 && *op1 == const0_rtx
560 && GET_CODE (*op0) == AND
561 && GET_CODE (XEXP (*op0, 1)) == CONST_INT
562 && SCALAR_INT_MODE_P (GET_MODE (XEXP (*op0, 0))))
564 rtx inner = XEXP (*op0, 0);
565 rtx mask = XEXP (*op0, 1);
567 /* Ignore paradoxical SUBREGs if all extra bits are masked out. */
568 if (GET_CODE (inner) == SUBREG
569 && SCALAR_INT_MODE_P (GET_MODE (SUBREG_REG (inner)))
570 && (GET_MODE_SIZE (GET_MODE (inner))
571 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (inner))))
573 & GET_MODE_MASK (GET_MODE (inner))
574 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (inner))))
576 inner = SUBREG_REG (inner);
578 /* Do not change volatile MEMs. */
579 if (MEM_P (inner) && !MEM_VOLATILE_P (inner))
581 int part = s390_single_part (XEXP (*op0, 1),
582 GET_MODE (inner), QImode, 0);
585 mask = gen_int_mode (s390_extract_part (mask, QImode, 0), QImode);
586 inner = adjust_address_nv (inner, QImode, part);
587 *op0 = gen_rtx_AND (QImode, inner, mask);
592 /* Narrow comparisons against 0xffff to HImode if possible. */
594 if ((*code == EQ || *code == NE)
595 && GET_CODE (*op1) == CONST_INT
596 && INTVAL (*op1) == 0xffff
597 && SCALAR_INT_MODE_P (GET_MODE (*op0))
598 && (nonzero_bits (*op0, GET_MODE (*op0))
599 & ~(unsigned HOST_WIDE_INT) 0xffff) == 0)
601 *op0 = gen_lowpart (HImode, *op0);
606 /* Emit a compare instruction suitable to implement the comparison
607 OP0 CODE OP1. Return the correct condition RTL to be placed in
608 the IF_THEN_ELSE of the conditional branch testing the result. */
611 s390_emit_compare (enum rtx_code code, rtx op0, rtx op1)
613 enum machine_mode mode = s390_select_ccmode (code, op0, op1);
614 rtx cc = gen_rtx_REG (mode, CC_REGNUM);
616 emit_insn (gen_rtx_SET (VOIDmode, cc, gen_rtx_COMPARE (mode, op0, op1)));
617 return gen_rtx_fmt_ee (code, VOIDmode, cc, const0_rtx);
620 /* Emit a jump instruction to TARGET. If COND is NULL_RTX, emit an
621 unconditional jump, else a conditional jump under condition COND. */
624 s390_emit_jump (rtx target, rtx cond)
628 target = gen_rtx_LABEL_REF (VOIDmode, target);
630 target = gen_rtx_IF_THEN_ELSE (VOIDmode, cond, target, pc_rtx);
632 insn = gen_rtx_SET (VOIDmode, pc_rtx, target);
633 emit_jump_insn (insn);
636 /* Return nonzero if OP is a valid comparison operator
637 for an ALC condition in mode MODE. */
640 s390_alc_comparison (rtx op, enum machine_mode mode)
642 if (mode != VOIDmode && mode != GET_MODE (op))
645 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
648 if (!COMPARISON_P (op))
651 if (GET_CODE (XEXP (op, 0)) != REG
652 || REGNO (XEXP (op, 0)) != CC_REGNUM
653 || XEXP (op, 1) != const0_rtx)
656 switch (GET_MODE (XEXP (op, 0)))
659 return GET_CODE (op) == LTU;
662 return GET_CODE (op) == LEU;
665 return GET_CODE (op) == GEU;
668 return GET_CODE (op) == GTU;
671 return GET_CODE (op) == LTU;
674 return GET_CODE (op) == UNGT;
677 return GET_CODE (op) == UNLT;
684 /* Return nonzero if OP is a valid comparison operator
685 for an SLB condition in mode MODE. */
688 s390_slb_comparison (rtx op, enum machine_mode mode)
690 if (mode != VOIDmode && mode != GET_MODE (op))
693 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
696 if (!COMPARISON_P (op))
699 if (GET_CODE (XEXP (op, 0)) != REG
700 || REGNO (XEXP (op, 0)) != CC_REGNUM
701 || XEXP (op, 1) != const0_rtx)
704 switch (GET_MODE (XEXP (op, 0)))
707 return GET_CODE (op) == GEU;
710 return GET_CODE (op) == GTU;
713 return GET_CODE (op) == LTU;
716 return GET_CODE (op) == LEU;
719 return GET_CODE (op) == GEU;
722 return GET_CODE (op) == LE;
725 return GET_CODE (op) == GE;
732 /* Return branch condition mask to implement a branch
733 specified by CODE. */
736 s390_branch_condition_mask (rtx code)
738 const int CC0 = 1 << 3;
739 const int CC1 = 1 << 2;
740 const int CC2 = 1 << 1;
741 const int CC3 = 1 << 0;
743 if (GET_CODE (XEXP (code, 0)) != REG
744 || REGNO (XEXP (code, 0)) != CC_REGNUM
745 || XEXP (code, 1) != const0_rtx)
748 switch (GET_MODE (XEXP (code, 0)))
751 switch (GET_CODE (code))
754 case NE: return CC1 | CC2 | CC3;
761 switch (GET_CODE (code))
764 case NE: return CC0 | CC2 | CC3;
771 switch (GET_CODE (code))
774 case NE: return CC0 | CC1 | CC3;
781 switch (GET_CODE (code))
784 case NE: return CC0 | CC1 | CC2;
791 switch (GET_CODE (code))
793 case EQ: return CC0 | CC2;
794 case NE: return CC1 | CC3;
801 switch (GET_CODE (code))
803 case LTU: return CC2 | CC3; /* carry */
804 case GEU: return CC0 | CC1; /* no carry */
811 switch (GET_CODE (code))
813 case GTU: return CC0 | CC1; /* borrow */
814 case LEU: return CC2 | CC3; /* no borrow */
821 switch (GET_CODE (code))
823 case EQ: return CC0 | CC2;
824 case NE: return CC1 | CC3;
825 case LTU: return CC1;
826 case GTU: return CC3;
827 case LEU: return CC1 | CC2;
828 case GEU: return CC2 | CC3;
834 switch (GET_CODE (code))
837 case NE: return CC1 | CC2 | CC3;
838 case LTU: return CC1;
839 case GTU: return CC2;
840 case LEU: return CC0 | CC1;
841 case GEU: return CC0 | CC2;
848 switch (GET_CODE (code))
851 case NE: return CC2 | CC1 | CC3;
852 case LTU: return CC2;
853 case GTU: return CC1;
854 case LEU: return CC0 | CC2;
855 case GEU: return CC0 | CC1;
862 switch (GET_CODE (code))
865 case NE: return CC1 | CC2 | CC3;
866 case LT: return CC1 | CC3;
868 case LE: return CC0 | CC1 | CC3;
869 case GE: return CC0 | CC2;
876 switch (GET_CODE (code))
879 case NE: return CC1 | CC2 | CC3;
881 case GT: return CC2 | CC3;
882 case LE: return CC0 | CC1;
883 case GE: return CC0 | CC2 | CC3;
890 switch (GET_CODE (code))
893 case NE: return CC1 | CC2 | CC3;
896 case LE: return CC0 | CC1;
897 case GE: return CC0 | CC2;
898 case UNORDERED: return CC3;
899 case ORDERED: return CC0 | CC1 | CC2;
900 case UNEQ: return CC0 | CC3;
901 case UNLT: return CC1 | CC3;
902 case UNGT: return CC2 | CC3;
903 case UNLE: return CC0 | CC1 | CC3;
904 case UNGE: return CC0 | CC2 | CC3;
905 case LTGT: return CC1 | CC2;
912 switch (GET_CODE (code))
915 case NE: return CC2 | CC1 | CC3;
918 case LE: return CC0 | CC2;
919 case GE: return CC0 | CC1;
920 case UNORDERED: return CC3;
921 case ORDERED: return CC0 | CC2 | CC1;
922 case UNEQ: return CC0 | CC3;
923 case UNLT: return CC2 | CC3;
924 case UNGT: return CC1 | CC3;
925 case UNLE: return CC0 | CC2 | CC3;
926 case UNGE: return CC0 | CC1 | CC3;
927 case LTGT: return CC2 | CC1;
938 /* If INV is false, return assembler mnemonic string to implement
939 a branch specified by CODE. If INV is true, return mnemonic
940 for the corresponding inverted branch. */
943 s390_branch_condition_mnemonic (rtx code, int inv)
945 static const char *const mnemonic[16] =
947 NULL, "o", "h", "nle",
948 "l", "nhe", "lh", "ne",
949 "e", "nlh", "he", "nl",
950 "le", "nh", "no", NULL
953 int mask = s390_branch_condition_mask (code);
958 if (mask < 1 || mask > 14)
961 return mnemonic[mask];
964 /* Return the part of op which has a value different from def.
965 The size of the part is determined by mode.
966 Use this function only if you already know that op really
967 contains such a part. */
969 unsigned HOST_WIDE_INT
970 s390_extract_part (rtx op, enum machine_mode mode, int def)
972 unsigned HOST_WIDE_INT value = 0;
973 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
974 int part_bits = GET_MODE_BITSIZE (mode);
975 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
978 for (i = 0; i < max_parts; i++)
981 value = (unsigned HOST_WIDE_INT) INTVAL (op);
985 if ((value & part_mask) != (def & part_mask))
986 return value & part_mask;
992 /* If OP is an integer constant of mode MODE with exactly one
993 part of mode PART_MODE unequal to DEF, return the number of that
994 part. Otherwise, return -1. */
997 s390_single_part (rtx op,
998 enum machine_mode mode,
999 enum machine_mode part_mode,
1002 unsigned HOST_WIDE_INT value = 0;
1003 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
1004 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
1007 if (GET_CODE (op) != CONST_INT)
1010 for (i = 0; i < n_parts; i++)
1013 value = (unsigned HOST_WIDE_INT) INTVAL (op);
1015 value >>= GET_MODE_BITSIZE (part_mode);
1017 if ((value & part_mask) != (def & part_mask))
1025 return part == -1 ? -1 : n_parts - 1 - part;
1028 /* Check whether we can (and want to) split a double-word
1029 move in mode MODE from SRC to DST into two single-word
1030 moves, moving the subword FIRST_SUBWORD first. */
1033 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
1035 /* Floating point registers cannot be split. */
1036 if (FP_REG_P (src) || FP_REG_P (dst))
1039 /* We don't need to split if operands are directly accessible. */
1040 if (s_operand (src, mode) || s_operand (dst, mode))
1043 /* Non-offsettable memory references cannot be split. */
1044 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
1045 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
1048 /* Moving the first subword must not clobber a register
1049 needed to move the second subword. */
1050 if (register_operand (dst, mode))
1052 rtx subreg = operand_subword (dst, first_subword, 0, mode);
1053 if (reg_overlap_mentioned_p (subreg, src))
1061 /* Change optimizations to be performed, depending on the
1064 LEVEL is the optimization level specified; 2 if `-O2' is
1065 specified, 1 if `-O' is specified, and 0 if neither is specified.
1067 SIZE is nonzero if `-Os' is specified and zero otherwise. */
1070 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
1072 /* ??? There are apparently still problems with -fcaller-saves. */
1073 flag_caller_saves = 0;
1075 /* By default, always emit DWARF-2 unwind info. This allows debugging
1076 without maintaining a stack frame back-chain. */
1077 flag_asynchronous_unwind_tables = 1;
1081 override_options (void)
1086 const char *const name; /* processor name or nickname. */
1087 const enum processor_type processor;
1088 const enum processor_flags flags;
1090 const processor_alias_table[] =
1092 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
1093 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
1094 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
1095 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
1096 | PF_LONG_DISPLACEMENT},
1099 int const pta_size = ARRAY_SIZE (processor_alias_table);
1101 /* Acquire a unique set number for our register saves and restores. */
1102 s390_sr_alias_set = new_alias_set ();
1104 /* Set up function hooks. */
1105 init_machine_status = s390_init_machine_status;
1107 /* Architecture mode defaults according to ABI. */
1108 if (!(target_flags_explicit & MASK_ZARCH))
1111 target_flags |= MASK_ZARCH;
1113 target_flags &= ~MASK_ZARCH;
1116 /* Determine processor architectural level. */
1117 if (!s390_arch_string)
1118 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
1120 for (i = 0; i < pta_size; i++)
1121 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
1123 s390_arch = processor_alias_table[i].processor;
1124 s390_arch_flags = processor_alias_table[i].flags;
1128 error ("Unknown cpu used in -march=%s.", s390_arch_string);
1130 /* Determine processor to tune for. */
1131 if (!s390_tune_string)
1133 s390_tune = s390_arch;
1134 s390_tune_flags = s390_arch_flags;
1135 s390_tune_string = s390_arch_string;
1139 for (i = 0; i < pta_size; i++)
1140 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
1142 s390_tune = processor_alias_table[i].processor;
1143 s390_tune_flags = processor_alias_table[i].flags;
1147 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
1150 /* Sanity checks. */
1151 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
1152 error ("z/Architecture mode not supported on %s.", s390_arch_string);
1153 if (TARGET_64BIT && !TARGET_ZARCH)
1154 error ("64-bit ABI not supported in ESA/390 mode.");
1156 if (s390_warn_framesize_string)
1158 if (sscanf (s390_warn_framesize_string, HOST_WIDE_INT_PRINT_DEC,
1159 &s390_warn_framesize) != 1)
1160 error ("invalid value for -mwarn-framesize");
1163 if (s390_warn_dynamicstack_string)
1164 s390_warn_dynamicstack_p = 1;
1166 if (s390_stack_size_string)
1168 if (sscanf (s390_stack_size_string, HOST_WIDE_INT_PRINT_DEC,
1169 &s390_stack_size) != 1)
1170 error ("invalid value for -mstack-size");
1172 if (exact_log2 (s390_stack_size) == -1)
1173 error ("stack size must be an exact power of 2");
1175 if (s390_stack_guard_string)
1177 if (sscanf (s390_stack_guard_string, HOST_WIDE_INT_PRINT_DEC,
1178 &s390_stack_guard) != 1)
1179 error ("invalid value for -mstack-guard");
1181 if (s390_stack_guard >= s390_stack_size)
1182 error ("stack size must be greater than the stack guard value");
1184 if (exact_log2 (s390_stack_guard) == -1)
1185 error ("stack guard value must be an exact power of 2");
1188 error ("-mstack-size implies use of -mstack-guard");
1191 if (s390_stack_guard_string && !s390_stack_size_string)
1192 error ("-mstack-guard implies use of -mstack-size");
1195 /* Map for smallest class containing reg regno. */
1197 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
1198 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1199 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1200 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1201 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1202 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1203 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1204 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1205 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1206 ADDR_REGS, NO_REGS, ADDR_REGS, ADDR_REGS
1209 /* Return attribute type of insn. */
1211 static enum attr_type
1212 s390_safe_attr_type (rtx insn)
1214 if (recog_memoized (insn) >= 0)
1215 return get_attr_type (insn);
1220 /* Return true if OP a (const_int 0) operand.
1221 OP is the current operation.
1222 MODE is the current operation mode. */
1225 const0_operand (register rtx op, enum machine_mode mode)
1227 return op == CONST0_RTX (mode);
1230 /* Return true if OP is constant.
1231 OP is the current operation.
1232 MODE is the current operation mode. */
1235 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1237 return CONSTANT_P (op);
1240 /* Return true if the mode of operand OP matches MODE.
1241 If MODE is set to VOIDmode, set it to the mode of OP. */
1244 check_mode (register rtx op, enum machine_mode *mode)
1246 if (*mode == VOIDmode)
1247 *mode = GET_MODE (op);
1250 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1256 /* Return true if OP a valid operand for the LARL instruction.
1257 OP is the current operation.
1258 MODE is the current operation mode. */
1261 larl_operand (register rtx op, enum machine_mode mode)
1263 if (! check_mode (op, &mode))
1266 /* Allow labels and local symbols. */
1267 if (GET_CODE (op) == LABEL_REF)
1269 if (GET_CODE (op) == SYMBOL_REF)
1270 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1271 && SYMBOL_REF_TLS_MODEL (op) == 0
1272 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1274 /* Everything else must have a CONST, so strip it. */
1275 if (GET_CODE (op) != CONST)
1279 /* Allow adding *even* in-range constants. */
1280 if (GET_CODE (op) == PLUS)
1282 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1283 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1285 #if HOST_BITS_PER_WIDE_INT > 32
1286 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1287 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1293 /* Labels and local symbols allowed here as well. */
1294 if (GET_CODE (op) == LABEL_REF)
1296 if (GET_CODE (op) == SYMBOL_REF)
1297 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1298 && SYMBOL_REF_TLS_MODEL (op) == 0
1299 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1301 /* Now we must have a @GOTENT offset or @PLT stub
1302 or an @INDNTPOFF TLS offset. */
1303 if (GET_CODE (op) == UNSPEC
1304 && XINT (op, 1) == UNSPEC_GOTENT)
1306 if (GET_CODE (op) == UNSPEC
1307 && XINT (op, 1) == UNSPEC_PLT)
1309 if (GET_CODE (op) == UNSPEC
1310 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1316 /* Helper routine to implement s_operand and s_imm_operand.
1317 OP is the current operation.
1318 MODE is the current operation mode.
1319 ALLOW_IMMEDIATE specifies whether immediate operands should
1320 be accepted or not. */
1323 general_s_operand (register rtx op, enum machine_mode mode,
1324 int allow_immediate)
1326 struct s390_address addr;
1328 /* Call general_operand first, so that we don't have to
1329 check for many special cases. */
1330 if (!general_operand (op, mode))
1333 /* Just like memory_operand, allow (subreg (mem ...))
1335 if (reload_completed
1336 && GET_CODE (op) == SUBREG
1337 && GET_CODE (SUBREG_REG (op)) == MEM)
1338 op = SUBREG_REG (op);
1340 switch (GET_CODE (op))
1342 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1343 is true and we are still before reload. */
1346 if (!allow_immediate || reload_completed)
1350 /* Memory operands are OK unless they already use an
1353 if (!s390_decompose_address (XEXP (op, 0), &addr))
1357 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1358 is true. This prevents compares between two literal pool
1359 entries from being accepted. */
1360 if (!allow_immediate
1361 && addr.base && REGNO (addr.base) == BASE_REGNUM)
1372 /* Return true if OP is a valid S-type operand.
1373 OP is the current operation.
1374 MODE is the current operation mode. */
1377 s_operand (register rtx op, enum machine_mode mode)
1379 return general_s_operand (op, mode, 0);
1382 /* Return true if OP is a valid S-type operand or an immediate
1383 operand that can be addressed as S-type operand by forcing
1384 it into the literal pool.
1385 OP is the current operation.
1386 MODE is the current operation mode. */
1389 s_imm_operand (register rtx op, enum machine_mode mode)
1391 return general_s_operand (op, mode, 1);
1394 /* Return true if OP a valid shift count operand.
1395 OP is the current operation.
1396 MODE is the current operation mode. */
1399 shift_count_operand (rtx op, enum machine_mode mode)
1401 HOST_WIDE_INT offset = 0;
1403 if (! check_mode (op, &mode))
1406 /* We can have an integer constant, an address register,
1407 or a sum of the two. Note that reload already checks
1408 that any register present is an address register, so
1409 we just check for any register here. */
1410 if (GET_CODE (op) == CONST_INT)
1412 offset = INTVAL (op);
1415 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1417 offset = INTVAL (XEXP (op, 1));
1420 while (op && GET_CODE (op) == SUBREG)
1421 op = SUBREG_REG (op);
1422 if (op && GET_CODE (op) != REG)
1425 /* Unfortunately we have to reject constants that are invalid
1426 for an address, or else reload will get confused. */
1427 if (!DISP_IN_RANGE (offset))
1433 /* Return true if DISP is a valid short displacement. */
1436 s390_short_displacement (rtx disp)
1438 /* No displacement is OK. */
1442 /* Integer displacement in range. */
1443 if (GET_CODE (disp) == CONST_INT)
1444 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1446 /* GOT offset is not OK, the GOT can be large. */
1447 if (GET_CODE (disp) == CONST
1448 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1449 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1452 /* All other symbolic constants are literal pool references,
1453 which are OK as the literal pool must be small. */
1454 if (GET_CODE (disp) == CONST)
1460 /* Return true if OP is a valid operand for a C constraint. */
1463 s390_extra_constraint_str (rtx op, int c, const char * str)
1465 struct s390_address addr;
1473 if (GET_CODE (op) != MEM)
1475 if (!s390_decompose_address (XEXP (op, 0), &addr))
1480 if (TARGET_LONG_DISPLACEMENT)
1482 if (!s390_short_displacement (addr.disp))
1488 if (GET_CODE (op) != MEM)
1491 if (TARGET_LONG_DISPLACEMENT)
1493 if (!s390_decompose_address (XEXP (op, 0), &addr))
1495 if (!s390_short_displacement (addr.disp))
1501 if (!TARGET_LONG_DISPLACEMENT)
1503 if (GET_CODE (op) != MEM)
1505 if (!s390_decompose_address (XEXP (op, 0), &addr))
1509 if (s390_short_displacement (addr.disp))
1514 if (!TARGET_LONG_DISPLACEMENT)
1516 if (GET_CODE (op) != MEM)
1518 /* Any invalid address here will be fixed up by reload,
1519 so accept it for the most generic constraint. */
1520 if (s390_decompose_address (XEXP (op, 0), &addr)
1521 && s390_short_displacement (addr.disp))
1526 if (TARGET_LONG_DISPLACEMENT)
1528 if (!s390_decompose_address (op, &addr))
1530 if (!s390_short_displacement (addr.disp))
1536 if (!TARGET_LONG_DISPLACEMENT)
1538 /* Any invalid address here will be fixed up by reload,
1539 so accept it for the most generic constraint. */
1540 if (s390_decompose_address (op, &addr)
1541 && s390_short_displacement (addr.disp))
1546 return shift_count_operand (op, VOIDmode);
1555 /* Return true if VALUE matches the constraint STR. */
1558 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1562 enum machine_mode mode, part_mode;
1572 return (unsigned int)value < 256;
1575 return (unsigned int)value < 4096;
1578 return value >= -32768 && value < 32768;
1581 return (TARGET_LONG_DISPLACEMENT ?
1582 (value >= -524288 && value <= 524287)
1583 : (value >= 0 && value <= 4095));
1585 return value == 2147483647;
1588 part = str[1] - '0';
1592 case 'H': part_mode = HImode; break;
1593 case 'Q': part_mode = QImode; break;
1599 case 'H': mode = HImode; break;
1600 case 'S': mode = SImode; break;
1601 case 'D': mode = DImode; break;
1607 case '0': def = 0; break;
1608 case 'F': def = -1; break;
1612 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1615 if (s390_single_part (GEN_INT (value), mode, part_mode, def) != part)
1627 /* Compute a (partial) cost for rtx X. Return true if the complete
1628 cost has been computed, and false if subexpressions should be
1629 scanned. In either case, *TOTAL contains the cost result. */
1632 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1637 if (GET_CODE (XEXP (x, 0)) == MINUS
1638 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1645 /* Force_const_mem does not work out of reload, because the
1646 saveable_obstack is set to reload_obstack, which does not
1647 live long enough. Because of this we cannot use force_const_mem
1648 in addsi3. This leads to problems with gen_add2_insn with a
1649 constant greater than a short. Because of that we give an
1650 addition of greater constants a cost of 3 (reload1.c 10096). */
1651 /* ??? saveable_obstack no longer exists. */
1652 if (outer_code == PLUS
1653 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1654 *total = COSTS_N_INSNS (3);
1675 *total = COSTS_N_INSNS (1);
1679 if (GET_MODE (XEXP (x, 0)) == DImode)
1680 *total = COSTS_N_INSNS (40);
1682 *total = COSTS_N_INSNS (7);
1689 *total = COSTS_N_INSNS (33);
1697 /* Return the cost of an address rtx ADDR. */
1700 s390_address_cost (rtx addr)
1702 struct s390_address ad;
1703 if (!s390_decompose_address (addr, &ad))
1706 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1709 /* Return true if OP is a valid operand for the BRAS instruction.
1710 OP is the current operation.
1711 MODE is the current operation mode. */
1714 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1716 register enum rtx_code code = GET_CODE (op);
1718 /* Allow SYMBOL_REFs. */
1719 if (code == SYMBOL_REF)
1722 /* Allow @PLT stubs. */
1724 && GET_CODE (XEXP (op, 0)) == UNSPEC
1725 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1730 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1731 otherwise return 0. */
1734 tls_symbolic_operand (register rtx op)
1736 if (GET_CODE (op) != SYMBOL_REF)
1738 return SYMBOL_REF_TLS_MODEL (op);
1741 /* Return true if OP is a load multiple operation. It is known to be a
1742 PARALLEL and the first section will be tested.
1743 OP is the current operation.
1744 MODE is the current operation mode. */
1747 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1749 enum machine_mode elt_mode;
1750 int count = XVECLEN (op, 0);
1751 unsigned int dest_regno;
1756 /* Perform a quick check so we don't blow up below. */
1758 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1759 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1760 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1763 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1764 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1765 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
1767 /* Check, is base, or base + displacement. */
1769 if (GET_CODE (src_addr) == REG)
1771 else if (GET_CODE (src_addr) == PLUS
1772 && GET_CODE (XEXP (src_addr, 0)) == REG
1773 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1775 off = INTVAL (XEXP (src_addr, 1));
1776 src_addr = XEXP (src_addr, 0);
1781 for (i = 1; i < count; i++)
1783 rtx elt = XVECEXP (op, 0, i);
1785 if (GET_CODE (elt) != SET
1786 || GET_CODE (SET_DEST (elt)) != REG
1787 || GET_MODE (SET_DEST (elt)) != elt_mode
1788 || REGNO (SET_DEST (elt)) != dest_regno + i
1789 || GET_CODE (SET_SRC (elt)) != MEM
1790 || GET_MODE (SET_SRC (elt)) != elt_mode
1791 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1792 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1793 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1794 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1795 != off + i * GET_MODE_SIZE (elt_mode))
1802 /* Return true if OP is a store multiple operation. It is known to be a
1803 PARALLEL and the first section will be tested.
1804 OP is the current operation.
1805 MODE is the current operation mode. */
1808 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1810 enum machine_mode elt_mode;
1811 int count = XVECLEN (op, 0);
1812 unsigned int src_regno;
1816 /* Perform a quick check so we don't blow up below. */
1818 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1819 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1820 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1823 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1824 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1825 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
1827 /* Check, is base, or base + displacement. */
1829 if (GET_CODE (dest_addr) == REG)
1831 else if (GET_CODE (dest_addr) == PLUS
1832 && GET_CODE (XEXP (dest_addr, 0)) == REG
1833 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1835 off = INTVAL (XEXP (dest_addr, 1));
1836 dest_addr = XEXP (dest_addr, 0);
1841 for (i = 1; i < count; i++)
1843 rtx elt = XVECEXP (op, 0, i);
1845 if (GET_CODE (elt) != SET
1846 || GET_CODE (SET_SRC (elt)) != REG
1847 || GET_MODE (SET_SRC (elt)) != elt_mode
1848 || REGNO (SET_SRC (elt)) != src_regno + i
1849 || GET_CODE (SET_DEST (elt)) != MEM
1850 || GET_MODE (SET_DEST (elt)) != elt_mode
1851 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1852 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1853 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1854 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1855 != off + i * GET_MODE_SIZE (elt_mode))
1862 /* Return true if OP contains a symbol reference */
1865 symbolic_reference_mentioned_p (rtx op)
1867 register const char *fmt;
1870 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1873 fmt = GET_RTX_FORMAT (GET_CODE (op));
1874 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1880 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1881 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1885 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1892 /* Return true if OP contains a reference to a thread-local symbol. */
1895 tls_symbolic_reference_mentioned_p (rtx op)
1897 register const char *fmt;
1900 if (GET_CODE (op) == SYMBOL_REF)
1901 return tls_symbolic_operand (op);
1903 fmt = GET_RTX_FORMAT (GET_CODE (op));
1904 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1910 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1911 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1915 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1923 /* Return true if OP is a legitimate general operand when
1924 generating PIC code. It is given that flag_pic is on
1925 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1928 legitimate_pic_operand_p (register rtx op)
1930 /* Accept all non-symbolic constants. */
1931 if (!SYMBOLIC_CONST (op))
1934 /* Reject everything else; must be handled
1935 via emit_symbolic_move. */
1939 /* Returns true if the constant value OP is a legitimate general operand.
1940 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1943 legitimate_constant_p (register rtx op)
1945 /* Accept all non-symbolic constants. */
1946 if (!SYMBOLIC_CONST (op))
1949 /* Accept immediate LARL operands. */
1950 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1953 /* Thread-local symbols are never legal constants. This is
1954 so that emit_call knows that computing such addresses
1955 might require a function call. */
1956 if (TLS_SYMBOLIC_CONST (op))
1959 /* In the PIC case, symbolic constants must *not* be
1960 forced into the literal pool. We accept them here,
1961 so that they will be handled by emit_symbolic_move. */
1965 /* All remaining non-PIC symbolic constants are
1966 forced into the literal pool. */
1970 /* Determine if it's legal to put X into the constant pool. This
1971 is not possible if X contains the address of a symbol that is
1972 not constant (TLS) or not known at final link time (PIC). */
1975 s390_cannot_force_const_mem (rtx x)
1977 switch (GET_CODE (x))
1981 /* Accept all non-symbolic constants. */
1985 /* Labels are OK iff we are non-PIC. */
1986 return flag_pic != 0;
1989 /* 'Naked' TLS symbol references are never OK,
1990 non-TLS symbols are OK iff we are non-PIC. */
1991 if (tls_symbolic_operand (x))
1994 return flag_pic != 0;
1997 return s390_cannot_force_const_mem (XEXP (x, 0));
2000 return s390_cannot_force_const_mem (XEXP (x, 0))
2001 || s390_cannot_force_const_mem (XEXP (x, 1));
2004 switch (XINT (x, 1))
2006 /* Only lt-relative or GOT-relative UNSPECs are OK. */
2007 case UNSPEC_LTREL_OFFSET:
2015 case UNSPEC_GOTNTPOFF:
2016 case UNSPEC_INDNTPOFF:
2029 /* Returns true if the constant value OP is a legitimate general
2030 operand during and after reload. The difference to
2031 legitimate_constant_p is that this function will not accept
2032 a constant that would need to be forced to the literal pool
2033 before it can be used as operand. */
2036 legitimate_reload_constant_p (register rtx op)
2038 /* Accept la(y) operands. */
2039 if (GET_CODE (op) == CONST_INT
2040 && DISP_IN_RANGE (INTVAL (op)))
2043 /* Accept l(g)hi operands. */
2044 if (GET_CODE (op) == CONST_INT
2045 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
2048 /* Accept lliXX operands. */
2050 && s390_single_part (op, DImode, HImode, 0) >= 0)
2053 /* Accept larl operands. */
2054 if (TARGET_CPU_ZARCH
2055 && larl_operand (op, VOIDmode))
2058 /* Everything else cannot be handled without reload. */
2062 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
2063 return the class of reg to actually use. */
2066 s390_preferred_reload_class (rtx op, enum reg_class class)
2068 /* This can happen if a floating point constant is being
2069 reloaded into an integer register. Leave well alone. */
2070 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
2071 && class != FP_REGS)
2074 switch (GET_CODE (op))
2076 /* Constants we cannot reload must be forced into the
2081 if (legitimate_reload_constant_p (op))
2086 /* If a symbolic constant or a PLUS is reloaded,
2087 it is most likely being used as an address, so
2088 prefer ADDR_REGS. If 'class' is not a superset
2089 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
2094 if (reg_class_subset_p (ADDR_REGS, class))
2106 /* Return the register class of a scratch register needed to
2107 load IN into a register of class CLASS in MODE.
2109 We need a temporary when loading a PLUS expression which
2110 is not a legitimate operand of the LOAD ADDRESS instruction. */
2113 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
2114 enum machine_mode mode, rtx in)
2116 if (s390_plus_operand (in, mode))
2122 /* Return the register class of a scratch register needed to
2123 store a register of class CLASS in MODE into OUT:
2125 We need a temporary when storing a double-word to a
2126 non-offsettable memory address. */
2129 s390_secondary_output_reload_class (enum reg_class class,
2130 enum machine_mode mode, rtx out)
2132 if ((TARGET_64BIT ? mode == TImode
2133 : (mode == DImode || mode == DFmode))
2134 && reg_classes_intersect_p (GENERAL_REGS, class)
2135 && GET_CODE (out) == MEM
2136 && !offsettable_memref_p (out)
2137 && !s_operand (out, VOIDmode))
2143 /* Return true if OP is a PLUS that is not a legitimate
2144 operand for the LA instruction.
2145 OP is the current operation.
2146 MODE is the current operation mode. */
2149 s390_plus_operand (register rtx op, enum machine_mode mode)
2151 if (!check_mode (op, &mode) || mode != Pmode)
2154 if (GET_CODE (op) != PLUS)
2157 if (legitimate_la_operand_p (op))
2163 /* Generate code to load SRC, which is PLUS that is not a
2164 legitimate operand for the LA instruction, into TARGET.
2165 SCRATCH may be used as scratch register. */
2168 s390_expand_plus_operand (register rtx target, register rtx src,
2169 register rtx scratch)
2172 struct s390_address ad;
2174 /* src must be a PLUS; get its two operands. */
2175 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
2178 /* Check if any of the two operands is already scheduled
2179 for replacement by reload. This can happen e.g. when
2180 float registers occur in an address. */
2181 sum1 = find_replacement (&XEXP (src, 0));
2182 sum2 = find_replacement (&XEXP (src, 1));
2183 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2185 /* If the address is already strictly valid, there's nothing to do. */
2186 if (!s390_decompose_address (src, &ad)
2187 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2188 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
2190 /* Otherwise, one of the operands cannot be an address register;
2191 we reload its value into the scratch register. */
2192 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
2194 emit_move_insn (scratch, sum1);
2197 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
2199 emit_move_insn (scratch, sum2);
2203 /* According to the way these invalid addresses are generated
2204 in reload.c, it should never happen (at least on s390) that
2205 *neither* of the PLUS components, after find_replacements
2206 was applied, is an address register. */
2207 if (sum1 == scratch && sum2 == scratch)
2213 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2216 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
2217 is only ever performed on addresses, so we can mark the
2218 sum as legitimate for LA in any case. */
2219 s390_load_address (target, src);
2223 /* Decompose a RTL expression ADDR for a memory address into
2224 its components, returned in OUT.
2226 Returns 0 if ADDR is not a valid memory address, nonzero
2227 otherwise. If OUT is NULL, don't return the components,
2228 but check for validity only.
2230 Note: Only addresses in canonical form are recognized.
2231 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2232 canonical form so that they will be recognized. */
2235 s390_decompose_address (register rtx addr, struct s390_address *out)
2237 HOST_WIDE_INT offset = 0;
2238 rtx base = NULL_RTX;
2239 rtx indx = NULL_RTX;
2240 rtx disp = NULL_RTX;
2242 int pointer = FALSE;
2243 int base_ptr = FALSE;
2244 int indx_ptr = FALSE;
2246 /* Decompose address into base + index + displacement. */
2248 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2251 else if (GET_CODE (addr) == PLUS)
2253 rtx op0 = XEXP (addr, 0);
2254 rtx op1 = XEXP (addr, 1);
2255 enum rtx_code code0 = GET_CODE (op0);
2256 enum rtx_code code1 = GET_CODE (op1);
2258 if (code0 == REG || code0 == UNSPEC)
2260 if (code1 == REG || code1 == UNSPEC)
2262 indx = op0; /* index + base */
2268 base = op0; /* base + displacement */
2273 else if (code0 == PLUS)
2275 indx = XEXP (op0, 0); /* index + base + disp */
2276 base = XEXP (op0, 1);
2287 disp = addr; /* displacement */
2289 /* Extract integer part of displacement. */
2293 if (GET_CODE (disp) == CONST_INT)
2295 offset = INTVAL (disp);
2298 else if (GET_CODE (disp) == CONST
2299 && GET_CODE (XEXP (disp, 0)) == PLUS
2300 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2302 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2303 disp = XEXP (XEXP (disp, 0), 0);
2307 /* Strip off CONST here to avoid special case tests later. */
2308 if (disp && GET_CODE (disp) == CONST)
2309 disp = XEXP (disp, 0);
2311 /* We can convert literal pool addresses to
2312 displacements by basing them off the base register. */
2313 if (disp && GET_CODE (disp) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (disp))
2315 /* Either base or index must be free to hold the base register. */
2317 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2319 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2323 /* Mark up the displacement. */
2324 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2325 UNSPEC_LTREL_OFFSET);
2328 /* Validate base register. */
2331 if (GET_CODE (base) == UNSPEC)
2332 switch (XINT (base, 1))
2336 disp = gen_rtx_UNSPEC (Pmode,
2337 gen_rtvec (1, XVECEXP (base, 0, 0)),
2338 UNSPEC_LTREL_OFFSET);
2342 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2345 case UNSPEC_LTREL_BASE:
2346 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2353 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2356 if (REGNO (base) == BASE_REGNUM
2357 || REGNO (base) == STACK_POINTER_REGNUM
2358 || REGNO (base) == FRAME_POINTER_REGNUM
2359 || ((reload_completed || reload_in_progress)
2360 && frame_pointer_needed
2361 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2362 || REGNO (base) == ARG_POINTER_REGNUM
2364 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2365 pointer = base_ptr = TRUE;
2368 /* Validate index register. */
2371 if (GET_CODE (indx) == UNSPEC)
2372 switch (XINT (indx, 1))
2376 disp = gen_rtx_UNSPEC (Pmode,
2377 gen_rtvec (1, XVECEXP (indx, 0, 0)),
2378 UNSPEC_LTREL_OFFSET);
2382 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2385 case UNSPEC_LTREL_BASE:
2386 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2393 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2396 if (REGNO (indx) == BASE_REGNUM
2397 || REGNO (indx) == STACK_POINTER_REGNUM
2398 || REGNO (indx) == FRAME_POINTER_REGNUM
2399 || ((reload_completed || reload_in_progress)
2400 && frame_pointer_needed
2401 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2402 || REGNO (indx) == ARG_POINTER_REGNUM
2404 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2405 pointer = indx_ptr = TRUE;
2408 /* Prefer to use pointer as base, not index. */
2409 if (base && indx && !base_ptr
2410 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2417 /* Validate displacement. */
2420 /* If the argument pointer or the return address pointer are involved,
2421 the displacement will change later anyway as the virtual registers get
2422 eliminated. This could make a valid displacement invalid, but it is
2423 more likely to make an invalid displacement valid, because we sometimes
2424 access the register save area via negative offsets to one of those
2426 Thus we don't check the displacement for validity here. If after
2427 elimination the displacement turns out to be invalid after all,
2428 this is fixed up by reload in any case. */
2429 if (base != arg_pointer_rtx
2430 && indx != arg_pointer_rtx
2431 && base != return_address_pointer_rtx
2432 && indx != return_address_pointer_rtx)
2433 if (!DISP_IN_RANGE (offset))
2438 /* All the special cases are pointers. */
2441 /* In the small-PIC case, the linker converts @GOT
2442 and @GOTNTPOFF offsets to possible displacements. */
2443 if (GET_CODE (disp) == UNSPEC
2444 && (XINT (disp, 1) == UNSPEC_GOT
2445 || XINT (disp, 1) == UNSPEC_GOTNTPOFF)
2452 /* Accept chunkified literal pool symbol references. */
2453 else if (GET_CODE (disp) == MINUS
2454 && GET_CODE (XEXP (disp, 0)) == LABEL_REF
2455 && GET_CODE (XEXP (disp, 1)) == LABEL_REF)
2460 /* Accept literal pool references. */
2461 else if (GET_CODE (disp) == UNSPEC
2462 && XINT (disp, 1) == UNSPEC_LTREL_OFFSET)
2464 orig_disp = gen_rtx_CONST (Pmode, disp);
2467 /* If we have an offset, make sure it does not
2468 exceed the size of the constant pool entry. */
2469 rtx sym = XVECEXP (disp, 0, 0);
2470 if (offset >= GET_MODE_SIZE (get_pool_mode (sym)))
2473 orig_disp = plus_constant (orig_disp, offset);
2488 out->disp = orig_disp;
2489 out->pointer = pointer;
2495 /* Return nonzero if ADDR is a valid memory address.
2496 STRICT specifies whether strict register checking applies. */
2499 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2500 register rtx addr, int strict)
2502 struct s390_address ad;
2503 if (!s390_decompose_address (addr, &ad))
2508 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2510 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2515 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2517 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2524 /* Return 1 if OP is a valid operand for the LA instruction.
2525 In 31-bit, we need to prove that the result is used as an
2526 address, as LA performs only a 31-bit addition. */
2529 legitimate_la_operand_p (register rtx op)
2531 struct s390_address addr;
2532 if (!s390_decompose_address (op, &addr))
2535 if (TARGET_64BIT || addr.pointer)
2541 /* Return 1 if it is valid *and* preferable to use LA to
2542 compute the sum of OP1 and OP2. */
2545 preferred_la_operand_p (rtx op1, rtx op2)
2547 struct s390_address addr;
2549 if (op2 != const0_rtx)
2550 op1 = gen_rtx_PLUS (Pmode, op1, op2);
2552 if (!s390_decompose_address (op1, &addr))
2554 if (addr.base && !REG_OK_FOR_BASE_STRICT_P (addr.base))
2556 if (addr.indx && !REG_OK_FOR_INDEX_STRICT_P (addr.indx))
2559 if (!TARGET_64BIT && !addr.pointer)
2565 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2566 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2572 /* Emit a forced load-address operation to load SRC into DST.
2573 This will use the LOAD ADDRESS instruction even in situations
2574 where legitimate_la_operand_p (SRC) returns false. */
2577 s390_load_address (rtx dst, rtx src)
2580 emit_move_insn (dst, src);
2582 emit_insn (gen_force_la_31 (dst, src));
2585 /* Return a legitimate reference for ORIG (an address) using the
2586 register REG. If REG is 0, a new pseudo is generated.
2588 There are two types of references that must be handled:
2590 1. Global data references must load the address from the GOT, via
2591 the PIC reg. An insn is emitted to do this load, and the reg is
2594 2. Static data references, constant pool addresses, and code labels
2595 compute the address as an offset from the GOT, whose base is in
2596 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2597 differentiate them from global data objects. The returned
2598 address is the PIC reg + an unspec constant.
2600 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2601 reg also appears in the address. */
2604 legitimize_pic_address (rtx orig, rtx reg)
2610 if (GET_CODE (addr) == LABEL_REF
2611 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2613 /* This is a local symbol. */
2614 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2616 /* Access local symbols PC-relative via LARL.
2617 This is the same as in the non-PIC case, so it is
2618 handled automatically ... */
2622 /* Access local symbols relative to the GOT. */
2624 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2626 if (reload_in_progress || reload_completed)
2627 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2629 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2630 addr = gen_rtx_CONST (Pmode, addr);
2631 addr = force_const_mem (Pmode, addr);
2632 emit_move_insn (temp, addr);
2634 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2637 emit_move_insn (reg, new);
2642 else if (GET_CODE (addr) == SYMBOL_REF)
2645 reg = gen_reg_rtx (Pmode);
2649 /* Assume GOT offset < 4k. This is handled the same way
2650 in both 31- and 64-bit code (@GOT). */
2652 if (reload_in_progress || reload_completed)
2653 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2655 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2656 new = gen_rtx_CONST (Pmode, new);
2657 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2658 new = gen_const_mem (Pmode, new);
2659 emit_move_insn (reg, new);
2662 else if (TARGET_CPU_ZARCH)
2664 /* If the GOT offset might be >= 4k, we determine the position
2665 of the GOT entry via a PC-relative LARL (@GOTENT). */
2667 rtx temp = gen_reg_rtx (Pmode);
2669 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2670 new = gen_rtx_CONST (Pmode, new);
2671 emit_move_insn (temp, new);
2673 new = gen_const_mem (Pmode, temp);
2674 emit_move_insn (reg, new);
2679 /* If the GOT offset might be >= 4k, we have to load it
2680 from the literal pool (@GOT). */
2682 rtx temp = gen_reg_rtx (Pmode);
2684 if (reload_in_progress || reload_completed)
2685 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2687 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2688 addr = gen_rtx_CONST (Pmode, addr);
2689 addr = force_const_mem (Pmode, addr);
2690 emit_move_insn (temp, addr);
2692 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2693 new = gen_const_mem (Pmode, new);
2694 emit_move_insn (reg, new);
2700 if (GET_CODE (addr) == CONST)
2702 addr = XEXP (addr, 0);
2703 if (GET_CODE (addr) == UNSPEC)
2705 if (XVECLEN (addr, 0) != 1)
2707 switch (XINT (addr, 1))
2709 /* If someone moved a GOT-relative UNSPEC
2710 out of the literal pool, force them back in. */
2713 new = force_const_mem (Pmode, orig);
2716 /* @GOT is OK as is if small. */
2719 new = force_const_mem (Pmode, orig);
2722 /* @GOTENT is OK as is. */
2726 /* @PLT is OK as is on 64-bit, must be converted to
2727 GOT-relative @PLTOFF on 31-bit. */
2729 if (!TARGET_CPU_ZARCH)
2731 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2733 if (reload_in_progress || reload_completed)
2734 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2736 addr = XVECEXP (addr, 0, 0);
2737 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2739 addr = gen_rtx_CONST (Pmode, addr);
2740 addr = force_const_mem (Pmode, addr);
2741 emit_move_insn (temp, addr);
2743 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2746 emit_move_insn (reg, new);
2752 /* Everything else cannot happen. */
2757 else if (GET_CODE (addr) != PLUS)
2760 if (GET_CODE (addr) == PLUS)
2762 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2763 /* Check first to see if this is a constant offset
2764 from a local symbol reference. */
2765 if ((GET_CODE (op0) == LABEL_REF
2766 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2767 && GET_CODE (op1) == CONST_INT)
2769 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2771 if (INTVAL (op1) & 1)
2773 /* LARL can't handle odd offsets, so emit a
2774 pair of LARL and LA. */
2775 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2777 if (!DISP_IN_RANGE (INTVAL (op1)))
2779 int even = INTVAL (op1) - 1;
2780 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2781 op0 = gen_rtx_CONST (Pmode, op0);
2785 emit_move_insn (temp, op0);
2786 new = gen_rtx_PLUS (Pmode, temp, op1);
2790 emit_move_insn (reg, new);
2796 /* If the offset is even, we can just use LARL.
2797 This will happen automatically. */
2802 /* Access local symbols relative to the GOT. */
2804 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2806 if (reload_in_progress || reload_completed)
2807 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2809 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2811 addr = gen_rtx_PLUS (Pmode, addr, op1);
2812 addr = gen_rtx_CONST (Pmode, addr);
2813 addr = force_const_mem (Pmode, addr);
2814 emit_move_insn (temp, addr);
2816 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2819 emit_move_insn (reg, new);
2825 /* Now, check whether it is a GOT relative symbol plus offset
2826 that was pulled out of the literal pool. Force it back in. */
2828 else if (GET_CODE (op0) == UNSPEC
2829 && GET_CODE (op1) == CONST_INT
2830 && XINT (op0, 1) == UNSPEC_GOTOFF)
2832 if (XVECLEN (op0, 0) != 1)
2835 new = force_const_mem (Pmode, orig);
2838 /* Otherwise, compute the sum. */
2841 base = legitimize_pic_address (XEXP (addr, 0), reg);
2842 new = legitimize_pic_address (XEXP (addr, 1),
2843 base == reg ? NULL_RTX : reg);
2844 if (GET_CODE (new) == CONST_INT)
2845 new = plus_constant (base, INTVAL (new));
2848 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2850 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2851 new = XEXP (new, 1);
2853 new = gen_rtx_PLUS (Pmode, base, new);
2856 if (GET_CODE (new) == CONST)
2857 new = XEXP (new, 0);
2858 new = force_operand (new, 0);
2865 /* Load the thread pointer into a register. */
2868 get_thread_pointer (void)
2872 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2873 tp = force_reg (Pmode, tp);
2874 mark_reg_pointer (tp, BITS_PER_WORD);
2879 /* Emit a tls call insn. The call target is the SYMBOL_REF stored
2880 in s390_tls_symbol which always refers to __tls_get_offset.
2881 The returned offset is written to RESULT_REG and an USE rtx is
2882 generated for TLS_CALL. */
2884 static GTY(()) rtx s390_tls_symbol;
2887 s390_emit_tls_call_insn (rtx result_reg, rtx tls_call)
2894 if (!s390_tls_symbol)
2895 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2897 insn = s390_emit_call (s390_tls_symbol, tls_call, result_reg,
2898 gen_rtx_REG (Pmode, RETURN_REGNUM));
2900 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), result_reg);
2901 CONST_OR_PURE_CALL_P (insn) = 1;
2904 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2905 this (thread-local) address. REG may be used as temporary. */
2908 legitimize_tls_address (rtx addr, rtx reg)
2910 rtx new, tls_call, temp, base, r2, insn;
2912 if (GET_CODE (addr) == SYMBOL_REF)
2913 switch (tls_symbolic_operand (addr))
2915 case TLS_MODEL_GLOBAL_DYNAMIC:
2917 r2 = gen_rtx_REG (Pmode, 2);
2918 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2919 new = gen_rtx_CONST (Pmode, tls_call);
2920 new = force_const_mem (Pmode, new);
2921 emit_move_insn (r2, new);
2922 s390_emit_tls_call_insn (r2, tls_call);
2923 insn = get_insns ();
2926 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2927 temp = gen_reg_rtx (Pmode);
2928 emit_libcall_block (insn, temp, r2, new);
2930 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2933 s390_load_address (reg, new);
2938 case TLS_MODEL_LOCAL_DYNAMIC:
2940 r2 = gen_rtx_REG (Pmode, 2);
2941 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2942 new = gen_rtx_CONST (Pmode, tls_call);
2943 new = force_const_mem (Pmode, new);
2944 emit_move_insn (r2, new);
2945 s390_emit_tls_call_insn (r2, tls_call);
2946 insn = get_insns ();
2949 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2950 temp = gen_reg_rtx (Pmode);
2951 emit_libcall_block (insn, temp, r2, new);
2953 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2954 base = gen_reg_rtx (Pmode);
2955 s390_load_address (base, new);
2957 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2958 new = gen_rtx_CONST (Pmode, new);
2959 new = force_const_mem (Pmode, new);
2960 temp = gen_reg_rtx (Pmode);
2961 emit_move_insn (temp, new);
2963 new = gen_rtx_PLUS (Pmode, base, temp);
2966 s390_load_address (reg, new);
2971 case TLS_MODEL_INITIAL_EXEC:
2974 /* Assume GOT offset < 4k. This is handled the same way
2975 in both 31- and 64-bit code. */
2977 if (reload_in_progress || reload_completed)
2978 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2980 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2981 new = gen_rtx_CONST (Pmode, new);
2982 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2983 new = gen_const_mem (Pmode, new);
2984 temp = gen_reg_rtx (Pmode);
2985 emit_move_insn (temp, new);
2987 else if (TARGET_CPU_ZARCH)
2989 /* If the GOT offset might be >= 4k, we determine the position
2990 of the GOT entry via a PC-relative LARL. */
2992 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2993 new = gen_rtx_CONST (Pmode, new);
2994 temp = gen_reg_rtx (Pmode);
2995 emit_move_insn (temp, new);
2997 new = gen_const_mem (Pmode, temp);
2998 temp = gen_reg_rtx (Pmode);
2999 emit_move_insn (temp, new);
3003 /* If the GOT offset might be >= 4k, we have to load it
3004 from the literal pool. */
3006 if (reload_in_progress || reload_completed)
3007 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
3009 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
3010 new = gen_rtx_CONST (Pmode, new);
3011 new = force_const_mem (Pmode, new);
3012 temp = gen_reg_rtx (Pmode);
3013 emit_move_insn (temp, new);
3015 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
3016 new = gen_const_mem (Pmode, new);
3018 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
3019 temp = gen_reg_rtx (Pmode);
3020 emit_insn (gen_rtx_SET (Pmode, temp, new));
3024 /* In position-dependent code, load the absolute address of
3025 the GOT entry from the literal pool. */
3027 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
3028 new = gen_rtx_CONST (Pmode, new);
3029 new = force_const_mem (Pmode, new);
3030 temp = gen_reg_rtx (Pmode);
3031 emit_move_insn (temp, new);
3034 new = gen_const_mem (Pmode, new);
3035 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
3036 temp = gen_reg_rtx (Pmode);
3037 emit_insn (gen_rtx_SET (Pmode, temp, new));
3040 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
3043 s390_load_address (reg, new);
3048 case TLS_MODEL_LOCAL_EXEC:
3049 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
3050 new = gen_rtx_CONST (Pmode, new);
3051 new = force_const_mem (Pmode, new);
3052 temp = gen_reg_rtx (Pmode);
3053 emit_move_insn (temp, new);
3055 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
3058 s390_load_address (reg, new);
3067 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
3069 switch (XINT (XEXP (addr, 0), 1))
3071 case UNSPEC_INDNTPOFF:
3072 if (TARGET_CPU_ZARCH)
3083 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3084 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3086 new = XEXP (XEXP (addr, 0), 0);
3087 if (GET_CODE (new) != SYMBOL_REF)
3088 new = gen_rtx_CONST (Pmode, new);
3090 new = legitimize_tls_address (new, reg);
3091 new = plus_constant (new, INTVAL (XEXP (XEXP (addr, 0), 1)));
3092 new = force_operand (new, 0);
3096 abort (); /* for now ... */
3101 /* Emit insns to move operands[1] into operands[0]. */
3104 emit_symbolic_move (rtx *operands)
3106 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
3108 if (GET_CODE (operands[0]) == MEM)
3109 operands[1] = force_reg (Pmode, operands[1]);
3110 else if (TLS_SYMBOLIC_CONST (operands[1]))
3111 operands[1] = legitimize_tls_address (operands[1], temp);
3113 operands[1] = legitimize_pic_address (operands[1], temp);
3116 /* Try machine-dependent ways of modifying an illegitimate address X
3117 to be legitimate. If we find one, return the new, valid address.
3119 OLDX is the address as it was before break_out_memory_refs was called.
3120 In some cases it is useful to look at this to decide what needs to be done.
3122 MODE is the mode of the operand pointed to by X.
3124 When -fpic is used, special handling is needed for symbolic references.
3125 See comments by legitimize_pic_address for details. */
3128 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
3129 enum machine_mode mode ATTRIBUTE_UNUSED)
3131 rtx constant_term = const0_rtx;
3133 if (TLS_SYMBOLIC_CONST (x))
3135 x = legitimize_tls_address (x, 0);
3137 if (legitimate_address_p (mode, x, FALSE))
3142 if (SYMBOLIC_CONST (x)
3143 || (GET_CODE (x) == PLUS
3144 && (SYMBOLIC_CONST (XEXP (x, 0))
3145 || SYMBOLIC_CONST (XEXP (x, 1)))))
3146 x = legitimize_pic_address (x, 0);
3148 if (legitimate_address_p (mode, x, FALSE))
3152 x = eliminate_constant_term (x, &constant_term);
3154 /* Optimize loading of large displacements by splitting them
3155 into the multiple of 4K and the rest; this allows the
3156 former to be CSE'd if possible.
3158 Don't do this if the displacement is added to a register
3159 pointing into the stack frame, as the offsets will
3160 change later anyway. */
3162 if (GET_CODE (constant_term) == CONST_INT
3163 && !TARGET_LONG_DISPLACEMENT
3164 && !DISP_IN_RANGE (INTVAL (constant_term))
3165 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
3167 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
3168 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
3170 rtx temp = gen_reg_rtx (Pmode);
3171 rtx val = force_operand (GEN_INT (upper), temp);
3173 emit_move_insn (temp, val);
3175 x = gen_rtx_PLUS (Pmode, x, temp);
3176 constant_term = GEN_INT (lower);
3179 if (GET_CODE (x) == PLUS)
3181 if (GET_CODE (XEXP (x, 0)) == REG)
3183 register rtx temp = gen_reg_rtx (Pmode);
3184 register rtx val = force_operand (XEXP (x, 1), temp);
3186 emit_move_insn (temp, val);
3188 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
3191 else if (GET_CODE (XEXP (x, 1)) == REG)
3193 register rtx temp = gen_reg_rtx (Pmode);
3194 register rtx val = force_operand (XEXP (x, 0), temp);
3196 emit_move_insn (temp, val);
3198 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
3202 if (constant_term != const0_rtx)
3203 x = gen_rtx_PLUS (Pmode, x, constant_term);
3208 /* Try a machine-dependent way of reloading an illegitimate address AD
3209 operand. If we find one, push the reload and and return the new address.
3211 MODE is the mode of the enclosing MEM. OPNUM is the operand number
3212 and TYPE is the reload type of the current reload. */
3215 legitimize_reload_address (rtx ad, enum machine_mode mode ATTRIBUTE_UNUSED,
3216 int opnum, int type)
3218 if (!optimize || TARGET_LONG_DISPLACEMENT)
3221 if (GET_CODE (ad) == PLUS)
3223 rtx tem = simplify_binary_operation (PLUS, Pmode,
3224 XEXP (ad, 0), XEXP (ad, 1));
3229 if (GET_CODE (ad) == PLUS
3230 && GET_CODE (XEXP (ad, 0)) == REG
3231 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3232 && !DISP_IN_RANGE (INTVAL (XEXP (ad, 1))))
3234 HOST_WIDE_INT lower = INTVAL (XEXP (ad, 1)) & 0xfff;
3235 HOST_WIDE_INT upper = INTVAL (XEXP (ad, 1)) ^ lower;
3238 cst = GEN_INT (upper);
3239 if (!legitimate_reload_constant_p (cst))
3240 cst = force_const_mem (Pmode, cst);
3242 tem = gen_rtx_PLUS (Pmode, XEXP (ad, 0), cst);
3243 new = gen_rtx_PLUS (Pmode, tem, GEN_INT (lower));
3245 push_reload (XEXP (tem, 1), 0, &XEXP (tem, 1), 0,
3246 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
3247 opnum, (enum reload_type) type);
3254 /* Emit code to move LEN bytes from DST to SRC. */
3257 s390_expand_movmem (rtx dst, rtx src, rtx len)
3259 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3261 if (INTVAL (len) > 0)
3262 emit_insn (gen_movmem_short (dst, src, GEN_INT (INTVAL (len) - 1)));
3265 else if (TARGET_MVCLE)
3267 emit_insn (gen_movmem_long (dst, src, convert_to_mode (Pmode, len, 1)));
3272 rtx dst_addr, src_addr, count, blocks, temp;
3273 rtx loop_start_label = gen_label_rtx ();
3274 rtx loop_end_label = gen_label_rtx ();
3275 rtx end_label = gen_label_rtx ();
3276 enum machine_mode mode;
3278 mode = GET_MODE (len);
3279 if (mode == VOIDmode)
3282 dst_addr = gen_reg_rtx (Pmode);
3283 src_addr = gen_reg_rtx (Pmode);
3284 count = gen_reg_rtx (mode);
3285 blocks = gen_reg_rtx (mode);
3287 convert_move (count, len, 1);
3288 emit_cmp_and_jump_insns (count, const0_rtx,
3289 EQ, NULL_RTX, mode, 1, end_label);
3291 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3292 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
3293 dst = change_address (dst, VOIDmode, dst_addr);
3294 src = change_address (src, VOIDmode, src_addr);
3296 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3298 emit_move_insn (count, temp);
3300 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3302 emit_move_insn (blocks, temp);
3304 emit_cmp_and_jump_insns (blocks, const0_rtx,
3305 EQ, NULL_RTX, mode, 1, loop_end_label);
3307 emit_label (loop_start_label);
3309 emit_insn (gen_movmem_short (dst, src, GEN_INT (255)));
3310 s390_load_address (dst_addr,
3311 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3312 s390_load_address (src_addr,
3313 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
3315 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3317 emit_move_insn (blocks, temp);
3319 emit_cmp_and_jump_insns (blocks, const0_rtx,
3320 EQ, NULL_RTX, mode, 1, loop_end_label);
3322 emit_jump (loop_start_label);
3323 emit_label (loop_end_label);
3325 emit_insn (gen_movmem_short (dst, src,
3326 convert_to_mode (Pmode, count, 1)));
3327 emit_label (end_label);
3331 /* Emit code to clear LEN bytes at DST. */
3334 s390_expand_clrmem (rtx dst, rtx len)
3336 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3338 if (INTVAL (len) > 0)
3339 emit_insn (gen_clrmem_short (dst, GEN_INT (INTVAL (len) - 1)));
3342 else if (TARGET_MVCLE)
3344 emit_insn (gen_clrmem_long (dst, convert_to_mode (Pmode, len, 1)));
3349 rtx dst_addr, src_addr, count, blocks, temp;
3350 rtx loop_start_label = gen_label_rtx ();
3351 rtx loop_end_label = gen_label_rtx ();
3352 rtx end_label = gen_label_rtx ();
3353 enum machine_mode mode;
3355 mode = GET_MODE (len);
3356 if (mode == VOIDmode)
3359 dst_addr = gen_reg_rtx (Pmode);
3360 src_addr = gen_reg_rtx (Pmode);
3361 count = gen_reg_rtx (mode);
3362 blocks = gen_reg_rtx (mode);
3364 convert_move (count, len, 1);
3365 emit_cmp_and_jump_insns (count, const0_rtx,
3366 EQ, NULL_RTX, mode, 1, end_label);
3368 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3369 dst = change_address (dst, VOIDmode, dst_addr);
3371 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3373 emit_move_insn (count, temp);
3375 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3377 emit_move_insn (blocks, temp);
3379 emit_cmp_and_jump_insns (blocks, const0_rtx,
3380 EQ, NULL_RTX, mode, 1, loop_end_label);
3382 emit_label (loop_start_label);
3384 emit_insn (gen_clrmem_short (dst, GEN_INT (255)));
3385 s390_load_address (dst_addr,
3386 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3388 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3390 emit_move_insn (blocks, temp);
3392 emit_cmp_and_jump_insns (blocks, const0_rtx,
3393 EQ, NULL_RTX, mode, 1, loop_end_label);
3395 emit_jump (loop_start_label);
3396 emit_label (loop_end_label);
3398 emit_insn (gen_clrmem_short (dst, convert_to_mode (Pmode, count, 1)));
3399 emit_label (end_label);
3403 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3404 and return the result in TARGET. */
3407 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3409 rtx (*gen_result) (rtx) =
3410 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3412 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3414 if (INTVAL (len) > 0)
3416 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3417 emit_insn (gen_result (target));
3420 emit_move_insn (target, const0_rtx);
3423 else /* if (TARGET_MVCLE) */
3425 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3426 emit_insn (gen_result (target));
3430 /* Deactivate for now as profile code cannot cope with
3431 CC being live across basic block boundaries. */
3434 rtx addr0, addr1, count, blocks, temp;
3435 rtx loop_start_label = gen_label_rtx ();
3436 rtx loop_end_label = gen_label_rtx ();
3437 rtx end_label = gen_label_rtx ();
3438 enum machine_mode mode;
3440 mode = GET_MODE (len);
3441 if (mode == VOIDmode)
3444 addr0 = gen_reg_rtx (Pmode);
3445 addr1 = gen_reg_rtx (Pmode);
3446 count = gen_reg_rtx (mode);
3447 blocks = gen_reg_rtx (mode);
3449 convert_move (count, len, 1);
3450 emit_cmp_and_jump_insns (count, const0_rtx,
3451 EQ, NULL_RTX, mode, 1, end_label);
3453 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3454 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3455 op0 = change_address (op0, VOIDmode, addr0);
3456 op1 = change_address (op1, VOIDmode, addr1);
3458 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3460 emit_move_insn (count, temp);
3462 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3464 emit_move_insn (blocks, temp);
3466 emit_cmp_and_jump_insns (blocks, const0_rtx,
3467 EQ, NULL_RTX, mode, 1, loop_end_label);
3469 emit_label (loop_start_label);
3471 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3472 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3473 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3474 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3475 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3476 emit_jump_insn (temp);
3478 s390_load_address (addr0,
3479 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3480 s390_load_address (addr1,
3481 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3483 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3485 emit_move_insn (blocks, temp);
3487 emit_cmp_and_jump_insns (blocks, const0_rtx,
3488 EQ, NULL_RTX, mode, 1, loop_end_label);
3490 emit_jump (loop_start_label);
3491 emit_label (loop_end_label);
3493 emit_insn (gen_cmpmem_short (op0, op1,
3494 convert_to_mode (Pmode, count, 1)));
3495 emit_label (end_label);
3497 emit_insn (gen_result (target));
3503 /* Expand conditional increment or decrement using alc/slb instructions.
3504 Should generate code setting DST to either SRC or SRC + INCREMENT,
3505 depending on the result of the comparison CMP_OP0 CMP_CODE CMP_OP1.
3506 Returns true if successful, false otherwise. */
3509 s390_expand_addcc (enum rtx_code cmp_code, rtx cmp_op0, rtx cmp_op1,
3510 rtx dst, rtx src, rtx increment)
3512 enum machine_mode cmp_mode;
3513 enum machine_mode cc_mode;
3518 if ((GET_MODE (cmp_op0) == SImode || GET_MODE (cmp_op0) == VOIDmode)
3519 && (GET_MODE (cmp_op1) == SImode || GET_MODE (cmp_op1) == VOIDmode))
3521 else if ((GET_MODE (cmp_op0) == DImode || GET_MODE (cmp_op0) == VOIDmode)
3522 && (GET_MODE (cmp_op1) == DImode || GET_MODE (cmp_op1) == VOIDmode))
3527 /* Try ADD LOGICAL WITH CARRY. */
3528 if (increment == const1_rtx)
3530 /* Determine CC mode to use. */
3531 if (cmp_code == EQ || cmp_code == NE)
3533 if (cmp_op1 != const0_rtx)
3535 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3536 NULL_RTX, 0, OPTAB_WIDEN);
3537 cmp_op1 = const0_rtx;
3540 cmp_code = cmp_code == EQ ? LEU : GTU;
3543 if (cmp_code == LTU || cmp_code == LEU)
3548 cmp_code = swap_condition (cmp_code);
3565 /* Emit comparison instruction pattern. */
3566 if (!register_operand (cmp_op0, cmp_mode))
3567 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3569 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3570 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3571 /* We use insn_invalid_p here to add clobbers if required. */
3572 if (insn_invalid_p (emit_insn (insn)))
3575 /* Emit ALC instruction pattern. */
3576 op_res = gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3577 gen_rtx_REG (cc_mode, CC_REGNUM),
3580 if (src != const0_rtx)
3582 if (!register_operand (src, GET_MODE (dst)))
3583 src = force_reg (GET_MODE (dst), src);
3585 src = gen_rtx_PLUS (GET_MODE (dst), src, const0_rtx);
3586 op_res = gen_rtx_PLUS (GET_MODE (dst), src, op_res);
3589 p = rtvec_alloc (2);
3591 gen_rtx_SET (VOIDmode, dst, op_res);
3593 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3594 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3599 /* Try SUBTRACT LOGICAL WITH BORROW. */
3600 if (increment == constm1_rtx)
3602 /* Determine CC mode to use. */
3603 if (cmp_code == EQ || cmp_code == NE)
3605 if (cmp_op1 != const0_rtx)
3607 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3608 NULL_RTX, 0, OPTAB_WIDEN);
3609 cmp_op1 = const0_rtx;
3612 cmp_code = cmp_code == EQ ? LEU : GTU;
3615 if (cmp_code == GTU || cmp_code == GEU)
3620 cmp_code = swap_condition (cmp_code);
3637 /* Emit comparison instruction pattern. */
3638 if (!register_operand (cmp_op0, cmp_mode))
3639 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3641 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3642 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3643 /* We use insn_invalid_p here to add clobbers if required. */
3644 if (insn_invalid_p (emit_insn (insn)))
3647 /* Emit SLB instruction pattern. */
3648 if (!register_operand (src, GET_MODE (dst)))
3649 src = force_reg (GET_MODE (dst), src);
3651 op_res = gen_rtx_MINUS (GET_MODE (dst),
3652 gen_rtx_MINUS (GET_MODE (dst), src, const0_rtx),
3653 gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3654 gen_rtx_REG (cc_mode, CC_REGNUM),
3656 p = rtvec_alloc (2);
3658 gen_rtx_SET (VOIDmode, dst, op_res);
3660 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3661 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3670 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3671 We need to emit DTP-relative relocations. */
3674 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3679 fputs ("\t.long\t", file);
3682 fputs ("\t.quad\t", file);
3687 output_addr_const (file, x);
3688 fputs ("@DTPOFF", file);
3691 /* In the name of slightly smaller debug output, and to cater to
3692 general assembler losage, recognize various UNSPEC sequences
3693 and turn them back into a direct symbol reference. */
3696 s390_delegitimize_address (rtx orig_x)
3700 if (GET_CODE (x) != MEM)
3704 if (GET_CODE (x) == PLUS
3705 && GET_CODE (XEXP (x, 1)) == CONST
3706 && GET_CODE (XEXP (x, 0)) == REG
3707 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3709 y = XEXP (XEXP (x, 1), 0);
3710 if (GET_CODE (y) == UNSPEC
3711 && XINT (y, 1) == UNSPEC_GOT)
3712 return XVECEXP (y, 0, 0);
3716 if (GET_CODE (x) == CONST)
3719 if (GET_CODE (y) == UNSPEC
3720 && XINT (y, 1) == UNSPEC_GOTENT)
3721 return XVECEXP (y, 0, 0);
3728 /* Output shift count operand OP to stdio stream FILE. */
3731 print_shift_count_operand (FILE *file, rtx op)
3733 HOST_WIDE_INT offset = 0;
3735 /* We can have an integer constant, an address register,
3736 or a sum of the two. */
3737 if (GET_CODE (op) == CONST_INT)
3739 offset = INTVAL (op);
3742 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3744 offset = INTVAL (XEXP (op, 1));
3747 while (op && GET_CODE (op) == SUBREG)
3748 op = SUBREG_REG (op);
3751 if (op && (GET_CODE (op) != REG
3752 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3753 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3756 /* Shift counts are truncated to the low six bits anyway. */
3757 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3759 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3762 /* Locate some local-dynamic symbol still in use by this function
3763 so that we can print its name in local-dynamic base patterns. */
3766 get_some_local_dynamic_name (void)
3770 if (cfun->machine->some_ld_name)
3771 return cfun->machine->some_ld_name;
3773 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3775 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3776 return cfun->machine->some_ld_name;
3782 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3786 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3788 x = get_pool_constant (x);
3789 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3792 if (GET_CODE (x) == SYMBOL_REF
3793 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3795 cfun->machine->some_ld_name = XSTR (x, 0);
3802 /* Output machine-dependent UNSPECs occurring in address constant X
3803 in assembler syntax to stdio stream FILE. Returns true if the
3804 constant X could be recognized, false otherwise. */
3807 s390_output_addr_const_extra (FILE *file, rtx x)
3809 if (GET_CODE (x) == UNSPEC && XVECLEN (x, 0) == 1)
3810 switch (XINT (x, 1))
3813 output_addr_const (file, XVECEXP (x, 0, 0));
3814 fprintf (file, "@GOTENT");
3817 output_addr_const (file, XVECEXP (x, 0, 0));
3818 fprintf (file, "@GOT");
3821 output_addr_const (file, XVECEXP (x, 0, 0));
3822 fprintf (file, "@GOTOFF");
3825 output_addr_const (file, XVECEXP (x, 0, 0));
3826 fprintf (file, "@PLT");
3829 output_addr_const (file, XVECEXP (x, 0, 0));
3830 fprintf (file, "@PLTOFF");
3833 output_addr_const (file, XVECEXP (x, 0, 0));
3834 fprintf (file, "@TLSGD");
3837 assemble_name (file, get_some_local_dynamic_name ());
3838 fprintf (file, "@TLSLDM");
3841 output_addr_const (file, XVECEXP (x, 0, 0));
3842 fprintf (file, "@DTPOFF");
3845 output_addr_const (file, XVECEXP (x, 0, 0));
3846 fprintf (file, "@NTPOFF");
3848 case UNSPEC_GOTNTPOFF:
3849 output_addr_const (file, XVECEXP (x, 0, 0));
3850 fprintf (file, "@GOTNTPOFF");
3852 case UNSPEC_INDNTPOFF:
3853 output_addr_const (file, XVECEXP (x, 0, 0));
3854 fprintf (file, "@INDNTPOFF");
3861 /* Output address operand ADDR in assembler syntax to
3862 stdio stream FILE. */
3865 print_operand_address (FILE *file, rtx addr)
3867 struct s390_address ad;
3869 if (!s390_decompose_address (addr, &ad)
3870 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3871 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3872 output_operand_lossage ("Cannot decompose address.");
3875 output_addr_const (file, ad.disp);
3877 fprintf (file, "0");
3879 if (ad.base && ad.indx)
3880 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3881 reg_names[REGNO (ad.base)]);
3883 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3886 /* Output operand X in assembler syntax to stdio stream FILE.
3887 CODE specified the format flag. The following format flags
3890 'C': print opcode suffix for branch condition.
3891 'D': print opcode suffix for inverse branch condition.
3892 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3893 'O': print only the displacement of a memory reference.
3894 'R': print only the base register of a memory reference.
3895 'N': print the second word of a DImode operand.
3896 'M': print the second word of a TImode operand.
3897 'Y': print shift count operand.
3899 'b': print integer X as if it's an unsigned byte.
3900 'x': print integer X as if it's an unsigned word.
3901 'h': print integer X as if it's a signed word.
3902 'i': print the first nonzero HImode part of X.
3903 'j': print the first HImode part unequal to 0xffff of X. */
3906 print_operand (FILE *file, rtx x, int code)
3911 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3915 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3919 if (GET_CODE (x) == SYMBOL_REF)
3921 fprintf (file, "%s", ":tls_load:");
3922 output_addr_const (file, x);
3924 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3926 fprintf (file, "%s", ":tls_gdcall:");
3927 output_addr_const (file, XVECEXP (x, 0, 0));
3929 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3931 fprintf (file, "%s", ":tls_ldcall:");
3932 assemble_name (file, get_some_local_dynamic_name ());
3940 struct s390_address ad;
3942 if (GET_CODE (x) != MEM
3943 || !s390_decompose_address (XEXP (x, 0), &ad)
3944 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3949 output_addr_const (file, ad.disp);
3951 fprintf (file, "0");
3957 struct s390_address ad;
3959 if (GET_CODE (x) != MEM
3960 || !s390_decompose_address (XEXP (x, 0), &ad)
3961 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3966 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3968 fprintf (file, "0");
3973 if (GET_CODE (x) == REG)
3974 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3975 else if (GET_CODE (x) == MEM)
3976 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3982 if (GET_CODE (x) == REG)
3983 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3984 else if (GET_CODE (x) == MEM)
3985 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3991 print_shift_count_operand (file, x);
3995 switch (GET_CODE (x))
3998 fprintf (file, "%s", reg_names[REGNO (x)]);
4002 output_address (XEXP (x, 0));
4009 output_addr_const (file, x);
4014 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
4015 else if (code == 'x')
4016 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
4017 else if (code == 'h')
4018 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
4019 else if (code == 'i')
4020 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
4021 s390_extract_part (x, HImode, 0));
4022 else if (code == 'j')
4023 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
4024 s390_extract_part (x, HImode, -1));
4026 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
4030 if (GET_MODE (x) != VOIDmode)
4033 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
4034 else if (code == 'x')
4035 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
4036 else if (code == 'h')
4037 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
4043 fatal_insn ("UNKNOWN in print_operand !?", x);
4048 /* Target hook for assembling integer objects. We need to define it
4049 here to work a round a bug in some versions of GAS, which couldn't
4050 handle values smaller than INT_MIN when printed in decimal. */
4053 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
4055 if (size == 8 && aligned_p
4056 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
4058 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
4062 return default_assemble_integer (x, size, aligned_p);
4065 /* Returns true if register REGNO is used for forming
4066 a memory address in expression X. */
4069 reg_used_in_mem_p (int regno, rtx x)
4071 enum rtx_code code = GET_CODE (x);
4077 if (refers_to_regno_p (regno, regno+1,
4081 else if (code == SET
4082 && GET_CODE (SET_DEST (x)) == PC)
4084 if (refers_to_regno_p (regno, regno+1,
4089 fmt = GET_RTX_FORMAT (code);
4090 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4093 && reg_used_in_mem_p (regno, XEXP (x, i)))
4096 else if (fmt[i] == 'E')
4097 for (j = 0; j < XVECLEN (x, i); j++)
4098 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
4104 /* Returns true if expression DEP_RTX sets an address register
4105 used by instruction INSN to address memory. */
4108 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
4112 if (GET_CODE (dep_rtx) == INSN)
4113 dep_rtx = PATTERN (dep_rtx);
4115 if (GET_CODE (dep_rtx) == SET)
4117 target = SET_DEST (dep_rtx);
4118 if (GET_CODE (target) == STRICT_LOW_PART)
4119 target = XEXP (target, 0);
4120 while (GET_CODE (target) == SUBREG)
4121 target = SUBREG_REG (target);
4123 if (GET_CODE (target) == REG)
4125 int regno = REGNO (target);
4127 if (s390_safe_attr_type (insn) == TYPE_LA)
4129 pat = PATTERN (insn);
4130 if (GET_CODE (pat) == PARALLEL)
4132 if (XVECLEN (pat, 0) != 2)
4134 pat = XVECEXP (pat, 0, 0);
4136 if (GET_CODE (pat) == SET)
4137 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
4141 else if (get_attr_atype (insn) == ATYPE_AGEN)
4142 return reg_used_in_mem_p (regno, PATTERN (insn));
4148 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
4151 s390_agen_dep_p (rtx dep_insn, rtx insn)
4153 rtx dep_rtx = PATTERN (dep_insn);
4156 if (GET_CODE (dep_rtx) == SET
4157 && addr_generation_dependency_p (dep_rtx, insn))
4159 else if (GET_CODE (dep_rtx) == PARALLEL)
4161 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
4163 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
4170 /* Return the modified cost of the dependency of instruction INSN
4171 on instruction DEP_INSN through the link LINK. COST is the
4172 default cost of that dependency.
4174 Data dependencies are all handled without delay. However, if a
4175 register is modified and subsequently used as base or index
4176 register of a memory reference, at least 4 cycles need to pass
4177 between setting and using the register to avoid pipeline stalls.
4178 An exception is the LA instruction. An address generated by LA can
4179 be used by introducing only a one cycle stall on the pipeline. */
4182 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
4184 /* If the dependence is an anti-dependence, there is no cost. For an
4185 output dependence, there is sometimes a cost, but it doesn't seem
4186 worth handling those few cases. */
4188 if (REG_NOTE_KIND (link) != 0)
4191 /* If we can't recognize the insns, we can't really do anything. */
4192 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
4195 /* Operand forward in case of lr, load and la. */
4196 if (s390_tune == PROCESSOR_2084_Z990
4198 && (s390_safe_attr_type (dep_insn) == TYPE_LA
4199 || s390_safe_attr_type (dep_insn) == TYPE_LR
4200 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
4205 /* A C statement (sans semicolon) to update the integer scheduling priority
4206 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
4207 reduce the priority to execute INSN later. Do not define this macro if
4208 you do not need to adjust the scheduling priorities of insns.
4210 A STD instruction should be scheduled earlier,
4211 in order to use the bypass. */
4214 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
4216 if (! INSN_P (insn))
4219 if (s390_tune != PROCESSOR_2084_Z990)
4222 switch (s390_safe_attr_type (insn))
4226 priority = priority << 3;
4229 priority = priority << 1;
4237 /* The number of instructions that can be issued per cycle. */
4240 s390_issue_rate (void)
4242 if (s390_tune == PROCESSOR_2084_Z990)
4248 s390_first_cycle_multipass_dfa_lookahead (void)
4254 /* Split all branches that exceed the maximum distance.
4255 Returns true if this created a new literal pool entry. */
4258 s390_split_branches (void)
4260 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
4261 int new_literal = 0;
4262 rtx insn, pat, tmp, target;
4265 /* We need correct insn addresses. */
4267 shorten_branches (get_insns ());
4269 /* Find all branches that exceed 64KB, and split them. */
4271 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4273 if (GET_CODE (insn) != JUMP_INSN)
4276 pat = PATTERN (insn);
4277 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4278 pat = XVECEXP (pat, 0, 0);
4279 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
4282 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
4284 label = &SET_SRC (pat);
4286 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
4288 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
4289 label = &XEXP (SET_SRC (pat), 1);
4290 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
4291 label = &XEXP (SET_SRC (pat), 2);
4298 if (get_attr_length (insn) <= 4)
4301 /* We are going to use the return register as scratch register,
4302 make sure it will be saved/restored by the prologue/epilogue. */
4303 cfun_frame_layout.save_return_addr_p = 1;
4308 tmp = force_const_mem (Pmode, *label);
4309 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
4310 INSN_ADDRESSES_NEW (tmp, -1);
4311 annotate_constant_pool_refs (&PATTERN (tmp));
4318 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
4319 UNSPEC_LTREL_OFFSET);
4320 target = gen_rtx_CONST (Pmode, target);
4321 target = force_const_mem (Pmode, target);
4322 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
4323 INSN_ADDRESSES_NEW (tmp, -1);
4324 annotate_constant_pool_refs (&PATTERN (tmp));
4326 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XEXP (target, 0),
4327 cfun->machine->base_reg),
4329 target = gen_rtx_PLUS (Pmode, temp_reg, target);
4332 if (!validate_change (insn, label, target, 0))
4339 /* Annotate every literal pool reference in X by an UNSPEC_LTREF expression.
4340 Fix up MEMs as required. */
4343 annotate_constant_pool_refs (rtx *x)
4348 if (GET_CODE (*x) == SYMBOL_REF
4349 && CONSTANT_POOL_ADDRESS_P (*x))
4352 /* Literal pool references can only occur inside a MEM ... */
4353 if (GET_CODE (*x) == MEM)
4355 rtx memref = XEXP (*x, 0);
4357 if (GET_CODE (memref) == SYMBOL_REF
4358 && CONSTANT_POOL_ADDRESS_P (memref))
4360 rtx base = cfun->machine->base_reg;
4361 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, memref, base),
4364 *x = replace_equiv_address (*x, addr);
4368 if (GET_CODE (memref) == CONST
4369 && GET_CODE (XEXP (memref, 0)) == PLUS
4370 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
4371 && GET_CODE (XEXP (XEXP (memref, 0), 0)) == SYMBOL_REF
4372 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (memref, 0), 0)))
4374 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4375 rtx sym = XEXP (XEXP (memref, 0), 0);
4376 rtx base = cfun->machine->base_reg;
4377 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4380 *x = replace_equiv_address (*x, plus_constant (addr, off));
4385 /* ... or a load-address type pattern. */
4386 if (GET_CODE (*x) == SET)
4388 rtx addrref = SET_SRC (*x);
4390 if (GET_CODE (addrref) == SYMBOL_REF
4391 && CONSTANT_POOL_ADDRESS_P (addrref))
4393 rtx base = cfun->machine->base_reg;
4394 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, addrref, base),
4397 SET_SRC (*x) = addr;
4401 if (GET_CODE (addrref) == CONST
4402 && GET_CODE (XEXP (addrref, 0)) == PLUS
4403 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4404 && GET_CODE (XEXP (XEXP (addrref, 0), 0)) == SYMBOL_REF
4405 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addrref, 0), 0)))
4407 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4408 rtx sym = XEXP (XEXP (addrref, 0), 0);
4409 rtx base = cfun->machine->base_reg;
4410 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4413 SET_SRC (*x) = plus_constant (addr, off);
4418 /* Annotate LTREL_BASE as well. */
4419 if (GET_CODE (*x) == UNSPEC
4420 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4422 rtx base = cfun->machine->base_reg;
4423 *x = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XVECEXP (*x, 0, 0), base),
4428 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4429 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4433 annotate_constant_pool_refs (&XEXP (*x, i));
4435 else if (fmt[i] == 'E')
4437 for (j = 0; j < XVECLEN (*x, i); j++)
4438 annotate_constant_pool_refs (&XVECEXP (*x, i, j));
4444 /* Find an annotated literal pool symbol referenced in RTX X,
4445 and store it at REF. Will abort if X contains references to
4446 more than one such pool symbol; multiple references to the same
4447 symbol are allowed, however.
4449 The rtx pointed to by REF must be initialized to NULL_RTX
4450 by the caller before calling this routine. */
4453 find_constant_pool_ref (rtx x, rtx *ref)
4458 /* Ignore LTREL_BASE references. */
4459 if (GET_CODE (x) == UNSPEC
4460 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4462 /* Likewise POOL_ENTRY insns. */
4463 if (GET_CODE (x) == UNSPEC_VOLATILE
4464 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
4467 if (GET_CODE (x) == SYMBOL_REF
4468 && CONSTANT_POOL_ADDRESS_P (x))
4471 if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_LTREF)
4473 rtx sym = XVECEXP (x, 0, 0);
4474 if (GET_CODE (sym) != SYMBOL_REF
4475 || !CONSTANT_POOL_ADDRESS_P (sym))
4478 if (*ref == NULL_RTX)
4480 else if (*ref != sym)
4486 fmt = GET_RTX_FORMAT (GET_CODE (x));
4487 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4491 find_constant_pool_ref (XEXP (x, i), ref);
4493 else if (fmt[i] == 'E')
4495 for (j = 0; j < XVECLEN (x, i); j++)
4496 find_constant_pool_ref (XVECEXP (x, i, j), ref);
4501 /* Replace every reference to the annotated literal pool
4502 symbol REF in X by its base plus OFFSET. */
4505 replace_constant_pool_ref (rtx *x, rtx ref, rtx offset)
4513 if (GET_CODE (*x) == UNSPEC
4514 && XINT (*x, 1) == UNSPEC_LTREF
4515 && XVECEXP (*x, 0, 0) == ref)
4517 *x = gen_rtx_PLUS (Pmode, XVECEXP (*x, 0, 1), offset);
4521 if (GET_CODE (*x) == PLUS
4522 && GET_CODE (XEXP (*x, 1)) == CONST_INT
4523 && GET_CODE (XEXP (*x, 0)) == UNSPEC
4524 && XINT (XEXP (*x, 0), 1) == UNSPEC_LTREF
4525 && XVECEXP (XEXP (*x, 0), 0, 0) == ref)
4527 rtx addr = gen_rtx_PLUS (Pmode, XVECEXP (XEXP (*x, 0), 0, 1), offset);
4528 *x = plus_constant (addr, INTVAL (XEXP (*x, 1)));
4532 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4533 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4537 replace_constant_pool_ref (&XEXP (*x, i), ref, offset);
4539 else if (fmt[i] == 'E')
4541 for (j = 0; j < XVECLEN (*x, i); j++)
4542 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, offset);
4547 /* Check whether X contains an UNSPEC_LTREL_BASE.
4548 Return its constant pool symbol if found, NULL_RTX otherwise. */
4551 find_ltrel_base (rtx x)
4556 if (GET_CODE (x) == UNSPEC
4557 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4558 return XVECEXP (x, 0, 0);
4560 fmt = GET_RTX_FORMAT (GET_CODE (x));
4561 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4565 rtx fnd = find_ltrel_base (XEXP (x, i));
4569 else if (fmt[i] == 'E')
4571 for (j = 0; j < XVECLEN (x, i); j++)
4573 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4583 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with its base. */
4586 replace_ltrel_base (rtx *x)
4591 if (GET_CODE (*x) == UNSPEC
4592 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4594 *x = XVECEXP (*x, 0, 1);
4598 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4599 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4603 replace_ltrel_base (&XEXP (*x, i));
4605 else if (fmt[i] == 'E')
4607 for (j = 0; j < XVECLEN (*x, i); j++)
4608 replace_ltrel_base (&XVECEXP (*x, i, j));
4614 /* We keep a list of constants which we have to add to internal
4615 constant tables in the middle of large functions. */
4617 #define NR_C_MODES 7
4618 enum machine_mode constant_modes[NR_C_MODES] =
4629 struct constant *next;
4634 struct constant_pool
4636 struct constant_pool *next;
4641 struct constant *constants[NR_C_MODES];
4646 static struct constant_pool * s390_mainpool_start (void);
4647 static void s390_mainpool_finish (struct constant_pool *);
4648 static void s390_mainpool_cancel (struct constant_pool *);
4650 static struct constant_pool * s390_chunkify_start (void);
4651 static void s390_chunkify_finish (struct constant_pool *);
4652 static void s390_chunkify_cancel (struct constant_pool *);
4654 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4655 static void s390_end_pool (struct constant_pool *, rtx);
4656 static void s390_add_pool_insn (struct constant_pool *, rtx);
4657 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4658 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4659 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4660 static rtx s390_dump_pool (struct constant_pool *, bool);
4661 static struct constant_pool *s390_alloc_pool (void);
4662 static void s390_free_pool (struct constant_pool *);
4664 /* Create new constant pool covering instructions starting at INSN
4665 and chain it to the end of POOL_LIST. */
4667 static struct constant_pool *
4668 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4670 struct constant_pool *pool, **prev;
4672 pool = s390_alloc_pool ();
4673 pool->first_insn = insn;
4675 for (prev = pool_list; *prev; prev = &(*prev)->next)
4682 /* End range of instructions covered by POOL at INSN and emit
4683 placeholder insn representing the pool. */
4686 s390_end_pool (struct constant_pool *pool, rtx insn)
4688 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4691 insn = get_last_insn ();
4693 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4694 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4697 /* Add INSN to the list of insns covered by POOL. */
4700 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4702 bitmap_set_bit (pool->insns, INSN_UID (insn));
4705 /* Return pool out of POOL_LIST that covers INSN. */
4707 static struct constant_pool *
4708 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4710 struct constant_pool *pool;
4712 for (pool = pool_list; pool; pool = pool->next)
4713 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4719 /* Add constant VAL of mode MODE to the constant pool POOL. */
4722 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4727 for (i = 0; i < NR_C_MODES; i++)
4728 if (constant_modes[i] == mode)
4730 if (i == NR_C_MODES)
4733 for (c = pool->constants[i]; c != NULL; c = c->next)
4734 if (rtx_equal_p (val, c->value))
4739 c = (struct constant *) xmalloc (sizeof *c);
4741 c->label = gen_label_rtx ();
4742 c->next = pool->constants[i];
4743 pool->constants[i] = c;
4744 pool->size += GET_MODE_SIZE (mode);
4748 /* Find constant VAL of mode MODE in the constant pool POOL.
4749 Return an RTX describing the distance from the start of
4750 the pool to the location of the new constant. */
4753 s390_find_constant (struct constant_pool *pool, rtx val,
4754 enum machine_mode mode)
4760 for (i = 0; i < NR_C_MODES; i++)
4761 if (constant_modes[i] == mode)
4763 if (i == NR_C_MODES)
4766 for (c = pool->constants[i]; c != NULL; c = c->next)
4767 if (rtx_equal_p (val, c->value))
4773 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4774 gen_rtx_LABEL_REF (Pmode, pool->label));
4775 offset = gen_rtx_CONST (Pmode, offset);
4779 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4780 do not emit the pool base label. */
4783 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4789 /* Pool start insn switches to proper section
4790 and guarantees necessary alignment. */
4791 if (TARGET_CPU_ZARCH)
4792 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4794 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4795 INSN_ADDRESSES_NEW (insn, -1);
4799 insn = emit_label_after (pool->label, insn);
4800 INSN_ADDRESSES_NEW (insn, -1);
4803 /* Dump constants in descending alignment requirement order,
4804 ensuring proper alignment for every constant. */
4805 for (i = 0; i < NR_C_MODES; i++)
4806 for (c = pool->constants[i]; c; c = c->next)
4808 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4809 rtx value = c->value;
4810 if (GET_CODE (value) == CONST
4811 && GET_CODE (XEXP (value, 0)) == UNSPEC
4812 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4813 && XVECLEN (XEXP (value, 0), 0) == 1)
4815 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4816 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4817 value = gen_rtx_CONST (VOIDmode, value);
4820 insn = emit_label_after (c->label, insn);
4821 INSN_ADDRESSES_NEW (insn, -1);
4823 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4824 gen_rtvec (1, value),
4825 UNSPECV_POOL_ENTRY);
4826 insn = emit_insn_after (value, insn);
4827 INSN_ADDRESSES_NEW (insn, -1);
4830 /* Pool end insn switches back to previous section
4831 and guarantees necessary alignment. */
4832 if (TARGET_CPU_ZARCH)
4833 insn = emit_insn_after (gen_pool_end_64 (), insn);
4835 insn = emit_insn_after (gen_pool_end_31 (), insn);
4836 INSN_ADDRESSES_NEW (insn, -1);
4838 insn = emit_barrier_after (insn);
4839 INSN_ADDRESSES_NEW (insn, -1);
4841 /* Remove placeholder insn. */
4842 remove_insn (pool->pool_insn);
4847 /* Allocate new constant_pool structure. */
4849 static struct constant_pool *
4850 s390_alloc_pool (void)
4852 struct constant_pool *pool;
4855 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4857 for (i = 0; i < NR_C_MODES; i++)
4858 pool->constants[i] = NULL;
4860 pool->label = gen_label_rtx ();
4861 pool->first_insn = NULL_RTX;
4862 pool->pool_insn = NULL_RTX;
4863 pool->insns = BITMAP_XMALLOC ();
4869 /* Free all memory used by POOL. */
4872 s390_free_pool (struct constant_pool *pool)
4876 for (i = 0; i < NR_C_MODES; i++)
4878 struct constant *c = pool->constants[i];
4881 struct constant *next = c->next;
4887 BITMAP_XFREE (pool->insns);
4892 /* Collect main literal pool. Return NULL on overflow. */
4894 static struct constant_pool *
4895 s390_mainpool_start (void)
4897 struct constant_pool *pool;
4900 pool = s390_alloc_pool ();
4902 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4904 if (GET_CODE (insn) == INSN
4905 && GET_CODE (PATTERN (insn)) == SET
4906 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC_VOLATILE
4907 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPECV_MAIN_POOL)
4909 if (pool->pool_insn)
4911 pool->pool_insn = insn;
4914 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4916 rtx pool_ref = NULL_RTX;
4917 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4920 rtx constant = get_pool_constant (pool_ref);
4921 enum machine_mode mode = get_pool_mode (pool_ref);
4922 s390_add_constant (pool, constant, mode);
4927 if (!pool->pool_insn)
4930 if (pool->size >= 4096)
4932 /* We're going to chunkify the pool, so remove the main
4933 pool placeholder insn. */
4934 remove_insn (pool->pool_insn);
4936 s390_free_pool (pool);
4943 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4944 Modify the current function to output the pool constants as well as
4945 the pool register setup instruction. */
4948 s390_mainpool_finish (struct constant_pool *pool)
4950 rtx base_reg = SET_DEST (PATTERN (pool->pool_insn));
4953 /* If the pool is empty, we're done. */
4954 if (pool->size == 0)
4956 remove_insn (pool->pool_insn);
4957 s390_free_pool (pool);
4961 /* We need correct insn addresses. */
4962 shorten_branches (get_insns ());
4964 /* On zSeries, we use a LARL to load the pool register. The pool is
4965 located in the .rodata section, so we emit it after the function. */
4966 if (TARGET_CPU_ZARCH)
4968 insn = gen_main_base_64 (base_reg, pool->label);
4969 insn = emit_insn_after (insn, pool->pool_insn);
4970 INSN_ADDRESSES_NEW (insn, -1);
4971 remove_insn (pool->pool_insn);
4973 insn = get_last_insn ();
4974 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4975 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4977 s390_dump_pool (pool, 0);
4980 /* On S/390, if the total size of the function's code plus literal pool
4981 does not exceed 4096 bytes, we use BASR to set up a function base
4982 pointer, and emit the literal pool at the end of the function. */
4983 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4984 + pool->size + 8 /* alignment slop */ < 4096)
4986 insn = gen_main_base_31_small (base_reg, pool->label);
4987 insn = emit_insn_after (insn, pool->pool_insn);
4988 INSN_ADDRESSES_NEW (insn, -1);
4989 remove_insn (pool->pool_insn);
4991 insn = emit_label_after (pool->label, insn);
4992 INSN_ADDRESSES_NEW (insn, -1);
4994 insn = get_last_insn ();
4995 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4996 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4998 s390_dump_pool (pool, 1);
5001 /* Otherwise, we emit an inline literal pool and use BASR to branch
5002 over it, setting up the pool register at the same time. */
5005 rtx pool_end = gen_label_rtx ();
5007 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
5008 insn = emit_insn_after (insn, pool->pool_insn);
5009 INSN_ADDRESSES_NEW (insn, -1);
5010 remove_insn (pool->pool_insn);
5012 insn = emit_label_after (pool->label, insn);
5013 INSN_ADDRESSES_NEW (insn, -1);
5015 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
5016 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
5018 insn = emit_label_after (pool_end, pool->pool_insn);
5019 INSN_ADDRESSES_NEW (insn, -1);
5021 s390_dump_pool (pool, 1);
5025 /* Replace all literal pool references. */
5027 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5030 replace_ltrel_base (&PATTERN (insn));
5032 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5034 rtx addr, pool_ref = NULL_RTX;
5035 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5038 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
5039 get_pool_mode (pool_ref));
5040 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
5041 INSN_CODE (insn) = -1;
5047 /* Free the pool. */
5048 s390_free_pool (pool);
5051 /* POOL holds the main literal pool as collected by s390_mainpool_start.
5052 We have decided we cannot use this pool, so revert all changes
5053 to the current function that were done by s390_mainpool_start. */
5055 s390_mainpool_cancel (struct constant_pool *pool)
5057 /* We didn't actually change the instruction stream, so simply
5058 free the pool memory. */
5059 s390_free_pool (pool);
5063 /* Chunkify the literal pool. */
5065 #define S390_POOL_CHUNK_MIN 0xc00
5066 #define S390_POOL_CHUNK_MAX 0xe00
5068 static struct constant_pool *
5069 s390_chunkify_start (void)
5071 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
5074 rtx pending_ltrel = NULL_RTX;
5077 rtx (*gen_reload_base) (rtx, rtx) =
5078 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
5081 /* We need correct insn addresses. */
5083 shorten_branches (get_insns ());
5085 /* Scan all insns and move literals to pool chunks. */
5087 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5089 /* Check for pending LTREL_BASE. */
5092 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
5095 if (ltrel_base == pending_ltrel)
5096 pending_ltrel = NULL_RTX;
5102 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5104 rtx pool_ref = NULL_RTX;
5105 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5108 rtx constant = get_pool_constant (pool_ref);
5109 enum machine_mode mode = get_pool_mode (pool_ref);
5112 curr_pool = s390_start_pool (&pool_list, insn);
5114 s390_add_constant (curr_pool, constant, mode);
5115 s390_add_pool_insn (curr_pool, insn);
5117 /* Don't split the pool chunk between a LTREL_OFFSET load
5118 and the corresponding LTREL_BASE. */
5119 if (GET_CODE (constant) == CONST
5120 && GET_CODE (XEXP (constant, 0)) == UNSPEC
5121 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
5125 pending_ltrel = pool_ref;
5130 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
5133 s390_add_pool_insn (curr_pool, insn);
5134 /* An LTREL_BASE must follow within the same basic block. */
5140 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
5141 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
5144 if (TARGET_CPU_ZARCH)
5146 if (curr_pool->size < S390_POOL_CHUNK_MAX)
5149 s390_end_pool (curr_pool, NULL_RTX);
5154 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
5155 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
5158 /* We will later have to insert base register reload insns.
5159 Those will have an effect on code size, which we need to
5160 consider here. This calculation makes rather pessimistic
5161 worst-case assumptions. */
5162 if (GET_CODE (insn) == CODE_LABEL)
5165 if (chunk_size < S390_POOL_CHUNK_MIN
5166 && curr_pool->size < S390_POOL_CHUNK_MIN)
5169 /* Pool chunks can only be inserted after BARRIERs ... */
5170 if (GET_CODE (insn) == BARRIER)
5172 s390_end_pool (curr_pool, insn);
5177 /* ... so if we don't find one in time, create one. */
5178 else if ((chunk_size > S390_POOL_CHUNK_MAX
5179 || curr_pool->size > S390_POOL_CHUNK_MAX))
5181 rtx label, jump, barrier;
5183 /* We can insert the barrier only after a 'real' insn. */
5184 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
5186 if (get_attr_length (insn) == 0)
5189 /* Don't separate LTREL_BASE from the corresponding
5190 LTREL_OFFSET load. */
5194 label = gen_label_rtx ();
5195 jump = emit_jump_insn_after (gen_jump (label), insn);
5196 barrier = emit_barrier_after (jump);
5197 insn = emit_label_after (label, barrier);
5198 JUMP_LABEL (jump) = label;
5199 LABEL_NUSES (label) = 1;
5201 INSN_ADDRESSES_NEW (jump, -1);
5202 INSN_ADDRESSES_NEW (barrier, -1);
5203 INSN_ADDRESSES_NEW (insn, -1);
5205 s390_end_pool (curr_pool, barrier);
5213 s390_end_pool (curr_pool, NULL_RTX);
5218 /* Find all labels that are branched into
5219 from an insn belonging to a different chunk. */
5221 far_labels = BITMAP_XMALLOC ();
5223 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5225 /* Labels marked with LABEL_PRESERVE_P can be target
5226 of non-local jumps, so we have to mark them.
5227 The same holds for named labels.
5229 Don't do that, however, if it is the label before
5232 if (GET_CODE (insn) == CODE_LABEL
5233 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
5235 rtx vec_insn = next_real_insn (insn);
5236 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5237 PATTERN (vec_insn) : NULL_RTX;
5239 || !(GET_CODE (vec_pat) == ADDR_VEC
5240 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5241 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
5244 /* If we have a direct jump (conditional or unconditional)
5245 or a casesi jump, check all potential targets. */
5246 else if (GET_CODE (insn) == JUMP_INSN)
5248 rtx pat = PATTERN (insn);
5249 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
5250 pat = XVECEXP (pat, 0, 0);
5252 if (GET_CODE (pat) == SET)
5254 rtx label = JUMP_LABEL (insn);
5257 if (s390_find_pool (pool_list, label)
5258 != s390_find_pool (pool_list, insn))
5259 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5262 else if (GET_CODE (pat) == PARALLEL
5263 && XVECLEN (pat, 0) == 2
5264 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
5265 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
5266 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
5268 /* Find the jump table used by this casesi jump. */
5269 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
5270 rtx vec_insn = next_real_insn (vec_label);
5271 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5272 PATTERN (vec_insn) : NULL_RTX;
5274 && (GET_CODE (vec_pat) == ADDR_VEC
5275 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5277 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
5279 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
5281 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
5283 if (s390_find_pool (pool_list, label)
5284 != s390_find_pool (pool_list, insn))
5285 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5292 /* Insert base register reload insns before every pool. */
5294 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5296 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5298 rtx insn = curr_pool->first_insn;
5299 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
5302 /* Insert base register reload insns at every far label. */
5304 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5305 if (GET_CODE (insn) == CODE_LABEL
5306 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
5308 struct constant_pool *pool = s390_find_pool (pool_list, insn);
5311 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5313 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
5318 BITMAP_XFREE (far_labels);
5321 /* Recompute insn addresses. */
5323 init_insn_lengths ();
5324 shorten_branches (get_insns ());
5329 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5330 After we have decided to use this list, finish implementing
5331 all changes to the current function as required. */
5334 s390_chunkify_finish (struct constant_pool *pool_list)
5336 struct constant_pool *curr_pool = NULL;
5340 /* Replace all literal pool references. */
5342 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5345 replace_ltrel_base (&PATTERN (insn));
5347 curr_pool = s390_find_pool (pool_list, insn);
5351 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5353 rtx addr, pool_ref = NULL_RTX;
5354 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5357 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
5358 get_pool_mode (pool_ref));
5359 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
5360 INSN_CODE (insn) = -1;
5365 /* Dump out all literal pools. */
5367 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5368 s390_dump_pool (curr_pool, 0);
5370 /* Free pool list. */
5374 struct constant_pool *next = pool_list->next;
5375 s390_free_pool (pool_list);
5380 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5381 We have decided we cannot use this list, so revert all changes
5382 to the current function that were done by s390_chunkify_start. */
5385 s390_chunkify_cancel (struct constant_pool *pool_list)
5387 struct constant_pool *curr_pool = NULL;
5390 /* Remove all pool placeholder insns. */
5392 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5394 /* Did we insert an extra barrier? Remove it. */
5395 rtx barrier = PREV_INSN (curr_pool->pool_insn);
5396 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
5397 rtx label = NEXT_INSN (curr_pool->pool_insn);
5399 if (jump && GET_CODE (jump) == JUMP_INSN
5400 && barrier && GET_CODE (barrier) == BARRIER
5401 && label && GET_CODE (label) == CODE_LABEL
5402 && GET_CODE (PATTERN (jump)) == SET
5403 && SET_DEST (PATTERN (jump)) == pc_rtx
5404 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
5405 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
5408 remove_insn (barrier);
5409 remove_insn (label);
5412 remove_insn (curr_pool->pool_insn);
5415 /* Remove all base register reload insns. */
5417 for (insn = get_insns (); insn; )
5419 rtx next_insn = NEXT_INSN (insn);
5421 if (GET_CODE (insn) == INSN
5422 && GET_CODE (PATTERN (insn)) == SET
5423 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
5424 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
5430 /* Free pool list. */
5434 struct constant_pool *next = pool_list->next;
5435 s390_free_pool (pool_list);
5441 /* Output the constant pool entry EXP in mode MODE with alignment ALIGN. */
5444 s390_output_pool_entry (rtx exp, enum machine_mode mode, unsigned int align)
5448 switch (GET_MODE_CLASS (mode))
5451 if (GET_CODE (exp) != CONST_DOUBLE)
5454 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
5455 assemble_real (r, mode, align);
5459 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
5468 /* Rework the prologue/epilogue to avoid saving/restoring
5469 registers unnecessarily. BASE_USED specifies whether
5470 the literal pool base register needs to be saved. */
5473 s390_optimize_prologue (bool base_used)
5475 rtx insn, new_insn, next_insn;
5477 /* Do a final recompute of the frame-related data. */
5479 s390_register_info (base_used, cfun_frame_layout.save_return_addr_p);
5480 regs_ever_live[BASE_REGNUM] = base_used;
5481 regs_ever_live[RETURN_REGNUM] = cfun_frame_layout.save_return_addr_p;
5482 regs_ever_live[STACK_POINTER_REGNUM] = cfun_frame_layout.frame_size > 0;
5484 /* If all special registers are in fact used, there's nothing we
5485 can do, so no point in walking the insn list. */
5487 if (cfun_frame_layout.first_save_gpr <= BASE_REGNUM
5488 && cfun_frame_layout.last_save_gpr >= BASE_REGNUM
5489 && (TARGET_CPU_ZARCH
5490 || (cfun_frame_layout.first_save_gpr <= RETURN_REGNUM
5491 && cfun_frame_layout.last_save_gpr >= RETURN_REGNUM)))
5494 /* Search for prologue/epilogue insns and replace them. */
5496 for (insn = get_insns (); insn; insn = next_insn)
5498 int first, last, off;
5499 rtx set, base, offset;
5501 next_insn = NEXT_INSN (insn);
5503 if (GET_CODE (insn) != INSN)
5506 if (GET_CODE (PATTERN (insn)) == PARALLEL
5507 && store_multiple_operation (PATTERN (insn), VOIDmode))
5509 set = XVECEXP (PATTERN (insn), 0, 0);
5510 first = REGNO (SET_SRC (set));
5511 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5512 offset = const0_rtx;
5513 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5514 off = INTVAL (offset);
5516 if (GET_CODE (base) != REG || off < 0)
5518 if (REGNO (base) != STACK_POINTER_REGNUM
5519 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5521 if (first > BASE_REGNUM || last < BASE_REGNUM)
5524 if (cfun_frame_layout.first_save_gpr != -1)
5526 new_insn = save_gprs (base,
5527 off + (cfun_frame_layout.first_save_gpr
5528 - first) * UNITS_PER_WORD,
5529 cfun_frame_layout.first_save_gpr,
5530 cfun_frame_layout.last_save_gpr);
5531 new_insn = emit_insn_before (new_insn, insn);
5532 INSN_ADDRESSES_NEW (new_insn, -1);
5539 if (GET_CODE (PATTERN (insn)) == SET
5540 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
5541 && REGNO (SET_SRC (PATTERN (insn))) == BASE_REGNUM
5542 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
5544 set = PATTERN (insn);
5545 offset = const0_rtx;
5546 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5547 off = INTVAL (offset);
5549 if (GET_CODE (base) != REG || off < 0)
5551 if (REGNO (base) != STACK_POINTER_REGNUM
5552 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5554 if (cfun_frame_layout.first_save_gpr != -1)
5556 new_insn = save_gprs (base,
5557 off + (cfun_frame_layout.first_save_gpr
5558 - BASE_REGNUM) * UNITS_PER_WORD,
5559 cfun_frame_layout.first_save_gpr,
5560 cfun_frame_layout.last_save_gpr);
5561 new_insn = emit_insn_before (new_insn, insn);
5562 INSN_ADDRESSES_NEW (new_insn, -1);
5569 if (GET_CODE (PATTERN (insn)) == PARALLEL
5570 && load_multiple_operation (PATTERN (insn), VOIDmode))
5572 set = XVECEXP (PATTERN (insn), 0, 0);
5573 first = REGNO (SET_DEST (set));
5574 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5575 offset = const0_rtx;
5576 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5577 off = INTVAL (offset);
5579 if (GET_CODE (base) != REG || off < 0)
5581 if (REGNO (base) != STACK_POINTER_REGNUM
5582 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5584 if (first > BASE_REGNUM || last < BASE_REGNUM)
5587 if (cfun_frame_layout.first_restore_gpr != -1)
5589 new_insn = restore_gprs (base,
5590 off + (cfun_frame_layout.first_restore_gpr
5591 - first) * UNITS_PER_WORD,
5592 cfun_frame_layout.first_restore_gpr,
5593 cfun_frame_layout.last_restore_gpr);
5594 new_insn = emit_insn_before (new_insn, insn);
5595 INSN_ADDRESSES_NEW (new_insn, -1);
5602 if (GET_CODE (PATTERN (insn)) == SET
5603 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
5604 && REGNO (SET_DEST (PATTERN (insn))) == BASE_REGNUM
5605 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
5607 set = PATTERN (insn);
5608 offset = const0_rtx;
5609 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5610 off = INTVAL (offset);
5612 if (GET_CODE (base) != REG || off < 0)
5614 if (REGNO (base) != STACK_POINTER_REGNUM
5615 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5617 if (cfun_frame_layout.first_restore_gpr != -1)
5619 new_insn = restore_gprs (base,
5620 off + (cfun_frame_layout.first_restore_gpr
5621 - BASE_REGNUM) * UNITS_PER_WORD,
5622 cfun_frame_layout.first_restore_gpr,
5623 cfun_frame_layout.last_restore_gpr);
5624 new_insn = emit_insn_before (new_insn, insn);
5625 INSN_ADDRESSES_NEW (new_insn, -1);
5634 /* Perform machine-dependent processing. */
5639 bool base_used = false;
5640 bool pool_overflow = false;
5642 /* Make sure all splits have been performed; splits after
5643 machine_dependent_reorg might confuse insn length counts. */
5644 split_all_insns_noflow ();
5647 /* Install the main literal pool and the associated base
5648 register load insns.
5650 In addition, there are two problematic situations we need
5653 - the literal pool might be > 4096 bytes in size, so that
5654 some of its elements cannot be directly accessed
5656 - a branch target might be > 64K away from the branch, so that
5657 it is not possible to use a PC-relative instruction.
5659 To fix those, we split the single literal pool into multiple
5660 pool chunks, reloading the pool base register at various
5661 points throughout the function to ensure it always points to
5662 the pool chunk the following code expects, and / or replace
5663 PC-relative branches by absolute branches.
5665 However, the two problems are interdependent: splitting the
5666 literal pool can move a branch further away from its target,
5667 causing the 64K limit to overflow, and on the other hand,
5668 replacing a PC-relative branch by an absolute branch means
5669 we need to put the branch target address into the literal
5670 pool, possibly causing it to overflow.
5672 So, we loop trying to fix up both problems until we manage
5673 to satisfy both conditions at the same time. Note that the
5674 loop is guaranteed to terminate as every pass of the loop
5675 strictly decreases the total number of PC-relative branches
5676 in the function. (This is not completely true as there
5677 might be branch-over-pool insns introduced by chunkify_start.
5678 Those never need to be split however.) */
5682 struct constant_pool *pool = NULL;
5684 /* Collect the literal pool. */
5687 pool = s390_mainpool_start ();
5689 pool_overflow = true;
5692 /* If literal pool overflowed, start to chunkify it. */
5694 pool = s390_chunkify_start ();
5696 /* Split out-of-range branches. If this has created new
5697 literal pool entries, cancel current chunk list and
5698 recompute it. zSeries machines have large branch
5699 instructions, so we never need to split a branch. */
5700 if (!TARGET_CPU_ZARCH && s390_split_branches ())
5703 s390_chunkify_cancel (pool);
5705 s390_mainpool_cancel (pool);
5710 /* If we made it up to here, both conditions are satisfied.
5711 Finish up literal pool related changes. */
5712 if ((pool_overflow || pool->size > 0)
5713 && REGNO (cfun->machine->base_reg) == BASE_REGNUM)
5717 s390_chunkify_finish (pool);
5719 s390_mainpool_finish (pool);
5724 s390_optimize_prologue (base_used);
5728 /* Return an RTL expression representing the value of the return address
5729 for the frame COUNT steps up from the current frame. FRAME is the
5730 frame pointer of that frame. */
5733 s390_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
5738 /* Without backchain, we fail for all but the current frame. */
5740 if (!TARGET_BACKCHAIN && !TARGET_KERNEL_BACKCHAIN && count > 0)
5743 /* For the current frame, we need to make sure the initial
5744 value of RETURN_REGNUM is actually saved. */
5748 cfun_frame_layout.save_return_addr_p = true;
5749 return gen_rtx_MEM (Pmode, return_address_pointer_rtx);
5752 if (TARGET_BACKCHAIN)
5753 offset = RETURN_REGNUM * UNITS_PER_WORD;
5755 offset = -2 * UNITS_PER_WORD;
5757 addr = plus_constant (frame, offset);
5758 addr = memory_address (Pmode, addr);
5759 return gen_rtx_MEM (Pmode, addr);
5762 /* Find first call clobbered register unused in a function.
5763 This could be used as base register in a leaf function
5764 or for holding the return address before epilogue. */
5767 find_unused_clobbered_reg (void)
5770 for (i = 0; i < 6; i++)
5771 if (!regs_ever_live[i])
5776 /* Determine the frame area which actually has to be accessed
5777 in the function epilogue. The values are stored at the
5778 given pointers AREA_BOTTOM (address of the lowest used stack
5779 address) and AREA_TOP (address of the first item which does
5780 not belong to the stack frame). */
5783 s390_frame_area (int *area_bottom, int *area_top)
5791 if (cfun_frame_layout.first_restore_gpr != -1)
5793 b = (cfun_frame_layout.gprs_offset
5794 + cfun_frame_layout.first_restore_gpr * UNITS_PER_WORD);
5795 t = b + (cfun_frame_layout.last_restore_gpr
5796 - cfun_frame_layout.first_restore_gpr + 1) * UNITS_PER_WORD;
5799 if (TARGET_64BIT && cfun_save_high_fprs_p)
5801 b = MIN (b, cfun_frame_layout.f8_offset);
5802 t = MAX (t, (cfun_frame_layout.f8_offset
5803 + cfun_frame_layout.high_fprs * 8));
5807 for (i = 2; i < 4; i++)
5808 if (cfun_fpr_bit_p (i))
5810 b = MIN (b, cfun_frame_layout.f4_offset + (i - 2) * 8);
5811 t = MAX (t, cfun_frame_layout.f4_offset + (i - 1) * 8);
5818 /* Fill cfun->machine with info about register usage of current
5819 function. BASE_USED and RETURN_ADDR_USED specify whether we assume the
5820 base and return address register will need to be saved. */
5823 s390_register_info (int base_used, int return_addr_used)
5828 /* fprs 8 - 15 are call saved for 64 Bit ABI. */
5829 cfun_frame_layout.fpr_bitmap = 0;
5830 cfun_frame_layout.high_fprs = 0;
5832 for (i = 24; i < 32; i++)
5833 if (regs_ever_live[i] && !global_regs[i])
5835 cfun_set_fpr_bit (i - 16);
5836 cfun_frame_layout.high_fprs++;
5839 /* Find first and last gpr to be saved. We trust regs_ever_live
5840 data, except that we don't save and restore global registers.
5842 Also, all registers with special meaning to the compiler need
5843 to be handled extra. */
5845 for (i = 0; i < 16; i++)
5846 live_regs[i] = regs_ever_live[i] && !global_regs[i];
5849 live_regs[PIC_OFFSET_TABLE_REGNUM] =
5850 regs_ever_live[PIC_OFFSET_TABLE_REGNUM];
5852 live_regs[BASE_REGNUM] = base_used;
5853 live_regs[RETURN_REGNUM] = return_addr_used;
5854 live_regs[STACK_POINTER_REGNUM] = (!current_function_is_leaf
5855 || TARGET_TPF_PROFILING
5856 || cfun_save_high_fprs_p
5857 || get_frame_size () > 0
5858 || current_function_calls_alloca
5859 || current_function_stdarg);
5861 for (i = 6; i < 16; i++)
5864 for (j = 15; j > i; j--)
5870 /* Nothing to save/restore. */
5871 cfun_frame_layout.first_save_gpr = -1;
5872 cfun_frame_layout.first_restore_gpr = -1;
5873 cfun_frame_layout.last_save_gpr = -1;
5874 cfun_frame_layout.last_restore_gpr = -1;
5878 /* Save / Restore from gpr i to j. */
5879 cfun_frame_layout.first_save_gpr = i;
5880 cfun_frame_layout.first_restore_gpr = i;
5881 cfun_frame_layout.last_save_gpr = j;
5882 cfun_frame_layout.last_restore_gpr = j;
5885 if (current_function_stdarg)
5887 /* Varargs functions need to save gprs 2 to 6. */
5888 if (cfun_frame_layout.first_save_gpr == -1
5889 || cfun_frame_layout.first_save_gpr > 2)
5890 cfun_frame_layout.first_save_gpr = 2;
5892 if (cfun_frame_layout.last_save_gpr == -1
5893 || cfun_frame_layout.last_save_gpr < 6)
5894 cfun_frame_layout.last_save_gpr = 6;
5896 /* Mark f0, f2 for 31 bit and f0-f4 for 64 bit to be saved. */
5897 for (i = 0; i < (TARGET_64BIT ? 4 : 2); i++)
5898 cfun_set_fpr_bit (i);
5902 for (i = 2; i < 4; i++)
5903 if (regs_ever_live[i + 16] && !global_regs[i + 16])
5904 cfun_set_fpr_bit (i);
5907 /* Fill cfun->machine with info about frame of current
5908 function. BASE_USED and RETURN_ADDR_USED specify whether we assume the
5909 base and return address register will need to be saved. */
5912 s390_frame_info (int base_used, int return_addr_used)
5916 cfun_frame_layout.frame_size = get_frame_size ();
5918 s390_register_info (base_used, return_addr_used);
5920 if (!TARGET_64BIT && cfun_frame_layout.frame_size > 0x7fff0000)
5921 fatal_error ("Total size of local variables exceeds architecture limit.");
5923 cfun_frame_layout.save_backchain_p = (TARGET_BACKCHAIN
5924 || TARGET_KERNEL_BACKCHAIN);
5926 if (TARGET_BACKCHAIN)
5928 cfun_frame_layout.backchain_offset = 0;
5929 cfun_frame_layout.f0_offset = 16 * UNITS_PER_WORD;
5930 cfun_frame_layout.f4_offset = cfun_frame_layout.f0_offset + 2 * 8;
5931 cfun_frame_layout.f8_offset = -cfun_frame_layout.high_fprs * 8;
5932 cfun_frame_layout.gprs_offset = (cfun_frame_layout.first_save_gpr
5935 else if (TARGET_KERNEL_BACKCHAIN)
5937 cfun_frame_layout.backchain_offset = (STACK_POINTER_OFFSET
5939 cfun_frame_layout.gprs_offset
5940 = (cfun_frame_layout.backchain_offset
5941 - (STACK_POINTER_REGNUM - cfun_frame_layout.first_save_gpr + 1)
5946 cfun_frame_layout.f4_offset
5947 = (cfun_frame_layout.gprs_offset
5948 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
5950 cfun_frame_layout.f0_offset
5951 = (cfun_frame_layout.f4_offset
5952 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
5956 /* On 31 bit we have to care about alignment of the
5957 floating point regs to provide fastest access. */
5958 cfun_frame_layout.f0_offset
5959 = ((cfun_frame_layout.gprs_offset
5960 & ~(STACK_BOUNDARY / BITS_PER_UNIT - 1))
5961 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
5963 cfun_frame_layout.f4_offset
5964 = (cfun_frame_layout.f0_offset
5965 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
5968 else /* no backchain */
5970 cfun_frame_layout.f4_offset
5971 = (STACK_POINTER_OFFSET
5972 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
5974 cfun_frame_layout.f0_offset
5975 = (cfun_frame_layout.f4_offset
5976 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
5978 cfun_frame_layout.gprs_offset
5979 = cfun_frame_layout.f0_offset - cfun_gprs_save_area_size;
5982 if (current_function_is_leaf
5983 && !TARGET_TPF_PROFILING
5984 && cfun_frame_layout.frame_size == 0
5985 && !cfun_save_high_fprs_p
5986 && !current_function_calls_alloca
5987 && !current_function_stdarg)
5990 if (TARGET_BACKCHAIN)
5991 cfun_frame_layout.frame_size += (STARTING_FRAME_OFFSET
5992 + cfun_frame_layout.high_fprs * 8);
5995 cfun_frame_layout.frame_size += (cfun_frame_layout.save_backchain_p
5998 /* No alignment trouble here because f8-f15 are only saved under
6000 cfun_frame_layout.f8_offset = (MIN (MIN (cfun_frame_layout.f0_offset,
6001 cfun_frame_layout.f4_offset),
6002 cfun_frame_layout.gprs_offset)
6003 - cfun_frame_layout.high_fprs * 8);
6005 cfun_frame_layout.frame_size += cfun_frame_layout.high_fprs * 8;
6007 for (i = 0; i < 8; i++)
6008 if (cfun_fpr_bit_p (i))
6009 cfun_frame_layout.frame_size += 8;
6011 cfun_frame_layout.frame_size += cfun_gprs_save_area_size;
6013 /* If under 31 bit an odd number of gprs has to be saved we have to adjust
6014 the frame size to sustain 8 byte alignment of stack frames. */
6015 cfun_frame_layout.frame_size = ((cfun_frame_layout.frame_size +
6016 STACK_BOUNDARY / BITS_PER_UNIT - 1)
6017 & ~(STACK_BOUNDARY / BITS_PER_UNIT - 1));
6019 cfun_frame_layout.frame_size += current_function_outgoing_args_size;
6023 /* Return offset between argument pointer and frame pointer
6024 initially after prologue. */
6027 s390_arg_frame_offset (void)
6029 /* See the comment in s390_emit_prologue about the assumptions we make
6030 whether or not the base and return address register need to be saved. */
6031 int return_addr_used = !current_function_is_leaf
6032 || TARGET_TPF_PROFILING
6033 || regs_ever_live[RETURN_REGNUM]
6034 || cfun_frame_layout.save_return_addr_p;
6036 s390_frame_info (1, !TARGET_CPU_ZARCH || return_addr_used);
6038 return cfun_frame_layout.frame_size + STACK_POINTER_OFFSET;
6041 /* Return offset between return address pointer (location of r14
6042 on the stack) and frame pointer initially after prologue. */
6045 s390_return_address_offset (void)
6047 s390_frame_info (1, 1);
6049 if (cfun_frame_layout.last_save_gpr < RETURN_REGNUM)
6052 return (cfun_frame_layout.frame_size + cfun_frame_layout.gprs_offset
6053 + (RETURN_REGNUM - cfun_frame_layout.first_save_gpr) * UNITS_PER_WORD);
6056 /* Emit insn to save fpr REGNUM at offset OFFSET relative
6057 to register BASE. Return generated insn. */
6060 save_fpr (rtx base, int offset, int regnum)
6063 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
6064 set_mem_alias_set (addr, s390_sr_alias_set);
6066 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
6069 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
6070 to register BASE. Return generated insn. */
6073 restore_fpr (rtx base, int offset, int regnum)
6076 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
6077 set_mem_alias_set (addr, s390_sr_alias_set);
6079 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
6082 /* Generate insn to save registers FIRST to LAST into
6083 the register save area located at offset OFFSET
6084 relative to register BASE. */
6087 save_gprs (rtx base, int offset, int first, int last)
6089 rtx addr, insn, note;
6092 addr = plus_constant (base, offset);
6093 addr = gen_rtx_MEM (Pmode, addr);
6094 set_mem_alias_set (addr, s390_sr_alias_set);
6096 /* Special-case single register. */
6100 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
6102 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
6104 RTX_FRAME_RELATED_P (insn) = 1;
6109 insn = gen_store_multiple (addr,
6110 gen_rtx_REG (Pmode, first),
6111 GEN_INT (last - first + 1));
6114 /* We need to set the FRAME_RELATED flag on all SETs
6115 inside the store-multiple pattern.
6117 However, we must not emit DWARF records for registers 2..5
6118 if they are stored for use by variable arguments ...
6120 ??? Unfortunately, it is not enough to simply not the the
6121 FRAME_RELATED flags for those SETs, because the first SET
6122 of the PARALLEL is always treated as if it had the flag
6123 set, even if it does not. Therefore we emit a new pattern
6124 without those registers as REG_FRAME_RELATED_EXPR note. */
6128 rtx pat = PATTERN (insn);
6130 for (i = 0; i < XVECLEN (pat, 0); i++)
6131 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
6132 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
6134 RTX_FRAME_RELATED_P (insn) = 1;
6138 addr = plus_constant (base, offset + (6 - first) * UNITS_PER_WORD);
6139 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
6140 gen_rtx_REG (Pmode, 6),
6141 GEN_INT (last - 6 + 1));
6142 note = PATTERN (note);
6145 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6146 note, REG_NOTES (insn));
6148 for (i = 0; i < XVECLEN (note, 0); i++)
6149 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
6150 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
6152 RTX_FRAME_RELATED_P (insn) = 1;
6158 /* Generate insn to restore registers FIRST to LAST from
6159 the register save area located at offset OFFSET
6160 relative to register BASE. */
6163 restore_gprs (rtx base, int offset, int first, int last)
6167 addr = plus_constant (base, offset);
6168 addr = gen_rtx_MEM (Pmode, addr);
6169 set_mem_alias_set (addr, s390_sr_alias_set);
6171 /* Special-case single register. */
6175 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
6177 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
6182 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
6184 GEN_INT (last - first + 1));
6188 /* Return insn sequence to load the GOT register. */
6190 static GTY(()) rtx got_symbol;
6192 s390_load_got (void)
6198 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
6199 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
6204 if (TARGET_CPU_ZARCH)
6206 emit_move_insn (pic_offset_table_rtx, got_symbol);
6212 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
6213 UNSPEC_LTREL_OFFSET);
6214 offset = gen_rtx_CONST (Pmode, offset);
6215 offset = force_const_mem (Pmode, offset);
6217 emit_move_insn (pic_offset_table_rtx, offset);
6219 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
6221 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
6223 emit_move_insn (pic_offset_table_rtx, offset);
6226 insns = get_insns ();
6231 /* Expand the prologue into a bunch of separate insns. */
6234 s390_emit_prologue (void)
6242 /* At this point, we decide whether we'll need to save/restore the
6243 return address register. This decision is final on zSeries machines;
6244 on S/390 it can still be overridden in s390_split_branches. */
6246 if (!current_function_is_leaf
6247 || TARGET_TPF_PROFILING
6248 || regs_ever_live[RETURN_REGNUM])
6249 cfun_frame_layout.save_return_addr_p = 1;
6251 /* Decide which register to use as literal pool base. In small leaf
6252 functions, try to use an unused call-clobbered register as base
6253 register to avoid save/restore overhead. */
6255 if (current_function_is_leaf && !regs_ever_live[5])
6256 cfun->machine->base_reg = gen_rtx_REG (Pmode, 5);
6258 cfun->machine->base_reg = gen_rtx_REG (Pmode, BASE_REGNUM);
6260 regs_ever_live[REGNO (cfun->machine->base_reg)] = 1;
6262 /* Compute frame info. Note that at this point, we assume the base
6263 register and -on S/390- the return register always need to be saved.
6264 This is done because the usage of these registers might change even
6265 after the prologue was emitted. If it turns out later that we really
6266 don't need them, the prologue/epilogue code is modified again. */
6268 s390_frame_info (1, !TARGET_CPU_ZARCH
6269 || cfun_frame_layout.save_return_addr_p);
6271 /* We need to update regs_ever_live to avoid data-flow problems. */
6273 regs_ever_live[BASE_REGNUM] = 1;
6274 regs_ever_live[RETURN_REGNUM] = (!TARGET_CPU_ZARCH
6275 || cfun_frame_layout.save_return_addr_p);
6276 regs_ever_live[STACK_POINTER_REGNUM] = cfun_frame_layout.frame_size > 0;
6278 /* Annotate all constant pool references to let the scheduler know
6279 they implicitly use the base register. */
6281 push_topmost_sequence ();
6283 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
6285 annotate_constant_pool_refs (&PATTERN (insn));
6287 pop_topmost_sequence ();
6289 /* Choose best register to use for temp use within prologue.
6290 See below for why TPF must use the register 1. */
6292 if (!current_function_is_leaf && !TARGET_TPF_PROFILING)
6293 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
6295 temp_reg = gen_rtx_REG (Pmode, 1);
6297 /* Save call saved gprs. */
6298 if (cfun_frame_layout.first_save_gpr != -1)
6300 insn = save_gprs (stack_pointer_rtx,
6301 cfun_frame_layout.gprs_offset,
6302 cfun_frame_layout.first_save_gpr,
6303 cfun_frame_layout.last_save_gpr);
6307 /* Dummy insn to mark literal pool slot. */
6309 emit_insn (gen_main_pool (cfun->machine->base_reg));
6311 offset = cfun_frame_layout.f0_offset;
6313 /* Save f0 and f2. */
6314 for (i = 0; i < 2; i++)
6316 if (cfun_fpr_bit_p (i))
6318 save_fpr (stack_pointer_rtx, offset, i + 16);
6321 else if (TARGET_BACKCHAIN)
6325 /* Save f4 and f6. */
6326 offset = cfun_frame_layout.f4_offset;
6327 for (i = 2; i < 4; i++)
6329 if (cfun_fpr_bit_p (i))
6331 insn = save_fpr (stack_pointer_rtx, offset, i + 16);
6334 /* If f4 and f6 are call clobbered they are saved due to stdargs and
6335 therefore are not frame related. */
6336 if (!call_really_used_regs[i + 16])
6337 RTX_FRAME_RELATED_P (insn) = 1;
6339 else if (TARGET_BACKCHAIN)
6343 if (!TARGET_BACKCHAIN
6344 && cfun_save_high_fprs_p
6345 && cfun_frame_layout.f8_offset + cfun_frame_layout.high_fprs * 8 > 0)
6347 offset = (cfun_frame_layout.f8_offset
6348 + (cfun_frame_layout.high_fprs - 1) * 8);
6350 for (i = 15; i > 7 && offset >= 0; i--)
6351 if (cfun_fpr_bit_p (i))
6353 insn = save_fpr (stack_pointer_rtx, offset, i + 16);
6355 RTX_FRAME_RELATED_P (insn) = 1;
6358 if (offset >= cfun_frame_layout.f8_offset)
6362 if (TARGET_BACKCHAIN)
6363 next_fpr = cfun_save_high_fprs_p ? 31 : 0;
6365 /* Decrement stack pointer. */
6367 if (cfun_frame_layout.frame_size > 0)
6369 rtx frame_off = GEN_INT (-cfun_frame_layout.frame_size);
6371 if (s390_stack_size)
6373 HOST_WIDE_INT stack_check_mask = ((s390_stack_size - 1)
6374 & ~(s390_stack_guard - 1));
6375 rtx t = gen_rtx_AND (Pmode, stack_pointer_rtx,
6376 GEN_INT (stack_check_mask));
6379 gen_cmpdi (t, const0_rtx);
6381 gen_cmpsi (t, const0_rtx);
6383 emit_insn (gen_conditional_trap (gen_rtx_EQ (CCmode,
6384 gen_rtx_REG (CCmode,
6390 if (s390_warn_framesize > 0
6391 && cfun_frame_layout.frame_size >= s390_warn_framesize)
6392 warning ("frame size of `%s' is " HOST_WIDE_INT_PRINT_DEC " bytes",
6393 current_function_name (), cfun_frame_layout.frame_size);
6395 if (s390_warn_dynamicstack_p && cfun->calls_alloca)
6396 warning ("`%s' uses dynamic stack allocation", current_function_name ());
6398 /* Save incoming stack pointer into temp reg. */
6399 if (cfun_frame_layout.save_backchain_p || next_fpr)
6400 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
6402 /* Subtract frame size from stack pointer. */
6404 if (DISP_IN_RANGE (INTVAL (frame_off)))
6406 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
6407 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
6409 insn = emit_insn (insn);
6413 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
6414 frame_off = force_const_mem (Pmode, frame_off);
6416 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
6417 annotate_constant_pool_refs (&PATTERN (insn));
6420 RTX_FRAME_RELATED_P (insn) = 1;
6422 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6423 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
6424 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
6425 GEN_INT (-cfun_frame_layout.frame_size))),
6428 /* Set backchain. */
6430 if (cfun_frame_layout.save_backchain_p)
6432 if (cfun_frame_layout.backchain_offset)
6433 addr = gen_rtx_MEM (Pmode,
6434 plus_constant (stack_pointer_rtx,
6435 cfun_frame_layout.backchain_offset));
6437 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
6438 set_mem_alias_set (addr, s390_sr_alias_set);
6439 insn = emit_insn (gen_move_insn (addr, temp_reg));
6442 /* If we support asynchronous exceptions (e.g. for Java),
6443 we need to make sure the backchain pointer is set up
6444 before any possibly trapping memory access. */
6446 if (cfun_frame_layout.save_backchain_p && flag_non_call_exceptions)
6448 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
6449 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
6453 /* Save fprs 8 - 15 (64 bit ABI). */
6455 if (cfun_save_high_fprs_p && next_fpr)
6457 insn = emit_insn (gen_add2_insn (temp_reg,
6458 GEN_INT (cfun_frame_layout.f8_offset)));
6462 for (i = 24; i <= next_fpr; i++)
6463 if (cfun_fpr_bit_p (i - 16))
6465 rtx addr = plus_constant (stack_pointer_rtx,
6466 cfun_frame_layout.frame_size
6467 + cfun_frame_layout.f8_offset
6470 insn = save_fpr (temp_reg, offset, i);
6472 RTX_FRAME_RELATED_P (insn) = 1;
6474 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6475 gen_rtx_SET (VOIDmode,
6476 gen_rtx_MEM (DFmode, addr),
6477 gen_rtx_REG (DFmode, i)),
6482 /* Set frame pointer, if needed. */
6484 if (frame_pointer_needed)
6486 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
6487 RTX_FRAME_RELATED_P (insn) = 1;
6490 /* Set up got pointer, if needed. */
6492 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
6494 rtx insns = s390_load_got ();
6496 for (insn = insns; insn; insn = NEXT_INSN (insn))
6498 annotate_constant_pool_refs (&PATTERN (insn));
6500 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
6507 if (TARGET_TPF_PROFILING)
6509 /* Generate a BAS instruction to serve as a function
6510 entry intercept to facilitate the use of tracing
6511 algorithms located at the branch target. */
6512 emit_insn (gen_prologue_tpf ());
6514 /* Emit a blockage here so that all code
6515 lies between the profiling mechanisms. */
6516 emit_insn (gen_blockage ());
6520 /* Expand the epilogue into a bunch of separate insns. */
6523 s390_emit_epilogue (bool sibcall)
6525 rtx frame_pointer, return_reg;
6526 int area_bottom, area_top, offset = 0;
6531 if (TARGET_TPF_PROFILING)
6534 /* Generate a BAS instruction to serve as a function
6535 entry intercept to facilitate the use of tracing
6536 algorithms located at the branch target. */
6538 /* Emit a blockage here so that all code
6539 lies between the profiling mechanisms. */
6540 emit_insn (gen_blockage ());
6542 emit_insn (gen_epilogue_tpf ());
6545 /* Check whether to use frame or stack pointer for restore. */
6547 frame_pointer = (frame_pointer_needed
6548 ? hard_frame_pointer_rtx : stack_pointer_rtx);
6550 s390_frame_area (&area_bottom, &area_top);
6552 /* Check whether we can access the register save area.
6553 If not, increment the frame pointer as required. */
6555 if (area_top <= area_bottom)
6557 /* Nothing to restore. */
6559 else if (DISP_IN_RANGE (cfun_frame_layout.frame_size + area_bottom)
6560 && DISP_IN_RANGE (cfun_frame_layout.frame_size + area_top - 1))
6562 /* Area is in range. */
6563 offset = cfun_frame_layout.frame_size;
6567 rtx insn, frame_off;
6569 offset = area_bottom < 0 ? -area_bottom : 0;
6570 frame_off = GEN_INT (cfun_frame_layout.frame_size - offset);
6572 if (DISP_IN_RANGE (INTVAL (frame_off)))
6574 insn = gen_rtx_SET (VOIDmode, frame_pointer,
6575 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
6576 insn = emit_insn (insn);
6580 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
6581 frame_off = force_const_mem (Pmode, frame_off);
6583 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
6584 annotate_constant_pool_refs (&PATTERN (insn));
6588 /* Restore call saved fprs. */
6592 if (cfun_save_high_fprs_p)
6594 next_offset = cfun_frame_layout.f8_offset;
6595 for (i = 24; i < 32; i++)
6597 if (cfun_fpr_bit_p (i - 16))
6599 restore_fpr (frame_pointer,
6600 offset + next_offset, i);
6609 next_offset = cfun_frame_layout.f4_offset;
6610 for (i = 18; i < 20; i++)
6612 if (cfun_fpr_bit_p (i - 16))
6614 restore_fpr (frame_pointer,
6615 offset + next_offset, i);
6618 else if (TARGET_BACKCHAIN)
6624 /* Return register. */
6626 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
6628 /* Restore call saved gprs. */
6630 if (cfun_frame_layout.first_restore_gpr != -1)
6635 /* Check for global register and save them
6636 to stack location from where they get restored. */
6638 for (i = cfun_frame_layout.first_restore_gpr;
6639 i <= cfun_frame_layout.last_restore_gpr;
6642 /* These registers are special and need to be
6643 restored in any case. */
6644 if (i == STACK_POINTER_REGNUM
6645 || i == RETURN_REGNUM
6647 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
6652 addr = plus_constant (frame_pointer,
6653 offset + cfun_frame_layout.gprs_offset
6654 + (i - cfun_frame_layout.first_save_gpr)
6656 addr = gen_rtx_MEM (Pmode, addr);
6657 set_mem_alias_set (addr, s390_sr_alias_set);
6658 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
6664 /* Fetch return address from stack before load multiple,
6665 this will do good for scheduling. */
6667 if (cfun_frame_layout.save_return_addr_p
6668 || (cfun_frame_layout.first_restore_gpr < BASE_REGNUM
6669 && cfun_frame_layout.last_restore_gpr > RETURN_REGNUM))
6671 int return_regnum = find_unused_clobbered_reg();
6674 return_reg = gen_rtx_REG (Pmode, return_regnum);
6676 addr = plus_constant (frame_pointer,
6677 offset + cfun_frame_layout.gprs_offset
6679 - cfun_frame_layout.first_save_gpr)
6681 addr = gen_rtx_MEM (Pmode, addr);
6682 set_mem_alias_set (addr, s390_sr_alias_set);
6683 emit_move_insn (return_reg, addr);
6687 insn = restore_gprs (frame_pointer,
6688 offset + cfun_frame_layout.gprs_offset
6689 + (cfun_frame_layout.first_restore_gpr
6690 - cfun_frame_layout.first_save_gpr)
6692 cfun_frame_layout.first_restore_gpr,
6693 cfun_frame_layout.last_restore_gpr);
6700 /* Return to caller. */
6702 p = rtvec_alloc (2);
6704 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
6705 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
6706 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
6711 /* Return the size in bytes of a function argument of
6712 type TYPE and/or mode MODE. At least one of TYPE or
6713 MODE must be specified. */
6716 s390_function_arg_size (enum machine_mode mode, tree type)
6719 return int_size_in_bytes (type);
6721 /* No type info available for some library calls ... */
6722 if (mode != BLKmode)
6723 return GET_MODE_SIZE (mode);
6725 /* If we have neither type nor mode, abort */
6729 /* Return true if a function argument of type TYPE and mode MODE
6730 is to be passed in a floating-point register, if available. */
6733 s390_function_arg_float (enum machine_mode mode, tree type)
6735 int size = s390_function_arg_size (mode, type);
6739 /* Soft-float changes the ABI: no floating-point registers are used. */
6740 if (TARGET_SOFT_FLOAT)
6743 /* No type info available for some library calls ... */
6745 return mode == SFmode || mode == DFmode;
6747 /* The ABI says that record types with a single member are treated
6748 just like that member would be. */
6749 while (TREE_CODE (type) == RECORD_TYPE)
6751 tree field, single = NULL_TREE;
6753 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
6755 if (TREE_CODE (field) != FIELD_DECL)
6758 if (single == NULL_TREE)
6759 single = TREE_TYPE (field);
6764 if (single == NULL_TREE)
6770 return TREE_CODE (type) == REAL_TYPE;
6773 /* Return true if a function argument of type TYPE and mode MODE
6774 is to be passed in an integer register, or a pair of integer
6775 registers, if available. */
6778 s390_function_arg_integer (enum machine_mode mode, tree type)
6780 int size = s390_function_arg_size (mode, type);
6784 /* No type info available for some library calls ... */
6786 return GET_MODE_CLASS (mode) == MODE_INT
6787 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
6789 /* We accept small integral (and similar) types. */
6790 if (INTEGRAL_TYPE_P (type)
6791 || POINTER_TYPE_P (type)
6792 || TREE_CODE (type) == OFFSET_TYPE
6793 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
6796 /* We also accept structs of size 1, 2, 4, 8 that are not
6797 passed in floating-point registers. */
6798 if (AGGREGATE_TYPE_P (type)
6799 && exact_log2 (size) >= 0
6800 && !s390_function_arg_float (mode, type))
6806 /* Return 1 if a function argument of type TYPE and mode MODE
6807 is to be passed by reference. The ABI specifies that only
6808 structures of size 1, 2, 4, or 8 bytes are passed by value,
6809 all other structures (and complex numbers) are passed by
6813 s390_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED,
6814 enum machine_mode mode, tree type,
6815 bool named ATTRIBUTE_UNUSED)
6817 int size = s390_function_arg_size (mode, type);
6823 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
6826 if (TREE_CODE (type) == COMPLEX_TYPE
6827 || TREE_CODE (type) == VECTOR_TYPE)
6834 /* Update the data in CUM to advance over an argument of mode MODE and
6835 data type TYPE. (TYPE is null for libcalls where that information
6836 may not be available.). The boolean NAMED specifies whether the
6837 argument is a named argument (as opposed to an unnamed argument
6838 matching an ellipsis). */
6841 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6842 tree type, int named ATTRIBUTE_UNUSED)
6844 if (s390_function_arg_float (mode, type))
6848 else if (s390_function_arg_integer (mode, type))
6850 int size = s390_function_arg_size (mode, type);
6851 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6857 /* Define where to put the arguments to a function.
6858 Value is zero to push the argument on the stack,
6859 or a hard register in which to store the argument.
6861 MODE is the argument's machine mode.
6862 TYPE is the data type of the argument (as a tree).
6863 This is null for libcalls where that information may
6865 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6866 the preceding args and about the function being called.
6867 NAMED is nonzero if this argument is a named parameter
6868 (otherwise it is an extra parameter matching an ellipsis).
6870 On S/390, we use general purpose registers 2 through 6 to
6871 pass integer, pointer, and certain structure arguments, and
6872 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6873 to pass floating point arguments. All remaining arguments
6874 are pushed to the stack. */
6877 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6878 int named ATTRIBUTE_UNUSED)
6880 if (s390_function_arg_float (mode, type))
6882 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6885 return gen_rtx_REG (mode, cum->fprs + 16);
6887 else if (s390_function_arg_integer (mode, type))
6889 int size = s390_function_arg_size (mode, type);
6890 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6892 if (cum->gprs + n_gprs > 5)
6895 return gen_rtx_REG (mode, cum->gprs + 2);
6898 /* After the real arguments, expand_call calls us once again
6899 with a void_type_node type. Whatever we return here is
6900 passed as operand 2 to the call expanders.
6902 We don't need this feature ... */
6903 else if (type == void_type_node)
6909 /* Return true if return values of type TYPE should be returned
6910 in a memory buffer whose address is passed by the caller as
6911 hidden first argument. */
6914 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
6916 /* We accept small integral (and similar) types. */
6917 if (INTEGRAL_TYPE_P (type)
6918 || POINTER_TYPE_P (type)
6919 || TREE_CODE (type) == OFFSET_TYPE
6920 || TREE_CODE (type) == REAL_TYPE)
6921 return int_size_in_bytes (type) > 8;
6923 /* Aggregates and similar constructs are always returned
6925 if (AGGREGATE_TYPE_P (type)
6926 || TREE_CODE (type) == COMPLEX_TYPE
6927 || TREE_CODE (type) == VECTOR_TYPE)
6930 /* ??? We get called on all sorts of random stuff from
6931 aggregate_value_p. We can't abort, but it's not clear
6932 what's safe to return. Pretend it's a struct I guess. */
6936 /* Define where to return a (scalar) value of type TYPE.
6937 If TYPE is null, define where to return a (scalar)
6938 value of mode MODE from a libcall. */
6941 s390_function_value (tree type, enum machine_mode mode)
6945 int unsignedp = TYPE_UNSIGNED (type);
6946 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
6949 if (GET_MODE_CLASS (mode) != MODE_INT
6950 && GET_MODE_CLASS (mode) != MODE_FLOAT)
6952 if (GET_MODE_SIZE (mode) > 8)
6955 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
6956 return gen_rtx_REG (mode, 16);
6958 return gen_rtx_REG (mode, 2);
6962 /* Create and return the va_list datatype.
6964 On S/390, va_list is an array type equivalent to
6966 typedef struct __va_list_tag
6970 void *__overflow_arg_area;
6971 void *__reg_save_area;
6974 where __gpr and __fpr hold the number of general purpose
6975 or floating point arguments used up to now, respectively,
6976 __overflow_arg_area points to the stack location of the
6977 next argument passed on the stack, and __reg_save_area
6978 always points to the start of the register area in the
6979 call frame of the current function. The function prologue
6980 saves all registers used for argument passing into this
6981 area if the function uses variable arguments. */
6984 s390_build_builtin_va_list (void)
6986 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6988 record = lang_hooks.types.make_type (RECORD_TYPE);
6991 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6993 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6994 long_integer_type_node);
6995 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6996 long_integer_type_node);
6997 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6999 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
7002 DECL_FIELD_CONTEXT (f_gpr) = record;
7003 DECL_FIELD_CONTEXT (f_fpr) = record;
7004 DECL_FIELD_CONTEXT (f_ovf) = record;
7005 DECL_FIELD_CONTEXT (f_sav) = record;
7007 TREE_CHAIN (record) = type_decl;
7008 TYPE_NAME (record) = type_decl;
7009 TYPE_FIELDS (record) = f_gpr;
7010 TREE_CHAIN (f_gpr) = f_fpr;
7011 TREE_CHAIN (f_fpr) = f_ovf;
7012 TREE_CHAIN (f_ovf) = f_sav;
7014 layout_type (record);
7016 /* The correct type is an array type of one element. */
7017 return build_array_type (record, build_index_type (size_zero_node));
7020 /* Implement va_start by filling the va_list structure VALIST.
7021 STDARG_P is always true, and ignored.
7022 NEXTARG points to the first anonymous stack argument.
7024 The following global variables are used to initialize
7025 the va_list structure:
7027 current_function_args_info:
7028 holds number of gprs and fprs used for named arguments.
7029 current_function_arg_offset_rtx:
7030 holds the offset of the first anonymous stack argument
7031 (relative to the virtual arg pointer). */
7034 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
7036 HOST_WIDE_INT n_gpr, n_fpr;
7038 tree f_gpr, f_fpr, f_ovf, f_sav;
7039 tree gpr, fpr, ovf, sav, t;
7041 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
7042 f_fpr = TREE_CHAIN (f_gpr);
7043 f_ovf = TREE_CHAIN (f_fpr);
7044 f_sav = TREE_CHAIN (f_ovf);
7046 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
7047 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
7048 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
7049 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
7050 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
7052 /* Count number of gp and fp argument registers used. */
7054 n_gpr = current_function_args_info.gprs;
7055 n_fpr = current_function_args_info.fprs;
7057 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr,
7058 build_int_cst (NULL_TREE, n_gpr));
7059 TREE_SIDE_EFFECTS (t) = 1;
7060 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7062 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr,
7063 build_int_cst (NULL_TREE, n_fpr));
7064 TREE_SIDE_EFFECTS (t) = 1;
7065 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7067 /* Find the overflow area. */
7068 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
7070 off = INTVAL (current_function_arg_offset_rtx);
7071 off = off < 0 ? 0 : off;
7072 if (TARGET_DEBUG_ARG)
7073 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
7074 (int)n_gpr, (int)n_fpr, off);
7076 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_cst (NULL_TREE, off));
7078 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
7079 TREE_SIDE_EFFECTS (t) = 1;
7080 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7082 /* Find the register save area. */
7083 t = make_tree (TREE_TYPE (sav), return_address_pointer_rtx);
7084 if (TARGET_KERNEL_BACKCHAIN)
7085 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
7086 build_int_cst (NULL_TREE,
7087 -(RETURN_REGNUM - 2) * UNITS_PER_WORD
7088 - (TARGET_64BIT ? 4 : 2) * 8));
7090 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
7091 build_int_cst (NULL_TREE, -RETURN_REGNUM * UNITS_PER_WORD));
7093 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
7094 TREE_SIDE_EFFECTS (t) = 1;
7095 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7098 /* Implement va_arg by updating the va_list structure
7099 VALIST as required to retrieve an argument of type
7100 TYPE, and returning that argument.
7102 Generates code equivalent to:
7104 if (integral value) {
7105 if (size <= 4 && args.gpr < 5 ||
7106 size > 4 && args.gpr < 4 )
7107 ret = args.reg_save_area[args.gpr+8]
7109 ret = *args.overflow_arg_area++;
7110 } else if (float value) {
7112 ret = args.reg_save_area[args.fpr+64]
7114 ret = *args.overflow_arg_area++;
7115 } else if (aggregate value) {
7117 ret = *args.reg_save_area[args.gpr]
7119 ret = **args.overflow_arg_area++;
7123 s390_gimplify_va_arg (tree valist, tree type, tree *pre_p,
7124 tree *post_p ATTRIBUTE_UNUSED)
7126 tree f_gpr, f_fpr, f_ovf, f_sav;
7127 tree gpr, fpr, ovf, sav, reg, t, u;
7128 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
7129 tree lab_false, lab_over, addr;
7131 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
7132 f_fpr = TREE_CHAIN (f_gpr);
7133 f_ovf = TREE_CHAIN (f_fpr);
7134 f_sav = TREE_CHAIN (f_ovf);
7136 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
7137 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
7138 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
7139 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
7140 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
7142 size = int_size_in_bytes (type);
7144 if (pass_by_reference (NULL, TYPE_MODE (type), type, false))
7146 if (TARGET_DEBUG_ARG)
7148 fprintf (stderr, "va_arg: aggregate type");
7152 /* Aggregates are passed by reference. */
7157 /* TARGET_KERNEL_BACKCHAIN on 31 bit: It is assumed here that no padding
7158 will be added by s390_frame_info because for va_args always an even
7159 number of gprs has to be saved r15-r2 = 14 regs. */
7160 sav_ofs = (TARGET_KERNEL_BACKCHAIN
7161 ? (TARGET_64BIT ? 4 : 2) * 8 : 2 * UNITS_PER_WORD);
7162 sav_scale = UNITS_PER_WORD;
7163 size = UNITS_PER_WORD;
7166 else if (s390_function_arg_float (TYPE_MODE (type), type))
7168 if (TARGET_DEBUG_ARG)
7170 fprintf (stderr, "va_arg: float type");
7174 /* FP args go in FP registers, if present. */
7178 sav_ofs = TARGET_KERNEL_BACKCHAIN ? 0 : 16 * UNITS_PER_WORD;
7180 /* TARGET_64BIT has up to 4 parameter in fprs */
7181 max_reg = TARGET_64BIT ? 3 : 1;
7185 if (TARGET_DEBUG_ARG)
7187 fprintf (stderr, "va_arg: other type");
7191 /* Otherwise into GP registers. */
7194 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
7196 /* TARGET_KERNEL_BACKCHAIN on 31 bit: It is assumed here that no padding
7197 will be added by s390_frame_info because for va_args always an even
7198 number of gprs has to be saved r15-r2 = 14 regs. */
7199 sav_ofs = TARGET_KERNEL_BACKCHAIN ?
7200 (TARGET_64BIT ? 4 : 2) * 8 : 2*UNITS_PER_WORD;
7202 if (size < UNITS_PER_WORD)
7203 sav_ofs += UNITS_PER_WORD - size;
7205 sav_scale = UNITS_PER_WORD;
7212 /* Pull the value out of the saved registers ... */
7214 lab_false = create_artificial_label ();
7215 lab_over = create_artificial_label ();
7216 addr = create_tmp_var (ptr_type_node, "addr");
7218 t = fold_convert (TREE_TYPE (reg), size_int (max_reg));
7219 t = build2 (GT_EXPR, boolean_type_node, reg, t);
7220 u = build1 (GOTO_EXPR, void_type_node, lab_false);
7221 t = build3 (COND_EXPR, void_type_node, t, u, NULL_TREE);
7222 gimplify_and_add (t, pre_p);
7224 t = build2 (PLUS_EXPR, ptr_type_node, sav,
7225 fold_convert (ptr_type_node, size_int (sav_ofs)));
7226 u = build2 (MULT_EXPR, TREE_TYPE (reg), reg,
7227 fold_convert (TREE_TYPE (reg), size_int (sav_scale)));
7228 t = build2 (PLUS_EXPR, ptr_type_node, t, fold_convert (ptr_type_node, u));
7230 t = build2 (MODIFY_EXPR, void_type_node, addr, t);
7231 gimplify_and_add (t, pre_p);
7233 t = build1 (GOTO_EXPR, void_type_node, lab_over);
7234 gimplify_and_add (t, pre_p);
7236 t = build1 (LABEL_EXPR, void_type_node, lab_false);
7237 append_to_statement_list (t, pre_p);
7240 /* ... Otherwise out of the overflow area. */
7243 if (size < UNITS_PER_WORD)
7244 t = build2 (PLUS_EXPR, ptr_type_node, t,
7245 fold_convert (ptr_type_node, size_int (UNITS_PER_WORD - size)));
7247 gimplify_expr (&t, pre_p, NULL, is_gimple_val, fb_rvalue);
7249 u = build2 (MODIFY_EXPR, void_type_node, addr, t);
7250 gimplify_and_add (u, pre_p);
7252 t = build2 (PLUS_EXPR, ptr_type_node, t,
7253 fold_convert (ptr_type_node, size_int (size)));
7254 t = build2 (MODIFY_EXPR, ptr_type_node, ovf, t);
7255 gimplify_and_add (t, pre_p);
7257 t = build1 (LABEL_EXPR, void_type_node, lab_over);
7258 append_to_statement_list (t, pre_p);
7261 /* Increment register save count. */
7263 u = build2 (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
7264 fold_convert (TREE_TYPE (reg), size_int (n_reg)));
7265 gimplify_and_add (u, pre_p);
7269 t = build_pointer_type (build_pointer_type (type));
7270 addr = fold_convert (t, addr);
7271 addr = build_fold_indirect_ref (addr);
7275 t = build_pointer_type (type);
7276 addr = fold_convert (t, addr);
7279 return build_fold_indirect_ref (addr);
7287 S390_BUILTIN_THREAD_POINTER,
7288 S390_BUILTIN_SET_THREAD_POINTER,
7293 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
7298 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
7304 s390_init_builtins (void)
7308 ftype = build_function_type (ptr_type_node, void_list_node);
7309 lang_hooks.builtin_function ("__builtin_thread_pointer", ftype,
7310 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
7313 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
7314 lang_hooks.builtin_function ("__builtin_set_thread_pointer", ftype,
7315 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
7319 /* Expand an expression EXP that calls a built-in function,
7320 with result going to TARGET if that's convenient
7321 (and in mode MODE if that's convenient).
7322 SUBTARGET may be used as the target for computing one of EXP's operands.
7323 IGNORE is nonzero if the value is to be ignored. */
7326 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
7327 enum machine_mode mode ATTRIBUTE_UNUSED,
7328 int ignore ATTRIBUTE_UNUSED)
7332 unsigned int const *code_for_builtin =
7333 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
7335 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7336 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
7337 tree arglist = TREE_OPERAND (exp, 1);
7338 enum insn_code icode;
7339 rtx op[MAX_ARGS], pat;
7343 if (fcode >= S390_BUILTIN_max)
7344 internal_error ("bad builtin fcode");
7345 icode = code_for_builtin[fcode];
7347 internal_error ("bad builtin fcode");
7349 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
7351 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
7353 arglist = TREE_CHAIN (arglist), arity++)
7355 const struct insn_operand_data *insn_op;
7357 tree arg = TREE_VALUE (arglist);
7358 if (arg == error_mark_node)
7360 if (arity > MAX_ARGS)
7363 insn_op = &insn_data[icode].operand[arity + nonvoid];
7365 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
7367 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
7368 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
7373 enum machine_mode tmode = insn_data[icode].operand[0].mode;
7375 || GET_MODE (target) != tmode
7376 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
7377 target = gen_reg_rtx (tmode);
7383 pat = GEN_FCN (icode) (target);
7387 pat = GEN_FCN (icode) (target, op[0]);
7389 pat = GEN_FCN (icode) (op[0]);
7392 pat = GEN_FCN (icode) (target, op[0], op[1]);
7408 /* Output assembly code for the trampoline template to
7411 On S/390, we use gpr 1 internally in the trampoline code;
7412 gpr 0 is used to hold the static chain. */
7415 s390_trampoline_template (FILE *file)
7419 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
7420 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
7421 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
7422 fprintf (file, "br\t%s\n", reg_names[1]);
7423 fprintf (file, "0:\t.quad\t0\n");
7424 fprintf (file, ".quad\t0\n");
7428 fprintf (file, "basr\t%s,0\n", reg_names[1]);
7429 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
7430 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
7431 fprintf (file, "br\t%s\n", reg_names[1]);
7432 fprintf (file, ".long\t0\n");
7433 fprintf (file, ".long\t0\n");
7437 /* Emit RTL insns to initialize the variable parts of a trampoline.
7438 FNADDR is an RTX for the address of the function's pure code.
7439 CXT is an RTX for the static chain value for the function. */
7442 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
7444 emit_move_insn (gen_rtx_MEM (Pmode,
7445 memory_address (Pmode,
7446 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
7447 emit_move_insn (gen_rtx_MEM (Pmode,
7448 memory_address (Pmode,
7449 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
7452 /* Return rtx for 64-bit constant formed from the 32-bit subwords
7453 LOW and HIGH, independent of the host word size. */
7456 s390_gen_rtx_const_DI (int high, int low)
7458 #if HOST_BITS_PER_WIDE_INT >= 64
7460 val = (HOST_WIDE_INT)high;
7462 val |= (HOST_WIDE_INT)low;
7464 return GEN_INT (val);
7466 #if HOST_BITS_PER_WIDE_INT >= 32
7467 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
7474 /* Output assembler code to FILE to increment profiler label # LABELNO
7475 for profiling a function entry. */
7478 s390_function_profiler (FILE *file, int labelno)
7483 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
7485 fprintf (file, "# function profiler \n");
7487 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
7488 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
7489 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
7491 op[2] = gen_rtx_REG (Pmode, 1);
7492 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
7493 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
7495 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
7498 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
7499 op[4] = gen_rtx_CONST (Pmode, op[4]);
7504 output_asm_insn ("stg\t%0,%1", op);
7505 output_asm_insn ("larl\t%2,%3", op);
7506 output_asm_insn ("brasl\t%0,%4", op);
7507 output_asm_insn ("lg\t%0,%1", op);
7511 op[6] = gen_label_rtx ();
7513 output_asm_insn ("st\t%0,%1", op);
7514 output_asm_insn ("bras\t%2,%l6", op);
7515 output_asm_insn (".long\t%4", op);
7516 output_asm_insn (".long\t%3", op);
7517 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
7518 output_asm_insn ("l\t%0,0(%2)", op);
7519 output_asm_insn ("l\t%2,4(%2)", op);
7520 output_asm_insn ("basr\t%0,%0", op);
7521 output_asm_insn ("l\t%0,%1", op);
7525 op[5] = gen_label_rtx ();
7526 op[6] = gen_label_rtx ();
7528 output_asm_insn ("st\t%0,%1", op);
7529 output_asm_insn ("bras\t%2,%l6", op);
7530 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
7531 output_asm_insn (".long\t%4-%l5", op);
7532 output_asm_insn (".long\t%3-%l5", op);
7533 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
7534 output_asm_insn ("lr\t%0,%2", op);
7535 output_asm_insn ("a\t%0,0(%2)", op);
7536 output_asm_insn ("a\t%2,4(%2)", op);
7537 output_asm_insn ("basr\t%0,%0", op);
7538 output_asm_insn ("l\t%0,%1", op);
7542 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
7543 into its SYMBOL_REF_FLAGS. */
7546 s390_encode_section_info (tree decl, rtx rtl, int first)
7548 default_encode_section_info (decl, rtl, first);
7550 /* If a variable has a forced alignment to < 2 bytes, mark it with
7551 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
7552 if (TREE_CODE (decl) == VAR_DECL
7553 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
7554 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
7557 /* Output thunk to FILE that implements a C++ virtual function call (with
7558 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
7559 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
7560 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
7561 relative to the resulting this pointer. */
7564 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
7565 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
7571 /* Operand 0 is the target function. */
7572 op[0] = XEXP (DECL_RTL (function), 0);
7573 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
7576 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
7577 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
7578 op[0] = gen_rtx_CONST (Pmode, op[0]);
7581 /* Operand 1 is the 'this' pointer. */
7582 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
7583 op[1] = gen_rtx_REG (Pmode, 3);
7585 op[1] = gen_rtx_REG (Pmode, 2);
7587 /* Operand 2 is the delta. */
7588 op[2] = GEN_INT (delta);
7590 /* Operand 3 is the vcall_offset. */
7591 op[3] = GEN_INT (vcall_offset);
7593 /* Operand 4 is the temporary register. */
7594 op[4] = gen_rtx_REG (Pmode, 1);
7596 /* Operands 5 to 8 can be used as labels. */
7602 /* Operand 9 can be used for temporary register. */
7605 /* Generate code. */
7608 /* Setup literal pool pointer if required. */
7609 if ((!DISP_IN_RANGE (delta)
7610 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7611 || (!DISP_IN_RANGE (vcall_offset)
7612 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
7614 op[5] = gen_label_rtx ();
7615 output_asm_insn ("larl\t%4,%5", op);
7618 /* Add DELTA to this pointer. */
7621 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
7622 output_asm_insn ("la\t%1,%2(%1)", op);
7623 else if (DISP_IN_RANGE (delta))
7624 output_asm_insn ("lay\t%1,%2(%1)", op);
7625 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7626 output_asm_insn ("aghi\t%1,%2", op);
7629 op[6] = gen_label_rtx ();
7630 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
7634 /* Perform vcall adjustment. */
7637 if (DISP_IN_RANGE (vcall_offset))
7639 output_asm_insn ("lg\t%4,0(%1)", op);
7640 output_asm_insn ("ag\t%1,%3(%4)", op);
7642 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7644 output_asm_insn ("lghi\t%4,%3", op);
7645 output_asm_insn ("ag\t%4,0(%1)", op);
7646 output_asm_insn ("ag\t%1,0(%4)", op);
7650 op[7] = gen_label_rtx ();
7651 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
7652 output_asm_insn ("ag\t%4,0(%1)", op);
7653 output_asm_insn ("ag\t%1,0(%4)", op);
7657 /* Jump to target. */
7658 output_asm_insn ("jg\t%0", op);
7660 /* Output literal pool if required. */
7663 output_asm_insn (".align\t4", op);
7664 targetm.asm_out.internal_label (file, "L",
7665 CODE_LABEL_NUMBER (op[5]));
7669 targetm.asm_out.internal_label (file, "L",
7670 CODE_LABEL_NUMBER (op[6]));
7671 output_asm_insn (".long\t%2", op);
7675 targetm.asm_out.internal_label (file, "L",
7676 CODE_LABEL_NUMBER (op[7]));
7677 output_asm_insn (".long\t%3", op);
7682 /* Setup base pointer if required. */
7684 || (!DISP_IN_RANGE (delta)
7685 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7686 || (!DISP_IN_RANGE (delta)
7687 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
7689 op[5] = gen_label_rtx ();
7690 output_asm_insn ("basr\t%4,0", op);
7691 targetm.asm_out.internal_label (file, "L",
7692 CODE_LABEL_NUMBER (op[5]));
7695 /* Add DELTA to this pointer. */
7698 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
7699 output_asm_insn ("la\t%1,%2(%1)", op);
7700 else if (DISP_IN_RANGE (delta))
7701 output_asm_insn ("lay\t%1,%2(%1)", op);
7702 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7703 output_asm_insn ("ahi\t%1,%2", op);
7706 op[6] = gen_label_rtx ();
7707 output_asm_insn ("a\t%1,%6-%5(%4)", op);
7711 /* Perform vcall adjustment. */
7714 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
7716 output_asm_insn ("lg\t%4,0(%1)", op);
7717 output_asm_insn ("a\t%1,%3(%4)", op);
7719 else if (DISP_IN_RANGE (vcall_offset))
7721 output_asm_insn ("lg\t%4,0(%1)", op);
7722 output_asm_insn ("ay\t%1,%3(%4)", op);
7724 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7726 output_asm_insn ("lhi\t%4,%3", op);
7727 output_asm_insn ("a\t%4,0(%1)", op);
7728 output_asm_insn ("a\t%1,0(%4)", op);
7732 op[7] = gen_label_rtx ();
7733 output_asm_insn ("l\t%4,%7-%5(%4)", op);
7734 output_asm_insn ("a\t%4,0(%1)", op);
7735 output_asm_insn ("a\t%1,0(%4)", op);
7738 /* We had to clobber the base pointer register.
7739 Re-setup the base pointer (with a different base). */
7740 op[5] = gen_label_rtx ();
7741 output_asm_insn ("basr\t%4,0", op);
7742 targetm.asm_out.internal_label (file, "L",
7743 CODE_LABEL_NUMBER (op[5]));
7746 /* Jump to target. */
7747 op[8] = gen_label_rtx ();
7750 output_asm_insn ("l\t%4,%8-%5(%4)", op);
7752 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7753 /* We cannot call through .plt, since .plt requires %r12 loaded. */
7754 else if (flag_pic == 1)
7756 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7757 output_asm_insn ("l\t%4,%0(%4)", op);
7759 else if (flag_pic == 2)
7761 op[9] = gen_rtx_REG (Pmode, 0);
7762 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
7763 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7764 output_asm_insn ("ar\t%4,%9", op);
7765 output_asm_insn ("l\t%4,0(%4)", op);
7768 output_asm_insn ("br\t%4", op);
7770 /* Output literal pool. */
7771 output_asm_insn (".align\t4", op);
7773 if (nonlocal && flag_pic == 2)
7774 output_asm_insn (".long\t%0", op);
7777 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
7778 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
7781 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
7783 output_asm_insn (".long\t%0", op);
7785 output_asm_insn (".long\t%0-%5", op);
7789 targetm.asm_out.internal_label (file, "L",
7790 CODE_LABEL_NUMBER (op[6]));
7791 output_asm_insn (".long\t%2", op);
7795 targetm.asm_out.internal_label (file, "L",
7796 CODE_LABEL_NUMBER (op[7]));
7797 output_asm_insn (".long\t%3", op);
7803 s390_valid_pointer_mode (enum machine_mode mode)
7805 return (mode == SImode || (TARGET_64BIT && mode == DImode));
7808 /* How to allocate a 'struct machine_function'. */
7810 static struct machine_function *
7811 s390_init_machine_status (void)
7813 return ggc_alloc_cleared (sizeof (struct machine_function));
7816 /* Checks whether the given ARGUMENT_LIST would use a caller
7817 saved register. This is used to decide whether sibling call
7818 optimization could be performed on the respective function
7822 s390_call_saved_register_used (tree argument_list)
7824 CUMULATIVE_ARGS cum;
7826 enum machine_mode mode;
7831 INIT_CUMULATIVE_ARGS (cum, NULL, NULL, 0, 0);
7833 while (argument_list)
7835 parameter = TREE_VALUE (argument_list);
7836 argument_list = TREE_CHAIN (argument_list);
7841 /* For an undeclared variable passed as parameter we will get
7842 an ERROR_MARK node here. */
7843 if (TREE_CODE (parameter) == ERROR_MARK)
7846 if (! (type = TREE_TYPE (parameter)))
7849 if (! (mode = TYPE_MODE (TREE_TYPE (parameter))))
7852 if (pass_by_reference (&cum, mode, type, true))
7855 type = build_pointer_type (type);
7858 parm_rtx = s390_function_arg (&cum, mode, type, 0);
7860 s390_function_arg_advance (&cum, mode, type, 0);
7862 if (parm_rtx && REG_P (parm_rtx))
7865 reg < HARD_REGNO_NREGS (REGNO (parm_rtx), GET_MODE (parm_rtx));
7867 if (! call_used_regs[reg + REGNO (parm_rtx)])
7874 /* Return true if the given call expression can be
7875 turned into a sibling call.
7876 DECL holds the declaration of the function to be called whereas
7877 EXP is the call expression itself. */
7880 s390_function_ok_for_sibcall (tree decl, tree exp)
7882 /* The TPF epilogue uses register 1. */
7883 if (TARGET_TPF_PROFILING)
7886 /* The 31 bit PLT code uses register 12 (GOT pointer - caller saved)
7887 which would have to be restored before the sibcall. */
7888 if (!TARGET_64BIT && flag_pic && decl && TREE_PUBLIC (decl))
7891 /* Register 6 on s390 is available as an argument register but unfortunately
7892 "caller saved". This makes functions needing this register for arguments
7893 not suitable for sibcalls. */
7894 if (TREE_OPERAND (exp, 1)
7895 && s390_call_saved_register_used (TREE_OPERAND (exp, 1)))
7901 /* This function is used by the call expanders of the machine description.
7902 It emits the call insn itself together with the necessary operations
7903 to adjust the target address and returns the emitted insn.
7904 ADDR_LOCATION is the target address rtx
7905 TLS_CALL the location of the thread-local symbol
7906 RESULT_REG the register where the result of the call should be stored
7907 RETADDR_REG the register where the return address should be stored
7908 If this parameter is NULL_RTX the call is considered
7909 to be a sibling call. */
7912 s390_emit_call (rtx addr_location, rtx tls_call, rtx result_reg,
7915 bool plt_call = false;
7921 /* Direct function calls need special treatment. */
7922 if (GET_CODE (addr_location) == SYMBOL_REF)
7924 /* When calling a global routine in PIC mode, we must
7925 replace the symbol itself with the PLT stub. */
7926 if (flag_pic && !SYMBOL_REF_LOCAL_P (addr_location))
7928 addr_location = gen_rtx_UNSPEC (Pmode,
7929 gen_rtvec (1, addr_location),
7931 addr_location = gen_rtx_CONST (Pmode, addr_location);
7935 /* Unless we can use the bras(l) insn, force the
7936 routine address into a register. */
7937 if (!TARGET_SMALL_EXEC && !TARGET_CPU_ZARCH)
7940 addr_location = legitimize_pic_address (addr_location, 0);
7942 addr_location = force_reg (Pmode, addr_location);
7946 /* If it is already an indirect call or the code above moved the
7947 SYMBOL_REF to somewhere else make sure the address can be found in
7949 if (retaddr_reg == NULL_RTX
7950 && GET_CODE (addr_location) != SYMBOL_REF
7953 emit_move_insn (gen_rtx_REG (Pmode, SIBCALL_REGNUM), addr_location);
7954 addr_location = gen_rtx_REG (Pmode, SIBCALL_REGNUM);
7957 addr_location = gen_rtx_MEM (QImode, addr_location);
7958 call = gen_rtx_CALL (VOIDmode, addr_location, const0_rtx);
7960 if (result_reg != NULL_RTX)
7961 call = gen_rtx_SET (VOIDmode, result_reg, call);
7963 if (retaddr_reg != NULL_RTX)
7965 clobber = gen_rtx_CLOBBER (VOIDmode, retaddr_reg);
7967 if (tls_call != NULL_RTX)
7968 vec = gen_rtvec (3, call, clobber,
7969 gen_rtx_USE (VOIDmode, tls_call));
7971 vec = gen_rtvec (2, call, clobber);
7973 call = gen_rtx_PARALLEL (VOIDmode, vec);
7976 insn = emit_call_insn (call);
7978 /* 31-bit PLT stubs and tls calls use the GOT register implicitly. */
7979 if ((!TARGET_64BIT && plt_call) || tls_call != NULL_RTX)
7981 /* s390_function_ok_for_sibcall should
7982 have denied sibcalls in this case. */
7983 if (retaddr_reg == NULL_RTX)
7986 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
7991 /* Implement CONDITIONAL_REGISTER_USAGE. */
7994 s390_conditional_register_usage (void)
8000 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
8001 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
8003 if (TARGET_CPU_ZARCH)
8005 fixed_regs[RETURN_REGNUM] = 0;
8006 call_used_regs[RETURN_REGNUM] = 0;
8010 for (i = 24; i < 32; i++)
8011 call_used_regs[i] = call_really_used_regs[i] = 0;
8015 for (i = 18; i < 20; i++)
8016 call_used_regs[i] = call_really_used_regs[i] = 0;
8020 /* Corresponding function to eh_return expander. */
8022 static GTY(()) rtx s390_tpf_eh_return_symbol;
8024 s390_emit_tpf_eh_return (rtx target)
8028 if (!s390_tpf_eh_return_symbol)
8029 s390_tpf_eh_return_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tpf_eh_return");
8031 reg = gen_rtx_REG (Pmode, 2);
8033 emit_move_insn (reg, target);
8034 insn = s390_emit_call (s390_tpf_eh_return_symbol, NULL_RTX, reg,
8035 gen_rtx_REG (Pmode, RETURN_REGNUM));
8036 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), reg);
8038 emit_move_insn (EH_RETURN_HANDLER_RTX, reg);
8041 #include "gt-s390.h"