1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 #include "coretypes.h"
32 #include "hard-reg-set.h"
34 #include "insn-config.h"
35 #include "conditions.h"
37 #include "insn-attr.h"
45 #include "basic-block.h"
46 #include "integrate.h"
49 #include "target-def.h"
51 #include "langhooks.h"
53 #include "tree-gimple.h"
56 static bool s390_assemble_integer (rtx, unsigned int, int);
57 static void s390_encode_section_info (tree, rtx, int);
58 static bool s390_cannot_force_const_mem (rtx);
59 static rtx s390_delegitimize_address (rtx);
60 static bool s390_return_in_memory (tree, tree);
61 static void s390_init_builtins (void);
62 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
63 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
65 static enum attr_type s390_safe_attr_type (rtx);
67 static int s390_adjust_priority (rtx, int);
68 static int s390_issue_rate (void);
69 static int s390_first_cycle_multipass_dfa_lookahead (void);
70 static bool s390_cannot_copy_insn_p (rtx);
71 static bool s390_rtx_costs (rtx, int, int, int *);
72 static int s390_address_cost (rtx);
73 static void s390_reorg (void);
74 static bool s390_valid_pointer_mode (enum machine_mode);
75 static tree s390_build_builtin_va_list (void);
76 static tree s390_gimplify_va_arg (tree, tree, tree *, tree *);
77 static bool s390_function_ok_for_sibcall (tree, tree);
78 static bool s390_call_saved_register_used (tree);
79 static bool s390_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode mode,
81 static bool s390_fixed_condition_code_regs (unsigned int *, unsigned int *);
82 static enum machine_mode s390_cc_modes_compatible (enum machine_mode,
86 /* Define the specific costs for a given cpu. */
88 struct processor_costs
91 const int m; /* cost of an M instruction. */
92 const int mghi; /* cost of an MGHI instruction. */
93 const int mh; /* cost of an MH instruction. */
94 const int mhi; /* cost of an MHI instruction. */
95 const int ml; /* cost of an ML instruction. */
96 const int mr; /* cost of an MR instruction. */
97 const int ms; /* cost of an MS instruction. */
98 const int msg; /* cost of an MSG instruction. */
99 const int msgf; /* cost of an MSGF instruction. */
100 const int msgfr; /* cost of an MSGFR instruction. */
101 const int msgr; /* cost of an MSGR instruction. */
102 const int msr; /* cost of an MSR instruction. */
103 const int mult_df; /* cost of multiplication in DFmode. */
105 const int sqdbr; /* cost of square root in DFmode. */
106 const int sqebr; /* cost of square root in SFmode. */
107 /* multiply and add */
108 const int madbr; /* cost of multiply and add in DFmode. */
109 const int maebr; /* cost of multiply and add in SFmode. */
122 const struct processor_costs *s390_cost;
125 struct processor_costs z900_cost =
127 COSTS_N_INSNS (5), /* M */
128 COSTS_N_INSNS (10), /* MGHI */
129 COSTS_N_INSNS (5), /* MH */
130 COSTS_N_INSNS (4), /* MHI */
131 COSTS_N_INSNS (5), /* ML */
132 COSTS_N_INSNS (5), /* MR */
133 COSTS_N_INSNS (4), /* MS */
134 COSTS_N_INSNS (15), /* MSG */
135 COSTS_N_INSNS (7), /* MSGF */
136 COSTS_N_INSNS (7), /* MSGFR */
137 COSTS_N_INSNS (10), /* MSGR */
138 COSTS_N_INSNS (4), /* MSR */
139 COSTS_N_INSNS (7), /* multiplication in DFmode */
140 COSTS_N_INSNS (44), /* SQDBR */
141 COSTS_N_INSNS (35), /* SQEBR */
142 COSTS_N_INSNS (18), /* MADBR */
143 COSTS_N_INSNS (13), /* MAEBR */
144 COSTS_N_INSNS (30), /* DDBR */
145 COSTS_N_INSNS (30), /* DDR */
146 COSTS_N_INSNS (27), /* DEBR */
147 COSTS_N_INSNS (26), /* DER */
148 COSTS_N_INSNS (220), /* DLGR */
149 COSTS_N_INSNS (34), /* DLR */
150 COSTS_N_INSNS (34), /* DR */
151 COSTS_N_INSNS (32), /* DSGFR */
152 COSTS_N_INSNS (32), /* DSGR */
156 struct processor_costs z990_cost =
158 COSTS_N_INSNS (4), /* M */
159 COSTS_N_INSNS (2), /* MGHI */
160 COSTS_N_INSNS (2), /* MH */
161 COSTS_N_INSNS (2), /* MHI */
162 COSTS_N_INSNS (4), /* ML */
163 COSTS_N_INSNS (4), /* MR */
164 COSTS_N_INSNS (5), /* MS */
165 COSTS_N_INSNS (6), /* MSG */
166 COSTS_N_INSNS (4), /* MSGF */
167 COSTS_N_INSNS (4), /* MSGFR */
168 COSTS_N_INSNS (4), /* MSGR */
169 COSTS_N_INSNS (4), /* MSR */
170 COSTS_N_INSNS (1), /* multiplication in DFmode */
171 COSTS_N_INSNS (66), /* SQDBR */
172 COSTS_N_INSNS (38), /* SQEBR */
173 COSTS_N_INSNS (1), /* MADBR */
174 COSTS_N_INSNS (1), /* MAEBR */
175 COSTS_N_INSNS (40), /* DDBR */
176 COSTS_N_INSNS (44), /* DDR */
177 COSTS_N_INSNS (26), /* DDBR */
178 COSTS_N_INSNS (28), /* DER */
179 COSTS_N_INSNS (176), /* DLGR */
180 COSTS_N_INSNS (31), /* DLR */
181 COSTS_N_INSNS (31), /* DR */
182 COSTS_N_INSNS (31), /* DSGFR */
183 COSTS_N_INSNS (31), /* DSGR */
187 #undef TARGET_ASM_ALIGNED_HI_OP
188 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
189 #undef TARGET_ASM_ALIGNED_DI_OP
190 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
191 #undef TARGET_ASM_INTEGER
192 #define TARGET_ASM_INTEGER s390_assemble_integer
194 #undef TARGET_ASM_OPEN_PAREN
195 #define TARGET_ASM_OPEN_PAREN ""
197 #undef TARGET_ASM_CLOSE_PAREN
198 #define TARGET_ASM_CLOSE_PAREN ""
200 #undef TARGET_ENCODE_SECTION_INFO
201 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
204 #undef TARGET_HAVE_TLS
205 #define TARGET_HAVE_TLS true
207 #undef TARGET_CANNOT_FORCE_CONST_MEM
208 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
210 #undef TARGET_DELEGITIMIZE_ADDRESS
211 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
213 #undef TARGET_RETURN_IN_MEMORY
214 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
216 #undef TARGET_INIT_BUILTINS
217 #define TARGET_INIT_BUILTINS s390_init_builtins
218 #undef TARGET_EXPAND_BUILTIN
219 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
221 #undef TARGET_ASM_OUTPUT_MI_THUNK
222 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
223 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
224 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
226 #undef TARGET_SCHED_ADJUST_PRIORITY
227 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
228 #undef TARGET_SCHED_ISSUE_RATE
229 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
230 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
231 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
233 #undef TARGET_CANNOT_COPY_INSN_P
234 #define TARGET_CANNOT_COPY_INSN_P s390_cannot_copy_insn_p
235 #undef TARGET_RTX_COSTS
236 #define TARGET_RTX_COSTS s390_rtx_costs
237 #undef TARGET_ADDRESS_COST
238 #define TARGET_ADDRESS_COST s390_address_cost
240 #undef TARGET_MACHINE_DEPENDENT_REORG
241 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
243 #undef TARGET_VALID_POINTER_MODE
244 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
246 #undef TARGET_BUILD_BUILTIN_VA_LIST
247 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
248 #undef TARGET_GIMPLIFY_VA_ARG_EXPR
249 #define TARGET_GIMPLIFY_VA_ARG_EXPR s390_gimplify_va_arg
251 #undef TARGET_PROMOTE_FUNCTION_ARGS
252 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
253 #undef TARGET_PROMOTE_FUNCTION_RETURN
254 #define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
255 #undef TARGET_PASS_BY_REFERENCE
256 #define TARGET_PASS_BY_REFERENCE s390_pass_by_reference
258 #undef TARGET_FUNCTION_OK_FOR_SIBCALL
259 #define TARGET_FUNCTION_OK_FOR_SIBCALL s390_function_ok_for_sibcall
261 #undef TARGET_FIXED_CONDITION_CODE_REGS
262 #define TARGET_FIXED_CONDITION_CODE_REGS s390_fixed_condition_code_regs
264 #undef TARGET_CC_MODES_COMPATIBLE
265 #define TARGET_CC_MODES_COMPATIBLE s390_cc_modes_compatible
267 struct gcc_target targetm = TARGET_INITIALIZER;
269 extern int reload_completed;
271 /* The alias set for prologue/epilogue register save/restore. */
272 static int s390_sr_alias_set = 0;
274 /* Save information from a "cmpxx" operation until the branch or scc is
276 rtx s390_compare_op0, s390_compare_op1;
278 /* Structure used to hold the components of a S/390 memory
279 address. A legitimate address on S/390 is of the general
281 base + index + displacement
282 where any of the components is optional.
284 base and index are registers of the class ADDR_REGS,
285 displacement is an unsigned 12-bit immediate constant. */
295 /* Which cpu are we tuning for. */
296 enum processor_type s390_tune;
297 enum processor_flags s390_tune_flags;
298 /* Which instruction set architecture to use. */
299 enum processor_type s390_arch;
300 enum processor_flags s390_arch_flags;
302 /* Strings to hold which cpu and instruction set architecture to use. */
303 const char *s390_tune_string; /* for -mtune=<xxx> */
304 const char *s390_arch_string; /* for -march=<xxx> */
306 const char *s390_warn_framesize_string;
307 const char *s390_warn_dynamicstack_string;
308 const char *s390_stack_size_string;
309 const char *s390_stack_guard_string;
311 HOST_WIDE_INT s390_warn_framesize = 0;
312 bool s390_warn_dynamicstack_p = 0;
313 HOST_WIDE_INT s390_stack_size = 0;
314 HOST_WIDE_INT s390_stack_guard = 0;
316 /* The following structure is embedded in the machine
317 specific part of struct function. */
319 struct s390_frame_layout GTY (())
321 /* Offset within stack frame. */
322 HOST_WIDE_INT gprs_offset;
323 HOST_WIDE_INT f0_offset;
324 HOST_WIDE_INT f4_offset;
325 HOST_WIDE_INT f8_offset;
326 HOST_WIDE_INT backchain_offset;
328 /* Number of first and last gpr to be saved, restored. */
330 int first_restore_gpr;
332 int last_restore_gpr;
334 /* Bits standing for floating point registers. Set, if the
335 respective register has to be saved. Starting with reg 16 (f0)
336 at the rightmost bit.
337 Bit 15 - 8 7 6 5 4 3 2 1 0
338 fpr 15 - 8 7 5 3 1 6 4 2 0
339 reg 31 - 24 23 22 21 20 19 18 17 16 */
340 unsigned int fpr_bitmap;
342 /* Number of floating point registers f8-f15 which must be saved. */
345 /* Set if return address needs to be saved. */
346 bool save_return_addr_p;
348 /* Size of stack frame. */
349 HOST_WIDE_INT frame_size;
352 /* Define the structure for the machine field in struct function. */
354 struct machine_function GTY(())
356 struct s390_frame_layout frame_layout;
358 /* Literal pool base register. */
361 /* True if we may need to perform branch splitting. */
362 bool split_branches_pending_p;
364 /* Some local-dynamic TLS symbol name. */
365 const char *some_ld_name;
368 /* Few accessor macros for struct cfun->machine->s390_frame_layout. */
370 #define cfun_frame_layout (cfun->machine->frame_layout)
371 #define cfun_save_high_fprs_p (!!cfun_frame_layout.high_fprs)
372 #define cfun_gprs_save_area_size ((cfun_frame_layout.last_save_gpr - \
373 cfun_frame_layout.first_save_gpr + 1) * UNITS_PER_WORD)
374 #define cfun_set_fpr_bit(BITNUM) (cfun->machine->frame_layout.fpr_bitmap |= \
376 #define cfun_fpr_bit_p(BITNUM) (!!(cfun->machine->frame_layout.fpr_bitmap & \
379 static int s390_match_ccmode_set (rtx, enum machine_mode);
380 static const char *s390_branch_condition_mnemonic (rtx, int);
381 static int s390_short_displacement (rtx);
382 static int s390_decompose_address (rtx, struct s390_address *);
383 static rtx get_thread_pointer (void);
384 static rtx legitimize_tls_address (rtx, rtx);
385 static void print_shift_count_operand (FILE *, rtx);
386 static const char *get_some_local_dynamic_name (void);
387 static int get_some_local_dynamic_name_1 (rtx *, void *);
388 static int reg_used_in_mem_p (int, rtx);
389 static int addr_generation_dependency_p (rtx, rtx);
390 static int s390_split_branches (void);
391 static void annotate_constant_pool_refs (rtx *x);
392 static void find_constant_pool_ref (rtx, rtx *);
393 static void replace_constant_pool_ref (rtx *, rtx, rtx);
394 static rtx find_ltrel_base (rtx);
395 static void replace_ltrel_base (rtx *);
396 static void s390_optimize_prologue (void);
397 static int find_unused_clobbered_reg (void);
398 static void s390_frame_area (int *, int *);
399 static void s390_register_info (int []);
400 static void s390_frame_info (void);
401 static void s390_init_frame_layout (void);
402 static void s390_update_frame_layout (void);
403 static rtx save_fpr (rtx, int, int);
404 static rtx restore_fpr (rtx, int, int);
405 static rtx save_gprs (rtx, int, int, int);
406 static rtx restore_gprs (rtx, int, int, int);
407 static int s390_function_arg_size (enum machine_mode, tree);
408 static bool s390_function_arg_float (enum machine_mode, tree);
409 static struct machine_function * s390_init_machine_status (void);
411 /* Return true if CODE is a valid address without index. */
414 s390_legitimate_address_without_index_p (rtx op)
416 struct s390_address addr;
418 if (!s390_decompose_address (XEXP (op, 0), &addr))
426 /* Return true if SET either doesn't set the CC register, or else
427 the source and destination have matching CC modes and that
428 CC mode is at least as constrained as REQ_MODE. */
431 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
433 enum machine_mode set_mode;
435 if (GET_CODE (set) != SET)
438 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
441 set_mode = GET_MODE (SET_DEST (set));
455 if (req_mode != set_mode)
460 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
461 && req_mode != CCSRmode && req_mode != CCURmode)
467 if (req_mode != CCAmode)
475 return (GET_MODE (SET_SRC (set)) == set_mode);
478 /* Return true if every SET in INSN that sets the CC register
479 has source and destination with matching CC modes and that
480 CC mode is at least as constrained as REQ_MODE.
481 If REQ_MODE is VOIDmode, always return false. */
484 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
488 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
489 if (req_mode == VOIDmode)
492 if (GET_CODE (PATTERN (insn)) == SET)
493 return s390_match_ccmode_set (PATTERN (insn), req_mode);
495 if (GET_CODE (PATTERN (insn)) == PARALLEL)
496 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
498 rtx set = XVECEXP (PATTERN (insn), 0, i);
499 if (GET_CODE (set) == SET)
500 if (!s390_match_ccmode_set (set, req_mode))
507 /* If a test-under-mask instruction can be used to implement
508 (compare (and ... OP1) OP2), return the CC mode required
509 to do that. Otherwise, return VOIDmode.
510 MIXED is true if the instruction can distinguish between
511 CC1 and CC2 for mixed selected bits (TMxx), it is false
512 if the instruction cannot (TM). */
515 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
519 /* ??? Fixme: should work on CONST_DOUBLE as well. */
520 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
523 /* Selected bits all zero: CC0.
524 e.g.: int a; if ((a & (16 + 128)) == 0) */
525 if (INTVAL (op2) == 0)
528 /* Selected bits all one: CC3.
529 e.g.: int a; if ((a & (16 + 128)) == 16 + 128) */
530 if (INTVAL (op2) == INTVAL (op1))
533 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. e.g.:
535 if ((a & (16 + 128)) == 16) -> CCT1
536 if ((a & (16 + 128)) == 128) -> CCT2 */
539 bit1 = exact_log2 (INTVAL (op2));
540 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
541 if (bit0 != -1 && bit1 != -1)
542 return bit0 > bit1 ? CCT1mode : CCT2mode;
548 /* Given a comparison code OP (EQ, NE, etc.) and the operands
549 OP0 and OP1 of a COMPARE, return the mode to be used for the
553 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
559 if ((GET_CODE (op0) == NEG || GET_CODE (op0) == ABS)
560 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
562 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
563 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
565 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
566 || GET_CODE (op1) == NEG)
567 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
570 if (GET_CODE (op0) == AND)
572 /* Check whether we can potentially do it via TM. */
573 enum machine_mode ccmode;
574 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
575 if (ccmode != VOIDmode)
577 /* Relax CCTmode to CCZmode to allow fall-back to AND
578 if that turns out to be beneficial. */
579 return ccmode == CCTmode ? CCZmode : ccmode;
583 if (register_operand (op0, HImode)
584 && GET_CODE (op1) == CONST_INT
585 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
587 if (register_operand (op0, QImode)
588 && GET_CODE (op1) == CONST_INT
589 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
598 /* The only overflow condition of NEG and ABS happens when
599 -INT_MAX is used as parameter, which stays negative. So
600 we have an overflow from a positive value to a negative.
601 Using CCAP mode the resulting cc can be used for comparisons. */
602 if ((GET_CODE (op0) == NEG || GET_CODE (op0) == ABS)
603 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
606 /* If constants are involved in an add instruction it is possible to use
607 the resulting cc for comparisons with zero. Knowing the sign of the
608 constant the overflow behavior gets predictable. e.g.:
609 int a, b; if ((b = a + c) > 0)
610 with c as a constant value: c < 0 -> CCAN and c >= 0 -> CCAP */
611 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
612 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
614 if (INTVAL (XEXP((op0), 1)) < 0)
628 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
629 && GET_CODE (op1) != CONST_INT)
635 if (GET_CODE (op0) == PLUS
636 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
639 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
640 && GET_CODE (op1) != CONST_INT)
646 if (GET_CODE (op0) == MINUS
647 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
650 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
651 && GET_CODE (op1) != CONST_INT)
660 /* Replace the comparison OP0 CODE OP1 by a semantically equivalent one
661 that we can implement more efficiently. */
664 s390_canonicalize_comparison (enum rtx_code *code, rtx *op0, rtx *op1)
666 /* Convert ZERO_EXTRACT back to AND to enable TM patterns. */
667 if ((*code == EQ || *code == NE)
668 && *op1 == const0_rtx
669 && GET_CODE (*op0) == ZERO_EXTRACT
670 && GET_CODE (XEXP (*op0, 1)) == CONST_INT
671 && GET_CODE (XEXP (*op0, 2)) == CONST_INT
672 && SCALAR_INT_MODE_P (GET_MODE (XEXP (*op0, 0))))
674 rtx inner = XEXP (*op0, 0);
675 HOST_WIDE_INT modesize = GET_MODE_BITSIZE (GET_MODE (inner));
676 HOST_WIDE_INT len = INTVAL (XEXP (*op0, 1));
677 HOST_WIDE_INT pos = INTVAL (XEXP (*op0, 2));
679 if (len > 0 && len < modesize
680 && pos >= 0 && pos + len <= modesize
681 && modesize <= HOST_BITS_PER_WIDE_INT)
683 unsigned HOST_WIDE_INT block;
684 block = ((unsigned HOST_WIDE_INT) 1 << len) - 1;
685 block <<= modesize - pos - len;
687 *op0 = gen_rtx_AND (GET_MODE (inner), inner,
688 gen_int_mode (block, GET_MODE (inner)));
692 /* Narrow AND of memory against immediate to enable TM. */
693 if ((*code == EQ || *code == NE)
694 && *op1 == const0_rtx
695 && GET_CODE (*op0) == AND
696 && GET_CODE (XEXP (*op0, 1)) == CONST_INT
697 && SCALAR_INT_MODE_P (GET_MODE (XEXP (*op0, 0))))
699 rtx inner = XEXP (*op0, 0);
700 rtx mask = XEXP (*op0, 1);
702 /* Ignore paradoxical SUBREGs if all extra bits are masked out. */
703 if (GET_CODE (inner) == SUBREG
704 && SCALAR_INT_MODE_P (GET_MODE (SUBREG_REG (inner)))
705 && (GET_MODE_SIZE (GET_MODE (inner))
706 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (inner))))
708 & GET_MODE_MASK (GET_MODE (inner))
709 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (inner))))
711 inner = SUBREG_REG (inner);
713 /* Do not change volatile MEMs. */
714 if (MEM_P (inner) && !MEM_VOLATILE_P (inner))
716 int part = s390_single_part (XEXP (*op0, 1),
717 GET_MODE (inner), QImode, 0);
720 mask = gen_int_mode (s390_extract_part (mask, QImode, 0), QImode);
721 inner = adjust_address_nv (inner, QImode, part);
722 *op0 = gen_rtx_AND (QImode, inner, mask);
727 /* Narrow comparisons against 0xffff to HImode if possible. */
728 if ((*code == EQ || *code == NE)
729 && GET_CODE (*op1) == CONST_INT
730 && INTVAL (*op1) == 0xffff
731 && SCALAR_INT_MODE_P (GET_MODE (*op0))
732 && (nonzero_bits (*op0, GET_MODE (*op0))
733 & ~(unsigned HOST_WIDE_INT) 0xffff) == 0)
735 *op0 = gen_lowpart (HImode, *op0);
740 /* Remove redundant UNSPEC_CMPINT conversions if possible. */
741 if (GET_CODE (*op0) == UNSPEC
742 && XINT (*op0, 1) == UNSPEC_CMPINT
743 && XVECLEN (*op0, 0) == 1
744 && GET_MODE (XVECEXP (*op0, 0, 0)) == CCUmode
745 && GET_CODE (XVECEXP (*op0, 0, 0)) == REG
746 && REGNO (XVECEXP (*op0, 0, 0)) == CC_REGNUM
747 && *op1 == const0_rtx)
749 enum rtx_code new_code = UNKNOWN;
752 case EQ: new_code = EQ; break;
753 case NE: new_code = NE; break;
754 case LT: new_code = GTU; break;
755 case GT: new_code = LTU; break;
756 case LE: new_code = GEU; break;
757 case GE: new_code = LEU; break;
761 if (new_code != UNKNOWN)
763 *op0 = XVECEXP (*op0, 0, 0);
769 /* Emit a compare instruction suitable to implement the comparison
770 OP0 CODE OP1. Return the correct condition RTL to be placed in
771 the IF_THEN_ELSE of the conditional branch testing the result. */
774 s390_emit_compare (enum rtx_code code, rtx op0, rtx op1)
776 enum machine_mode mode = s390_select_ccmode (code, op0, op1);
777 rtx cc = gen_rtx_REG (mode, CC_REGNUM);
779 emit_insn (gen_rtx_SET (VOIDmode, cc, gen_rtx_COMPARE (mode, op0, op1)));
780 return gen_rtx_fmt_ee (code, VOIDmode, cc, const0_rtx);
783 /* Emit a jump instruction to TARGET. If COND is NULL_RTX, emit an
784 unconditional jump, else a conditional jump under condition COND. */
787 s390_emit_jump (rtx target, rtx cond)
791 target = gen_rtx_LABEL_REF (VOIDmode, target);
793 target = gen_rtx_IF_THEN_ELSE (VOIDmode, cond, target, pc_rtx);
795 insn = gen_rtx_SET (VOIDmode, pc_rtx, target);
796 emit_jump_insn (insn);
799 /* Return branch condition mask to implement a branch
800 specified by CODE. Return -1 for invalid comparisons. */
803 s390_branch_condition_mask (rtx code)
805 const int CC0 = 1 << 3;
806 const int CC1 = 1 << 2;
807 const int CC2 = 1 << 1;
808 const int CC3 = 1 << 0;
810 if (GET_CODE (XEXP (code, 0)) != REG
811 || REGNO (XEXP (code, 0)) != CC_REGNUM
812 || XEXP (code, 1) != const0_rtx)
815 switch (GET_MODE (XEXP (code, 0)))
818 switch (GET_CODE (code))
821 case NE: return CC1 | CC2 | CC3;
827 switch (GET_CODE (code))
830 case NE: return CC0 | CC2 | CC3;
836 switch (GET_CODE (code))
839 case NE: return CC0 | CC1 | CC3;
845 switch (GET_CODE (code))
848 case NE: return CC0 | CC1 | CC2;
854 switch (GET_CODE (code))
856 case EQ: return CC0 | CC2;
857 case NE: return CC1 | CC3;
863 switch (GET_CODE (code))
865 case LTU: return CC2 | CC3; /* carry */
866 case GEU: return CC0 | CC1; /* no carry */
872 switch (GET_CODE (code))
874 case GTU: return CC0 | CC1; /* borrow */
875 case LEU: return CC2 | CC3; /* no borrow */
881 switch (GET_CODE (code))
883 case EQ: return CC0 | CC2;
884 case NE: return CC1 | CC3;
885 case LTU: return CC1;
886 case GTU: return CC3;
887 case LEU: return CC1 | CC2;
888 case GEU: return CC2 | CC3;
893 switch (GET_CODE (code))
896 case NE: return CC1 | CC2 | CC3;
897 case LTU: return CC1;
898 case GTU: return CC2;
899 case LEU: return CC0 | CC1;
900 case GEU: return CC0 | CC2;
906 switch (GET_CODE (code))
909 case NE: return CC2 | CC1 | CC3;
910 case LTU: return CC2;
911 case GTU: return CC1;
912 case LEU: return CC0 | CC2;
913 case GEU: return CC0 | CC1;
919 switch (GET_CODE (code))
922 case NE: return CC1 | CC2 | CC3;
923 case LT: return CC1 | CC3;
925 case LE: return CC0 | CC1 | CC3;
926 case GE: return CC0 | CC2;
932 switch (GET_CODE (code))
935 case NE: return CC1 | CC2 | CC3;
937 case GT: return CC2 | CC3;
938 case LE: return CC0 | CC1;
939 case GE: return CC0 | CC2 | CC3;
945 switch (GET_CODE (code))
948 case NE: return CC1 | CC2 | CC3;
951 case LE: return CC0 | CC1;
952 case GE: return CC0 | CC2;
953 case UNORDERED: return CC3;
954 case ORDERED: return CC0 | CC1 | CC2;
955 case UNEQ: return CC0 | CC3;
956 case UNLT: return CC1 | CC3;
957 case UNGT: return CC2 | CC3;
958 case UNLE: return CC0 | CC1 | CC3;
959 case UNGE: return CC0 | CC2 | CC3;
960 case LTGT: return CC1 | CC2;
966 switch (GET_CODE (code))
969 case NE: return CC2 | CC1 | CC3;
972 case LE: return CC0 | CC2;
973 case GE: return CC0 | CC1;
974 case UNORDERED: return CC3;
975 case ORDERED: return CC0 | CC2 | CC1;
976 case UNEQ: return CC0 | CC3;
977 case UNLT: return CC2 | CC3;
978 case UNGT: return CC1 | CC3;
979 case UNLE: return CC0 | CC2 | CC3;
980 case UNGE: return CC0 | CC1 | CC3;
981 case LTGT: return CC2 | CC1;
991 /* If INV is false, return assembler mnemonic string to implement
992 a branch specified by CODE. If INV is true, return mnemonic
993 for the corresponding inverted branch. */
996 s390_branch_condition_mnemonic (rtx code, int inv)
998 static const char *const mnemonic[16] =
1000 NULL, "o", "h", "nle",
1001 "l", "nhe", "lh", "ne",
1002 "e", "nlh", "he", "nl",
1003 "le", "nh", "no", NULL
1006 int mask = s390_branch_condition_mask (code);
1007 gcc_assert (mask >= 0);
1012 if (mask < 1 || mask > 14)
1015 return mnemonic[mask];
1018 /* Return the part of op which has a value different from def.
1019 The size of the part is determined by mode.
1020 Use this function only if you already know that op really
1021 contains such a part. */
1023 unsigned HOST_WIDE_INT
1024 s390_extract_part (rtx op, enum machine_mode mode, int def)
1026 unsigned HOST_WIDE_INT value = 0;
1027 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
1028 int part_bits = GET_MODE_BITSIZE (mode);
1029 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
1032 for (i = 0; i < max_parts; i++)
1035 value = (unsigned HOST_WIDE_INT) INTVAL (op);
1037 value >>= part_bits;
1039 if ((value & part_mask) != (def & part_mask))
1040 return value & part_mask;
1046 /* If OP is an integer constant of mode MODE with exactly one
1047 part of mode PART_MODE unequal to DEF, return the number of that
1048 part. Otherwise, return -1. */
1051 s390_single_part (rtx op,
1052 enum machine_mode mode,
1053 enum machine_mode part_mode,
1056 unsigned HOST_WIDE_INT value = 0;
1057 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
1058 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
1061 if (GET_CODE (op) != CONST_INT)
1064 for (i = 0; i < n_parts; i++)
1067 value = (unsigned HOST_WIDE_INT) INTVAL (op);
1069 value >>= GET_MODE_BITSIZE (part_mode);
1071 if ((value & part_mask) != (def & part_mask))
1079 return part == -1 ? -1 : n_parts - 1 - part;
1082 /* Check whether we can (and want to) split a double-word
1083 move in mode MODE from SRC to DST into two single-word
1084 moves, moving the subword FIRST_SUBWORD first. */
1087 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
1089 /* Floating point registers cannot be split. */
1090 if (FP_REG_P (src) || FP_REG_P (dst))
1093 /* We don't need to split if operands are directly accessible. */
1094 if (s_operand (src, mode) || s_operand (dst, mode))
1097 /* Non-offsettable memory references cannot be split. */
1098 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
1099 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
1102 /* Moving the first subword must not clobber a register
1103 needed to move the second subword. */
1104 if (register_operand (dst, mode))
1106 rtx subreg = operand_subword (dst, first_subword, 0, mode);
1107 if (reg_overlap_mentioned_p (subreg, src))
1114 /* Check whether the address of memory reference MEM2 equals exactly
1115 the address of memory reference MEM1 plus DELTA. Return true if
1116 we can prove this to be the case, false otherwise. */
1119 s390_offset_p (rtx mem1, rtx mem2, rtx delta)
1121 rtx addr1, addr2, addr_delta;
1123 if (GET_CODE (mem1) != MEM || GET_CODE (mem2) != MEM)
1126 addr1 = XEXP (mem1, 0);
1127 addr2 = XEXP (mem2, 0);
1129 addr_delta = simplify_binary_operation (MINUS, Pmode, addr2, addr1);
1130 if (!addr_delta || !rtx_equal_p (addr_delta, delta))
1136 /* Expand logical operator CODE in mode MODE with operands OPERANDS. */
1139 s390_expand_logical_operator (enum rtx_code code, enum machine_mode mode,
1142 enum machine_mode wmode = mode;
1143 rtx dst = operands[0];
1144 rtx src1 = operands[1];
1145 rtx src2 = operands[2];
1148 /* If we cannot handle the operation directly, use a temp register. */
1149 if (!s390_logical_operator_ok_p (operands))
1150 dst = gen_reg_rtx (mode);
1152 /* QImode and HImode patterns make sense only if we have a destination
1153 in memory. Otherwise perform the operation in SImode. */
1154 if ((mode == QImode || mode == HImode) && GET_CODE (dst) != MEM)
1157 /* Widen operands if required. */
1160 if (GET_CODE (dst) == SUBREG
1161 && (tem = simplify_subreg (wmode, dst, mode, 0)) != 0)
1163 else if (REG_P (dst))
1164 dst = gen_rtx_SUBREG (wmode, dst, 0);
1166 dst = gen_reg_rtx (wmode);
1168 if (GET_CODE (src1) == SUBREG
1169 && (tem = simplify_subreg (wmode, src1, mode, 0)) != 0)
1171 else if (GET_MODE (src1) != VOIDmode)
1172 src1 = gen_rtx_SUBREG (wmode, force_reg (mode, src1), 0);
1174 if (GET_CODE (src2) == SUBREG
1175 && (tem = simplify_subreg (wmode, src2, mode, 0)) != 0)
1177 else if (GET_MODE (src2) != VOIDmode)
1178 src2 = gen_rtx_SUBREG (wmode, force_reg (mode, src2), 0);
1181 /* Emit the instruction. */
1182 op = gen_rtx_SET (VOIDmode, dst, gen_rtx_fmt_ee (code, wmode, src1, src2));
1183 clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
1184 emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, op, clob)));
1186 /* Fix up the destination if needed. */
1187 if (dst != operands[0])
1188 emit_move_insn (operands[0], gen_lowpart (mode, dst));
1191 /* Check whether OPERANDS are OK for a logical operation (AND, IOR, XOR). */
1194 s390_logical_operator_ok_p (rtx *operands)
1196 /* If the destination operand is in memory, it needs to coincide
1197 with one of the source operands. After reload, it has to be
1198 the first source operand. */
1199 if (GET_CODE (operands[0]) == MEM)
1200 return rtx_equal_p (operands[0], operands[1])
1201 || (!reload_completed && rtx_equal_p (operands[0], operands[2]));
1206 /* Narrow logical operation CODE of memory operand MEMOP with immediate
1207 operand IMMOP to switch from SS to SI type instructions. */
1210 s390_narrow_logical_operator (enum rtx_code code, rtx *memop, rtx *immop)
1212 int def = code == AND ? -1 : 0;
1216 gcc_assert (GET_CODE (*memop) == MEM);
1217 gcc_assert (!MEM_VOLATILE_P (*memop));
1219 mask = s390_extract_part (*immop, QImode, def);
1220 part = s390_single_part (*immop, GET_MODE (*memop), QImode, def);
1221 gcc_assert (part >= 0);
1223 *memop = adjust_address (*memop, QImode, part);
1224 *immop = gen_int_mode (mask, QImode);
1228 /* Change optimizations to be performed, depending on the
1231 LEVEL is the optimization level specified; 2 if `-O2' is
1232 specified, 1 if `-O' is specified, and 0 if neither is specified.
1234 SIZE is nonzero if `-Os' is specified and zero otherwise. */
1237 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
1239 /* ??? There are apparently still problems with -fcaller-saves. */
1240 flag_caller_saves = 0;
1242 /* By default, always emit DWARF-2 unwind info. This allows debugging
1243 without maintaining a stack frame back-chain. */
1244 flag_asynchronous_unwind_tables = 1;
1248 override_options (void)
1253 const char *const name; /* processor name or nickname. */
1254 const enum processor_type processor;
1255 const enum processor_flags flags;
1257 const processor_alias_table[] =
1259 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
1260 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
1261 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
1262 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
1263 | PF_LONG_DISPLACEMENT},
1266 int const pta_size = ARRAY_SIZE (processor_alias_table);
1268 /* Acquire a unique set number for our register saves and restores. */
1269 s390_sr_alias_set = new_alias_set ();
1271 /* Set up function hooks. */
1272 init_machine_status = s390_init_machine_status;
1274 /* Architecture mode defaults according to ABI. */
1275 if (!(target_flags_explicit & MASK_ZARCH))
1278 target_flags |= MASK_ZARCH;
1280 target_flags &= ~MASK_ZARCH;
1283 /* Determine processor architectural level. */
1284 if (!s390_arch_string)
1285 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
1287 for (i = 0; i < pta_size; i++)
1288 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
1290 s390_arch = processor_alias_table[i].processor;
1291 s390_arch_flags = processor_alias_table[i].flags;
1295 error ("Unknown cpu used in -march=%s.", s390_arch_string);
1297 /* Determine processor to tune for. */
1298 if (!s390_tune_string)
1300 s390_tune = s390_arch;
1301 s390_tune_flags = s390_arch_flags;
1302 s390_tune_string = s390_arch_string;
1306 for (i = 0; i < pta_size; i++)
1307 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
1309 s390_tune = processor_alias_table[i].processor;
1310 s390_tune_flags = processor_alias_table[i].flags;
1314 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
1317 /* Sanity checks. */
1318 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
1319 error ("z/Architecture mode not supported on %s.", s390_arch_string);
1320 if (TARGET_64BIT && !TARGET_ZARCH)
1321 error ("64-bit ABI not supported in ESA/390 mode.");
1324 /* Set processor cost function. */
1325 if (s390_tune == PROCESSOR_2084_Z990)
1326 s390_cost = &z990_cost;
1328 s390_cost = &z900_cost;
1331 if (TARGET_BACKCHAIN && TARGET_PACKED_STACK && TARGET_HARD_FLOAT)
1332 error ("-mbackchain -mpacked-stack -mhard-float are not supported "
1335 if (s390_warn_framesize_string)
1337 if (sscanf (s390_warn_framesize_string, HOST_WIDE_INT_PRINT_DEC,
1338 &s390_warn_framesize) != 1)
1339 error ("invalid value for -mwarn-framesize");
1342 if (s390_warn_dynamicstack_string)
1343 s390_warn_dynamicstack_p = 1;
1345 if (s390_stack_size_string)
1347 if (sscanf (s390_stack_size_string, HOST_WIDE_INT_PRINT_DEC,
1348 &s390_stack_size) != 1)
1349 error ("invalid value for -mstack-size");
1351 if (exact_log2 (s390_stack_size) == -1)
1352 error ("stack size must be an exact power of 2");
1354 if (s390_stack_guard_string)
1356 if (sscanf (s390_stack_guard_string, HOST_WIDE_INT_PRINT_DEC,
1357 &s390_stack_guard) != 1)
1358 error ("invalid value for -mstack-guard");
1360 if (s390_stack_guard >= s390_stack_size)
1361 error ("stack size must be greater than the stack guard value");
1363 if (exact_log2 (s390_stack_guard) == -1)
1364 error ("stack guard value must be an exact power of 2");
1367 error ("-mstack-size implies use of -mstack-guard");
1370 if (s390_stack_guard_string && !s390_stack_size_string)
1371 error ("-mstack-guard implies use of -mstack-size");
1374 /* Map for smallest class containing reg regno. */
1376 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
1377 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1378 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1379 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1380 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1381 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1382 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1383 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1384 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1385 ADDR_REGS, CC_REGS, ADDR_REGS, ADDR_REGS,
1386 ACCESS_REGS, ACCESS_REGS
1389 /* Return attribute type of insn. */
1391 static enum attr_type
1392 s390_safe_attr_type (rtx insn)
1394 if (recog_memoized (insn) >= 0)
1395 return get_attr_type (insn);
1400 /* Return true if DISP is a valid short displacement. */
1403 s390_short_displacement (rtx disp)
1405 /* No displacement is OK. */
1409 /* Integer displacement in range. */
1410 if (GET_CODE (disp) == CONST_INT)
1411 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1413 /* GOT offset is not OK, the GOT can be large. */
1414 if (GET_CODE (disp) == CONST
1415 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1416 && (XINT (XEXP (disp, 0), 1) == UNSPEC_GOT
1417 || XINT (XEXP (disp, 0), 1) == UNSPEC_GOTNTPOFF))
1420 /* All other symbolic constants are literal pool references,
1421 which are OK as the literal pool must be small. */
1422 if (GET_CODE (disp) == CONST)
1428 /* Return true if OP is a valid operand for a C constraint. */
1431 s390_extra_constraint_str (rtx op, int c, const char * str)
1433 struct s390_address addr;
1438 /* Check for offsettable variants of memory constraints. */
1441 /* Only accept non-volatile MEMs. */
1442 if (!MEM_P (op) || MEM_VOLATILE_P (op))
1445 if ((reload_completed || reload_in_progress)
1446 ? !offsettable_memref_p (op)
1447 : !offsettable_nonstrict_memref_p (op))
1453 /* Check for non-literal-pool variants of memory constraints. */
1456 if (GET_CODE (op) != MEM)
1458 if (!s390_decompose_address (XEXP (op, 0), &addr))
1460 if (addr.base && REG_P (addr.base) && REGNO (addr.base) == BASE_REGNUM)
1462 if (addr.indx && REG_P (addr.indx) && REGNO (addr.indx) == BASE_REGNUM)
1471 if (GET_CODE (op) != MEM)
1473 if (!s390_decompose_address (XEXP (op, 0), &addr))
1478 if (TARGET_LONG_DISPLACEMENT)
1480 if (!s390_short_displacement (addr.disp))
1486 if (GET_CODE (op) != MEM)
1489 if (TARGET_LONG_DISPLACEMENT)
1491 if (!s390_decompose_address (XEXP (op, 0), &addr))
1493 if (!s390_short_displacement (addr.disp))
1499 if (!TARGET_LONG_DISPLACEMENT)
1501 if (GET_CODE (op) != MEM)
1503 if (!s390_decompose_address (XEXP (op, 0), &addr))
1507 if (s390_short_displacement (addr.disp))
1512 if (!TARGET_LONG_DISPLACEMENT)
1514 if (GET_CODE (op) != MEM)
1516 /* Any invalid address here will be fixed up by reload,
1517 so accept it for the most generic constraint. */
1518 if (s390_decompose_address (XEXP (op, 0), &addr)
1519 && s390_short_displacement (addr.disp))
1524 if (TARGET_LONG_DISPLACEMENT)
1526 if (!s390_decompose_address (op, &addr))
1528 if (!s390_short_displacement (addr.disp))
1534 if (!TARGET_LONG_DISPLACEMENT)
1536 /* Any invalid address here will be fixed up by reload,
1537 so accept it for the most generic constraint. */
1538 if (s390_decompose_address (op, &addr)
1539 && s390_short_displacement (addr.disp))
1544 return shift_count_operand (op, VOIDmode);
1553 /* Return true if VALUE matches the constraint STR. */
1556 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1560 enum machine_mode mode, part_mode;
1562 int part, part_goal;
1570 return (unsigned int)value < 256;
1573 return (unsigned int)value < 4096;
1576 return value >= -32768 && value < 32768;
1579 return (TARGET_LONG_DISPLACEMENT ?
1580 (value >= -524288 && value <= 524287)
1581 : (value >= 0 && value <= 4095));
1583 return value == 2147483647;
1589 part_goal = str[1] - '0';
1593 case 'H': part_mode = HImode; break;
1594 case 'Q': part_mode = QImode; break;
1600 case 'H': mode = HImode; break;
1601 case 'S': mode = SImode; break;
1602 case 'D': mode = DImode; break;
1608 case '0': def = 0; break;
1609 case 'F': def = -1; break;
1613 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1616 part = s390_single_part (GEN_INT (value), mode, part_mode, def);
1619 if (part_goal != -1 && part_goal != part)
1631 /* Compute a (partial) cost for rtx X. Return true if the complete
1632 cost has been computed, and false if subexpressions should be
1633 scanned. In either case, *TOTAL contains the cost result.
1634 CODE contains GET_CODE (x), OUTER_CODE contains the code
1635 of the superexpression of x. */
1638 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1661 *total = COSTS_N_INSNS (1);
1666 /* Check for multiply and add. */
1667 if ((GET_MODE (x) == DFmode || GET_MODE (x) == SFmode)
1668 && GET_CODE (XEXP (x, 0)) == MULT
1669 && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && TARGET_FUSED_MADD)
1671 /* This is the multiply and add case. */
1672 if (GET_MODE (x) == DFmode)
1673 *total = s390_cost->madbr;
1675 *total = s390_cost->maebr;
1676 *total += rtx_cost (XEXP (XEXP (x, 0), 0), MULT)
1677 + rtx_cost (XEXP (XEXP (x, 0), 1), MULT)
1678 + rtx_cost (XEXP (x, 1), code);
1679 return true; /* Do not do an additional recursive descent. */
1681 *total = COSTS_N_INSNS (1);
1685 switch (GET_MODE (x))
1689 rtx left = XEXP (x, 0);
1690 rtx right = XEXP (x, 1);
1691 if (GET_CODE (right) == CONST_INT
1692 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (right), 'K', "K"))
1693 *total = s390_cost->mhi;
1694 else if (GET_CODE (left) == SIGN_EXTEND)
1695 *total = s390_cost->mh;
1697 *total = s390_cost->ms; /* msr, ms, msy */
1702 rtx left = XEXP (x, 0);
1703 rtx right = XEXP (x, 1);
1706 if (GET_CODE (right) == CONST_INT
1707 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (right), 'K', "K"))
1708 *total = s390_cost->mghi;
1709 else if (GET_CODE (left) == SIGN_EXTEND)
1710 *total = s390_cost->msgf;
1712 *total = s390_cost->msg; /* msgr, msg */
1714 else /* TARGET_31BIT */
1716 if (GET_CODE (left) == SIGN_EXTEND
1717 && GET_CODE (right) == SIGN_EXTEND)
1718 /* mulsidi case: mr, m */
1719 *total = s390_cost->m;
1720 else if (GET_CODE (left) == ZERO_EXTEND
1721 && GET_CODE (right) == ZERO_EXTEND
1722 && TARGET_CPU_ZARCH)
1723 /* umulsidi case: ml, mlr */
1724 *total = s390_cost->ml;
1726 /* Complex calculation is required. */
1727 *total = COSTS_N_INSNS (40);
1733 *total = s390_cost->mult_df;
1742 if (GET_MODE (x) == TImode) /* 128 bit division */
1743 *total = s390_cost->dlgr;
1744 else if (GET_MODE (x) == DImode)
1746 rtx right = XEXP (x, 1);
1747 if (GET_CODE (right) == ZERO_EXTEND) /* 64 by 32 bit division */
1748 *total = s390_cost->dlr;
1749 else /* 64 by 64 bit division */
1750 *total = s390_cost->dlgr;
1752 else if (GET_MODE (x) == SImode) /* 32 bit division */
1753 *total = s390_cost->dlr;
1758 if (GET_MODE (x) == DImode)
1760 rtx right = XEXP (x, 1);
1761 if (GET_CODE (right) == ZERO_EXTEND) /* 64 by 32 bit division */
1763 *total = s390_cost->dsgfr;
1765 *total = s390_cost->dr;
1766 else /* 64 by 64 bit division */
1767 *total = s390_cost->dsgr;
1769 else if (GET_MODE (x) == SImode) /* 32 bit division */
1770 *total = s390_cost->dlr;
1771 else if (GET_MODE (x) == SFmode)
1773 if (TARGET_IEEE_FLOAT)
1774 *total = s390_cost->debr;
1775 else /* TARGET_IBM_FLOAT */
1776 *total = s390_cost->der;
1778 else if (GET_MODE (x) == DFmode)
1780 if (TARGET_IEEE_FLOAT)
1781 *total = s390_cost->ddbr;
1782 else /* TARGET_IBM_FLOAT */
1783 *total = s390_cost->ddr;
1788 if (GET_MODE (x) == SFmode)
1789 *total = s390_cost->sqebr;
1791 *total = s390_cost->sqdbr;
1796 if (outer_code == MULT || outer_code == DIV || outer_code == MOD
1797 || outer_code == PLUS || outer_code == MINUS
1798 || outer_code == COMPARE)
1803 *total = COSTS_N_INSNS (1);
1804 if (GET_CODE (XEXP (x, 0)) == AND
1805 && GET_CODE (XEXP (x, 1)) == CONST_INT
1806 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1808 rtx op0 = XEXP (XEXP (x, 0), 0);
1809 rtx op1 = XEXP (XEXP (x, 0), 1);
1810 rtx op2 = XEXP (x, 1);
1812 if (memory_operand (op0, GET_MODE (op0))
1813 && s390_tm_ccmode (op1, op2, 0) != VOIDmode)
1815 if (register_operand (op0, GET_MODE (op0))
1816 && s390_tm_ccmode (op1, op2, 1) != VOIDmode)
1826 /* Return the cost of an address rtx ADDR. */
1829 s390_address_cost (rtx addr)
1831 struct s390_address ad;
1832 if (!s390_decompose_address (addr, &ad))
1835 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1838 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1839 otherwise return 0. */
1842 tls_symbolic_operand (register rtx op)
1844 if (GET_CODE (op) != SYMBOL_REF)
1846 return SYMBOL_REF_TLS_MODEL (op);
1849 /* Split DImode access register reference REG (on 64-bit) into its constituent
1850 low and high parts, and store them into LO and HI. Note that gen_lowpart/
1851 gen_highpart cannot be used as they assume all registers are word-sized,
1852 while our access registers have only half that size. */
1855 s390_split_access_reg (rtx reg, rtx *lo, rtx *hi)
1857 gcc_assert (TARGET_64BIT);
1858 gcc_assert (ACCESS_REG_P (reg));
1859 gcc_assert (GET_MODE (reg) == DImode);
1860 gcc_assert (!(REGNO (reg) & 1));
1862 *lo = gen_rtx_REG (SImode, REGNO (reg) + 1);
1863 *hi = gen_rtx_REG (SImode, REGNO (reg));
1866 /* Return true if OP contains a symbol reference */
1869 symbolic_reference_mentioned_p (rtx op)
1871 register const char *fmt;
1874 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1877 fmt = GET_RTX_FORMAT (GET_CODE (op));
1878 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1884 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1885 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1889 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1896 /* Return true if OP contains a reference to a thread-local symbol. */
1899 tls_symbolic_reference_mentioned_p (rtx op)
1901 register const char *fmt;
1904 if (GET_CODE (op) == SYMBOL_REF)
1905 return tls_symbolic_operand (op);
1907 fmt = GET_RTX_FORMAT (GET_CODE (op));
1908 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1914 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1915 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1919 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1927 /* Return true if OP is a legitimate general operand when
1928 generating PIC code. It is given that flag_pic is on
1929 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1932 legitimate_pic_operand_p (register rtx op)
1934 /* Accept all non-symbolic constants. */
1935 if (!SYMBOLIC_CONST (op))
1938 /* Reject everything else; must be handled
1939 via emit_symbolic_move. */
1943 /* Returns true if the constant value OP is a legitimate general operand.
1944 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1947 legitimate_constant_p (register rtx op)
1949 /* Accept all non-symbolic constants. */
1950 if (!SYMBOLIC_CONST (op))
1953 /* Accept immediate LARL operands. */
1954 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1957 /* Thread-local symbols are never legal constants. This is
1958 so that emit_call knows that computing such addresses
1959 might require a function call. */
1960 if (TLS_SYMBOLIC_CONST (op))
1963 /* In the PIC case, symbolic constants must *not* be
1964 forced into the literal pool. We accept them here,
1965 so that they will be handled by emit_symbolic_move. */
1969 /* All remaining non-PIC symbolic constants are
1970 forced into the literal pool. */
1974 /* Determine if it's legal to put X into the constant pool. This
1975 is not possible if X contains the address of a symbol that is
1976 not constant (TLS) or not known at final link time (PIC). */
1979 s390_cannot_force_const_mem (rtx x)
1981 switch (GET_CODE (x))
1985 /* Accept all non-symbolic constants. */
1989 /* Labels are OK iff we are non-PIC. */
1990 return flag_pic != 0;
1993 /* 'Naked' TLS symbol references are never OK,
1994 non-TLS symbols are OK iff we are non-PIC. */
1995 if (tls_symbolic_operand (x))
1998 return flag_pic != 0;
2001 return s390_cannot_force_const_mem (XEXP (x, 0));
2004 return s390_cannot_force_const_mem (XEXP (x, 0))
2005 || s390_cannot_force_const_mem (XEXP (x, 1));
2008 switch (XINT (x, 1))
2010 /* Only lt-relative or GOT-relative UNSPECs are OK. */
2011 case UNSPEC_LTREL_OFFSET:
2019 case UNSPEC_GOTNTPOFF:
2020 case UNSPEC_INDNTPOFF:
2023 /* If the literal pool shares the code section, be put
2024 execute template placeholders into the pool as well. */
2026 return TARGET_CPU_ZARCH;
2038 /* Returns true if the constant value OP is a legitimate general
2039 operand during and after reload. The difference to
2040 legitimate_constant_p is that this function will not accept
2041 a constant that would need to be forced to the literal pool
2042 before it can be used as operand. */
2045 legitimate_reload_constant_p (register rtx op)
2047 /* Accept la(y) operands. */
2048 if (GET_CODE (op) == CONST_INT
2049 && DISP_IN_RANGE (INTVAL (op)))
2052 /* Accept l(g)hi operands. */
2053 if (GET_CODE (op) == CONST_INT
2054 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
2057 /* Accept lliXX operands. */
2059 && s390_single_part (op, DImode, HImode, 0) >= 0)
2062 /* Accept larl operands. */
2063 if (TARGET_CPU_ZARCH
2064 && larl_operand (op, VOIDmode))
2067 /* Everything else cannot be handled without reload. */
2071 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
2072 return the class of reg to actually use. */
2075 s390_preferred_reload_class (rtx op, enum reg_class class)
2077 switch (GET_CODE (op))
2079 /* Constants we cannot reload must be forced into the
2084 if (legitimate_reload_constant_p (op))
2089 /* If a symbolic constant or a PLUS is reloaded,
2090 it is most likely being used as an address, so
2091 prefer ADDR_REGS. If 'class' is not a superset
2092 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
2097 if (reg_class_subset_p (ADDR_REGS, class))
2109 /* Return the register class of a scratch register needed to
2110 load IN into a register of class CLASS in MODE.
2112 We need a temporary when loading a PLUS expression which
2113 is not a legitimate operand of the LOAD ADDRESS instruction. */
2116 s390_secondary_input_reload_class (enum reg_class class,
2117 enum machine_mode mode, rtx in)
2119 if (s390_plus_operand (in, mode))
2122 if (reg_classes_intersect_p (CC_REGS, class))
2123 return GENERAL_REGS;
2128 /* Return the register class of a scratch register needed to
2129 store a register of class CLASS in MODE into OUT:
2131 We need a temporary when storing a double-word to a
2132 non-offsettable memory address. */
2135 s390_secondary_output_reload_class (enum reg_class class,
2136 enum machine_mode mode, rtx out)
2138 if ((TARGET_64BIT ? mode == TImode
2139 : (mode == DImode || mode == DFmode))
2140 && reg_classes_intersect_p (GENERAL_REGS, class)
2141 && GET_CODE (out) == MEM
2142 && GET_CODE (XEXP (out, 0)) == PLUS
2143 && GET_CODE (XEXP (XEXP (out, 0), 0)) == PLUS
2144 && GET_CODE (XEXP (XEXP (out, 0), 1)) == CONST_INT
2145 && !DISP_IN_RANGE (INTVAL (XEXP (XEXP (out, 0), 1))
2146 + GET_MODE_SIZE (mode) - 1))
2149 if (reg_classes_intersect_p (CC_REGS, class))
2150 return GENERAL_REGS;
2155 /* Generate code to load SRC, which is PLUS that is not a
2156 legitimate operand for the LA instruction, into TARGET.
2157 SCRATCH may be used as scratch register. */
2160 s390_expand_plus_operand (register rtx target, register rtx src,
2161 register rtx scratch)
2164 struct s390_address ad;
2166 /* src must be a PLUS; get its two operands. */
2167 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
2170 /* Check if any of the two operands is already scheduled
2171 for replacement by reload. This can happen e.g. when
2172 float registers occur in an address. */
2173 sum1 = find_replacement (&XEXP (src, 0));
2174 sum2 = find_replacement (&XEXP (src, 1));
2175 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2177 /* If the address is already strictly valid, there's nothing to do. */
2178 if (!s390_decompose_address (src, &ad)
2179 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2180 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
2182 /* Otherwise, one of the operands cannot be an address register;
2183 we reload its value into the scratch register. */
2184 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
2186 emit_move_insn (scratch, sum1);
2189 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
2191 emit_move_insn (scratch, sum2);
2195 /* According to the way these invalid addresses are generated
2196 in reload.c, it should never happen (at least on s390) that
2197 *neither* of the PLUS components, after find_replacements
2198 was applied, is an address register. */
2199 if (sum1 == scratch && sum2 == scratch)
2205 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2208 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
2209 is only ever performed on addresses, so we can mark the
2210 sum as legitimate for LA in any case. */
2211 s390_load_address (target, src);
2215 /* Decompose a RTL expression ADDR for a memory address into
2216 its components, returned in OUT.
2218 Returns 0 if ADDR is not a valid memory address, nonzero
2219 otherwise. If OUT is NULL, don't return the components,
2220 but check for validity only.
2222 Note: Only addresses in canonical form are recognized.
2223 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2224 canonical form so that they will be recognized. */
2227 s390_decompose_address (register rtx addr, struct s390_address *out)
2229 HOST_WIDE_INT offset = 0;
2230 rtx base = NULL_RTX;
2231 rtx indx = NULL_RTX;
2232 rtx disp = NULL_RTX;
2234 int pointer = FALSE;
2235 int base_ptr = FALSE;
2236 int indx_ptr = FALSE;
2238 /* Decompose address into base + index + displacement. */
2240 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2243 else if (GET_CODE (addr) == PLUS)
2245 rtx op0 = XEXP (addr, 0);
2246 rtx op1 = XEXP (addr, 1);
2247 enum rtx_code code0 = GET_CODE (op0);
2248 enum rtx_code code1 = GET_CODE (op1);
2250 if (code0 == REG || code0 == UNSPEC)
2252 if (code1 == REG || code1 == UNSPEC)
2254 indx = op0; /* index + base */
2260 base = op0; /* base + displacement */
2265 else if (code0 == PLUS)
2267 indx = XEXP (op0, 0); /* index + base + disp */
2268 base = XEXP (op0, 1);
2279 disp = addr; /* displacement */
2281 /* Extract integer part of displacement. */
2285 if (GET_CODE (disp) == CONST_INT)
2287 offset = INTVAL (disp);
2290 else if (GET_CODE (disp) == CONST
2291 && GET_CODE (XEXP (disp, 0)) == PLUS
2292 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2294 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2295 disp = XEXP (XEXP (disp, 0), 0);
2299 /* Strip off CONST here to avoid special case tests later. */
2300 if (disp && GET_CODE (disp) == CONST)
2301 disp = XEXP (disp, 0);
2303 /* We can convert literal pool addresses to
2304 displacements by basing them off the base register. */
2305 if (disp && GET_CODE (disp) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (disp))
2307 /* Either base or index must be free to hold the base register. */
2309 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2311 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2315 /* Mark up the displacement. */
2316 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2317 UNSPEC_LTREL_OFFSET);
2320 /* Validate base register. */
2323 if (GET_CODE (base) == UNSPEC)
2324 switch (XINT (base, 1))
2328 disp = gen_rtx_UNSPEC (Pmode,
2329 gen_rtvec (1, XVECEXP (base, 0, 0)),
2330 UNSPEC_LTREL_OFFSET);
2334 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2337 case UNSPEC_LTREL_BASE:
2338 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2345 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2348 if (REGNO (base) == BASE_REGNUM
2349 || REGNO (base) == STACK_POINTER_REGNUM
2350 || REGNO (base) == FRAME_POINTER_REGNUM
2351 || ((reload_completed || reload_in_progress)
2352 && frame_pointer_needed
2353 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2354 || REGNO (base) == ARG_POINTER_REGNUM
2356 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2357 pointer = base_ptr = TRUE;
2360 /* Validate index register. */
2363 if (GET_CODE (indx) == UNSPEC)
2364 switch (XINT (indx, 1))
2368 disp = gen_rtx_UNSPEC (Pmode,
2369 gen_rtvec (1, XVECEXP (indx, 0, 0)),
2370 UNSPEC_LTREL_OFFSET);
2374 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2377 case UNSPEC_LTREL_BASE:
2378 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2385 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2388 if (REGNO (indx) == BASE_REGNUM
2389 || REGNO (indx) == STACK_POINTER_REGNUM
2390 || REGNO (indx) == FRAME_POINTER_REGNUM
2391 || ((reload_completed || reload_in_progress)
2392 && frame_pointer_needed
2393 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2394 || REGNO (indx) == ARG_POINTER_REGNUM
2396 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2397 pointer = indx_ptr = TRUE;
2400 /* Prefer to use pointer as base, not index. */
2401 if (base && indx && !base_ptr
2402 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2409 /* Validate displacement. */
2412 /* If the argument pointer or the return address pointer are involved,
2413 the displacement will change later anyway as the virtual registers get
2414 eliminated. This could make a valid displacement invalid, but it is
2415 more likely to make an invalid displacement valid, because we sometimes
2416 access the register save area via negative offsets to one of those
2418 Thus we don't check the displacement for validity here. If after
2419 elimination the displacement turns out to be invalid after all,
2420 this is fixed up by reload in any case. */
2421 if (base != arg_pointer_rtx
2422 && indx != arg_pointer_rtx
2423 && base != return_address_pointer_rtx
2424 && indx != return_address_pointer_rtx)
2425 if (!DISP_IN_RANGE (offset))
2430 /* All the special cases are pointers. */
2433 /* In the small-PIC case, the linker converts @GOT
2434 and @GOTNTPOFF offsets to possible displacements. */
2435 if (GET_CODE (disp) == UNSPEC
2436 && (XINT (disp, 1) == UNSPEC_GOT
2437 || XINT (disp, 1) == UNSPEC_GOTNTPOFF)
2444 /* Accept chunkified literal pool symbol references. */
2445 else if (GET_CODE (disp) == MINUS
2446 && GET_CODE (XEXP (disp, 0)) == LABEL_REF
2447 && GET_CODE (XEXP (disp, 1)) == LABEL_REF)
2452 /* Accept literal pool references. */
2453 else if (GET_CODE (disp) == UNSPEC
2454 && XINT (disp, 1) == UNSPEC_LTREL_OFFSET)
2456 orig_disp = gen_rtx_CONST (Pmode, disp);
2459 /* If we have an offset, make sure it does not
2460 exceed the size of the constant pool entry. */
2461 rtx sym = XVECEXP (disp, 0, 0);
2462 if (offset >= GET_MODE_SIZE (get_pool_mode (sym)))
2465 orig_disp = plus_constant (orig_disp, offset);
2480 out->disp = orig_disp;
2481 out->pointer = pointer;
2487 /* Return nonzero if ADDR is a valid memory address.
2488 STRICT specifies whether strict register checking applies. */
2491 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2492 register rtx addr, int strict)
2494 struct s390_address ad;
2495 if (!s390_decompose_address (addr, &ad))
2500 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2502 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2507 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2509 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2516 /* Return 1 if OP is a valid operand for the LA instruction.
2517 In 31-bit, we need to prove that the result is used as an
2518 address, as LA performs only a 31-bit addition. */
2521 legitimate_la_operand_p (register rtx op)
2523 struct s390_address addr;
2524 if (!s390_decompose_address (op, &addr))
2527 if (TARGET_64BIT || addr.pointer)
2533 /* Return 1 if it is valid *and* preferable to use LA to
2534 compute the sum of OP1 and OP2. */
2537 preferred_la_operand_p (rtx op1, rtx op2)
2539 struct s390_address addr;
2541 if (op2 != const0_rtx)
2542 op1 = gen_rtx_PLUS (Pmode, op1, op2);
2544 if (!s390_decompose_address (op1, &addr))
2546 if (addr.base && !REG_OK_FOR_BASE_STRICT_P (addr.base))
2548 if (addr.indx && !REG_OK_FOR_INDEX_STRICT_P (addr.indx))
2551 if (!TARGET_64BIT && !addr.pointer)
2557 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2558 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2564 /* Emit a forced load-address operation to load SRC into DST.
2565 This will use the LOAD ADDRESS instruction even in situations
2566 where legitimate_la_operand_p (SRC) returns false. */
2569 s390_load_address (rtx dst, rtx src)
2572 emit_move_insn (dst, src);
2574 emit_insn (gen_force_la_31 (dst, src));
2577 /* Return a legitimate reference for ORIG (an address) using the
2578 register REG. If REG is 0, a new pseudo is generated.
2580 There are two types of references that must be handled:
2582 1. Global data references must load the address from the GOT, via
2583 the PIC reg. An insn is emitted to do this load, and the reg is
2586 2. Static data references, constant pool addresses, and code labels
2587 compute the address as an offset from the GOT, whose base is in
2588 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2589 differentiate them from global data objects. The returned
2590 address is the PIC reg + an unspec constant.
2592 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2593 reg also appears in the address. */
2596 legitimize_pic_address (rtx orig, rtx reg)
2602 if (GET_CODE (addr) == LABEL_REF
2603 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2605 /* This is a local symbol. */
2606 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2608 /* Access local symbols PC-relative via LARL.
2609 This is the same as in the non-PIC case, so it is
2610 handled automatically ... */
2614 /* Access local symbols relative to the GOT. */
2616 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2618 if (reload_in_progress || reload_completed)
2619 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2621 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2622 addr = gen_rtx_CONST (Pmode, addr);
2623 addr = force_const_mem (Pmode, addr);
2624 emit_move_insn (temp, addr);
2626 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2629 s390_load_address (reg, new);
2634 else if (GET_CODE (addr) == SYMBOL_REF)
2637 reg = gen_reg_rtx (Pmode);
2641 /* Assume GOT offset < 4k. This is handled the same way
2642 in both 31- and 64-bit code (@GOT). */
2644 if (reload_in_progress || reload_completed)
2645 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2647 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2648 new = gen_rtx_CONST (Pmode, new);
2649 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2650 new = gen_const_mem (Pmode, new);
2651 emit_move_insn (reg, new);
2654 else if (TARGET_CPU_ZARCH)
2656 /* If the GOT offset might be >= 4k, we determine the position
2657 of the GOT entry via a PC-relative LARL (@GOTENT). */
2659 rtx temp = gen_reg_rtx (Pmode);
2661 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2662 new = gen_rtx_CONST (Pmode, new);
2663 emit_move_insn (temp, new);
2665 new = gen_const_mem (Pmode, temp);
2666 emit_move_insn (reg, new);
2671 /* If the GOT offset might be >= 4k, we have to load it
2672 from the literal pool (@GOT). */
2674 rtx temp = gen_reg_rtx (Pmode);
2676 if (reload_in_progress || reload_completed)
2677 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2679 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2680 addr = gen_rtx_CONST (Pmode, addr);
2681 addr = force_const_mem (Pmode, addr);
2682 emit_move_insn (temp, addr);
2684 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2685 new = gen_const_mem (Pmode, new);
2686 emit_move_insn (reg, new);
2692 if (GET_CODE (addr) == CONST)
2694 addr = XEXP (addr, 0);
2695 if (GET_CODE (addr) == UNSPEC)
2697 if (XVECLEN (addr, 0) != 1)
2699 switch (XINT (addr, 1))
2701 /* If someone moved a GOT-relative UNSPEC
2702 out of the literal pool, force them back in. */
2705 new = force_const_mem (Pmode, orig);
2708 /* @GOT is OK as is if small. */
2711 new = force_const_mem (Pmode, orig);
2714 /* @GOTENT is OK as is. */
2718 /* @PLT is OK as is on 64-bit, must be converted to
2719 GOT-relative @PLTOFF on 31-bit. */
2721 if (!TARGET_CPU_ZARCH)
2723 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2725 if (reload_in_progress || reload_completed)
2726 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2728 addr = XVECEXP (addr, 0, 0);
2729 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2731 addr = gen_rtx_CONST (Pmode, addr);
2732 addr = force_const_mem (Pmode, addr);
2733 emit_move_insn (temp, addr);
2735 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2738 s390_load_address (reg, new);
2744 /* Everything else cannot happen. */
2749 else if (GET_CODE (addr) != PLUS)
2752 if (GET_CODE (addr) == PLUS)
2754 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2755 /* Check first to see if this is a constant offset
2756 from a local symbol reference. */
2757 if ((GET_CODE (op0) == LABEL_REF
2758 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2759 && GET_CODE (op1) == CONST_INT)
2761 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2763 if (INTVAL (op1) & 1)
2765 /* LARL can't handle odd offsets, so emit a
2766 pair of LARL and LA. */
2767 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2769 if (!DISP_IN_RANGE (INTVAL (op1)))
2771 int even = INTVAL (op1) - 1;
2772 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2773 op0 = gen_rtx_CONST (Pmode, op0);
2777 emit_move_insn (temp, op0);
2778 new = gen_rtx_PLUS (Pmode, temp, op1);
2782 s390_load_address (reg, new);
2788 /* If the offset is even, we can just use LARL.
2789 This will happen automatically. */
2794 /* Access local symbols relative to the GOT. */
2796 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2798 if (reload_in_progress || reload_completed)
2799 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2801 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2803 addr = gen_rtx_PLUS (Pmode, addr, op1);
2804 addr = gen_rtx_CONST (Pmode, addr);
2805 addr = force_const_mem (Pmode, addr);
2806 emit_move_insn (temp, addr);
2808 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2811 s390_load_address (reg, new);
2817 /* Now, check whether it is a GOT relative symbol plus offset
2818 that was pulled out of the literal pool. Force it back in. */
2820 else if (GET_CODE (op0) == UNSPEC
2821 && GET_CODE (op1) == CONST_INT
2822 && XINT (op0, 1) == UNSPEC_GOTOFF)
2824 if (XVECLEN (op0, 0) != 1)
2827 new = force_const_mem (Pmode, orig);
2830 /* Otherwise, compute the sum. */
2833 base = legitimize_pic_address (XEXP (addr, 0), reg);
2834 new = legitimize_pic_address (XEXP (addr, 1),
2835 base == reg ? NULL_RTX : reg);
2836 if (GET_CODE (new) == CONST_INT)
2837 new = plus_constant (base, INTVAL (new));
2840 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2842 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2843 new = XEXP (new, 1);
2845 new = gen_rtx_PLUS (Pmode, base, new);
2848 if (GET_CODE (new) == CONST)
2849 new = XEXP (new, 0);
2850 new = force_operand (new, 0);
2857 /* Load the thread pointer into a register. */
2860 get_thread_pointer (void)
2862 rtx tp = gen_reg_rtx (Pmode);
2864 emit_move_insn (tp, gen_rtx_REG (Pmode, TP_REGNUM));
2865 mark_reg_pointer (tp, BITS_PER_WORD);
2870 /* Emit a tls call insn. The call target is the SYMBOL_REF stored
2871 in s390_tls_symbol which always refers to __tls_get_offset.
2872 The returned offset is written to RESULT_REG and an USE rtx is
2873 generated for TLS_CALL. */
2875 static GTY(()) rtx s390_tls_symbol;
2878 s390_emit_tls_call_insn (rtx result_reg, rtx tls_call)
2885 if (!s390_tls_symbol)
2886 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2888 insn = s390_emit_call (s390_tls_symbol, tls_call, result_reg,
2889 gen_rtx_REG (Pmode, RETURN_REGNUM));
2891 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), result_reg);
2892 CONST_OR_PURE_CALL_P (insn) = 1;
2895 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2896 this (thread-local) address. REG may be used as temporary. */
2899 legitimize_tls_address (rtx addr, rtx reg)
2901 rtx new, tls_call, temp, base, r2, insn;
2903 if (GET_CODE (addr) == SYMBOL_REF)
2904 switch (tls_symbolic_operand (addr))
2906 case TLS_MODEL_GLOBAL_DYNAMIC:
2908 r2 = gen_rtx_REG (Pmode, 2);
2909 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2910 new = gen_rtx_CONST (Pmode, tls_call);
2911 new = force_const_mem (Pmode, new);
2912 emit_move_insn (r2, new);
2913 s390_emit_tls_call_insn (r2, tls_call);
2914 insn = get_insns ();
2917 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2918 temp = gen_reg_rtx (Pmode);
2919 emit_libcall_block (insn, temp, r2, new);
2921 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2924 s390_load_address (reg, new);
2929 case TLS_MODEL_LOCAL_DYNAMIC:
2931 r2 = gen_rtx_REG (Pmode, 2);
2932 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2933 new = gen_rtx_CONST (Pmode, tls_call);
2934 new = force_const_mem (Pmode, new);
2935 emit_move_insn (r2, new);
2936 s390_emit_tls_call_insn (r2, tls_call);
2937 insn = get_insns ();
2940 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2941 temp = gen_reg_rtx (Pmode);
2942 emit_libcall_block (insn, temp, r2, new);
2944 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2945 base = gen_reg_rtx (Pmode);
2946 s390_load_address (base, new);
2948 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2949 new = gen_rtx_CONST (Pmode, new);
2950 new = force_const_mem (Pmode, new);
2951 temp = gen_reg_rtx (Pmode);
2952 emit_move_insn (temp, new);
2954 new = gen_rtx_PLUS (Pmode, base, temp);
2957 s390_load_address (reg, new);
2962 case TLS_MODEL_INITIAL_EXEC:
2965 /* Assume GOT offset < 4k. This is handled the same way
2966 in both 31- and 64-bit code. */
2968 if (reload_in_progress || reload_completed)
2969 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2971 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2972 new = gen_rtx_CONST (Pmode, new);
2973 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2974 new = gen_const_mem (Pmode, new);
2975 temp = gen_reg_rtx (Pmode);
2976 emit_move_insn (temp, new);
2978 else if (TARGET_CPU_ZARCH)
2980 /* If the GOT offset might be >= 4k, we determine the position
2981 of the GOT entry via a PC-relative LARL. */
2983 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2984 new = gen_rtx_CONST (Pmode, new);
2985 temp = gen_reg_rtx (Pmode);
2986 emit_move_insn (temp, new);
2988 new = gen_const_mem (Pmode, temp);
2989 temp = gen_reg_rtx (Pmode);
2990 emit_move_insn (temp, new);
2994 /* If the GOT offset might be >= 4k, we have to load it
2995 from the literal pool. */
2997 if (reload_in_progress || reload_completed)
2998 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
3000 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
3001 new = gen_rtx_CONST (Pmode, new);
3002 new = force_const_mem (Pmode, new);
3003 temp = gen_reg_rtx (Pmode);
3004 emit_move_insn (temp, new);
3006 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
3007 new = gen_const_mem (Pmode, new);
3009 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
3010 temp = gen_reg_rtx (Pmode);
3011 emit_insn (gen_rtx_SET (Pmode, temp, new));
3015 /* In position-dependent code, load the absolute address of
3016 the GOT entry from the literal pool. */
3018 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
3019 new = gen_rtx_CONST (Pmode, new);
3020 new = force_const_mem (Pmode, new);
3021 temp = gen_reg_rtx (Pmode);
3022 emit_move_insn (temp, new);
3025 new = gen_const_mem (Pmode, new);
3026 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
3027 temp = gen_reg_rtx (Pmode);
3028 emit_insn (gen_rtx_SET (Pmode, temp, new));
3031 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
3034 s390_load_address (reg, new);
3039 case TLS_MODEL_LOCAL_EXEC:
3040 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
3041 new = gen_rtx_CONST (Pmode, new);
3042 new = force_const_mem (Pmode, new);
3043 temp = gen_reg_rtx (Pmode);
3044 emit_move_insn (temp, new);
3046 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
3049 s390_load_address (reg, new);
3058 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
3060 switch (XINT (XEXP (addr, 0), 1))
3062 case UNSPEC_INDNTPOFF:
3063 if (TARGET_CPU_ZARCH)
3074 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3075 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3077 new = XEXP (XEXP (addr, 0), 0);
3078 if (GET_CODE (new) != SYMBOL_REF)
3079 new = gen_rtx_CONST (Pmode, new);
3081 new = legitimize_tls_address (new, reg);
3082 new = plus_constant (new, INTVAL (XEXP (XEXP (addr, 0), 1)));
3083 new = force_operand (new, 0);
3087 abort (); /* for now ... */
3092 /* Emit insns to move operands[1] into operands[0]. */
3095 emit_symbolic_move (rtx *operands)
3097 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
3099 if (GET_CODE (operands[0]) == MEM)
3100 operands[1] = force_reg (Pmode, operands[1]);
3101 else if (TLS_SYMBOLIC_CONST (operands[1]))
3102 operands[1] = legitimize_tls_address (operands[1], temp);
3104 operands[1] = legitimize_pic_address (operands[1], temp);
3107 /* Try machine-dependent ways of modifying an illegitimate address X
3108 to be legitimate. If we find one, return the new, valid address.
3110 OLDX is the address as it was before break_out_memory_refs was called.
3111 In some cases it is useful to look at this to decide what needs to be done.
3113 MODE is the mode of the operand pointed to by X.
3115 When -fpic is used, special handling is needed for symbolic references.
3116 See comments by legitimize_pic_address for details. */
3119 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
3120 enum machine_mode mode ATTRIBUTE_UNUSED)
3122 rtx constant_term = const0_rtx;
3124 if (TLS_SYMBOLIC_CONST (x))
3126 x = legitimize_tls_address (x, 0);
3128 if (legitimate_address_p (mode, x, FALSE))
3133 if (SYMBOLIC_CONST (x)
3134 || (GET_CODE (x) == PLUS
3135 && (SYMBOLIC_CONST (XEXP (x, 0))
3136 || SYMBOLIC_CONST (XEXP (x, 1)))))
3137 x = legitimize_pic_address (x, 0);
3139 if (legitimate_address_p (mode, x, FALSE))
3143 x = eliminate_constant_term (x, &constant_term);
3145 /* Optimize loading of large displacements by splitting them
3146 into the multiple of 4K and the rest; this allows the
3147 former to be CSE'd if possible.
3149 Don't do this if the displacement is added to a register
3150 pointing into the stack frame, as the offsets will
3151 change later anyway. */
3153 if (GET_CODE (constant_term) == CONST_INT
3154 && !TARGET_LONG_DISPLACEMENT
3155 && !DISP_IN_RANGE (INTVAL (constant_term))
3156 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
3158 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
3159 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
3161 rtx temp = gen_reg_rtx (Pmode);
3162 rtx val = force_operand (GEN_INT (upper), temp);
3164 emit_move_insn (temp, val);
3166 x = gen_rtx_PLUS (Pmode, x, temp);
3167 constant_term = GEN_INT (lower);
3170 if (GET_CODE (x) == PLUS)
3172 if (GET_CODE (XEXP (x, 0)) == REG)
3174 register rtx temp = gen_reg_rtx (Pmode);
3175 register rtx val = force_operand (XEXP (x, 1), temp);
3177 emit_move_insn (temp, val);
3179 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
3182 else if (GET_CODE (XEXP (x, 1)) == REG)
3184 register rtx temp = gen_reg_rtx (Pmode);
3185 register rtx val = force_operand (XEXP (x, 0), temp);
3187 emit_move_insn (temp, val);
3189 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
3193 if (constant_term != const0_rtx)
3194 x = gen_rtx_PLUS (Pmode, x, constant_term);
3199 /* Try a machine-dependent way of reloading an illegitimate address AD
3200 operand. If we find one, push the reload and and return the new address.
3202 MODE is the mode of the enclosing MEM. OPNUM is the operand number
3203 and TYPE is the reload type of the current reload. */
3206 legitimize_reload_address (rtx ad, enum machine_mode mode ATTRIBUTE_UNUSED,
3207 int opnum, int type)
3209 if (!optimize || TARGET_LONG_DISPLACEMENT)
3212 if (GET_CODE (ad) == PLUS)
3214 rtx tem = simplify_binary_operation (PLUS, Pmode,
3215 XEXP (ad, 0), XEXP (ad, 1));
3220 if (GET_CODE (ad) == PLUS
3221 && GET_CODE (XEXP (ad, 0)) == REG
3222 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3223 && !DISP_IN_RANGE (INTVAL (XEXP (ad, 1))))
3225 HOST_WIDE_INT lower = INTVAL (XEXP (ad, 1)) & 0xfff;
3226 HOST_WIDE_INT upper = INTVAL (XEXP (ad, 1)) ^ lower;
3229 cst = GEN_INT (upper);
3230 if (!legitimate_reload_constant_p (cst))
3231 cst = force_const_mem (Pmode, cst);
3233 tem = gen_rtx_PLUS (Pmode, XEXP (ad, 0), cst);
3234 new = gen_rtx_PLUS (Pmode, tem, GEN_INT (lower));
3236 push_reload (XEXP (tem, 1), 0, &XEXP (tem, 1), 0,
3237 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
3238 opnum, (enum reload_type) type);
3245 /* Emit code to move LEN bytes from DST to SRC. */
3248 s390_expand_movmem (rtx dst, rtx src, rtx len)
3250 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3252 if (INTVAL (len) > 0)
3253 emit_insn (gen_movmem_short (dst, src, GEN_INT (INTVAL (len) - 1)));
3256 else if (TARGET_MVCLE)
3258 emit_insn (gen_movmem_long (dst, src, convert_to_mode (Pmode, len, 1)));
3263 rtx dst_addr, src_addr, count, blocks, temp;
3264 rtx loop_start_label = gen_label_rtx ();
3265 rtx loop_end_label = gen_label_rtx ();
3266 rtx end_label = gen_label_rtx ();
3267 enum machine_mode mode;
3269 mode = GET_MODE (len);
3270 if (mode == VOIDmode)
3273 dst_addr = gen_reg_rtx (Pmode);
3274 src_addr = gen_reg_rtx (Pmode);
3275 count = gen_reg_rtx (mode);
3276 blocks = gen_reg_rtx (mode);
3278 convert_move (count, len, 1);
3279 emit_cmp_and_jump_insns (count, const0_rtx,
3280 EQ, NULL_RTX, mode, 1, end_label);
3282 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3283 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
3284 dst = change_address (dst, VOIDmode, dst_addr);
3285 src = change_address (src, VOIDmode, src_addr);
3287 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3289 emit_move_insn (count, temp);
3291 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3293 emit_move_insn (blocks, temp);
3295 emit_cmp_and_jump_insns (blocks, const0_rtx,
3296 EQ, NULL_RTX, mode, 1, loop_end_label);
3298 emit_label (loop_start_label);
3300 emit_insn (gen_movmem_short (dst, src, GEN_INT (255)));
3301 s390_load_address (dst_addr,
3302 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3303 s390_load_address (src_addr,
3304 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
3306 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3308 emit_move_insn (blocks, temp);
3310 emit_cmp_and_jump_insns (blocks, const0_rtx,
3311 EQ, NULL_RTX, mode, 1, loop_end_label);
3313 emit_jump (loop_start_label);
3314 emit_label (loop_end_label);
3316 emit_insn (gen_movmem_short (dst, src,
3317 convert_to_mode (Pmode, count, 1)));
3318 emit_label (end_label);
3322 /* Emit code to clear LEN bytes at DST. */
3325 s390_expand_clrmem (rtx dst, rtx len)
3327 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3329 if (INTVAL (len) > 0)
3330 emit_insn (gen_clrmem_short (dst, GEN_INT (INTVAL (len) - 1)));
3333 else if (TARGET_MVCLE)
3335 emit_insn (gen_clrmem_long (dst, convert_to_mode (Pmode, len, 1)));
3340 rtx dst_addr, src_addr, count, blocks, temp;
3341 rtx loop_start_label = gen_label_rtx ();
3342 rtx loop_end_label = gen_label_rtx ();
3343 rtx end_label = gen_label_rtx ();
3344 enum machine_mode mode;
3346 mode = GET_MODE (len);
3347 if (mode == VOIDmode)
3350 dst_addr = gen_reg_rtx (Pmode);
3351 src_addr = gen_reg_rtx (Pmode);
3352 count = gen_reg_rtx (mode);
3353 blocks = gen_reg_rtx (mode);
3355 convert_move (count, len, 1);
3356 emit_cmp_and_jump_insns (count, const0_rtx,
3357 EQ, NULL_RTX, mode, 1, end_label);
3359 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3360 dst = change_address (dst, VOIDmode, dst_addr);
3362 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3364 emit_move_insn (count, temp);
3366 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3368 emit_move_insn (blocks, temp);
3370 emit_cmp_and_jump_insns (blocks, const0_rtx,
3371 EQ, NULL_RTX, mode, 1, loop_end_label);
3373 emit_label (loop_start_label);
3375 emit_insn (gen_clrmem_short (dst, GEN_INT (255)));
3376 s390_load_address (dst_addr,
3377 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3379 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3381 emit_move_insn (blocks, temp);
3383 emit_cmp_and_jump_insns (blocks, const0_rtx,
3384 EQ, NULL_RTX, mode, 1, loop_end_label);
3386 emit_jump (loop_start_label);
3387 emit_label (loop_end_label);
3389 emit_insn (gen_clrmem_short (dst, convert_to_mode (Pmode, count, 1)));
3390 emit_label (end_label);
3394 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3395 and return the result in TARGET. */
3398 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3400 rtx ccreg = gen_rtx_REG (CCUmode, CC_REGNUM);
3403 /* As the result of CMPINT is inverted compared to what we need,
3404 we have to swap the operands. */
3405 tmp = op0; op0 = op1; op1 = tmp;
3407 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3409 if (INTVAL (len) > 0)
3411 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3412 emit_insn (gen_cmpint (target, ccreg));
3415 emit_move_insn (target, const0_rtx);
3417 else if (TARGET_MVCLE)
3419 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3420 emit_insn (gen_cmpint (target, ccreg));
3424 rtx addr0, addr1, count, blocks, temp;
3425 rtx loop_start_label = gen_label_rtx ();
3426 rtx loop_end_label = gen_label_rtx ();
3427 rtx end_label = gen_label_rtx ();
3428 enum machine_mode mode;
3430 mode = GET_MODE (len);
3431 if (mode == VOIDmode)
3434 addr0 = gen_reg_rtx (Pmode);
3435 addr1 = gen_reg_rtx (Pmode);
3436 count = gen_reg_rtx (mode);
3437 blocks = gen_reg_rtx (mode);
3439 convert_move (count, len, 1);
3440 emit_cmp_and_jump_insns (count, const0_rtx,
3441 EQ, NULL_RTX, mode, 1, end_label);
3443 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3444 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3445 op0 = change_address (op0, VOIDmode, addr0);
3446 op1 = change_address (op1, VOIDmode, addr1);
3448 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3450 emit_move_insn (count, temp);
3452 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3454 emit_move_insn (blocks, temp);
3456 emit_cmp_and_jump_insns (blocks, const0_rtx,
3457 EQ, NULL_RTX, mode, 1, loop_end_label);
3459 emit_label (loop_start_label);
3461 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3462 temp = gen_rtx_NE (VOIDmode, ccreg, const0_rtx);
3463 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3464 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3465 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3466 emit_jump_insn (temp);
3468 s390_load_address (addr0,
3469 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3470 s390_load_address (addr1,
3471 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3473 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3475 emit_move_insn (blocks, temp);
3477 emit_cmp_and_jump_insns (blocks, const0_rtx,
3478 EQ, NULL_RTX, mode, 1, loop_end_label);
3480 emit_jump (loop_start_label);
3481 emit_label (loop_end_label);
3483 emit_insn (gen_cmpmem_short (op0, op1,
3484 convert_to_mode (Pmode, count, 1)));
3485 emit_label (end_label);
3487 emit_insn (gen_cmpint (target, ccreg));
3492 /* Expand conditional increment or decrement using alc/slb instructions.
3493 Should generate code setting DST to either SRC or SRC + INCREMENT,
3494 depending on the result of the comparison CMP_OP0 CMP_CODE CMP_OP1.
3495 Returns true if successful, false otherwise.
3497 That makes it possible to implement some if-constructs without jumps e.g.:
3498 (borrow = CC0 | CC1 and carry = CC2 | CC3)
3499 unsigned int a, b, c;
3500 if (a < b) c++; -> CCU b > a -> CC2; c += carry;
3501 if (a < b) c--; -> CCL3 a - b -> borrow; c -= borrow;
3502 if (a <= b) c++; -> CCL3 b - a -> borrow; c += carry;
3503 if (a <= b) c--; -> CCU a <= b -> borrow; c -= borrow;
3505 Checks for EQ and NE with a nonzero value need an additional xor e.g.:
3506 if (a == b) c++; -> CCL3 a ^= b; 0 - a -> borrow; c += carry;
3507 if (a == b) c--; -> CCU a ^= b; a <= 0 -> CC0 | CC1; c -= borrow;
3508 if (a != b) c++; -> CCU a ^= b; a > 0 -> CC2; c += carry;
3509 if (a != b) c--; -> CCL3 a ^= b; 0 - a -> borrow; c -= borrow; */
3512 s390_expand_addcc (enum rtx_code cmp_code, rtx cmp_op0, rtx cmp_op1,
3513 rtx dst, rtx src, rtx increment)
3515 enum machine_mode cmp_mode;
3516 enum machine_mode cc_mode;
3521 if ((GET_MODE (cmp_op0) == SImode || GET_MODE (cmp_op0) == VOIDmode)
3522 && (GET_MODE (cmp_op1) == SImode || GET_MODE (cmp_op1) == VOIDmode))
3524 else if ((GET_MODE (cmp_op0) == DImode || GET_MODE (cmp_op0) == VOIDmode)
3525 && (GET_MODE (cmp_op1) == DImode || GET_MODE (cmp_op1) == VOIDmode))
3530 /* Try ADD LOGICAL WITH CARRY. */
3531 if (increment == const1_rtx)
3533 /* Determine CC mode to use. */
3534 if (cmp_code == EQ || cmp_code == NE)
3536 if (cmp_op1 != const0_rtx)
3538 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3539 NULL_RTX, 0, OPTAB_WIDEN);
3540 cmp_op1 = const0_rtx;
3543 cmp_code = cmp_code == EQ ? LEU : GTU;
3546 if (cmp_code == LTU || cmp_code == LEU)
3551 cmp_code = swap_condition (cmp_code);
3568 /* Emit comparison instruction pattern. */
3569 if (!register_operand (cmp_op0, cmp_mode))
3570 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3572 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3573 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3574 /* We use insn_invalid_p here to add clobbers if required. */
3575 if (insn_invalid_p (emit_insn (insn)))
3578 /* Emit ALC instruction pattern. */
3579 op_res = gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3580 gen_rtx_REG (cc_mode, CC_REGNUM),
3583 if (src != const0_rtx)
3585 if (!register_operand (src, GET_MODE (dst)))
3586 src = force_reg (GET_MODE (dst), src);
3588 src = gen_rtx_PLUS (GET_MODE (dst), src, const0_rtx);
3589 op_res = gen_rtx_PLUS (GET_MODE (dst), src, op_res);
3592 p = rtvec_alloc (2);
3594 gen_rtx_SET (VOIDmode, dst, op_res);
3596 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3597 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3602 /* Try SUBTRACT LOGICAL WITH BORROW. */
3603 if (increment == constm1_rtx)
3605 /* Determine CC mode to use. */
3606 if (cmp_code == EQ || cmp_code == NE)
3608 if (cmp_op1 != const0_rtx)
3610 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3611 NULL_RTX, 0, OPTAB_WIDEN);
3612 cmp_op1 = const0_rtx;
3615 cmp_code = cmp_code == EQ ? LEU : GTU;
3618 if (cmp_code == GTU || cmp_code == GEU)
3623 cmp_code = swap_condition (cmp_code);
3640 /* Emit comparison instruction pattern. */
3641 if (!register_operand (cmp_op0, cmp_mode))
3642 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3644 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3645 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3646 /* We use insn_invalid_p here to add clobbers if required. */
3647 if (insn_invalid_p (emit_insn (insn)))
3650 /* Emit SLB instruction pattern. */
3651 if (!register_operand (src, GET_MODE (dst)))
3652 src = force_reg (GET_MODE (dst), src);
3654 op_res = gen_rtx_MINUS (GET_MODE (dst),
3655 gen_rtx_MINUS (GET_MODE (dst), src, const0_rtx),
3656 gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3657 gen_rtx_REG (cc_mode, CC_REGNUM),
3659 p = rtvec_alloc (2);
3661 gen_rtx_SET (VOIDmode, dst, op_res);
3663 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3664 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3673 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3674 We need to emit DTP-relative relocations. */
3677 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3682 fputs ("\t.long\t", file);
3685 fputs ("\t.quad\t", file);
3690 output_addr_const (file, x);
3691 fputs ("@DTPOFF", file);
3694 /* In the name of slightly smaller debug output, and to cater to
3695 general assembler lossage, recognize various UNSPEC sequences
3696 and turn them back into a direct symbol reference. */
3699 s390_delegitimize_address (rtx orig_x)
3703 if (GET_CODE (x) != MEM)
3707 if (GET_CODE (x) == PLUS
3708 && GET_CODE (XEXP (x, 1)) == CONST
3709 && GET_CODE (XEXP (x, 0)) == REG
3710 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3712 y = XEXP (XEXP (x, 1), 0);
3713 if (GET_CODE (y) == UNSPEC
3714 && XINT (y, 1) == UNSPEC_GOT)
3715 return XVECEXP (y, 0, 0);
3719 if (GET_CODE (x) == CONST)
3722 if (GET_CODE (y) == UNSPEC
3723 && XINT (y, 1) == UNSPEC_GOTENT)
3724 return XVECEXP (y, 0, 0);
3731 /* Output shift count operand OP to stdio stream FILE. */
3734 print_shift_count_operand (FILE *file, rtx op)
3736 HOST_WIDE_INT offset = 0;
3738 /* We can have an integer constant, an address register,
3739 or a sum of the two. */
3740 if (GET_CODE (op) == CONST_INT)
3742 offset = INTVAL (op);
3745 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3747 offset = INTVAL (XEXP (op, 1));
3750 while (op && GET_CODE (op) == SUBREG)
3751 op = SUBREG_REG (op);
3754 if (op && (GET_CODE (op) != REG
3755 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3756 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3759 /* Shift counts are truncated to the low six bits anyway. */
3760 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3762 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3765 /* Locate some local-dynamic symbol still in use by this function
3766 so that we can print its name in local-dynamic base patterns. */
3769 get_some_local_dynamic_name (void)
3773 if (cfun->machine->some_ld_name)
3774 return cfun->machine->some_ld_name;
3776 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3778 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3779 return cfun->machine->some_ld_name;
3785 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3789 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3791 x = get_pool_constant (x);
3792 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3795 if (GET_CODE (x) == SYMBOL_REF
3796 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3798 cfun->machine->some_ld_name = XSTR (x, 0);
3805 /* Output machine-dependent UNSPECs occurring in address constant X
3806 in assembler syntax to stdio stream FILE. Returns true if the
3807 constant X could be recognized, false otherwise. */
3810 s390_output_addr_const_extra (FILE *file, rtx x)
3812 if (GET_CODE (x) == UNSPEC && XVECLEN (x, 0) == 1)
3813 switch (XINT (x, 1))
3816 output_addr_const (file, XVECEXP (x, 0, 0));
3817 fprintf (file, "@GOTENT");
3820 output_addr_const (file, XVECEXP (x, 0, 0));
3821 fprintf (file, "@GOT");
3824 output_addr_const (file, XVECEXP (x, 0, 0));
3825 fprintf (file, "@GOTOFF");
3828 output_addr_const (file, XVECEXP (x, 0, 0));
3829 fprintf (file, "@PLT");
3832 output_addr_const (file, XVECEXP (x, 0, 0));
3833 fprintf (file, "@PLTOFF");
3836 output_addr_const (file, XVECEXP (x, 0, 0));
3837 fprintf (file, "@TLSGD");
3840 assemble_name (file, get_some_local_dynamic_name ());
3841 fprintf (file, "@TLSLDM");
3844 output_addr_const (file, XVECEXP (x, 0, 0));
3845 fprintf (file, "@DTPOFF");
3848 output_addr_const (file, XVECEXP (x, 0, 0));
3849 fprintf (file, "@NTPOFF");
3851 case UNSPEC_GOTNTPOFF:
3852 output_addr_const (file, XVECEXP (x, 0, 0));
3853 fprintf (file, "@GOTNTPOFF");
3855 case UNSPEC_INDNTPOFF:
3856 output_addr_const (file, XVECEXP (x, 0, 0));
3857 fprintf (file, "@INDNTPOFF");
3864 /* Output address operand ADDR in assembler syntax to
3865 stdio stream FILE. */
3868 print_operand_address (FILE *file, rtx addr)
3870 struct s390_address ad;
3872 if (!s390_decompose_address (addr, &ad)
3873 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3874 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3875 output_operand_lossage ("Cannot decompose address.");
3878 output_addr_const (file, ad.disp);
3880 fprintf (file, "0");
3882 if (ad.base && ad.indx)
3883 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3884 reg_names[REGNO (ad.base)]);
3886 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3889 /* Output operand X in assembler syntax to stdio stream FILE.
3890 CODE specified the format flag. The following format flags
3893 'C': print opcode suffix for branch condition.
3894 'D': print opcode suffix for inverse branch condition.
3895 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3896 'O': print only the displacement of a memory reference.
3897 'R': print only the base register of a memory reference.
3898 'S': print S-type memory reference (base+displacement).
3899 'N': print the second word of a DImode operand.
3900 'M': print the second word of a TImode operand.
3901 'Y': print shift count operand.
3903 'b': print integer X as if it's an unsigned byte.
3904 'x': print integer X as if it's an unsigned word.
3905 'h': print integer X as if it's a signed word.
3906 'i': print the first nonzero HImode part of X.
3907 'j': print the first HImode part unequal to 0xffff of X. */
3910 print_operand (FILE *file, rtx x, int code)
3915 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3919 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3923 if (GET_CODE (x) == SYMBOL_REF)
3925 fprintf (file, "%s", ":tls_load:");
3926 output_addr_const (file, x);
3928 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3930 fprintf (file, "%s", ":tls_gdcall:");
3931 output_addr_const (file, XVECEXP (x, 0, 0));
3933 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3935 fprintf (file, "%s", ":tls_ldcall:");
3936 assemble_name (file, get_some_local_dynamic_name ());
3944 struct s390_address ad;
3946 if (GET_CODE (x) != MEM
3947 || !s390_decompose_address (XEXP (x, 0), &ad)
3948 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3953 output_addr_const (file, ad.disp);
3955 fprintf (file, "0");
3961 struct s390_address ad;
3963 if (GET_CODE (x) != MEM
3964 || !s390_decompose_address (XEXP (x, 0), &ad)
3965 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3970 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3972 fprintf (file, "0");
3978 struct s390_address ad;
3980 if (GET_CODE (x) != MEM
3981 || !s390_decompose_address (XEXP (x, 0), &ad)
3982 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3987 output_addr_const (file, ad.disp);
3989 fprintf (file, "0");
3992 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3997 if (GET_CODE (x) == REG)
3998 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3999 else if (GET_CODE (x) == MEM)
4000 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
4006 if (GET_CODE (x) == REG)
4007 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
4008 else if (GET_CODE (x) == MEM)
4009 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
4015 print_shift_count_operand (file, x);
4019 switch (GET_CODE (x))
4022 fprintf (file, "%s", reg_names[REGNO (x)]);
4026 output_address (XEXP (x, 0));
4033 output_addr_const (file, x);
4038 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
4039 else if (code == 'x')
4040 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
4041 else if (code == 'h')
4042 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
4043 else if (code == 'i')
4044 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
4045 s390_extract_part (x, HImode, 0));
4046 else if (code == 'j')
4047 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
4048 s390_extract_part (x, HImode, -1));
4050 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
4054 if (GET_MODE (x) != VOIDmode)
4057 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
4058 else if (code == 'x')
4059 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
4060 else if (code == 'h')
4061 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
4067 fatal_insn ("UNKNOWN in print_operand !?", x);
4072 /* Target hook for assembling integer objects. We need to define it
4073 here to work a round a bug in some versions of GAS, which couldn't
4074 handle values smaller than INT_MIN when printed in decimal. */
4077 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
4079 if (size == 8 && aligned_p
4080 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
4082 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
4086 return default_assemble_integer (x, size, aligned_p);
4089 /* Returns true if register REGNO is used for forming
4090 a memory address in expression X. */
4093 reg_used_in_mem_p (int regno, rtx x)
4095 enum rtx_code code = GET_CODE (x);
4101 if (refers_to_regno_p (regno, regno+1,
4105 else if (code == SET
4106 && GET_CODE (SET_DEST (x)) == PC)
4108 if (refers_to_regno_p (regno, regno+1,
4113 fmt = GET_RTX_FORMAT (code);
4114 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4117 && reg_used_in_mem_p (regno, XEXP (x, i)))
4120 else if (fmt[i] == 'E')
4121 for (j = 0; j < XVECLEN (x, i); j++)
4122 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
4128 /* Returns true if expression DEP_RTX sets an address register
4129 used by instruction INSN to address memory. */
4132 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
4136 if (GET_CODE (dep_rtx) == INSN)
4137 dep_rtx = PATTERN (dep_rtx);
4139 if (GET_CODE (dep_rtx) == SET)
4141 target = SET_DEST (dep_rtx);
4142 if (GET_CODE (target) == STRICT_LOW_PART)
4143 target = XEXP (target, 0);
4144 while (GET_CODE (target) == SUBREG)
4145 target = SUBREG_REG (target);
4147 if (GET_CODE (target) == REG)
4149 int regno = REGNO (target);
4151 if (s390_safe_attr_type (insn) == TYPE_LA)
4153 pat = PATTERN (insn);
4154 if (GET_CODE (pat) == PARALLEL)
4156 if (XVECLEN (pat, 0) != 2)
4158 pat = XVECEXP (pat, 0, 0);
4160 if (GET_CODE (pat) == SET)
4161 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
4165 else if (get_attr_atype (insn) == ATYPE_AGEN)
4166 return reg_used_in_mem_p (regno, PATTERN (insn));
4172 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
4175 s390_agen_dep_p (rtx dep_insn, rtx insn)
4177 rtx dep_rtx = PATTERN (dep_insn);
4180 if (GET_CODE (dep_rtx) == SET
4181 && addr_generation_dependency_p (dep_rtx, insn))
4183 else if (GET_CODE (dep_rtx) == PARALLEL)
4185 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
4187 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
4194 /* A C statement (sans semicolon) to update the integer scheduling priority
4195 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
4196 reduce the priority to execute INSN later. Do not define this macro if
4197 you do not need to adjust the scheduling priorities of insns.
4199 A STD instruction should be scheduled earlier,
4200 in order to use the bypass. */
4203 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
4205 if (! INSN_P (insn))
4208 if (s390_tune != PROCESSOR_2084_Z990)
4211 switch (s390_safe_attr_type (insn))
4215 priority = priority << 3;
4219 priority = priority << 1;
4227 /* The number of instructions that can be issued per cycle. */
4230 s390_issue_rate (void)
4232 if (s390_tune == PROCESSOR_2084_Z990)
4238 s390_first_cycle_multipass_dfa_lookahead (void)
4244 /* Split all branches that exceed the maximum distance.
4245 Returns true if this created a new literal pool entry. */
4248 s390_split_branches (void)
4250 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
4251 int new_literal = 0;
4252 rtx insn, pat, tmp, target;
4255 /* We need correct insn addresses. */
4257 shorten_branches (get_insns ());
4259 /* Find all branches that exceed 64KB, and split them. */
4261 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4263 if (GET_CODE (insn) != JUMP_INSN)
4266 pat = PATTERN (insn);
4267 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4268 pat = XVECEXP (pat, 0, 0);
4269 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
4272 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
4274 label = &SET_SRC (pat);
4276 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
4278 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
4279 label = &XEXP (SET_SRC (pat), 1);
4280 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
4281 label = &XEXP (SET_SRC (pat), 2);
4288 if (get_attr_length (insn) <= 4)
4291 /* We are going to use the return register as scratch register,
4292 make sure it will be saved/restored by the prologue/epilogue. */
4293 cfun_frame_layout.save_return_addr_p = 1;
4298 tmp = force_const_mem (Pmode, *label);
4299 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
4300 INSN_ADDRESSES_NEW (tmp, -1);
4301 annotate_constant_pool_refs (&PATTERN (tmp));
4308 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
4309 UNSPEC_LTREL_OFFSET);
4310 target = gen_rtx_CONST (Pmode, target);
4311 target = force_const_mem (Pmode, target);
4312 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
4313 INSN_ADDRESSES_NEW (tmp, -1);
4314 annotate_constant_pool_refs (&PATTERN (tmp));
4316 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XEXP (target, 0),
4317 cfun->machine->base_reg),
4319 target = gen_rtx_PLUS (Pmode, temp_reg, target);
4322 if (!validate_change (insn, label, target, 0))
4329 /* Annotate every literal pool reference in X by an UNSPEC_LTREF expression.
4330 Fix up MEMs as required. */
4333 annotate_constant_pool_refs (rtx *x)
4338 if (GET_CODE (*x) == SYMBOL_REF
4339 && CONSTANT_POOL_ADDRESS_P (*x))
4342 /* Literal pool references can only occur inside a MEM ... */
4343 if (GET_CODE (*x) == MEM)
4345 rtx memref = XEXP (*x, 0);
4347 if (GET_CODE (memref) == SYMBOL_REF
4348 && CONSTANT_POOL_ADDRESS_P (memref))
4350 rtx base = cfun->machine->base_reg;
4351 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, memref, base),
4354 *x = replace_equiv_address (*x, addr);
4358 if (GET_CODE (memref) == CONST
4359 && GET_CODE (XEXP (memref, 0)) == PLUS
4360 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
4361 && GET_CODE (XEXP (XEXP (memref, 0), 0)) == SYMBOL_REF
4362 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (memref, 0), 0)))
4364 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4365 rtx sym = XEXP (XEXP (memref, 0), 0);
4366 rtx base = cfun->machine->base_reg;
4367 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4370 *x = replace_equiv_address (*x, plus_constant (addr, off));
4375 /* ... or a load-address type pattern. */
4376 if (GET_CODE (*x) == SET)
4378 rtx addrref = SET_SRC (*x);
4380 if (GET_CODE (addrref) == SYMBOL_REF
4381 && CONSTANT_POOL_ADDRESS_P (addrref))
4383 rtx base = cfun->machine->base_reg;
4384 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, addrref, base),
4387 SET_SRC (*x) = addr;
4391 if (GET_CODE (addrref) == CONST
4392 && GET_CODE (XEXP (addrref, 0)) == PLUS
4393 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4394 && GET_CODE (XEXP (XEXP (addrref, 0), 0)) == SYMBOL_REF
4395 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addrref, 0), 0)))
4397 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4398 rtx sym = XEXP (XEXP (addrref, 0), 0);
4399 rtx base = cfun->machine->base_reg;
4400 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4403 SET_SRC (*x) = plus_constant (addr, off);
4408 /* Annotate LTREL_BASE as well. */
4409 if (GET_CODE (*x) == UNSPEC
4410 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4412 rtx base = cfun->machine->base_reg;
4413 *x = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XVECEXP (*x, 0, 0), base),
4418 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4419 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4423 annotate_constant_pool_refs (&XEXP (*x, i));
4425 else if (fmt[i] == 'E')
4427 for (j = 0; j < XVECLEN (*x, i); j++)
4428 annotate_constant_pool_refs (&XVECEXP (*x, i, j));
4434 /* Find an annotated literal pool symbol referenced in RTX X,
4435 and store it at REF. Will abort if X contains references to
4436 more than one such pool symbol; multiple references to the same
4437 symbol are allowed, however.
4439 The rtx pointed to by REF must be initialized to NULL_RTX
4440 by the caller before calling this routine. */
4443 find_constant_pool_ref (rtx x, rtx *ref)
4448 /* Ignore LTREL_BASE references. */
4449 if (GET_CODE (x) == UNSPEC
4450 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4452 /* Likewise POOL_ENTRY insns. */
4453 if (GET_CODE (x) == UNSPEC_VOLATILE
4454 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
4457 if (GET_CODE (x) == SYMBOL_REF
4458 && CONSTANT_POOL_ADDRESS_P (x))
4461 if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_LTREF)
4463 rtx sym = XVECEXP (x, 0, 0);
4464 if (GET_CODE (sym) != SYMBOL_REF
4465 || !CONSTANT_POOL_ADDRESS_P (sym))
4468 if (*ref == NULL_RTX)
4470 else if (*ref != sym)
4476 fmt = GET_RTX_FORMAT (GET_CODE (x));
4477 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4481 find_constant_pool_ref (XEXP (x, i), ref);
4483 else if (fmt[i] == 'E')
4485 for (j = 0; j < XVECLEN (x, i); j++)
4486 find_constant_pool_ref (XVECEXP (x, i, j), ref);
4491 /* Replace every reference to the annotated literal pool
4492 symbol REF in X by its base plus OFFSET. */
4495 replace_constant_pool_ref (rtx *x, rtx ref, rtx offset)
4503 if (GET_CODE (*x) == UNSPEC
4504 && XINT (*x, 1) == UNSPEC_LTREF
4505 && XVECEXP (*x, 0, 0) == ref)
4507 *x = gen_rtx_PLUS (Pmode, XVECEXP (*x, 0, 1), offset);
4511 if (GET_CODE (*x) == PLUS
4512 && GET_CODE (XEXP (*x, 1)) == CONST_INT
4513 && GET_CODE (XEXP (*x, 0)) == UNSPEC
4514 && XINT (XEXP (*x, 0), 1) == UNSPEC_LTREF
4515 && XVECEXP (XEXP (*x, 0), 0, 0) == ref)
4517 rtx addr = gen_rtx_PLUS (Pmode, XVECEXP (XEXP (*x, 0), 0, 1), offset);
4518 *x = plus_constant (addr, INTVAL (XEXP (*x, 1)));
4522 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4523 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4527 replace_constant_pool_ref (&XEXP (*x, i), ref, offset);
4529 else if (fmt[i] == 'E')
4531 for (j = 0; j < XVECLEN (*x, i); j++)
4532 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, offset);
4537 /* Check whether X contains an UNSPEC_LTREL_BASE.
4538 Return its constant pool symbol if found, NULL_RTX otherwise. */
4541 find_ltrel_base (rtx x)
4546 if (GET_CODE (x) == UNSPEC
4547 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4548 return XVECEXP (x, 0, 0);
4550 fmt = GET_RTX_FORMAT (GET_CODE (x));
4551 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4555 rtx fnd = find_ltrel_base (XEXP (x, i));
4559 else if (fmt[i] == 'E')
4561 for (j = 0; j < XVECLEN (x, i); j++)
4563 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4573 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with its base. */
4576 replace_ltrel_base (rtx *x)
4581 if (GET_CODE (*x) == UNSPEC
4582 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4584 *x = XVECEXP (*x, 0, 1);
4588 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4589 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4593 replace_ltrel_base (&XEXP (*x, i));
4595 else if (fmt[i] == 'E')
4597 for (j = 0; j < XVECLEN (*x, i); j++)
4598 replace_ltrel_base (&XVECEXP (*x, i, j));
4604 /* We keep a list of constants which we have to add to internal
4605 constant tables in the middle of large functions. */
4607 #define NR_C_MODES 7
4608 enum machine_mode constant_modes[NR_C_MODES] =
4619 struct constant *next;
4624 struct constant_pool
4626 struct constant_pool *next;
4631 struct constant *constants[NR_C_MODES];
4632 struct constant *execute;
4637 static struct constant_pool * s390_mainpool_start (void);
4638 static void s390_mainpool_finish (struct constant_pool *);
4639 static void s390_mainpool_cancel (struct constant_pool *);
4641 static struct constant_pool * s390_chunkify_start (void);
4642 static void s390_chunkify_finish (struct constant_pool *);
4643 static void s390_chunkify_cancel (struct constant_pool *);
4645 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4646 static void s390_end_pool (struct constant_pool *, rtx);
4647 static void s390_add_pool_insn (struct constant_pool *, rtx);
4648 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4649 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4650 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4651 static void s390_add_execute (struct constant_pool *, rtx);
4652 static rtx s390_find_execute (struct constant_pool *, rtx);
4653 static rtx s390_execute_label (rtx);
4654 static rtx s390_execute_target (rtx);
4655 static void s390_dump_pool (struct constant_pool *, bool);
4656 static void s390_dump_execute (struct constant_pool *);
4657 static struct constant_pool *s390_alloc_pool (void);
4658 static void s390_free_pool (struct constant_pool *);
4660 /* Create new constant pool covering instructions starting at INSN
4661 and chain it to the end of POOL_LIST. */
4663 static struct constant_pool *
4664 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4666 struct constant_pool *pool, **prev;
4668 pool = s390_alloc_pool ();
4669 pool->first_insn = insn;
4671 for (prev = pool_list; *prev; prev = &(*prev)->next)
4678 /* End range of instructions covered by POOL at INSN and emit
4679 placeholder insn representing the pool. */
4682 s390_end_pool (struct constant_pool *pool, rtx insn)
4684 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4687 insn = get_last_insn ();
4689 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4690 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4693 /* Add INSN to the list of insns covered by POOL. */
4696 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4698 bitmap_set_bit (pool->insns, INSN_UID (insn));
4701 /* Return pool out of POOL_LIST that covers INSN. */
4703 static struct constant_pool *
4704 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4706 struct constant_pool *pool;
4708 for (pool = pool_list; pool; pool = pool->next)
4709 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4715 /* Add constant VAL of mode MODE to the constant pool POOL. */
4718 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4723 for (i = 0; i < NR_C_MODES; i++)
4724 if (constant_modes[i] == mode)
4726 if (i == NR_C_MODES)
4729 for (c = pool->constants[i]; c != NULL; c = c->next)
4730 if (rtx_equal_p (val, c->value))
4735 c = (struct constant *) xmalloc (sizeof *c);
4737 c->label = gen_label_rtx ();
4738 c->next = pool->constants[i];
4739 pool->constants[i] = c;
4740 pool->size += GET_MODE_SIZE (mode);
4744 /* Find constant VAL of mode MODE in the constant pool POOL.
4745 Return an RTX describing the distance from the start of
4746 the pool to the location of the new constant. */
4749 s390_find_constant (struct constant_pool *pool, rtx val,
4750 enum machine_mode mode)
4756 for (i = 0; i < NR_C_MODES; i++)
4757 if (constant_modes[i] == mode)
4759 if (i == NR_C_MODES)
4762 for (c = pool->constants[i]; c != NULL; c = c->next)
4763 if (rtx_equal_p (val, c->value))
4769 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4770 gen_rtx_LABEL_REF (Pmode, pool->label));
4771 offset = gen_rtx_CONST (Pmode, offset);
4775 /* Add execute target for INSN to the constant pool POOL. */
4778 s390_add_execute (struct constant_pool *pool, rtx insn)
4782 for (c = pool->execute; c != NULL; c = c->next)
4783 if (INSN_UID (insn) == INSN_UID (c->value))
4788 rtx label = s390_execute_label (insn);
4791 c = (struct constant *) xmalloc (sizeof *c);
4793 c->label = label == const0_rtx ? gen_label_rtx () : XEXP (label, 0);
4794 c->next = pool->execute;
4796 pool->size += label == const0_rtx ? 6 : 0;
4800 /* Find execute target for INSN in the constant pool POOL.
4801 Return an RTX describing the distance from the start of
4802 the pool to the location of the execute target. */
4805 s390_find_execute (struct constant_pool *pool, rtx insn)
4810 for (c = pool->execute; c != NULL; c = c->next)
4811 if (INSN_UID (insn) == INSN_UID (c->value))
4817 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4818 gen_rtx_LABEL_REF (Pmode, pool->label));
4819 offset = gen_rtx_CONST (Pmode, offset);
4823 /* Check whether INSN is an execute. Return the label_ref to its
4824 execute target template if so, NULL_RTX otherwise. */
4827 s390_execute_label (rtx insn)
4829 if (GET_CODE (insn) == INSN
4830 && GET_CODE (PATTERN (insn)) == PARALLEL
4831 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == UNSPEC
4832 && XINT (XVECEXP (PATTERN (insn), 0, 0), 1) == UNSPEC_EXECUTE)
4833 return XVECEXP (XVECEXP (PATTERN (insn), 0, 0), 0, 2);
4838 /* For an execute INSN, extract the execute target template. */
4841 s390_execute_target (rtx insn)
4843 rtx pattern = PATTERN (insn);
4844 gcc_assert (s390_execute_label (insn));
4846 if (XVECLEN (pattern, 0) == 2)
4848 pattern = copy_rtx (XVECEXP (pattern, 0, 1));
4852 rtvec vec = rtvec_alloc (XVECLEN (pattern, 0) - 1);
4855 for (i = 0; i < XVECLEN (pattern, 0) - 1; i++)
4856 RTVEC_ELT (vec, i) = copy_rtx (XVECEXP (pattern, 0, i + 1));
4858 pattern = gen_rtx_PARALLEL (VOIDmode, vec);
4864 /* Indicate that INSN cannot be duplicated. This is the case for
4865 execute insns that carry a unique label. */
4868 s390_cannot_copy_insn_p (rtx insn)
4870 rtx label = s390_execute_label (insn);
4871 return label && label != const0_rtx;
4874 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4875 do not emit the pool base label. */
4878 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4881 rtx insn = pool->pool_insn;
4884 /* Switch to rodata section. */
4885 if (TARGET_CPU_ZARCH)
4887 insn = emit_insn_after (gen_pool_section_start (), insn);
4888 INSN_ADDRESSES_NEW (insn, -1);
4891 /* Ensure minimum pool alignment. */
4892 if (TARGET_CPU_ZARCH)
4893 insn = emit_insn_after (gen_pool_align (GEN_INT (8)), insn);
4895 insn = emit_insn_after (gen_pool_align (GEN_INT (4)), insn);
4896 INSN_ADDRESSES_NEW (insn, -1);
4898 /* Emit pool base label. */
4901 insn = emit_label_after (pool->label, insn);
4902 INSN_ADDRESSES_NEW (insn, -1);
4905 /* Dump constants in descending alignment requirement order,
4906 ensuring proper alignment for every constant. */
4907 for (i = 0; i < NR_C_MODES; i++)
4908 for (c = pool->constants[i]; c; c = c->next)
4910 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4911 rtx value = c->value;
4912 if (GET_CODE (value) == CONST
4913 && GET_CODE (XEXP (value, 0)) == UNSPEC
4914 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4915 && XVECLEN (XEXP (value, 0), 0) == 1)
4917 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4918 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4919 value = gen_rtx_CONST (VOIDmode, value);
4922 insn = emit_label_after (c->label, insn);
4923 INSN_ADDRESSES_NEW (insn, -1);
4925 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4926 gen_rtvec (1, value),
4927 UNSPECV_POOL_ENTRY);
4928 insn = emit_insn_after (value, insn);
4929 INSN_ADDRESSES_NEW (insn, -1);
4932 /* Ensure minimum alignment for instructions. */
4933 insn = emit_insn_after (gen_pool_align (GEN_INT (2)), insn);
4934 INSN_ADDRESSES_NEW (insn, -1);
4936 /* Output in-pool execute template insns. */
4937 for (c = pool->execute; c; c = c->next)
4939 if (s390_execute_label (c->value) != const0_rtx)
4942 insn = emit_label_after (c->label, insn);
4943 INSN_ADDRESSES_NEW (insn, -1);
4945 insn = emit_insn_after (s390_execute_target (c->value), insn);
4946 INSN_ADDRESSES_NEW (insn, -1);
4949 /* Switch back to previous section. */
4950 if (TARGET_CPU_ZARCH)
4952 insn = emit_insn_after (gen_pool_section_end (), insn);
4953 INSN_ADDRESSES_NEW (insn, -1);
4956 insn = emit_barrier_after (insn);
4957 INSN_ADDRESSES_NEW (insn, -1);
4959 /* Remove placeholder insn. */
4960 remove_insn (pool->pool_insn);
4962 /* Output out-of-pool execute template isns. */
4963 s390_dump_execute (pool);
4966 /* Dump out the out-of-pool execute template insns in POOL
4967 at the end of the instruction stream. */
4970 s390_dump_execute (struct constant_pool *pool)
4975 for (c = pool->execute; c; c = c->next)
4977 if (s390_execute_label (c->value) == const0_rtx)
4980 insn = emit_label (c->label);
4981 INSN_ADDRESSES_NEW (insn, -1);
4983 insn = emit_insn (s390_execute_target (c->value));
4984 INSN_ADDRESSES_NEW (insn, -1);
4988 /* Allocate new constant_pool structure. */
4990 static struct constant_pool *
4991 s390_alloc_pool (void)
4993 struct constant_pool *pool;
4996 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4998 for (i = 0; i < NR_C_MODES; i++)
4999 pool->constants[i] = NULL;
5001 pool->execute = NULL;
5002 pool->label = gen_label_rtx ();
5003 pool->first_insn = NULL_RTX;
5004 pool->pool_insn = NULL_RTX;
5005 pool->insns = BITMAP_ALLOC (NULL);
5011 /* Free all memory used by POOL. */
5014 s390_free_pool (struct constant_pool *pool)
5016 struct constant *c, *next;
5019 for (i = 0; i < NR_C_MODES; i++)
5020 for (c = pool->constants[i]; c; c = next)
5026 for (c = pool->execute; c; c = next)
5032 BITMAP_FREE (pool->insns);
5037 /* Collect main literal pool. Return NULL on overflow. */
5039 static struct constant_pool *
5040 s390_mainpool_start (void)
5042 struct constant_pool *pool;
5045 pool = s390_alloc_pool ();
5047 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5049 if (GET_CODE (insn) == INSN
5050 && GET_CODE (PATTERN (insn)) == SET
5051 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC_VOLATILE
5052 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPECV_MAIN_POOL)
5054 if (pool->pool_insn)
5056 pool->pool_insn = insn;
5059 if (s390_execute_label (insn))
5061 s390_add_execute (pool, insn);
5063 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5065 rtx pool_ref = NULL_RTX;
5066 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5069 rtx constant = get_pool_constant (pool_ref);
5070 enum machine_mode mode = get_pool_mode (pool_ref);
5071 s390_add_constant (pool, constant, mode);
5076 if (!pool->pool_insn && pool->size > 0)
5079 if (pool->size >= 4096)
5081 /* We're going to chunkify the pool, so remove the main
5082 pool placeholder insn. */
5083 remove_insn (pool->pool_insn);
5085 s390_free_pool (pool);
5092 /* POOL holds the main literal pool as collected by s390_mainpool_start.
5093 Modify the current function to output the pool constants as well as
5094 the pool register setup instruction. */
5097 s390_mainpool_finish (struct constant_pool *pool)
5099 rtx base_reg = cfun->machine->base_reg;
5102 /* If the pool is empty, we're done. */
5103 if (pool->size == 0)
5105 /* However, we may have out-of-pool execute templates. */
5106 s390_dump_execute (pool);
5108 /* We don't actually need a base register after all. */
5109 cfun->machine->base_reg = NULL_RTX;
5111 if (pool->pool_insn)
5112 remove_insn (pool->pool_insn);
5113 s390_free_pool (pool);
5117 /* We need correct insn addresses. */
5118 shorten_branches (get_insns ());
5120 /* On zSeries, we use a LARL to load the pool register. The pool is
5121 located in the .rodata section, so we emit it after the function. */
5122 if (TARGET_CPU_ZARCH)
5124 insn = gen_main_base_64 (base_reg, pool->label);
5125 insn = emit_insn_after (insn, pool->pool_insn);
5126 INSN_ADDRESSES_NEW (insn, -1);
5127 remove_insn (pool->pool_insn);
5129 insn = get_last_insn ();
5130 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
5131 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
5133 s390_dump_pool (pool, 0);
5136 /* On S/390, if the total size of the function's code plus literal pool
5137 does not exceed 4096 bytes, we use BASR to set up a function base
5138 pointer, and emit the literal pool at the end of the function. */
5139 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
5140 + pool->size + 8 /* alignment slop */ < 4096)
5142 insn = gen_main_base_31_small (base_reg, pool->label);
5143 insn = emit_insn_after (insn, pool->pool_insn);
5144 INSN_ADDRESSES_NEW (insn, -1);
5145 remove_insn (pool->pool_insn);
5147 insn = emit_label_after (pool->label, insn);
5148 INSN_ADDRESSES_NEW (insn, -1);
5150 insn = get_last_insn ();
5151 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
5152 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
5154 s390_dump_pool (pool, 1);
5157 /* Otherwise, we emit an inline literal pool and use BASR to branch
5158 over it, setting up the pool register at the same time. */
5161 rtx pool_end = gen_label_rtx ();
5163 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
5164 insn = emit_insn_after (insn, pool->pool_insn);
5165 INSN_ADDRESSES_NEW (insn, -1);
5166 remove_insn (pool->pool_insn);
5168 insn = emit_label_after (pool->label, insn);
5169 INSN_ADDRESSES_NEW (insn, -1);
5171 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
5172 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
5174 insn = emit_label_after (pool_end, pool->pool_insn);
5175 INSN_ADDRESSES_NEW (insn, -1);
5177 s390_dump_pool (pool, 1);
5181 /* Replace all literal pool references. */
5183 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5186 replace_ltrel_base (&PATTERN (insn));
5188 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5190 rtx addr, pool_ref = NULL_RTX;
5191 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5194 if (s390_execute_label (insn))
5195 addr = s390_find_execute (pool, insn);
5197 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
5198 get_pool_mode (pool_ref));
5200 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
5201 INSN_CODE (insn) = -1;
5207 /* Free the pool. */
5208 s390_free_pool (pool);
5211 /* POOL holds the main literal pool as collected by s390_mainpool_start.
5212 We have decided we cannot use this pool, so revert all changes
5213 to the current function that were done by s390_mainpool_start. */
5215 s390_mainpool_cancel (struct constant_pool *pool)
5217 /* We didn't actually change the instruction stream, so simply
5218 free the pool memory. */
5219 s390_free_pool (pool);
5223 /* Chunkify the literal pool. */
5225 #define S390_POOL_CHUNK_MIN 0xc00
5226 #define S390_POOL_CHUNK_MAX 0xe00
5228 static struct constant_pool *
5229 s390_chunkify_start (void)
5231 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
5234 rtx pending_ltrel = NULL_RTX;
5237 rtx (*gen_reload_base) (rtx, rtx) =
5238 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
5241 /* We need correct insn addresses. */
5243 shorten_branches (get_insns ());
5245 /* Scan all insns and move literals to pool chunks. */
5247 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5249 /* Check for pending LTREL_BASE. */
5252 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
5255 if (ltrel_base == pending_ltrel)
5256 pending_ltrel = NULL_RTX;
5262 if (s390_execute_label (insn))
5265 curr_pool = s390_start_pool (&pool_list, insn);
5267 s390_add_execute (curr_pool, insn);
5268 s390_add_pool_insn (curr_pool, insn);
5270 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5272 rtx pool_ref = NULL_RTX;
5273 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5276 rtx constant = get_pool_constant (pool_ref);
5277 enum machine_mode mode = get_pool_mode (pool_ref);
5280 curr_pool = s390_start_pool (&pool_list, insn);
5282 s390_add_constant (curr_pool, constant, mode);
5283 s390_add_pool_insn (curr_pool, insn);
5285 /* Don't split the pool chunk between a LTREL_OFFSET load
5286 and the corresponding LTREL_BASE. */
5287 if (GET_CODE (constant) == CONST
5288 && GET_CODE (XEXP (constant, 0)) == UNSPEC
5289 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
5293 pending_ltrel = pool_ref;
5298 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
5301 s390_add_pool_insn (curr_pool, insn);
5302 /* An LTREL_BASE must follow within the same basic block. */
5308 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
5309 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
5312 if (TARGET_CPU_ZARCH)
5314 if (curr_pool->size < S390_POOL_CHUNK_MAX)
5317 s390_end_pool (curr_pool, NULL_RTX);
5322 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
5323 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
5326 /* We will later have to insert base register reload insns.
5327 Those will have an effect on code size, which we need to
5328 consider here. This calculation makes rather pessimistic
5329 worst-case assumptions. */
5330 if (GET_CODE (insn) == CODE_LABEL)
5333 if (chunk_size < S390_POOL_CHUNK_MIN
5334 && curr_pool->size < S390_POOL_CHUNK_MIN)
5337 /* Pool chunks can only be inserted after BARRIERs ... */
5338 if (GET_CODE (insn) == BARRIER)
5340 s390_end_pool (curr_pool, insn);
5345 /* ... so if we don't find one in time, create one. */
5346 else if ((chunk_size > S390_POOL_CHUNK_MAX
5347 || curr_pool->size > S390_POOL_CHUNK_MAX))
5349 rtx label, jump, barrier;
5351 /* We can insert the barrier only after a 'real' insn. */
5352 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
5354 if (get_attr_length (insn) == 0)
5357 /* Don't separate LTREL_BASE from the corresponding
5358 LTREL_OFFSET load. */
5362 label = gen_label_rtx ();
5363 jump = emit_jump_insn_after (gen_jump (label), insn);
5364 barrier = emit_barrier_after (jump);
5365 insn = emit_label_after (label, barrier);
5366 JUMP_LABEL (jump) = label;
5367 LABEL_NUSES (label) = 1;
5369 INSN_ADDRESSES_NEW (jump, -1);
5370 INSN_ADDRESSES_NEW (barrier, -1);
5371 INSN_ADDRESSES_NEW (insn, -1);
5373 s390_end_pool (curr_pool, barrier);
5381 s390_end_pool (curr_pool, NULL_RTX);
5386 /* Find all labels that are branched into
5387 from an insn belonging to a different chunk. */
5389 far_labels = BITMAP_ALLOC (NULL);
5391 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5393 /* Labels marked with LABEL_PRESERVE_P can be target
5394 of non-local jumps, so we have to mark them.
5395 The same holds for named labels.
5397 Don't do that, however, if it is the label before
5400 if (GET_CODE (insn) == CODE_LABEL
5401 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
5403 rtx vec_insn = next_real_insn (insn);
5404 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5405 PATTERN (vec_insn) : NULL_RTX;
5407 || !(GET_CODE (vec_pat) == ADDR_VEC
5408 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5409 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
5412 /* If we have a direct jump (conditional or unconditional)
5413 or a casesi jump, check all potential targets. */
5414 else if (GET_CODE (insn) == JUMP_INSN)
5416 rtx pat = PATTERN (insn);
5417 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
5418 pat = XVECEXP (pat, 0, 0);
5420 if (GET_CODE (pat) == SET)
5422 rtx label = JUMP_LABEL (insn);
5425 if (s390_find_pool (pool_list, label)
5426 != s390_find_pool (pool_list, insn))
5427 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5430 else if (GET_CODE (pat) == PARALLEL
5431 && XVECLEN (pat, 0) == 2
5432 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
5433 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
5434 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
5436 /* Find the jump table used by this casesi jump. */
5437 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
5438 rtx vec_insn = next_real_insn (vec_label);
5439 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5440 PATTERN (vec_insn) : NULL_RTX;
5442 && (GET_CODE (vec_pat) == ADDR_VEC
5443 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5445 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
5447 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
5449 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
5451 if (s390_find_pool (pool_list, label)
5452 != s390_find_pool (pool_list, insn))
5453 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5460 /* Insert base register reload insns before every pool. */
5462 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5464 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5466 rtx insn = curr_pool->first_insn;
5467 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
5470 /* Insert base register reload insns at every far label. */
5472 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5473 if (GET_CODE (insn) == CODE_LABEL
5474 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
5476 struct constant_pool *pool = s390_find_pool (pool_list, insn);
5479 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5481 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
5486 BITMAP_FREE (far_labels);
5489 /* Recompute insn addresses. */
5491 init_insn_lengths ();
5492 shorten_branches (get_insns ());
5497 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5498 After we have decided to use this list, finish implementing
5499 all changes to the current function as required. */
5502 s390_chunkify_finish (struct constant_pool *pool_list)
5504 struct constant_pool *curr_pool = NULL;
5508 /* Replace all literal pool references. */
5510 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5513 replace_ltrel_base (&PATTERN (insn));
5515 curr_pool = s390_find_pool (pool_list, insn);
5519 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5521 rtx addr, pool_ref = NULL_RTX;
5522 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5525 if (s390_execute_label (insn))
5526 addr = s390_find_execute (curr_pool, insn);
5528 addr = s390_find_constant (curr_pool,
5529 get_pool_constant (pool_ref),
5530 get_pool_mode (pool_ref));
5532 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
5533 INSN_CODE (insn) = -1;
5538 /* Dump out all literal pools. */
5540 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5541 s390_dump_pool (curr_pool, 0);
5543 /* Free pool list. */
5547 struct constant_pool *next = pool_list->next;
5548 s390_free_pool (pool_list);
5553 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5554 We have decided we cannot use this list, so revert all changes
5555 to the current function that were done by s390_chunkify_start. */
5558 s390_chunkify_cancel (struct constant_pool *pool_list)
5560 struct constant_pool *curr_pool = NULL;
5563 /* Remove all pool placeholder insns. */
5565 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5567 /* Did we insert an extra barrier? Remove it. */
5568 rtx barrier = PREV_INSN (curr_pool->pool_insn);
5569 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
5570 rtx label = NEXT_INSN (curr_pool->pool_insn);
5572 if (jump && GET_CODE (jump) == JUMP_INSN
5573 && barrier && GET_CODE (barrier) == BARRIER
5574 && label && GET_CODE (label) == CODE_LABEL
5575 && GET_CODE (PATTERN (jump)) == SET
5576 && SET_DEST (PATTERN (jump)) == pc_rtx
5577 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
5578 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
5581 remove_insn (barrier);
5582 remove_insn (label);
5585 remove_insn (curr_pool->pool_insn);
5588 /* Remove all base register reload insns. */
5590 for (insn = get_insns (); insn; )
5592 rtx next_insn = NEXT_INSN (insn);
5594 if (GET_CODE (insn) == INSN
5595 && GET_CODE (PATTERN (insn)) == SET
5596 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
5597 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
5603 /* Free pool list. */
5607 struct constant_pool *next = pool_list->next;
5608 s390_free_pool (pool_list);
5614 /* Output the constant pool entry EXP in mode MODE with alignment ALIGN. */
5617 s390_output_pool_entry (rtx exp, enum machine_mode mode, unsigned int align)
5621 switch (GET_MODE_CLASS (mode))
5624 if (GET_CODE (exp) != CONST_DOUBLE)
5627 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
5628 assemble_real (r, mode, align);
5632 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
5641 /* Rework the prologue/epilogue to avoid saving/restoring
5642 registers unnecessarily. */
5645 s390_optimize_prologue (void)
5647 rtx insn, new_insn, next_insn;
5649 /* Do a final recompute of the frame-related data. */
5651 s390_update_frame_layout ();
5653 /* If all special registers are in fact used, there's nothing we
5654 can do, so no point in walking the insn list. */
5656 if (cfun_frame_layout.first_save_gpr <= BASE_REGNUM
5657 && cfun_frame_layout.last_save_gpr >= BASE_REGNUM
5658 && (TARGET_CPU_ZARCH
5659 || (cfun_frame_layout.first_save_gpr <= RETURN_REGNUM
5660 && cfun_frame_layout.last_save_gpr >= RETURN_REGNUM)))
5663 /* Search for prologue/epilogue insns and replace them. */
5665 for (insn = get_insns (); insn; insn = next_insn)
5667 int first, last, off;
5668 rtx set, base, offset;
5670 next_insn = NEXT_INSN (insn);
5672 if (GET_CODE (insn) != INSN)
5675 if (GET_CODE (PATTERN (insn)) == PARALLEL
5676 && store_multiple_operation (PATTERN (insn), VOIDmode))
5678 set = XVECEXP (PATTERN (insn), 0, 0);
5679 first = REGNO (SET_SRC (set));
5680 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5681 offset = const0_rtx;
5682 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5683 off = INTVAL (offset);
5685 if (GET_CODE (base) != REG || off < 0)
5687 if (REGNO (base) != STACK_POINTER_REGNUM
5688 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5690 if (first > BASE_REGNUM || last < BASE_REGNUM)
5693 if (cfun_frame_layout.first_save_gpr != -1)
5695 new_insn = save_gprs (base,
5696 off + (cfun_frame_layout.first_save_gpr
5697 - first) * UNITS_PER_WORD,
5698 cfun_frame_layout.first_save_gpr,
5699 cfun_frame_layout.last_save_gpr);
5700 new_insn = emit_insn_before (new_insn, insn);
5701 INSN_ADDRESSES_NEW (new_insn, -1);
5708 if (GET_CODE (PATTERN (insn)) == SET
5709 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
5710 && (REGNO (SET_SRC (PATTERN (insn))) == BASE_REGNUM
5711 || (!TARGET_CPU_ZARCH
5712 && REGNO (SET_SRC (PATTERN (insn))) == RETURN_REGNUM))
5713 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
5715 set = PATTERN (insn);
5716 first = REGNO (SET_SRC (set));
5717 offset = const0_rtx;
5718 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5719 off = INTVAL (offset);
5721 if (GET_CODE (base) != REG || off < 0)
5723 if (REGNO (base) != STACK_POINTER_REGNUM
5724 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5726 if (cfun_frame_layout.first_save_gpr != -1)
5728 new_insn = save_gprs (base,
5729 off + (cfun_frame_layout.first_save_gpr
5730 - first) * UNITS_PER_WORD,
5731 cfun_frame_layout.first_save_gpr,
5732 cfun_frame_layout.last_save_gpr);
5733 new_insn = emit_insn_before (new_insn, insn);
5734 INSN_ADDRESSES_NEW (new_insn, -1);
5741 if (GET_CODE (PATTERN (insn)) == PARALLEL
5742 && load_multiple_operation (PATTERN (insn), VOIDmode))
5744 set = XVECEXP (PATTERN (insn), 0, 0);
5745 first = REGNO (SET_DEST (set));
5746 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5747 offset = const0_rtx;
5748 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5749 off = INTVAL (offset);
5751 if (GET_CODE (base) != REG || off < 0)
5753 if (REGNO (base) != STACK_POINTER_REGNUM
5754 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5756 if (first > BASE_REGNUM || last < BASE_REGNUM)
5759 if (cfun_frame_layout.first_restore_gpr != -1)
5761 new_insn = restore_gprs (base,
5762 off + (cfun_frame_layout.first_restore_gpr
5763 - first) * UNITS_PER_WORD,
5764 cfun_frame_layout.first_restore_gpr,
5765 cfun_frame_layout.last_restore_gpr);
5766 new_insn = emit_insn_before (new_insn, insn);
5767 INSN_ADDRESSES_NEW (new_insn, -1);
5774 if (GET_CODE (PATTERN (insn)) == SET
5775 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
5776 && (REGNO (SET_DEST (PATTERN (insn))) == BASE_REGNUM
5777 || (!TARGET_CPU_ZARCH
5778 && REGNO (SET_DEST (PATTERN (insn))) == RETURN_REGNUM))
5779 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
5781 set = PATTERN (insn);
5782 first = REGNO (SET_DEST (set));
5783 offset = const0_rtx;
5784 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5785 off = INTVAL (offset);
5787 if (GET_CODE (base) != REG || off < 0)
5789 if (REGNO (base) != STACK_POINTER_REGNUM
5790 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5792 if (cfun_frame_layout.first_restore_gpr != -1)
5794 new_insn = restore_gprs (base,
5795 off + (cfun_frame_layout.first_restore_gpr
5796 - first) * UNITS_PER_WORD,
5797 cfun_frame_layout.first_restore_gpr,
5798 cfun_frame_layout.last_restore_gpr);
5799 new_insn = emit_insn_before (new_insn, insn);
5800 INSN_ADDRESSES_NEW (new_insn, -1);
5809 /* Perform machine-dependent processing. */
5814 bool pool_overflow = false;
5816 /* Make sure all splits have been performed; splits after
5817 machine_dependent_reorg might confuse insn length counts. */
5818 split_all_insns_noflow ();
5821 /* Install the main literal pool and the associated base
5822 register load insns.
5824 In addition, there are two problematic situations we need
5827 - the literal pool might be > 4096 bytes in size, so that
5828 some of its elements cannot be directly accessed
5830 - a branch target might be > 64K away from the branch, so that
5831 it is not possible to use a PC-relative instruction.
5833 To fix those, we split the single literal pool into multiple
5834 pool chunks, reloading the pool base register at various
5835 points throughout the function to ensure it always points to
5836 the pool chunk the following code expects, and / or replace
5837 PC-relative branches by absolute branches.
5839 However, the two problems are interdependent: splitting the
5840 literal pool can move a branch further away from its target,
5841 causing the 64K limit to overflow, and on the other hand,
5842 replacing a PC-relative branch by an absolute branch means
5843 we need to put the branch target address into the literal
5844 pool, possibly causing it to overflow.
5846 So, we loop trying to fix up both problems until we manage
5847 to satisfy both conditions at the same time. Note that the
5848 loop is guaranteed to terminate as every pass of the loop
5849 strictly decreases the total number of PC-relative branches
5850 in the function. (This is not completely true as there
5851 might be branch-over-pool insns introduced by chunkify_start.
5852 Those never need to be split however.) */
5856 struct constant_pool *pool = NULL;
5858 /* Collect the literal pool. */
5861 pool = s390_mainpool_start ();
5863 pool_overflow = true;
5866 /* If literal pool overflowed, start to chunkify it. */
5868 pool = s390_chunkify_start ();
5870 /* Split out-of-range branches. If this has created new
5871 literal pool entries, cancel current chunk list and
5872 recompute it. zSeries machines have large branch
5873 instructions, so we never need to split a branch. */
5874 if (!TARGET_CPU_ZARCH && s390_split_branches ())
5877 s390_chunkify_cancel (pool);
5879 s390_mainpool_cancel (pool);
5884 /* If we made it up to here, both conditions are satisfied.
5885 Finish up literal pool related changes. */
5887 s390_chunkify_finish (pool);
5889 s390_mainpool_finish (pool);
5891 /* We're done splitting branches. */
5892 cfun->machine->split_branches_pending_p = false;
5896 s390_optimize_prologue ();
5900 /* Return an RTL expression representing the value of the return address
5901 for the frame COUNT steps up from the current frame. FRAME is the
5902 frame pointer of that frame. */
5905 s390_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
5910 /* Without backchain, we fail for all but the current frame. */
5912 if (!TARGET_BACKCHAIN && count > 0)
5915 /* For the current frame, we need to make sure the initial
5916 value of RETURN_REGNUM is actually saved. */
5920 cfun_frame_layout.save_return_addr_p = true;
5921 return gen_rtx_MEM (Pmode, return_address_pointer_rtx);
5924 if (TARGET_PACKED_STACK)
5925 offset = -2 * UNITS_PER_WORD;
5927 offset = RETURN_REGNUM * UNITS_PER_WORD;
5929 addr = plus_constant (frame, offset);
5930 addr = memory_address (Pmode, addr);
5931 return gen_rtx_MEM (Pmode, addr);
5934 /* Return an RTL expression representing the back chain stored in
5935 the current stack frame. */
5938 s390_back_chain_rtx (void)
5942 gcc_assert (TARGET_BACKCHAIN);
5944 if (TARGET_PACKED_STACK)
5945 chain = plus_constant (stack_pointer_rtx,
5946 STACK_POINTER_OFFSET - UNITS_PER_WORD);
5948 chain = stack_pointer_rtx;
5950 chain = gen_rtx_MEM (Pmode, chain);
5954 /* Find first call clobbered register unused in a function.
5955 This could be used as base register in a leaf function
5956 or for holding the return address before epilogue. */
5959 find_unused_clobbered_reg (void)
5962 for (i = 0; i < 6; i++)
5963 if (!regs_ever_live[i])
5968 /* Determine the frame area which actually has to be accessed
5969 in the function epilogue. The values are stored at the
5970 given pointers AREA_BOTTOM (address of the lowest used stack
5971 address) and AREA_TOP (address of the first item which does
5972 not belong to the stack frame). */
5975 s390_frame_area (int *area_bottom, int *area_top)
5983 if (cfun_frame_layout.first_restore_gpr != -1)
5985 b = (cfun_frame_layout.gprs_offset
5986 + cfun_frame_layout.first_restore_gpr * UNITS_PER_WORD);
5987 t = b + (cfun_frame_layout.last_restore_gpr
5988 - cfun_frame_layout.first_restore_gpr + 1) * UNITS_PER_WORD;
5991 if (TARGET_64BIT && cfun_save_high_fprs_p)
5993 b = MIN (b, cfun_frame_layout.f8_offset);
5994 t = MAX (t, (cfun_frame_layout.f8_offset
5995 + cfun_frame_layout.high_fprs * 8));
5999 for (i = 2; i < 4; i++)
6000 if (cfun_fpr_bit_p (i))
6002 b = MIN (b, cfun_frame_layout.f4_offset + (i - 2) * 8);
6003 t = MAX (t, cfun_frame_layout.f4_offset + (i - 1) * 8);
6010 /* Fill cfun->machine with info about register usage of current function.
6011 Return in LIVE_REGS which GPRs are currently considered live. */
6014 s390_register_info (int live_regs[])
6018 /* fprs 8 - 15 are call saved for 64 Bit ABI. */
6019 cfun_frame_layout.fpr_bitmap = 0;
6020 cfun_frame_layout.high_fprs = 0;
6022 for (i = 24; i < 32; i++)
6023 if (regs_ever_live[i] && !global_regs[i])
6025 cfun_set_fpr_bit (i - 16);
6026 cfun_frame_layout.high_fprs++;
6029 /* Find first and last gpr to be saved. We trust regs_ever_live
6030 data, except that we don't save and restore global registers.
6032 Also, all registers with special meaning to the compiler need
6033 to be handled extra. */
6035 for (i = 0; i < 16; i++)
6036 live_regs[i] = regs_ever_live[i] && !global_regs[i];
6039 live_regs[PIC_OFFSET_TABLE_REGNUM]
6040 = regs_ever_live[PIC_OFFSET_TABLE_REGNUM];
6042 live_regs[BASE_REGNUM]
6043 = cfun->machine->base_reg
6044 && REGNO (cfun->machine->base_reg) == BASE_REGNUM;
6046 live_regs[RETURN_REGNUM]
6047 = cfun->machine->split_branches_pending_p
6048 || cfun_frame_layout.save_return_addr_p;
6050 live_regs[STACK_POINTER_REGNUM]
6051 = !current_function_is_leaf
6052 || TARGET_TPF_PROFILING
6053 || cfun_save_high_fprs_p
6054 || get_frame_size () > 0
6055 || current_function_calls_alloca
6056 || current_function_stdarg;
6058 for (i = 6; i < 16; i++)
6061 for (j = 15; j > i; j--)
6067 /* Nothing to save/restore. */
6068 cfun_frame_layout.first_save_gpr = -1;
6069 cfun_frame_layout.first_restore_gpr = -1;
6070 cfun_frame_layout.last_save_gpr = -1;
6071 cfun_frame_layout.last_restore_gpr = -1;
6075 /* Save / Restore from gpr i to j. */
6076 cfun_frame_layout.first_save_gpr = i;
6077 cfun_frame_layout.first_restore_gpr = i;
6078 cfun_frame_layout.last_save_gpr = j;
6079 cfun_frame_layout.last_restore_gpr = j;
6082 if (current_function_stdarg)
6084 /* Varargs functions need to save gprs 2 to 6. */
6085 if (cfun_frame_layout.first_save_gpr == -1
6086 || cfun_frame_layout.first_save_gpr > 2)
6087 cfun_frame_layout.first_save_gpr = 2;
6089 if (cfun_frame_layout.last_save_gpr == -1
6090 || cfun_frame_layout.last_save_gpr < 6)
6091 cfun_frame_layout.last_save_gpr = 6;
6093 /* Mark f0, f2 for 31 bit and f0-f4 for 64 bit to be saved. */
6094 if (TARGET_HARD_FLOAT)
6095 for (i = 0; i < (TARGET_64BIT ? 4 : 2); i++)
6096 cfun_set_fpr_bit (i);
6100 for (i = 2; i < 4; i++)
6101 if (regs_ever_live[i + 16] && !global_regs[i + 16])
6102 cfun_set_fpr_bit (i);
6105 /* Fill cfun->machine with info about frame of current function. */
6108 s390_frame_info (void)
6112 cfun_frame_layout.frame_size = get_frame_size ();
6113 if (!TARGET_64BIT && cfun_frame_layout.frame_size > 0x7fff0000)
6114 fatal_error ("Total size of local variables exceeds architecture limit.");
6116 if (!TARGET_PACKED_STACK)
6118 cfun_frame_layout.backchain_offset = 0;
6119 cfun_frame_layout.f0_offset = 16 * UNITS_PER_WORD;
6120 cfun_frame_layout.f4_offset = cfun_frame_layout.f0_offset + 2 * 8;
6121 cfun_frame_layout.f8_offset = -cfun_frame_layout.high_fprs * 8;
6122 cfun_frame_layout.gprs_offset = (cfun_frame_layout.first_save_gpr
6125 else if (TARGET_BACKCHAIN) /* kernel stack layout */
6127 cfun_frame_layout.backchain_offset = (STACK_POINTER_OFFSET
6129 cfun_frame_layout.gprs_offset
6130 = (cfun_frame_layout.backchain_offset
6131 - (STACK_POINTER_REGNUM - cfun_frame_layout.first_save_gpr + 1)
6136 cfun_frame_layout.f4_offset
6137 = (cfun_frame_layout.gprs_offset
6138 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
6140 cfun_frame_layout.f0_offset
6141 = (cfun_frame_layout.f4_offset
6142 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
6146 /* On 31 bit we have to care about alignment of the
6147 floating point regs to provide fastest access. */
6148 cfun_frame_layout.f0_offset
6149 = ((cfun_frame_layout.gprs_offset
6150 & ~(STACK_BOUNDARY / BITS_PER_UNIT - 1))
6151 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
6153 cfun_frame_layout.f4_offset
6154 = (cfun_frame_layout.f0_offset
6155 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
6158 else /* no backchain */
6160 cfun_frame_layout.f4_offset
6161 = (STACK_POINTER_OFFSET
6162 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
6164 cfun_frame_layout.f0_offset
6165 = (cfun_frame_layout.f4_offset
6166 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
6168 cfun_frame_layout.gprs_offset
6169 = cfun_frame_layout.f0_offset - cfun_gprs_save_area_size;
6172 if (current_function_is_leaf
6173 && !TARGET_TPF_PROFILING
6174 && cfun_frame_layout.frame_size == 0
6175 && !cfun_save_high_fprs_p
6176 && !current_function_calls_alloca
6177 && !current_function_stdarg)
6180 if (!TARGET_PACKED_STACK)
6181 cfun_frame_layout.frame_size += (STARTING_FRAME_OFFSET
6182 + cfun_frame_layout.high_fprs * 8);
6185 if (TARGET_BACKCHAIN)
6186 cfun_frame_layout.frame_size += UNITS_PER_WORD;
6188 /* No alignment trouble here because f8-f15 are only saved under
6190 cfun_frame_layout.f8_offset = (MIN (MIN (cfun_frame_layout.f0_offset,
6191 cfun_frame_layout.f4_offset),
6192 cfun_frame_layout.gprs_offset)
6193 - cfun_frame_layout.high_fprs * 8);
6195 cfun_frame_layout.frame_size += cfun_frame_layout.high_fprs * 8;
6197 for (i = 0; i < 8; i++)
6198 if (cfun_fpr_bit_p (i))
6199 cfun_frame_layout.frame_size += 8;
6201 cfun_frame_layout.frame_size += cfun_gprs_save_area_size;
6203 /* If under 31 bit an odd number of gprs has to be saved we have to adjust
6204 the frame size to sustain 8 byte alignment of stack frames. */
6205 cfun_frame_layout.frame_size = ((cfun_frame_layout.frame_size +
6206 STACK_BOUNDARY / BITS_PER_UNIT - 1)
6207 & ~(STACK_BOUNDARY / BITS_PER_UNIT - 1));
6209 cfun_frame_layout.frame_size += current_function_outgoing_args_size;
6213 /* Generate frame layout. Fills in register and frame data for the current
6214 function in cfun->machine. This routine can be called multiple times;
6215 it will re-do the complete frame layout every time. */
6218 s390_init_frame_layout (void)
6220 HOST_WIDE_INT frame_size;
6224 /* If return address register is explicitly used, we need to save it. */
6225 if (regs_ever_live[RETURN_REGNUM]
6226 || !current_function_is_leaf
6227 || TARGET_TPF_PROFILING
6228 || current_function_stdarg
6229 || current_function_calls_eh_return)
6230 cfun_frame_layout.save_return_addr_p = true;
6232 /* On S/390 machines, we may need to perform branch splitting, which
6233 will require both base and return address register. We have no
6234 choice but to assume we're going to need them until right at the
6235 end of the machine dependent reorg phase. */
6236 if (!TARGET_CPU_ZARCH)
6237 cfun->machine->split_branches_pending_p = true;
6241 frame_size = cfun_frame_layout.frame_size;
6243 /* Try to predict whether we'll need the base register. */
6244 base_used = cfun->machine->split_branches_pending_p
6245 || current_function_uses_const_pool
6246 || (!DISP_IN_RANGE (-frame_size)
6247 && !CONST_OK_FOR_CONSTRAINT_P (-frame_size, 'K', "K"));
6249 /* Decide which register to use as literal pool base. In small
6250 leaf functions, try to use an unused call-clobbered register
6251 as base register to avoid save/restore overhead. */
6253 cfun->machine->base_reg = NULL_RTX;
6254 else if (current_function_is_leaf && !regs_ever_live[5])
6255 cfun->machine->base_reg = gen_rtx_REG (Pmode, 5);
6257 cfun->machine->base_reg = gen_rtx_REG (Pmode, BASE_REGNUM);
6259 s390_register_info (live_regs);
6262 while (frame_size != cfun_frame_layout.frame_size);
6265 /* Update frame layout. Recompute actual register save data based on
6266 current info and update regs_ever_live for the special registers.
6267 May be called multiple times, but may never cause *more* registers
6268 to be saved than s390_init_frame_layout allocated room for. */
6271 s390_update_frame_layout (void)
6275 s390_register_info (live_regs);
6277 regs_ever_live[BASE_REGNUM] = live_regs[BASE_REGNUM];
6278 regs_ever_live[RETURN_REGNUM] = live_regs[RETURN_REGNUM];
6279 regs_ever_live[STACK_POINTER_REGNUM] = live_regs[STACK_POINTER_REGNUM];
6281 if (cfun->machine->base_reg)
6282 regs_ever_live[REGNO (cfun->machine->base_reg)] = 1;
6285 /* Return true if register FROM can be eliminated via register TO. */
6288 s390_can_eliminate (int from, int to)
6290 gcc_assert (to == STACK_POINTER_REGNUM
6291 || to == HARD_FRAME_POINTER_REGNUM);
6293 gcc_assert (from == FRAME_POINTER_REGNUM
6294 || from == ARG_POINTER_REGNUM
6295 || from == RETURN_ADDRESS_POINTER_REGNUM);
6297 /* Make sure we actually saved the return address. */
6298 if (from == RETURN_ADDRESS_POINTER_REGNUM)
6299 if (!current_function_calls_eh_return
6300 && !current_function_stdarg
6301 && !cfun_frame_layout.save_return_addr_p)
6307 /* Return offset between register FROM and TO initially after prolog. */
6310 s390_initial_elimination_offset (int from, int to)
6312 HOST_WIDE_INT offset;
6315 /* ??? Why are we called for non-eliminable pairs? */
6316 if (!s390_can_eliminate (from, to))
6321 case FRAME_POINTER_REGNUM:
6325 case ARG_POINTER_REGNUM:
6326 s390_init_frame_layout ();
6327 offset = cfun_frame_layout.frame_size + STACK_POINTER_OFFSET;
6330 case RETURN_ADDRESS_POINTER_REGNUM:
6331 s390_init_frame_layout ();
6332 index = RETURN_REGNUM - cfun_frame_layout.first_save_gpr;
6333 gcc_assert (index >= 0);
6334 offset = cfun_frame_layout.frame_size + cfun_frame_layout.gprs_offset;
6335 offset += index * UNITS_PER_WORD;
6345 /* Emit insn to save fpr REGNUM at offset OFFSET relative
6346 to register BASE. Return generated insn. */
6349 save_fpr (rtx base, int offset, int regnum)
6352 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
6353 set_mem_alias_set (addr, s390_sr_alias_set);
6355 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
6358 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
6359 to register BASE. Return generated insn. */
6362 restore_fpr (rtx base, int offset, int regnum)
6365 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
6366 set_mem_alias_set (addr, s390_sr_alias_set);
6368 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
6371 /* Generate insn to save registers FIRST to LAST into
6372 the register save area located at offset OFFSET
6373 relative to register BASE. */
6376 save_gprs (rtx base, int offset, int first, int last)
6378 rtx addr, insn, note;
6381 addr = plus_constant (base, offset);
6382 addr = gen_rtx_MEM (Pmode, addr);
6383 set_mem_alias_set (addr, s390_sr_alias_set);
6385 /* Special-case single register. */
6389 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
6391 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
6393 RTX_FRAME_RELATED_P (insn) = 1;
6398 insn = gen_store_multiple (addr,
6399 gen_rtx_REG (Pmode, first),
6400 GEN_INT (last - first + 1));
6403 /* We need to set the FRAME_RELATED flag on all SETs
6404 inside the store-multiple pattern.
6406 However, we must not emit DWARF records for registers 2..5
6407 if they are stored for use by variable arguments ...
6409 ??? Unfortunately, it is not enough to simply not the the
6410 FRAME_RELATED flags for those SETs, because the first SET
6411 of the PARALLEL is always treated as if it had the flag
6412 set, even if it does not. Therefore we emit a new pattern
6413 without those registers as REG_FRAME_RELATED_EXPR note. */
6417 rtx pat = PATTERN (insn);
6419 for (i = 0; i < XVECLEN (pat, 0); i++)
6420 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
6421 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
6423 RTX_FRAME_RELATED_P (insn) = 1;
6427 addr = plus_constant (base, offset + (6 - first) * UNITS_PER_WORD);
6428 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
6429 gen_rtx_REG (Pmode, 6),
6430 GEN_INT (last - 6 + 1));
6431 note = PATTERN (note);
6434 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6435 note, REG_NOTES (insn));
6437 for (i = 0; i < XVECLEN (note, 0); i++)
6438 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
6439 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
6441 RTX_FRAME_RELATED_P (insn) = 1;
6447 /* Generate insn to restore registers FIRST to LAST from
6448 the register save area located at offset OFFSET
6449 relative to register BASE. */
6452 restore_gprs (rtx base, int offset, int first, int last)
6456 addr = plus_constant (base, offset);
6457 addr = gen_rtx_MEM (Pmode, addr);
6458 set_mem_alias_set (addr, s390_sr_alias_set);
6460 /* Special-case single register. */
6464 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
6466 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
6471 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
6473 GEN_INT (last - first + 1));
6477 /* Return insn sequence to load the GOT register. */
6479 static GTY(()) rtx got_symbol;
6481 s390_load_got (void)
6487 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
6488 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
6493 if (TARGET_CPU_ZARCH)
6495 emit_move_insn (pic_offset_table_rtx, got_symbol);
6501 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
6502 UNSPEC_LTREL_OFFSET);
6503 offset = gen_rtx_CONST (Pmode, offset);
6504 offset = force_const_mem (Pmode, offset);
6506 emit_move_insn (pic_offset_table_rtx, offset);
6508 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
6510 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
6512 emit_move_insn (pic_offset_table_rtx, offset);
6515 insns = get_insns ();
6520 /* Expand the prologue into a bunch of separate insns. */
6523 s390_emit_prologue (void)
6531 /* Complete frame layout. */
6533 s390_update_frame_layout ();
6535 /* Annotate all constant pool references to let the scheduler know
6536 they implicitly use the base register. */
6538 push_topmost_sequence ();
6540 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
6542 annotate_constant_pool_refs (&PATTERN (insn));
6544 pop_topmost_sequence ();
6546 /* Choose best register to use for temp use within prologue.
6547 See below for why TPF must use the register 1. */
6549 if (!current_function_is_leaf && !TARGET_TPF_PROFILING)
6550 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
6552 temp_reg = gen_rtx_REG (Pmode, 1);
6554 /* Save call saved gprs. */
6555 if (cfun_frame_layout.first_save_gpr != -1)
6557 insn = save_gprs (stack_pointer_rtx,
6558 cfun_frame_layout.gprs_offset,
6559 cfun_frame_layout.first_save_gpr,
6560 cfun_frame_layout.last_save_gpr);
6564 /* Dummy insn to mark literal pool slot. */
6566 if (cfun->machine->base_reg)
6567 emit_insn (gen_main_pool (cfun->machine->base_reg));
6569 offset = cfun_frame_layout.f0_offset;
6571 /* Save f0 and f2. */
6572 for (i = 0; i < 2; i++)
6574 if (cfun_fpr_bit_p (i))
6576 save_fpr (stack_pointer_rtx, offset, i + 16);
6579 else if (!TARGET_PACKED_STACK)
6583 /* Save f4 and f6. */
6584 offset = cfun_frame_layout.f4_offset;
6585 for (i = 2; i < 4; i++)
6587 if (cfun_fpr_bit_p (i))
6589 insn = save_fpr (stack_pointer_rtx, offset, i + 16);
6592 /* If f4 and f6 are call clobbered they are saved due to stdargs and
6593 therefore are not frame related. */
6594 if (!call_really_used_regs[i + 16])
6595 RTX_FRAME_RELATED_P (insn) = 1;
6597 else if (!TARGET_PACKED_STACK)
6601 if (TARGET_PACKED_STACK
6602 && cfun_save_high_fprs_p
6603 && cfun_frame_layout.f8_offset + cfun_frame_layout.high_fprs * 8 > 0)
6605 offset = (cfun_frame_layout.f8_offset
6606 + (cfun_frame_layout.high_fprs - 1) * 8);
6608 for (i = 15; i > 7 && offset >= 0; i--)
6609 if (cfun_fpr_bit_p (i))
6611 insn = save_fpr (stack_pointer_rtx, offset, i + 16);
6613 RTX_FRAME_RELATED_P (insn) = 1;
6616 if (offset >= cfun_frame_layout.f8_offset)
6620 if (!TARGET_PACKED_STACK)
6621 next_fpr = cfun_save_high_fprs_p ? 31 : 0;
6623 /* Decrement stack pointer. */
6625 if (cfun_frame_layout.frame_size > 0)
6627 rtx frame_off = GEN_INT (-cfun_frame_layout.frame_size);
6629 if (s390_stack_size)
6631 HOST_WIDE_INT stack_check_mask = ((s390_stack_size - 1)
6632 & ~(s390_stack_guard - 1));
6633 rtx t = gen_rtx_AND (Pmode, stack_pointer_rtx,
6634 GEN_INT (stack_check_mask));
6637 gen_cmpdi (t, const0_rtx);
6639 gen_cmpsi (t, const0_rtx);
6641 emit_insn (gen_conditional_trap (gen_rtx_EQ (CCmode,
6642 gen_rtx_REG (CCmode,
6648 if (s390_warn_framesize > 0
6649 && cfun_frame_layout.frame_size >= s390_warn_framesize)
6650 warning ("frame size of %qs is " HOST_WIDE_INT_PRINT_DEC " bytes",
6651 current_function_name (), cfun_frame_layout.frame_size);
6653 if (s390_warn_dynamicstack_p && cfun->calls_alloca)
6654 warning ("%qs uses dynamic stack allocation", current_function_name ());
6656 /* Save incoming stack pointer into temp reg. */
6657 if (TARGET_BACKCHAIN || next_fpr)
6658 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
6660 /* Subtract frame size from stack pointer. */
6662 if (DISP_IN_RANGE (INTVAL (frame_off)))
6664 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
6665 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
6667 insn = emit_insn (insn);
6671 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
6672 frame_off = force_const_mem (Pmode, frame_off);
6674 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
6675 annotate_constant_pool_refs (&PATTERN (insn));
6678 RTX_FRAME_RELATED_P (insn) = 1;
6680 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6681 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
6682 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
6683 GEN_INT (-cfun_frame_layout.frame_size))),
6686 /* Set backchain. */
6688 if (TARGET_BACKCHAIN)
6690 if (cfun_frame_layout.backchain_offset)
6691 addr = gen_rtx_MEM (Pmode,
6692 plus_constant (stack_pointer_rtx,
6693 cfun_frame_layout.backchain_offset));
6695 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
6696 set_mem_alias_set (addr, s390_sr_alias_set);
6697 insn = emit_insn (gen_move_insn (addr, temp_reg));
6700 /* If we support asynchronous exceptions (e.g. for Java),
6701 we need to make sure the backchain pointer is set up
6702 before any possibly trapping memory access. */
6704 if (TARGET_BACKCHAIN && flag_non_call_exceptions)
6706 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
6707 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
6711 /* Save fprs 8 - 15 (64 bit ABI). */
6713 if (cfun_save_high_fprs_p && next_fpr)
6715 insn = emit_insn (gen_add2_insn (temp_reg,
6716 GEN_INT (cfun_frame_layout.f8_offset)));
6720 for (i = 24; i <= next_fpr; i++)
6721 if (cfun_fpr_bit_p (i - 16))
6723 rtx addr = plus_constant (stack_pointer_rtx,
6724 cfun_frame_layout.frame_size
6725 + cfun_frame_layout.f8_offset
6728 insn = save_fpr (temp_reg, offset, i);
6730 RTX_FRAME_RELATED_P (insn) = 1;
6732 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6733 gen_rtx_SET (VOIDmode,
6734 gen_rtx_MEM (DFmode, addr),
6735 gen_rtx_REG (DFmode, i)),
6740 /* Set frame pointer, if needed. */
6742 if (frame_pointer_needed)
6744 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
6745 RTX_FRAME_RELATED_P (insn) = 1;
6748 /* Set up got pointer, if needed. */
6750 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
6752 rtx insns = s390_load_got ();
6754 for (insn = insns; insn; insn = NEXT_INSN (insn))
6756 annotate_constant_pool_refs (&PATTERN (insn));
6758 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
6765 if (TARGET_TPF_PROFILING)
6767 /* Generate a BAS instruction to serve as a function
6768 entry intercept to facilitate the use of tracing
6769 algorithms located at the branch target. */
6770 emit_insn (gen_prologue_tpf ());
6772 /* Emit a blockage here so that all code
6773 lies between the profiling mechanisms. */
6774 emit_insn (gen_blockage ());
6778 /* Expand the epilogue into a bunch of separate insns. */
6781 s390_emit_epilogue (bool sibcall)
6783 rtx frame_pointer, return_reg;
6784 int area_bottom, area_top, offset = 0;
6789 if (TARGET_TPF_PROFILING)
6792 /* Generate a BAS instruction to serve as a function
6793 entry intercept to facilitate the use of tracing
6794 algorithms located at the branch target. */
6796 /* Emit a blockage here so that all code
6797 lies between the profiling mechanisms. */
6798 emit_insn (gen_blockage ());
6800 emit_insn (gen_epilogue_tpf ());
6803 /* Check whether to use frame or stack pointer for restore. */
6805 frame_pointer = (frame_pointer_needed
6806 ? hard_frame_pointer_rtx : stack_pointer_rtx);
6808 s390_frame_area (&area_bottom, &area_top);
6810 /* Check whether we can access the register save area.
6811 If not, increment the frame pointer as required. */
6813 if (area_top <= area_bottom)
6815 /* Nothing to restore. */
6817 else if (DISP_IN_RANGE (cfun_frame_layout.frame_size + area_bottom)
6818 && DISP_IN_RANGE (cfun_frame_layout.frame_size + area_top - 1))
6820 /* Area is in range. */
6821 offset = cfun_frame_layout.frame_size;
6825 rtx insn, frame_off;
6827 offset = area_bottom < 0 ? -area_bottom : 0;
6828 frame_off = GEN_INT (cfun_frame_layout.frame_size - offset);
6830 if (DISP_IN_RANGE (INTVAL (frame_off)))
6832 insn = gen_rtx_SET (VOIDmode, frame_pointer,
6833 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
6834 insn = emit_insn (insn);
6838 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
6839 frame_off = force_const_mem (Pmode, frame_off);
6841 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
6842 annotate_constant_pool_refs (&PATTERN (insn));
6846 /* Restore call saved fprs. */
6850 if (cfun_save_high_fprs_p)
6852 next_offset = cfun_frame_layout.f8_offset;
6853 for (i = 24; i < 32; i++)
6855 if (cfun_fpr_bit_p (i - 16))
6857 restore_fpr (frame_pointer,
6858 offset + next_offset, i);
6867 next_offset = cfun_frame_layout.f4_offset;
6868 for (i = 18; i < 20; i++)
6870 if (cfun_fpr_bit_p (i - 16))
6872 restore_fpr (frame_pointer,
6873 offset + next_offset, i);
6876 else if (!TARGET_PACKED_STACK)
6882 /* Return register. */
6884 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
6886 /* Restore call saved gprs. */
6888 if (cfun_frame_layout.first_restore_gpr != -1)
6893 /* Check for global register and save them
6894 to stack location from where they get restored. */
6896 for (i = cfun_frame_layout.first_restore_gpr;
6897 i <= cfun_frame_layout.last_restore_gpr;
6900 /* These registers are special and need to be
6901 restored in any case. */
6902 if (i == STACK_POINTER_REGNUM
6903 || i == RETURN_REGNUM
6905 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
6910 addr = plus_constant (frame_pointer,
6911 offset + cfun_frame_layout.gprs_offset
6912 + (i - cfun_frame_layout.first_save_gpr)
6914 addr = gen_rtx_MEM (Pmode, addr);
6915 set_mem_alias_set (addr, s390_sr_alias_set);
6916 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
6922 /* Fetch return address from stack before load multiple,
6923 this will do good for scheduling. */
6925 if (cfun_frame_layout.save_return_addr_p
6926 || (cfun_frame_layout.first_restore_gpr < BASE_REGNUM
6927 && cfun_frame_layout.last_restore_gpr > RETURN_REGNUM))
6929 int return_regnum = find_unused_clobbered_reg();
6932 return_reg = gen_rtx_REG (Pmode, return_regnum);
6934 addr = plus_constant (frame_pointer,
6935 offset + cfun_frame_layout.gprs_offset
6937 - cfun_frame_layout.first_save_gpr)
6939 addr = gen_rtx_MEM (Pmode, addr);
6940 set_mem_alias_set (addr, s390_sr_alias_set);
6941 emit_move_insn (return_reg, addr);
6945 insn = restore_gprs (frame_pointer,
6946 offset + cfun_frame_layout.gprs_offset
6947 + (cfun_frame_layout.first_restore_gpr
6948 - cfun_frame_layout.first_save_gpr)
6950 cfun_frame_layout.first_restore_gpr,
6951 cfun_frame_layout.last_restore_gpr);
6958 /* Return to caller. */
6960 p = rtvec_alloc (2);
6962 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
6963 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
6964 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
6969 /* Return the size in bytes of a function argument of
6970 type TYPE and/or mode MODE. At least one of TYPE or
6971 MODE must be specified. */
6974 s390_function_arg_size (enum machine_mode mode, tree type)
6977 return int_size_in_bytes (type);
6979 /* No type info available for some library calls ... */
6980 if (mode != BLKmode)
6981 return GET_MODE_SIZE (mode);
6983 /* If we have neither type nor mode, abort */
6987 /* Return true if a function argument of type TYPE and mode MODE
6988 is to be passed in a floating-point register, if available. */
6991 s390_function_arg_float (enum machine_mode mode, tree type)
6993 int size = s390_function_arg_size (mode, type);
6997 /* Soft-float changes the ABI: no floating-point registers are used. */
6998 if (TARGET_SOFT_FLOAT)
7001 /* No type info available for some library calls ... */
7003 return mode == SFmode || mode == DFmode;
7005 /* The ABI says that record types with a single member are treated
7006 just like that member would be. */
7007 while (TREE_CODE (type) == RECORD_TYPE)
7009 tree field, single = NULL_TREE;
7011 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
7013 if (TREE_CODE (field) != FIELD_DECL)
7016 if (single == NULL_TREE)
7017 single = TREE_TYPE (field);
7022 if (single == NULL_TREE)
7028 return TREE_CODE (type) == REAL_TYPE;
7031 /* Return true if a function argument of type TYPE and mode MODE
7032 is to be passed in an integer register, or a pair of integer
7033 registers, if available. */
7036 s390_function_arg_integer (enum machine_mode mode, tree type)
7038 int size = s390_function_arg_size (mode, type);
7042 /* No type info available for some library calls ... */
7044 return GET_MODE_CLASS (mode) == MODE_INT
7045 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
7047 /* We accept small integral (and similar) types. */
7048 if (INTEGRAL_TYPE_P (type)
7049 || POINTER_TYPE_P (type)
7050 || TREE_CODE (type) == OFFSET_TYPE
7051 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
7054 /* We also accept structs of size 1, 2, 4, 8 that are not
7055 passed in floating-point registers. */
7056 if (AGGREGATE_TYPE_P (type)
7057 && exact_log2 (size) >= 0
7058 && !s390_function_arg_float (mode, type))
7064 /* Return 1 if a function argument of type TYPE and mode MODE
7065 is to be passed by reference. The ABI specifies that only
7066 structures of size 1, 2, 4, or 8 bytes are passed by value,
7067 all other structures (and complex numbers) are passed by
7071 s390_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED,
7072 enum machine_mode mode, tree type,
7073 bool named ATTRIBUTE_UNUSED)
7075 int size = s390_function_arg_size (mode, type);
7081 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
7084 if (TREE_CODE (type) == COMPLEX_TYPE
7085 || TREE_CODE (type) == VECTOR_TYPE)
7092 /* Update the data in CUM to advance over an argument of mode MODE and
7093 data type TYPE. (TYPE is null for libcalls where that information
7094 may not be available.). The boolean NAMED specifies whether the
7095 argument is a named argument (as opposed to an unnamed argument
7096 matching an ellipsis). */
7099 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
7100 tree type, int named ATTRIBUTE_UNUSED)
7102 if (s390_function_arg_float (mode, type))
7106 else if (s390_function_arg_integer (mode, type))
7108 int size = s390_function_arg_size (mode, type);
7109 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
7115 /* Define where to put the arguments to a function.
7116 Value is zero to push the argument on the stack,
7117 or a hard register in which to store the argument.
7119 MODE is the argument's machine mode.
7120 TYPE is the data type of the argument (as a tree).
7121 This is null for libcalls where that information may
7123 CUM is a variable of type CUMULATIVE_ARGS which gives info about
7124 the preceding args and about the function being called.
7125 NAMED is nonzero if this argument is a named parameter
7126 (otherwise it is an extra parameter matching an ellipsis).
7128 On S/390, we use general purpose registers 2 through 6 to
7129 pass integer, pointer, and certain structure arguments, and
7130 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
7131 to pass floating point arguments. All remaining arguments
7132 are pushed to the stack. */
7135 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
7136 int named ATTRIBUTE_UNUSED)
7138 if (s390_function_arg_float (mode, type))
7140 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
7143 return gen_rtx_REG (mode, cum->fprs + 16);
7145 else if (s390_function_arg_integer (mode, type))
7147 int size = s390_function_arg_size (mode, type);
7148 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
7150 if (cum->gprs + n_gprs > 5)
7153 return gen_rtx_REG (mode, cum->gprs + 2);
7156 /* After the real arguments, expand_call calls us once again
7157 with a void_type_node type. Whatever we return here is
7158 passed as operand 2 to the call expanders.
7160 We don't need this feature ... */
7161 else if (type == void_type_node)
7167 /* Return true if return values of type TYPE should be returned
7168 in a memory buffer whose address is passed by the caller as
7169 hidden first argument. */
7172 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
7174 /* We accept small integral (and similar) types. */
7175 if (INTEGRAL_TYPE_P (type)
7176 || POINTER_TYPE_P (type)
7177 || TREE_CODE (type) == OFFSET_TYPE
7178 || TREE_CODE (type) == REAL_TYPE)
7179 return int_size_in_bytes (type) > 8;
7181 /* Aggregates and similar constructs are always returned
7183 if (AGGREGATE_TYPE_P (type)
7184 || TREE_CODE (type) == COMPLEX_TYPE
7185 || TREE_CODE (type) == VECTOR_TYPE)
7188 /* ??? We get called on all sorts of random stuff from
7189 aggregate_value_p. We can't abort, but it's not clear
7190 what's safe to return. Pretend it's a struct I guess. */
7194 /* Define where to return a (scalar) value of type TYPE.
7195 If TYPE is null, define where to return a (scalar)
7196 value of mode MODE from a libcall. */
7199 s390_function_value (tree type, enum machine_mode mode)
7203 int unsignedp = TYPE_UNSIGNED (type);
7204 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
7207 if (GET_MODE_CLASS (mode) != MODE_INT
7208 && GET_MODE_CLASS (mode) != MODE_FLOAT)
7210 if (GET_MODE_SIZE (mode) > 8)
7213 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
7214 return gen_rtx_REG (mode, 16);
7216 return gen_rtx_REG (mode, 2);
7220 /* Create and return the va_list datatype.
7222 On S/390, va_list is an array type equivalent to
7224 typedef struct __va_list_tag
7228 void *__overflow_arg_area;
7229 void *__reg_save_area;
7232 where __gpr and __fpr hold the number of general purpose
7233 or floating point arguments used up to now, respectively,
7234 __overflow_arg_area points to the stack location of the
7235 next argument passed on the stack, and __reg_save_area
7236 always points to the start of the register area in the
7237 call frame of the current function. The function prologue
7238 saves all registers used for argument passing into this
7239 area if the function uses variable arguments. */
7242 s390_build_builtin_va_list (void)
7244 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
7246 record = lang_hooks.types.make_type (RECORD_TYPE);
7249 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
7251 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
7252 long_integer_type_node);
7253 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
7254 long_integer_type_node);
7255 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
7257 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
7260 DECL_FIELD_CONTEXT (f_gpr) = record;
7261 DECL_FIELD_CONTEXT (f_fpr) = record;
7262 DECL_FIELD_CONTEXT (f_ovf) = record;
7263 DECL_FIELD_CONTEXT (f_sav) = record;
7265 TREE_CHAIN (record) = type_decl;
7266 TYPE_NAME (record) = type_decl;
7267 TYPE_FIELDS (record) = f_gpr;
7268 TREE_CHAIN (f_gpr) = f_fpr;
7269 TREE_CHAIN (f_fpr) = f_ovf;
7270 TREE_CHAIN (f_ovf) = f_sav;
7272 layout_type (record);
7274 /* The correct type is an array type of one element. */
7275 return build_array_type (record, build_index_type (size_zero_node));
7278 /* Implement va_start by filling the va_list structure VALIST.
7279 STDARG_P is always true, and ignored.
7280 NEXTARG points to the first anonymous stack argument.
7282 The following global variables are used to initialize
7283 the va_list structure:
7285 current_function_args_info:
7286 holds number of gprs and fprs used for named arguments.
7287 current_function_arg_offset_rtx:
7288 holds the offset of the first anonymous stack argument
7289 (relative to the virtual arg pointer). */
7292 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
7294 HOST_WIDE_INT n_gpr, n_fpr;
7296 tree f_gpr, f_fpr, f_ovf, f_sav;
7297 tree gpr, fpr, ovf, sav, t;
7299 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
7300 f_fpr = TREE_CHAIN (f_gpr);
7301 f_ovf = TREE_CHAIN (f_fpr);
7302 f_sav = TREE_CHAIN (f_ovf);
7304 valist = build_va_arg_indirect_ref (valist);
7305 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
7306 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
7307 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
7308 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
7310 /* Count number of gp and fp argument registers used. */
7312 n_gpr = current_function_args_info.gprs;
7313 n_fpr = current_function_args_info.fprs;
7315 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr,
7316 build_int_cst (NULL_TREE, n_gpr));
7317 TREE_SIDE_EFFECTS (t) = 1;
7318 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7320 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr,
7321 build_int_cst (NULL_TREE, n_fpr));
7322 TREE_SIDE_EFFECTS (t) = 1;
7323 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7325 /* Find the overflow area. */
7326 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
7328 off = INTVAL (current_function_arg_offset_rtx);
7329 off = off < 0 ? 0 : off;
7330 if (TARGET_DEBUG_ARG)
7331 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
7332 (int)n_gpr, (int)n_fpr, off);
7334 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_cst (NULL_TREE, off));
7336 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
7337 TREE_SIDE_EFFECTS (t) = 1;
7338 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7340 /* Find the register save area. */
7341 t = make_tree (TREE_TYPE (sav), return_address_pointer_rtx);
7342 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
7343 build_int_cst (NULL_TREE, -RETURN_REGNUM * UNITS_PER_WORD));
7345 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
7346 TREE_SIDE_EFFECTS (t) = 1;
7347 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7350 /* Implement va_arg by updating the va_list structure
7351 VALIST as required to retrieve an argument of type
7352 TYPE, and returning that argument.
7354 Generates code equivalent to:
7356 if (integral value) {
7357 if (size <= 4 && args.gpr < 5 ||
7358 size > 4 && args.gpr < 4 )
7359 ret = args.reg_save_area[args.gpr+8]
7361 ret = *args.overflow_arg_area++;
7362 } else if (float value) {
7364 ret = args.reg_save_area[args.fpr+64]
7366 ret = *args.overflow_arg_area++;
7367 } else if (aggregate value) {
7369 ret = *args.reg_save_area[args.gpr]
7371 ret = **args.overflow_arg_area++;
7375 s390_gimplify_va_arg (tree valist, tree type, tree *pre_p,
7376 tree *post_p ATTRIBUTE_UNUSED)
7378 tree f_gpr, f_fpr, f_ovf, f_sav;
7379 tree gpr, fpr, ovf, sav, reg, t, u;
7380 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
7381 tree lab_false, lab_over, addr;
7383 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
7384 f_fpr = TREE_CHAIN (f_gpr);
7385 f_ovf = TREE_CHAIN (f_fpr);
7386 f_sav = TREE_CHAIN (f_ovf);
7388 valist = build_va_arg_indirect_ref (valist);
7389 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
7390 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
7391 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
7392 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
7394 size = int_size_in_bytes (type);
7396 if (pass_by_reference (NULL, TYPE_MODE (type), type, false))
7398 if (TARGET_DEBUG_ARG)
7400 fprintf (stderr, "va_arg: aggregate type");
7404 /* Aggregates are passed by reference. */
7409 /* kernel stack layout on 31 bit: It is assumed here that no padding
7410 will be added by s390_frame_info because for va_args always an even
7411 number of gprs has to be saved r15-r2 = 14 regs. */
7412 sav_ofs = 2 * UNITS_PER_WORD;
7413 sav_scale = UNITS_PER_WORD;
7414 size = UNITS_PER_WORD;
7417 else if (s390_function_arg_float (TYPE_MODE (type), type))
7419 if (TARGET_DEBUG_ARG)
7421 fprintf (stderr, "va_arg: float type");
7425 /* FP args go in FP registers, if present. */
7429 sav_ofs = 16 * UNITS_PER_WORD;
7431 /* TARGET_64BIT has up to 4 parameter in fprs */
7432 max_reg = TARGET_64BIT ? 3 : 1;
7436 if (TARGET_DEBUG_ARG)
7438 fprintf (stderr, "va_arg: other type");
7442 /* Otherwise into GP registers. */
7445 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
7447 /* kernel stack layout on 31 bit: It is assumed here that no padding
7448 will be added by s390_frame_info because for va_args always an even
7449 number of gprs has to be saved r15-r2 = 14 regs. */
7450 sav_ofs = 2 * UNITS_PER_WORD;
7452 if (size < UNITS_PER_WORD)
7453 sav_ofs += UNITS_PER_WORD - size;
7455 sav_scale = UNITS_PER_WORD;
7462 /* Pull the value out of the saved registers ... */
7464 lab_false = create_artificial_label ();
7465 lab_over = create_artificial_label ();
7466 addr = create_tmp_var (ptr_type_node, "addr");
7467 DECL_POINTER_ALIAS_SET (addr) = s390_sr_alias_set;
7469 t = fold_convert (TREE_TYPE (reg), size_int (max_reg));
7470 t = build2 (GT_EXPR, boolean_type_node, reg, t);
7471 u = build1 (GOTO_EXPR, void_type_node, lab_false);
7472 t = build3 (COND_EXPR, void_type_node, t, u, NULL_TREE);
7473 gimplify_and_add (t, pre_p);
7475 t = build2 (PLUS_EXPR, ptr_type_node, sav,
7476 fold_convert (ptr_type_node, size_int (sav_ofs)));
7477 u = build2 (MULT_EXPR, TREE_TYPE (reg), reg,
7478 fold_convert (TREE_TYPE (reg), size_int (sav_scale)));
7479 t = build2 (PLUS_EXPR, ptr_type_node, t, fold_convert (ptr_type_node, u));
7481 t = build2 (MODIFY_EXPR, void_type_node, addr, t);
7482 gimplify_and_add (t, pre_p);
7484 t = build1 (GOTO_EXPR, void_type_node, lab_over);
7485 gimplify_and_add (t, pre_p);
7487 t = build1 (LABEL_EXPR, void_type_node, lab_false);
7488 append_to_statement_list (t, pre_p);
7491 /* ... Otherwise out of the overflow area. */
7494 if (size < UNITS_PER_WORD)
7495 t = build2 (PLUS_EXPR, ptr_type_node, t,
7496 fold_convert (ptr_type_node, size_int (UNITS_PER_WORD - size)));
7498 gimplify_expr (&t, pre_p, NULL, is_gimple_val, fb_rvalue);
7500 u = build2 (MODIFY_EXPR, void_type_node, addr, t);
7501 gimplify_and_add (u, pre_p);
7503 t = build2 (PLUS_EXPR, ptr_type_node, t,
7504 fold_convert (ptr_type_node, size_int (size)));
7505 t = build2 (MODIFY_EXPR, ptr_type_node, ovf, t);
7506 gimplify_and_add (t, pre_p);
7508 t = build1 (LABEL_EXPR, void_type_node, lab_over);
7509 append_to_statement_list (t, pre_p);
7512 /* Increment register save count. */
7514 u = build2 (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
7515 fold_convert (TREE_TYPE (reg), size_int (n_reg)));
7516 gimplify_and_add (u, pre_p);
7520 t = build_pointer_type (build_pointer_type (type));
7521 addr = fold_convert (t, addr);
7522 addr = build_va_arg_indirect_ref (addr);
7526 t = build_pointer_type (type);
7527 addr = fold_convert (t, addr);
7530 return build_va_arg_indirect_ref (addr);
7538 S390_BUILTIN_THREAD_POINTER,
7539 S390_BUILTIN_SET_THREAD_POINTER,
7544 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
7549 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
7555 s390_init_builtins (void)
7559 ftype = build_function_type (ptr_type_node, void_list_node);
7560 lang_hooks.builtin_function ("__builtin_thread_pointer", ftype,
7561 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
7564 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
7565 lang_hooks.builtin_function ("__builtin_set_thread_pointer", ftype,
7566 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
7570 /* Expand an expression EXP that calls a built-in function,
7571 with result going to TARGET if that's convenient
7572 (and in mode MODE if that's convenient).
7573 SUBTARGET may be used as the target for computing one of EXP's operands.
7574 IGNORE is nonzero if the value is to be ignored. */
7577 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
7578 enum machine_mode mode ATTRIBUTE_UNUSED,
7579 int ignore ATTRIBUTE_UNUSED)
7583 unsigned int const *code_for_builtin =
7584 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
7586 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7587 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
7588 tree arglist = TREE_OPERAND (exp, 1);
7589 enum insn_code icode;
7590 rtx op[MAX_ARGS], pat;
7594 if (fcode >= S390_BUILTIN_max)
7595 internal_error ("bad builtin fcode");
7596 icode = code_for_builtin[fcode];
7598 internal_error ("bad builtin fcode");
7600 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
7602 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
7604 arglist = TREE_CHAIN (arglist), arity++)
7606 const struct insn_operand_data *insn_op;
7608 tree arg = TREE_VALUE (arglist);
7609 if (arg == error_mark_node)
7611 if (arity > MAX_ARGS)
7614 insn_op = &insn_data[icode].operand[arity + nonvoid];
7616 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
7618 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
7619 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
7624 enum machine_mode tmode = insn_data[icode].operand[0].mode;
7626 || GET_MODE (target) != tmode
7627 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
7628 target = gen_reg_rtx (tmode);
7634 pat = GEN_FCN (icode) (target);
7638 pat = GEN_FCN (icode) (target, op[0]);
7640 pat = GEN_FCN (icode) (op[0]);
7643 pat = GEN_FCN (icode) (target, op[0], op[1]);
7659 /* Output assembly code for the trampoline template to
7662 On S/390, we use gpr 1 internally in the trampoline code;
7663 gpr 0 is used to hold the static chain. */
7666 s390_trampoline_template (FILE *file)
7669 op[0] = gen_rtx_REG (Pmode, 0);
7670 op[1] = gen_rtx_REG (Pmode, 1);
7674 output_asm_insn ("basr\t%1,0", op);
7675 output_asm_insn ("lmg\t%0,%1,14(%1)", op);
7676 output_asm_insn ("br\t%1", op);
7677 ASM_OUTPUT_SKIP (file, (HOST_WIDE_INT)(TRAMPOLINE_SIZE - 10));
7681 output_asm_insn ("basr\t%1,0", op);
7682 output_asm_insn ("lm\t%0,%1,6(%1)", op);
7683 output_asm_insn ("br\t%1", op);
7684 ASM_OUTPUT_SKIP (file, (HOST_WIDE_INT)(TRAMPOLINE_SIZE - 8));
7688 /* Emit RTL insns to initialize the variable parts of a trampoline.
7689 FNADDR is an RTX for the address of the function's pure code.
7690 CXT is an RTX for the static chain value for the function. */
7693 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
7695 emit_move_insn (gen_rtx_MEM (Pmode,
7696 memory_address (Pmode,
7697 plus_constant (addr, (TARGET_64BIT ? 16 : 8)))), cxt);
7698 emit_move_insn (gen_rtx_MEM (Pmode,
7699 memory_address (Pmode,
7700 plus_constant (addr, (TARGET_64BIT ? 24 : 12)))), fnaddr);
7703 /* Return rtx for 64-bit constant formed from the 32-bit subwords
7704 LOW and HIGH, independent of the host word size. */
7707 s390_gen_rtx_const_DI (int high, int low)
7709 #if HOST_BITS_PER_WIDE_INT >= 64
7711 val = (HOST_WIDE_INT)high;
7713 val |= (HOST_WIDE_INT)low;
7715 return GEN_INT (val);
7717 #if HOST_BITS_PER_WIDE_INT >= 32
7718 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
7725 /* Output assembler code to FILE to increment profiler label # LABELNO
7726 for profiling a function entry. */
7729 s390_function_profiler (FILE *file, int labelno)
7734 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
7736 fprintf (file, "# function profiler \n");
7738 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
7739 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
7740 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
7742 op[2] = gen_rtx_REG (Pmode, 1);
7743 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
7744 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
7746 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
7749 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
7750 op[4] = gen_rtx_CONST (Pmode, op[4]);
7755 output_asm_insn ("stg\t%0,%1", op);
7756 output_asm_insn ("larl\t%2,%3", op);
7757 output_asm_insn ("brasl\t%0,%4", op);
7758 output_asm_insn ("lg\t%0,%1", op);
7762 op[6] = gen_label_rtx ();
7764 output_asm_insn ("st\t%0,%1", op);
7765 output_asm_insn ("bras\t%2,%l6", op);
7766 output_asm_insn (".long\t%4", op);
7767 output_asm_insn (".long\t%3", op);
7768 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
7769 output_asm_insn ("l\t%0,0(%2)", op);
7770 output_asm_insn ("l\t%2,4(%2)", op);
7771 output_asm_insn ("basr\t%0,%0", op);
7772 output_asm_insn ("l\t%0,%1", op);
7776 op[5] = gen_label_rtx ();
7777 op[6] = gen_label_rtx ();
7779 output_asm_insn ("st\t%0,%1", op);
7780 output_asm_insn ("bras\t%2,%l6", op);
7781 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
7782 output_asm_insn (".long\t%4-%l5", op);
7783 output_asm_insn (".long\t%3-%l5", op);
7784 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
7785 output_asm_insn ("lr\t%0,%2", op);
7786 output_asm_insn ("a\t%0,0(%2)", op);
7787 output_asm_insn ("a\t%2,4(%2)", op);
7788 output_asm_insn ("basr\t%0,%0", op);
7789 output_asm_insn ("l\t%0,%1", op);
7793 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
7794 into its SYMBOL_REF_FLAGS. */
7797 s390_encode_section_info (tree decl, rtx rtl, int first)
7799 default_encode_section_info (decl, rtl, first);
7801 /* If a variable has a forced alignment to < 2 bytes, mark it with
7802 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
7803 if (TREE_CODE (decl) == VAR_DECL
7804 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
7805 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
7808 /* Output thunk to FILE that implements a C++ virtual function call (with
7809 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
7810 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
7811 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
7812 relative to the resulting this pointer. */
7815 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
7816 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
7822 /* Operand 0 is the target function. */
7823 op[0] = XEXP (DECL_RTL (function), 0);
7824 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
7827 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
7828 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
7829 op[0] = gen_rtx_CONST (Pmode, op[0]);
7832 /* Operand 1 is the 'this' pointer. */
7833 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
7834 op[1] = gen_rtx_REG (Pmode, 3);
7836 op[1] = gen_rtx_REG (Pmode, 2);
7838 /* Operand 2 is the delta. */
7839 op[2] = GEN_INT (delta);
7841 /* Operand 3 is the vcall_offset. */
7842 op[3] = GEN_INT (vcall_offset);
7844 /* Operand 4 is the temporary register. */
7845 op[4] = gen_rtx_REG (Pmode, 1);
7847 /* Operands 5 to 8 can be used as labels. */
7853 /* Operand 9 can be used for temporary register. */
7856 /* Generate code. */
7859 /* Setup literal pool pointer if required. */
7860 if ((!DISP_IN_RANGE (delta)
7861 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7862 || (!DISP_IN_RANGE (vcall_offset)
7863 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
7865 op[5] = gen_label_rtx ();
7866 output_asm_insn ("larl\t%4,%5", op);
7869 /* Add DELTA to this pointer. */
7872 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
7873 output_asm_insn ("la\t%1,%2(%1)", op);
7874 else if (DISP_IN_RANGE (delta))
7875 output_asm_insn ("lay\t%1,%2(%1)", op);
7876 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7877 output_asm_insn ("aghi\t%1,%2", op);
7880 op[6] = gen_label_rtx ();
7881 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
7885 /* Perform vcall adjustment. */
7888 if (DISP_IN_RANGE (vcall_offset))
7890 output_asm_insn ("lg\t%4,0(%1)", op);
7891 output_asm_insn ("ag\t%1,%3(%4)", op);
7893 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7895 output_asm_insn ("lghi\t%4,%3", op);
7896 output_asm_insn ("ag\t%4,0(%1)", op);
7897 output_asm_insn ("ag\t%1,0(%4)", op);
7901 op[7] = gen_label_rtx ();
7902 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
7903 output_asm_insn ("ag\t%4,0(%1)", op);
7904 output_asm_insn ("ag\t%1,0(%4)", op);
7908 /* Jump to target. */
7909 output_asm_insn ("jg\t%0", op);
7911 /* Output literal pool if required. */
7914 output_asm_insn (".align\t4", op);
7915 targetm.asm_out.internal_label (file, "L",
7916 CODE_LABEL_NUMBER (op[5]));
7920 targetm.asm_out.internal_label (file, "L",
7921 CODE_LABEL_NUMBER (op[6]));
7922 output_asm_insn (".long\t%2", op);
7926 targetm.asm_out.internal_label (file, "L",
7927 CODE_LABEL_NUMBER (op[7]));
7928 output_asm_insn (".long\t%3", op);
7933 /* Setup base pointer if required. */
7935 || (!DISP_IN_RANGE (delta)
7936 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7937 || (!DISP_IN_RANGE (delta)
7938 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
7940 op[5] = gen_label_rtx ();
7941 output_asm_insn ("basr\t%4,0", op);
7942 targetm.asm_out.internal_label (file, "L",
7943 CODE_LABEL_NUMBER (op[5]));
7946 /* Add DELTA to this pointer. */
7949 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
7950 output_asm_insn ("la\t%1,%2(%1)", op);
7951 else if (DISP_IN_RANGE (delta))
7952 output_asm_insn ("lay\t%1,%2(%1)", op);
7953 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7954 output_asm_insn ("ahi\t%1,%2", op);
7957 op[6] = gen_label_rtx ();
7958 output_asm_insn ("a\t%1,%6-%5(%4)", op);
7962 /* Perform vcall adjustment. */
7965 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
7967 output_asm_insn ("lg\t%4,0(%1)", op);
7968 output_asm_insn ("a\t%1,%3(%4)", op);
7970 else if (DISP_IN_RANGE (vcall_offset))
7972 output_asm_insn ("lg\t%4,0(%1)", op);
7973 output_asm_insn ("ay\t%1,%3(%4)", op);
7975 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7977 output_asm_insn ("lhi\t%4,%3", op);
7978 output_asm_insn ("a\t%4,0(%1)", op);
7979 output_asm_insn ("a\t%1,0(%4)", op);
7983 op[7] = gen_label_rtx ();
7984 output_asm_insn ("l\t%4,%7-%5(%4)", op);
7985 output_asm_insn ("a\t%4,0(%1)", op);
7986 output_asm_insn ("a\t%1,0(%4)", op);
7989 /* We had to clobber the base pointer register.
7990 Re-setup the base pointer (with a different base). */
7991 op[5] = gen_label_rtx ();
7992 output_asm_insn ("basr\t%4,0", op);
7993 targetm.asm_out.internal_label (file, "L",
7994 CODE_LABEL_NUMBER (op[5]));
7997 /* Jump to target. */
7998 op[8] = gen_label_rtx ();
8001 output_asm_insn ("l\t%4,%8-%5(%4)", op);
8003 output_asm_insn ("a\t%4,%8-%5(%4)", op);
8004 /* We cannot call through .plt, since .plt requires %r12 loaded. */
8005 else if (flag_pic == 1)
8007 output_asm_insn ("a\t%4,%8-%5(%4)", op);
8008 output_asm_insn ("l\t%4,%0(%4)", op);
8010 else if (flag_pic == 2)
8012 op[9] = gen_rtx_REG (Pmode, 0);
8013 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
8014 output_asm_insn ("a\t%4,%8-%5(%4)", op);
8015 output_asm_insn ("ar\t%4,%9", op);
8016 output_asm_insn ("l\t%4,0(%4)", op);
8019 output_asm_insn ("br\t%4", op);
8021 /* Output literal pool. */
8022 output_asm_insn (".align\t4", op);
8024 if (nonlocal && flag_pic == 2)
8025 output_asm_insn (".long\t%0", op);
8028 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
8029 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
8032 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
8034 output_asm_insn (".long\t%0", op);
8036 output_asm_insn (".long\t%0-%5", op);
8040 targetm.asm_out.internal_label (file, "L",
8041 CODE_LABEL_NUMBER (op[6]));
8042 output_asm_insn (".long\t%2", op);
8046 targetm.asm_out.internal_label (file, "L",
8047 CODE_LABEL_NUMBER (op[7]));
8048 output_asm_insn (".long\t%3", op);
8054 s390_valid_pointer_mode (enum machine_mode mode)
8056 return (mode == SImode || (TARGET_64BIT && mode == DImode));
8059 /* How to allocate a 'struct machine_function'. */
8061 static struct machine_function *
8062 s390_init_machine_status (void)
8064 return ggc_alloc_cleared (sizeof (struct machine_function));
8067 /* Checks whether the given ARGUMENT_LIST would use a caller
8068 saved register. This is used to decide whether sibling call
8069 optimization could be performed on the respective function
8073 s390_call_saved_register_used (tree argument_list)
8075 CUMULATIVE_ARGS cum;
8077 enum machine_mode mode;
8082 INIT_CUMULATIVE_ARGS (cum, NULL, NULL, 0, 0);
8084 while (argument_list)
8086 parameter = TREE_VALUE (argument_list);
8087 argument_list = TREE_CHAIN (argument_list);
8092 /* For an undeclared variable passed as parameter we will get
8093 an ERROR_MARK node here. */
8094 if (TREE_CODE (parameter) == ERROR_MARK)
8097 if (! (type = TREE_TYPE (parameter)))
8100 if (! (mode = TYPE_MODE (TREE_TYPE (parameter))))
8103 if (pass_by_reference (&cum, mode, type, true))
8106 type = build_pointer_type (type);
8109 parm_rtx = s390_function_arg (&cum, mode, type, 0);
8111 s390_function_arg_advance (&cum, mode, type, 0);
8113 if (parm_rtx && REG_P (parm_rtx))
8116 reg < HARD_REGNO_NREGS (REGNO (parm_rtx), GET_MODE (parm_rtx));
8118 if (! call_used_regs[reg + REGNO (parm_rtx)])
8125 /* Return true if the given call expression can be
8126 turned into a sibling call.
8127 DECL holds the declaration of the function to be called whereas
8128 EXP is the call expression itself. */
8131 s390_function_ok_for_sibcall (tree decl, tree exp)
8133 /* The TPF epilogue uses register 1. */
8134 if (TARGET_TPF_PROFILING)
8137 /* The 31 bit PLT code uses register 12 (GOT pointer - caller saved)
8138 which would have to be restored before the sibcall. */
8139 if (!TARGET_64BIT && flag_pic && decl && TREE_PUBLIC (decl))
8142 /* Register 6 on s390 is available as an argument register but unfortunately
8143 "caller saved". This makes functions needing this register for arguments
8144 not suitable for sibcalls. */
8145 if (TREE_OPERAND (exp, 1)
8146 && s390_call_saved_register_used (TREE_OPERAND (exp, 1)))
8152 /* Return the fixed registers used for condition codes. */
8155 s390_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
8158 *p2 = INVALID_REGNUM;
8163 /* If two condition code modes are compatible, return a condition code
8164 mode which is compatible with both. Otherwise, return
8167 static enum machine_mode
8168 s390_cc_modes_compatible (enum machine_mode m1, enum machine_mode m2)
8176 if (m2 == CCUmode || m2 == CCTmode
8177 || m2 == CCSmode || m2 == CCSRmode || m2 == CCURmode)
8197 /* This function is used by the call expanders of the machine description.
8198 It emits the call insn itself together with the necessary operations
8199 to adjust the target address and returns the emitted insn.
8200 ADDR_LOCATION is the target address rtx
8201 TLS_CALL the location of the thread-local symbol
8202 RESULT_REG the register where the result of the call should be stored
8203 RETADDR_REG the register where the return address should be stored
8204 If this parameter is NULL_RTX the call is considered
8205 to be a sibling call. */
8208 s390_emit_call (rtx addr_location, rtx tls_call, rtx result_reg,
8211 bool plt_call = false;
8217 /* Direct function calls need special treatment. */
8218 if (GET_CODE (addr_location) == SYMBOL_REF)
8220 /* When calling a global routine in PIC mode, we must
8221 replace the symbol itself with the PLT stub. */
8222 if (flag_pic && !SYMBOL_REF_LOCAL_P (addr_location))
8224 addr_location = gen_rtx_UNSPEC (Pmode,
8225 gen_rtvec (1, addr_location),
8227 addr_location = gen_rtx_CONST (Pmode, addr_location);
8231 /* Unless we can use the bras(l) insn, force the
8232 routine address into a register. */
8233 if (!TARGET_SMALL_EXEC && !TARGET_CPU_ZARCH)
8236 addr_location = legitimize_pic_address (addr_location, 0);
8238 addr_location = force_reg (Pmode, addr_location);
8242 /* If it is already an indirect call or the code above moved the
8243 SYMBOL_REF to somewhere else make sure the address can be found in
8245 if (retaddr_reg == NULL_RTX
8246 && GET_CODE (addr_location) != SYMBOL_REF
8249 emit_move_insn (gen_rtx_REG (Pmode, SIBCALL_REGNUM), addr_location);
8250 addr_location = gen_rtx_REG (Pmode, SIBCALL_REGNUM);
8253 addr_location = gen_rtx_MEM (QImode, addr_location);
8254 call = gen_rtx_CALL (VOIDmode, addr_location, const0_rtx);
8256 if (result_reg != NULL_RTX)
8257 call = gen_rtx_SET (VOIDmode, result_reg, call);
8259 if (retaddr_reg != NULL_RTX)
8261 clobber = gen_rtx_CLOBBER (VOIDmode, retaddr_reg);
8263 if (tls_call != NULL_RTX)
8264 vec = gen_rtvec (3, call, clobber,
8265 gen_rtx_USE (VOIDmode, tls_call));
8267 vec = gen_rtvec (2, call, clobber);
8269 call = gen_rtx_PARALLEL (VOIDmode, vec);
8272 insn = emit_call_insn (call);
8274 /* 31-bit PLT stubs and tls calls use the GOT register implicitly. */
8275 if ((!TARGET_64BIT && plt_call) || tls_call != NULL_RTX)
8277 /* s390_function_ok_for_sibcall should
8278 have denied sibcalls in this case. */
8279 if (retaddr_reg == NULL_RTX)
8282 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
8287 /* Implement CONDITIONAL_REGISTER_USAGE. */
8290 s390_conditional_register_usage (void)
8296 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
8297 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
8299 if (TARGET_CPU_ZARCH)
8301 fixed_regs[RETURN_REGNUM] = 0;
8302 call_used_regs[RETURN_REGNUM] = 0;
8306 for (i = 24; i < 32; i++)
8307 call_used_regs[i] = call_really_used_regs[i] = 0;
8311 for (i = 18; i < 20; i++)
8312 call_used_regs[i] = call_really_used_regs[i] = 0;
8315 if (TARGET_SOFT_FLOAT)
8317 for (i = 16; i < 32; i++)
8318 call_used_regs[i] = fixed_regs[i] = 1;
8322 /* Corresponding function to eh_return expander. */
8324 static GTY(()) rtx s390_tpf_eh_return_symbol;
8326 s390_emit_tpf_eh_return (rtx target)
8330 if (!s390_tpf_eh_return_symbol)
8331 s390_tpf_eh_return_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tpf_eh_return");
8333 reg = gen_rtx_REG (Pmode, 2);
8335 emit_move_insn (reg, target);
8336 insn = s390_emit_call (s390_tpf_eh_return_symbol, NULL_RTX, reg,
8337 gen_rtx_REG (Pmode, RETURN_REGNUM));
8338 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), reg);
8340 emit_move_insn (EH_RETURN_HANDLER_RTX, reg);
8343 #include "gt-s390.h"