1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
40 #ifndef TARGET_NO_PROTOTYPE
41 #define TARGET_NO_PROTOTYPE 0
44 extern char *language_string;
45 extern int profile_block_flag;
47 #define min(A,B) ((A) < (B) ? (A) : (B))
48 #define max(A,B) ((A) > (B) ? (A) : (B))
52 enum processor_type rs6000_cpu;
53 struct rs6000_cpu_select rs6000_select[3] =
55 /* switch name, tune arch */
56 { (char *)0, "--with-cpu=", 1, 1 },
57 { (char *)0, "-mcpu=", 1, 1 },
58 { (char *)0, "-mtune=", 1, 0 },
61 /* Set to non-zero by "fix" operation to indicate that itrunc and
62 uitrunc must be defined. */
64 int rs6000_trunc_used;
66 /* Set to non-zero once they have been defined. */
68 static int trunc_defined;
70 /* Set to non-zero once AIX common-mode calls have been defined. */
71 static int common_mode_defined;
73 /* Save information from a "cmpxx" operation until the branch or scc is
75 rtx rs6000_compare_op0, rs6000_compare_op1;
76 int rs6000_compare_fp_p;
79 /* Label number of label created for -mrelocatable, to call to so we can
80 get the address of the GOT section */
81 int rs6000_pic_labelno;
83 /* Which abi to adhere to */
84 char *rs6000_abi_name = RS6000_ABI_NAME;
86 /* Semantics of the small data area */
87 enum rs6000_sdata_type rs6000_sdata = SDATA_DATA;
89 /* Which small data model to use */
90 char *rs6000_sdata_name = (char *)0;
93 /* Whether a System V.4 varargs area was created. */
94 int rs6000_sysv_varargs_p;
96 /* Whether we need to save the TOC register. */
97 int rs6000_save_toc_p;
99 /* ABI enumeration available for subtarget to use. */
100 enum rs6000_abi rs6000_current_abi;
102 /* Offset & size for fpmem stack locations used for converting between
103 float and integral types. */
104 int rs6000_fpmem_offset;
105 int rs6000_fpmem_size;
108 /* Default register names. */
109 char rs6000_reg_names[][8] =
111 "0", "1", "2", "3", "4", "5", "6", "7",
112 "8", "9", "10", "11", "12", "13", "14", "15",
113 "16", "17", "18", "19", "20", "21", "22", "23",
114 "24", "25", "26", "27", "28", "29", "30", "31",
115 "0", "1", "2", "3", "4", "5", "6", "7",
116 "8", "9", "10", "11", "12", "13", "14", "15",
117 "16", "17", "18", "19", "20", "21", "22", "23",
118 "24", "25", "26", "27", "28", "29", "30", "31",
119 "mq", "lr", "ctr","ap",
120 "0", "1", "2", "3", "4", "5", "6", "7",
124 #ifdef TARGET_REGNAMES
125 static char alt_reg_names[][8] =
127 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
128 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
129 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
130 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
131 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
132 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
133 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
134 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
135 "mq", "lr", "ctr", "ap",
136 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
141 /* Override command line options. Mostly we process the processor
142 type and sometimes adjust other TARGET_ options. */
145 rs6000_override_options (default_cpu)
149 struct rs6000_cpu_select *ptr;
151 /* Simplify the entries below by making a mask for any POWER
152 variant and any PowerPC variant. */
154 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
155 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
156 | MASK_PPC_GFXOPT | MASK_POWERPC64)
157 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
161 char *name; /* Canonical processor name. */
162 enum processor_type processor; /* Processor type enum value. */
163 int target_enable; /* Target flags to enable. */
164 int target_disable; /* Target flags to disable. */
165 } processor_target_table[]
166 = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS,
167 POWER_MASKS | POWERPC_MASKS},
168 {"power", PROCESSOR_POWER,
169 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
170 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
171 {"power2", PROCESSOR_POWER,
172 MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING,
173 POWERPC_MASKS | MASK_NEW_MNEMONICS},
174 {"powerpc", PROCESSOR_POWERPC,
175 MASK_POWERPC | MASK_NEW_MNEMONICS,
176 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
177 {"rios", PROCESSOR_RIOS1,
178 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
179 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
180 {"rios1", PROCESSOR_RIOS1,
181 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
182 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
183 {"rsc", PROCESSOR_PPC601,
184 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
185 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
186 {"rsc1", PROCESSOR_PPC601,
187 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
188 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
189 {"rios2", PROCESSOR_RIOS2,
190 MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2,
191 POWERPC_MASKS | MASK_NEW_MNEMONICS},
192 {"403", PROCESSOR_PPC403,
193 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
194 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
195 {"505", PROCESSOR_MPCCORE,
196 MASK_POWERPC | MASK_NEW_MNEMONICS,
197 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
198 {"601", PROCESSOR_PPC601,
199 MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING,
200 MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
201 {"602", PROCESSOR_PPC603,
202 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
203 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
204 {"603", PROCESSOR_PPC603,
205 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
206 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
207 {"603e", PROCESSOR_PPC603,
208 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
209 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
210 {"604", PROCESSOR_PPC604,
211 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
212 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
213 {"620", PROCESSOR_PPC620,
214 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
215 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
216 {"821", PROCESSOR_MPCCORE,
217 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
218 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
219 {"860", PROCESSOR_MPCCORE,
220 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
221 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}};
223 int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt);
225 int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */
226 int string = TARGET_STRING; /* save current -mstring/-mno-string status */
228 profile_block_flag = 0;
230 /* Identify the processor type */
231 rs6000_select[0].string = default_cpu;
232 rs6000_cpu = PROCESSOR_DEFAULT;
234 for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++)
236 ptr = &rs6000_select[i];
237 if (ptr->string != (char *)0 && ptr->string[0] != '\0')
239 for (j = 0; j < ptt_size; j++)
240 if (! strcmp (ptr->string, processor_target_table[j].name))
243 rs6000_cpu = processor_target_table[j].processor;
247 target_flags |= processor_target_table[j].target_enable;
248 target_flags &= ~processor_target_table[j].target_disable;
254 error ("bad value (%s) for %s switch", ptr->string, ptr->name);
258 /* If -mmultiple or -mno-multiple was explicitly used, don't
259 override with the processor default */
260 if (TARGET_MULTIPLE_SET)
261 target_flags = (target_flags & ~MASK_MULTIPLE) | multiple;
263 /* If -mstring or -mno-string was explicitly used, don't
264 override with the processor default */
265 if (TARGET_STRING_SET)
266 target_flags = (target_flags & ~MASK_STRING) | string;
268 /* Don't allow -mmultiple or -mstring on little endian systems, because the
269 hardware doesn't support the instructions used in little endian mode */
270 if (!BYTES_BIG_ENDIAN)
274 target_flags &= ~MASK_MULTIPLE;
275 if (TARGET_MULTIPLE_SET)
276 warning ("-mmultiple is not supported on little endian systems");
281 target_flags &= ~MASK_STRING;
282 if (TARGET_STRING_SET)
283 warning ("-mstring is not supported on little endian systems");
287 #ifdef TARGET_REGNAMES
288 /* If the user desires alternate register names, copy in the alternate names
291 bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, sizeof (rs6000_reg_names));
294 #ifdef SUBTARGET_OVERRIDE_OPTIONS
295 SUBTARGET_OVERRIDE_OPTIONS;
299 /* Do anything needed at the start of the asm file. */
302 rs6000_file_start (file, default_cpu)
308 char *start = buffer;
309 struct rs6000_cpu_select *ptr;
311 if (flag_verbose_asm)
313 sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START);
314 rs6000_select[0].string = default_cpu;
316 for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++)
318 ptr = &rs6000_select[i];
319 if (ptr->string != (char *)0 && ptr->string[0] != '\0')
321 fprintf (file, "%s %s%s", start, ptr->name, ptr->string);
327 switch (rs6000_sdata)
329 case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break;
330 case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break;
331 case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break;
332 case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break;
335 if (rs6000_sdata && g_switch_value)
337 fprintf (file, "%s -G %d", start, g_switch_value);
348 /* Create a CONST_DOUBLE from a string. */
351 rs6000_float_const (string, mode)
353 enum machine_mode mode;
355 REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode);
356 return immed_real_const_1 (value, mode);
360 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
361 two parts of the constant if the target is little endian. */
364 rs6000_immed_double_const (i0, i1, mode)
365 HOST_WIDE_INT i0, i1;
366 enum machine_mode mode;
368 if (! WORDS_BIG_ENDIAN)
369 return immed_double_const (i1, i0, mode);
371 return immed_double_const (i0, i1, mode);
375 /* Return non-zero if this function is known to have a null epilogue. */
380 if (reload_completed)
382 rs6000_stack_t *info = rs6000_stack_info ();
384 if (info->first_gp_reg_save == 32
385 && info->first_fp_reg_save == 64
395 /* Returns 1 always. */
398 any_operand (op, mode)
400 enum machine_mode mode;
405 /* Returns 1 if op is the count register */
406 int count_register_operand(op, mode)
408 enum machine_mode mode;
410 if (GET_CODE (op) != REG)
413 if (REGNO (op) == COUNT_REGISTER_REGNUM)
416 if (REGNO (op) > FIRST_PSEUDO_REGISTER)
422 /* Returns 1 if op is memory location for float/int conversions that masquerades
424 int fpmem_operand(op, mode)
426 enum machine_mode mode;
428 if (GET_CODE (op) != REG)
431 if (FPMEM_REGNO_P (REGNO (op)))
435 if (REGNO (op) > FIRST_PSEUDO_REGISTER)
442 /* Return 1 if OP is a constant that can fit in a D field. */
445 short_cint_operand (op, mode)
447 enum machine_mode mode;
449 return (GET_CODE (op) == CONST_INT
450 && (unsigned) (INTVAL (op) + 0x8000) < 0x10000);
453 /* Similar for a unsigned D field. */
456 u_short_cint_operand (op, mode)
458 enum machine_mode mode;
460 return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0);
463 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
466 non_short_cint_operand (op, mode)
468 enum machine_mode mode;
470 return (GET_CODE (op) == CONST_INT
471 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000);
474 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
478 gpc_reg_operand (op, mode)
480 enum machine_mode mode;
482 return (register_operand (op, mode)
483 && (GET_CODE (op) != REG
484 || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op)))
485 || REGNO (op) < 64));
488 /* Returns 1 if OP is either a pseudo-register or a register denoting a
492 cc_reg_operand (op, mode)
494 enum machine_mode mode;
496 return (register_operand (op, mode)
497 && (GET_CODE (op) != REG
498 || REGNO (op) >= FIRST_PSEUDO_REGISTER
499 || CR_REGNO_P (REGNO (op))));
502 /* Returns 1 if OP is either a constant integer valid for a D-field or a
503 non-special register. If a register, it must be in the proper mode unless
507 reg_or_short_operand (op, mode)
509 enum machine_mode mode;
511 return short_cint_operand (op, mode) || gpc_reg_operand (op, mode);
514 /* Similar, except check if the negation of the constant would be valid for
518 reg_or_neg_short_operand (op, mode)
520 enum machine_mode mode;
522 if (GET_CODE (op) == CONST_INT)
523 return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
525 return gpc_reg_operand (op, mode);
528 /* Return 1 if the operand is either a register or an integer whose high-order
532 reg_or_u_short_operand (op, mode)
534 enum machine_mode mode;
536 if (GET_CODE (op) == CONST_INT
537 && (INTVAL (op) & 0xffff0000) == 0)
540 return gpc_reg_operand (op, mode);
543 /* Return 1 is the operand is either a non-special register or ANY
547 reg_or_cint_operand (op, mode)
549 enum machine_mode mode;
551 return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
554 /* Return 1 if the operand is an operand that can be loaded via the GOT */
557 got_operand (op, mode)
559 enum machine_mode mode;
561 return (GET_CODE (op) == SYMBOL_REF
562 || GET_CODE (op) == CONST
563 || GET_CODE (op) == LABEL_REF);
566 /* Return the number of instructions it takes to form a constant in an
570 num_insns_constant_wide (value)
573 /* signed constant loadable with {cal|addi} */
574 if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000)
577 #if HOST_BITS_PER_WIDE_INT == 32
578 /* constant loadable with {cau|addis} */
579 else if ((value & 0xffff) == 0)
583 /* constant loadable with {cau|addis} */
584 else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0)
587 else if (TARGET_64BIT)
589 HOST_WIDE_INT low = value & 0xffffffff;
590 HOST_WIDE_INT high = value >> 32;
592 if (high == 0 && (low & 0x80000000) == 0)
595 else if (high == 0xffffffff && (low & 0x80000000) != 0)
599 return num_insns_constant_wide (high) + 1;
602 return (num_insns_constant_wide (high)
603 + num_insns_constant_wide (low) + 1);
612 num_insns_constant (op, mode)
614 enum machine_mode mode;
616 if (mode != SImode && mode != DImode)
619 if (GET_CODE (op) == CONST_INT)
620 return num_insns_constant_wide (INTVAL (op));
622 else if (GET_CODE (op) == CONST_DOUBLE && TARGET_32BIT)
623 return (num_insns_constant_wide (CONST_DOUBLE_LOW (op))
624 + num_insns_constant_wide (CONST_DOUBLE_HIGH (op)));
626 else if (GET_CODE (op) == CONST_DOUBLE && TARGET_64BIT)
628 HOST_WIDE_INT low = CONST_DOUBLE_LOW (op);
629 HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op);
631 if (high == 0 && (low & 0x80000000) == 0)
632 return num_insns_constant_wide (low);
634 else if (((high & 0xffffffff) == 0xffffffff)
635 && ((low & 0x80000000) != 0))
636 return num_insns_constant_wide (low);
639 return num_insns_constant_wide (high) + 1;
642 return (num_insns_constant_wide (high)
643 + num_insns_constant_wide (low) + 1);
650 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
651 with one instruction per word. We only do this if we can safely read
652 CONST_DOUBLE_{LOW,HIGH}. */
655 easy_fp_constant (op, mode)
657 register enum machine_mode mode;
659 if (GET_CODE (op) != CONST_DOUBLE
660 || GET_MODE (op) != mode
661 || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode))
664 /* Consider all constants with -msoft-float to be easy */
665 if (TARGET_SOFT_FLOAT && mode != DImode)
673 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
674 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
676 return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1
677 && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1);
680 else if (mode == SFmode)
685 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
686 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
688 return num_insns_constant_wide (l) == 1;
691 else if (mode == DImode && TARGET_32BIT)
692 return num_insns_constant (op, DImode) == 2;
698 /* Return 1 if the operand is in volatile memory. Note that during the
699 RTL generation phase, memory_operand does not return TRUE for
700 volatile memory references. So this function allows us to
701 recognize volatile references where its safe. */
704 volatile_mem_operand (op, mode)
706 enum machine_mode mode;
708 if (GET_CODE (op) != MEM)
711 if (!MEM_VOLATILE_P (op))
714 if (mode != GET_MODE (op))
717 if (reload_completed)
718 return memory_operand (op, mode);
720 if (reload_in_progress)
721 return strict_memory_address_p (mode, XEXP (op, 0));
723 return memory_address_p (mode, XEXP (op, 0));
726 /* Return 1 if the operand is an offsettable memory address. */
729 offsettable_addr_operand (op, mode)
731 enum machine_mode mode;
733 return offsettable_address_p (reload_completed | reload_in_progress,
737 /* Return 1 if the operand is either a floating-point register, a pseudo
738 register, or memory. */
741 fp_reg_or_mem_operand (op, mode)
743 enum machine_mode mode;
745 return (memory_operand (op, mode)
746 || volatile_mem_operand (op, mode)
747 || (register_operand (op, mode)
748 && (GET_CODE (op) != REG
749 || REGNO (op) >= FIRST_PSEUDO_REGISTER
750 || FP_REGNO_P (REGNO (op)))));
753 /* Return 1 if the operand is either an easy FP constant (see above) or
757 mem_or_easy_const_operand (op, mode)
759 enum machine_mode mode;
761 return memory_operand (op, mode) || easy_fp_constant (op, mode);
764 /* Return 1 if the operand is either a non-special register or an item
765 that can be used as the operand of an SI add insn. */
768 add_operand (op, mode)
770 enum machine_mode mode;
772 return (reg_or_short_operand (op, mode)
773 || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0));
776 /* Return 1 if OP is a constant but not a valid add_operand. */
779 non_add_cint_operand (op, mode)
781 enum machine_mode mode;
783 return (GET_CODE (op) == CONST_INT
784 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000
785 && (INTVAL (op) & 0xffff) != 0);
788 /* Return 1 if the operand is a non-special register or a constant that
789 can be used as the operand of an OR or XOR insn on the RS/6000. */
792 logical_operand (op, mode)
794 enum machine_mode mode;
796 return (gpc_reg_operand (op, mode)
797 || (GET_CODE (op) == CONST_INT
798 && ((INTVAL (op) & 0xffff0000) == 0
799 || (INTVAL (op) & 0xffff) == 0)));
802 /* Return 1 if C is a constant that is not a logical operand (as
806 non_logical_cint_operand (op, mode)
808 enum machine_mode mode;
810 return (GET_CODE (op) == CONST_INT
811 && (INTVAL (op) & 0xffff0000) != 0
812 && (INTVAL (op) & 0xffff) != 0);
815 /* Return 1 if C is a constant that can be encoded in a mask on the
816 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
817 Reject all ones and all zeros, since these should have been optimized
818 away and confuse the making of MB and ME. */
828 if (c == 0 || c == ~0)
831 last_bit_value = c & 1;
833 for (i = 1; i < 32; i++)
834 if (((c >>= 1) & 1) != last_bit_value)
835 last_bit_value ^= 1, transitions++;
837 return transitions <= 2;
840 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
843 mask_operand (op, mode)
845 enum machine_mode mode;
847 return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
850 /* Return 1 if the operand is either a non-special register or a
851 constant that can be used as the operand of an RS/6000 logical AND insn. */
854 and_operand (op, mode)
856 enum machine_mode mode;
858 return (reg_or_short_operand (op, mode)
859 || logical_operand (op, mode)
860 || mask_operand (op, mode));
863 /* Return 1 if the operand is a constant but not a valid operand for an AND
867 non_and_cint_operand (op, mode)
869 enum machine_mode mode;
871 return GET_CODE (op) == CONST_INT && ! and_operand (op, mode);
874 /* Return 1 if the operand is a general register or memory operand. */
877 reg_or_mem_operand (op, mode)
879 register enum machine_mode mode;
881 return (gpc_reg_operand (op, mode)
882 || memory_operand (op, mode)
883 || volatile_mem_operand (op, mode));
886 /* Return 1 if the operand is a general register or memory operand without
887 pre-inc or pre_dec which produces invalid form of PowerPC lwa
891 lwa_operand (op, mode)
893 register enum machine_mode mode;
897 if (reload_completed && GET_CODE (inner) == SUBREG)
898 inner = SUBREG_REG (inner);
900 return gpc_reg_operand (inner, mode)
901 || (memory_operand (inner, mode)
902 && GET_CODE (XEXP (inner, 0)) != PRE_INC
903 && GET_CODE (XEXP (inner, 0)) != PRE_DEC);
906 /* Return 1 if the operand, used inside a MEM, is a valid first argument
907 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
911 call_operand (op, mode)
913 enum machine_mode mode;
915 if (mode != VOIDmode && GET_MODE (op) != mode)
918 return (GET_CODE (op) == SYMBOL_REF
919 || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER));
923 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
927 current_file_function_operand (op, mode)
929 enum machine_mode mode;
931 return (GET_CODE (op) == SYMBOL_REF
932 && (SYMBOL_REF_FLAG (op)
933 || op == XEXP (DECL_RTL (current_function_decl), 0)));
937 /* Return 1 if this operand is a valid input for a move insn. */
940 input_operand (op, mode)
942 enum machine_mode mode;
944 /* Memory is always valid. */
945 if (memory_operand (op, mode))
948 /* For floating-point, easy constants are valid. */
949 if (GET_MODE_CLASS (mode) == MODE_FLOAT
951 && easy_fp_constant (op, mode))
954 /* Allow any integer constant. */
955 if (GET_MODE_CLASS (mode) == MODE_INT
956 && (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE))
959 /* For floating-point or multi-word mode, the only remaining valid type
961 if (GET_MODE_CLASS (mode) == MODE_FLOAT
962 || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
963 return register_operand (op, mode);
965 /* The only cases left are integral modes one word or smaller (we
966 do not get called for MODE_CC values). These can be in any
968 if (register_operand (op, mode))
971 /* A SYMBOL_REF referring to the TOC is valid. */
972 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op))
975 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
976 directly in the instruction stream */
977 if (DEFAULT_ABI == ABI_NT
978 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF))
981 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
983 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
984 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST)
985 && small_data_operand (op, Pmode))
991 /* Return 1 for an operand in small memory on V.4/eabi */
994 small_data_operand (op, mode)
996 enum machine_mode mode;
999 rtx sym_ref, const_part;
1001 if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA)
1004 if (DEFAULT_ABI != ABI_V4 /* && DEFAULT_ABI != ABI_SOLARIS */)
1007 if (GET_CODE (op) == SYMBOL_REF)
1010 else if (GET_CODE (op) != CONST
1011 || GET_CODE (XEXP (op, 0)) != PLUS
1012 || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF
1013 || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT)
1017 sym_ref = XEXP (XEXP (op, 0), 0);
1019 if (*XSTR (sym_ref, 0) != '@')
1030 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1031 for a call to a function whose data type is FNTYPE.
1032 For a library call, FNTYPE is 0.
1034 For incoming args we set the number of arguments in the prototype large
1035 so we never return a PARALLEL. */
1038 init_cumulative_args (cum, fntype, libname, incoming)
1039 CUMULATIVE_ARGS *cum;
1044 static CUMULATIVE_ARGS zero_cumulative;
1045 enum rs6000_abi abi = DEFAULT_ABI;
1047 *cum = zero_cumulative;
1049 cum->fregno = FP_ARG_MIN_REG;
1050 cum->prototype = (fntype && TYPE_ARG_TYPES (fntype));
1051 cum->call_cookie = CALL_NORMAL;
1055 cum->nargs_prototype = 1000; /* don't return a PARALLEL */
1056 if (abi == ABI_V4 || abi == ABI_SOLARIS)
1057 cum->varargs_offset = RS6000_VARARGS_OFFSET;
1060 else if (cum->prototype)
1061 cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1
1062 + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode
1063 || RETURN_IN_MEMORY (TREE_TYPE (fntype))));
1066 cum->nargs_prototype = 0;
1068 cum->orig_nargs = cum->nargs_prototype;
1070 /* Check for DLL import functions */
1073 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype)))
1074 cum->call_cookie = CALL_NT_DLLIMPORT;
1076 /* Also check for longcall's */
1077 else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype)))
1078 cum->call_cookie = CALL_LONG;
1080 if (TARGET_DEBUG_ARG)
1082 fprintf (stderr, "\ninit_cumulative_args:");
1085 tree ret_type = TREE_TYPE (fntype);
1086 fprintf (stderr, " ret code = %s,",
1087 tree_code_name[ (int)TREE_CODE (ret_type) ]);
1090 if ((abi == ABI_V4 || abi == ABI_SOLARIS) && incoming)
1091 fprintf (stderr, " varargs = %d, ", cum->varargs_offset);
1093 if (cum->call_cookie & CALL_NT_DLLIMPORT)
1094 fprintf (stderr, " dllimport,");
1096 if (cum->call_cookie & CALL_LONG)
1097 fprintf (stderr, " longcall,");
1099 fprintf (stderr, " proto = %d, nargs = %d\n",
1100 cum->prototype, cum->nargs_prototype);
1104 /* If defined, a C expression that gives the alignment boundary, in bits,
1105 of an argument with the specified mode and type. If it is not defined,
1106 PARM_BOUNDARY is used for all arguments.
1108 Windows NT wants anything >= 8 bytes to be double word aligned.
1110 V.4 wants long longs to be double word aligned. */
1113 function_arg_boundary (mode, type)
1114 enum machine_mode mode;
1117 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && mode == DImode)
1120 if (DEFAULT_ABI != ABI_NT || TARGET_64BIT)
1121 return PARM_BOUNDARY;
1123 if (mode != BLKmode)
1124 return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32;
1126 return (int_size_in_bytes (type) >= 8) ? 64 : 32;
1129 /* Update the data in CUM to advance over an argument
1130 of mode MODE and data type TYPE.
1131 (TYPE is null for libcalls where that information may not be available.) */
1134 function_arg_advance (cum, mode, type, named)
1135 CUMULATIVE_ARGS *cum;
1136 enum machine_mode mode;
1140 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1141 cum->words += align;
1142 cum->nargs_prototype--;
1144 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1146 /* Long longs must not be split between registers and stack */
1147 if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT)
1148 && type && !AGGREGATE_TYPE_P (type)
1149 && cum->words < GP_ARG_NUM_REG
1150 && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
1152 cum->words = GP_ARG_NUM_REG;
1155 /* Aggregates get passed as pointers */
1156 if (type && AGGREGATE_TYPE_P (type))
1159 /* Floats go in registers, & don't occupy space in the GP registers
1160 like they do for AIX unless software floating point. */
1161 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1162 && TARGET_HARD_FLOAT
1163 && cum->fregno <= FP_ARG_V4_MAX_REG)
1167 cum->words += RS6000_ARG_SIZE (mode, type, 1);
1172 cum->words += RS6000_ARG_SIZE (mode, type, named);
1173 if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT)
1177 if (TARGET_DEBUG_ARG)
1179 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1180 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
1183 /* Determine where to put an argument to a function.
1184 Value is zero to push the argument on the stack,
1185 or a hard register in which to store the argument.
1187 MODE is the argument's machine mode.
1188 TYPE is the data type of the argument (as a tree).
1189 This is null for libcalls where that information may
1191 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1192 the preceding args and about the function being called.
1193 NAMED is nonzero if this argument is a named parameter
1194 (otherwise it is an extra parameter matching an ellipsis).
1196 On RS/6000 the first eight words of non-FP are normally in registers
1197 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1198 Under V.4, the first 8 FP args are in registers.
1200 If this is floating-point and no prototype is specified, we use
1201 both an FP and integer register (or possibly FP reg and stack). Library
1202 functions (when TYPE is zero) always have the proper types for args,
1203 so we can pass the FP value just in one register. emit_library_function
1204 doesn't support PARALLEL anyway. */
1207 function_arg (cum, mode, type, named)
1208 CUMULATIVE_ARGS *cum;
1209 enum machine_mode mode;
1213 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1214 int align_words = cum->words + align;
1216 if (TARGET_DEBUG_ARG)
1218 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1219 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
1221 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1222 uses to say fp args were passed in registers. Assume that we don't need the
1223 marker for software floating point, or compiler generated library calls. */
1224 if (mode == VOIDmode)
1226 enum rs6000_abi abi = DEFAULT_ABI;
1228 if ((abi == ABI_V4 || abi == ABI_SOLARIS)
1229 && TARGET_HARD_FLOAT
1230 && cum->nargs_prototype < 0
1231 && type && (cum->prototype || TARGET_NO_PROTOTYPE))
1233 return GEN_INT (cum->call_cookie
1234 | ((cum->fregno == FP_ARG_MIN_REG)
1235 ? CALL_V4_SET_FP_ARGS
1236 : CALL_V4_CLEAR_FP_ARGS));
1239 return GEN_INT (cum->call_cookie);
1244 if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
1248 if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
1251 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1253 if ((cum->nargs_prototype > 0)
1254 || DEFAULT_ABI == ABI_V4 /* V.4 never passes FP values in GP registers */
1255 || DEFAULT_ABI == ABI_SOLARIS
1257 return gen_rtx (REG, mode, cum->fregno);
1259 return gen_rtx (PARALLEL, mode,
1262 gen_rtx (EXPR_LIST, VOIDmode,
1263 ((align_words >= GP_ARG_NUM_REG)
1266 + RS6000_ARG_SIZE (mode, type, named)
1268 /* If this is partially on the stack, then
1269 we only include the portion actually
1270 in registers here. */
1271 ? gen_rtx (REG, SImode,
1272 GP_ARG_MIN_REG + align_words)
1273 : gen_rtx (REG, mode,
1274 GP_ARG_MIN_REG + align_words))),
1276 gen_rtx (EXPR_LIST, VOIDmode,
1277 gen_rtx (REG, mode, cum->fregno),
1281 /* Long longs won't be split between register and stack */
1282 else if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) &&
1283 align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
1288 else if (align_words < GP_ARG_NUM_REG)
1289 return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words);
1294 /* For an arg passed partly in registers and partly in memory,
1295 this is the number of registers used.
1296 For args passed entirely in registers or entirely in memory, zero. */
1299 function_arg_partial_nregs (cum, mode, type, named)
1300 CUMULATIVE_ARGS *cum;
1301 enum machine_mode mode;
1308 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1311 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1313 if (cum->nargs_prototype >= 0)
1317 if (cum->words < GP_ARG_NUM_REG
1318 && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named)))
1320 int ret = GP_ARG_NUM_REG - cum->words;
1321 if (ret && TARGET_DEBUG_ARG)
1322 fprintf (stderr, "function_arg_partial_nregs: %d\n", ret);
1330 /* A C expression that indicates when an argument must be passed by
1331 reference. If nonzero for an argument, a copy of that argument is
1332 made in memory and a pointer to the argument is passed instead of
1333 the argument itself. The pointer is passed in whatever way is
1334 appropriate for passing a pointer to that type.
1336 Under V.4, structures and unions are passed by reference. */
1339 function_arg_pass_by_reference (cum, mode, type, named)
1340 CUMULATIVE_ARGS *cum;
1341 enum machine_mode mode;
1345 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1346 && type && AGGREGATE_TYPE_P (type))
1348 if (TARGET_DEBUG_ARG)
1349 fprintf (stderr, "function_arg_pass_by_reference: aggregate\n");
1358 /* Perform any needed actions needed for a function that is receiving a
1359 variable number of arguments.
1363 MODE and TYPE are the mode and type of the current parameter.
1365 PRETEND_SIZE is a variable that should be set to the amount of stack
1366 that must be pushed by the prolog to pretend that our caller pushed
1369 Normally, this macro will push all remaining incoming registers on the
1370 stack and set PRETEND_SIZE to the length of the registers pushed. */
1373 setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
1374 CUMULATIVE_ARGS *cum;
1375 enum machine_mode mode;
1381 rtx save_area = virtual_incoming_args_rtx;
1382 int reg_size = (TARGET_64BIT) ? 8 : 4;
1384 if (TARGET_DEBUG_ARG)
1386 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1387 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl);
1389 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && !no_rtl)
1391 rs6000_sysv_varargs_p = 1;
1392 save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET);
1397 int first_reg_offset = cum->words;
1399 if (MUST_PASS_IN_STACK (mode, type))
1400 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1);
1402 if (first_reg_offset > GP_ARG_NUM_REG)
1403 first_reg_offset = GP_ARG_NUM_REG;
1405 if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG)
1407 (GP_ARG_MIN_REG + first_reg_offset,
1408 gen_rtx (MEM, BLKmode,
1409 plus_constant (save_area, first_reg_offset * reg_size)),
1410 GP_ARG_NUM_REG - first_reg_offset,
1411 (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD);
1413 *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD;
1416 /* Save FP registers if needed. */
1417 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && TARGET_HARD_FLOAT && !no_rtl)
1419 int fregno = cum->fregno;
1420 int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno;
1422 if (num_fp_reg >= 0)
1424 rtx cr1 = gen_rtx (REG, CCmode, 69);
1425 rtx lab = gen_label_rtx ();
1426 int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8);
1428 emit_jump_insn (gen_rtx (SET, VOIDmode,
1430 gen_rtx (IF_THEN_ELSE, VOIDmode,
1431 gen_rtx (NE, VOIDmode, cr1, const0_rtx),
1432 gen_rtx (LABEL_REF, VOIDmode, lab),
1435 while ( num_fp_reg-- >= 0)
1437 emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)),
1438 gen_rtx (REG, DFmode, fregno++));
1447 /* If defined, is a C expression that produces the machine-specific
1448 code for a call to `__builtin_saveregs'. This code will be moved
1449 to the very beginning of the function, before any parameter access
1450 are made. The return value of this function should be an RTX that
1451 contains the value to use as the return of `__builtin_saveregs'.
1453 The argument ARGS is a `tree_list' containing the arguments that
1454 were passed to `__builtin_saveregs'.
1456 If this macro is not defined, the compiler will output an ordinary
1457 call to the library function `__builtin_saveregs'.
1459 On the Power/PowerPC return the address of the area on the stack
1460 used to hold arguments. Under AIX, this includes the 8 word register
1461 save area. Under V.4 this does not. */
1464 expand_builtin_saveregs (args)
1467 return virtual_incoming_args_rtx;
1471 /* Generate a memory reference for expand_block_move, copying volatile,
1472 and other bits from an original memory reference. */
1475 expand_block_move_mem (mode, addr, orig_mem)
1476 enum machine_mode mode;
1480 rtx mem = gen_rtx (MEM, mode, addr);
1482 RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem);
1483 MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem);
1484 MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem);
1485 #ifdef MEM_UNALIGNED_P
1486 MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem);
1491 /* Expand a block move operation, and return 1 if successful. Return 0
1492 if we should let the compiler generate normal code.
1494 operands[0] is the destination
1495 operands[1] is the source
1496 operands[2] is the length
1497 operands[3] is the alignment */
1499 #define MAX_MOVE_REG 4
1502 expand_block_move (operands)
1505 rtx orig_dest = operands[0];
1506 rtx orig_src = operands[1];
1507 rtx bytes_rtx = operands[2];
1508 rtx align_rtx = operands[3];
1509 int constp = (GET_CODE (bytes_rtx) == CONST_INT);
1510 int align = XINT (align_rtx, 0);
1520 rtx stores[MAX_MOVE_REG];
1523 /* If this is not a fixed size move, just call memcpy */
1527 /* Anything to move? */
1528 bytes = INTVAL (bytes_rtx);
1532 /* Don't support real large moves. If string instructions are not used,
1533 then don't generate more than 8 loads. */
1539 else if (!STRICT_ALIGNMENT)
1544 else if (bytes > 8*align)
1547 /* Move the address into scratch registers. */
1548 dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0));
1549 src_reg = copy_addr_to_reg (XEXP (orig_src, 0));
1551 if (TARGET_STRING) /* string instructions are available */
1553 for ( ; bytes > 0; bytes -= move_bytes)
1555 if (bytes > 24 /* move up to 32 bytes at a time */
1565 move_bytes = (bytes > 32) ? 32 : bytes;
1566 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1567 expand_block_move_mem (BLKmode, src_reg, orig_src),
1568 GEN_INT ((move_bytes == 32) ? 0 : move_bytes),
1571 else if (bytes > 16 /* move up to 24 bytes at a time */
1579 move_bytes = (bytes > 24) ? 24 : bytes;
1580 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1581 expand_block_move_mem (BLKmode, src_reg, orig_src),
1582 GEN_INT (move_bytes),
1585 else if (bytes > 8 /* move up to 16 bytes at a time */
1591 move_bytes = (bytes > 16) ? 16 : bytes;
1592 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1593 expand_block_move_mem (BLKmode, src_reg, orig_src),
1594 GEN_INT (move_bytes),
1597 else if (bytes > 4 && !TARGET_64BIT)
1598 { /* move up to 8 bytes at a time */
1599 move_bytes = (bytes > 8) ? 8 : bytes;
1600 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1601 expand_block_move_mem (BLKmode, src_reg, orig_src),
1602 GEN_INT (move_bytes),
1605 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1606 { /* move 4 bytes */
1608 tmp_reg = gen_reg_rtx (SImode);
1609 emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src));
1610 emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg);
1612 else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT))
1613 { /* move 2 bytes */
1615 tmp_reg = gen_reg_rtx (HImode);
1616 emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src));
1617 emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg);
1619 else if (bytes == 1) /* move 1 byte */
1622 tmp_reg = gen_reg_rtx (QImode);
1623 emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src));
1624 emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg);
1627 { /* move up to 4 bytes at a time */
1628 move_bytes = (bytes > 4) ? 4 : bytes;
1629 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1630 expand_block_move_mem (BLKmode, src_reg, orig_src),
1631 GEN_INT (move_bytes),
1635 if (bytes > move_bytes)
1637 emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes)));
1638 emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes)));
1643 else /* string instructions not available */
1645 num_reg = offset = 0;
1646 for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes))
1648 /* Calculate the correct offset for src/dest */
1652 dest_addr = dest_reg;
1656 src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset));
1657 dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset));
1660 /* Generate the appropriate load and store, saving the stores for later */
1661 if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT))
1664 tmp_reg = gen_reg_rtx (DImode);
1665 emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src)));
1666 stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg);
1668 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1671 tmp_reg = gen_reg_rtx (SImode);
1672 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src)));
1673 stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg);
1675 else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT))
1678 tmp_reg = gen_reg_rtx (HImode);
1679 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src)));
1680 stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg);
1685 tmp_reg = gen_reg_rtx (QImode);
1686 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src)));
1687 stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg);
1690 if (num_reg >= MAX_MOVE_REG)
1692 for (i = 0; i < num_reg; i++)
1693 emit_insn (stores[i]);
1698 for (i = 0; i < num_reg; i++)
1699 emit_insn (stores[i]);
1706 /* Return 1 if OP is a load multiple operation. It is known to be a
1707 PARALLEL and the first section will be tested. */
1710 load_multiple_operation (op, mode)
1712 enum machine_mode mode;
1714 int count = XVECLEN (op, 0);
1719 /* Perform a quick check so we don't blow up below. */
1721 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1722 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1723 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1726 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1727 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1729 for (i = 1; i < count; i++)
1731 rtx elt = XVECEXP (op, 0, i);
1733 if (GET_CODE (elt) != SET
1734 || GET_CODE (SET_DEST (elt)) != REG
1735 || GET_MODE (SET_DEST (elt)) != SImode
1736 || REGNO (SET_DEST (elt)) != dest_regno + i
1737 || GET_CODE (SET_SRC (elt)) != MEM
1738 || GET_MODE (SET_SRC (elt)) != SImode
1739 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1740 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1741 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1742 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
1749 /* Similar, but tests for store multiple. Here, the second vector element
1750 is a CLOBBER. It will be tested later. */
1753 store_multiple_operation (op, mode)
1755 enum machine_mode mode;
1757 int count = XVECLEN (op, 0) - 1;
1762 /* Perform a quick check so we don't blow up below. */
1764 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1765 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1766 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1769 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1770 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1772 for (i = 1; i < count; i++)
1774 rtx elt = XVECEXP (op, 0, i + 1);
1776 if (GET_CODE (elt) != SET
1777 || GET_CODE (SET_SRC (elt)) != REG
1778 || GET_MODE (SET_SRC (elt)) != SImode
1779 || REGNO (SET_SRC (elt)) != src_regno + i
1780 || GET_CODE (SET_DEST (elt)) != MEM
1781 || GET_MODE (SET_DEST (elt)) != SImode
1782 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1783 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1784 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1785 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
1792 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1793 We only check the opcode against the mode of the CC value here. */
1796 branch_comparison_operator (op, mode)
1798 enum machine_mode mode;
1800 enum rtx_code code = GET_CODE (op);
1801 enum machine_mode cc_mode;
1803 if (GET_RTX_CLASS (code) != '<')
1806 cc_mode = GET_MODE (XEXP (op, 0));
1807 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1810 if ((code == GT || code == LT || code == GE || code == LE)
1811 && cc_mode == CCUNSmode)
1814 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1815 && (cc_mode != CCUNSmode))
1821 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1822 We check the opcode against the mode of the CC value and disallow EQ or
1823 NE comparisons for integers. */
1826 scc_comparison_operator (op, mode)
1828 enum machine_mode mode;
1830 enum rtx_code code = GET_CODE (op);
1831 enum machine_mode cc_mode;
1833 if (GET_MODE (op) != mode && mode != VOIDmode)
1836 if (GET_RTX_CLASS (code) != '<')
1839 cc_mode = GET_MODE (XEXP (op, 0));
1840 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1843 if (code == NE && cc_mode != CCFPmode)
1846 if ((code == GT || code == LT || code == GE || code == LE)
1847 && cc_mode == CCUNSmode)
1850 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1851 && (cc_mode != CCUNSmode))
1854 if (cc_mode == CCEQmode && code != EQ && code != NE)
1860 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1861 mask required to convert the result of a rotate insn into a shift
1862 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1865 includes_lshift_p (shiftop, andop)
1866 register rtx shiftop;
1869 int shift_mask = (~0 << INTVAL (shiftop));
1871 return (INTVAL (andop) & ~shift_mask) == 0;
1874 /* Similar, but for right shift. */
1877 includes_rshift_p (shiftop, andop)
1878 register rtx shiftop;
1881 unsigned shift_mask = ~(unsigned)0;
1883 shift_mask >>= INTVAL (shiftop);
1885 return (INTVAL (andop) & ~ shift_mask) == 0;
1888 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1889 for lfq and stfq insns.
1891 Note reg1 and reg2 *must* be hard registers. To be sure we will
1892 abort if we are passed pseudo registers. */
1895 registers_ok_for_quad_peep (reg1, reg2)
1898 /* We might have been passed a SUBREG. */
1899 if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG)
1902 return (REGNO (reg1) == REGNO (reg2) - 1);
1905 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1906 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1909 addrs_ok_for_quad_peep (addr1, addr2)
1916 /* Extract an offset (if used) from the first addr. */
1917 if (GET_CODE (addr1) == PLUS)
1919 /* If not a REG, return zero. */
1920 if (GET_CODE (XEXP (addr1, 0)) != REG)
1924 reg1 = REGNO (XEXP (addr1, 0));
1925 /* The offset must be constant! */
1926 if (GET_CODE (XEXP (addr1, 1)) != CONST_INT)
1928 offset1 = INTVAL (XEXP (addr1, 1));
1931 else if (GET_CODE (addr1) != REG)
1935 reg1 = REGNO (addr1);
1936 /* This was a simple (mem (reg)) expression. Offset is 0. */
1940 /* Make sure the second address is a (mem (plus (reg) (const_int). */
1941 if (GET_CODE (addr2) != PLUS)
1944 if (GET_CODE (XEXP (addr2, 0)) != REG
1945 || GET_CODE (XEXP (addr2, 1)) != CONST_INT)
1948 if (reg1 != REGNO (XEXP (addr2, 0)))
1951 /* The offset for the second addr must be 8 more than the first addr. */
1952 if (INTVAL (XEXP (addr2, 1)) != offset1 + 8)
1955 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
1960 /* Return the register class of a scratch register needed to copy IN into
1961 or out of a register in CLASS in MODE. If it can be done directly,
1962 NO_REGS is returned. */
1965 secondary_reload_class (class, mode, in)
1966 enum reg_class class;
1967 enum machine_mode mode;
1970 int regno = true_regnum (in);
1972 if (regno >= FIRST_PSEUDO_REGISTER)
1975 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
1977 if (class == GENERAL_REGS || class == BASE_REGS
1978 || (regno >= 0 && INT_REGNO_P (regno)))
1981 /* Constants, memory, and FP registers can go into FP registers. */
1982 if ((regno == -1 || FP_REGNO_P (regno))
1983 && (class == FLOAT_REGS || class == NON_SPECIAL_REGS))
1986 /* We can copy among the CR registers. */
1987 if ((class == CR_REGS || class == CR0_REGS)
1988 && regno >= 0 && CR_REGNO_P (regno))
1991 /* Otherwise, we need GENERAL_REGS. */
1992 return GENERAL_REGS;
1995 /* Given a comparison operation, return the bit number in CCR to test. We
1996 know this is a valid comparison.
1998 SCC_P is 1 if this is for an scc. That means that %D will have been
1999 used instead of %C, so the bits will be in different places.
2001 Return -1 if OP isn't a valid comparison for some reason. */
2008 enum rtx_code code = GET_CODE (op);
2009 enum machine_mode cc_mode;
2013 if (GET_RTX_CLASS (code) != '<')
2016 cc_mode = GET_MODE (XEXP (op, 0));
2017 cc_regnum = REGNO (XEXP (op, 0));
2018 base_bit = 4 * (cc_regnum - 68);
2020 /* In CCEQmode cases we have made sure that the result is always in the
2021 third bit of the CR field. */
2023 if (cc_mode == CCEQmode)
2024 return base_bit + 3;
2029 return scc_p ? base_bit + 3 : base_bit + 2;
2031 return base_bit + 2;
2033 return base_bit + 1;
2038 /* If floating-point, we will have done a cror to put the bit in the
2039 unordered position. So test that bit. For integer, this is ! LT
2040 unless this is an scc insn. */
2041 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit;
2044 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1;
2051 /* Print an operand. Recognize special options, documented below. */
2054 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
2056 #define SMALL_DATA_RELOC "sda21"
2060 print_operand (file, x, code)
2068 /* These macros test for integers and extract the low-order bits. */
2070 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
2071 && GET_MODE (X) == VOIDmode)
2073 #define INT_LOWPART(X) \
2074 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
2079 /* Write out an instruction after the call which may be replaced
2080 with glue code by the loader. This depends on the AIX version. */
2081 asm_fprintf (file, RS6000_CALL_GLUE);
2085 /* Write the register number of the TOC register. */
2086 fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file);
2090 /* Write out either a '.' or '$' for the current location, depending
2091 on whether this is Solaris or not. */
2092 putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file);
2096 /* If X is a constant integer whose low-order 5 bits are zero,
2097 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
2098 in the AIX assembler where "sri" with a zero shift count
2099 write a trash instruction. */
2100 if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0)
2107 /* Low-order 16 bits of constant, unsigned. */
2109 output_operand_lossage ("invalid %%b value");
2111 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
2115 /* This is an optional cror needed for LE or GE floating-point
2116 comparisons. Otherwise write nothing. */
2117 if ((GET_CODE (x) == LE || GET_CODE (x) == GE)
2118 && GET_MODE (XEXP (x, 0)) == CCFPmode)
2120 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2122 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
2123 base_bit + 2, base_bit + (GET_CODE (x) == GE));
2128 /* Similar, except that this is for an scc, so we must be able to
2129 encode the test in a single bit that is one. We do the above
2130 for any LE, GE, GEU, or LEU and invert the bit for NE. */
2131 if (GET_CODE (x) == LE || GET_CODE (x) == GE
2132 || GET_CODE (x) == LEU || GET_CODE (x) == GEU)
2134 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2136 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
2138 base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU));
2141 else if (GET_CODE (x) == NE)
2143 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2145 fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3,
2146 base_bit + 2, base_bit + 2);
2151 /* X is a CR register. Print the number of the third bit of the CR */
2152 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2153 output_operand_lossage ("invalid %%E value");
2155 fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3);
2159 /* X is a CR register. Print the shift count needed to move it
2160 to the high-order four bits. */
2161 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2162 output_operand_lossage ("invalid %%f value");
2164 fprintf (file, "%d", 4 * (REGNO (x) - 68));
2168 /* Similar, but print the count for the rotate in the opposite
2170 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2171 output_operand_lossage ("invalid %%F value");
2173 fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68));
2177 /* X is a constant integer. If it is negative, print "m",
2178 otherwise print "z". This is to make a aze or ame insn. */
2179 if (GET_CODE (x) != CONST_INT)
2180 output_operand_lossage ("invalid %%G value");
2181 else if (INTVAL (x) >= 0)
2188 /* If constant, output low-order five bits. Otherwise,
2191 fprintf (file, "%d", INT_LOWPART (x) & 31);
2193 print_operand (file, x, 0);
2197 /* If constant, output low-order six bits. Otherwise,
2200 fprintf (file, "%d", INT_LOWPART (x) & 63);
2202 print_operand (file, x, 0);
2206 /* Print `i' if this is a constant, else nothing. */
2212 /* Write the bit number in CCR for jump. */
2215 output_operand_lossage ("invalid %%j code");
2217 fprintf (file, "%d", i);
2221 /* Similar, but add one for shift count in rlinm for scc and pass
2222 scc flag to `ccr_bit'. */
2225 output_operand_lossage ("invalid %%J code");
2227 /* If we want bit 31, write a shift count of zero, not 32. */
2228 fprintf (file, "%d", i == 31 ? 0 : i + 1);
2232 /* X must be a constant. Write the 1's complement of the
2235 output_operand_lossage ("invalid %%k value");
2237 fprintf (file, "%d", ~ INT_LOWPART (x));
2241 /* Write second word of DImode or DFmode reference. Works on register
2242 or non-indexed memory only. */
2243 if (GET_CODE (x) == REG)
2244 fprintf (file, "%s", reg_names[REGNO (x) + 1]);
2245 else if (GET_CODE (x) == MEM)
2247 /* Handle possible auto-increment. Since it is pre-increment and
2248 we have already done it, we can just use an offset of four. */
2249 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2250 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2251 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4));
2253 output_address (plus_constant (XEXP (x, 0), 4));
2254 if (small_data_operand (x, GET_MODE (x)))
2255 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]);
2260 /* MB value for a mask operand. */
2261 if (! mask_operand (x, VOIDmode))
2262 output_operand_lossage ("invalid %%m value");
2264 val = INT_LOWPART (x);
2266 /* If the high bit is set and the low bit is not, the value is zero.
2267 If the high bit is zero, the value is the first 1 bit we find from
2269 if (val < 0 && (val & 1) == 0)
2276 for (i = 1; i < 32; i++)
2277 if ((val <<= 1) < 0)
2279 fprintf (file, "%d", i);
2283 /* Otherwise, look for the first 0 bit from the right. The result is its
2284 number plus 1. We know the low-order bit is one. */
2285 for (i = 0; i < 32; i++)
2286 if (((val >>= 1) & 1) == 0)
2289 /* If we ended in ...01, I would be 0. The correct value is 31, so
2291 fprintf (file, "%d", 31 - i);
2295 /* ME value for a mask operand. */
2296 if (! mask_operand (x, VOIDmode))
2297 output_operand_lossage ("invalid %%m value");
2299 val = INT_LOWPART (x);
2301 /* If the low bit is set and the high bit is not, the value is 31.
2302 If the low bit is zero, the value is the first 1 bit we find from
2304 if ((val & 1) && val >= 0)
2309 else if ((val & 1) == 0)
2311 for (i = 0; i < 32; i++)
2312 if ((val >>= 1) & 1)
2315 /* If we had ....10, I would be 0. The result should be
2316 30, so we need 30 - i. */
2317 fprintf (file, "%d", 30 - i);
2321 /* Otherwise, look for the first 0 bit from the left. The result is its
2322 number minus 1. We know the high-order bit is one. */
2323 for (i = 0; i < 32; i++)
2324 if ((val <<= 1) >= 0)
2327 fprintf (file, "%d", i);
2331 /* Write the number of elements in the vector times 4. */
2332 if (GET_CODE (x) != PARALLEL)
2333 output_operand_lossage ("invalid %%N value");
2335 fprintf (file, "%d", XVECLEN (x, 0) * 4);
2339 /* Similar, but subtract 1 first. */
2340 if (GET_CODE (x) != PARALLEL)
2341 output_operand_lossage ("invalid %%N value");
2343 fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4);
2347 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2349 || (i = exact_log2 (INT_LOWPART (x))) < 0)
2350 output_operand_lossage ("invalid %%p value");
2352 fprintf (file, "%d", i);
2356 /* The operand must be an indirect memory reference. The result
2357 is the register number. */
2358 if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
2359 || REGNO (XEXP (x, 0)) >= 32)
2360 output_operand_lossage ("invalid %%P value");
2362 fprintf (file, "%d", REGNO (XEXP (x, 0)));
2366 /* X is a CR register. Print the mask for `mtcrf'. */
2367 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2368 output_operand_lossage ("invalid %%R value");
2370 fprintf (file, "%d", 128 >> (REGNO (x) - 68));
2374 /* Low 5 bits of 32 - value */
2376 output_operand_lossage ("invalid %%s value");
2378 fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31);
2382 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2383 All floating-point operations except NE branch true and integer
2384 EQ, LT, GT, LTU and GTU also branch true. */
2385 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2386 output_operand_lossage ("invalid %%t value");
2388 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2389 && GET_CODE (x) != NE)
2390 || GET_CODE (x) == EQ
2391 || GET_CODE (x) == LT || GET_CODE (x) == GT
2392 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2399 /* Opposite of 't': write 4 if this jump operation will branch if true,
2401 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2402 output_operand_lossage ("invalid %%t value");
2404 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2405 && GET_CODE (x) != NE)
2406 || GET_CODE (x) == EQ
2407 || GET_CODE (x) == LT || GET_CODE (x) == GT
2408 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2415 /* High-order 16 bits of constant for use in unsigned operand. */
2417 output_operand_lossage ("invalid %%u value");
2419 fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff);
2423 /* High-order 16 bits of constant for use in signed operand. */
2425 output_operand_lossage ("invalid %%v value");
2428 int value = (INT_LOWPART (x) >> 16) & 0xffff;
2430 /* Solaris assembler doesn't like lis 0,0x80000 */
2431 if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0)
2432 fprintf (file, "%d", value | (~0 << 16));
2434 fprintf (file, "0x%x", value);
2439 /* Print `u' if this has an auto-increment or auto-decrement. */
2440 if (GET_CODE (x) == MEM
2441 && (GET_CODE (XEXP (x, 0)) == PRE_INC
2442 || GET_CODE (XEXP (x, 0)) == PRE_DEC))
2447 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2450 fprintf (file, "%d",
2451 (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000));
2453 print_operand (file, x, 0);
2457 /* If constant, low-order 16 bits of constant, unsigned.
2458 Otherwise, write normally. */
2460 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
2462 print_operand (file, x, 0);
2466 if (GET_CODE (x) == MEM
2467 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0)))
2472 /* Like 'L', for third word of TImode */
2473 if (GET_CODE (x) == REG)
2474 fprintf (file, "%s", reg_names[REGNO (x) + 2]);
2475 else if (GET_CODE (x) == MEM)
2477 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2478 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2479 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8));
2481 output_address (plus_constant (XEXP (x, 0), 8));
2482 if (small_data_operand (x, GET_MODE (x)))
2483 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]);
2488 /* X is a SYMBOL_REF. Write out the name preceded by a
2489 period and without any trailing data in brackets. Used for function
2490 names. If we are configured for System V (or the embedded ABI) on
2491 the PowerPC, do not emit the period, since those systems do not use
2492 TOCs and the like. */
2493 if (GET_CODE (x) != SYMBOL_REF)
2496 if (XSTR (x, 0)[0] != '.')
2498 switch (DEFAULT_ABI)
2508 case ABI_AIX_NODESC:
2517 RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
2521 /* Like 'L', for last word of TImode. */
2522 if (GET_CODE (x) == REG)
2523 fprintf (file, "%s", reg_names[REGNO (x) + 3]);
2524 else if (GET_CODE (x) == MEM)
2526 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2527 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2528 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12));
2530 output_address (plus_constant (XEXP (x, 0), 12));
2531 if (small_data_operand (x, GET_MODE (x)))
2532 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]);
2537 if (GET_CODE (x) == REG)
2538 fprintf (file, "%s", reg_names[REGNO (x)]);
2539 else if (GET_CODE (x) == MEM)
2541 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2542 know the width from the mode. */
2543 if (GET_CODE (XEXP (x, 0)) == PRE_INC)
2544 fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)),
2545 REGNO (XEXP (XEXP (x, 0), 0)));
2546 else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
2547 fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)),
2548 REGNO (XEXP (XEXP (x, 0), 0)));
2550 output_address (XEXP (x, 0));
2553 output_addr_const (file, x);
2557 output_operand_lossage ("invalid %%xn code");
2561 /* Print the address of an operand. */
2564 print_operand_address (file, x)
2568 if (GET_CODE (x) == REG)
2569 fprintf (file, "0(%s)", reg_names[ REGNO (x) ]);
2570 else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST)
2572 output_addr_const (file, x);
2573 if (small_data_operand (x, GET_MODE (x)))
2574 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]);
2576 #ifdef TARGET_NO_TOC
2577 else if (TARGET_NO_TOC)
2581 fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]);
2583 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
2585 if (REGNO (XEXP (x, 0)) == 0)
2586 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ],
2587 reg_names[ REGNO (XEXP (x, 0)) ]);
2589 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ],
2590 reg_names[ REGNO (XEXP (x, 1)) ]);
2592 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
2593 fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]);
2594 else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM
2595 && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1)))
2597 output_addr_const (file, XEXP (x, 1));
2598 fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]);
2604 /* This page contains routines that are used to determine what the function
2605 prologue and epilogue code will do and write them out. */
2607 /* Return the first fixed-point register that is required to be saved. 32 if
2611 first_reg_to_save ()
2615 /* Find lowest numbered live register. */
2616 for (first_reg = 13; first_reg <= 31; first_reg++)
2617 if (regs_ever_live[first_reg])
2620 /* If profiling, then we must save/restore every register that contains
2621 a parameter before/after the .mcount call. Use registers from 30 down
2622 to 23 to do this. Don't use the frame pointer in reg 31.
2624 For now, save enough room for all of the parameter registers. */
2625 if (DEFAULT_ABI == ABI_AIX && profile_flag)
2632 /* Similar, for FP regs. */
2635 first_fp_reg_to_save ()
2639 /* Find lowest numbered live register. */
2640 for (first_reg = 14 + 32; first_reg <= 63; first_reg++)
2641 if (regs_ever_live[first_reg])
2647 /* Return non-zero if this function makes calls. */
2650 rs6000_makes_calls ()
2654 /* If we are profiling, we will be making a call to mcount. */
2658 for (insn = get_insns (); insn; insn = next_insn (insn))
2659 if (GET_CODE (insn) == CALL_INSN)
2666 /* Calculate the stack information for the current function. This is
2667 complicated by having two separate calling sequences, the AIX calling
2668 sequence and the V.4 calling sequence.
2670 AIX stack frames look like:
2672 SP----> +---------------------------------------+
2673 | back chain to caller | 0
2674 +---------------------------------------+
2676 +---------------------------------------+
2678 +---------------------------------------+
2679 | reserved for compilers | 12
2680 +---------------------------------------+
2681 | reserved for binders | 16
2682 +---------------------------------------+
2683 | saved TOC pointer | 20
2684 +---------------------------------------+
2685 | Parameter save area (P) | 24
2686 +---------------------------------------+
2687 | Float/int conversion temporary (X) | 24+P
2688 +---------------------------------------+
2689 | Alloca space (A) | 24+P+X
2690 +---------------------------------------+
2691 | Local variable space (L) | 24+P+X+A
2692 +---------------------------------------+
2693 | Save area for GP registers (G) | 24+P+X+A+L
2694 +---------------------------------------+
2695 | Save area for FP registers (F) | 24+P+X+A+L+G
2696 +---------------------------------------+
2697 old SP->| back chain to caller's caller |
2698 +---------------------------------------+
2700 V.4 stack frames look like:
2702 SP----> +---------------------------------------+
2703 | back chain to caller | 0
2704 +---------------------------------------+
2705 | caller's saved LR | 4
2706 +---------------------------------------+
2707 | Parameter save area (P) | 8
2708 +---------------------------------------+
2709 | Float/int conversion temporary (X) | 8+P
2710 +---------------------------------------+
2711 | Alloca space (A) | 8+P+X
2712 +---------------------------------------+
2713 | Varargs save area (V) | 8+P+X+A
2714 +---------------------------------------+
2715 | Local variable space (L) | 8+P+X+A+V
2716 +---------------------------------------+
2717 | saved CR (C) | 8+P+X+A+V+L
2718 +---------------------------------------+
2719 | Save area for GP registers (G) | 8+P+X+A+V+L+C
2720 +---------------------------------------+
2721 | Save area for FP registers (F) | 8+P+X+A+V+L+C+G
2722 +---------------------------------------+
2723 old SP->| back chain to caller's caller |
2724 +---------------------------------------+
2727 A PowerPC Windows/NT frame looks like:
2729 SP----> +---------------------------------------+
2730 | back chain to caller | 0
2731 +---------------------------------------+
2733 +---------------------------------------+
2735 +---------------------------------------+
2737 +---------------------------------------+
2739 +---------------------------------------+
2741 +---------------------------------------+
2742 | Parameter save area (P) | 24
2743 +---------------------------------------+
2744 | Float/int conversion temporary (X) | 24+P
2745 +---------------------------------------+
2746 | Alloca space (A) | 24+P+X
2747 +---------------------------------------+
2748 | Local variable space (L) | 24+P+X+A
2749 +---------------------------------------+
2750 | Save area for FP registers (F) | 24+P+X+A+L
2751 +---------------------------------------+
2752 | Possible alignment area (X) | 24+P+X+A+L+F
2753 +---------------------------------------+
2754 | Save area for GP registers (G) | 24+P+X+A+L+F+X
2755 +---------------------------------------+
2756 | Save area for CR (C) | 24+P+X+A+L+F+X+G
2757 +---------------------------------------+
2758 | Save area for TOC (T) | 24+P+X+A+L+F+X+G+C
2759 +---------------------------------------+
2760 | Save area for LR (R) | 24+P+X+A+L+F+X+G+C+T
2761 +---------------------------------------+
2762 old SP->| back chain to caller's caller |
2763 +---------------------------------------+
2765 For NT, there is no specific order to save the registers, but in
2766 order to support __builtin_return_address, the save area for the
2767 link register needs to be in a known place, so we use -4 off of the
2768 old SP. To support calls through pointers, we also allocate a
2769 fixed slot to store the TOC, -8 off the old SP. */
2772 rs6000_stack_info ()
2774 static rs6000_stack_t info, zero_info;
2775 rs6000_stack_t *info_ptr = &info;
2776 int reg_size = TARGET_64BIT ? 8 : 4;
2777 enum rs6000_abi abi;
2780 /* Zero all fields portably */
2783 /* Select which calling sequence */
2784 info_ptr->abi = abi = DEFAULT_ABI;
2786 /* Calculate which registers need to be saved & save area size */
2787 info_ptr->first_gp_reg_save = first_reg_to_save ();
2788 info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save);
2790 info_ptr->first_fp_reg_save = first_fp_reg_to_save ();
2791 info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save);
2793 /* Does this function call anything? */
2794 info_ptr->calls_p = rs6000_makes_calls ();
2796 /* Do we need to allocate space to save the toc? */
2797 if (rs6000_save_toc_p)
2799 info_ptr->toc_save_p = 1;
2800 info_ptr->toc_size = reg_size;
2803 /* Does this machine need the float/int conversion area? */
2804 info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM];
2806 /* If this is main and we need to call a function to set things up,
2807 save main's arguments around the call. */
2812 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0)
2814 info_ptr->main_p = 1;
2817 info_ptr->calls_p = 1;
2819 if (DECL_ARGUMENTS (current_function_decl))
2824 info_ptr->main_save_p = 1;
2825 info_ptr->main_size = 0;
2827 for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl));
2828 arg != NULL_TREE && i < 8;
2829 (arg = TREE_CHAIN (arg)), i++)
2831 info_ptr->main_size += reg_size;
2839 /* Determine if we need to save the link register */
2840 if (regs_ever_live[65] || profile_flag
2841 #ifdef TARGET_RELOCATABLE
2842 || (TARGET_RELOCATABLE && (get_pool_size () != 0))
2844 || (info_ptr->first_fp_reg_save != 64
2845 && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save))
2846 || (abi == ABI_V4 && current_function_calls_alloca)
2847 || (abi == ABI_SOLARIS && current_function_calls_alloca)
2848 || info_ptr->calls_p)
2850 info_ptr->lr_save_p = 1;
2851 regs_ever_live[65] = 1;
2853 info_ptr->lr_size = reg_size;
2856 /* Determine if we need to save the condition code registers */
2857 if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72])
2859 info_ptr->cr_save_p = 1;
2860 if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS)
2861 info_ptr->cr_size = reg_size;
2864 /* Determine various sizes */
2865 info_ptr->reg_size = reg_size;
2866 info_ptr->fixed_size = RS6000_SAVE_AREA;
2867 info_ptr->varargs_size = RS6000_VARARGS_AREA;
2868 info_ptr->vars_size = ALIGN (get_frame_size (), 8);
2869 info_ptr->parm_size = ALIGN (current_function_outgoing_args_size, 8);
2870 info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0;
2871 info_ptr->save_size = ALIGN (info_ptr->fp_size
2875 + info_ptr->toc_size
2876 + info_ptr->main_size, 8);
2878 total_raw_size = (info_ptr->vars_size
2879 + info_ptr->parm_size
2880 + info_ptr->fpmem_size
2881 + info_ptr->save_size
2882 + info_ptr->varargs_size
2883 + info_ptr->fixed_size);
2885 info_ptr->total_size = ALIGN (total_raw_size, STACK_BOUNDARY / BITS_PER_UNIT);
2887 /* Determine if we need to allocate any stack frame.
2888 For AIX We need to push the stack if a frame pointer is needed (because
2889 the stack might be dynamically adjusted), if we are debugging, if the
2890 total stack size is more than 220 bytes, or if we make calls.
2892 For V.4 we don't have the stack cushion that AIX uses, but assume that
2893 the debugger can handle stackless frames. */
2895 if (info_ptr->calls_p)
2896 info_ptr->push_p = 1;
2898 else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS)
2899 info_ptr->push_p = (total_raw_size > info_ptr->fixed_size
2900 || info_ptr->lr_save_p);
2903 info_ptr->push_p = (frame_pointer_needed
2904 || write_symbols != NO_DEBUG
2905 || info_ptr->total_size > 220);
2907 /* Calculate the offsets */
2908 info_ptr->fpmem_offset = info_ptr->total_size - info_ptr->parm_size;
2916 case ABI_AIX_NODESC:
2917 info_ptr->fp_save_offset = - info_ptr->fp_size;
2918 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
2919 info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size;
2920 info_ptr->cr_save_offset = 4;
2921 info_ptr->lr_save_offset = 8;
2926 info_ptr->fp_save_offset = - info_ptr->fp_size;
2927 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
2928 info_ptr->cr_save_offset = info_ptr->gp_save_offset - reg_size;
2929 info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size;
2930 info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
2931 info_ptr->lr_save_offset = reg_size;
2935 info_ptr->lr_save_offset = -4;
2936 info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size;
2937 info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
2938 info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size;
2939 info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size;
2940 if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0)
2941 info_ptr->fp_save_offset -= 4;
2943 info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size;
2947 /* Zero offsets if we're not saving those registers */
2948 if (!info_ptr->fp_size)
2949 info_ptr->fp_save_offset = 0;
2951 if (!info_ptr->gp_size)
2952 info_ptr->gp_save_offset = 0;
2954 if (!info_ptr->lr_save_p)
2955 info_ptr->lr_save_offset = 0;
2957 if (!info_ptr->cr_save_p)
2958 info_ptr->cr_save_offset = 0;
2960 if (!info_ptr->toc_save_p)
2961 info_ptr->toc_save_offset = 0;
2963 if (!info_ptr->main_save_p)
2964 info_ptr->main_save_offset = 0;
2966 if (!info_ptr->fpmem_p)
2967 info_ptr->fpmem_offset = 0;
2970 rs6000_fpmem_size = info_ptr->fpmem_size;
2971 rs6000_fpmem_offset = STACK_DYNAMIC_OFFSET (current_function_decl) - info_ptr->fpmem_size;
2972 if (rs6000_fpmem_offset > 32767)
2980 debug_stack_info (info)
2981 rs6000_stack_t *info;
2986 info = rs6000_stack_info ();
2988 fprintf (stderr, "\nStack information for function %s:\n",
2989 ((current_function_decl && DECL_NAME (current_function_decl))
2990 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl))
2995 default: abi_string = "Unknown"; break;
2996 case ABI_NONE: abi_string = "NONE"; break;
2997 case ABI_AIX: abi_string = "AIX"; break;
2998 case ABI_AIX_NODESC: abi_string = "AIX"; break;
2999 case ABI_V4: abi_string = "V.4"; break;
3000 case ABI_SOLARIS: abi_string = "Solaris"; break;
3001 case ABI_NT: abi_string = "NT"; break;
3004 fprintf (stderr, "\tABI = %5s\n", abi_string);
3006 if (info->first_gp_reg_save != 32)
3007 fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save);
3009 if (info->first_fp_reg_save != 64)
3010 fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save);
3012 if (info->lr_save_p)
3013 fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p);
3015 if (info->cr_save_p)
3016 fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p);
3018 if (info->toc_save_p)
3019 fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p);
3022 fprintf (stderr, "\tpush_p = %5d\n", info->push_p);
3025 fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p);
3028 fprintf (stderr, "\tmain_p = %5d\n", info->main_p);
3030 if (info->main_save_p)
3031 fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p);
3034 fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p);
3036 if (info->gp_save_offset)
3037 fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset);
3039 if (info->fp_save_offset)
3040 fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset);
3042 if (info->lr_save_offset)
3043 fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset);
3045 if (info->cr_save_offset)
3046 fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset);
3048 if (info->toc_save_offset)
3049 fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset);
3051 if (info->varargs_save_offset)
3052 fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset);
3054 if (info->main_save_offset)
3055 fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset);
3057 if (info->fpmem_offset)
3058 fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset);
3060 if (info->total_size)
3061 fprintf (stderr, "\ttotal_size = %5d\n", info->total_size);
3063 if (info->varargs_size)
3064 fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size);
3066 if (info->vars_size)
3067 fprintf (stderr, "\tvars_size = %5d\n", info->vars_size);
3069 if (info->parm_size)
3070 fprintf (stderr, "\tparm_size = %5d\n", info->parm_size);
3072 if (info->fpmem_size)
3073 fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size);
3075 if (info->fixed_size)
3076 fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size);
3079 fprintf (stderr, "\tgp_size = %5d\n", info->gp_size);
3082 fprintf (stderr, "\tfp_size = %5d\n", info->fp_size);
3085 fprintf (stderr, "\tlr_size = %5d\n", info->cr_size);
3088 fprintf (stderr, "\tcr_size = %5d\n", info->cr_size);
3091 fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size);
3093 if (info->main_size)
3094 fprintf (stderr, "\tmain_size = %5d\n", info->main_size);
3096 if (info->save_size)
3097 fprintf (stderr, "\tsave_size = %5d\n", info->save_size);
3099 if (info->reg_size != 4)
3100 fprintf (stderr, "\treg_size = %5d\n", info->reg_size);
3102 fprintf (stderr, "\n");
3106 /* Write function prologue. */
3108 output_prolog (file, size)
3112 rs6000_stack_t *info = rs6000_stack_info ();
3113 int reg_size = info->reg_size;
3121 store_reg = "\t{st|stw} %s,%d(%s)\n";
3122 load_reg = "\t{l|lwz} %s,%d(%s)\n";
3126 store_reg = "\tstd %s,%d(%s)\n";
3127 load_reg = "\tlld %s,%d(%s)\n";
3130 if (TARGET_DEBUG_STACK)
3131 debug_stack_info (info);
3133 /* Write .extern for any function we will call to save and restore fp
3135 if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
3136 fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
3137 SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX,
3138 RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
3140 /* Write .extern for truncation routines, if needed. */
3141 if (rs6000_trunc_used && ! trunc_defined)
3143 fprintf (file, "\t.extern .%s\n\t.extern .%s\n",
3144 RS6000_ITRUNC, RS6000_UITRUNC);
3148 /* Write .extern for AIX common mode routines, if needed. */
3149 if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined)
3151 fputs ("\t.extern __mulh\n", file);
3152 fputs ("\t.extern __mull\n", file);
3153 fputs ("\t.extern __divss\n", file);
3154 fputs ("\t.extern __divus\n", file);
3155 fputs ("\t.extern __quoss\n", file);
3156 fputs ("\t.extern __quous\n", file);
3157 common_mode_defined = 1;
3160 /* For V.4, update stack before we do any saving and set back pointer. */
3161 if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
3163 if (info->total_size < 32767)
3166 (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3167 reg_names[1], - info->total_size, reg_names[1]);
3168 sp_offset = info->total_size;
3172 int neg_size = - info->total_size;
3174 asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
3175 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3176 reg_names[0], (neg_size >> 16) & 0xffff,
3177 reg_names[0], reg_names[0], neg_size & 0xffff);
3179 (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3180 reg_names[1], reg_names[1], reg_names[0]);
3184 /* If we use the link register, get it into r0. */
3185 if (info->lr_save_p)
3186 asm_fprintf (file, "\tmflr %s\n", reg_names[0]);
3188 /* If we need to save CR, put it into r12. */
3189 if (info->cr_save_p && sp_reg != 12)
3190 asm_fprintf (file, "\tmfcr %s\n", reg_names[12]);
3192 /* Do any required saving of fpr's. If only one or two to save, do it
3193 ourself. Otherwise, call function. Note that since they are statically
3194 linked, we do not need a nop following them. */
3195 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3197 int regno = info->first_fp_reg_save;
3198 int loc = info->fp_save_offset + sp_offset;
3200 for ( ; regno < 64; regno++, loc += 8)
3201 asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]);
3203 else if (info->first_fp_reg_save != 64)
3204 asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX,
3205 info->first_fp_reg_save - 32, SAVE_FP_SUFFIX);
3207 /* Now save gpr's. */
3208 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3210 int regno = info->first_gp_reg_save;
3211 int loc = info->gp_save_offset + sp_offset;
3213 for ( ; regno < 32; regno++, loc += reg_size)
3214 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]);
3217 else if (info->first_gp_reg_save != 32)
3218 asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n",
3219 reg_names[info->first_gp_reg_save],
3220 info->gp_save_offset + sp_offset,
3223 /* Save main's arguments if we need to call a function */
3225 if (info->main_save_p)
3228 int loc = info->main_save_offset + sp_offset;
3229 int size = info->main_size;
3231 for (regno = 3; size > 0; regno++, loc -= reg_size, size -= reg_size)
3232 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]);
3236 /* Save lr if we used it. */
3237 if (info->lr_save_p)
3238 asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset,
3241 /* Save CR if we use any that must be preserved. */
3242 if (info->cr_save_p)
3244 if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */
3246 asm_fprintf (file, "\tmfcr %s\n", reg_names[0]);
3247 asm_fprintf (file, store_reg, reg_names[0],
3248 info->cr_save_offset + sp_offset,
3252 asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset,
3256 if (info->toc_save_p)
3257 asm_fprintf (file, store_reg, reg_names[2], info->toc_save_offset + sp_offset,
3260 /* NT needs us to probe the stack frame every 4k pages for large frames, so
3262 if (DEFAULT_ABI == ABI_NT && info->total_size > 4096)
3264 if (info->total_size < 32768)
3266 int probe_offset = 4096;
3267 while (probe_offset < info->total_size)
3269 asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]);
3270 probe_offset += 4096;
3275 int probe_iterations = info->total_size / 4096;
3276 static int probe_labelno = 0;
3279 if (probe_iterations < 32768)
3280 asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations);
3283 asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16);
3284 if (probe_iterations & 0xffff)
3285 asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12],
3286 probe_iterations & 0xffff);
3288 asm_fprintf (file, "\tmtctr %s\n", reg_names[12]);
3289 asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
3290 ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno);
3291 asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]);
3292 ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno);
3293 fputs ("\tbdnz ", file);
3294 assemble_name (file, buf);
3299 /* Update stack and set back pointer and we have already done so for V.4. */
3300 if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
3302 if (info->total_size < 32767)
3304 (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3305 reg_names[1], - info->total_size, reg_names[1]);
3308 int neg_size = - info->total_size;
3309 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3310 reg_names[0], (neg_size >> 16) & 0xffff,
3311 reg_names[0], reg_names[0], neg_size & 0xffff);
3313 (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3314 reg_names[1], reg_names[1], reg_names[0]);
3318 /* Set frame pointer, if needed. */
3319 if (frame_pointer_needed)
3320 asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]);
3323 /* If we need to call a function to set things up for main, do so now
3324 before dealing with the TOC. */
3329 switch (DEFAULT_ABI)
3331 case ABI_AIX: prefix = "."; break;
3332 case ABI_NT: prefix = ".."; break;
3335 fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN);
3336 #ifdef RS6000_CALL_GLUE2
3337 fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN);
3339 #ifdef RS6000_CALL_GLUE
3340 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT)
3341 fprintf (file, "\t%s\n", RS6000_CALL_GLUE);
3345 if (info->main_save_p)
3349 int size = info->main_size;
3351 if (info->total_size < 32767)
3353 loc = info->total_size + info->main_save_offset;
3354 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
3355 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]);
3359 int neg_size = info->main_save_offset - info->total_size;
3361 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3362 reg_names[0], (neg_size >> 16) & 0xffff,
3363 reg_names[0], reg_names[0], neg_size & 0xffff);
3365 asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0],
3368 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
3369 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]);
3376 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3377 TOC_TABLE address into register 30. */
3378 if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0)
3382 #ifdef TARGET_RELOCATABLE
3383 if (TARGET_RELOCATABLE)
3385 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3386 fputs ("\tbl ", file);
3387 assemble_name (file, buf);
3390 ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno);
3391 fprintf (file, "\tmflr %s\n", reg_names[30]);
3393 asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz}" : "\tld");
3394 fprintf (file, " %s,(", reg_names[0]);
3395 ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno);
3396 assemble_name (file, buf);
3398 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3399 assemble_name (file, buf);
3400 fprintf (file, ")(%s)\n", reg_names[30]);
3401 asm_fprintf (file, "\t{cax|add} %s,%s,%s\n",
3402 reg_names[30], reg_names[0], reg_names[30]);
3403 rs6000_pic_labelno++;
3408 switch (DEFAULT_ABI)
3412 case ABI_AIX_NODESC:
3415 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1);
3416 asm_fprintf (file, "\t{cau|addis} %s,%s,", reg_names[30], reg_names[0]);
3417 assemble_name (file, buf);
3418 asm_fprintf (file, "@ha\n");
3419 if (TARGET_NEW_MNEMONICS)
3421 asm_fprintf (file, "\taddi %s,%s,", reg_names[30], reg_names[30]);
3422 assemble_name (file, buf);
3423 asm_fprintf (file, "@l\n");
3427 asm_fprintf (file, "\tcal %s,", reg_names[30]);
3428 assemble_name (file, buf);
3429 asm_fprintf (file, "@l(%s)\n", reg_names[30]);
3439 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0);
3440 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[30]);
3441 assemble_name (file, buf);
3442 asm_fprintf (file, "(%s)\n", reg_names[2]);
3447 if (DEFAULT_ABI == ABI_NT)
3449 assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3450 fputs (".b:\n", file);
3454 /* Write function epilogue. */
3457 output_epilog (file, size)
3461 rs6000_stack_t *info = rs6000_stack_info ();
3462 char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n";
3463 rtx insn = get_last_insn ();
3468 /* If the last insn was a BARRIER, we don't have to write anything except
3470 if (GET_CODE (insn) == NOTE)
3471 insn = prev_nonnote_insn (insn);
3472 if (insn == 0 || GET_CODE (insn) != BARRIER)
3474 /* If we have a frame pointer, a call to alloca, or a large stack
3475 frame, restore the old stack pointer using the backchain. Otherwise,
3476 we know what size to update it with. */
3477 if (frame_pointer_needed || current_function_calls_alloca
3478 || info->total_size > 32767)
3480 /* Under V.4, don't reset the stack pointer until after we're done
3481 loading the saved registers. */
3482 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
3485 asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]);
3487 else if (info->push_p)
3489 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
3490 sp_offset = info->total_size;
3491 else if (TARGET_NEW_MNEMONICS)
3492 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], info->total_size);
3494 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], info->total_size, reg_names[1]);
3497 /* Get the old lr if we saved it. */
3498 if (info->lr_save_p)
3499 asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]);
3501 /* Get the old cr if we saved it. */
3502 if (info->cr_save_p)
3503 asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]);
3505 /* Set LR here to try to overlap restores below. */
3506 if (info->lr_save_p)
3507 asm_fprintf (file, "\tmtlr %s\n", reg_names[0]);
3509 /* Restore gpr's. */
3510 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3512 int regno = info->first_gp_reg_save;
3513 int loc = info->gp_save_offset + sp_offset;
3514 int reg_size = (TARGET_32BIT) ? 4 : 8;
3516 for ( ; regno < 32; regno++, loc += reg_size)
3517 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]);
3520 else if (info->first_gp_reg_save != 32)
3521 asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n",
3522 reg_names[info->first_gp_reg_save],
3523 info->gp_save_offset + sp_offset,
3526 /* Restore fpr's if we can do it without calling a function. */
3527 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3529 int regno = info->first_fp_reg_save;
3530 int loc = info->fp_save_offset + sp_offset;
3532 for ( ; regno < 64; regno++, loc += 8)
3533 asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]);
3536 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3538 if (info->cr_save_p)
3539 asm_fprintf (file, "\tmtcrf %d,%s\n",
3540 (regs_ever_live[70] != 0) * 0x20
3541 + (regs_ever_live[71] != 0) * 0x10
3542 + (regs_ever_live[72] != 0) * 0x8, reg_names[12]);
3544 /* If this is V.4, unwind the stack pointer after all of the loads have been done */
3547 if (TARGET_NEW_MNEMONICS)
3548 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], sp_offset);
3550 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], sp_offset, reg_names[1]);
3552 else if (sp_reg != 1)
3553 asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]);
3555 /* If we have to restore more than two FP registers, branch to the
3556 restore function. It will return to our caller. */
3557 if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
3558 asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX,
3559 info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
3561 asm_fprintf (file, "\t{br|blr}\n");
3564 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3567 We don't output a traceback table if -finhibit-size-directive was
3568 used. The documentation for -finhibit-size-directive reads
3569 ``don't output a @code{.size} assembler directive, or anything
3570 else that would cause trouble if the function is split in the
3571 middle, and the two halves are placed at locations far apart in
3572 memory.'' The traceback table has this property, since it
3573 includes the offset from the start of the function to the
3574 traceback table itself.
3576 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3577 different traceback table. */
3578 if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive)
3580 char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
3581 int fixed_parms, float_parms, parm_info;
3584 while (*fname == '.') /* V.4 encodes . in the name */
3587 /* Need label immediately before tbtab, so we can compute its offset
3588 from the function start. */
3591 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3592 ASM_OUTPUT_LABEL (file, fname);
3594 /* The .tbtab pseudo-op can only be used for the first eight
3595 expressions, since it can't handle the possibly variable
3596 length fields that follow. However, if you omit the optional
3597 fields, the assembler outputs zeros for all optional fields
3598 anyways, giving each variable length field is minimum length
3599 (as defined in sys/debug.h). Thus we can not use the .tbtab
3600 pseudo-op at all. */
3602 /* An all-zero word flags the start of the tbtab, for debuggers
3603 that have to find it by searching forward from the entry
3604 point or from the current pc. */
3605 fputs ("\t.long 0\n", file);
3607 /* Tbtab format type. Use format type 0. */
3608 fputs ("\t.byte 0,", file);
3610 /* Language type. Unfortunately, there doesn't seem to be any
3611 official way to get this info, so we use language_string. C
3612 is 0. C++ is 9. No number defined for Obj-C, so use the
3613 value for C for now. */
3614 if (! strcmp (language_string, "GNU C")
3615 || ! strcmp (language_string, "GNU Obj-C"))
3617 else if (! strcmp (language_string, "GNU F77"))
3619 else if (! strcmp (language_string, "GNU Ada"))
3621 else if (! strcmp (language_string, "GNU PASCAL"))
3623 else if (! strcmp (language_string, "GNU C++"))
3627 fprintf (file, "%d,", i);
3629 /* 8 single bit fields: global linkage (not set for C extern linkage,
3630 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
3631 from start of procedure stored in tbtab, internal function, function
3632 has controlled storage, function has no toc, function uses fp,
3633 function logs/aborts fp operations. */
3634 /* Assume that fp operations are used if any fp reg must be saved. */
3635 fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1));
3637 /* 6 bitfields: function is interrupt handler, name present in
3638 proc table, function calls alloca, on condition directives
3639 (controls stack walks, 3 bits), saves condition reg, saves
3641 /* The `function calls alloca' bit seems to be set whenever reg 31 is
3642 set up as a frame pointer, even when there is no alloca call. */
3643 fprintf (file, "%d,",
3644 ((1 << 6) | (frame_pointer_needed << 5)
3645 | (info->cr_save_p << 1) | (info->lr_save_p)));
3647 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
3649 fprintf (file, "%d,",
3650 (info->push_p << 7) | (64 - info->first_fp_reg_save));
3652 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
3653 fprintf (file, "%d,", (32 - first_reg_to_save ()));
3656 /* Compute the parameter info from the function decl argument
3659 int next_parm_info_bit;
3661 next_parm_info_bit = 31;
3666 for (decl = DECL_ARGUMENTS (current_function_decl);
3667 decl; decl = TREE_CHAIN (decl))
3669 rtx parameter = DECL_INCOMING_RTL (decl);
3670 enum machine_mode mode = GET_MODE (parameter);
3672 if (GET_CODE (parameter) == REG)
3674 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3682 else if (mode == DFmode)
3687 /* If only one bit will fit, don't or in this entry. */
3688 if (next_parm_info_bit > 0)
3689 parm_info |= (bits << (next_parm_info_bit - 1));
3690 next_parm_info_bit -= 2;
3694 fixed_parms += ((GET_MODE_SIZE (mode)
3695 + (UNITS_PER_WORD - 1))
3697 next_parm_info_bit -= 1;
3703 /* Number of fixed point parameters. */
3704 /* This is actually the number of words of fixed point parameters; thus
3705 an 8 byte struct counts as 2; and thus the maximum value is 8. */
3706 fprintf (file, "%d,", fixed_parms);
3708 /* 2 bitfields: number of floating point parameters (7 bits), parameters
3710 /* This is actually the number of fp registers that hold parameters;
3711 and thus the maximum value is 13. */
3712 /* Set parameters on stack bit if parameters are not in their original
3713 registers, regardless of whether they are on the stack? Xlc
3714 seems to set the bit when not optimizing. */
3715 fprintf (file, "%d\n", ((float_parms << 1) | (! optimize)));
3717 /* Optional fields follow. Some are variable length. */
3719 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
3721 /* There is an entry for each parameter in a register, in the order that
3722 they occur in the parameter list. Any intervening arguments on the
3723 stack are ignored. If the list overflows a long (max possible length
3724 34 bits) then completely leave off all elements that don't fit. */
3725 /* Only emit this long if there was at least one parameter. */
3726 if (fixed_parms || float_parms)
3727 fprintf (file, "\t.long %d\n", parm_info);
3729 /* Offset from start of code to tb table. */
3730 fputs ("\t.long ", file);
3731 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3732 RS6000_OUTPUT_BASENAME (file, fname);
3734 RS6000_OUTPUT_BASENAME (file, fname);
3737 /* Interrupt handler mask. */
3738 /* Omit this long, since we never set the interrupt handler bit
3741 /* Number of CTL (controlled storage) anchors. */
3742 /* Omit this long, since the has_ctl bit is never set above. */
3744 /* Displacement into stack of each CTL anchor. */
3745 /* Omit this list of longs, because there are no CTL anchors. */
3747 /* Length of function name. */
3748 fprintf (file, "\t.short %d\n", strlen (fname));
3750 /* Function name. */
3751 assemble_string (fname, strlen (fname));
3753 /* Register for alloca automatic storage; this is always reg 31.
3754 Only emit this if the alloca bit was set above. */
3755 if (frame_pointer_needed)
3756 fputs ("\t.byte 31\n", file);
3759 /* Reset varargs and save TOC indicator */
3760 rs6000_sysv_varargs_p = 0;
3761 rs6000_save_toc_p = 0;
3762 rs6000_fpmem_size = 0;
3763 rs6000_fpmem_offset = 0;
3764 pic_offset_table_rtx = (rtx)0;
3766 if (DEFAULT_ABI == ABI_NT)
3768 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3769 fputs (".e:\nFE_MOT_RESVD..", file);
3770 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3771 fputs (":\n", file);
3775 /* Output a TOC entry. We derive the entry name from what is
3779 output_toc (file, x, labelno)
3793 /* if we're going to put a double constant in the TOC, make sure it's
3794 aligned properly when strict alignment is on. */
3795 if (GET_CODE (x) == CONST_DOUBLE
3797 && GET_MODE (x) == DFmode
3798 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) {
3799 ASM_OUTPUT_ALIGN (file, 3);
3803 if (TARGET_ELF && TARGET_MINIMAL_TOC)
3805 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC");
3806 fprintf (file, "%d = .-", labelno);
3807 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC");
3808 fputs ("1\n", file);
3811 ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno);
3813 /* Handle FP constants specially. Note that if we have a minimal
3814 TOC, things we put here aren't actually in the TOC, so we can allow
3816 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode
3817 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3822 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
3823 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
3824 if (TARGET_MINIMAL_TOC)
3825 fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]);
3827 fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
3828 k[0], k[1], k[0], k[1]);
3831 else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode
3832 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3837 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
3838 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
3840 if (TARGET_MINIMAL_TOC)
3841 fprintf (file, "\t.long %d\n", l);
3843 fprintf (file, "\t.tc FS_%x[TC],%d\n", l, l);
3846 else if (GET_MODE (x) == DImode
3847 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
3848 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3853 if (GET_CODE (x) == CONST_DOUBLE)
3855 low = CONST_DOUBLE_LOW (x);
3856 high = CONST_DOUBLE_HIGH (x);
3859 #if HOST_BITS_PER_WIDE_INT == 32
3862 high = (low < 0) ? ~0 : 0;
3866 low = INTVAL (x) & 0xffffffff;
3867 high = (HOST_WIDE_INT) INTVAL (x) >> 32;
3871 if (TARGET_MINIMAL_TOC)
3872 fprintf (file, "\t.long %ld\n\t.long %ld\n", high, low);
3874 fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n",
3875 high, low, high, low);
3879 if (GET_CODE (x) == CONST)
3881 base = XEXP (XEXP (x, 0), 0);
3882 offset = INTVAL (XEXP (XEXP (x, 0), 1));
3885 if (GET_CODE (base) == SYMBOL_REF)
3886 name = XSTR (base, 0);
3887 else if (GET_CODE (base) == LABEL_REF)
3888 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0)));
3889 else if (GET_CODE (base) == CODE_LABEL)
3890 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base));
3894 if (TARGET_MINIMAL_TOC)
3895 fputs ("\t.long ", file);
3898 STRIP_NAME_ENCODING (real_name, name);
3899 fprintf (file, "\t.tc %s", real_name);
3902 fprintf (file, ".N%d", - offset);
3904 fprintf (file, ".P%d", offset);
3906 fputs ("[TC],", file);
3908 output_addr_const (file, x);
3912 /* Output an assembler pseudo-op to write an ASCII string of N characters
3913 starting at P to FILE.
3915 On the RS/6000, we have to do this using the .byte operation and
3916 write out special characters outside the quoted string.
3917 Also, the assembler is broken; very long strings are truncated,
3918 so we must artificially break them up early. */
3921 output_ascii (file, p, n)
3927 int i, count_string;
3928 char *for_string = "\t.byte \"";
3929 char *for_decimal = "\t.byte ";
3930 char *to_close = NULL;
3933 for (i = 0; i < n; i++)
3936 if (c >= ' ' && c < 0177)
3939 fputs (for_string, file);
3942 /* Write two quotes to get one. */
3950 for_decimal = "\"\n\t.byte ";
3954 if (count_string >= 512)
3956 fputs (to_close, file);
3958 for_string = "\t.byte \"";
3959 for_decimal = "\t.byte ";
3967 fputs (for_decimal, file);
3968 fprintf (file, "%d", c);
3970 for_string = "\n\t.byte \"";
3977 /* Now close the string if we have written one. Then end the line. */
3979 fprintf (file, to_close);
3982 /* Generate a unique section name for FILENAME for a section type
3983 represented by SECTION_DESC. Output goes into BUF.
3985 SECTION_DESC can be any string, as long as it is different for each
3986 possible section type.
3988 We name the section in the same manner as xlc. The name begins with an
3989 underscore followed by the filename (after stripping any leading directory
3990 names) with the last period replaced by the string SECTION_DESC. If
3991 FILENAME does not contain a period, SECTION_DESC is appended to the end of
3995 rs6000_gen_section_name (buf, filename, section_desc)
4000 char *q, *after_last_slash, *last_period;
4004 after_last_slash = filename;
4005 for (q = filename; *q; q++)
4008 after_last_slash = q + 1;
4013 len = strlen (after_last_slash) + strlen (section_desc) + 2;
4014 *buf = (char *) permalloc (len);
4019 for (q = after_last_slash; *q; q++)
4021 if (q == last_period)
4023 strcpy (p, section_desc);
4024 p += strlen (section_desc);
4027 else if (isalnum (*q))
4031 if (last_period == 0)
4032 strcpy (p, section_desc);
4037 /* Write function profiler code. */
4040 output_function_profiler (file, labelno)
4044 /* The last used parameter register. */
4049 if (DEFAULT_ABI != ABI_AIX)
4052 /* Set up a TOC entry for the profiler label. */
4054 ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno);
4055 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno);
4056 if (TARGET_MINIMAL_TOC)
4058 fputs ("\t.long ", file);
4059 assemble_name (file, buf);
4064 fputs ("\t.tc\t", file);
4065 assemble_name (file, buf);
4066 fputs ("[TC],", file);
4067 assemble_name (file, buf);
4072 /* Figure out last used parameter register. The proper thing to do is
4073 to walk incoming args of the function. A function might have live
4074 parameter registers even if it has no incoming args. */
4076 for (last_parm_reg = 10;
4077 last_parm_reg > 2 && ! regs_ever_live [last_parm_reg];
4081 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
4082 it might be set up as the frame pointer. */
4084 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
4085 asm_fprintf (file, "\tmr %d,%d\n", j, i);
4087 /* Load location address into r3, and call mcount. */
4089 ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno);
4090 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[3]);
4091 assemble_name (file, buf);
4092 asm_fprintf (file, "(%s)\n\tbl .mcount\n", reg_names[2]);
4094 /* Restore parameter registers. */
4096 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
4097 asm_fprintf (file, "\tmr %d,%d\n", i, j);
4100 /* Adjust the cost of a scheduling dependency. Return the new cost of
4101 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
4104 rs6000_adjust_cost (insn, link, dep_insn, cost)
4110 if (! recog_memoized (insn))
4113 if (REG_NOTE_KIND (link) != 0)
4116 if (REG_NOTE_KIND (link) == 0)
4118 /* Data dependency; DEP_INSN writes a register that INSN reads some
4121 /* Tell the first scheduling pass about the latency between a mtctr
4122 and bctr (and mtlr and br/blr). The first scheduling pass will not
4123 know about this latency since the mtctr instruction, which has the
4124 latency associated to it, will be generated by reload. */
4125 if (get_attr_type (insn) == TYPE_JMPREG)
4126 return TARGET_POWER ? 5 : 4;
4128 /* Fall out to return default cost. */
4134 /* Return how many instructions the machine can issue per cycle */
4135 int get_issue_rate()
4137 switch (rs6000_cpu_attr) {
4156 /* Output insns to flush the {data|instruction} caches after building a
4160 rs6000_sync_trampoline (addr)
4163 enum machine_mode pmode = Pmode;
4164 rtx reg = gen_reg_rtx (pmode);
4167 int size = rs6000_trampoline_size ();
4168 rtx (*sub_fcn) PROTO ((rtx, rtx, rtx));
4169 rtx (*cmp_fcn) PROTO ((rtx, rtx));
4174 sub_fcn = gen_subsi3;
4175 cmp_fcn = gen_cmpsi;
4179 sub_fcn = gen_subdi3;
4180 cmp_fcn = gen_cmpdi;
4183 addr = force_reg (pmode, addr);
4184 mem2 = gen_rtx (MEM, pmode, gen_rtx (PLUS, pmode, addr, reg));
4185 mem1 = gen_rtx (MEM, pmode, addr);
4187 /* Issue a loop of dcbst's to flush the data cache */
4188 emit_move_insn (reg, GEN_INT (size-4));
4189 label = gen_label_rtx ();
4191 emit_insn (gen_dcbst (mem2, addr, reg));
4192 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
4193 emit_insn ((*cmp_fcn) (reg, const0_rtx));
4194 emit_jump_insn (gen_bgt (label));
4196 /* Issue a sync after the dcbst's to let things settle down */
4197 emit_insn (gen_sync (mem1));
4199 /* Issue a loop of icbi's to flush the instruction cache */
4200 emit_move_insn (reg, GEN_INT (size-4));
4201 label = gen_label_rtx ();
4203 emit_insn (gen_icbi (mem2, addr, reg));
4204 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
4205 emit_insn ((*cmp_fcn) (reg, const0_rtx));
4206 emit_jump_insn (gen_bgt (label));
4208 /* Issue a sync after the icbi's to let things settle down */
4209 emit_insn (gen_sync (mem1));
4211 /* Finally issue an isync to synchronize the icache */
4212 emit_insn (gen_isync (mem1));
4216 /* Output assembler code for a block containing the constant parts
4217 of a trampoline, leaving space for the variable parts.
4219 The trampoline should set the static chain pointer to value placed
4220 into the trampoline and should branch to the specified routine. */
4223 rs6000_trampoline_template (file)
4226 char *sc = reg_names[STATIC_CHAIN_REGNUM];
4227 char *r0 = reg_names[0];
4228 char *r2 = reg_names[2];
4230 switch (DEFAULT_ABI)
4235 /* Under AIX, this is not code at all, but merely a data area,
4236 since that is the way all functions are called. The first word is
4237 the address of the function, the second word is the TOC pointer (r2),
4238 and the third word is the static chain value. */
4240 fprintf (file, "\t.long %s\n", (TARGET_32BIT) ? "0,0,0" : "0,0,0,0,0,0");
4244 /* V.4/eabi function pointers are just a single pointer, so we need to
4245 do the full gory code to load up the static chain. */
4248 case ABI_AIX_NODESC:
4249 if (STATIC_CHAIN_REGNUM == 0 || !TARGET_NEW_MNEMONICS)
4254 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
4255 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
4256 fprintf (file, "\t.long 0,0\n"); /* offset 8 */
4257 fprintf (file, ".LTRAMP1:\n");
4258 fprintf (file, "\tmflr %s\n", sc); /* offset 20 */
4259 fprintf (file, "\tmtlr %s\n", r0); /* offset 24 */
4260 fprintf (file, "\tlwz %s,0(%s)\n", r0, sc); /* offset 28 */
4261 fprintf (file, "\tlwz %s,4(%s)\n", sc, sc); /* offset 32 */
4262 fprintf (file, "\tmtctr %s\n", r0); /* offset 36 */
4263 fprintf (file, "\tbctr\n"); /* offset 40 */
4267 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
4268 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
4269 fprintf (file, "\t.long 0,0,0,0\n"); /* offset 8 */
4270 fprintf (file, ".LTRAMP1:\n");
4271 fprintf (file, "\tmflr %s\n", sc); /* offset 28 */
4272 fprintf (file, "\tmtlr %s\n", r0); /* offset 32 */
4273 fprintf (file, "\tld %s,0(%s)\n", r0, sc); /* offset 36 */
4274 fprintf (file, "\tld %s,8(%s)\n", sc, sc); /* offset 40 */
4275 fprintf (file, "\tmtctr %s\n", r0); /* offset 44 */
4276 fprintf (file, "\tbctr\n"); /* offset 48 */
4280 /* NT function pointers point to a two word area (real address, TOC)
4281 which unfortunately does not include a static chain field. So we
4282 use the function field to point to ..LTRAMP1 and the toc field
4283 to point to the whole table. */
4285 if (STATIC_CHAIN_REGNUM == 0
4286 || STATIC_CHAIN_REGNUM == 2
4288 || !TARGET_NEW_MNEMONICS)
4291 fprintf (file, "\t.ualong 0\n"); /* offset 0 */
4292 fprintf (file, "\t.ualong 0\n"); /* offset 4 */
4293 fprintf (file, "\t.ualong 0\n"); /* offset 8 */
4294 fprintf (file, "\t.ualong 0\n"); /* offset 12 */
4295 fprintf (file, "\t.ualong 0\n"); /* offset 16 */
4296 fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */
4297 fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */
4298 fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */
4299 fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */
4300 fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */
4301 fprintf (file, "\tbctr\n"); /* offset 40 */
4308 /* Length in units of the trampoline for entering a nested function. */
4311 rs6000_trampoline_size ()
4315 switch (DEFAULT_ABI)
4321 ret = (TARGET_32BIT) ? 12 : 24;
4326 case ABI_AIX_NODESC:
4327 ret = (TARGET_32BIT) ? 40 : 48;
4338 /* Emit RTL insns to initialize the variable parts of a trampoline.
4339 FNADDR is an RTX for the address of the function's pure code.
4340 CXT is an RTX for the static chain value for the function. */
4343 rs6000_initialize_trampoline (addr, fnaddr, cxt)
4348 enum machine_mode pmode = Pmode;
4349 int regsize = (TARGET_32BIT) ? 4 : 8;
4350 rtx ctx_reg = force_reg (pmode, cxt);
4352 switch (DEFAULT_ABI)
4357 /* Macros to shorten the code expansions below. */
4358 #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr))
4359 #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset)))
4361 /* Under AIX, just build the 3 word function descriptor */
4364 rtx fn_reg = gen_reg_rtx (pmode);
4365 rtx toc_reg = gen_reg_rtx (pmode);
4366 emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
4367 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4));
4368 emit_move_insn (MEM_DEREF (addr), fn_reg);
4369 emit_move_insn (MEM_PLUS (addr, regsize), toc_reg);
4370 emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg);
4374 /* Under V.4/eabi, update the two words after the bl to have the real
4375 function address and the static chain. */
4378 case ABI_AIX_NODESC:
4380 rtx reg = gen_reg_rtx (pmode);
4381 emit_move_insn (reg, fnaddr);
4382 emit_move_insn (MEM_PLUS (addr, 8), reg);
4383 emit_move_insn (MEM_PLUS (addr, 8 + regsize), ctx_reg);
4384 rs6000_sync_trampoline (addr);
4388 /* Under NT, update the first word to point to the ..LTRAMP1..0 header,
4389 the second word will point to the whole trampoline, third-fifth words
4390 will then have the real address, static chain, and toc value. */
4393 rtx tramp_reg = gen_reg_rtx (pmode);
4394 rtx fn_reg = gen_reg_rtx (pmode);
4395 rtx toc_reg = gen_reg_rtx (pmode);
4397 emit_move_insn (tramp_reg, gen_rtx (SYMBOL_REF, pmode, "..LTRAMP1..0"));
4398 addr = force_reg (pmode, addr);
4399 emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
4400 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize));
4401 emit_move_insn (MEM_DEREF (addr), tramp_reg);
4402 emit_move_insn (MEM_PLUS (addr, regsize), addr);
4403 emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg);
4404 emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg);
4405 emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx (REG, pmode, 2));
4414 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4415 with arguments ARGS is a valid machine specific attribute for DECL.
4416 The attributes in ATTRIBUTES have previously been assigned to DECL. */
4419 rs6000_valid_decl_attribute_p (decl, attributes, identifier, args)
4428 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4429 with arguments ARGS is a valid machine specific attribute for TYPE.
4430 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
4433 rs6000_valid_type_attribute_p (type, attributes, identifier, args)
4439 if (TREE_CODE (type) != FUNCTION_TYPE
4440 && TREE_CODE (type) != FIELD_DECL
4441 && TREE_CODE (type) != TYPE_DECL)
4444 /* Longcall attribute says that the function is not within 2**26 bytes
4445 of the current function, and to do an indirect call. */
4446 if (is_attribute_p ("longcall", identifier))
4447 return (args == NULL_TREE);
4449 if (DEFAULT_ABI == ABI_NT)
4451 /* Stdcall attribute says callee is responsible for popping arguments
4452 if they are not variable. */
4453 if (is_attribute_p ("stdcall", identifier))
4454 return (args == NULL_TREE);
4456 /* Cdecl attribute says the callee is a normal C declaration */
4457 if (is_attribute_p ("cdecl", identifier))
4458 return (args == NULL_TREE);
4460 /* Dllimport attribute says says the caller is to call the function
4461 indirectly through a __imp_<name> pointer. */
4462 if (is_attribute_p ("dllimport", identifier))
4463 return (args == NULL_TREE);
4465 /* Dllexport attribute says says the callee is to create a __imp_<name>
4467 if (is_attribute_p ("dllexport", identifier))
4468 return (args == NULL_TREE);
4470 /* Exception attribute allows the user to specify 1-2 strings or identifiers
4471 that will fill in the 3rd and 4th fields of the structured exception
4473 if (is_attribute_p ("exception", identifier))
4477 if (args == NULL_TREE)
4480 for (i = 0; i < 2 && args != NULL_TREE; i++)
4482 tree this_arg = TREE_VALUE (args);
4483 args = TREE_PURPOSE (args);
4485 if (TREE_CODE (this_arg) != STRING_CST
4486 && TREE_CODE (this_arg) != IDENTIFIER_NODE)
4490 return (args == NULL_TREE);
4497 /* If defined, a C expression whose value is zero if the attributes on
4498 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
4499 two if they are nearly compatible (which causes a warning to be
4503 rs6000_comp_type_attributes (type1, type2)
4510 /* If defined, a C statement that assigns default attributes to newly
4514 rs6000_set_default_type_attributes (type)
4519 /* Return a dll import reference corresponding to to a call's SYMBOL_REF */
4521 rs6000_dll_import_ref (call_ref)
4530 if (GET_CODE (call_ref) != SYMBOL_REF)
4533 call_name = XSTR (call_ref, 0);
4534 len = sizeof ("__imp_") + strlen (call_name);
4536 reg2 = gen_reg_rtx (Pmode);
4538 strcpy (p, "__imp_");
4539 strcat (p, call_name);
4540 node = get_identifier (p);
4542 reg1 = force_reg (Pmode, gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node)));
4543 emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg1));
4548 /* Return a reference suitable for calling a function with the longcall attribute. */
4550 rs6000_longcall_ref (call_ref)
4559 if (GET_CODE (call_ref) != SYMBOL_REF)
4562 /* System V adds '.' to the internal name, so skip them. */
4563 call_name = XSTR (call_ref, 0);
4564 if (*call_name == '.')
4566 while (*call_name == '.')
4569 node = get_identifier (call_name);
4570 call_ref = gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node));
4573 return force_reg (Pmode, call_ref);
4577 /* A C statement or statements to switch to the appropriate section
4578 for output of RTX in mode MODE. You can assume that RTX is some
4579 kind of constant in RTL. The argument MODE is redundant except in
4580 the case of a `const_int' rtx. Select the section by calling
4581 `text_section' or one of the alternatives for other sections.
4583 Do not define this macro if you put all constants in the read-only
4589 rs6000_select_rtx_section (mode, x)
4590 enum machine_mode mode;
4593 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x))
4599 /* A C statement or statements to switch to the appropriate
4600 section for output of DECL. DECL is either a `VAR_DECL' node
4601 or a constant of some sort. RELOC indicates whether forming
4602 the initial value of DECL requires link-time relocations. */
4605 rs6000_select_section (decl, reloc)
4609 int size = int_size_in_bytes (TREE_TYPE (decl));
4611 if (TREE_CODE (decl) == STRING_CST)
4613 if (! flag_writable_strings)
4618 else if (TREE_CODE (decl) == VAR_DECL)
4620 if ((flag_pic && reloc)
4621 || !TREE_READONLY (decl)
4622 || TREE_SIDE_EFFECTS (decl)
4623 || !DECL_INITIAL (decl)
4624 || (DECL_INITIAL (decl) != error_mark_node
4625 && !TREE_CONSTANT (DECL_INITIAL (decl))))
4627 if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value))
4634 if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value))
4636 if (rs6000_sdata == SDATA_EABI)
4639 sdata_section (); /* System V doesn't have .sdata2/.sbss2 */
4651 /* If we are referencing a function that is static or is known to be
4652 in this file, make the SYMBOL_REF special. We can use this to indicate
4653 that we can branch to this function without emitting a no-op after the
4654 call. For real AIX and NT calling sequences, we also replace the
4655 function name with the real name (1 or 2 leading .'s), rather than
4656 the function descriptor name. This saves a lot of overriding code
4657 to readd the prefixes. */
4660 rs6000_encode_section_info (decl)
4663 if (TREE_CODE (decl) == FUNCTION_DECL)
4665 rtx sym_ref = XEXP (DECL_RTL (decl), 0);
4666 if (TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl))
4667 SYMBOL_REF_FLAG (sym_ref) = 1;
4669 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT)
4671 char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : "..";
4672 char *str = permalloc (strlen (prefix) + 1
4673 + strlen (XSTR (sym_ref, 0)));
4674 strcpy (str, prefix);
4675 strcat (str, XSTR (sym_ref, 0));
4676 XSTR (sym_ref, 0) = str;
4679 else if (rs6000_sdata != SDATA_NONE
4680 && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
4681 && TREE_CODE (decl) == VAR_DECL)
4683 int size = int_size_in_bytes (TREE_TYPE (decl));
4684 tree section_name = DECL_SECTION_NAME (decl);
4685 char *name = (char *)0;
4690 if (TREE_CODE (section_name) == STRING_CST)
4692 name = TREE_STRING_POINTER (section_name);
4693 len = TREE_STRING_LENGTH (section_name);
4699 if ((size > 0 && size <= g_switch_value)
4701 && ((len == sizeof (".sdata")-1 && strcmp (name, ".sdata") == 0)
4702 || (len == sizeof (".sdata2")-1 && strcmp (name, ".sdata2") == 0)
4703 || (len == sizeof (".sbss")-1 && strcmp (name, ".sbss") == 0)
4704 || (len == sizeof (".sbss2")-1 && strcmp (name, ".sbss2") == 0)
4705 || (len == sizeof (".PPC.EMB.sdata0")-1 && strcmp (name, ".PPC.EMB.sdata0") == 0)
4706 || (len == sizeof (".PPC.EMB.sbss0")-1 && strcmp (name, ".PPC.EMB.sbss0") == 0))))
4708 rtx sym_ref = XEXP (DECL_RTL (decl), 0);
4709 char *str = permalloc (2 + strlen (XSTR (sym_ref, 0)));
4711 strcat (str, XSTR (sym_ref, 0));
4712 XSTR (sym_ref, 0) = str;
4717 #endif /* USING_SVR4_H */
4720 /* CYGNUS LOCAL mac */
4722 /* Whether we are using m68k-compatible alignment. */
4726 /* Most Mac compiler pragmas are unimportant, but we must recognize
4727 the m68k alignment pragma, because that is crucial to transitions
4728 to and from the m68k emulator on PowerMacs. */
4731 handle_mac_pragma (finput, t)
4736 register char *pname;
4740 if (TREE_CODE (t) != IDENTIFIER_NODE)
4743 pname = IDENTIFIER_POINTER (t);
4744 if (strcmp (pname, "segment") == 0)
4746 /* (should collect pbuf + 8 into a segment name) */
4748 else if (strcmp (pname, "options") == 0)
4751 /* Skip over initial whitespace. */
4752 while (c == ' ' || c == '\t')
4755 /* Return without doing anything if no content. */
4756 if (c == '\n' || c == EOF)
4762 /* Collect the rest of the line. */
4763 while (psize < sizeof (pbuf) - 1 && c != '\n')
4769 if (strncmp (pbuf, "align=mac68k", 12) == 0)
4774 else if (strncmp (pbuf, "align=power", 11) == 0)
4779 else if (strncmp (pbuf, "align=reset", 11) == 0)
4788 /* END CYGNUS LOCAL mac */