1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
40 extern char *language_string;
41 extern int profile_block_flag;
43 #define min(A,B) ((A) < (B) ? (A) : (B))
44 #define max(A,B) ((A) > (B) ? (A) : (B))
48 enum processor_type rs6000_cpu;
49 char *rs6000_cpu_string;
51 /* Set to non-zero by "fix" operation to indicate that itrunc and
52 uitrunc must be defined. */
54 int rs6000_trunc_used;
56 /* Set to non-zero once they have been defined. */
58 static int trunc_defined;
60 /* Set to non-zero once AIX common-mode calls have been defined. */
61 static int common_mode_defined;
62 /* Save information from a "cmpxx" operation until the branch or scc is
65 rtx rs6000_compare_op0, rs6000_compare_op1;
66 int rs6000_compare_fp_p;
69 /* Label number of label created for -mrelocatable, to call to so we can
70 get the address of the GOT section */
71 int rs6000_pic_labelno;
74 /* Whether a System V.4 varargs area was created. */
75 int rs6000_sysv_varargs_p;
77 /* Whether we need to save the TOC register. */
78 int rs6000_save_toc_p;
80 /* ABI enumeration available for subtarget to use. */
81 enum rs6000_abi rs6000_current_abi;
83 /* Temporary memory used to convert integer -> float */
84 static rtx stack_temps[NUM_MACHINE_MODES];
87 /* Print the options used in the assembly file. */
89 extern char *version_string, *language_string;
101 output_option (file, type, name, pos)
107 int type_len = strlen (type);
108 int name_len = strlen (name);
110 if (1 + type_len + name_len + pos > MAX_LINE)
112 fprintf (file, "\n # %s%s", type, name);
113 return 3 + type_len + name_len;
115 fprintf (file, " %s%s", type, name);
116 return pos + 1 + type_len + name_len;
119 static struct { char *name; int value; } m_options[] = TARGET_SWITCHES;
122 output_options (file, f_options, f_len, W_options, W_len)
124 struct asm_option *f_options;
126 struct asm_option *W_options;
130 int flags = target_flags;
133 fprintf (file, " # %s %s", language_string, version_string);
138 sprintf (opt_string, "%d", optimize);
139 pos = output_option (file, "-O", opt_string, pos);
143 pos = output_option (file, "-p", "", pos);
145 if (profile_block_flag)
146 pos = output_option (file, "-a", "", pos);
148 if (inhibit_warnings)
149 pos = output_option (file, "-w", "", pos);
151 for (j = 0; j < f_len; j++)
153 if (*f_options[j].variable == f_options[j].on_value)
154 pos = output_option (file, "-f", f_options[j].string, pos);
157 for (j = 0; j < W_len; j++)
159 if (*W_options[j].variable == W_options[j].on_value)
160 pos = output_option (file, "-W", W_options[j].string, pos);
163 for (j = 0; j < sizeof m_options / sizeof m_options[0]; j++)
165 if (m_options[j].name[0] != '\0'
166 && m_options[j].value > 0
167 && ((m_options[j].value & flags) == m_options[j].value))
169 pos = output_option (file, "-m", m_options[j].name, pos);
170 flags &= ~ m_options[j].value;
174 if (rs6000_cpu_string != (char *)0)
175 pos = output_option (file, "-mcpu=", rs6000_cpu_string, pos);
177 fputs ("\n\n", file);
181 /* Override command line options. Mostly we process the processor
182 type and sometimes adjust other TARGET_ options. */
185 rs6000_override_options ()
189 /* Simplify the entries below by making a mask for any POWER
190 variant and any PowerPC variant. */
192 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
193 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
194 | MASK_PPC_GFXOPT | MASK_POWERPC64)
195 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
199 char *name; /* Canonical processor name. */
200 enum processor_type processor; /* Processor type enum value. */
201 int target_enable; /* Target flags to enable. */
202 int target_disable; /* Target flags to disable. */
203 } processor_target_table[]
204 = {{"common", PROCESSOR_COMMON, 0, POWER_MASKS | POWERPC_MASKS},
205 {"power", PROCESSOR_POWER,
206 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
207 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
208 {"powerpc", PROCESSOR_POWERPC,
209 MASK_POWERPC | MASK_NEW_MNEMONICS,
210 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
211 {"rios", PROCESSOR_RIOS1,
212 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
213 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
214 {"rios1", PROCESSOR_RIOS1,
215 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
216 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
217 {"rsc", PROCESSOR_PPC601,
218 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
219 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
220 {"rsc1", PROCESSOR_PPC601,
221 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
222 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
223 {"rios2", PROCESSOR_RIOS2,
224 MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2,
225 POWERPC_MASKS | MASK_NEW_MNEMONICS},
226 {"403", PROCESSOR_PPC403,
227 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
228 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
229 {"601", PROCESSOR_PPC601,
230 MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING,
231 MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
232 {"602", PROCESSOR_PPC602,
233 MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS,
234 MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
235 {"603", PROCESSOR_PPC603,
236 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
237 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
238 {"603e", PROCESSOR_PPC603,
239 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
240 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
241 {"604", PROCESSOR_PPC604,
242 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
243 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
244 {"620", PROCESSOR_PPC620,
245 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
246 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}};
248 int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt);
250 int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */
251 int string = TARGET_STRING; /* save current -mstring/-mno-string status */
253 profile_block_flag = 0;
255 /* Identify the processor type */
256 if (rs6000_cpu_string == 0)
257 rs6000_cpu = PROCESSOR_DEFAULT;
260 for (i = 0; i < ptt_size; i++)
261 if (! strcmp (rs6000_cpu_string, processor_target_table[i].name))
263 rs6000_cpu = processor_target_table[i].processor;
264 target_flags |= processor_target_table[i].target_enable;
265 target_flags &= ~processor_target_table[i].target_disable;
271 error ("bad value (%s) for -mcpu= switch", rs6000_cpu_string);
272 rs6000_cpu_string = "default";
273 rs6000_cpu = PROCESSOR_DEFAULT;
277 /* If -mmultiple or -mno-multiple was explicitly used, don't
278 override with the processor default */
279 if (TARGET_MULTIPLE_SET)
280 target_flags = (target_flags & ~MASK_MULTIPLE) | multiple;
282 /* If -mstring or -mno-string was explicitly used, don't
283 override with the processor default */
284 if (TARGET_STRING_SET)
285 target_flags = (target_flags & ~MASK_STRING) | string;
287 /* Don't allow -mmultiple or -mstring on little endian systems, because the
288 hardware doesn't support the instructions used in little endian mode */
289 if (!BYTES_BIG_ENDIAN)
293 target_flags &= ~MASK_MULTIPLE;
294 if (TARGET_MULTIPLE_SET)
295 warning ("-mmultiple is not supported on little endian systems");
300 target_flags &= ~MASK_STRING;
301 if (TARGET_STRING_SET)
302 warning ("-mstring is not supported on little endian systems");
306 #ifdef SUBTARGET_OVERRIDE_OPTIONS
307 SUBTARGET_OVERRIDE_OPTIONS;
311 /* Create a CONST_DOUBLE from a string. */
314 rs6000_float_const (string, mode)
316 enum machine_mode mode;
318 REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode);
319 return immed_real_const_1 (value, mode);
323 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
324 two parts of the constant if the target is little endian. */
327 rs6000_immed_double_const (i0, i1, mode)
328 HOST_WIDE_INT i0, i1;
329 enum machine_mode mode;
331 if (! WORDS_BIG_ENDIAN)
332 return immed_double_const (i1, i0, mode);
334 return immed_double_const (i0, i1, mode);
338 /* Return non-zero if this function is known to have a null epilogue. */
343 if (reload_completed)
345 rs6000_stack_t *info = rs6000_stack_info ();
347 if (info->first_gp_reg_save == 32
348 && info->first_fp_reg_save == 64
358 /* Returns 1 always. */
361 any_operand (op, mode)
363 enum machine_mode mode;
368 /* Returns 1 if op is the count register */
369 int count_register_operand(op, mode)
371 enum machine_mode mode;
373 if (GET_CODE (op) != REG)
376 if (REGNO (op) == COUNT_REGISTER_REGNUM)
379 if (REGNO (op) > FIRST_PSEUDO_REGISTER)
385 /* Return 1 if OP is a constant that can fit in a D field. */
388 short_cint_operand (op, mode)
390 enum machine_mode mode;
392 return (GET_CODE (op) == CONST_INT
393 && (unsigned) (INTVAL (op) + 0x8000) < 0x10000);
396 /* Similar for a unsigned D field. */
399 u_short_cint_operand (op, mode)
401 enum machine_mode mode;
403 return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0);
406 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
409 non_short_cint_operand (op, mode)
411 enum machine_mode mode;
413 return (GET_CODE (op) == CONST_INT
414 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000);
417 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
421 gpc_reg_operand (op, mode)
423 enum machine_mode mode;
425 return (register_operand (op, mode)
426 && (GET_CODE (op) != REG || REGNO (op) >= 67 || REGNO (op) < 64));
429 /* Returns 1 if OP is either a pseudo-register or a register denoting a
433 cc_reg_operand (op, mode)
435 enum machine_mode mode;
437 return (register_operand (op, mode)
438 && (GET_CODE (op) != REG
439 || REGNO (op) >= FIRST_PSEUDO_REGISTER
440 || CR_REGNO_P (REGNO (op))));
443 /* Returns 1 if OP is either a constant integer valid for a D-field or a
444 non-special register. If a register, it must be in the proper mode unless
448 reg_or_short_operand (op, mode)
450 enum machine_mode mode;
452 return short_cint_operand (op, mode) || gpc_reg_operand (op, mode);
455 /* Similar, except check if the negation of the constant would be valid for
459 reg_or_neg_short_operand (op, mode)
461 enum machine_mode mode;
463 if (GET_CODE (op) == CONST_INT)
464 return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
466 return gpc_reg_operand (op, mode);
469 /* Return 1 if the operand is either a register or an integer whose high-order
473 reg_or_u_short_operand (op, mode)
475 enum machine_mode mode;
477 if (GET_CODE (op) == CONST_INT
478 && (INTVAL (op) & 0xffff0000) == 0)
481 return gpc_reg_operand (op, mode);
484 /* Return 1 is the operand is either a non-special register or ANY
488 reg_or_cint_operand (op, mode)
490 enum machine_mode mode;
492 return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
495 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
496 with one instruction per word. We only do this if we can safely read
497 CONST_DOUBLE_{LOW,HIGH}. */
500 easy_fp_constant (op, mode)
502 register enum machine_mode mode;
506 if (GET_CODE (op) != CONST_DOUBLE
507 || GET_MODE (op) != mode
508 || GET_MODE_CLASS (mode) != MODE_FLOAT)
511 /* Consider all constants with -msoft-float to be easy */
512 if (TARGET_SOFT_FLOAT)
515 high = operand_subword (op, 0, 0, mode);
516 low = operand_subword (op, 1, 0, mode);
518 if (high == 0 || ! input_operand (high, word_mode))
521 return (mode == SFmode
522 || (low != 0 && input_operand (low, word_mode)));
525 /* Return 1 if the operand is in volatile memory. Note that during the
526 RTL generation phase, memory_operand does not return TRUE for
527 volatile memory references. So this function allows us to
528 recognize volatile references where its safe. */
531 volatile_mem_operand (op, mode)
533 enum machine_mode mode;
535 if (GET_CODE (op) != MEM)
538 if (!MEM_VOLATILE_P (op))
541 if (mode != GET_MODE (op))
544 if (reload_completed)
545 return memory_operand (op, mode);
547 if (reload_in_progress)
548 return strict_memory_address_p (mode, XEXP (op, 0));
550 return memory_address_p (mode, XEXP (op, 0));
553 /* Return 1 if the operand is an offsettable memory address. */
556 offsettable_addr_operand (op, mode)
558 enum machine_mode mode;
560 return offsettable_address_p (reload_completed | reload_in_progress,
564 /* Return 1 if the operand is either a floating-point register, a pseudo
565 register, or memory. */
568 fp_reg_or_mem_operand (op, mode)
570 enum machine_mode mode;
572 return (memory_operand (op, mode)
573 || volatile_mem_operand (op, mode)
574 || (register_operand (op, mode)
575 && (GET_CODE (op) != REG
576 || REGNO (op) >= FIRST_PSEUDO_REGISTER
577 || FP_REGNO_P (REGNO (op)))));
580 /* Return 1 if the operand is either an easy FP constant (see above) or
584 mem_or_easy_const_operand (op, mode)
586 enum machine_mode mode;
588 return memory_operand (op, mode) || easy_fp_constant (op, mode);
591 /* Return 1 if the operand is either a non-special register or an item
592 that can be used as the operand of an SI add insn. */
595 add_operand (op, mode)
597 enum machine_mode mode;
599 return (reg_or_short_operand (op, mode)
600 || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0));
603 /* Return 1 if OP is a constant but not a valid add_operand. */
606 non_add_cint_operand (op, mode)
608 enum machine_mode mode;
610 return (GET_CODE (op) == CONST_INT
611 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000
612 && (INTVAL (op) & 0xffff) != 0);
615 /* Return 1 if the operand is a non-special register or a constant that
616 can be used as the operand of an OR or XOR insn on the RS/6000. */
619 logical_operand (op, mode)
621 enum machine_mode mode;
623 return (gpc_reg_operand (op, mode)
624 || (GET_CODE (op) == CONST_INT
625 && ((INTVAL (op) & 0xffff0000) == 0
626 || (INTVAL (op) & 0xffff) == 0)));
629 /* Return 1 if C is a constant that is not a logical operand (as
633 non_logical_cint_operand (op, mode)
635 enum machine_mode mode;
637 return (GET_CODE (op) == CONST_INT
638 && (INTVAL (op) & 0xffff0000) != 0
639 && (INTVAL (op) & 0xffff) != 0);
642 /* Return 1 if C is a constant that can be encoded in a mask on the
643 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
644 Reject all ones and all zeros, since these should have been optimized
645 away and confuse the making of MB and ME. */
655 if (c == 0 || c == ~0)
658 last_bit_value = c & 1;
660 for (i = 1; i < 32; i++)
661 if (((c >>= 1) & 1) != last_bit_value)
662 last_bit_value ^= 1, transitions++;
664 return transitions <= 2;
667 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
670 mask_operand (op, mode)
672 enum machine_mode mode;
674 return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
677 /* Return 1 if the operand is either a non-special register or a
678 constant that can be used as the operand of an RS/6000 logical AND insn. */
681 and_operand (op, mode)
683 enum machine_mode mode;
685 return (reg_or_short_operand (op, mode)
686 || logical_operand (op, mode)
687 || mask_operand (op, mode));
690 /* Return 1 if the operand is a constant but not a valid operand for an AND
694 non_and_cint_operand (op, mode)
696 enum machine_mode mode;
698 return GET_CODE (op) == CONST_INT && ! and_operand (op, mode);
701 /* Return 1 if the operand is a general register or memory operand. */
704 reg_or_mem_operand (op, mode)
706 register enum machine_mode mode;
708 return (gpc_reg_operand (op, mode)
709 || memory_operand (op, mode)
710 || volatile_mem_operand (op, mode));
713 /* Return 1 if the operand is a general register or memory operand without
714 pre-inc or pre_dec which produces invalid form of PowerPC lwa
718 lwa_operand (op, mode)
720 register enum machine_mode mode;
724 if (reload_completed && GET_CODE (inner) == SUBREG)
725 inner = SUBREG_REG (inner);
727 return gpc_reg_operand (inner, mode)
728 || (memory_operand (inner, mode)
729 && GET_CODE (XEXP (inner, 0)) != PRE_INC
730 && GET_CODE (XEXP (inner, 0)) != PRE_DEC);
733 /* Return 1 if the operand, used inside a MEM, is a valid first argument
734 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
738 call_operand (op, mode)
740 enum machine_mode mode;
742 if (mode != VOIDmode && GET_MODE (op) != mode)
745 return (GET_CODE (op) == SYMBOL_REF
746 || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER));
750 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
754 current_file_function_operand (op, mode)
756 enum machine_mode mode;
758 return (GET_CODE (op) == SYMBOL_REF
759 && (SYMBOL_REF_FLAG (op)
760 || op == XEXP (DECL_RTL (current_function_decl), 0)));
764 /* Return 1 if this operand is a valid input for a move insn. */
767 input_operand (op, mode)
769 enum machine_mode mode;
771 /* Memory is always valid. */
772 if (memory_operand (op, mode))
775 /* For floating-point, easy constants are valid. */
776 if (GET_MODE_CLASS (mode) == MODE_FLOAT
778 && easy_fp_constant (op, mode))
781 /* For floating-point or multi-word mode, the only remaining valid type
783 if (GET_MODE_CLASS (mode) == MODE_FLOAT
784 || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
785 return register_operand (op, mode);
787 /* The only cases left are integral modes one word or smaller (we
788 do not get called for MODE_CC values). These can be in any
790 if (register_operand (op, mode))
793 /* For integer modes, any constant is ok. */
794 if (GET_CODE (op) == CONST_INT)
797 /* A SYMBOL_REF referring to the TOC is valid. */
798 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op))
801 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
802 directly in the instruction stream */
803 if (DEFAULT_ABI == ABI_NT
804 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF))
807 /* Otherwise, we will be doing this SET with an add, so anything valid
808 for an add will be valid. */
809 return add_operand (op, mode);
812 /* Initialize a variable CUM of type CUMULATIVE_ARGS
813 for a call to a function whose data type is FNTYPE.
814 For a library call, FNTYPE is 0.
816 For incoming args we set the number of arguments in the prototype large
817 so we never return an EXPR_LIST. */
820 init_cumulative_args (cum, fntype, libname, incoming)
821 CUMULATIVE_ARGS *cum;
826 static CUMULATIVE_ARGS zero_cumulative;
828 *cum = zero_cumulative;
830 cum->fregno = FP_ARG_MIN_REG;
831 cum->prototype = (fntype && TYPE_ARG_TYPES (fntype));
835 cum->nargs_prototype = 1000; /* don't return an EXPR_LIST */
836 #ifdef TARGET_V4_CALLS
838 cum->varargs_offset = RS6000_VARARGS_OFFSET;
842 else if (cum->prototype)
843 cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1
844 + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode
845 || RETURN_IN_MEMORY (TREE_TYPE (fntype))));
848 cum->nargs_prototype = 0;
850 cum->orig_nargs = cum->nargs_prototype;
851 if (TARGET_DEBUG_ARG)
853 fprintf (stderr, "\ninit_cumulative_args:");
856 tree ret_type = TREE_TYPE (fntype);
857 fprintf (stderr, " ret code = %s,",
858 tree_code_name[ (int)TREE_CODE (ret_type) ]);
861 #ifdef TARGET_V4_CALLS
862 if (TARGET_V4_CALLS && incoming)
863 fprintf (stderr, " varargs = %d, ", cum->varargs_offset);
866 fprintf (stderr, " proto = %d, nargs = %d\n",
867 cum->prototype, cum->nargs_prototype);
871 /* If defined, a C expression that gives the alignment boundary, in bits,
872 of an argument with the specified mode and type. If it is not defined,
873 PARM_BOUNDARY is used for all arguments.
875 Windows NT wants anything >= 8 bytes to be double word aligned. */
878 function_arg_boundary (mode, type)
879 enum machine_mode mode;
882 if (DEFAULT_ABI != ABI_NT || TARGET_64BIT)
883 return PARM_BOUNDARY;
886 return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32;
888 return (int_size_in_bytes (type) >= 8) ? 64 : 32;
891 /* Update the data in CUM to advance over an argument
892 of mode MODE and data type TYPE.
893 (TYPE is null for libcalls where that information may not be available.) */
896 function_arg_advance (cum, mode, type, named)
897 CUMULATIVE_ARGS *cum;
898 enum machine_mode mode;
902 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
904 cum->nargs_prototype--;
906 #ifdef TARGET_V4_CALLS
909 /* Long longs must not be split between registers and stack */
910 if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT)
911 && type && !AGGREGATE_TYPE_P (type)
912 && cum->words < GP_ARG_NUM_REG
913 && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
915 cum->words = GP_ARG_NUM_REG;
918 /* Aggregates get passed as pointers */
919 if (type && AGGREGATE_TYPE_P (type))
922 /* Floats go in registers, & don't occupy space in the GP registers
923 like they do for AIX unless software floating point. */
924 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
926 && cum->fregno <= FP_ARG_V4_MAX_REG)
930 cum->words += RS6000_ARG_SIZE (mode, type, 1);
936 cum->words += RS6000_ARG_SIZE (mode, type, named);
937 if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT)
941 if (TARGET_DEBUG_ARG)
943 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
944 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
947 /* Determine where to put an argument to a function.
948 Value is zero to push the argument on the stack,
949 or a hard register in which to store the argument.
951 MODE is the argument's machine mode.
952 TYPE is the data type of the argument (as a tree).
953 This is null for libcalls where that information may
955 CUM is a variable of type CUMULATIVE_ARGS which gives info about
956 the preceding args and about the function being called.
957 NAMED is nonzero if this argument is a named parameter
958 (otherwise it is an extra parameter matching an ellipsis).
960 On RS/6000 the first eight words of non-FP are normally in registers
961 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
962 Under V.4, the first 8 FP args are in registers.
964 If this is floating-point and no prototype is specified, we use
965 both an FP and integer register (or possibly FP reg and stack). Library
966 functions (when TYPE is zero) always have the proper types for args,
967 so we can pass the FP value just in one register. emit_library_function
968 doesn't support EXPR_LIST anyway. */
971 function_arg (cum, mode, type, named)
972 CUMULATIVE_ARGS *cum;
973 enum machine_mode mode;
977 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
978 int align_words = cum->words + align;
980 if (TARGET_DEBUG_ARG)
982 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
983 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
985 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
986 uses to say fp args were passed in registers. Assume that we don't need the
987 marker for software floating point, or compiler generated library calls. */
988 if (mode == VOIDmode)
990 #ifdef TARGET_V4_CALLS
991 if (TARGET_V4_CALLS && TARGET_HARD_FLOAT && cum->nargs_prototype < 0
992 && type && (cum->prototype || TARGET_NO_PROTOTYPE))
993 return GEN_INT ((cum->fregno == FP_ARG_MIN_REG) ? -1 : 1);
1001 #ifdef TARGET_V4_CALLS
1002 if (!TARGET_V4_CALLS)
1007 if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
1010 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1012 if ((cum->nargs_prototype > 0)
1013 #ifdef TARGET_V4_CALLS
1014 || TARGET_V4_CALLS /* V.4 never passes FP values in GP registers */
1017 return gen_rtx (REG, mode, cum->fregno);
1019 return gen_rtx (EXPR_LIST, VOIDmode,
1020 ((align_words < GP_ARG_NUM_REG)
1021 ? gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words)
1023 gen_rtx (REG, mode, cum->fregno));
1026 #ifdef TARGET_V4_CALLS
1027 /* Long longs won't be split between register and stack */
1028 else if (TARGET_V4_CALLS &&
1029 align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
1035 else if (align_words < GP_ARG_NUM_REG)
1036 return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words);
1041 /* For an arg passed partly in registers and partly in memory,
1042 this is the number of registers used.
1043 For args passed entirely in registers or entirely in memory, zero. */
1046 function_arg_partial_nregs (cum, mode, type, named)
1047 CUMULATIVE_ARGS *cum;
1048 enum machine_mode mode;
1055 #ifdef TARGET_V4_CALLS
1056 if (TARGET_V4_CALLS)
1060 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1062 if (cum->nargs_prototype >= 0)
1066 if (cum->words < GP_ARG_NUM_REG
1067 && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named)))
1069 int ret = GP_ARG_NUM_REG - cum->words;
1070 if (ret && TARGET_DEBUG_ARG)
1071 fprintf (stderr, "function_arg_partial_nregs: %d\n", ret);
1079 /* A C expression that indicates when an argument must be passed by
1080 reference. If nonzero for an argument, a copy of that argument is
1081 made in memory and a pointer to the argument is passed instead of
1082 the argument itself. The pointer is passed in whatever way is
1083 appropriate for passing a pointer to that type.
1085 Under V.4, structures and unions are passed by reference. */
1088 function_arg_pass_by_reference (cum, mode, type, named)
1089 CUMULATIVE_ARGS *cum;
1090 enum machine_mode mode;
1094 #ifdef TARGET_V4_CALLS
1095 if (TARGET_V4_CALLS && type && AGGREGATE_TYPE_P (type))
1097 if (TARGET_DEBUG_ARG)
1098 fprintf (stderr, "function_arg_pass_by_reference: aggregate\n");
1108 /* Perform any needed actions needed for a function that is receiving a
1109 variable number of arguments.
1113 MODE and TYPE are the mode and type of the current parameter.
1115 PRETEND_SIZE is a variable that should be set to the amount of stack
1116 that must be pushed by the prolog to pretend that our caller pushed
1119 Normally, this macro will push all remaining incoming registers on the
1120 stack and set PRETEND_SIZE to the length of the registers pushed. */
1123 setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
1124 CUMULATIVE_ARGS *cum;
1125 enum machine_mode mode;
1131 rtx save_area = virtual_incoming_args_rtx;
1132 int reg_size = (TARGET_64BIT) ? 8 : 4;
1134 if (TARGET_DEBUG_ARG)
1136 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1137 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl);
1139 #ifdef TARGET_V4_CALLS
1140 if (TARGET_V4_CALLS && !no_rtl)
1142 rs6000_sysv_varargs_p = 1;
1143 save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET);
1149 int first_reg_offset = cum->words;
1151 if (MUST_PASS_IN_STACK (mode, type))
1152 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1);
1154 if (first_reg_offset > GP_ARG_NUM_REG)
1155 first_reg_offset = GP_ARG_NUM_REG;
1157 if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG)
1159 (GP_ARG_MIN_REG + first_reg_offset,
1160 gen_rtx (MEM, BLKmode,
1161 plus_constant (save_area, first_reg_offset * reg_size)),
1162 GP_ARG_NUM_REG - first_reg_offset,
1163 (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD);
1165 *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD;
1168 #ifdef TARGET_V4_CALLS
1169 /* Save FP registers if needed. */
1170 if (TARGET_V4_CALLS && TARGET_HARD_FLOAT && !no_rtl)
1172 int fregno = cum->fregno;
1173 int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno;
1175 if (num_fp_reg >= 0)
1177 rtx cr1 = gen_rtx (REG, CCmode, 69);
1178 rtx lab = gen_label_rtx ();
1179 int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8);
1181 emit_jump_insn (gen_rtx (SET, VOIDmode,
1183 gen_rtx (IF_THEN_ELSE, VOIDmode,
1184 gen_rtx (NE, VOIDmode, cr1, const0_rtx),
1185 gen_rtx (LABEL_REF, VOIDmode, lab),
1188 while ( num_fp_reg-- >= 0)
1190 emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)),
1191 gen_rtx (REG, DFmode, fregno++));
1201 /* If defined, is a C expression that produces the machine-specific
1202 code for a call to `__builtin_saveregs'. This code will be moved
1203 to the very beginning of the function, before any parameter access
1204 are made. The return value of this function should be an RTX that
1205 contains the value to use as the return of `__builtin_saveregs'.
1207 The argument ARGS is a `tree_list' containing the arguments that
1208 were passed to `__builtin_saveregs'.
1210 If this macro is not defined, the compiler will output an ordinary
1211 call to the library function `__builtin_saveregs'.
1213 On the Power/PowerPC return the address of the area on the stack
1214 used to hold arguments. Under AIX, this includes the 8 word register
1215 save area. Under V.4 this does not. */
1218 expand_builtin_saveregs (args)
1221 return virtual_incoming_args_rtx;
1225 /* Allocate a stack temp. Only allocate one stack temp per type for a
1229 rs6000_stack_temp (mode, size)
1230 enum machine_mode mode;
1233 rtx temp = stack_temps[ (int)mode ];
1236 if (temp == NULL_RTX)
1238 temp = assign_stack_local (mode, size, 0);
1239 addr = XEXP (temp, 0);
1241 if ((size > 4 && !offsettable_address_p (0, mode, addr))
1242 || (size <= 4 && !memory_address_p (mode, addr)))
1244 XEXP (temp, 0) = copy_addr_to_reg (addr);
1247 stack_temps[ (int)mode ] = temp;
1254 /* Generate a memory reference for expand_block_move, copying volatile,
1255 and other bits from an original memory reference. */
1258 expand_block_move_mem (mode, addr, orig_mem)
1259 enum machine_mode mode;
1263 rtx mem = gen_rtx (MEM, mode, addr);
1265 RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem);
1266 MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem);
1267 MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem);
1268 #ifdef MEM_UNALIGNED_P
1269 MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem);
1274 /* Expand a block move operation, and return 1 if successful. Return 0
1275 if we should let the compiler generate normal code.
1277 operands[0] is the destination
1278 operands[1] is the source
1279 operands[2] is the length
1280 operands[3] is the alignment */
1282 #define MAX_MOVE_REG 4
1285 expand_block_move (operands)
1288 rtx orig_dest = operands[0];
1289 rtx orig_src = operands[1];
1290 rtx bytes_rtx = operands[2];
1291 rtx align_rtx = operands[3];
1292 int constp = (GET_CODE (bytes_rtx) == CONST_INT);
1293 int align = XINT (align_rtx, 0);
1303 rtx stores[MAX_MOVE_REG];
1306 /* If this is not a fixed size move, just call memcpy */
1310 /* Anything to move? */
1311 bytes = INTVAL (bytes_rtx);
1315 /* Don't support real large moves. If string instructions are not used,
1316 then don't generate more than 8 loads. */
1322 else if (!STRICT_ALIGNMENT)
1327 else if (bytes > 8*align)
1330 /* Move the address into scratch registers. */
1331 dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0));
1332 src_reg = copy_addr_to_reg (XEXP (orig_src, 0));
1334 if (TARGET_STRING) /* string instructions are available */
1336 for ( ; bytes > 0; bytes -= move_bytes)
1338 if (bytes > 24 /* move up to 32 bytes at a time */
1348 move_bytes = (bytes > 32) ? 32 : bytes;
1349 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1350 expand_block_move_mem (BLKmode, src_reg, orig_src),
1351 GEN_INT ((move_bytes == 32) ? 0 : move_bytes),
1354 else if (bytes > 16 /* move up to 24 bytes at a time */
1362 move_bytes = (bytes > 24) ? 24 : bytes;
1363 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1364 expand_block_move_mem (BLKmode, src_reg, orig_src),
1365 GEN_INT (move_bytes),
1368 else if (bytes > 8 /* move up to 16 bytes at a time */
1374 move_bytes = (bytes > 16) ? 16 : bytes;
1375 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1376 expand_block_move_mem (BLKmode, src_reg, orig_src),
1377 GEN_INT (move_bytes),
1380 else if (bytes > 4 && !TARGET_64BIT)
1381 { /* move up to 8 bytes at a time */
1382 move_bytes = (bytes > 8) ? 8 : bytes;
1383 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1384 expand_block_move_mem (BLKmode, src_reg, orig_src),
1385 GEN_INT (move_bytes),
1388 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1389 { /* move 4 bytes */
1391 tmp_reg = gen_reg_rtx (SImode);
1392 emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src));
1393 emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg);
1395 else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT))
1396 { /* move 2 bytes */
1398 tmp_reg = gen_reg_rtx (HImode);
1399 emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src));
1400 emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg);
1402 else if (bytes == 1) /* move 1 byte */
1405 tmp_reg = gen_reg_rtx (QImode);
1406 emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src));
1407 emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg);
1410 { /* move up to 4 bytes at a time */
1411 move_bytes = (bytes > 4) ? 4 : bytes;
1412 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1413 expand_block_move_mem (BLKmode, src_reg, orig_src),
1414 GEN_INT (move_bytes),
1418 if (bytes > move_bytes)
1420 emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes)));
1421 emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes)));
1426 else /* string instructions not available */
1428 num_reg = offset = 0;
1429 for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes))
1431 /* Calculate the correct offset for src/dest */
1435 dest_addr = dest_reg;
1439 src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset));
1440 dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset));
1443 /* Generate the appropriate load and store, saving the stores for later */
1444 if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT))
1447 tmp_reg = gen_reg_rtx (DImode);
1448 emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src)));
1449 stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg);
1451 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1454 tmp_reg = gen_reg_rtx (SImode);
1455 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src)));
1456 stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg);
1458 else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT))
1461 tmp_reg = gen_reg_rtx (HImode);
1462 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src)));
1463 stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg);
1468 tmp_reg = gen_reg_rtx (QImode);
1469 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src)));
1470 stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg);
1473 if (num_reg >= MAX_MOVE_REG)
1475 for (i = 0; i < num_reg; i++)
1476 emit_insn (stores[i]);
1481 for (i = 0; i < num_reg; i++)
1482 emit_insn (stores[i]);
1489 /* Return 1 if OP is a load multiple operation. It is known to be a
1490 PARALLEL and the first section will be tested. */
1493 load_multiple_operation (op, mode)
1495 enum machine_mode mode;
1497 int count = XVECLEN (op, 0);
1502 /* Perform a quick check so we don't blow up below. */
1504 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1505 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1506 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1509 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1510 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1512 for (i = 1; i < count; i++)
1514 rtx elt = XVECEXP (op, 0, i);
1516 if (GET_CODE (elt) != SET
1517 || GET_CODE (SET_DEST (elt)) != REG
1518 || GET_MODE (SET_DEST (elt)) != SImode
1519 || REGNO (SET_DEST (elt)) != dest_regno + i
1520 || GET_CODE (SET_SRC (elt)) != MEM
1521 || GET_MODE (SET_SRC (elt)) != SImode
1522 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1523 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1524 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1525 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
1532 /* Similar, but tests for store multiple. Here, the second vector element
1533 is a CLOBBER. It will be tested later. */
1536 store_multiple_operation (op, mode)
1538 enum machine_mode mode;
1540 int count = XVECLEN (op, 0) - 1;
1545 /* Perform a quick check so we don't blow up below. */
1547 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1548 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1549 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1552 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1553 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1555 for (i = 1; i < count; i++)
1557 rtx elt = XVECEXP (op, 0, i + 1);
1559 if (GET_CODE (elt) != SET
1560 || GET_CODE (SET_SRC (elt)) != REG
1561 || GET_MODE (SET_SRC (elt)) != SImode
1562 || REGNO (SET_SRC (elt)) != src_regno + i
1563 || GET_CODE (SET_DEST (elt)) != MEM
1564 || GET_MODE (SET_DEST (elt)) != SImode
1565 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1566 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1567 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1568 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
1575 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1576 We only check the opcode against the mode of the CC value here. */
1579 branch_comparison_operator (op, mode)
1581 enum machine_mode mode;
1583 enum rtx_code code = GET_CODE (op);
1584 enum machine_mode cc_mode;
1586 if (GET_RTX_CLASS (code) != '<')
1589 cc_mode = GET_MODE (XEXP (op, 0));
1590 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1593 if ((code == GT || code == LT || code == GE || code == LE)
1594 && cc_mode == CCUNSmode)
1597 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1598 && (cc_mode != CCUNSmode))
1604 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1605 We check the opcode against the mode of the CC value and disallow EQ or
1606 NE comparisons for integers. */
1609 scc_comparison_operator (op, mode)
1611 enum machine_mode mode;
1613 enum rtx_code code = GET_CODE (op);
1614 enum machine_mode cc_mode;
1616 if (GET_MODE (op) != mode && mode != VOIDmode)
1619 if (GET_RTX_CLASS (code) != '<')
1622 cc_mode = GET_MODE (XEXP (op, 0));
1623 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1626 if (code == NE && cc_mode != CCFPmode)
1629 if ((code == GT || code == LT || code == GE || code == LE)
1630 && cc_mode == CCUNSmode)
1633 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1634 && (cc_mode != CCUNSmode))
1637 if (cc_mode == CCEQmode && code != EQ && code != NE)
1643 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1644 mask required to convert the result of a rotate insn into a shift
1645 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1648 includes_lshift_p (shiftop, andop)
1649 register rtx shiftop;
1652 int shift_mask = (~0 << INTVAL (shiftop));
1654 return (INTVAL (andop) & ~shift_mask) == 0;
1657 /* Similar, but for right shift. */
1660 includes_rshift_p (shiftop, andop)
1661 register rtx shiftop;
1664 unsigned shift_mask = ~0;
1666 shift_mask >>= INTVAL (shiftop);
1668 return (INTVAL (andop) & ~ shift_mask) == 0;
1671 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1672 for lfq and stfq insns.
1674 Note reg1 and reg2 *must* be hard registers. To be sure we will
1675 abort if we are passed pseudo registers. */
1678 registers_ok_for_quad_peep (reg1, reg2)
1681 /* We might have been passed a SUBREG. */
1682 if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG)
1685 return (REGNO (reg1) == REGNO (reg2) - 1);
1688 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1689 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1692 addrs_ok_for_quad_peep (addr1, addr2)
1699 /* Extract an offset (if used) from the first addr. */
1700 if (GET_CODE (addr1) == PLUS)
1702 /* If not a REG, return zero. */
1703 if (GET_CODE (XEXP (addr1, 0)) != REG)
1707 reg1 = REGNO (XEXP (addr1, 0));
1708 /* The offset must be constant! */
1709 if (GET_CODE (XEXP (addr1, 1)) != CONST_INT)
1711 offset1 = INTVAL (XEXP (addr1, 1));
1714 else if (GET_CODE (addr1) != REG)
1718 reg1 = REGNO (addr1);
1719 /* This was a simple (mem (reg)) expression. Offset is 0. */
1723 /* Make sure the second address is a (mem (plus (reg) (const_int). */
1724 if (GET_CODE (addr2) != PLUS)
1727 if (GET_CODE (XEXP (addr2, 0)) != REG
1728 || GET_CODE (XEXP (addr2, 1)) != CONST_INT)
1731 if (reg1 != REGNO (XEXP (addr2, 0)))
1734 /* The offset for the second addr must be 8 more than the first addr. */
1735 if (INTVAL (XEXP (addr2, 1)) != offset1 + 8)
1738 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
1743 /* Return the register class of a scratch register needed to copy IN into
1744 or out of a register in CLASS in MODE. If it can be done directly,
1745 NO_REGS is returned. */
1748 secondary_reload_class (class, mode, in)
1749 enum reg_class class;
1750 enum machine_mode mode;
1753 int regno = true_regnum (in);
1755 if (regno >= FIRST_PSEUDO_REGISTER)
1758 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
1760 if (class == GENERAL_REGS || class == BASE_REGS
1761 || (regno >= 0 && INT_REGNO_P (regno)))
1764 /* Constants, memory, and FP registers can go into FP registers. */
1765 if ((regno == -1 || FP_REGNO_P (regno))
1766 && (class == FLOAT_REGS || class == NON_SPECIAL_REGS))
1769 /* We can copy among the CR registers. */
1770 if ((class == CR_REGS || class == CR0_REGS)
1771 && regno >= 0 && CR_REGNO_P (regno))
1774 /* Otherwise, we need GENERAL_REGS. */
1775 return GENERAL_REGS;
1778 /* Given a comparison operation, return the bit number in CCR to test. We
1779 know this is a valid comparison.
1781 SCC_P is 1 if this is for an scc. That means that %D will have been
1782 used instead of %C, so the bits will be in different places.
1784 Return -1 if OP isn't a valid comparison for some reason. */
1791 enum rtx_code code = GET_CODE (op);
1792 enum machine_mode cc_mode;
1796 if (GET_RTX_CLASS (code) != '<')
1799 cc_mode = GET_MODE (XEXP (op, 0));
1800 cc_regnum = REGNO (XEXP (op, 0));
1801 base_bit = 4 * (cc_regnum - 68);
1803 /* In CCEQmode cases we have made sure that the result is always in the
1804 third bit of the CR field. */
1806 if (cc_mode == CCEQmode)
1807 return base_bit + 3;
1812 return scc_p ? base_bit + 3 : base_bit + 2;
1814 return base_bit + 2;
1816 return base_bit + 1;
1821 /* If floating-point, we will have done a cror to put the bit in the
1822 unordered position. So test that bit. For integer, this is ! LT
1823 unless this is an scc insn. */
1824 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit;
1827 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1;
1834 /* Print an operand. Recognize special options, documented below. */
1837 print_operand (file, x, code)
1845 /* These macros test for integers and extract the low-order bits. */
1847 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
1848 && GET_MODE (X) == VOIDmode)
1850 #define INT_LOWPART(X) \
1851 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
1856 /* Write out an instruction after the call which may be replaced
1857 with glue code by the loader. This depends on the AIX version. */
1858 asm_fprintf (file, RS6000_CALL_GLUE);
1862 /* Write the register number of the TOC register. */
1863 fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file);
1867 /* If X is a constant integer whose low-order 5 bits are zero,
1868 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
1869 in the AIX assembler where "sri" with a zero shift count
1870 write a trash instruction. */
1871 if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0)
1878 /* Low-order 16 bits of constant, unsigned. */
1880 output_operand_lossage ("invalid %%b value");
1882 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
1886 /* This is an optional cror needed for LE or GE floating-point
1887 comparisons. Otherwise write nothing. */
1888 if ((GET_CODE (x) == LE || GET_CODE (x) == GE)
1889 && GET_MODE (XEXP (x, 0)) == CCFPmode)
1891 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1893 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
1894 base_bit + 2, base_bit + (GET_CODE (x) == GE));
1899 /* Similar, except that this is for an scc, so we must be able to
1900 encode the test in a single bit that is one. We do the above
1901 for any LE, GE, GEU, or LEU and invert the bit for NE. */
1902 if (GET_CODE (x) == LE || GET_CODE (x) == GE
1903 || GET_CODE (x) == LEU || GET_CODE (x) == GEU)
1905 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1907 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
1909 base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU));
1912 else if (GET_CODE (x) == NE)
1914 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1916 fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3,
1917 base_bit + 2, base_bit + 2);
1922 /* X is a CR register. Print the number of the third bit of the CR */
1923 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
1924 output_operand_lossage ("invalid %%E value");
1926 fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3);
1930 /* X is a CR register. Print the shift count needed to move it
1931 to the high-order four bits. */
1932 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
1933 output_operand_lossage ("invalid %%f value");
1935 fprintf (file, "%d", 4 * (REGNO (x) - 68));
1939 /* Similar, but print the count for the rotate in the opposite
1941 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
1942 output_operand_lossage ("invalid %%F value");
1944 fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68));
1948 /* X is a constant integer. If it is negative, print "m",
1949 otherwise print "z". This is to make a aze or ame insn. */
1950 if (GET_CODE (x) != CONST_INT)
1951 output_operand_lossage ("invalid %%G value");
1952 else if (INTVAL (x) >= 0)
1959 /* If constant, output low-order five bits. Otherwise,
1962 fprintf (file, "%d", INT_LOWPART (x) & 31);
1964 print_operand (file, x, 0);
1968 /* Print `i' if this is a constant, else nothing. */
1974 /* Write the bit number in CCR for jump. */
1977 output_operand_lossage ("invalid %%j code");
1979 fprintf (file, "%d", i);
1983 /* Similar, but add one for shift count in rlinm for scc and pass
1984 scc flag to `ccr_bit'. */
1987 output_operand_lossage ("invalid %%J code");
1989 /* If we want bit 31, write a shift count of zero, not 32. */
1990 fprintf (file, "%d", i == 31 ? 0 : i + 1);
1994 /* X must be a constant. Write the 1's complement of the
1997 output_operand_lossage ("invalid %%k value");
1999 fprintf (file, "%d", ~ INT_LOWPART (x));
2003 /* Write second word of DImode or DFmode reference. Works on register
2004 or non-indexed memory only. */
2005 if (GET_CODE (x) == REG)
2006 fprintf (file, "%d", REGNO (x) + 1);
2007 else if (GET_CODE (x) == MEM)
2009 /* Handle possible auto-increment. Since it is pre-increment and
2010 we have already done it, we can just use an offset of four. */
2011 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2012 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2013 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4));
2015 output_address (plus_constant (XEXP (x, 0), 4));
2020 /* MB value for a mask operand. */
2021 if (! mask_operand (x, VOIDmode))
2022 output_operand_lossage ("invalid %%m value");
2024 val = INT_LOWPART (x);
2026 /* If the high bit is set and the low bit is not, the value is zero.
2027 If the high bit is zero, the value is the first 1 bit we find from
2029 if (val < 0 && (val & 1) == 0)
2031 fprintf (file, "0");
2036 for (i = 1; i < 32; i++)
2037 if ((val <<= 1) < 0)
2039 fprintf (file, "%d", i);
2043 /* Otherwise, look for the first 0 bit from the right. The result is its
2044 number plus 1. We know the low-order bit is one. */
2045 for (i = 0; i < 32; i++)
2046 if (((val >>= 1) & 1) == 0)
2049 /* If we ended in ...01, I would be 0. The correct value is 31, so
2051 fprintf (file, "%d", 31 - i);
2055 /* ME value for a mask operand. */
2056 if (! mask_operand (x, VOIDmode))
2057 output_operand_lossage ("invalid %%m value");
2059 val = INT_LOWPART (x);
2061 /* If the low bit is set and the high bit is not, the value is 31.
2062 If the low bit is zero, the value is the first 1 bit we find from
2064 if ((val & 1) && val >= 0)
2069 else if ((val & 1) == 0)
2071 for (i = 0; i < 32; i++)
2072 if ((val >>= 1) & 1)
2075 /* If we had ....10, I would be 0. The result should be
2076 30, so we need 30 - i. */
2077 fprintf (file, "%d", 30 - i);
2081 /* Otherwise, look for the first 0 bit from the left. The result is its
2082 number minus 1. We know the high-order bit is one. */
2083 for (i = 0; i < 32; i++)
2084 if ((val <<= 1) >= 0)
2087 fprintf (file, "%d", i);
2091 /* Write the number of elements in the vector times 4. */
2092 if (GET_CODE (x) != PARALLEL)
2093 output_operand_lossage ("invalid %%N value");
2095 fprintf (file, "%d", XVECLEN (x, 0) * 4);
2099 /* Similar, but subtract 1 first. */
2100 if (GET_CODE (x) != PARALLEL)
2101 output_operand_lossage ("invalid %%N value");
2103 fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4);
2107 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2109 || (i = exact_log2 (INT_LOWPART (x))) < 0)
2110 output_operand_lossage ("invalid %%p value");
2112 fprintf (file, "%d", i);
2116 /* The operand must be an indirect memory reference. The result
2117 is the register number. */
2118 if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
2119 || REGNO (XEXP (x, 0)) >= 32)
2120 output_operand_lossage ("invalid %%P value");
2122 fprintf (file, "%d", REGNO (XEXP (x, 0)));
2126 /* X is a CR register. Print the mask for `mtcrf'. */
2127 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2128 output_operand_lossage ("invalid %%R value");
2130 fprintf (file, "%d", 128 >> (REGNO (x) - 68));
2134 /* Low 5 bits of 32 - value */
2136 output_operand_lossage ("invalid %%s value");
2138 fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31);
2142 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2143 All floating-point operations except NE branch true and integer
2144 EQ, LT, GT, LTU and GTU also branch true. */
2145 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2146 output_operand_lossage ("invalid %%t value");
2148 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2149 && GET_CODE (x) != NE)
2150 || GET_CODE (x) == EQ
2151 || GET_CODE (x) == LT || GET_CODE (x) == GT
2152 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2159 /* Opposite of 't': write 4 if this jump operation will branch if true,
2161 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2162 output_operand_lossage ("invalid %%t value");
2164 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2165 && GET_CODE (x) != NE)
2166 || GET_CODE (x) == EQ
2167 || GET_CODE (x) == LT || GET_CODE (x) == GT
2168 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2175 /* High-order 16 bits of constant. */
2177 output_operand_lossage ("invalid %%u value");
2179 fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff);
2183 /* Print `u' if this has an auto-increment or auto-decrement. */
2184 if (GET_CODE (x) == MEM
2185 && (GET_CODE (XEXP (x, 0)) == PRE_INC
2186 || GET_CODE (XEXP (x, 0)) == PRE_DEC))
2191 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2194 fprintf (file, "%d",
2195 (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000));
2197 print_operand (file, x, 0);
2201 /* If constant, low-order 16 bits of constant, unsigned.
2202 Otherwise, write normally. */
2204 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
2206 print_operand (file, x, 0);
2210 if (GET_CODE (x) == MEM
2211 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0)))
2216 /* Like 'L', for third word of TImode */
2217 if (GET_CODE (x) == REG)
2218 fprintf (file, "%d", REGNO (x) + 2);
2219 else if (GET_CODE (x) == MEM)
2221 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2222 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2223 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8));
2225 output_address (plus_constant (XEXP (x, 0), 8));
2230 /* X is a SYMBOL_REF. Write out the name preceded by a
2231 period and without any trailing data in brackets. Used for function
2232 names. If we are configured for System V (or the embedded ABI) on
2233 the PowerPC, do not emit the period, since those systems do not use
2234 TOCs and the like. */
2235 if (GET_CODE (x) != SYMBOL_REF)
2238 if (XSTR (x, 0)[0] != '.')
2240 switch (DEFAULT_ABI)
2250 case ABI_AIX_NODESC:
2258 RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
2262 /* Like 'L', for last word of TImode. */
2263 if (GET_CODE (x) == REG)
2264 fprintf (file, "%d", REGNO (x) + 3);
2265 else if (GET_CODE (x) == MEM)
2267 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2268 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2269 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12));
2271 output_address (plus_constant (XEXP (x, 0), 12));
2276 if (GET_CODE (x) == REG)
2277 fprintf (file, "%s", reg_names[REGNO (x)]);
2278 else if (GET_CODE (x) == MEM)
2280 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2281 know the width from the mode. */
2282 if (GET_CODE (XEXP (x, 0)) == PRE_INC)
2283 fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)),
2284 REGNO (XEXP (XEXP (x, 0), 0)));
2285 else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
2286 fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)),
2287 REGNO (XEXP (XEXP (x, 0), 0)));
2289 output_address (XEXP (x, 0));
2292 output_addr_const (file, x);
2296 output_operand_lossage ("invalid %%xn code");
2300 /* Print the address of an operand. */
2303 print_operand_address (file, x)
2307 if (GET_CODE (x) == REG)
2308 fprintf (file, "0(%s)", reg_names[ REGNO (x) ]);
2309 else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST)
2311 output_addr_const (file, x);
2312 /* When TARGET_MINIMAL_TOC, use the indirected toc table pointer instead
2313 of the toc pointer. */
2314 #ifdef TARGET_NO_TOC
2319 fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]);
2321 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
2323 if (REGNO (XEXP (x, 0)) == 0)
2324 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ],
2325 reg_names[ REGNO (XEXP (x, 0)) ]);
2327 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ],
2328 reg_names[ REGNO (XEXP (x, 1)) ]);
2330 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
2331 fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]);
2332 else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM
2333 && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1)))
2335 output_addr_const (file, XEXP (x, 1));
2336 fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]);
2342 /* This page contains routines that are used to determine what the function
2343 prologue and epilogue code will do and write them out. */
2345 /* Return the first fixed-point register that is required to be saved. 32 if
2349 first_reg_to_save ()
2353 /* Find lowest numbered live register. */
2354 for (first_reg = 13; first_reg <= 31; first_reg++)
2355 if (regs_ever_live[first_reg])
2358 /* If profiling, then we must save/restore every register that contains
2359 a parameter before/after the .mcount call. Use registers from 30 down
2360 to 23 to do this. Don't use the frame pointer in reg 31.
2362 For now, save enough room for all of the parameter registers. */
2363 if (DEFAULT_ABI == ABI_AIX && profile_flag)
2370 /* Similar, for FP regs. */
2373 first_fp_reg_to_save ()
2377 /* Find lowest numbered live register. */
2378 for (first_reg = 14 + 32; first_reg <= 63; first_reg++)
2379 if (regs_ever_live[first_reg])
2385 /* Return non-zero if this function makes calls. */
2388 rs6000_makes_calls ()
2392 /* If we are profiling, we will be making a call to mcount. */
2396 for (insn = get_insns (); insn; insn = next_insn (insn))
2397 if (GET_CODE (insn) == CALL_INSN)
2404 /* Calculate the stack information for the current function. This is
2405 complicated by having two separate calling sequences, the AIX calling
2406 sequence and the V.4 calling sequence.
2408 AIX stack frames look like:
2410 SP----> +---------------------------------------+
2411 | back chain to caller | 0
2412 +---------------------------------------+
2414 +---------------------------------------+
2416 +---------------------------------------+
2417 | reserved for compilers | 12
2418 +---------------------------------------+
2419 | reserved for binders | 16
2420 +---------------------------------------+
2421 | saved TOC pointer | 20
2422 +---------------------------------------+
2423 | Parameter save area (P) | 24
2424 +---------------------------------------+
2425 | Alloca space (A) | 24+P
2426 +---------------------------------------+
2427 | Local variable space (L) | 24+P+A
2428 +---------------------------------------+
2429 | Save area for GP registers (G) | 24+P+A+L
2430 +---------------------------------------+
2431 | Save area for FP registers (F) | 24+P+A+L+G
2432 +---------------------------------------+
2433 old SP->| back chain to caller's caller |
2434 +---------------------------------------+
2436 V.4 stack frames look like:
2438 SP----> +---------------------------------------+
2439 | back chain to caller | 0
2440 +---------------------------------------+
2441 | caller's saved LR | 4
2442 +---------------------------------------+
2443 | Parameter save area (P) | 8
2444 +---------------------------------------+
2445 | Alloca space (A) | 8+P
2446 +---------------------------------------+
2447 | Varargs save area (V) | 8+P+A
2448 +---------------------------------------+
2449 | Local variable space (L) | 8+P+A+V
2450 +---------------------------------------+
2451 | saved CR (C) | 8+P+A+V+L
2452 +---------------------------------------+
2453 | Save area for GP registers (G) | 8+P+A+V+L+C
2454 +---------------------------------------+
2455 | Save area for FP registers (F) | 8+P+A+V+L+C+G
2456 +---------------------------------------+
2457 old SP->| back chain to caller's caller |
2458 +---------------------------------------+
2461 A PowerPC Windows/NT frame looks like:
2463 SP----> +---------------------------------------+
2464 | back chain to caller | 0
2465 +---------------------------------------+
2467 +---------------------------------------+
2469 +---------------------------------------+
2471 +---------------------------------------+
2473 +---------------------------------------+
2475 +---------------------------------------+
2476 | Parameter save area (P) | 24
2477 +---------------------------------------+
2478 | Alloca space (A) | 24+P
2479 +---------------------------------------+
2480 | Local variable space (L) | 24+P+A
2481 +---------------------------------------+
2482 | Save area for FP registers (F) | 24+P+A+L
2483 +---------------------------------------+
2484 | Possible alignment area (X) | 24+P+A+L+F
2485 +---------------------------------------+
2486 | Save area for GP registers (G) | 24+P+A+L+F+X
2487 +---------------------------------------+
2488 | Save area for CR (C) | 24+P+A+L+F+X+G
2489 +---------------------------------------+
2490 | Save area for TOC (T) | 24+P+A+L+F+X+G+C
2491 +---------------------------------------+
2492 | Save area for LR (R) | 24+P+A+L+F+X+G+C+T
2493 +---------------------------------------+
2494 old SP->| back chain to caller's caller |
2495 +---------------------------------------+
2497 For NT, there is no specific order to save the registers, but in
2498 order to support __builtin_return_address, the save area for the
2499 link register needs to be in a known place, so we use -4 off of the
2500 old SP. To support calls through pointers, we also allocate a
2501 fixed slot to store the TOC, -8 off the old SP. */
2504 rs6000_stack_info ()
2506 static rs6000_stack_t info, zero_info;
2507 rs6000_stack_t *info_ptr = &info;
2508 int reg_size = TARGET_64BIT ? 8 : 4;
2509 enum rs6000_abi abi;
2512 /* Zero all fields portably */
2515 /* Select which calling sequence */
2516 info_ptr->abi = abi = DEFAULT_ABI;
2518 /* Calculate which registers need to be saved & save area size */
2519 info_ptr->first_gp_reg_save = first_reg_to_save ();
2520 info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save);
2522 info_ptr->first_fp_reg_save = first_fp_reg_to_save ();
2523 info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save);
2525 /* Does this function call anything? */
2526 info_ptr->calls_p = rs6000_makes_calls ();
2528 /* Do we need to allocate space to save the toc? */
2529 if (rs6000_save_toc_p)
2531 info_ptr->toc_save_p = 1;
2532 info_ptr->toc_size = reg_size;
2535 /* If this is main and we need to call a function to set things up,
2536 save main's arguments around the call. */
2537 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0)
2539 info_ptr->main_p = 1;
2542 if (DECL_ARGUMENTS (current_function_decl))
2547 info_ptr->main_save_p = 1;
2548 info_ptr->main_size = 0;
2549 info_ptr->calls_p = 1;
2551 for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl));
2552 arg != NULL_TREE && i < 8;
2553 (arg = TREE_CHAIN (arg)), i++)
2555 info_ptr->main_size += reg_size;
2561 /* Determine if we need to save the link register */
2562 if (regs_ever_live[65] || profile_flag
2563 #ifdef TARGET_RELOCATABLE
2564 || (TARGET_RELOCATABLE && (get_pool_size () != 0))
2566 || (info_ptr->first_fp_reg_save != 64
2567 && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save))
2568 || (abi == ABI_V4 && current_function_calls_alloca)
2569 || info_ptr->calls_p)
2571 info_ptr->lr_save_p = 1;
2572 regs_ever_live[65] = 1;
2574 info_ptr->lr_size = reg_size;
2577 /* Determine if we need to save the condition code registers */
2578 if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72])
2580 info_ptr->cr_save_p = 1;
2581 if (abi == ABI_V4 || abi == ABI_NT)
2582 info_ptr->cr_size = reg_size;
2585 /* Determine various sizes */
2586 info_ptr->reg_size = reg_size;
2587 info_ptr->fixed_size = RS6000_SAVE_AREA;
2588 info_ptr->varargs_size = RS6000_VARARGS_AREA;
2589 info_ptr->vars_size = ALIGN (get_frame_size (), 8);
2590 info_ptr->parm_size = ALIGN (current_function_outgoing_args_size, 8);
2591 info_ptr->save_size = ALIGN (info_ptr->fp_size
2595 + info_ptr->toc_size
2596 + info_ptr->main_size, 8);
2598 total_raw_size = (info_ptr->vars_size
2599 + info_ptr->parm_size
2600 + info_ptr->save_size
2601 + info_ptr->varargs_size
2602 + info_ptr->fixed_size);
2604 info_ptr->total_size = ALIGN (total_raw_size, STACK_BOUNDARY / BITS_PER_UNIT);
2606 /* Determine if we need to allocate any stack frame.
2607 For AIX We need to push the stack if a frame pointer is needed (because
2608 the stack might be dynamically adjusted), if we are debugging, if the
2609 total stack size is more than 220 bytes, or if we make calls.
2611 For V.4 we don't have the stack cushion that AIX uses, but assume that
2612 the debugger can handle stackless frames. */
2614 if (info_ptr->calls_p)
2615 info_ptr->push_p = 1;
2617 else if (abi == ABI_V4 || abi == ABI_NT)
2618 info_ptr->push_p = (total_raw_size > info_ptr->fixed_size
2619 || info_ptr->lr_save_p);
2622 info_ptr->push_p = (frame_pointer_needed
2623 || write_symbols != NO_DEBUG
2624 || info_ptr->total_size > 220);
2626 /* Calculate the offsets */
2634 case ABI_AIX_NODESC:
2635 info_ptr->fp_save_offset = - info_ptr->fp_size;
2636 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
2637 info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size;
2638 info_ptr->cr_save_offset = 4;
2639 info_ptr->lr_save_offset = 8;
2643 info_ptr->fp_save_offset = - info_ptr->fp_size;
2644 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
2645 info_ptr->cr_save_offset = info_ptr->gp_save_offset - reg_size;
2646 info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size;
2647 info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
2648 info_ptr->lr_save_offset = reg_size;
2652 info_ptr->lr_save_offset = -4;
2653 info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size;
2654 info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
2655 info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size;
2656 info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size;
2657 if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0)
2658 info_ptr->fp_save_offset -= 4;
2660 info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size;
2664 /* Zero offsets if we're not saving those registers */
2665 if (!info_ptr->fp_size)
2666 info_ptr->fp_save_offset = 0;
2668 if (!info_ptr->gp_size)
2669 info_ptr->gp_save_offset = 0;
2671 if (!info_ptr->lr_save_p)
2672 info_ptr->lr_save_offset = 0;
2674 if (!info_ptr->cr_save_p)
2675 info_ptr->cr_save_offset = 0;
2677 if (!info_ptr->toc_save_p)
2678 info_ptr->toc_save_offset = 0;
2680 if (!info_ptr->main_save_p)
2681 info_ptr->main_save_offset = 0;
2687 debug_stack_info (info)
2688 rs6000_stack_t *info;
2693 info = rs6000_stack_info ();
2695 fprintf (stderr, "\nStack information for function %s:\n",
2696 ((current_function_decl && DECL_NAME (current_function_decl))
2697 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl))
2702 default: abi_string = "Unknown"; break;
2703 case ABI_NONE: abi_string = "NONE"; break;
2704 case ABI_AIX: abi_string = "AIX"; break;
2705 case ABI_AIX_NODESC: abi_string = "AIX"; break;
2706 case ABI_V4: abi_string = "V.4"; break;
2707 case ABI_NT: abi_string = "NT"; break;
2710 fprintf (stderr, "\tABI = %5s\n", abi_string);
2712 if (info->first_gp_reg_save != 32)
2713 fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save);
2715 if (info->first_fp_reg_save != 64)
2716 fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save);
2718 if (info->lr_save_p)
2719 fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p);
2721 if (info->cr_save_p)
2722 fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p);
2724 if (info->toc_save_p)
2725 fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p);
2728 fprintf (stderr, "\tpush_p = %5d\n", info->push_p);
2731 fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p);
2734 fprintf (stderr, "\tmain_p = %5d\n", info->main_p);
2736 if (info->main_save_p)
2737 fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p);
2739 if (info->gp_save_offset)
2740 fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset);
2742 if (info->fp_save_offset)
2743 fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset);
2745 if (info->lr_save_offset)
2746 fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset);
2748 if (info->cr_save_offset)
2749 fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset);
2751 if (info->toc_save_offset)
2752 fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset);
2754 if (info->varargs_save_offset)
2755 fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset);
2757 if (info->main_save_offset)
2758 fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset);
2760 if (info->total_size)
2761 fprintf (stderr, "\ttotal_size = %5d\n", info->total_size);
2763 if (info->varargs_size)
2764 fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size);
2766 if (info->vars_size)
2767 fprintf (stderr, "\tvars_size = %5d\n", info->vars_size);
2769 if (info->parm_size)
2770 fprintf (stderr, "\tparm_size = %5d\n", info->parm_size);
2772 if (info->fixed_size)
2773 fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size);
2776 fprintf (stderr, "\tgp_size = %5d\n", info->gp_size);
2779 fprintf (stderr, "\tfp_size = %5d\n", info->fp_size);
2782 fprintf (stderr, "\tlr_size = %5d\n", info->cr_size);
2785 fprintf (stderr, "\tcr_size = %5d\n", info->cr_size);
2788 fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size);
2790 if (info->main_size)
2791 fprintf (stderr, "\tmain_size = %5d\n", info->main_size);
2793 if (info->save_size)
2794 fprintf (stderr, "\tsave_size = %5d\n", info->save_size);
2796 if (info->reg_size != 4)
2797 fprintf (stderr, "\treg_size = %5d\n", info->reg_size);
2799 fprintf (stderr, "\n");
2803 /* Write function prologue. */
2805 output_prolog (file, size)
2809 rs6000_stack_t *info = rs6000_stack_info ();
2810 int reg_size = info->reg_size;
2816 store_reg = "\tstd %s,%d(%s)";
2817 load_reg = "\tlld %s,%d(%s)";
2821 store_reg = "\t{st|stw} %s,%d(%s)\n";
2822 load_reg = "\t{l|lwz} %s,%d(%s)\n";
2825 if (TARGET_DEBUG_STACK)
2826 debug_stack_info (info);
2828 /* Write .extern for any function we will call to save and restore fp
2830 if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
2831 fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
2832 SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX,
2833 RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
2835 /* Write .extern for truncation routines, if needed. */
2836 if (rs6000_trunc_used && ! trunc_defined)
2838 fprintf (file, "\t.extern .%s\n\t.extern .%s\n",
2839 RS6000_ITRUNC, RS6000_UITRUNC);
2843 /* Write .extern for AIX common mode routines, if needed. */
2844 if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined)
2846 fputs ("\t.extern __mulh\n", file);
2847 fputs ("\t.extern __mull\n", file);
2848 fputs ("\t.extern __divss\n", file);
2849 fputs ("\t.extern __divus\n", file);
2850 fputs ("\t.extern __quoss\n", file);
2851 fputs ("\t.extern __quous\n", file);
2852 common_mode_defined = 1;
2855 /* If we use the link register, get it into r0. */
2856 if (info->lr_save_p)
2857 asm_fprintf (file, "\tmflr %s\n", reg_names[0]);
2859 /* If we need to save CR, put it into r12. */
2860 if (info->cr_save_p)
2861 asm_fprintf (file, "\tmfcr %s\n", reg_names[12]);
2863 /* Do any required saving of fpr's. If only one or two to save, do it
2864 ourself. Otherwise, call function. Note that since they are statically
2865 linked, we do not need a nop following them. */
2866 if (FP_SAVE_INLINE (info->first_fp_reg_save))
2868 int regno = info->first_fp_reg_save;
2869 int loc = info->fp_save_offset;
2871 for ( ; regno < 64; regno++, loc += 8)
2872 asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[1]);
2874 else if (info->first_fp_reg_save != 64)
2875 asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX,
2876 info->first_fp_reg_save - 32, SAVE_FP_SUFFIX);
2878 /* Now save gpr's. */
2879 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
2881 int regno = info->first_gp_reg_save;
2882 int loc = info->gp_save_offset;
2884 for ( ; regno < 32; regno++, loc += reg_size)
2885 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[1]);
2888 else if (info->first_gp_reg_save != 32)
2889 asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n",
2890 reg_names[info->first_gp_reg_save],
2891 info->gp_save_offset,
2894 /* Save main's arguments if we need to call a function */
2896 if (info->main_save_p)
2899 int loc = info->main_save_offset;
2900 int size = info->main_size;
2902 for (regno = 3; size > 0; regno++, loc -= reg_size, size -= reg_size)
2903 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[1]);
2907 /* Save lr if we used it. */
2908 if (info->lr_save_p)
2909 asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset, reg_names[1]);
2911 /* Save CR if we use any that must be preserved. */
2912 if (info->cr_save_p)
2913 asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset, reg_names[1]);
2915 if (info->toc_save_p)
2916 asm_fprintf (file, store_reg, reg_names[2], info->toc_save_offset, reg_names[1]);
2918 /* Update stack and set back pointer. */
2921 if (info->total_size < 32767)
2923 (TARGET_64BIT) ? "\tstdu %s,%d(%s)\n" : "\t{stu|stwu} %s,%d(%s)\n",
2924 reg_names[1], - info->total_size, reg_names[1]);
2927 int neg_size = - info->total_size;
2928 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
2929 reg_names[0], (neg_size >> 16) & 0xffff,
2930 reg_names[0], reg_names[0], neg_size & 0xffff);
2932 (TARGET_64BIT) ? "\tstdux %s,%s,%s\n" : "\t{stux|stwux} %s,%s,%s\n",
2933 reg_names[1], reg_names[1], reg_names[0]);
2937 /* Set frame pointer, if needed. */
2938 if (frame_pointer_needed)
2939 asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]);
2942 /* If we need to call a function to set things up for main, do so now
2943 before dealing with the TOC. */
2948 switch (DEFAULT_ABI)
2950 case ABI_AIX: prefix = "."; break;
2951 case ABI_NT: prefix = ".."; break;
2954 fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN);
2955 #ifdef RS6000_CALL_GLUE2
2956 fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN);
2958 #ifdef RS6000_CALL_GLUE
2959 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT)
2960 fprintf (file, "\t%s\n", RS6000_CALL_GLUE);
2964 if (info->main_save_p)
2968 int size = info->main_size;
2970 if (info->total_size < 32767)
2972 loc = info->total_size + info->main_save_offset;
2973 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
2974 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]);
2977 { /* for large frames, reg 0 above contains -frame size */
2978 loc = info->main_save_offset;
2979 asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0],
2982 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
2983 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]);
2990 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
2991 TOC_TABLE address into register 30. */
2992 if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0)
2996 #ifdef TARGET_RELOCATABLE
2997 if (TARGET_RELOCATABLE)
2999 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3000 fprintf (file, "\tbl ");
3001 assemble_name (file, buf);
3002 fprintf (file, "\n");
3004 ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno);
3005 fprintf (file, "\tmflr %s\n", reg_names[30]);
3007 asm_fprintf (file, TARGET_64BIT ? "\tld" : "\t{l|lwz}");
3008 fprintf (file, " %s,(", reg_names[0]);
3009 ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno);
3010 assemble_name (file, buf);
3011 fprintf (file, "-");
3012 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3013 assemble_name (file, buf);
3014 fprintf (file, ")(%s)\n", reg_names[30]);
3015 asm_fprintf (file, "\t{cax|add} %s,%s,%s\n",
3016 reg_names[30], reg_names[0], reg_names[30]);
3017 rs6000_pic_labelno++;
3022 switch (DEFAULT_ABI)
3025 case ABI_AIX_NODESC:
3028 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1);
3029 asm_fprintf (file, "\t{cau|addis} %s,%s,", reg_names[30], reg_names[0]);
3030 assemble_name (file, buf);
3031 asm_fprintf (file, "@ha\n");
3032 if (TARGET_NEW_MNEMONICS)
3034 asm_fprintf (file, "\taddi %s,%s,", reg_names[30], reg_names[30]);
3035 assemble_name (file, buf);
3036 asm_fprintf (file, "@l\n");
3040 asm_fprintf (file, "\tcal %s,", reg_names[30]);
3041 assemble_name (file, buf);
3042 asm_fprintf (file, "@l(%s)\n", reg_names[30]);
3052 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0);
3053 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[30]);
3054 assemble_name (file, buf);
3055 asm_fprintf (file, "(%s)\n", reg_names[2]);
3060 if (DEFAULT_ABI == ABI_NT)
3062 assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3063 fputs (".b:\n", file);
3067 /* Write function epilogue. */
3070 output_epilog (file, size)
3074 rs6000_stack_t *info = rs6000_stack_info ();
3075 char *load_reg = (TARGET_64BIT) ? "\tld %s,%d(%s)" : "\t{l|lwz} %s,%d(%s)\n";
3076 rtx insn = get_last_insn ();
3079 /* Forget about any temporaries created */
3080 for (i = 0; i < NUM_MACHINE_MODES; i++)
3081 stack_temps[i] = NULL_RTX;
3083 /* If the last insn was a BARRIER, we don't have to write anything except
3085 if (GET_CODE (insn) == NOTE)
3086 insn = prev_nonnote_insn (insn);
3087 if (insn == 0 || GET_CODE (insn) != BARRIER)
3089 /* If we have a frame pointer, a call to alloca, or a large stack
3090 frame, restore the old stack pointer using the backchain. Otherwise,
3091 we know what size to update it with. */
3092 if (frame_pointer_needed || current_function_calls_alloca
3093 || info->total_size > 32767)
3094 asm_fprintf (file, load_reg, reg_names[1], 0, reg_names[1]);
3095 else if (info->push_p)
3097 if (TARGET_NEW_MNEMONICS)
3098 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], info->total_size);
3100 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], info->total_size, reg_names[1]);
3103 /* Get the old lr if we saved it. */
3104 if (info->lr_save_p)
3105 asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset, reg_names[1]);
3107 /* Get the old cr if we saved it. */
3108 if (info->cr_save_p)
3109 asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset, reg_names[1]);
3111 /* Set LR here to try to overlap restores below. */
3112 if (info->lr_save_p)
3113 asm_fprintf (file, "\tmtlr %s\n", reg_names[0]);
3115 /* Restore gpr's. */
3116 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3118 int regno = info->first_gp_reg_save;
3119 int loc = info->gp_save_offset;
3120 int reg_size = (TARGET_64BIT) ? 8 : 4;
3122 for ( ; regno < 32; regno++, loc += reg_size)
3123 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]);
3126 else if (info->first_gp_reg_save != 32)
3127 asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n",
3128 reg_names[info->first_gp_reg_save],
3129 info->gp_save_offset,
3132 /* Restore fpr's if we can do it without calling a function. */
3133 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3135 int regno = info->first_fp_reg_save;
3136 int loc = info->fp_save_offset;
3138 for ( ; regno < 64; regno++, loc += 8)
3139 asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[1]);
3142 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3144 if (info->cr_save_p)
3145 asm_fprintf (file, "\tmtcrf %d,%s\n",
3146 (regs_ever_live[70] != 0) * 0x20
3147 + (regs_ever_live[71] != 0) * 0x10
3148 + (regs_ever_live[72] != 0) * 0x8, reg_names[12]);
3150 /* If we have to restore more than two FP registers, branch to the
3151 restore function. It will return to our caller. */
3152 if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
3153 asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX,
3154 info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
3156 asm_fprintf (file, "\t{br|blr}\n");
3159 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3162 We don't output a traceback table if -finhibit-size-directive was
3163 used. The documentation for -finhibit-size-directive reads
3164 ``don't output a @code{.size} assembler directive, or anything
3165 else that would cause trouble if the function is split in the
3166 middle, and the two halves are placed at locations far apart in
3167 memory.'' The traceback table has this property, since it
3168 includes the offset from the start of the function to the
3169 traceback table itself.
3171 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3172 different traceback table. */
3173 if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive)
3175 char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
3176 int fixed_parms, float_parms, parm_info;
3179 while (*fname == '.') /* V.4 encodes . in the name */
3182 /* Need label immediately before tbtab, so we can compute its offset
3183 from the function start. */
3186 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3187 ASM_OUTPUT_LABEL (file, fname);
3189 /* The .tbtab pseudo-op can only be used for the first eight
3190 expressions, since it can't handle the possibly variable
3191 length fields that follow. However, if you omit the optional
3192 fields, the assembler outputs zeros for all optional fields
3193 anyways, giving each variable length field is minimum length
3194 (as defined in sys/debug.h). Thus we can not use the .tbtab
3195 pseudo-op at all. */
3197 /* An all-zero word flags the start of the tbtab, for debuggers
3198 that have to find it by searching forward from the entry
3199 point or from the current pc. */
3200 fprintf (file, "\t.long 0\n");
3202 /* Tbtab format type. Use format type 0. */
3203 fprintf (file, "\t.byte 0,");
3205 /* Language type. Unfortunately, there doesn't seem to be any
3206 official way to get this info, so we use language_string. C
3207 is 0. C++ is 9. No number defined for Obj-C, so use the
3208 value for C for now. */
3209 if (! strcmp (language_string, "GNU C")
3210 || ! strcmp (language_string, "GNU Obj-C"))
3212 else if (! strcmp (language_string, "GNU F77"))
3214 else if (! strcmp (language_string, "GNU Ada"))
3216 else if (! strcmp (language_string, "GNU PASCAL"))
3218 else if (! strcmp (language_string, "GNU C++"))
3222 fprintf (file, "%d,", i);
3224 /* 8 single bit fields: global linkage (not set for C extern linkage,
3225 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
3226 from start of procedure stored in tbtab, internal function, function
3227 has controlled storage, function has no toc, function uses fp,
3228 function logs/aborts fp operations. */
3229 /* Assume that fp operations are used if any fp reg must be saved. */
3230 fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1));
3232 /* 6 bitfields: function is interrupt handler, name present in
3233 proc table, function calls alloca, on condition directives
3234 (controls stack walks, 3 bits), saves condition reg, saves
3236 /* The `function calls alloca' bit seems to be set whenever reg 31 is
3237 set up as a frame pointer, even when there is no alloca call. */
3238 fprintf (file, "%d,",
3239 ((1 << 6) | (frame_pointer_needed << 5)
3240 | (info->cr_save_p << 1) | (info->lr_save_p)));
3242 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
3244 fprintf (file, "%d,",
3245 (info->push_p << 7) | (64 - info->first_fp_reg_save));
3247 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
3248 fprintf (file, "%d,", (32 - first_reg_to_save ()));
3251 /* Compute the parameter info from the function decl argument
3254 int next_parm_info_bit;
3256 next_parm_info_bit = 31;
3261 for (decl = DECL_ARGUMENTS (current_function_decl);
3262 decl; decl = TREE_CHAIN (decl))
3264 rtx parameter = DECL_INCOMING_RTL (decl);
3265 enum machine_mode mode = GET_MODE (parameter);
3267 if (GET_CODE (parameter) == REG)
3269 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3277 else if (mode == DFmode)
3282 /* If only one bit will fit, don't or in this entry. */
3283 if (next_parm_info_bit > 0)
3284 parm_info |= (bits << (next_parm_info_bit - 1));
3285 next_parm_info_bit -= 2;
3289 fixed_parms += ((GET_MODE_SIZE (mode)
3290 + (UNITS_PER_WORD - 1))
3292 next_parm_info_bit -= 1;
3298 /* Number of fixed point parameters. */
3299 /* This is actually the number of words of fixed point parameters; thus
3300 an 8 byte struct counts as 2; and thus the maximum value is 8. */
3301 fprintf (file, "%d,", fixed_parms);
3303 /* 2 bitfields: number of floating point parameters (7 bits), parameters
3305 /* This is actually the number of fp registers that hold parameters;
3306 and thus the maximum value is 13. */
3307 /* Set parameters on stack bit if parameters are not in their original
3308 registers, regardless of whether they are on the stack? Xlc
3309 seems to set the bit when not optimizing. */
3310 fprintf (file, "%d\n", ((float_parms << 1) | (! optimize)));
3312 /* Optional fields follow. Some are variable length. */
3314 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
3316 /* There is an entry for each parameter in a register, in the order that
3317 they occur in the parameter list. Any intervening arguments on the
3318 stack are ignored. If the list overflows a long (max possible length
3319 34 bits) then completely leave off all elements that don't fit. */
3320 /* Only emit this long if there was at least one parameter. */
3321 if (fixed_parms || float_parms)
3322 fprintf (file, "\t.long %d\n", parm_info);
3324 /* Offset from start of code to tb table. */
3325 fprintf (file, "\t.long ");
3326 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3327 RS6000_OUTPUT_BASENAME (file, fname);
3328 fprintf (file, "-.");
3329 RS6000_OUTPUT_BASENAME (file, fname);
3330 fprintf (file, "\n");
3332 /* Interrupt handler mask. */
3333 /* Omit this long, since we never set the interrupt handler bit
3336 /* Number of CTL (controlled storage) anchors. */
3337 /* Omit this long, since the has_ctl bit is never set above. */
3339 /* Displacement into stack of each CTL anchor. */
3340 /* Omit this list of longs, because there are no CTL anchors. */
3342 /* Length of function name. */
3343 fprintf (file, "\t.short %d\n", strlen (fname));
3345 /* Function name. */
3346 assemble_string (fname, strlen (fname));
3348 /* Register for alloca automatic storage; this is always reg 31.
3349 Only emit this if the alloca bit was set above. */
3350 if (frame_pointer_needed)
3351 fprintf (file, "\t.byte 31\n");
3354 /* Reset varargs and save TOC indicator */
3355 rs6000_sysv_varargs_p = 0;
3356 rs6000_save_toc_p = 0;
3358 if (DEFAULT_ABI == ABI_NT)
3360 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3361 fputs (".e:\nFE_MOT_RESVD..", file);
3362 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3363 fputs (":\n", file);
3367 /* Output a TOC entry. We derive the entry name from what is
3371 output_toc (file, x, labelno)
3385 /* if we're going to put a double constant in the TOC, make sure it's
3386 aligned properly when strict alignment is on. */
3387 if (GET_CODE (x) == CONST_DOUBLE
3389 && GET_MODE (x) == DFmode
3390 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) {
3391 ASM_OUTPUT_ALIGN (file, 3);
3395 if (TARGET_ELF && TARGET_MINIMAL_TOC)
3397 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC");
3398 fprintf (file, "%d = .-", labelno);
3399 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC");
3400 fprintf (file, "1\n");
3403 ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno);
3405 /* Handle FP constants specially. Note that if we have a minimal
3406 TOC, things we put here aren't actually in the TOC, so we can allow
3408 if (GET_CODE (x) == CONST_DOUBLE
3409 && GET_MODE (x) == DFmode
3410 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3415 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
3416 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3417 if (TARGET_MINIMAL_TOC)
3418 fprintf (file, "\t.long %ld\n\t.long %ld\n", l[0], l[1]);
3420 fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
3421 l[0], l[1], l[0], l[1]);
3424 else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode
3425 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3427 rtx val = operand_subword (x, 0, 0, SFmode);
3429 if (val == 0 || GET_CODE (val) != CONST_INT)
3432 if (TARGET_MINIMAL_TOC)
3433 fprintf (file, "\t.long %d\n", INTVAL (val));
3435 fprintf (file, "\t.tc FS_%x[TC],%d\n", INTVAL (val), INTVAL (val));
3439 if (GET_CODE (x) == CONST)
3441 base = XEXP (XEXP (x, 0), 0);
3442 offset = INTVAL (XEXP (XEXP (x, 0), 1));
3445 if (GET_CODE (base) == SYMBOL_REF)
3446 name = XSTR (base, 0);
3447 else if (GET_CODE (base) == LABEL_REF)
3448 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0)));
3449 else if (GET_CODE (base) == CODE_LABEL)
3450 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base));
3454 if (TARGET_MINIMAL_TOC)
3455 fprintf (file, "\t.long ");
3458 STRIP_NAME_ENCODING (real_name, name);
3459 fprintf (file, "\t.tc %s", real_name);
3462 fprintf (file, ".N%d", - offset);
3464 fprintf (file, ".P%d", offset);
3466 fprintf (file, "[TC],");
3468 output_addr_const (file, x);
3469 fprintf (file, "\n");
3472 /* Output an assembler pseudo-op to write an ASCII string of N characters
3473 starting at P to FILE.
3475 On the RS/6000, we have to do this using the .byte operation and
3476 write out special characters outside the quoted string.
3477 Also, the assembler is broken; very long strings are truncated,
3478 so we must artificially break them up early. */
3481 output_ascii (file, p, n)
3487 int i, count_string;
3488 char *for_string = "\t.byte \"";
3489 char *for_decimal = "\t.byte ";
3490 char *to_close = NULL;
3493 for (i = 0; i < n; i++)
3496 if (c >= ' ' && c < 0177)
3499 fputs (for_string, file);
3502 /* Write two quotes to get one. */
3510 for_decimal = "\"\n\t.byte ";
3514 if (count_string >= 512)
3516 fputs (to_close, file);
3518 for_string = "\t.byte \"";
3519 for_decimal = "\t.byte ";
3527 fputs (for_decimal, file);
3528 fprintf (file, "%d", c);
3530 for_string = "\n\t.byte \"";
3537 /* Now close the string if we have written one. Then end the line. */
3539 fprintf (file, to_close);
3542 /* Generate a unique section name for FILENAME for a section type
3543 represented by SECTION_DESC. Output goes into BUF.
3545 SECTION_DESC can be any string, as long as it is different for each
3546 possible section type.
3548 We name the section in the same manner as xlc. The name begins with an
3549 underscore followed by the filename (after stripping any leading directory
3550 names) with the last period replaced by the string SECTION_DESC. If
3551 FILENAME does not contain a period, SECTION_DESC is appended to the end of
3555 rs6000_gen_section_name (buf, filename, section_desc)
3560 char *q, *after_last_slash, *last_period;
3564 after_last_slash = filename;
3565 for (q = filename; *q; q++)
3568 after_last_slash = q + 1;
3573 len = strlen (after_last_slash) + strlen (section_desc) + 2;
3574 *buf = (char *) permalloc (len);
3579 for (q = after_last_slash; *q; q++)
3581 if (q == last_period)
3583 strcpy (p, section_desc);
3584 p += strlen (section_desc);
3587 else if (isalnum (*q))
3591 if (last_period == 0)
3592 strcpy (p, section_desc);
3597 /* Write function profiler code. */
3600 output_function_profiler (file, labelno)
3604 /* The last used parameter register. */
3609 if (DEFAULT_ABI != ABI_AIX)
3612 /* Set up a TOC entry for the profiler label. */
3614 ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno);
3615 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno);
3616 if (TARGET_MINIMAL_TOC)
3618 fprintf (file, "\t.long ");
3619 assemble_name (file, buf);
3620 fprintf (file, "\n");
3624 fprintf (file, "\t.tc\t");
3625 assemble_name (file, buf);
3626 fprintf (file, "[TC],");
3627 assemble_name (file, buf);
3628 fprintf (file, "\n");
3632 /* Figure out last used parameter register. The proper thing to do is
3633 to walk incoming args of the function. A function might have live
3634 parameter registers even if it has no incoming args. */
3636 for (last_parm_reg = 10;
3637 last_parm_reg > 2 && ! regs_ever_live [last_parm_reg];
3641 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
3642 it might be set up as the frame pointer. */
3644 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
3645 fprintf (file, "\tai %d,%d,0\n", j, i);
3647 /* Load location address into r3, and call mcount. */
3649 ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno);
3650 fprintf (file, "\tl 3,");
3651 assemble_name (file, buf);
3652 fprintf (file, "(2)\n\tbl .mcount\n");
3654 /* Restore parameter registers. */
3656 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
3657 fprintf (file, "\tai %d,%d,0\n", i, j);
3660 /* Adjust the cost of a scheduling dependency. Return the new cost of
3661 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
3664 rs6000_adjust_cost (insn, link, dep_insn, cost)
3670 if (! recog_memoized (insn))
3673 if (REG_NOTE_KIND (link) != 0)
3676 if (REG_NOTE_KIND (link) == 0)
3678 /* Data dependency; DEP_INSN writes a register that INSN reads some
3681 /* Tell the first scheduling pass about the latency between a mtctr
3682 and bctr (and mtlr and br/blr). The first scheduling pass will not
3683 know about this latency since the mtctr instruction, which has the
3684 latency associated to it, will be generated by reload. */
3685 if (get_attr_type (insn) == TYPE_JMPREG)
3686 return TARGET_POWER ? 5 : 4;
3688 /* Fall out to return default cost. */
3694 /* Return how many instructions the machine can issue per cycle */
3695 int get_issue_rate()
3697 switch (rs6000_cpu_attr) {
3718 /* Output insns to flush the {data|instruction} caches after building a
3722 rs6000_sync_trampoline (addr)
3725 enum machine_mode pmode = Pmode;
3726 rtx reg = gen_reg_rtx (pmode);
3729 int size = rs6000_trampoline_size ();
3730 rtx (*sub_fcn) PROTO ((rtx, rtx, rtx));
3731 rtx (*cmp_fcn) PROTO ((rtx, rtx));
3736 abort (); /* no cmpdi function yet */
3740 sub_fcn = gen_subsi3;
3741 cmp_fcn = gen_cmpsi;
3744 addr = force_reg (pmode, addr);
3745 mem2 = gen_rtx (MEM, pmode, gen_rtx (PLUS, pmode, addr, reg));
3746 mem1 = gen_rtx (MEM, pmode, addr);
3748 /* Issue a loop of dcbst's to flush the data cache */
3749 emit_move_insn (reg, GEN_INT (size-4));
3750 label = gen_label_rtx ();
3752 emit_insn (gen_dcbst (mem2, addr, reg));
3753 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
3754 emit_insn ((*cmp_fcn) (reg, const0_rtx));
3755 emit_jump_insn (gen_bgt (label));
3757 /* Issue a sync after the dcbst's to let things settle down */
3758 emit_insn (gen_sync (mem1));
3760 /* Issue a loop of icbi's to flush the instruction cache */
3761 emit_move_insn (reg, GEN_INT (size-4));
3762 label = gen_label_rtx ();
3764 emit_insn (gen_icbi (mem2, addr, reg));
3765 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
3766 emit_insn ((*cmp_fcn) (reg, const0_rtx));
3767 emit_jump_insn (gen_bgt (label));
3769 /* Issue a sync after the icbi's to let things settle down */
3770 emit_insn (gen_sync (mem1));
3772 /* Finally issue an isync to synchronize the icache */
3773 emit_insn (gen_isync (mem1));
3777 /* Output assembler code for a block containing the constant parts
3778 of a trampoline, leaving space for the variable parts.
3780 The trampoline should set the static chain pointer to value placed
3781 into the trampoline and should branch to the specified routine. */
3784 rs6000_trampoline_template (file)
3787 char *sc = reg_names[STATIC_CHAIN_REGNUM];
3788 char *r0 = reg_names[0];
3790 switch (DEFAULT_ABI)
3795 /* Under AIX, this is not code at all, but merely a data area,
3796 since that is the way all functions are called. The first word is
3797 the address of the function, the second word is the TOC pointer (r2),
3798 and the third word is the static chain value. */
3800 fprintf (file, "\t.long %s\n", (TARGET_64BIT) ? "0,0,0,0,0,0" : "0,0,0");
3804 /* V.4/eabi function pointers are just a single pointer, so we need to
3805 do the full gory code to load up the static chain. */
3807 case ABI_AIX_NODESC:
3808 if (STATIC_CHAIN_REGNUM == 0 || !TARGET_NEW_MNEMONICS)
3813 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
3814 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
3815 fprintf (file, "\t.long 0,0,0,0\n"); /* offset 8 */
3816 fprintf (file, ".LTRAMP1:\n");
3817 fprintf (file, "\tmflr %s\n", sc); /* offset 28 */
3818 fprintf (file, "\tmtlr %s\n", r0); /* offset 32 */
3819 fprintf (file, "\tld %s,0(%s)\n", r0, sc); /* offset 36 */
3820 fprintf (file, "\tld %s,8(%s)\n", sc, sc); /* offset 40 */
3821 fprintf (file, "\tmtctr %s\n", r0); /* offset 44 */
3822 fprintf (file, "\tbctr\n"); /* offset 48 */
3826 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
3827 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
3828 fprintf (file, "\t.long 0,0\n"); /* offset 8 */
3829 fprintf (file, ".LTRAMP1:\n");
3830 fprintf (file, "\tmflr %s\n", sc); /* offset 20 */
3831 fprintf (file, "\tmtlr %s\n", r0); /* offset 24 */
3832 fprintf (file, "\tlwz %s,0(%s)\n", r0, sc); /* offset 28 */
3833 fprintf (file, "\tlwz %s,4(%s)\n", sc, sc); /* offset 32 */
3834 fprintf (file, "\tmtctr %s\n", r0); /* offset 36 */
3835 fprintf (file, "\tbctr\n"); /* offset 40 */
3839 /* NT function pointers point to a two word area (real address, TOC)
3840 which unfortunately does not include a static chain field. So we
3841 need to have a 2 word area followed by the code to load up the
3844 if (STATIC_CHAIN_REGNUM == 0 || !TARGET_NEW_MNEMONICS || TARGET_64BIT)
3847 fprintf (file, "\t.ualong 0,0\n"); /* offset 0 */
3848 fprintf (file, "\tmflr %s\n", r0); /* offset 8 */
3849 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 12 */
3850 fprintf (file, "\t.ualong 0,0\n"); /* offset 16 */
3851 fprintf (file, ".LTRAMP1:\n");
3852 fprintf (file, "\tmflr %s\n", sc); /* offset 28 */
3853 fprintf (file, "\tmtlr %s\n", r0); /* offset 32 */
3854 fprintf (file, "\tlwz %s,0(%s)\n", r0, sc); /* offset 36 */
3855 fprintf (file, "\tlwz %s,4(%s)\n", sc, sc); /* offset 40 */
3856 fprintf (file, "\tmtctr %s\n", r0); /* offset 44 */
3857 fprintf (file, "\tbctr\n"); /* offset 48 */
3864 /* Length in units of the trampoline for entering a nested function. */
3867 rs6000_trampoline_size ()
3871 switch (DEFAULT_ABI)
3877 ret = (TARGET_64BIT) ? 24 : 12;
3881 case ABI_AIX_NODESC:
3882 ret = (TARGET_64BIT ? 48 : 40);
3893 /* Emit RTL insns to initialize the variable parts of a trampoline.
3894 FNADDR is an RTX for the address of the function's pure code.
3895 CXT is an RTX for the static chain value for the function. */
3898 rs6000_initialize_trampoline (addr, fnaddr, cxt)
3903 rtx reg, reg2, reg3;
3905 switch (DEFAULT_ABI)
3910 /* Under AIX, just build the 3 word function descriptor */
3912 emit_move_insn (gen_rtx (MEM, SImode,
3913 memory_address (SImode, (addr))),
3914 gen_rtx (MEM, SImode,
3915 memory_address (SImode, (fnaddr))));
3916 emit_move_insn (gen_rtx (MEM, SImode,
3917 memory_address (SImode,
3918 plus_constant ((addr), 4))),
3919 gen_rtx (MEM, SImode,
3920 memory_address (SImode,
3921 plus_constant ((fnaddr), 4))));
3922 emit_move_insn (gen_rtx (MEM, SImode,
3923 memory_address (SImode,
3924 plus_constant ((addr), 8))),
3925 force_reg (SImode, (cxt)));
3928 /* Under V.4/eabi, update the two words after the bl to have the real
3929 function address and the static chain. */
3931 case ABI_AIX_NODESC:
3932 reg = gen_reg_rtx (Pmode);
3934 emit_move_insn (reg, fnaddr);
3935 emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (addr, 8)), reg);
3936 emit_move_insn (gen_rtx (MEM, Pmode,
3937 plus_constant (addr, (TARGET_64BIT ? 16 : 12))),
3940 rs6000_sync_trampoline (addr);
3943 /* Under NT, update the first 2 words to look like a normal descriptor, and
3944 then fill in the fields with the function address and static chain after
3945 the bl instruction. */
3947 reg = gen_reg_rtx (Pmode);
3948 reg2 = gen_reg_rtx (Pmode);
3949 reg3 = gen_reg_rtx (Pmode);
3951 emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (addr, 4)),
3952 gen_rtx (REG, Pmode, 2));
3953 emit_move_insn (reg, fnaddr);
3954 emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg));
3955 emit_move_insn (reg3, plus_constant (addr, 8));
3956 emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (addr, 16)), reg);
3957 emit_move_insn (gen_rtx (MEM, Pmode, addr), reg3);
3958 emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (addr, 20)), cxt);
3959 rs6000_sync_trampoline (addr);