1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
40 #ifndef TARGET_NO_PROTOTYPE
41 #define TARGET_NO_PROTOTYPE 0
44 extern char *language_string;
45 extern int profile_block_flag;
47 #define min(A,B) ((A) < (B) ? (A) : (B))
48 #define max(A,B) ((A) > (B) ? (A) : (B))
52 enum processor_type rs6000_cpu;
53 struct rs6000_cpu_select rs6000_select[3] =
55 /* switch name, tune arch */
56 { (char *)0, "--with-cpu=", 1, 1 },
57 { (char *)0, "-mcpu=", 1, 1 },
58 { (char *)0, "-mtune=", 1, 0 },
61 /* Set to non-zero by "fix" operation to indicate that itrunc and
62 uitrunc must be defined. */
64 int rs6000_trunc_used;
66 /* Set to non-zero once they have been defined. */
68 static int trunc_defined;
70 /* Set to non-zero once AIX common-mode calls have been defined. */
71 static int common_mode_defined;
72 /* Save information from a "cmpxx" operation until the branch or scc is
75 rtx rs6000_compare_op0, rs6000_compare_op1;
76 int rs6000_compare_fp_p;
79 /* Label number of label created for -mrelocatable, to call to so we can
80 get the address of the GOT section */
81 int rs6000_pic_labelno;
84 /* Whether a System V.4 varargs area was created. */
85 int rs6000_sysv_varargs_p;
87 /* Whether we need to save the TOC register. */
88 int rs6000_save_toc_p;
90 /* ABI enumeration available for subtarget to use. */
91 enum rs6000_abi rs6000_current_abi;
93 /* Temporary memory used to convert integer -> float */
94 static rtx stack_temps[NUM_MACHINE_MODES];
97 /* Print the options used in the assembly file. */
99 extern char *version_string, *language_string;
111 output_option (file, type, name, pos)
117 int type_len = strlen (type);
118 int name_len = strlen (name);
120 if (1 + type_len + name_len + pos > MAX_LINE)
122 fprintf (file, "\n # %s%s", type, name);
123 return 3 + type_len + name_len;
125 fprintf (file, " %s%s", type, name);
126 return pos + 1 + type_len + name_len;
129 static struct { char *name; int value; } m_options[] = TARGET_SWITCHES;
132 output_options (file, f_options, f_len, W_options, W_len)
134 struct asm_option *f_options;
136 struct asm_option *W_options;
140 int flags = target_flags;
143 fprintf (file, " # %s %s", language_string, version_string);
148 sprintf (opt_string, "%d", optimize);
149 pos = output_option (file, "-O", opt_string, pos);
153 pos = output_option (file, "-p", "", pos);
155 if (profile_block_flag)
156 pos = output_option (file, "-a", "", pos);
158 if (inhibit_warnings)
159 pos = output_option (file, "-w", "", pos);
161 for (j = 0; j < f_len; j++)
163 if (*f_options[j].variable == f_options[j].on_value)
164 pos = output_option (file, "-f", f_options[j].string, pos);
167 for (j = 0; j < W_len; j++)
169 if (*W_options[j].variable == W_options[j].on_value)
170 pos = output_option (file, "-W", W_options[j].string, pos);
173 for (j = 0; j < sizeof m_options / sizeof m_options[0]; j++)
175 if (m_options[j].name[0] != '\0'
176 && m_options[j].value > 0
177 && ((m_options[j].value & flags) == m_options[j].value))
179 pos = output_option (file, "-m", m_options[j].name, pos);
180 flags &= ~ m_options[j].value;
184 for (j = 0; j < sizeof (rs6000_select) / sizeof(rs6000_select[0]); j++)
185 if (rs6000_select[j].string != (char *)0)
186 pos = output_option (file, rs6000_select[j].name, rs6000_select[j].string, pos);
188 fputs ("\n\n", file);
192 /* Override command line options. Mostly we process the processor
193 type and sometimes adjust other TARGET_ options. */
196 rs6000_override_options (default_cpu)
200 struct rs6000_cpu_select *ptr;
202 /* Simplify the entries below by making a mask for any POWER
203 variant and any PowerPC variant. */
205 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
206 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
207 | MASK_PPC_GFXOPT | MASK_POWERPC64)
208 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
212 char *name; /* Canonical processor name. */
213 enum processor_type processor; /* Processor type enum value. */
214 int target_enable; /* Target flags to enable. */
215 int target_disable; /* Target flags to disable. */
216 } processor_target_table[]
217 = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS,
218 POWER_MASKS | POWERPC_MASKS},
219 {"power", PROCESSOR_POWER,
220 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
221 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
222 {"power2", PROCESSOR_POWER,
223 MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING,
224 POWERPC_MASKS | MASK_NEW_MNEMONICS},
225 {"powerpc", PROCESSOR_POWERPC,
226 MASK_POWERPC | MASK_NEW_MNEMONICS,
227 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
228 {"rios", PROCESSOR_RIOS1,
229 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
230 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
231 {"rios1", PROCESSOR_RIOS1,
232 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
233 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
234 {"rsc", PROCESSOR_PPC601,
235 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
236 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
237 {"rsc1", PROCESSOR_PPC601,
238 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
239 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
240 {"rios2", PROCESSOR_RIOS2,
241 MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2,
242 POWERPC_MASKS | MASK_NEW_MNEMONICS},
243 {"403", PROCESSOR_PPC403,
244 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
245 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
246 {"505", PROCESSOR_MPCCORE,
247 MASK_POWERPC | MASK_NEW_MNEMONICS,
248 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
249 {"601", PROCESSOR_PPC601,
250 MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING,
251 MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
252 {"602", PROCESSOR_PPC602,
253 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
254 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
255 {"603", PROCESSOR_PPC603,
256 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
257 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
258 {"603e", PROCESSOR_PPC603,
259 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
260 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
261 {"604", PROCESSOR_PPC604,
262 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
263 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
264 {"620", PROCESSOR_PPC620,
265 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
266 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
267 {"821", PROCESSOR_MPCCORE,
268 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
269 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
270 {"860", PROCESSOR_MPCCORE,
271 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
272 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}};
274 int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt);
276 int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */
277 int string = TARGET_STRING; /* save current -mstring/-mno-string status */
279 profile_block_flag = 0;
281 /* Identify the processor type */
282 rs6000_select[0].string = default_cpu;
283 rs6000_cpu = PROCESSOR_DEFAULT;
285 for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++)
287 ptr = &rs6000_select[i];
288 if (ptr->string != (char *)0 && ptr->string[0] != '\0')
290 for (j = 0; j < ptt_size; j++)
291 if (! strcmp (ptr->string, processor_target_table[j].name))
294 rs6000_cpu = processor_target_table[j].processor;
298 target_flags |= processor_target_table[j].target_enable;
299 target_flags &= ~processor_target_table[j].target_disable;
305 error ("bad value (%s) for %s switch", ptr->string, ptr->name);
309 /* If -mmultiple or -mno-multiple was explicitly used, don't
310 override with the processor default */
311 if (TARGET_MULTIPLE_SET)
312 target_flags = (target_flags & ~MASK_MULTIPLE) | multiple;
314 /* If -mstring or -mno-string was explicitly used, don't
315 override with the processor default */
316 if (TARGET_STRING_SET)
317 target_flags = (target_flags & ~MASK_STRING) | string;
319 /* Don't allow -mmultiple or -mstring on little endian systems, because the
320 hardware doesn't support the instructions used in little endian mode */
321 if (!BYTES_BIG_ENDIAN)
325 target_flags &= ~MASK_MULTIPLE;
326 if (TARGET_MULTIPLE_SET)
327 warning ("-mmultiple is not supported on little endian systems");
332 target_flags &= ~MASK_STRING;
333 if (TARGET_STRING_SET)
334 warning ("-mstring is not supported on little endian systems");
338 #ifdef SUBTARGET_OVERRIDE_OPTIONS
339 SUBTARGET_OVERRIDE_OPTIONS;
343 /* Create a CONST_DOUBLE from a string. */
346 rs6000_float_const (string, mode)
348 enum machine_mode mode;
350 REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode);
351 return immed_real_const_1 (value, mode);
355 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
356 two parts of the constant if the target is little endian. */
359 rs6000_immed_double_const (i0, i1, mode)
360 HOST_WIDE_INT i0, i1;
361 enum machine_mode mode;
363 if (! WORDS_BIG_ENDIAN)
364 return immed_double_const (i1, i0, mode);
366 return immed_double_const (i0, i1, mode);
370 /* Return non-zero if this function is known to have a null epilogue. */
375 if (reload_completed)
377 rs6000_stack_t *info = rs6000_stack_info ();
379 if (info->first_gp_reg_save == 32
380 && info->first_fp_reg_save == 64
390 /* Returns 1 always. */
393 any_operand (op, mode)
395 enum machine_mode mode;
400 /* Returns 1 if op is the count register */
401 int count_register_operand(op, mode)
403 enum machine_mode mode;
405 if (GET_CODE (op) != REG)
408 if (REGNO (op) == COUNT_REGISTER_REGNUM)
411 if (REGNO (op) > FIRST_PSEUDO_REGISTER)
417 /* Return 1 if OP is a constant that can fit in a D field. */
420 short_cint_operand (op, mode)
422 enum machine_mode mode;
424 return (GET_CODE (op) == CONST_INT
425 && (unsigned) (INTVAL (op) + 0x8000) < 0x10000);
428 /* Similar for a unsigned D field. */
431 u_short_cint_operand (op, mode)
433 enum machine_mode mode;
435 return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0);
438 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
441 non_short_cint_operand (op, mode)
443 enum machine_mode mode;
445 return (GET_CODE (op) == CONST_INT
446 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000);
449 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
453 gpc_reg_operand (op, mode)
455 enum machine_mode mode;
457 return (register_operand (op, mode)
458 && (GET_CODE (op) != REG || REGNO (op) >= 67 || REGNO (op) < 64));
461 /* Returns 1 if OP is either a pseudo-register or a register denoting a
465 cc_reg_operand (op, mode)
467 enum machine_mode mode;
469 return (register_operand (op, mode)
470 && (GET_CODE (op) != REG
471 || REGNO (op) >= FIRST_PSEUDO_REGISTER
472 || CR_REGNO_P (REGNO (op))));
475 /* Returns 1 if OP is either a constant integer valid for a D-field or a
476 non-special register. If a register, it must be in the proper mode unless
480 reg_or_short_operand (op, mode)
482 enum machine_mode mode;
484 return short_cint_operand (op, mode) || gpc_reg_operand (op, mode);
487 /* Similar, except check if the negation of the constant would be valid for
491 reg_or_neg_short_operand (op, mode)
493 enum machine_mode mode;
495 if (GET_CODE (op) == CONST_INT)
496 return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
498 return gpc_reg_operand (op, mode);
501 /* Return 1 if the operand is either a register or an integer whose high-order
505 reg_or_u_short_operand (op, mode)
507 enum machine_mode mode;
509 if (GET_CODE (op) == CONST_INT
510 && (INTVAL (op) & 0xffff0000) == 0)
513 return gpc_reg_operand (op, mode);
516 /* Return 1 is the operand is either a non-special register or ANY
520 reg_or_cint_operand (op, mode)
522 enum machine_mode mode;
524 return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
527 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
528 with one instruction per word. We only do this if we can safely read
529 CONST_DOUBLE_{LOW,HIGH}. */
532 easy_fp_constant (op, mode)
534 register enum machine_mode mode;
536 if (GET_CODE (op) != CONST_DOUBLE
537 || GET_MODE (op) != mode
538 || GET_MODE_CLASS (mode) != MODE_FLOAT)
541 /* Consider all constants with -msoft-float to be easy */
542 if (TARGET_SOFT_FLOAT)
550 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
551 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
553 return (((unsigned) (k[0] + 0x8000) < 0x10000 || (k[0] & 0xffff) == 0)
554 && ((unsigned) (k[1] + 0x8000) < 0x10000 || (k[1] & 0xffff) == 0));
561 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
562 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
564 return ((unsigned) (l + 0x8000) < 0x10000 || (l & 0xffff) == 0);
568 /* Return 1 if the operand is in volatile memory. Note that during the
569 RTL generation phase, memory_operand does not return TRUE for
570 volatile memory references. So this function allows us to
571 recognize volatile references where its safe. */
574 volatile_mem_operand (op, mode)
576 enum machine_mode mode;
578 if (GET_CODE (op) != MEM)
581 if (!MEM_VOLATILE_P (op))
584 if (mode != GET_MODE (op))
587 if (reload_completed)
588 return memory_operand (op, mode);
590 if (reload_in_progress)
591 return strict_memory_address_p (mode, XEXP (op, 0));
593 return memory_address_p (mode, XEXP (op, 0));
596 /* Return 1 if the operand is an offsettable memory address. */
599 offsettable_addr_operand (op, mode)
601 enum machine_mode mode;
603 return offsettable_address_p (reload_completed | reload_in_progress,
607 /* Return 1 if the operand is either a floating-point register, a pseudo
608 register, or memory. */
611 fp_reg_or_mem_operand (op, mode)
613 enum machine_mode mode;
615 return (memory_operand (op, mode)
616 || volatile_mem_operand (op, mode)
617 || (register_operand (op, mode)
618 && (GET_CODE (op) != REG
619 || REGNO (op) >= FIRST_PSEUDO_REGISTER
620 || FP_REGNO_P (REGNO (op)))));
623 /* Return 1 if the operand is either an easy FP constant (see above) or
627 mem_or_easy_const_operand (op, mode)
629 enum machine_mode mode;
631 return memory_operand (op, mode) || easy_fp_constant (op, mode);
634 /* Return 1 if the operand is either a non-special register or an item
635 that can be used as the operand of an SI add insn. */
638 add_operand (op, mode)
640 enum machine_mode mode;
642 return (reg_or_short_operand (op, mode)
643 || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0));
646 /* Return 1 if OP is a constant but not a valid add_operand. */
649 non_add_cint_operand (op, mode)
651 enum machine_mode mode;
653 return (GET_CODE (op) == CONST_INT
654 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000
655 && (INTVAL (op) & 0xffff) != 0);
658 /* Return 1 if the operand is a non-special register or a constant that
659 can be used as the operand of an OR or XOR insn on the RS/6000. */
662 logical_operand (op, mode)
664 enum machine_mode mode;
666 return (gpc_reg_operand (op, mode)
667 || (GET_CODE (op) == CONST_INT
668 && ((INTVAL (op) & 0xffff0000) == 0
669 || (INTVAL (op) & 0xffff) == 0)));
672 /* Return 1 if C is a constant that is not a logical operand (as
676 non_logical_cint_operand (op, mode)
678 enum machine_mode mode;
680 return (GET_CODE (op) == CONST_INT
681 && (INTVAL (op) & 0xffff0000) != 0
682 && (INTVAL (op) & 0xffff) != 0);
685 /* Return 1 if C is a constant that can be encoded in a mask on the
686 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
687 Reject all ones and all zeros, since these should have been optimized
688 away and confuse the making of MB and ME. */
698 if (c == 0 || c == ~0)
701 last_bit_value = c & 1;
703 for (i = 1; i < 32; i++)
704 if (((c >>= 1) & 1) != last_bit_value)
705 last_bit_value ^= 1, transitions++;
707 return transitions <= 2;
710 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
713 mask_operand (op, mode)
715 enum machine_mode mode;
717 return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
720 /* Return 1 if the operand is either a non-special register or a
721 constant that can be used as the operand of an RS/6000 logical AND insn. */
724 and_operand (op, mode)
726 enum machine_mode mode;
728 return (reg_or_short_operand (op, mode)
729 || logical_operand (op, mode)
730 || mask_operand (op, mode));
733 /* Return 1 if the operand is a constant but not a valid operand for an AND
737 non_and_cint_operand (op, mode)
739 enum machine_mode mode;
741 return GET_CODE (op) == CONST_INT && ! and_operand (op, mode);
744 /* Return 1 if the operand is a general register or memory operand. */
747 reg_or_mem_operand (op, mode)
749 register enum machine_mode mode;
751 return (gpc_reg_operand (op, mode)
752 || memory_operand (op, mode)
753 || volatile_mem_operand (op, mode));
756 /* Return 1 if the operand is a general register or memory operand without
757 pre-inc or pre_dec which produces invalid form of PowerPC lwa
761 lwa_operand (op, mode)
763 register enum machine_mode mode;
767 if (reload_completed && GET_CODE (inner) == SUBREG)
768 inner = SUBREG_REG (inner);
770 return gpc_reg_operand (inner, mode)
771 || (memory_operand (inner, mode)
772 && GET_CODE (XEXP (inner, 0)) != PRE_INC
773 && GET_CODE (XEXP (inner, 0)) != PRE_DEC);
776 /* Return 1 if the operand, used inside a MEM, is a valid first argument
777 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
781 call_operand (op, mode)
783 enum machine_mode mode;
785 if (mode != VOIDmode && GET_MODE (op) != mode)
788 return (GET_CODE (op) == SYMBOL_REF
789 || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER));
793 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
797 current_file_function_operand (op, mode)
799 enum machine_mode mode;
801 return (GET_CODE (op) == SYMBOL_REF
802 && (SYMBOL_REF_FLAG (op)
803 || op == XEXP (DECL_RTL (current_function_decl), 0)));
807 /* Return 1 if this operand is a valid input for a move insn. */
810 input_operand (op, mode)
812 enum machine_mode mode;
814 /* Memory is always valid. */
815 if (memory_operand (op, mode))
818 /* For floating-point, easy constants are valid. */
819 if (GET_MODE_CLASS (mode) == MODE_FLOAT
821 && easy_fp_constant (op, mode))
824 /* For floating-point or multi-word mode, the only remaining valid type
826 if (GET_MODE_CLASS (mode) == MODE_FLOAT
827 || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
828 return register_operand (op, mode);
830 /* The only cases left are integral modes one word or smaller (we
831 do not get called for MODE_CC values). These can be in any
833 if (register_operand (op, mode))
836 /* For integer modes, any constant is ok. */
837 if (GET_CODE (op) == CONST_INT)
840 /* A SYMBOL_REF referring to the TOC is valid. */
841 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op))
844 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
845 directly in the instruction stream */
846 if (DEFAULT_ABI == ABI_NT
847 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF))
850 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
852 if (DEFAULT_ABI == ABI_V4
853 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST)
854 && small_data_operand (op, Pmode))
860 /* Return 1 for an operand in small memory on V.4/eabi */
863 small_data_operand (op, mode)
865 enum machine_mode mode;
867 rtx sym_ref, const_part;
874 if (DEFAULT_ABI != ABI_V4)
877 if (GET_CODE (op) == SYMBOL_REF)
880 else if (GET_CODE (op) != CONST
881 || GET_CODE (XEXP (op, 0)) != PLUS
882 || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF
883 || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT)
887 sym_ref = XEXP (XEXP (op, 0), 0);
889 if (*XSTR (sym_ref, 0) != '@')
896 /* Initialize a variable CUM of type CUMULATIVE_ARGS
897 for a call to a function whose data type is FNTYPE.
898 For a library call, FNTYPE is 0.
900 For incoming args we set the number of arguments in the prototype large
901 so we never return an EXPR_LIST. */
904 init_cumulative_args (cum, fntype, libname, incoming)
905 CUMULATIVE_ARGS *cum;
910 static CUMULATIVE_ARGS zero_cumulative;
911 enum rs6000_abi abi = DEFAULT_ABI;
913 *cum = zero_cumulative;
915 cum->fregno = FP_ARG_MIN_REG;
916 cum->prototype = (fntype && TYPE_ARG_TYPES (fntype));
917 cum->call_cookie = CALL_NORMAL;
921 cum->nargs_prototype = 1000; /* don't return an EXPR_LIST */
923 cum->varargs_offset = RS6000_VARARGS_OFFSET;
926 else if (cum->prototype)
927 cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1
928 + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode
929 || RETURN_IN_MEMORY (TREE_TYPE (fntype))));
932 cum->nargs_prototype = 0;
934 cum->orig_nargs = cum->nargs_prototype;
936 /* Check for DLL import functions */
939 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype)))
940 cum->call_cookie = CALL_NT_DLLIMPORT;
942 if (TARGET_DEBUG_ARG)
944 fprintf (stderr, "\ninit_cumulative_args:");
947 tree ret_type = TREE_TYPE (fntype);
948 fprintf (stderr, " ret code = %s,",
949 tree_code_name[ (int)TREE_CODE (ret_type) ]);
952 if (abi == ABI_V4 && incoming)
953 fprintf (stderr, " varargs = %d, ", cum->varargs_offset);
955 if (cum->call_cookie == CALL_NT_DLLIMPORT)
956 fprintf (stderr, " dllimport,");
958 fprintf (stderr, " proto = %d, nargs = %d\n",
959 cum->prototype, cum->nargs_prototype);
963 /* If defined, a C expression that gives the alignment boundary, in bits,
964 of an argument with the specified mode and type. If it is not defined,
965 PARM_BOUNDARY is used for all arguments.
967 Windows NT wants anything >= 8 bytes to be double word aligned.
969 V.4 wants long longs to be double word aligned. */
972 function_arg_boundary (mode, type)
973 enum machine_mode mode;
976 if (DEFAULT_ABI == ABI_V4 && mode == DImode)
979 if (DEFAULT_ABI != ABI_NT || TARGET_64BIT)
980 return PARM_BOUNDARY;
983 return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32;
985 return (int_size_in_bytes (type) >= 8) ? 64 : 32;
988 /* Update the data in CUM to advance over an argument
989 of mode MODE and data type TYPE.
990 (TYPE is null for libcalls where that information may not be available.) */
993 function_arg_advance (cum, mode, type, named)
994 CUMULATIVE_ARGS *cum;
995 enum machine_mode mode;
999 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1000 cum->words += align;
1001 cum->nargs_prototype--;
1003 if (DEFAULT_ABI == ABI_V4)
1005 /* Long longs must not be split between registers and stack */
1006 if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT)
1007 && type && !AGGREGATE_TYPE_P (type)
1008 && cum->words < GP_ARG_NUM_REG
1009 && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
1011 cum->words = GP_ARG_NUM_REG;
1014 /* Aggregates get passed as pointers */
1015 if (type && AGGREGATE_TYPE_P (type))
1018 /* Floats go in registers, & don't occupy space in the GP registers
1019 like they do for AIX unless software floating point. */
1020 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1021 && TARGET_HARD_FLOAT
1022 && cum->fregno <= FP_ARG_V4_MAX_REG)
1026 cum->words += RS6000_ARG_SIZE (mode, type, 1);
1031 cum->words += RS6000_ARG_SIZE (mode, type, named);
1032 if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT)
1036 if (TARGET_DEBUG_ARG)
1038 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1039 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
1042 /* Determine where to put an argument to a function.
1043 Value is zero to push the argument on the stack,
1044 or a hard register in which to store the argument.
1046 MODE is the argument's machine mode.
1047 TYPE is the data type of the argument (as a tree).
1048 This is null for libcalls where that information may
1050 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1051 the preceding args and about the function being called.
1052 NAMED is nonzero if this argument is a named parameter
1053 (otherwise it is an extra parameter matching an ellipsis).
1055 On RS/6000 the first eight words of non-FP are normally in registers
1056 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1057 Under V.4, the first 8 FP args are in registers.
1059 If this is floating-point and no prototype is specified, we use
1060 both an FP and integer register (or possibly FP reg and stack). Library
1061 functions (when TYPE is zero) always have the proper types for args,
1062 so we can pass the FP value just in one register. emit_library_function
1063 doesn't support EXPR_LIST anyway. */
1066 function_arg (cum, mode, type, named)
1067 CUMULATIVE_ARGS *cum;
1068 enum machine_mode mode;
1072 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1073 int align_words = cum->words + align;
1075 if (TARGET_DEBUG_ARG)
1077 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1078 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
1080 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1081 uses to say fp args were passed in registers. Assume that we don't need the
1082 marker for software floating point, or compiler generated library calls. */
1083 if (mode == VOIDmode)
1085 enum rs6000_abi abi = DEFAULT_ABI;
1088 && TARGET_HARD_FLOAT
1089 && cum->nargs_prototype < 0
1090 && type && (cum->prototype || TARGET_NO_PROTOTYPE))
1092 if (cum->call_cookie != CALL_NORMAL)
1095 return GEN_INT ((cum->fregno == FP_ARG_MIN_REG)
1096 ? CALL_V4_SET_FP_ARGS
1097 : CALL_V4_CLEAR_FP_ARGS);
1100 return GEN_INT (cum->call_cookie);
1105 if (DEFAULT_ABI != ABI_V4)
1109 if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
1112 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1114 if ((cum->nargs_prototype > 0)
1115 || (DEFAULT_ABI == ABI_V4) /* V.4 never passes FP values in GP registers */
1117 return gen_rtx (REG, mode, cum->fregno);
1119 return gen_rtx (EXPR_LIST, VOIDmode,
1120 ((align_words < GP_ARG_NUM_REG)
1121 ? gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words)
1123 gen_rtx (REG, mode, cum->fregno));
1126 /* Long longs won't be split between register and stack */
1127 else if (DEFAULT_ABI == ABI_V4 &&
1128 align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
1133 else if (align_words < GP_ARG_NUM_REG)
1134 return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words);
1139 /* For an arg passed partly in registers and partly in memory,
1140 this is the number of registers used.
1141 For args passed entirely in registers or entirely in memory, zero. */
1144 function_arg_partial_nregs (cum, mode, type, named)
1145 CUMULATIVE_ARGS *cum;
1146 enum machine_mode mode;
1153 if (DEFAULT_ABI == ABI_V4)
1156 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1158 if (cum->nargs_prototype >= 0)
1162 if (cum->words < GP_ARG_NUM_REG
1163 && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named)))
1165 int ret = GP_ARG_NUM_REG - cum->words;
1166 if (ret && TARGET_DEBUG_ARG)
1167 fprintf (stderr, "function_arg_partial_nregs: %d\n", ret);
1175 /* A C expression that indicates when an argument must be passed by
1176 reference. If nonzero for an argument, a copy of that argument is
1177 made in memory and a pointer to the argument is passed instead of
1178 the argument itself. The pointer is passed in whatever way is
1179 appropriate for passing a pointer to that type.
1181 Under V.4, structures and unions are passed by reference. */
1184 function_arg_pass_by_reference (cum, mode, type, named)
1185 CUMULATIVE_ARGS *cum;
1186 enum machine_mode mode;
1190 if (DEFAULT_ABI == ABI_V4 && type && AGGREGATE_TYPE_P (type))
1192 if (TARGET_DEBUG_ARG)
1193 fprintf (stderr, "function_arg_pass_by_reference: aggregate\n");
1202 /* Perform any needed actions needed for a function that is receiving a
1203 variable number of arguments.
1207 MODE and TYPE are the mode and type of the current parameter.
1209 PRETEND_SIZE is a variable that should be set to the amount of stack
1210 that must be pushed by the prolog to pretend that our caller pushed
1213 Normally, this macro will push all remaining incoming registers on the
1214 stack and set PRETEND_SIZE to the length of the registers pushed. */
1217 setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
1218 CUMULATIVE_ARGS *cum;
1219 enum machine_mode mode;
1225 rtx save_area = virtual_incoming_args_rtx;
1226 int reg_size = (TARGET_64BIT) ? 8 : 4;
1228 if (TARGET_DEBUG_ARG)
1230 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1231 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl);
1233 if (DEFAULT_ABI == ABI_V4 && !no_rtl)
1235 rs6000_sysv_varargs_p = 1;
1236 save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET);
1241 int first_reg_offset = cum->words;
1243 if (MUST_PASS_IN_STACK (mode, type))
1244 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1);
1246 if (first_reg_offset > GP_ARG_NUM_REG)
1247 first_reg_offset = GP_ARG_NUM_REG;
1249 if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG)
1251 (GP_ARG_MIN_REG + first_reg_offset,
1252 gen_rtx (MEM, BLKmode,
1253 plus_constant (save_area, first_reg_offset * reg_size)),
1254 GP_ARG_NUM_REG - first_reg_offset,
1255 (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD);
1257 *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD;
1260 /* Save FP registers if needed. */
1261 if (DEFAULT_ABI == ABI_V4 && TARGET_HARD_FLOAT && !no_rtl)
1263 int fregno = cum->fregno;
1264 int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno;
1266 if (num_fp_reg >= 0)
1268 rtx cr1 = gen_rtx (REG, CCmode, 69);
1269 rtx lab = gen_label_rtx ();
1270 int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8);
1272 emit_jump_insn (gen_rtx (SET, VOIDmode,
1274 gen_rtx (IF_THEN_ELSE, VOIDmode,
1275 gen_rtx (NE, VOIDmode, cr1, const0_rtx),
1276 gen_rtx (LABEL_REF, VOIDmode, lab),
1279 while ( num_fp_reg-- >= 0)
1281 emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)),
1282 gen_rtx (REG, DFmode, fregno++));
1291 /* If defined, is a C expression that produces the machine-specific
1292 code for a call to `__builtin_saveregs'. This code will be moved
1293 to the very beginning of the function, before any parameter access
1294 are made. The return value of this function should be an RTX that
1295 contains the value to use as the return of `__builtin_saveregs'.
1297 The argument ARGS is a `tree_list' containing the arguments that
1298 were passed to `__builtin_saveregs'.
1300 If this macro is not defined, the compiler will output an ordinary
1301 call to the library function `__builtin_saveregs'.
1303 On the Power/PowerPC return the address of the area on the stack
1304 used to hold arguments. Under AIX, this includes the 8 word register
1305 save area. Under V.4 this does not. */
1308 expand_builtin_saveregs (args)
1311 return virtual_incoming_args_rtx;
1315 /* Allocate a stack temp. Only allocate one stack temp per type for a
1319 rs6000_stack_temp (mode, size)
1320 enum machine_mode mode;
1323 rtx temp = stack_temps[ (int)mode ];
1326 if (temp == NULL_RTX)
1328 temp = assign_stack_local (mode, size, 0);
1329 addr = XEXP (temp, 0);
1331 if ((size > 4 && !offsettable_address_p (0, mode, addr))
1332 || (size <= 4 && !memory_address_p (mode, addr)))
1334 XEXP (temp, 0) = copy_addr_to_reg (addr);
1337 stack_temps[ (int)mode ] = temp;
1344 /* Generate a memory reference for expand_block_move, copying volatile,
1345 and other bits from an original memory reference. */
1348 expand_block_move_mem (mode, addr, orig_mem)
1349 enum machine_mode mode;
1353 rtx mem = gen_rtx (MEM, mode, addr);
1355 RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem);
1356 MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem);
1357 MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem);
1358 #ifdef MEM_UNALIGNED_P
1359 MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem);
1364 /* Expand a block move operation, and return 1 if successful. Return 0
1365 if we should let the compiler generate normal code.
1367 operands[0] is the destination
1368 operands[1] is the source
1369 operands[2] is the length
1370 operands[3] is the alignment */
1372 #define MAX_MOVE_REG 4
1375 expand_block_move (operands)
1378 rtx orig_dest = operands[0];
1379 rtx orig_src = operands[1];
1380 rtx bytes_rtx = operands[2];
1381 rtx align_rtx = operands[3];
1382 int constp = (GET_CODE (bytes_rtx) == CONST_INT);
1383 int align = XINT (align_rtx, 0);
1393 rtx stores[MAX_MOVE_REG];
1396 /* If this is not a fixed size move, just call memcpy */
1400 /* Anything to move? */
1401 bytes = INTVAL (bytes_rtx);
1405 /* Don't support real large moves. If string instructions are not used,
1406 then don't generate more than 8 loads. */
1412 else if (!STRICT_ALIGNMENT)
1417 else if (bytes > 8*align)
1420 /* Move the address into scratch registers. */
1421 dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0));
1422 src_reg = copy_addr_to_reg (XEXP (orig_src, 0));
1424 if (TARGET_STRING) /* string instructions are available */
1426 for ( ; bytes > 0; bytes -= move_bytes)
1428 if (bytes > 24 /* move up to 32 bytes at a time */
1438 move_bytes = (bytes > 32) ? 32 : bytes;
1439 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1440 expand_block_move_mem (BLKmode, src_reg, orig_src),
1441 GEN_INT ((move_bytes == 32) ? 0 : move_bytes),
1444 else if (bytes > 16 /* move up to 24 bytes at a time */
1452 move_bytes = (bytes > 24) ? 24 : bytes;
1453 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1454 expand_block_move_mem (BLKmode, src_reg, orig_src),
1455 GEN_INT (move_bytes),
1458 else if (bytes > 8 /* move up to 16 bytes at a time */
1464 move_bytes = (bytes > 16) ? 16 : bytes;
1465 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1466 expand_block_move_mem (BLKmode, src_reg, orig_src),
1467 GEN_INT (move_bytes),
1470 else if (bytes > 4 && !TARGET_64BIT)
1471 { /* move up to 8 bytes at a time */
1472 move_bytes = (bytes > 8) ? 8 : bytes;
1473 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1474 expand_block_move_mem (BLKmode, src_reg, orig_src),
1475 GEN_INT (move_bytes),
1478 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1479 { /* move 4 bytes */
1481 tmp_reg = gen_reg_rtx (SImode);
1482 emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src));
1483 emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg);
1485 else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT))
1486 { /* move 2 bytes */
1488 tmp_reg = gen_reg_rtx (HImode);
1489 emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src));
1490 emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg);
1492 else if (bytes == 1) /* move 1 byte */
1495 tmp_reg = gen_reg_rtx (QImode);
1496 emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src));
1497 emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg);
1500 { /* move up to 4 bytes at a time */
1501 move_bytes = (bytes > 4) ? 4 : bytes;
1502 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1503 expand_block_move_mem (BLKmode, src_reg, orig_src),
1504 GEN_INT (move_bytes),
1508 if (bytes > move_bytes)
1510 emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes)));
1511 emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes)));
1516 else /* string instructions not available */
1518 num_reg = offset = 0;
1519 for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes))
1521 /* Calculate the correct offset for src/dest */
1525 dest_addr = dest_reg;
1529 src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset));
1530 dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset));
1533 /* Generate the appropriate load and store, saving the stores for later */
1534 if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT))
1537 tmp_reg = gen_reg_rtx (DImode);
1538 emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src)));
1539 stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg);
1541 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1544 tmp_reg = gen_reg_rtx (SImode);
1545 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src)));
1546 stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg);
1548 else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT))
1551 tmp_reg = gen_reg_rtx (HImode);
1552 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src)));
1553 stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg);
1558 tmp_reg = gen_reg_rtx (QImode);
1559 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src)));
1560 stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg);
1563 if (num_reg >= MAX_MOVE_REG)
1565 for (i = 0; i < num_reg; i++)
1566 emit_insn (stores[i]);
1571 for (i = 0; i < num_reg; i++)
1572 emit_insn (stores[i]);
1579 /* Return 1 if OP is a load multiple operation. It is known to be a
1580 PARALLEL and the first section will be tested. */
1583 load_multiple_operation (op, mode)
1585 enum machine_mode mode;
1587 int count = XVECLEN (op, 0);
1592 /* Perform a quick check so we don't blow up below. */
1594 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1595 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1596 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1599 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1600 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1602 for (i = 1; i < count; i++)
1604 rtx elt = XVECEXP (op, 0, i);
1606 if (GET_CODE (elt) != SET
1607 || GET_CODE (SET_DEST (elt)) != REG
1608 || GET_MODE (SET_DEST (elt)) != SImode
1609 || REGNO (SET_DEST (elt)) != dest_regno + i
1610 || GET_CODE (SET_SRC (elt)) != MEM
1611 || GET_MODE (SET_SRC (elt)) != SImode
1612 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1613 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1614 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1615 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
1622 /* Similar, but tests for store multiple. Here, the second vector element
1623 is a CLOBBER. It will be tested later. */
1626 store_multiple_operation (op, mode)
1628 enum machine_mode mode;
1630 int count = XVECLEN (op, 0) - 1;
1635 /* Perform a quick check so we don't blow up below. */
1637 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1638 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1639 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1642 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1643 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1645 for (i = 1; i < count; i++)
1647 rtx elt = XVECEXP (op, 0, i + 1);
1649 if (GET_CODE (elt) != SET
1650 || GET_CODE (SET_SRC (elt)) != REG
1651 || GET_MODE (SET_SRC (elt)) != SImode
1652 || REGNO (SET_SRC (elt)) != src_regno + i
1653 || GET_CODE (SET_DEST (elt)) != MEM
1654 || GET_MODE (SET_DEST (elt)) != SImode
1655 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1656 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1657 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1658 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
1665 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1666 We only check the opcode against the mode of the CC value here. */
1669 branch_comparison_operator (op, mode)
1671 enum machine_mode mode;
1673 enum rtx_code code = GET_CODE (op);
1674 enum machine_mode cc_mode;
1676 if (GET_RTX_CLASS (code) != '<')
1679 cc_mode = GET_MODE (XEXP (op, 0));
1680 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1683 if ((code == GT || code == LT || code == GE || code == LE)
1684 && cc_mode == CCUNSmode)
1687 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1688 && (cc_mode != CCUNSmode))
1694 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1695 We check the opcode against the mode of the CC value and disallow EQ or
1696 NE comparisons for integers. */
1699 scc_comparison_operator (op, mode)
1701 enum machine_mode mode;
1703 enum rtx_code code = GET_CODE (op);
1704 enum machine_mode cc_mode;
1706 if (GET_MODE (op) != mode && mode != VOIDmode)
1709 if (GET_RTX_CLASS (code) != '<')
1712 cc_mode = GET_MODE (XEXP (op, 0));
1713 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1716 if (code == NE && cc_mode != CCFPmode)
1719 if ((code == GT || code == LT || code == GE || code == LE)
1720 && cc_mode == CCUNSmode)
1723 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1724 && (cc_mode != CCUNSmode))
1727 if (cc_mode == CCEQmode && code != EQ && code != NE)
1733 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1734 mask required to convert the result of a rotate insn into a shift
1735 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1738 includes_lshift_p (shiftop, andop)
1739 register rtx shiftop;
1742 int shift_mask = (~0 << INTVAL (shiftop));
1744 return (INTVAL (andop) & ~shift_mask) == 0;
1747 /* Similar, but for right shift. */
1750 includes_rshift_p (shiftop, andop)
1751 register rtx shiftop;
1754 unsigned shift_mask = ~0;
1756 shift_mask >>= INTVAL (shiftop);
1758 return (INTVAL (andop) & ~ shift_mask) == 0;
1761 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1762 for lfq and stfq insns.
1764 Note reg1 and reg2 *must* be hard registers. To be sure we will
1765 abort if we are passed pseudo registers. */
1768 registers_ok_for_quad_peep (reg1, reg2)
1771 /* We might have been passed a SUBREG. */
1772 if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG)
1775 return (REGNO (reg1) == REGNO (reg2) - 1);
1778 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1779 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1782 addrs_ok_for_quad_peep (addr1, addr2)
1789 /* Extract an offset (if used) from the first addr. */
1790 if (GET_CODE (addr1) == PLUS)
1792 /* If not a REG, return zero. */
1793 if (GET_CODE (XEXP (addr1, 0)) != REG)
1797 reg1 = REGNO (XEXP (addr1, 0));
1798 /* The offset must be constant! */
1799 if (GET_CODE (XEXP (addr1, 1)) != CONST_INT)
1801 offset1 = INTVAL (XEXP (addr1, 1));
1804 else if (GET_CODE (addr1) != REG)
1808 reg1 = REGNO (addr1);
1809 /* This was a simple (mem (reg)) expression. Offset is 0. */
1813 /* Make sure the second address is a (mem (plus (reg) (const_int). */
1814 if (GET_CODE (addr2) != PLUS)
1817 if (GET_CODE (XEXP (addr2, 0)) != REG
1818 || GET_CODE (XEXP (addr2, 1)) != CONST_INT)
1821 if (reg1 != REGNO (XEXP (addr2, 0)))
1824 /* The offset for the second addr must be 8 more than the first addr. */
1825 if (INTVAL (XEXP (addr2, 1)) != offset1 + 8)
1828 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
1833 /* Return the register class of a scratch register needed to copy IN into
1834 or out of a register in CLASS in MODE. If it can be done directly,
1835 NO_REGS is returned. */
1838 secondary_reload_class (class, mode, in)
1839 enum reg_class class;
1840 enum machine_mode mode;
1843 int regno = true_regnum (in);
1845 if (regno >= FIRST_PSEUDO_REGISTER)
1848 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
1850 if (class == GENERAL_REGS || class == BASE_REGS
1851 || (regno >= 0 && INT_REGNO_P (regno)))
1854 /* Constants, memory, and FP registers can go into FP registers. */
1855 if ((regno == -1 || FP_REGNO_P (regno))
1856 && (class == FLOAT_REGS || class == NON_SPECIAL_REGS))
1859 /* We can copy among the CR registers. */
1860 if ((class == CR_REGS || class == CR0_REGS)
1861 && regno >= 0 && CR_REGNO_P (regno))
1864 /* Otherwise, we need GENERAL_REGS. */
1865 return GENERAL_REGS;
1868 /* Given a comparison operation, return the bit number in CCR to test. We
1869 know this is a valid comparison.
1871 SCC_P is 1 if this is for an scc. That means that %D will have been
1872 used instead of %C, so the bits will be in different places.
1874 Return -1 if OP isn't a valid comparison for some reason. */
1881 enum rtx_code code = GET_CODE (op);
1882 enum machine_mode cc_mode;
1886 if (GET_RTX_CLASS (code) != '<')
1889 cc_mode = GET_MODE (XEXP (op, 0));
1890 cc_regnum = REGNO (XEXP (op, 0));
1891 base_bit = 4 * (cc_regnum - 68);
1893 /* In CCEQmode cases we have made sure that the result is always in the
1894 third bit of the CR field. */
1896 if (cc_mode == CCEQmode)
1897 return base_bit + 3;
1902 return scc_p ? base_bit + 3 : base_bit + 2;
1904 return base_bit + 2;
1906 return base_bit + 1;
1911 /* If floating-point, we will have done a cror to put the bit in the
1912 unordered position. So test that bit. For integer, this is ! LT
1913 unless this is an scc insn. */
1914 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit;
1917 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1;
1924 /* Print an operand. Recognize special options, documented below. */
1927 print_operand (file, x, code)
1935 /* These macros test for integers and extract the low-order bits. */
1937 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
1938 && GET_MODE (X) == VOIDmode)
1940 #define INT_LOWPART(X) \
1941 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
1946 /* Write out an instruction after the call which may be replaced
1947 with glue code by the loader. This depends on the AIX version. */
1948 asm_fprintf (file, RS6000_CALL_GLUE);
1952 /* Write the register number of the TOC register. */
1953 fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file);
1957 /* If X is a constant integer whose low-order 5 bits are zero,
1958 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
1959 in the AIX assembler where "sri" with a zero shift count
1960 write a trash instruction. */
1961 if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0)
1968 /* Low-order 16 bits of constant, unsigned. */
1970 output_operand_lossage ("invalid %%b value");
1972 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
1976 /* This is an optional cror needed for LE or GE floating-point
1977 comparisons. Otherwise write nothing. */
1978 if ((GET_CODE (x) == LE || GET_CODE (x) == GE)
1979 && GET_MODE (XEXP (x, 0)) == CCFPmode)
1981 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1983 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
1984 base_bit + 2, base_bit + (GET_CODE (x) == GE));
1989 /* Similar, except that this is for an scc, so we must be able to
1990 encode the test in a single bit that is one. We do the above
1991 for any LE, GE, GEU, or LEU and invert the bit for NE. */
1992 if (GET_CODE (x) == LE || GET_CODE (x) == GE
1993 || GET_CODE (x) == LEU || GET_CODE (x) == GEU)
1995 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1997 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
1999 base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU));
2002 else if (GET_CODE (x) == NE)
2004 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2006 fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3,
2007 base_bit + 2, base_bit + 2);
2012 /* X is a CR register. Print the number of the third bit of the CR */
2013 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2014 output_operand_lossage ("invalid %%E value");
2016 fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3);
2020 /* X is a CR register. Print the shift count needed to move it
2021 to the high-order four bits. */
2022 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2023 output_operand_lossage ("invalid %%f value");
2025 fprintf (file, "%d", 4 * (REGNO (x) - 68));
2029 /* Similar, but print the count for the rotate in the opposite
2031 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2032 output_operand_lossage ("invalid %%F value");
2034 fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68));
2038 /* X is a constant integer. If it is negative, print "m",
2039 otherwise print "z". This is to make a aze or ame insn. */
2040 if (GET_CODE (x) != CONST_INT)
2041 output_operand_lossage ("invalid %%G value");
2042 else if (INTVAL (x) >= 0)
2049 /* If constant, output low-order five bits. Otherwise,
2052 fprintf (file, "%d", INT_LOWPART (x) & 31);
2054 print_operand (file, x, 0);
2058 /* If constant, output low-order six bits. Otherwise,
2061 fprintf (file, "%d", INT_LOWPART (x) & 63);
2063 print_operand (file, x, 0);
2067 /* Print `i' if this is a constant, else nothing. */
2073 /* Write the bit number in CCR for jump. */
2076 output_operand_lossage ("invalid %%j code");
2078 fprintf (file, "%d", i);
2082 /* Similar, but add one for shift count in rlinm for scc and pass
2083 scc flag to `ccr_bit'. */
2086 output_operand_lossage ("invalid %%J code");
2088 /* If we want bit 31, write a shift count of zero, not 32. */
2089 fprintf (file, "%d", i == 31 ? 0 : i + 1);
2093 /* X must be a constant. Write the 1's complement of the
2096 output_operand_lossage ("invalid %%k value");
2098 fprintf (file, "%d", ~ INT_LOWPART (x));
2102 /* Write second word of DImode or DFmode reference. Works on register
2103 or non-indexed memory only. */
2104 if (GET_CODE (x) == REG)
2105 fprintf (file, "%d", REGNO (x) + 1);
2106 else if (GET_CODE (x) == MEM)
2108 /* Handle possible auto-increment. Since it is pre-increment and
2109 we have already done it, we can just use an offset of four. */
2110 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2111 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2112 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4));
2114 output_address (plus_constant (XEXP (x, 0), 4));
2115 if (DEFAULT_ABI == ABI_V4 && small_data_operand (x, GET_MODE (x)))
2116 fprintf (file, "@sda21(%s)", reg_names[0]);
2121 /* MB value for a mask operand. */
2122 if (! mask_operand (x, VOIDmode))
2123 output_operand_lossage ("invalid %%m value");
2125 val = INT_LOWPART (x);
2127 /* If the high bit is set and the low bit is not, the value is zero.
2128 If the high bit is zero, the value is the first 1 bit we find from
2130 if (val < 0 && (val & 1) == 0)
2137 for (i = 1; i < 32; i++)
2138 if ((val <<= 1) < 0)
2140 fprintf (file, "%d", i);
2144 /* Otherwise, look for the first 0 bit from the right. The result is its
2145 number plus 1. We know the low-order bit is one. */
2146 for (i = 0; i < 32; i++)
2147 if (((val >>= 1) & 1) == 0)
2150 /* If we ended in ...01, I would be 0. The correct value is 31, so
2152 fprintf (file, "%d", 31 - i);
2156 /* ME value for a mask operand. */
2157 if (! mask_operand (x, VOIDmode))
2158 output_operand_lossage ("invalid %%m value");
2160 val = INT_LOWPART (x);
2162 /* If the low bit is set and the high bit is not, the value is 31.
2163 If the low bit is zero, the value is the first 1 bit we find from
2165 if ((val & 1) && val >= 0)
2170 else if ((val & 1) == 0)
2172 for (i = 0; i < 32; i++)
2173 if ((val >>= 1) & 1)
2176 /* If we had ....10, I would be 0. The result should be
2177 30, so we need 30 - i. */
2178 fprintf (file, "%d", 30 - i);
2182 /* Otherwise, look for the first 0 bit from the left. The result is its
2183 number minus 1. We know the high-order bit is one. */
2184 for (i = 0; i < 32; i++)
2185 if ((val <<= 1) >= 0)
2188 fprintf (file, "%d", i);
2192 /* Write the number of elements in the vector times 4. */
2193 if (GET_CODE (x) != PARALLEL)
2194 output_operand_lossage ("invalid %%N value");
2196 fprintf (file, "%d", XVECLEN (x, 0) * 4);
2200 /* Similar, but subtract 1 first. */
2201 if (GET_CODE (x) != PARALLEL)
2202 output_operand_lossage ("invalid %%N value");
2204 fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4);
2208 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2210 || (i = exact_log2 (INT_LOWPART (x))) < 0)
2211 output_operand_lossage ("invalid %%p value");
2213 fprintf (file, "%d", i);
2217 /* The operand must be an indirect memory reference. The result
2218 is the register number. */
2219 if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
2220 || REGNO (XEXP (x, 0)) >= 32)
2221 output_operand_lossage ("invalid %%P value");
2223 fprintf (file, "%d", REGNO (XEXP (x, 0)));
2227 /* X is a CR register. Print the mask for `mtcrf'. */
2228 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2229 output_operand_lossage ("invalid %%R value");
2231 fprintf (file, "%d", 128 >> (REGNO (x) - 68));
2235 /* Low 5 bits of 32 - value */
2237 output_operand_lossage ("invalid %%s value");
2239 fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31);
2243 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2244 All floating-point operations except NE branch true and integer
2245 EQ, LT, GT, LTU and GTU also branch true. */
2246 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2247 output_operand_lossage ("invalid %%t value");
2249 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2250 && GET_CODE (x) != NE)
2251 || GET_CODE (x) == EQ
2252 || GET_CODE (x) == LT || GET_CODE (x) == GT
2253 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2260 /* Opposite of 't': write 4 if this jump operation will branch if true,
2262 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2263 output_operand_lossage ("invalid %%t value");
2265 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2266 && GET_CODE (x) != NE)
2267 || GET_CODE (x) == EQ
2268 || GET_CODE (x) == LT || GET_CODE (x) == GT
2269 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2276 /* High-order 16 bits of constant. */
2278 output_operand_lossage ("invalid %%u value");
2280 fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff);
2284 /* Print `u' if this has an auto-increment or auto-decrement. */
2285 if (GET_CODE (x) == MEM
2286 && (GET_CODE (XEXP (x, 0)) == PRE_INC
2287 || GET_CODE (XEXP (x, 0)) == PRE_DEC))
2292 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2295 fprintf (file, "%d",
2296 (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000));
2298 print_operand (file, x, 0);
2302 /* If constant, low-order 16 bits of constant, unsigned.
2303 Otherwise, write normally. */
2305 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
2307 print_operand (file, x, 0);
2311 if (GET_CODE (x) == MEM
2312 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0)))
2317 /* Like 'L', for third word of TImode */
2318 if (GET_CODE (x) == REG)
2319 fprintf (file, "%d", REGNO (x) + 2);
2320 else if (GET_CODE (x) == MEM)
2322 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2323 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2324 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8));
2326 output_address (plus_constant (XEXP (x, 0), 8));
2327 if (DEFAULT_ABI == ABI_V4 && small_data_operand (x, GET_MODE (x)))
2328 fprintf (file, "@sda21(%s)", reg_names[0]);
2333 /* X is a SYMBOL_REF. Write out the name preceded by a
2334 period and without any trailing data in brackets. Used for function
2335 names. If we are configured for System V (or the embedded ABI) on
2336 the PowerPC, do not emit the period, since those systems do not use
2337 TOCs and the like. */
2338 if (GET_CODE (x) != SYMBOL_REF)
2341 if (XSTR (x, 0)[0] != '.')
2343 switch (DEFAULT_ABI)
2353 case ABI_AIX_NODESC:
2361 RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
2365 /* Like 'L', for last word of TImode. */
2366 if (GET_CODE (x) == REG)
2367 fprintf (file, "%d", REGNO (x) + 3);
2368 else if (GET_CODE (x) == MEM)
2370 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2371 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2372 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12));
2374 output_address (plus_constant (XEXP (x, 0), 12));
2375 if (DEFAULT_ABI == ABI_V4 && small_data_operand (x, GET_MODE (x)))
2376 fprintf (file, "@sda21(%s)", reg_names[0]);
2381 if (GET_CODE (x) == REG)
2382 fprintf (file, "%s", reg_names[REGNO (x)]);
2383 else if (GET_CODE (x) == MEM)
2385 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2386 know the width from the mode. */
2387 if (GET_CODE (XEXP (x, 0)) == PRE_INC)
2388 fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)),
2389 REGNO (XEXP (XEXP (x, 0), 0)));
2390 else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
2391 fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)),
2392 REGNO (XEXP (XEXP (x, 0), 0)));
2394 output_address (XEXP (x, 0));
2397 output_addr_const (file, x);
2401 output_operand_lossage ("invalid %%xn code");
2405 /* Print the address of an operand. */
2408 print_operand_address (file, x)
2412 if (GET_CODE (x) == REG)
2413 fprintf (file, "0(%s)", reg_names[ REGNO (x) ]);
2414 else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST)
2416 output_addr_const (file, x);
2417 if (DEFAULT_ABI == ABI_V4 && small_data_operand (x, GET_MODE (x)))
2418 fprintf (file, "@sda21(%s)", reg_names[0]);
2420 #ifdef TARGET_NO_TOC
2421 else if (TARGET_NO_TOC)
2425 fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]);
2427 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
2429 if (REGNO (XEXP (x, 0)) == 0)
2430 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ],
2431 reg_names[ REGNO (XEXP (x, 0)) ]);
2433 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ],
2434 reg_names[ REGNO (XEXP (x, 1)) ]);
2436 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
2437 fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]);
2438 else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM
2439 && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1)))
2441 output_addr_const (file, XEXP (x, 1));
2442 fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]);
2448 /* This page contains routines that are used to determine what the function
2449 prologue and epilogue code will do and write them out. */
2451 /* Return the first fixed-point register that is required to be saved. 32 if
2455 first_reg_to_save ()
2459 /* Find lowest numbered live register. */
2460 for (first_reg = 13; first_reg <= 31; first_reg++)
2461 if (regs_ever_live[first_reg])
2464 /* If profiling, then we must save/restore every register that contains
2465 a parameter before/after the .mcount call. Use registers from 30 down
2466 to 23 to do this. Don't use the frame pointer in reg 31.
2468 For now, save enough room for all of the parameter registers. */
2469 if (DEFAULT_ABI == ABI_AIX && profile_flag)
2476 /* Similar, for FP regs. */
2479 first_fp_reg_to_save ()
2483 /* Find lowest numbered live register. */
2484 for (first_reg = 14 + 32; first_reg <= 63; first_reg++)
2485 if (regs_ever_live[first_reg])
2491 /* Return non-zero if this function makes calls. */
2494 rs6000_makes_calls ()
2498 /* If we are profiling, we will be making a call to mcount. */
2502 for (insn = get_insns (); insn; insn = next_insn (insn))
2503 if (GET_CODE (insn) == CALL_INSN)
2510 /* Calculate the stack information for the current function. This is
2511 complicated by having two separate calling sequences, the AIX calling
2512 sequence and the V.4 calling sequence.
2514 AIX stack frames look like:
2516 SP----> +---------------------------------------+
2517 | back chain to caller | 0
2518 +---------------------------------------+
2520 +---------------------------------------+
2522 +---------------------------------------+
2523 | reserved for compilers | 12
2524 +---------------------------------------+
2525 | reserved for binders | 16
2526 +---------------------------------------+
2527 | saved TOC pointer | 20
2528 +---------------------------------------+
2529 | Parameter save area (P) | 24
2530 +---------------------------------------+
2531 | Alloca space (A) | 24+P
2532 +---------------------------------------+
2533 | Local variable space (L) | 24+P+A
2534 +---------------------------------------+
2535 | Save area for GP registers (G) | 24+P+A+L
2536 +---------------------------------------+
2537 | Save area for FP registers (F) | 24+P+A+L+G
2538 +---------------------------------------+
2539 old SP->| back chain to caller's caller |
2540 +---------------------------------------+
2542 V.4 stack frames look like:
2544 SP----> +---------------------------------------+
2545 | back chain to caller | 0
2546 +---------------------------------------+
2547 | caller's saved LR | 4
2548 +---------------------------------------+
2549 | Parameter save area (P) | 8
2550 +---------------------------------------+
2551 | Alloca space (A) | 8+P
2552 +---------------------------------------+
2553 | Varargs save area (V) | 8+P+A
2554 +---------------------------------------+
2555 | Local variable space (L) | 8+P+A+V
2556 +---------------------------------------+
2557 | saved CR (C) | 8+P+A+V+L
2558 +---------------------------------------+
2559 | Save area for GP registers (G) | 8+P+A+V+L+C
2560 +---------------------------------------+
2561 | Save area for FP registers (F) | 8+P+A+V+L+C+G
2562 +---------------------------------------+
2563 old SP->| back chain to caller's caller |
2564 +---------------------------------------+
2567 A PowerPC Windows/NT frame looks like:
2569 SP----> +---------------------------------------+
2570 | back chain to caller | 0
2571 +---------------------------------------+
2573 +---------------------------------------+
2575 +---------------------------------------+
2577 +---------------------------------------+
2579 +---------------------------------------+
2581 +---------------------------------------+
2582 | Parameter save area (P) | 24
2583 +---------------------------------------+
2584 | Alloca space (A) | 24+P
2585 +---------------------------------------+
2586 | Local variable space (L) | 24+P+A
2587 +---------------------------------------+
2588 | Save area for FP registers (F) | 24+P+A+L
2589 +---------------------------------------+
2590 | Possible alignment area (X) | 24+P+A+L+F
2591 +---------------------------------------+
2592 | Save area for GP registers (G) | 24+P+A+L+F+X
2593 +---------------------------------------+
2594 | Save area for CR (C) | 24+P+A+L+F+X+G
2595 +---------------------------------------+
2596 | Save area for TOC (T) | 24+P+A+L+F+X+G+C
2597 +---------------------------------------+
2598 | Save area for LR (R) | 24+P+A+L+F+X+G+C+T
2599 +---------------------------------------+
2600 old SP->| back chain to caller's caller |
2601 +---------------------------------------+
2603 For NT, there is no specific order to save the registers, but in
2604 order to support __builtin_return_address, the save area for the
2605 link register needs to be in a known place, so we use -4 off of the
2606 old SP. To support calls through pointers, we also allocate a
2607 fixed slot to store the TOC, -8 off the old SP. */
2610 rs6000_stack_info ()
2612 static rs6000_stack_t info, zero_info;
2613 rs6000_stack_t *info_ptr = &info;
2614 int reg_size = TARGET_64BIT ? 8 : 4;
2615 enum rs6000_abi abi;
2618 /* Zero all fields portably */
2621 /* Select which calling sequence */
2622 info_ptr->abi = abi = DEFAULT_ABI;
2624 /* Calculate which registers need to be saved & save area size */
2625 info_ptr->first_gp_reg_save = first_reg_to_save ();
2626 info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save);
2628 info_ptr->first_fp_reg_save = first_fp_reg_to_save ();
2629 info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save);
2631 /* Does this function call anything? */
2632 info_ptr->calls_p = rs6000_makes_calls ();
2634 /* Do we need to allocate space to save the toc? */
2635 if (rs6000_save_toc_p)
2637 info_ptr->toc_save_p = 1;
2638 info_ptr->toc_size = reg_size;
2641 /* If this is main and we need to call a function to set things up,
2642 save main's arguments around the call. */
2643 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0)
2645 info_ptr->main_p = 1;
2648 info_ptr->calls_p = 1;
2650 if (DECL_ARGUMENTS (current_function_decl))
2655 info_ptr->main_save_p = 1;
2656 info_ptr->main_size = 0;
2658 for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl));
2659 arg != NULL_TREE && i < 8;
2660 (arg = TREE_CHAIN (arg)), i++)
2662 info_ptr->main_size += reg_size;
2668 /* Determine if we need to save the link register */
2669 if (regs_ever_live[65] || profile_flag
2670 #ifdef TARGET_RELOCATABLE
2671 || (TARGET_RELOCATABLE && (get_pool_size () != 0))
2673 || (info_ptr->first_fp_reg_save != 64
2674 && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save))
2675 || (abi == ABI_V4 && current_function_calls_alloca)
2676 || info_ptr->calls_p)
2678 info_ptr->lr_save_p = 1;
2679 regs_ever_live[65] = 1;
2681 info_ptr->lr_size = reg_size;
2684 /* Determine if we need to save the condition code registers */
2685 if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72])
2687 info_ptr->cr_save_p = 1;
2688 if (abi == ABI_V4 || abi == ABI_NT)
2689 info_ptr->cr_size = reg_size;
2692 /* Determine various sizes */
2693 info_ptr->reg_size = reg_size;
2694 info_ptr->fixed_size = RS6000_SAVE_AREA;
2695 info_ptr->varargs_size = RS6000_VARARGS_AREA;
2696 info_ptr->vars_size = ALIGN (get_frame_size (), 8);
2697 info_ptr->parm_size = ALIGN (current_function_outgoing_args_size, 8);
2698 info_ptr->save_size = ALIGN (info_ptr->fp_size
2702 + info_ptr->toc_size
2703 + info_ptr->main_size, 8);
2705 total_raw_size = (info_ptr->vars_size
2706 + info_ptr->parm_size
2707 + info_ptr->save_size
2708 + info_ptr->varargs_size
2709 + info_ptr->fixed_size);
2711 info_ptr->total_size = ALIGN (total_raw_size, STACK_BOUNDARY / BITS_PER_UNIT);
2713 /* Determine if we need to allocate any stack frame.
2714 For AIX We need to push the stack if a frame pointer is needed (because
2715 the stack might be dynamically adjusted), if we are debugging, if the
2716 total stack size is more than 220 bytes, or if we make calls.
2718 For V.4 we don't have the stack cushion that AIX uses, but assume that
2719 the debugger can handle stackless frames. */
2721 if (info_ptr->calls_p)
2722 info_ptr->push_p = 1;
2724 else if (abi == ABI_V4 || abi == ABI_NT)
2725 info_ptr->push_p = (total_raw_size > info_ptr->fixed_size
2726 || info_ptr->lr_save_p);
2729 info_ptr->push_p = (frame_pointer_needed
2730 || write_symbols != NO_DEBUG
2731 || info_ptr->total_size > 220);
2733 /* Calculate the offsets */
2741 case ABI_AIX_NODESC:
2742 info_ptr->fp_save_offset = - info_ptr->fp_size;
2743 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
2744 info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size;
2745 info_ptr->cr_save_offset = 4;
2746 info_ptr->lr_save_offset = 8;
2750 info_ptr->fp_save_offset = - info_ptr->fp_size;
2751 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
2752 info_ptr->cr_save_offset = info_ptr->gp_save_offset - reg_size;
2753 info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size;
2754 info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
2755 info_ptr->lr_save_offset = reg_size;
2759 info_ptr->lr_save_offset = -4;
2760 info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size;
2761 info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
2762 info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size;
2763 info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size;
2764 if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0)
2765 info_ptr->fp_save_offset -= 4;
2767 info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size;
2771 /* Zero offsets if we're not saving those registers */
2772 if (!info_ptr->fp_size)
2773 info_ptr->fp_save_offset = 0;
2775 if (!info_ptr->gp_size)
2776 info_ptr->gp_save_offset = 0;
2778 if (!info_ptr->lr_save_p)
2779 info_ptr->lr_save_offset = 0;
2781 if (!info_ptr->cr_save_p)
2782 info_ptr->cr_save_offset = 0;
2784 if (!info_ptr->toc_save_p)
2785 info_ptr->toc_save_offset = 0;
2787 if (!info_ptr->main_save_p)
2788 info_ptr->main_save_offset = 0;
2794 debug_stack_info (info)
2795 rs6000_stack_t *info;
2800 info = rs6000_stack_info ();
2802 fprintf (stderr, "\nStack information for function %s:\n",
2803 ((current_function_decl && DECL_NAME (current_function_decl))
2804 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl))
2809 default: abi_string = "Unknown"; break;
2810 case ABI_NONE: abi_string = "NONE"; break;
2811 case ABI_AIX: abi_string = "AIX"; break;
2812 case ABI_AIX_NODESC: abi_string = "AIX"; break;
2813 case ABI_V4: abi_string = "V.4"; break;
2814 case ABI_NT: abi_string = "NT"; break;
2817 fprintf (stderr, "\tABI = %5s\n", abi_string);
2819 if (info->first_gp_reg_save != 32)
2820 fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save);
2822 if (info->first_fp_reg_save != 64)
2823 fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save);
2825 if (info->lr_save_p)
2826 fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p);
2828 if (info->cr_save_p)
2829 fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p);
2831 if (info->toc_save_p)
2832 fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p);
2835 fprintf (stderr, "\tpush_p = %5d\n", info->push_p);
2838 fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p);
2841 fprintf (stderr, "\tmain_p = %5d\n", info->main_p);
2843 if (info->main_save_p)
2844 fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p);
2846 if (info->gp_save_offset)
2847 fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset);
2849 if (info->fp_save_offset)
2850 fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset);
2852 if (info->lr_save_offset)
2853 fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset);
2855 if (info->cr_save_offset)
2856 fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset);
2858 if (info->toc_save_offset)
2859 fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset);
2861 if (info->varargs_save_offset)
2862 fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset);
2864 if (info->main_save_offset)
2865 fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset);
2867 if (info->total_size)
2868 fprintf (stderr, "\ttotal_size = %5d\n", info->total_size);
2870 if (info->varargs_size)
2871 fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size);
2873 if (info->vars_size)
2874 fprintf (stderr, "\tvars_size = %5d\n", info->vars_size);
2876 if (info->parm_size)
2877 fprintf (stderr, "\tparm_size = %5d\n", info->parm_size);
2879 if (info->fixed_size)
2880 fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size);
2883 fprintf (stderr, "\tgp_size = %5d\n", info->gp_size);
2886 fprintf (stderr, "\tfp_size = %5d\n", info->fp_size);
2889 fprintf (stderr, "\tlr_size = %5d\n", info->cr_size);
2892 fprintf (stderr, "\tcr_size = %5d\n", info->cr_size);
2895 fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size);
2897 if (info->main_size)
2898 fprintf (stderr, "\tmain_size = %5d\n", info->main_size);
2900 if (info->save_size)
2901 fprintf (stderr, "\tsave_size = %5d\n", info->save_size);
2903 if (info->reg_size != 4)
2904 fprintf (stderr, "\treg_size = %5d\n", info->reg_size);
2906 fprintf (stderr, "\n");
2910 /* Write function prologue. */
2912 output_prolog (file, size)
2916 rs6000_stack_t *info = rs6000_stack_info ();
2917 int reg_size = info->reg_size;
2925 store_reg = "\t{st|stw} %s,%d(%s)\n";
2926 load_reg = "\t{l|lwz} %s,%d(%s)\n";
2930 store_reg = "\tstd %s,%d(%s)\n";
2931 load_reg = "\tlld %s,%d(%s)\n";
2934 if (TARGET_DEBUG_STACK)
2935 debug_stack_info (info);
2937 /* Write .extern for any function we will call to save and restore fp
2939 if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
2940 fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
2941 SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX,
2942 RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
2944 /* Write .extern for truncation routines, if needed. */
2945 if (rs6000_trunc_used && ! trunc_defined)
2947 fprintf (file, "\t.extern .%s\n\t.extern .%s\n",
2948 RS6000_ITRUNC, RS6000_UITRUNC);
2952 /* Write .extern for AIX common mode routines, if needed. */
2953 if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined)
2955 fputs ("\t.extern __mulh\n", file);
2956 fputs ("\t.extern __mull\n", file);
2957 fputs ("\t.extern __divss\n", file);
2958 fputs ("\t.extern __divus\n", file);
2959 fputs ("\t.extern __quoss\n", file);
2960 fputs ("\t.extern __quous\n", file);
2961 common_mode_defined = 1;
2964 /* For V.4, update stack before we do any saving and set back pointer. */
2965 if (info->push_p && DEFAULT_ABI == ABI_V4)
2967 if (info->total_size < 32767)
2970 (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
2971 reg_names[1], - info->total_size, reg_names[1]);
2972 sp_offset = info->total_size;
2976 int neg_size = - info->total_size;
2978 asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
2979 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
2980 reg_names[0], (neg_size >> 16) & 0xffff,
2981 reg_names[0], reg_names[0], neg_size & 0xffff);
2983 (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
2984 reg_names[1], reg_names[1], reg_names[0]);
2988 /* If we use the link register, get it into r0. */
2989 if (info->lr_save_p)
2990 asm_fprintf (file, "\tmflr %s\n", reg_names[0]);
2992 /* If we need to save CR, put it into r12. */
2993 if (info->cr_save_p && sp_reg != 12)
2994 asm_fprintf (file, "\tmfcr %s\n", reg_names[12]);
2996 /* Do any required saving of fpr's. If only one or two to save, do it
2997 ourself. Otherwise, call function. Note that since they are statically
2998 linked, we do not need a nop following them. */
2999 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3001 int regno = info->first_fp_reg_save;
3002 int loc = info->fp_save_offset + sp_offset;
3004 for ( ; regno < 64; regno++, loc += 8)
3005 asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]);
3007 else if (info->first_fp_reg_save != 64)
3008 asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX,
3009 info->first_fp_reg_save - 32, SAVE_FP_SUFFIX);
3011 /* Now save gpr's. */
3012 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3014 int regno = info->first_gp_reg_save;
3015 int loc = info->gp_save_offset + sp_offset;
3017 for ( ; regno < 32; regno++, loc += reg_size)
3018 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]);
3021 else if (info->first_gp_reg_save != 32)
3022 asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n",
3023 reg_names[info->first_gp_reg_save],
3024 info->gp_save_offset + sp_offset,
3027 /* Save main's arguments if we need to call a function */
3029 if (info->main_save_p)
3032 int loc = info->main_save_offset;
3033 int size = info->main_size;
3035 for (regno = 3; size > 0; regno++, loc -= reg_size, size -= reg_size)
3036 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]);
3040 /* Save lr if we used it. */
3041 if (info->lr_save_p)
3042 asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset,
3045 /* Save CR if we use any that must be preserved. */
3046 if (info->cr_save_p)
3048 if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */
3050 asm_fprintf (file, "\tmfcr %s\n", reg_names[0]);
3051 asm_fprintf (file, store_reg, reg_names[0],
3052 info->cr_save_offset + sp_offset,
3056 asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset,
3060 if (info->toc_save_p)
3061 asm_fprintf (file, store_reg, reg_names[2], info->toc_save_offset + sp_offset,
3064 /* NT needs us to probe the stack frame every 4k pages for large frames, so
3066 if (DEFAULT_ABI == ABI_NT && info->total_size > 4096)
3068 if (info->total_size < 32768)
3070 int probe_offset = 4096;
3071 while (probe_offset < info->total_size)
3073 asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]);
3074 probe_offset += 4096;
3079 int probe_iterations = info->total_size / 4096;
3080 static int probe_labelno = 0;
3083 if (probe_iterations < 32768)
3084 asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations);
3087 asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16);
3088 if (probe_iterations & 0xffff)
3089 asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12],
3090 probe_iterations & 0xffff);
3092 asm_fprintf (file, "\tmtctr %s\n", reg_names[12]);
3093 asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
3094 ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno);
3095 asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]);
3096 ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno);
3097 fputs ("\tbdnz ", file);
3098 assemble_name (file, buf);
3103 /* Update stack and set back pointer and we have already done so for V.4. */
3104 if (info->push_p && DEFAULT_ABI != ABI_V4)
3106 if (info->total_size < 32767)
3108 (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3109 reg_names[1], - info->total_size, reg_names[1]);
3112 int neg_size = - info->total_size;
3113 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3114 reg_names[0], (neg_size >> 16) & 0xffff,
3115 reg_names[0], reg_names[0], neg_size & 0xffff);
3117 (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3118 reg_names[1], reg_names[1], reg_names[0]);
3122 /* Set frame pointer, if needed. */
3123 if (frame_pointer_needed)
3124 asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]);
3127 /* If we need to call a function to set things up for main, do so now
3128 before dealing with the TOC. */
3133 switch (DEFAULT_ABI)
3135 case ABI_AIX: prefix = "."; break;
3136 case ABI_NT: prefix = ".."; break;
3139 fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN);
3140 #ifdef RS6000_CALL_GLUE2
3141 fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN);
3143 #ifdef RS6000_CALL_GLUE
3144 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT)
3145 fprintf (file, "\t%s\n", RS6000_CALL_GLUE);
3149 if (info->main_save_p)
3153 int size = info->main_size;
3155 if (info->total_size < 32767)
3157 loc = info->total_size + info->main_save_offset;
3158 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
3159 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]);
3162 { /* for large AIX/NT frames, reg 0 above contains -frame size */
3163 /* for V.4, we need to reload -frame size */
3164 loc = info->main_save_offset;
3165 if (DEFAULT_ABI == ABI_V4 && info->total_size > 32767)
3167 int neg_size = - info->total_size;
3168 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3169 reg_names[0], (neg_size >> 16) & 0xffff,
3170 reg_names[0], reg_names[0], neg_size & 0xffff);
3173 asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0],
3176 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
3177 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]);
3184 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3185 TOC_TABLE address into register 30. */
3186 if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0)
3190 #ifdef TARGET_RELOCATABLE
3191 if (TARGET_RELOCATABLE)
3193 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3194 fputs ("\tbl ", file);
3195 assemble_name (file, buf);
3198 ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno);
3199 fprintf (file, "\tmflr %s\n", reg_names[30]);
3201 asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz}" : "\tld");
3202 fprintf (file, " %s,(", reg_names[0]);
3203 ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno);
3204 assemble_name (file, buf);
3206 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3207 assemble_name (file, buf);
3208 fprintf (file, ")(%s)\n", reg_names[30]);
3209 asm_fprintf (file, "\t{cax|add} %s,%s,%s\n",
3210 reg_names[30], reg_names[0], reg_names[30]);
3211 rs6000_pic_labelno++;
3216 switch (DEFAULT_ABI)
3219 case ABI_AIX_NODESC:
3222 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1);
3223 asm_fprintf (file, "\t{cau|addis} %s,%s,", reg_names[30], reg_names[0]);
3224 assemble_name (file, buf);
3225 asm_fprintf (file, "@ha\n");
3226 if (TARGET_NEW_MNEMONICS)
3228 asm_fprintf (file, "\taddi %s,%s,", reg_names[30], reg_names[30]);
3229 assemble_name (file, buf);
3230 asm_fprintf (file, "@l\n");
3234 asm_fprintf (file, "\tcal %s,", reg_names[30]);
3235 assemble_name (file, buf);
3236 asm_fprintf (file, "@l(%s)\n", reg_names[30]);
3246 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0);
3247 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[30]);
3248 assemble_name (file, buf);
3249 asm_fprintf (file, "(%s)\n", reg_names[2]);
3254 if (DEFAULT_ABI == ABI_NT)
3256 assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3257 fputs (".b:\n", file);
3261 /* Write function epilogue. */
3264 output_epilog (file, size)
3268 rs6000_stack_t *info = rs6000_stack_info ();
3269 char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n";
3270 rtx insn = get_last_insn ();
3275 /* Forget about any temporaries created */
3276 for (i = 0; i < NUM_MACHINE_MODES; i++)
3277 stack_temps[i] = NULL_RTX;
3279 /* If the last insn was a BARRIER, we don't have to write anything except
3281 if (GET_CODE (insn) == NOTE)
3282 insn = prev_nonnote_insn (insn);
3283 if (insn == 0 || GET_CODE (insn) != BARRIER)
3285 /* If we have a frame pointer, a call to alloca, or a large stack
3286 frame, restore the old stack pointer using the backchain. Otherwise,
3287 we know what size to update it with. */
3288 if (frame_pointer_needed || current_function_calls_alloca
3289 || info->total_size > 32767)
3291 /* Under V.4, don't reset the stack pointer until after we're done
3292 loading the saved registers. */
3293 if (DEFAULT_ABI == ABI_V4)
3296 asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]);
3298 else if (info->push_p)
3300 if (DEFAULT_ABI == ABI_V4)
3301 sp_offset = info->total_size;
3302 else if (TARGET_NEW_MNEMONICS)
3303 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], info->total_size);
3305 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], info->total_size, reg_names[1]);
3308 /* Get the old lr if we saved it. */
3309 if (info->lr_save_p)
3310 asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]);
3312 /* Get the old cr if we saved it. */
3313 if (info->cr_save_p)
3314 asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]);
3316 /* Set LR here to try to overlap restores below. */
3317 if (info->lr_save_p)
3318 asm_fprintf (file, "\tmtlr %s\n", reg_names[0]);
3320 /* Restore gpr's. */
3321 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3323 int regno = info->first_gp_reg_save;
3324 int loc = info->gp_save_offset + sp_offset;
3325 int reg_size = (TARGET_32BIT) ? 4 : 8;
3327 for ( ; regno < 32; regno++, loc += reg_size)
3328 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]);
3331 else if (info->first_gp_reg_save != 32)
3332 asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n",
3333 reg_names[info->first_gp_reg_save],
3334 info->gp_save_offset + sp_offset,
3337 /* Restore fpr's if we can do it without calling a function. */
3338 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3340 int regno = info->first_fp_reg_save;
3341 int loc = info->fp_save_offset + sp_offset;
3343 for ( ; regno < 64; regno++, loc += 8)
3344 asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]);
3347 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3349 if (info->cr_save_p)
3350 asm_fprintf (file, "\tmtcrf %d,%s\n",
3351 (regs_ever_live[70] != 0) * 0x20
3352 + (regs_ever_live[71] != 0) * 0x10
3353 + (regs_ever_live[72] != 0) * 0x8, reg_names[12]);
3355 /* If this is V.4, unwind the stack pointer after all of the loads have been done */
3358 if (TARGET_NEW_MNEMONICS)
3359 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], sp_offset);
3361 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], sp_offset, reg_names[1]);
3363 else if (sp_reg != 1)
3364 asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]);
3366 /* If we have to restore more than two FP registers, branch to the
3367 restore function. It will return to our caller. */
3368 if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
3369 asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX,
3370 info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
3372 asm_fprintf (file, "\t{br|blr}\n");
3375 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3378 We don't output a traceback table if -finhibit-size-directive was
3379 used. The documentation for -finhibit-size-directive reads
3380 ``don't output a @code{.size} assembler directive, or anything
3381 else that would cause trouble if the function is split in the
3382 middle, and the two halves are placed at locations far apart in
3383 memory.'' The traceback table has this property, since it
3384 includes the offset from the start of the function to the
3385 traceback table itself.
3387 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3388 different traceback table. */
3389 if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive)
3391 char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
3392 int fixed_parms, float_parms, parm_info;
3395 while (*fname == '.') /* V.4 encodes . in the name */
3398 /* Need label immediately before tbtab, so we can compute its offset
3399 from the function start. */
3402 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3403 ASM_OUTPUT_LABEL (file, fname);
3405 /* The .tbtab pseudo-op can only be used for the first eight
3406 expressions, since it can't handle the possibly variable
3407 length fields that follow. However, if you omit the optional
3408 fields, the assembler outputs zeros for all optional fields
3409 anyways, giving each variable length field is minimum length
3410 (as defined in sys/debug.h). Thus we can not use the .tbtab
3411 pseudo-op at all. */
3413 /* An all-zero word flags the start of the tbtab, for debuggers
3414 that have to find it by searching forward from the entry
3415 point or from the current pc. */
3416 fputs ("\t.long 0\n", file);
3418 /* Tbtab format type. Use format type 0. */
3419 fputs ("\t.byte 0,", file);
3421 /* Language type. Unfortunately, there doesn't seem to be any
3422 official way to get this info, so we use language_string. C
3423 is 0. C++ is 9. No number defined for Obj-C, so use the
3424 value for C for now. */
3425 if (! strcmp (language_string, "GNU C")
3426 || ! strcmp (language_string, "GNU Obj-C"))
3428 else if (! strcmp (language_string, "GNU F77"))
3430 else if (! strcmp (language_string, "GNU Ada"))
3432 else if (! strcmp (language_string, "GNU PASCAL"))
3434 else if (! strcmp (language_string, "GNU C++"))
3438 fprintf (file, "%d,", i);
3440 /* 8 single bit fields: global linkage (not set for C extern linkage,
3441 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
3442 from start of procedure stored in tbtab, internal function, function
3443 has controlled storage, function has no toc, function uses fp,
3444 function logs/aborts fp operations. */
3445 /* Assume that fp operations are used if any fp reg must be saved. */
3446 fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1));
3448 /* 6 bitfields: function is interrupt handler, name present in
3449 proc table, function calls alloca, on condition directives
3450 (controls stack walks, 3 bits), saves condition reg, saves
3452 /* The `function calls alloca' bit seems to be set whenever reg 31 is
3453 set up as a frame pointer, even when there is no alloca call. */
3454 fprintf (file, "%d,",
3455 ((1 << 6) | (frame_pointer_needed << 5)
3456 | (info->cr_save_p << 1) | (info->lr_save_p)));
3458 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
3460 fprintf (file, "%d,",
3461 (info->push_p << 7) | (64 - info->first_fp_reg_save));
3463 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
3464 fprintf (file, "%d,", (32 - first_reg_to_save ()));
3467 /* Compute the parameter info from the function decl argument
3470 int next_parm_info_bit;
3472 next_parm_info_bit = 31;
3477 for (decl = DECL_ARGUMENTS (current_function_decl);
3478 decl; decl = TREE_CHAIN (decl))
3480 rtx parameter = DECL_INCOMING_RTL (decl);
3481 enum machine_mode mode = GET_MODE (parameter);
3483 if (GET_CODE (parameter) == REG)
3485 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3493 else if (mode == DFmode)
3498 /* If only one bit will fit, don't or in this entry. */
3499 if (next_parm_info_bit > 0)
3500 parm_info |= (bits << (next_parm_info_bit - 1));
3501 next_parm_info_bit -= 2;
3505 fixed_parms += ((GET_MODE_SIZE (mode)
3506 + (UNITS_PER_WORD - 1))
3508 next_parm_info_bit -= 1;
3514 /* Number of fixed point parameters. */
3515 /* This is actually the number of words of fixed point parameters; thus
3516 an 8 byte struct counts as 2; and thus the maximum value is 8. */
3517 fprintf (file, "%d,", fixed_parms);
3519 /* 2 bitfields: number of floating point parameters (7 bits), parameters
3521 /* This is actually the number of fp registers that hold parameters;
3522 and thus the maximum value is 13. */
3523 /* Set parameters on stack bit if parameters are not in their original
3524 registers, regardless of whether they are on the stack? Xlc
3525 seems to set the bit when not optimizing. */
3526 fprintf (file, "%d\n", ((float_parms << 1) | (! optimize)));
3528 /* Optional fields follow. Some are variable length. */
3530 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
3532 /* There is an entry for each parameter in a register, in the order that
3533 they occur in the parameter list. Any intervening arguments on the
3534 stack are ignored. If the list overflows a long (max possible length
3535 34 bits) then completely leave off all elements that don't fit. */
3536 /* Only emit this long if there was at least one parameter. */
3537 if (fixed_parms || float_parms)
3538 fprintf (file, "\t.long %d\n", parm_info);
3540 /* Offset from start of code to tb table. */
3541 fputs ("\t.long ", file);
3542 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3543 RS6000_OUTPUT_BASENAME (file, fname);
3545 RS6000_OUTPUT_BASENAME (file, fname);
3548 /* Interrupt handler mask. */
3549 /* Omit this long, since we never set the interrupt handler bit
3552 /* Number of CTL (controlled storage) anchors. */
3553 /* Omit this long, since the has_ctl bit is never set above. */
3555 /* Displacement into stack of each CTL anchor. */
3556 /* Omit this list of longs, because there are no CTL anchors. */
3558 /* Length of function name. */
3559 fprintf (file, "\t.short %d\n", strlen (fname));
3561 /* Function name. */
3562 assemble_string (fname, strlen (fname));
3564 /* Register for alloca automatic storage; this is always reg 31.
3565 Only emit this if the alloca bit was set above. */
3566 if (frame_pointer_needed)
3567 fputs ("\t.byte 31\n", file);
3570 /* Reset varargs and save TOC indicator */
3571 rs6000_sysv_varargs_p = 0;
3572 rs6000_save_toc_p = 0;
3574 if (DEFAULT_ABI == ABI_NT)
3576 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3577 fputs (".e:\nFE_MOT_RESVD..", file);
3578 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3579 fputs (":\n", file);
3583 /* Output a TOC entry. We derive the entry name from what is
3587 output_toc (file, x, labelno)
3601 /* if we're going to put a double constant in the TOC, make sure it's
3602 aligned properly when strict alignment is on. */
3603 if (GET_CODE (x) == CONST_DOUBLE
3605 && GET_MODE (x) == DFmode
3606 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) {
3607 ASM_OUTPUT_ALIGN (file, 3);
3611 if (TARGET_ELF && TARGET_MINIMAL_TOC)
3613 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC");
3614 fprintf (file, "%d = .-", labelno);
3615 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC");
3616 fputs ("1\n", file);
3619 ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno);
3621 /* Handle FP constants specially. Note that if we have a minimal
3622 TOC, things we put here aren't actually in the TOC, so we can allow
3624 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode
3625 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3630 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
3631 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
3632 if (TARGET_MINIMAL_TOC)
3633 fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]);
3635 fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
3636 k[0], k[1], k[0], k[1]);
3639 else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode
3640 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3645 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
3646 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
3648 if (TARGET_MINIMAL_TOC)
3649 fprintf (file, "\t.long %d\n", l);
3651 fprintf (file, "\t.tc FS_%x[TC],%d\n", l, l);
3654 else if (GET_MODE (x) == DImode
3655 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
3656 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3661 if (GET_CODE (x) == CONST_DOUBLE)
3663 low = CONST_DOUBLE_LOW (x);
3664 high = CONST_DOUBLE_HIGH (x);
3667 #if HOST_BITS_PER_WIDE_INT == 32
3670 high = (low < 0) ? ~0 : 0;
3674 low = INTVAL (x) & 0xffffffff;
3675 high = (HOST_WIDE_INT) INTVAL (x) >> 32;
3679 if (TARGET_MINIMAL_TOC)
3680 fprintf (file, "\t.long %ld\n\t.long %ld\n", high, low);
3682 fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n",
3683 high, low, high, low);
3687 if (GET_CODE (x) == CONST)
3689 base = XEXP (XEXP (x, 0), 0);
3690 offset = INTVAL (XEXP (XEXP (x, 0), 1));
3693 if (GET_CODE (base) == SYMBOL_REF)
3694 name = XSTR (base, 0);
3695 else if (GET_CODE (base) == LABEL_REF)
3696 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0)));
3697 else if (GET_CODE (base) == CODE_LABEL)
3698 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base));
3702 if (TARGET_MINIMAL_TOC)
3703 fputs ("\t.long ", file);
3706 STRIP_NAME_ENCODING (real_name, name);
3707 fprintf (file, "\t.tc %s", real_name);
3710 fprintf (file, ".N%d", - offset);
3712 fprintf (file, ".P%d", offset);
3714 fputs ("[TC],", file);
3716 output_addr_const (file, x);
3720 /* Output an assembler pseudo-op to write an ASCII string of N characters
3721 starting at P to FILE.
3723 On the RS/6000, we have to do this using the .byte operation and
3724 write out special characters outside the quoted string.
3725 Also, the assembler is broken; very long strings are truncated,
3726 so we must artificially break them up early. */
3729 output_ascii (file, p, n)
3735 int i, count_string;
3736 char *for_string = "\t.byte \"";
3737 char *for_decimal = "\t.byte ";
3738 char *to_close = NULL;
3741 for (i = 0; i < n; i++)
3744 if (c >= ' ' && c < 0177)
3747 fputs (for_string, file);
3750 /* Write two quotes to get one. */
3758 for_decimal = "\"\n\t.byte ";
3762 if (count_string >= 512)
3764 fputs (to_close, file);
3766 for_string = "\t.byte \"";
3767 for_decimal = "\t.byte ";
3775 fputs (for_decimal, file);
3776 fprintf (file, "%d", c);
3778 for_string = "\n\t.byte \"";
3785 /* Now close the string if we have written one. Then end the line. */
3787 fprintf (file, to_close);
3790 /* Generate a unique section name for FILENAME for a section type
3791 represented by SECTION_DESC. Output goes into BUF.
3793 SECTION_DESC can be any string, as long as it is different for each
3794 possible section type.
3796 We name the section in the same manner as xlc. The name begins with an
3797 underscore followed by the filename (after stripping any leading directory
3798 names) with the last period replaced by the string SECTION_DESC. If
3799 FILENAME does not contain a period, SECTION_DESC is appended to the end of
3803 rs6000_gen_section_name (buf, filename, section_desc)
3808 char *q, *after_last_slash, *last_period;
3812 after_last_slash = filename;
3813 for (q = filename; *q; q++)
3816 after_last_slash = q + 1;
3821 len = strlen (after_last_slash) + strlen (section_desc) + 2;
3822 *buf = (char *) permalloc (len);
3827 for (q = after_last_slash; *q; q++)
3829 if (q == last_period)
3831 strcpy (p, section_desc);
3832 p += strlen (section_desc);
3835 else if (isalnum (*q))
3839 if (last_period == 0)
3840 strcpy (p, section_desc);
3845 /* Write function profiler code. */
3848 output_function_profiler (file, labelno)
3852 /* The last used parameter register. */
3857 if (DEFAULT_ABI != ABI_AIX)
3860 /* Set up a TOC entry for the profiler label. */
3862 ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno);
3863 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno);
3864 if (TARGET_MINIMAL_TOC)
3866 fputs ("\t.long ", file);
3867 assemble_name (file, buf);
3872 fputs ("\t.tc\t", file);
3873 assemble_name (file, buf);
3874 fputs ("[TC],", file);
3875 assemble_name (file, buf);
3880 /* Figure out last used parameter register. The proper thing to do is
3881 to walk incoming args of the function. A function might have live
3882 parameter registers even if it has no incoming args. */
3884 for (last_parm_reg = 10;
3885 last_parm_reg > 2 && ! regs_ever_live [last_parm_reg];
3889 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
3890 it might be set up as the frame pointer. */
3892 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
3893 asm_fprintf (file, "\tmr %d,%d\n", j, i);
3895 /* Load location address into r3, and call mcount. */
3897 ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno);
3898 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[3]);
3899 assemble_name (file, buf);
3900 asm_fprintf (file, "(%s)\n\tbl .mcount\n", reg_names[2]);
3902 /* Restore parameter registers. */
3904 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
3905 asm_fprintf (file, "\tmr %d,%d\n", i, j);
3908 /* Adjust the cost of a scheduling dependency. Return the new cost of
3909 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
3912 rs6000_adjust_cost (insn, link, dep_insn, cost)
3918 if (! recog_memoized (insn))
3921 if (REG_NOTE_KIND (link) != 0)
3924 if (REG_NOTE_KIND (link) == 0)
3926 /* Data dependency; DEP_INSN writes a register that INSN reads some
3929 /* Tell the first scheduling pass about the latency between a mtctr
3930 and bctr (and mtlr and br/blr). The first scheduling pass will not
3931 know about this latency since the mtctr instruction, which has the
3932 latency associated to it, will be generated by reload. */
3933 if (get_attr_type (insn) == TYPE_JMPREG)
3934 return TARGET_POWER ? 5 : 4;
3936 /* Fall out to return default cost. */
3942 /* Return how many instructions the machine can issue per cycle */
3943 int get_issue_rate()
3945 switch (rs6000_cpu_attr) {
3966 /* Output insns to flush the {data|instruction} caches after building a
3970 rs6000_sync_trampoline (addr)
3973 enum machine_mode pmode = Pmode;
3974 rtx reg = gen_reg_rtx (pmode);
3977 int size = rs6000_trampoline_size ();
3978 rtx (*sub_fcn) PROTO ((rtx, rtx, rtx));
3979 rtx (*cmp_fcn) PROTO ((rtx, rtx));
3984 sub_fcn = gen_subsi3;
3985 cmp_fcn = gen_cmpsi;
3989 sub_fcn = gen_subdi3;
3990 cmp_fcn = gen_cmpdi;
3993 addr = force_reg (pmode, addr);
3994 mem2 = gen_rtx (MEM, pmode, gen_rtx (PLUS, pmode, addr, reg));
3995 mem1 = gen_rtx (MEM, pmode, addr);
3997 /* Issue a loop of dcbst's to flush the data cache */
3998 emit_move_insn (reg, GEN_INT (size-4));
3999 label = gen_label_rtx ();
4001 emit_insn (gen_dcbst (mem2, addr, reg));
4002 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
4003 emit_insn ((*cmp_fcn) (reg, const0_rtx));
4004 emit_jump_insn (gen_bgt (label));
4006 /* Issue a sync after the dcbst's to let things settle down */
4007 emit_insn (gen_sync (mem1));
4009 /* Issue a loop of icbi's to flush the instruction cache */
4010 emit_move_insn (reg, GEN_INT (size-4));
4011 label = gen_label_rtx ();
4013 emit_insn (gen_icbi (mem2, addr, reg));
4014 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
4015 emit_insn ((*cmp_fcn) (reg, const0_rtx));
4016 emit_jump_insn (gen_bgt (label));
4018 /* Issue a sync after the icbi's to let things settle down */
4019 emit_insn (gen_sync (mem1));
4021 /* Finally issue an isync to synchronize the icache */
4022 emit_insn (gen_isync (mem1));
4026 /* Output assembler code for a block containing the constant parts
4027 of a trampoline, leaving space for the variable parts.
4029 The trampoline should set the static chain pointer to value placed
4030 into the trampoline and should branch to the specified routine. */
4033 rs6000_trampoline_template (file)
4036 char *sc = reg_names[STATIC_CHAIN_REGNUM];
4037 char *r0 = reg_names[0];
4038 char *r2 = reg_names[2];
4040 switch (DEFAULT_ABI)
4045 /* Under AIX, this is not code at all, but merely a data area,
4046 since that is the way all functions are called. The first word is
4047 the address of the function, the second word is the TOC pointer (r2),
4048 and the third word is the static chain value. */
4050 fprintf (file, "\t.long %s\n", (TARGET_32BIT) ? "0,0,0" : "0,0,0,0,0,0");
4054 /* V.4/eabi function pointers are just a single pointer, so we need to
4055 do the full gory code to load up the static chain. */
4057 case ABI_AIX_NODESC:
4058 if (STATIC_CHAIN_REGNUM == 0 || !TARGET_NEW_MNEMONICS)
4063 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
4064 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
4065 fprintf (file, "\t.long 0,0\n"); /* offset 8 */
4066 fprintf (file, ".LTRAMP1:\n");
4067 fprintf (file, "\tmflr %s\n", sc); /* offset 20 */
4068 fprintf (file, "\tmtlr %s\n", r0); /* offset 24 */
4069 fprintf (file, "\tlwz %s,0(%s)\n", r0, sc); /* offset 28 */
4070 fprintf (file, "\tlwz %s,4(%s)\n", sc, sc); /* offset 32 */
4071 fprintf (file, "\tmtctr %s\n", r0); /* offset 36 */
4072 fprintf (file, "\tbctr\n"); /* offset 40 */
4076 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
4077 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
4078 fprintf (file, "\t.long 0,0,0,0\n"); /* offset 8 */
4079 fprintf (file, ".LTRAMP1:\n");
4080 fprintf (file, "\tmflr %s\n", sc); /* offset 28 */
4081 fprintf (file, "\tmtlr %s\n", r0); /* offset 32 */
4082 fprintf (file, "\tld %s,0(%s)\n", r0, sc); /* offset 36 */
4083 fprintf (file, "\tld %s,8(%s)\n", sc, sc); /* offset 40 */
4084 fprintf (file, "\tmtctr %s\n", r0); /* offset 44 */
4085 fprintf (file, "\tbctr\n"); /* offset 48 */
4089 /* NT function pointers point to a two word area (real address, TOC)
4090 which unfortunately does not include a static chain field. So we
4091 use the function field to point to ..LTRAMP1 and the toc field
4092 to point to the whole table. */
4094 if (STATIC_CHAIN_REGNUM == 0
4095 || STATIC_CHAIN_REGNUM == 2
4097 || !TARGET_NEW_MNEMONICS)
4100 fprintf (file, "\t.ualong 0\n"); /* offset 0 */
4101 fprintf (file, "\t.ualong 0\n"); /* offset 4 */
4102 fprintf (file, "\t.ualong 0\n"); /* offset 8 */
4103 fprintf (file, "\t.ualong 0\n"); /* offset 12 */
4104 fprintf (file, "\t.ualong 0\n"); /* offset 16 */
4105 fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */
4106 fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */
4107 fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */
4108 fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */
4109 fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */
4110 fprintf (file, "\tbctr\n"); /* offset 40 */
4117 /* Length in units of the trampoline for entering a nested function. */
4120 rs6000_trampoline_size ()
4124 switch (DEFAULT_ABI)
4130 ret = (TARGET_32BIT) ? 12 : 24;
4134 case ABI_AIX_NODESC:
4135 ret = (TARGET_32BIT) ? 40 : 48;
4146 /* Emit RTL insns to initialize the variable parts of a trampoline.
4147 FNADDR is an RTX for the address of the function's pure code.
4148 CXT is an RTX for the static chain value for the function. */
4151 rs6000_initialize_trampoline (addr, fnaddr, cxt)
4156 enum machine_mode pmode = Pmode;
4157 int regsize = (TARGET_32BIT) ? 4 : 8;
4158 rtx ctx_reg = force_reg (pmode, cxt);
4160 switch (DEFAULT_ABI)
4165 /* Macros to shorten the code expansions below. */
4166 #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr))
4167 #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset)))
4169 /* Under AIX, just build the 3 word function descriptor */
4172 rtx fn_reg = gen_reg_rtx (pmode);
4173 rtx toc_reg = gen_reg_rtx (pmode);
4174 emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
4175 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4));
4176 emit_move_insn (MEM_DEREF (addr), fn_reg);
4177 emit_move_insn (MEM_PLUS (addr, regsize), toc_reg);
4178 emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg);
4182 /* Under V.4/eabi, update the two words after the bl to have the real
4183 function address and the static chain. */
4185 case ABI_AIX_NODESC:
4187 rtx reg = gen_reg_rtx (pmode);
4188 emit_move_insn (reg, fnaddr);
4189 emit_move_insn (MEM_PLUS (addr, 8), reg);
4190 emit_move_insn (MEM_PLUS (addr, 8 + regsize), ctx_reg);
4191 rs6000_sync_trampoline (addr);
4195 /* Under NT, update the first word to point to the ..LTRAMP1..0 header,
4196 the second word will point to the whole trampoline, third-fifth words
4197 will then have the real address, static chain, and toc value. */
4200 rtx tramp_reg = gen_reg_rtx (pmode);
4201 rtx fn_reg = gen_reg_rtx (pmode);
4202 rtx toc_reg = gen_reg_rtx (pmode);
4204 emit_move_insn (tramp_reg, gen_rtx (SYMBOL_REF, pmode, "..LTRAMP1..0"));
4205 addr = force_reg (pmode, addr);
4206 emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
4207 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize));
4208 emit_move_insn (MEM_DEREF (addr), tramp_reg);
4209 emit_move_insn (MEM_PLUS (addr, regsize), addr);
4210 emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg);
4211 emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg);
4212 emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx (REG, pmode, 2));
4221 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4222 with arguments ARGS is a valid machine specific attribute for DECL.
4223 The attributes in ATTRIBUTES have previously been assigned to DECL. */
4226 rs6000_valid_decl_attribute_p (decl, attributes, identifier, args)
4235 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4236 with arguments ARGS is a valid machine specific attribute for TYPE.
4237 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
4240 rs6000_valid_type_attribute_p (type, attributes, identifier, args)
4246 if (TREE_CODE (type) != FUNCTION_TYPE
4247 && TREE_CODE (type) != FIELD_DECL
4248 && TREE_CODE (type) != TYPE_DECL)
4251 if (DEFAULT_ABI == ABI_NT)
4253 /* Stdcall attribute says callee is responsible for popping arguments
4254 if they are not variable. */
4255 if (is_attribute_p ("stdcall", identifier))
4256 return (args == NULL_TREE);
4258 /* Cdecl attribute says the callee is a normal C declaration */
4259 if (is_attribute_p ("cdecl", identifier))
4260 return (args == NULL_TREE);
4262 /* Dllimport attribute says says the caller is to call the function
4263 indirectly through a __imp_<name> pointer. */
4264 if (is_attribute_p ("dllimport", identifier))
4265 return (args == NULL_TREE);
4267 /* Dllexport attribute says says the callee is to create a __imp_<name>
4269 if (is_attribute_p ("dllexport", identifier))
4270 return (args == NULL_TREE);
4276 /* If defined, a C expression whose value is zero if the attributes on
4277 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
4278 two if they are nearly compatible (which causes a warning to be
4282 rs6000_comp_type_attributes (type1, type2)
4289 /* If defined, a C statement that assigns default attributes to newly
4293 rs6000_set_default_type_attributes (type)
4298 /* Return a dll import reference corresponding to to a call's SYMBOL_REF */
4300 rs6000_dll_import_ref (call_ref)
4309 if (GET_CODE (call_ref) != SYMBOL_REF)
4312 call_name = XSTR (call_ref, 0);
4313 len = sizeof ("__imp_") + strlen (call_name);
4315 reg2 = gen_reg_rtx (Pmode);
4317 strcpy (p, "__imp_");
4318 strcat (p, call_name);
4319 node = get_identifier (p);
4321 reg1 = force_reg (Pmode, gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node)));
4322 emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg1));
4328 /* A C statement or statements to switch to the appropriate section
4329 for output of RTX in mode MODE. You can assume that RTX is some
4330 kind of constant in RTL. The argument MODE is redundant except in
4331 the case of a `const_int' rtx. Select the section by calling
4332 `text_section' or one of the alternatives for other sections.
4334 Do not define this macro if you put all constants in the read-only
4340 rs6000_select_rtx_section (mode, x)
4341 enum machine_mode mode;
4344 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x))
4350 /* A C statement or statements to switch to the appropriate
4351 section for output of DECL. DECL is either a `VAR_DECL' node
4352 or a constant of some sort. RELOC indicates whether forming
4353 the initial value of DECL requires link-time relocations. */
4356 rs6000_select_section (decl, reloc)
4360 int size = int_size_in_bytes (TREE_TYPE (decl));
4362 if (TREE_CODE (decl) == STRING_CST)
4364 if (! flag_writable_strings)
4369 else if (TREE_CODE (decl) == VAR_DECL)
4371 if ((flag_pic && reloc)
4372 || !TREE_READONLY (decl)
4373 || TREE_SIDE_EFFECTS (decl)
4374 || !DECL_INITIAL (decl)
4375 || (DECL_INITIAL (decl) != error_mark_node
4376 && !TREE_CONSTANT (DECL_INITIAL (decl))))
4378 if (TARGET_SDATA && (size > 0) && (size <= g_switch_value))
4385 if (TARGET_SDATA && (size > 0) && (size <= g_switch_value))
4394 #endif /* USING_SVR4_H */