1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
40 extern char *language_string;
41 extern int profile_block_flag;
43 #define min(A,B) ((A) < (B) ? (A) : (B))
44 #define max(A,B) ((A) > (B) ? (A) : (B))
48 enum processor_type rs6000_cpu;
49 struct rs6000_cpu_select rs6000_select[3] =
51 /* switch name, tune arch */
52 { (char *)0, "--enbable-cpu=", 1, 0 },
53 { (char *)0, "-mcpu=", 1, 1 },
54 { (char *)0, "-mtune=", 1, 0 },
57 /* Set to non-zero by "fix" operation to indicate that itrunc and
58 uitrunc must be defined. */
60 int rs6000_trunc_used;
62 /* Set to non-zero once they have been defined. */
64 static int trunc_defined;
66 /* Set to non-zero once AIX common-mode calls have been defined. */
67 static int common_mode_defined;
68 /* Save information from a "cmpxx" operation until the branch or scc is
71 rtx rs6000_compare_op0, rs6000_compare_op1;
72 int rs6000_compare_fp_p;
75 /* Label number of label created for -mrelocatable, to call to so we can
76 get the address of the GOT section */
77 int rs6000_pic_labelno;
80 /* Whether a System V.4 varargs area was created. */
81 int rs6000_sysv_varargs_p;
83 /* Whether we need to save the TOC register. */
84 int rs6000_save_toc_p;
86 /* ABI enumeration available for subtarget to use. */
87 enum rs6000_abi rs6000_current_abi;
89 /* Temporary memory used to convert integer -> float */
90 static rtx stack_temps[NUM_MACHINE_MODES];
93 /* Print the options used in the assembly file. */
95 extern char *version_string, *language_string;
107 output_option (file, type, name, pos)
113 int type_len = strlen (type);
114 int name_len = strlen (name);
116 if (1 + type_len + name_len + pos > MAX_LINE)
118 fprintf (file, "\n # %s%s", type, name);
119 return 3 + type_len + name_len;
121 fprintf (file, " %s%s", type, name);
122 return pos + 1 + type_len + name_len;
125 static struct { char *name; int value; } m_options[] = TARGET_SWITCHES;
128 output_options (file, f_options, f_len, W_options, W_len)
130 struct asm_option *f_options;
132 struct asm_option *W_options;
136 int flags = target_flags;
139 fprintf (file, " # %s %s", language_string, version_string);
144 sprintf (opt_string, "%d", optimize);
145 pos = output_option (file, "-O", opt_string, pos);
149 pos = output_option (file, "-p", "", pos);
151 if (profile_block_flag)
152 pos = output_option (file, "-a", "", pos);
154 if (inhibit_warnings)
155 pos = output_option (file, "-w", "", pos);
157 for (j = 0; j < f_len; j++)
159 if (*f_options[j].variable == f_options[j].on_value)
160 pos = output_option (file, "-f", f_options[j].string, pos);
163 for (j = 0; j < W_len; j++)
165 if (*W_options[j].variable == W_options[j].on_value)
166 pos = output_option (file, "-W", W_options[j].string, pos);
169 for (j = 0; j < sizeof m_options / sizeof m_options[0]; j++)
171 if (m_options[j].name[0] != '\0'
172 && m_options[j].value > 0
173 && ((m_options[j].value & flags) == m_options[j].value))
175 pos = output_option (file, "-m", m_options[j].name, pos);
176 flags &= ~ m_options[j].value;
180 for (j = 0; j < sizeof (rs6000_select) / sizeof(rs6000_select[0]); j++)
181 if (rs6000_select[j].string != (char *)0)
182 pos = output_option (file, rs6000_select[j].name, rs6000_select[j].string, pos);
184 fputs ("\n\n", file);
188 /* Override command line options. Mostly we process the processor
189 type and sometimes adjust other TARGET_ options. */
192 rs6000_override_options (default_cpu)
196 struct rs6000_cpu_select *ptr;
198 /* Simplify the entries below by making a mask for any POWER
199 variant and any PowerPC variant. */
201 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
202 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
203 | MASK_PPC_GFXOPT | MASK_POWERPC64)
204 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
208 char *name; /* Canonical processor name. */
209 enum processor_type processor; /* Processor type enum value. */
210 int target_enable; /* Target flags to enable. */
211 int target_disable; /* Target flags to disable. */
212 } processor_target_table[]
213 = {{"common", PROCESSOR_COMMON, 0, POWER_MASKS | POWERPC_MASKS},
214 {"rs6000", PROCESSOR_POWER,
215 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
216 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
217 {"power", PROCESSOR_POWER,
218 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
219 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
220 {"power2", PROCESSOR_POWER,
221 MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING,
222 POWERPC_MASKS | MASK_NEW_MNEMONICS},
223 {"powerpc", PROCESSOR_POWERPC,
224 MASK_POWERPC | MASK_NEW_MNEMONICS,
225 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
226 {"rios", PROCESSOR_RIOS1,
227 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
228 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
229 {"rios1", PROCESSOR_RIOS1,
230 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
231 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
232 {"rsc", PROCESSOR_PPC601,
233 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
234 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
235 {"rsc1", PROCESSOR_PPC601,
236 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
237 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
238 {"rios2", PROCESSOR_RIOS2,
239 MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2,
240 POWERPC_MASKS | MASK_NEW_MNEMONICS},
241 {"403", PROCESSOR_PPC403,
242 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
243 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
244 {"601", PROCESSOR_PPC601,
245 MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING,
246 MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
247 {"602", PROCESSOR_PPC602,
248 MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS,
249 MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
250 {"603", PROCESSOR_PPC603,
251 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
252 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
253 {"603e", PROCESSOR_PPC603,
254 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
255 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
256 {"604", PROCESSOR_PPC604,
257 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
258 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
259 {"620", PROCESSOR_PPC620,
260 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
261 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}};
263 int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt);
265 int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */
266 int string = TARGET_STRING; /* save current -mstring/-mno-string status */
268 profile_block_flag = 0;
270 /* Identify the processor type */
271 rs6000_select[0].string = default_cpu;
272 rs6000_cpu = PROCESSOR_DEFAULT;
273 if (rs6000_cpu == PROCESSOR_PPC403)
274 target_flags |= MASK_SOFT_FLOAT;
276 for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++)
278 ptr = &rs6000_select[i];
279 if (ptr->string != (char *)0 && ptr->string[0] != '\0')
281 for (j = 0; j < ptt_size; j++)
282 if (! strcmp (ptr->string, processor_target_table[j].name))
285 rs6000_cpu = processor_target_table[j].processor;
289 target_flags |= processor_target_table[j].target_enable;
290 target_flags &= ~processor_target_table[j].target_disable;
296 error ("bad value (%s) for %s switch", ptr->string, ptr->name);
300 /* If -mmultiple or -mno-multiple was explicitly used, don't
301 override with the processor default */
302 if (TARGET_MULTIPLE_SET)
303 target_flags = (target_flags & ~MASK_MULTIPLE) | multiple;
305 /* If -mstring or -mno-string was explicitly used, don't
306 override with the processor default */
307 if (TARGET_STRING_SET)
308 target_flags = (target_flags & ~MASK_STRING) | string;
310 /* Don't allow -mmultiple or -mstring on little endian systems, because the
311 hardware doesn't support the instructions used in little endian mode */
312 if (!BYTES_BIG_ENDIAN)
316 target_flags &= ~MASK_MULTIPLE;
317 if (TARGET_MULTIPLE_SET)
318 warning ("-mmultiple is not supported on little endian systems");
323 target_flags &= ~MASK_STRING;
324 if (TARGET_STRING_SET)
325 warning ("-mstring is not supported on little endian systems");
329 #ifdef SUBTARGET_OVERRIDE_OPTIONS
330 SUBTARGET_OVERRIDE_OPTIONS;
334 /* Create a CONST_DOUBLE from a string. */
337 rs6000_float_const (string, mode)
339 enum machine_mode mode;
341 REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode);
342 return immed_real_const_1 (value, mode);
346 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
347 two parts of the constant if the target is little endian. */
350 rs6000_immed_double_const (i0, i1, mode)
351 HOST_WIDE_INT i0, i1;
352 enum machine_mode mode;
354 if (! WORDS_BIG_ENDIAN)
355 return immed_double_const (i1, i0, mode);
357 return immed_double_const (i0, i1, mode);
361 /* Return non-zero if this function is known to have a null epilogue. */
366 if (reload_completed)
368 rs6000_stack_t *info = rs6000_stack_info ();
370 if (info->first_gp_reg_save == 32
371 && info->first_fp_reg_save == 64
381 /* Returns 1 always. */
384 any_operand (op, mode)
386 enum machine_mode mode;
391 /* Returns 1 if op is the count register */
392 int count_register_operand(op, mode)
394 enum machine_mode mode;
396 if (GET_CODE (op) != REG)
399 if (REGNO (op) == COUNT_REGISTER_REGNUM)
402 if (REGNO (op) > FIRST_PSEUDO_REGISTER)
408 /* Return 1 if OP is a constant that can fit in a D field. */
411 short_cint_operand (op, mode)
413 enum machine_mode mode;
415 return (GET_CODE (op) == CONST_INT
416 && (unsigned) (INTVAL (op) + 0x8000) < 0x10000);
419 /* Similar for a unsigned D field. */
422 u_short_cint_operand (op, mode)
424 enum machine_mode mode;
426 return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0);
429 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
432 non_short_cint_operand (op, mode)
434 enum machine_mode mode;
436 return (GET_CODE (op) == CONST_INT
437 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000);
440 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
444 gpc_reg_operand (op, mode)
446 enum machine_mode mode;
448 return (register_operand (op, mode)
449 && (GET_CODE (op) != REG || REGNO (op) >= 67 || REGNO (op) < 64));
452 /* Returns 1 if OP is either a pseudo-register or a register denoting a
456 cc_reg_operand (op, mode)
458 enum machine_mode mode;
460 return (register_operand (op, mode)
461 && (GET_CODE (op) != REG
462 || REGNO (op) >= FIRST_PSEUDO_REGISTER
463 || CR_REGNO_P (REGNO (op))));
466 /* Returns 1 if OP is either a constant integer valid for a D-field or a
467 non-special register. If a register, it must be in the proper mode unless
471 reg_or_short_operand (op, mode)
473 enum machine_mode mode;
475 return short_cint_operand (op, mode) || gpc_reg_operand (op, mode);
478 /* Similar, except check if the negation of the constant would be valid for
482 reg_or_neg_short_operand (op, mode)
484 enum machine_mode mode;
486 if (GET_CODE (op) == CONST_INT)
487 return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
489 return gpc_reg_operand (op, mode);
492 /* Return 1 if the operand is either a register or an integer whose high-order
496 reg_or_u_short_operand (op, mode)
498 enum machine_mode mode;
500 if (GET_CODE (op) == CONST_INT
501 && (INTVAL (op) & 0xffff0000) == 0)
504 return gpc_reg_operand (op, mode);
507 /* Return 1 is the operand is either a non-special register or ANY
511 reg_or_cint_operand (op, mode)
513 enum machine_mode mode;
515 return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
518 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
519 with one instruction per word. We only do this if we can safely read
520 CONST_DOUBLE_{LOW,HIGH}. */
523 easy_fp_constant (op, mode)
525 register enum machine_mode mode;
529 if (GET_CODE (op) != CONST_DOUBLE
530 || GET_MODE (op) != mode
531 || GET_MODE_CLASS (mode) != MODE_FLOAT)
534 /* Consider all constants with -msoft-float to be easy */
535 if (TARGET_SOFT_FLOAT)
538 high = operand_subword (op, 0, 0, mode);
539 low = operand_subword (op, 1, 0, mode);
541 if (high == 0 || ! input_operand (high, word_mode))
544 return (mode == SFmode
545 || (low != 0 && input_operand (low, word_mode)));
548 /* Return 1 if the operand is in volatile memory. Note that during the
549 RTL generation phase, memory_operand does not return TRUE for
550 volatile memory references. So this function allows us to
551 recognize volatile references where its safe. */
554 volatile_mem_operand (op, mode)
556 enum machine_mode mode;
558 if (GET_CODE (op) != MEM)
561 if (!MEM_VOLATILE_P (op))
564 if (mode != GET_MODE (op))
567 if (reload_completed)
568 return memory_operand (op, mode);
570 if (reload_in_progress)
571 return strict_memory_address_p (mode, XEXP (op, 0));
573 return memory_address_p (mode, XEXP (op, 0));
576 /* Return 1 if the operand is an offsettable memory address. */
579 offsettable_addr_operand (op, mode)
581 enum machine_mode mode;
583 return offsettable_address_p (reload_completed | reload_in_progress,
587 /* Return 1 if the operand is either a floating-point register, a pseudo
588 register, or memory. */
591 fp_reg_or_mem_operand (op, mode)
593 enum machine_mode mode;
595 return (memory_operand (op, mode)
596 || volatile_mem_operand (op, mode)
597 || (register_operand (op, mode)
598 && (GET_CODE (op) != REG
599 || REGNO (op) >= FIRST_PSEUDO_REGISTER
600 || FP_REGNO_P (REGNO (op)))));
603 /* Return 1 if the operand is either an easy FP constant (see above) or
607 mem_or_easy_const_operand (op, mode)
609 enum machine_mode mode;
611 return memory_operand (op, mode) || easy_fp_constant (op, mode);
614 /* Return 1 if the operand is either a non-special register or an item
615 that can be used as the operand of an SI add insn. */
618 add_operand (op, mode)
620 enum machine_mode mode;
622 return (reg_or_short_operand (op, mode)
623 || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0));
626 /* Return 1 if OP is a constant but not a valid add_operand. */
629 non_add_cint_operand (op, mode)
631 enum machine_mode mode;
633 return (GET_CODE (op) == CONST_INT
634 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000
635 && (INTVAL (op) & 0xffff) != 0);
638 /* Return 1 if the operand is a non-special register or a constant that
639 can be used as the operand of an OR or XOR insn on the RS/6000. */
642 logical_operand (op, mode)
644 enum machine_mode mode;
646 return (gpc_reg_operand (op, mode)
647 || (GET_CODE (op) == CONST_INT
648 && ((INTVAL (op) & 0xffff0000) == 0
649 || (INTVAL (op) & 0xffff) == 0)));
652 /* Return 1 if C is a constant that is not a logical operand (as
656 non_logical_cint_operand (op, mode)
658 enum machine_mode mode;
660 return (GET_CODE (op) == CONST_INT
661 && (INTVAL (op) & 0xffff0000) != 0
662 && (INTVAL (op) & 0xffff) != 0);
665 /* Return 1 if C is a constant that can be encoded in a mask on the
666 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
667 Reject all ones and all zeros, since these should have been optimized
668 away and confuse the making of MB and ME. */
678 if (c == 0 || c == ~0)
681 last_bit_value = c & 1;
683 for (i = 1; i < 32; i++)
684 if (((c >>= 1) & 1) != last_bit_value)
685 last_bit_value ^= 1, transitions++;
687 return transitions <= 2;
690 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
693 mask_operand (op, mode)
695 enum machine_mode mode;
697 return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
700 /* Return 1 if the operand is either a non-special register or a
701 constant that can be used as the operand of an RS/6000 logical AND insn. */
704 and_operand (op, mode)
706 enum machine_mode mode;
708 return (reg_or_short_operand (op, mode)
709 || logical_operand (op, mode)
710 || mask_operand (op, mode));
713 /* Return 1 if the operand is a constant but not a valid operand for an AND
717 non_and_cint_operand (op, mode)
719 enum machine_mode mode;
721 return GET_CODE (op) == CONST_INT && ! and_operand (op, mode);
724 /* Return 1 if the operand is a general register or memory operand. */
727 reg_or_mem_operand (op, mode)
729 register enum machine_mode mode;
731 return (gpc_reg_operand (op, mode)
732 || memory_operand (op, mode)
733 || volatile_mem_operand (op, mode));
736 /* Return 1 if the operand is a general register or memory operand without
737 pre-inc or pre_dec which produces invalid form of PowerPC lwa
741 lwa_operand (op, mode)
743 register enum machine_mode mode;
747 if (reload_completed && GET_CODE (inner) == SUBREG)
748 inner = SUBREG_REG (inner);
750 return gpc_reg_operand (inner, mode)
751 || (memory_operand (inner, mode)
752 && GET_CODE (XEXP (inner, 0)) != PRE_INC
753 && GET_CODE (XEXP (inner, 0)) != PRE_DEC);
756 /* Return 1 if the operand, used inside a MEM, is a valid first argument
757 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
761 call_operand (op, mode)
763 enum machine_mode mode;
765 if (mode != VOIDmode && GET_MODE (op) != mode)
768 return (GET_CODE (op) == SYMBOL_REF
769 || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER));
773 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
777 current_file_function_operand (op, mode)
779 enum machine_mode mode;
781 return (GET_CODE (op) == SYMBOL_REF
782 && (SYMBOL_REF_FLAG (op)
783 || op == XEXP (DECL_RTL (current_function_decl), 0)));
787 /* Return 1 if this operand is a valid input for a move insn. */
790 input_operand (op, mode)
792 enum machine_mode mode;
794 /* Memory is always valid. */
795 if (memory_operand (op, mode))
798 /* For floating-point, easy constants are valid. */
799 if (GET_MODE_CLASS (mode) == MODE_FLOAT
801 && easy_fp_constant (op, mode))
804 /* For floating-point or multi-word mode, the only remaining valid type
806 if (GET_MODE_CLASS (mode) == MODE_FLOAT
807 || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
808 return register_operand (op, mode);
810 /* The only cases left are integral modes one word or smaller (we
811 do not get called for MODE_CC values). These can be in any
813 if (register_operand (op, mode))
816 /* For integer modes, any constant is ok. */
817 if (GET_CODE (op) == CONST_INT)
820 /* A SYMBOL_REF referring to the TOC is valid. */
821 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op))
824 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
825 directly in the instruction stream */
826 if (DEFAULT_ABI == ABI_NT
827 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF))
830 /* Otherwise, we will be doing this SET with an add, so anything valid
831 for an add will be valid. */
832 return add_operand (op, mode);
835 /* Initialize a variable CUM of type CUMULATIVE_ARGS
836 for a call to a function whose data type is FNTYPE.
837 For a library call, FNTYPE is 0.
839 For incoming args we set the number of arguments in the prototype large
840 so we never return an EXPR_LIST. */
843 init_cumulative_args (cum, fntype, libname, incoming)
844 CUMULATIVE_ARGS *cum;
849 static CUMULATIVE_ARGS zero_cumulative;
851 *cum = zero_cumulative;
853 cum->fregno = FP_ARG_MIN_REG;
854 cum->prototype = (fntype && TYPE_ARG_TYPES (fntype));
858 cum->nargs_prototype = 1000; /* don't return an EXPR_LIST */
859 #ifdef TARGET_V4_CALLS
861 cum->varargs_offset = RS6000_VARARGS_OFFSET;
865 else if (cum->prototype)
866 cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1
867 + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode
868 || RETURN_IN_MEMORY (TREE_TYPE (fntype))));
871 cum->nargs_prototype = 0;
873 cum->orig_nargs = cum->nargs_prototype;
874 if (TARGET_DEBUG_ARG)
876 fprintf (stderr, "\ninit_cumulative_args:");
879 tree ret_type = TREE_TYPE (fntype);
880 fprintf (stderr, " ret code = %s,",
881 tree_code_name[ (int)TREE_CODE (ret_type) ]);
884 #ifdef TARGET_V4_CALLS
885 if (TARGET_V4_CALLS && incoming)
886 fprintf (stderr, " varargs = %d, ", cum->varargs_offset);
889 fprintf (stderr, " proto = %d, nargs = %d\n",
890 cum->prototype, cum->nargs_prototype);
894 /* If defined, a C expression that gives the alignment boundary, in bits,
895 of an argument with the specified mode and type. If it is not defined,
896 PARM_BOUNDARY is used for all arguments.
898 Windows NT wants anything >= 8 bytes to be double word aligned. */
901 function_arg_boundary (mode, type)
902 enum machine_mode mode;
905 if (DEFAULT_ABI != ABI_NT || TARGET_64BIT)
906 return PARM_BOUNDARY;
909 return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32;
911 return (int_size_in_bytes (type) >= 8) ? 64 : 32;
914 /* Update the data in CUM to advance over an argument
915 of mode MODE and data type TYPE.
916 (TYPE is null for libcalls where that information may not be available.) */
919 function_arg_advance (cum, mode, type, named)
920 CUMULATIVE_ARGS *cum;
921 enum machine_mode mode;
925 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
927 cum->nargs_prototype--;
929 #ifdef TARGET_V4_CALLS
932 /* Long longs must not be split between registers and stack */
933 if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT)
934 && type && !AGGREGATE_TYPE_P (type)
935 && cum->words < GP_ARG_NUM_REG
936 && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
938 cum->words = GP_ARG_NUM_REG;
941 /* Aggregates get passed as pointers */
942 if (type && AGGREGATE_TYPE_P (type))
945 /* Floats go in registers, & don't occupy space in the GP registers
946 like they do for AIX unless software floating point. */
947 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
949 && cum->fregno <= FP_ARG_V4_MAX_REG)
953 cum->words += RS6000_ARG_SIZE (mode, type, 1);
959 cum->words += RS6000_ARG_SIZE (mode, type, named);
960 if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT)
964 if (TARGET_DEBUG_ARG)
966 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
967 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
970 /* Determine where to put an argument to a function.
971 Value is zero to push the argument on the stack,
972 or a hard register in which to store the argument.
974 MODE is the argument's machine mode.
975 TYPE is the data type of the argument (as a tree).
976 This is null for libcalls where that information may
978 CUM is a variable of type CUMULATIVE_ARGS which gives info about
979 the preceding args and about the function being called.
980 NAMED is nonzero if this argument is a named parameter
981 (otherwise it is an extra parameter matching an ellipsis).
983 On RS/6000 the first eight words of non-FP are normally in registers
984 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
985 Under V.4, the first 8 FP args are in registers.
987 If this is floating-point and no prototype is specified, we use
988 both an FP and integer register (or possibly FP reg and stack). Library
989 functions (when TYPE is zero) always have the proper types for args,
990 so we can pass the FP value just in one register. emit_library_function
991 doesn't support EXPR_LIST anyway. */
994 function_arg (cum, mode, type, named)
995 CUMULATIVE_ARGS *cum;
996 enum machine_mode mode;
1000 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1001 int align_words = cum->words + align;
1003 if (TARGET_DEBUG_ARG)
1005 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1006 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
1008 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1009 uses to say fp args were passed in registers. Assume that we don't need the
1010 marker for software floating point, or compiler generated library calls. */
1011 if (mode == VOIDmode)
1013 #ifdef TARGET_V4_CALLS
1014 if (TARGET_V4_CALLS && TARGET_HARD_FLOAT && cum->nargs_prototype < 0
1015 && type && (cum->prototype || TARGET_NO_PROTOTYPE))
1016 return GEN_INT ((cum->fregno == FP_ARG_MIN_REG) ? -1 : 1);
1024 #ifdef TARGET_V4_CALLS
1025 if (!TARGET_V4_CALLS)
1030 if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
1033 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1035 if ((cum->nargs_prototype > 0)
1036 #ifdef TARGET_V4_CALLS
1037 || TARGET_V4_CALLS /* V.4 never passes FP values in GP registers */
1040 return gen_rtx (REG, mode, cum->fregno);
1042 return gen_rtx (EXPR_LIST, VOIDmode,
1043 ((align_words < GP_ARG_NUM_REG)
1044 ? gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words)
1046 gen_rtx (REG, mode, cum->fregno));
1049 #ifdef TARGET_V4_CALLS
1050 /* Long longs won't be split between register and stack */
1051 else if (TARGET_V4_CALLS &&
1052 align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
1058 else if (align_words < GP_ARG_NUM_REG)
1059 return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words);
1064 /* For an arg passed partly in registers and partly in memory,
1065 this is the number of registers used.
1066 For args passed entirely in registers or entirely in memory, zero. */
1069 function_arg_partial_nregs (cum, mode, type, named)
1070 CUMULATIVE_ARGS *cum;
1071 enum machine_mode mode;
1078 #ifdef TARGET_V4_CALLS
1079 if (TARGET_V4_CALLS)
1083 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1085 if (cum->nargs_prototype >= 0)
1089 if (cum->words < GP_ARG_NUM_REG
1090 && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named)))
1092 int ret = GP_ARG_NUM_REG - cum->words;
1093 if (ret && TARGET_DEBUG_ARG)
1094 fprintf (stderr, "function_arg_partial_nregs: %d\n", ret);
1102 /* A C expression that indicates when an argument must be passed by
1103 reference. If nonzero for an argument, a copy of that argument is
1104 made in memory and a pointer to the argument is passed instead of
1105 the argument itself. The pointer is passed in whatever way is
1106 appropriate for passing a pointer to that type.
1108 Under V.4, structures and unions are passed by reference. */
1111 function_arg_pass_by_reference (cum, mode, type, named)
1112 CUMULATIVE_ARGS *cum;
1113 enum machine_mode mode;
1117 #ifdef TARGET_V4_CALLS
1118 if (TARGET_V4_CALLS && type && AGGREGATE_TYPE_P (type))
1120 if (TARGET_DEBUG_ARG)
1121 fprintf (stderr, "function_arg_pass_by_reference: aggregate\n");
1131 /* Perform any needed actions needed for a function that is receiving a
1132 variable number of arguments.
1136 MODE and TYPE are the mode and type of the current parameter.
1138 PRETEND_SIZE is a variable that should be set to the amount of stack
1139 that must be pushed by the prolog to pretend that our caller pushed
1142 Normally, this macro will push all remaining incoming registers on the
1143 stack and set PRETEND_SIZE to the length of the registers pushed. */
1146 setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
1147 CUMULATIVE_ARGS *cum;
1148 enum machine_mode mode;
1154 rtx save_area = virtual_incoming_args_rtx;
1155 int reg_size = (TARGET_64BIT) ? 8 : 4;
1157 if (TARGET_DEBUG_ARG)
1159 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1160 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl);
1162 #ifdef TARGET_V4_CALLS
1163 if (TARGET_V4_CALLS && !no_rtl)
1165 rs6000_sysv_varargs_p = 1;
1166 save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET);
1172 int first_reg_offset = cum->words;
1174 if (MUST_PASS_IN_STACK (mode, type))
1175 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1);
1177 if (first_reg_offset > GP_ARG_NUM_REG)
1178 first_reg_offset = GP_ARG_NUM_REG;
1180 if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG)
1182 (GP_ARG_MIN_REG + first_reg_offset,
1183 gen_rtx (MEM, BLKmode,
1184 plus_constant (save_area, first_reg_offset * reg_size)),
1185 GP_ARG_NUM_REG - first_reg_offset,
1186 (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD);
1188 *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD;
1191 #ifdef TARGET_V4_CALLS
1192 /* Save FP registers if needed. */
1193 if (TARGET_V4_CALLS && TARGET_HARD_FLOAT && !no_rtl)
1195 int fregno = cum->fregno;
1196 int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno;
1198 if (num_fp_reg >= 0)
1200 rtx cr1 = gen_rtx (REG, CCmode, 69);
1201 rtx lab = gen_label_rtx ();
1202 int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8);
1204 emit_jump_insn (gen_rtx (SET, VOIDmode,
1206 gen_rtx (IF_THEN_ELSE, VOIDmode,
1207 gen_rtx (NE, VOIDmode, cr1, const0_rtx),
1208 gen_rtx (LABEL_REF, VOIDmode, lab),
1211 while ( num_fp_reg-- >= 0)
1213 emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)),
1214 gen_rtx (REG, DFmode, fregno++));
1224 /* If defined, is a C expression that produces the machine-specific
1225 code for a call to `__builtin_saveregs'. This code will be moved
1226 to the very beginning of the function, before any parameter access
1227 are made. The return value of this function should be an RTX that
1228 contains the value to use as the return of `__builtin_saveregs'.
1230 The argument ARGS is a `tree_list' containing the arguments that
1231 were passed to `__builtin_saveregs'.
1233 If this macro is not defined, the compiler will output an ordinary
1234 call to the library function `__builtin_saveregs'.
1236 On the Power/PowerPC return the address of the area on the stack
1237 used to hold arguments. Under AIX, this includes the 8 word register
1238 save area. Under V.4 this does not. */
1241 expand_builtin_saveregs (args)
1244 return virtual_incoming_args_rtx;
1248 /* Allocate a stack temp. Only allocate one stack temp per type for a
1252 rs6000_stack_temp (mode, size)
1253 enum machine_mode mode;
1256 rtx temp = stack_temps[ (int)mode ];
1259 if (temp == NULL_RTX)
1261 temp = assign_stack_local (mode, size, 0);
1262 addr = XEXP (temp, 0);
1264 if ((size > 4 && !offsettable_address_p (0, mode, addr))
1265 || (size <= 4 && !memory_address_p (mode, addr)))
1267 XEXP (temp, 0) = copy_addr_to_reg (addr);
1270 stack_temps[ (int)mode ] = temp;
1277 /* Generate a memory reference for expand_block_move, copying volatile,
1278 and other bits from an original memory reference. */
1281 expand_block_move_mem (mode, addr, orig_mem)
1282 enum machine_mode mode;
1286 rtx mem = gen_rtx (MEM, mode, addr);
1288 RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem);
1289 MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem);
1290 MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem);
1291 #ifdef MEM_UNALIGNED_P
1292 MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem);
1297 /* Expand a block move operation, and return 1 if successful. Return 0
1298 if we should let the compiler generate normal code.
1300 operands[0] is the destination
1301 operands[1] is the source
1302 operands[2] is the length
1303 operands[3] is the alignment */
1305 #define MAX_MOVE_REG 4
1308 expand_block_move (operands)
1311 rtx orig_dest = operands[0];
1312 rtx orig_src = operands[1];
1313 rtx bytes_rtx = operands[2];
1314 rtx align_rtx = operands[3];
1315 int constp = (GET_CODE (bytes_rtx) == CONST_INT);
1316 int align = XINT (align_rtx, 0);
1326 rtx stores[MAX_MOVE_REG];
1329 /* If this is not a fixed size move, just call memcpy */
1333 /* Anything to move? */
1334 bytes = INTVAL (bytes_rtx);
1338 /* Don't support real large moves. If string instructions are not used,
1339 then don't generate more than 8 loads. */
1345 else if (!STRICT_ALIGNMENT)
1350 else if (bytes > 8*align)
1353 /* Move the address into scratch registers. */
1354 dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0));
1355 src_reg = copy_addr_to_reg (XEXP (orig_src, 0));
1357 if (TARGET_STRING) /* string instructions are available */
1359 for ( ; bytes > 0; bytes -= move_bytes)
1361 if (bytes > 24 /* move up to 32 bytes at a time */
1371 move_bytes = (bytes > 32) ? 32 : bytes;
1372 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1373 expand_block_move_mem (BLKmode, src_reg, orig_src),
1374 GEN_INT ((move_bytes == 32) ? 0 : move_bytes),
1377 else if (bytes > 16 /* move up to 24 bytes at a time */
1385 move_bytes = (bytes > 24) ? 24 : bytes;
1386 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1387 expand_block_move_mem (BLKmode, src_reg, orig_src),
1388 GEN_INT (move_bytes),
1391 else if (bytes > 8 /* move up to 16 bytes at a time */
1397 move_bytes = (bytes > 16) ? 16 : bytes;
1398 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1399 expand_block_move_mem (BLKmode, src_reg, orig_src),
1400 GEN_INT (move_bytes),
1403 else if (bytes > 4 && !TARGET_64BIT)
1404 { /* move up to 8 bytes at a time */
1405 move_bytes = (bytes > 8) ? 8 : bytes;
1406 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1407 expand_block_move_mem (BLKmode, src_reg, orig_src),
1408 GEN_INT (move_bytes),
1411 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1412 { /* move 4 bytes */
1414 tmp_reg = gen_reg_rtx (SImode);
1415 emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src));
1416 emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg);
1418 else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT))
1419 { /* move 2 bytes */
1421 tmp_reg = gen_reg_rtx (HImode);
1422 emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src));
1423 emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg);
1425 else if (bytes == 1) /* move 1 byte */
1428 tmp_reg = gen_reg_rtx (QImode);
1429 emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src));
1430 emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg);
1433 { /* move up to 4 bytes at a time */
1434 move_bytes = (bytes > 4) ? 4 : bytes;
1435 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1436 expand_block_move_mem (BLKmode, src_reg, orig_src),
1437 GEN_INT (move_bytes),
1441 if (bytes > move_bytes)
1443 emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes)));
1444 emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes)));
1449 else /* string instructions not available */
1451 num_reg = offset = 0;
1452 for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes))
1454 /* Calculate the correct offset for src/dest */
1458 dest_addr = dest_reg;
1462 src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset));
1463 dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset));
1466 /* Generate the appropriate load and store, saving the stores for later */
1467 if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT))
1470 tmp_reg = gen_reg_rtx (DImode);
1471 emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src)));
1472 stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg);
1474 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1477 tmp_reg = gen_reg_rtx (SImode);
1478 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src)));
1479 stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg);
1481 else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT))
1484 tmp_reg = gen_reg_rtx (HImode);
1485 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src)));
1486 stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg);
1491 tmp_reg = gen_reg_rtx (QImode);
1492 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src)));
1493 stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg);
1496 if (num_reg >= MAX_MOVE_REG)
1498 for (i = 0; i < num_reg; i++)
1499 emit_insn (stores[i]);
1504 for (i = 0; i < num_reg; i++)
1505 emit_insn (stores[i]);
1512 /* Return 1 if OP is a load multiple operation. It is known to be a
1513 PARALLEL and the first section will be tested. */
1516 load_multiple_operation (op, mode)
1518 enum machine_mode mode;
1520 int count = XVECLEN (op, 0);
1525 /* Perform a quick check so we don't blow up below. */
1527 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1528 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1529 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1532 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1533 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1535 for (i = 1; i < count; i++)
1537 rtx elt = XVECEXP (op, 0, i);
1539 if (GET_CODE (elt) != SET
1540 || GET_CODE (SET_DEST (elt)) != REG
1541 || GET_MODE (SET_DEST (elt)) != SImode
1542 || REGNO (SET_DEST (elt)) != dest_regno + i
1543 || GET_CODE (SET_SRC (elt)) != MEM
1544 || GET_MODE (SET_SRC (elt)) != SImode
1545 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1546 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1547 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1548 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
1555 /* Similar, but tests for store multiple. Here, the second vector element
1556 is a CLOBBER. It will be tested later. */
1559 store_multiple_operation (op, mode)
1561 enum machine_mode mode;
1563 int count = XVECLEN (op, 0) - 1;
1568 /* Perform a quick check so we don't blow up below. */
1570 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1571 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1572 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1575 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1576 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1578 for (i = 1; i < count; i++)
1580 rtx elt = XVECEXP (op, 0, i + 1);
1582 if (GET_CODE (elt) != SET
1583 || GET_CODE (SET_SRC (elt)) != REG
1584 || GET_MODE (SET_SRC (elt)) != SImode
1585 || REGNO (SET_SRC (elt)) != src_regno + i
1586 || GET_CODE (SET_DEST (elt)) != MEM
1587 || GET_MODE (SET_DEST (elt)) != SImode
1588 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1589 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1590 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1591 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
1598 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1599 We only check the opcode against the mode of the CC value here. */
1602 branch_comparison_operator (op, mode)
1604 enum machine_mode mode;
1606 enum rtx_code code = GET_CODE (op);
1607 enum machine_mode cc_mode;
1609 if (GET_RTX_CLASS (code) != '<')
1612 cc_mode = GET_MODE (XEXP (op, 0));
1613 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1616 if ((code == GT || code == LT || code == GE || code == LE)
1617 && cc_mode == CCUNSmode)
1620 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1621 && (cc_mode != CCUNSmode))
1627 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1628 We check the opcode against the mode of the CC value and disallow EQ or
1629 NE comparisons for integers. */
1632 scc_comparison_operator (op, mode)
1634 enum machine_mode mode;
1636 enum rtx_code code = GET_CODE (op);
1637 enum machine_mode cc_mode;
1639 if (GET_MODE (op) != mode && mode != VOIDmode)
1642 if (GET_RTX_CLASS (code) != '<')
1645 cc_mode = GET_MODE (XEXP (op, 0));
1646 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1649 if (code == NE && cc_mode != CCFPmode)
1652 if ((code == GT || code == LT || code == GE || code == LE)
1653 && cc_mode == CCUNSmode)
1656 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1657 && (cc_mode != CCUNSmode))
1660 if (cc_mode == CCEQmode && code != EQ && code != NE)
1666 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1667 mask required to convert the result of a rotate insn into a shift
1668 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1671 includes_lshift_p (shiftop, andop)
1672 register rtx shiftop;
1675 int shift_mask = (~0 << INTVAL (shiftop));
1677 return (INTVAL (andop) & ~shift_mask) == 0;
1680 /* Similar, but for right shift. */
1683 includes_rshift_p (shiftop, andop)
1684 register rtx shiftop;
1687 unsigned shift_mask = ~0;
1689 shift_mask >>= INTVAL (shiftop);
1691 return (INTVAL (andop) & ~ shift_mask) == 0;
1694 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1695 for lfq and stfq insns.
1697 Note reg1 and reg2 *must* be hard registers. To be sure we will
1698 abort if we are passed pseudo registers. */
1701 registers_ok_for_quad_peep (reg1, reg2)
1704 /* We might have been passed a SUBREG. */
1705 if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG)
1708 return (REGNO (reg1) == REGNO (reg2) - 1);
1711 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1712 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1715 addrs_ok_for_quad_peep (addr1, addr2)
1722 /* Extract an offset (if used) from the first addr. */
1723 if (GET_CODE (addr1) == PLUS)
1725 /* If not a REG, return zero. */
1726 if (GET_CODE (XEXP (addr1, 0)) != REG)
1730 reg1 = REGNO (XEXP (addr1, 0));
1731 /* The offset must be constant! */
1732 if (GET_CODE (XEXP (addr1, 1)) != CONST_INT)
1734 offset1 = INTVAL (XEXP (addr1, 1));
1737 else if (GET_CODE (addr1) != REG)
1741 reg1 = REGNO (addr1);
1742 /* This was a simple (mem (reg)) expression. Offset is 0. */
1746 /* Make sure the second address is a (mem (plus (reg) (const_int). */
1747 if (GET_CODE (addr2) != PLUS)
1750 if (GET_CODE (XEXP (addr2, 0)) != REG
1751 || GET_CODE (XEXP (addr2, 1)) != CONST_INT)
1754 if (reg1 != REGNO (XEXP (addr2, 0)))
1757 /* The offset for the second addr must be 8 more than the first addr. */
1758 if (INTVAL (XEXP (addr2, 1)) != offset1 + 8)
1761 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
1766 /* Return the register class of a scratch register needed to copy IN into
1767 or out of a register in CLASS in MODE. If it can be done directly,
1768 NO_REGS is returned. */
1771 secondary_reload_class (class, mode, in)
1772 enum reg_class class;
1773 enum machine_mode mode;
1776 int regno = true_regnum (in);
1778 if (regno >= FIRST_PSEUDO_REGISTER)
1781 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
1783 if (class == GENERAL_REGS || class == BASE_REGS
1784 || (regno >= 0 && INT_REGNO_P (regno)))
1787 /* Constants, memory, and FP registers can go into FP registers. */
1788 if ((regno == -1 || FP_REGNO_P (regno))
1789 && (class == FLOAT_REGS || class == NON_SPECIAL_REGS))
1792 /* We can copy among the CR registers. */
1793 if ((class == CR_REGS || class == CR0_REGS)
1794 && regno >= 0 && CR_REGNO_P (regno))
1797 /* Otherwise, we need GENERAL_REGS. */
1798 return GENERAL_REGS;
1801 /* Given a comparison operation, return the bit number in CCR to test. We
1802 know this is a valid comparison.
1804 SCC_P is 1 if this is for an scc. That means that %D will have been
1805 used instead of %C, so the bits will be in different places.
1807 Return -1 if OP isn't a valid comparison for some reason. */
1814 enum rtx_code code = GET_CODE (op);
1815 enum machine_mode cc_mode;
1819 if (GET_RTX_CLASS (code) != '<')
1822 cc_mode = GET_MODE (XEXP (op, 0));
1823 cc_regnum = REGNO (XEXP (op, 0));
1824 base_bit = 4 * (cc_regnum - 68);
1826 /* In CCEQmode cases we have made sure that the result is always in the
1827 third bit of the CR field. */
1829 if (cc_mode == CCEQmode)
1830 return base_bit + 3;
1835 return scc_p ? base_bit + 3 : base_bit + 2;
1837 return base_bit + 2;
1839 return base_bit + 1;
1844 /* If floating-point, we will have done a cror to put the bit in the
1845 unordered position. So test that bit. For integer, this is ! LT
1846 unless this is an scc insn. */
1847 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit;
1850 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1;
1857 /* Print an operand. Recognize special options, documented below. */
1860 print_operand (file, x, code)
1868 /* These macros test for integers and extract the low-order bits. */
1870 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
1871 && GET_MODE (X) == VOIDmode)
1873 #define INT_LOWPART(X) \
1874 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
1879 /* Write out an instruction after the call which may be replaced
1880 with glue code by the loader. This depends on the AIX version. */
1881 asm_fprintf (file, RS6000_CALL_GLUE);
1885 /* Write the register number of the TOC register. */
1886 fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file);
1890 /* If X is a constant integer whose low-order 5 bits are zero,
1891 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
1892 in the AIX assembler where "sri" with a zero shift count
1893 write a trash instruction. */
1894 if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0)
1901 /* Low-order 16 bits of constant, unsigned. */
1903 output_operand_lossage ("invalid %%b value");
1905 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
1909 /* This is an optional cror needed for LE or GE floating-point
1910 comparisons. Otherwise write nothing. */
1911 if ((GET_CODE (x) == LE || GET_CODE (x) == GE)
1912 && GET_MODE (XEXP (x, 0)) == CCFPmode)
1914 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1916 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
1917 base_bit + 2, base_bit + (GET_CODE (x) == GE));
1922 /* Similar, except that this is for an scc, so we must be able to
1923 encode the test in a single bit that is one. We do the above
1924 for any LE, GE, GEU, or LEU and invert the bit for NE. */
1925 if (GET_CODE (x) == LE || GET_CODE (x) == GE
1926 || GET_CODE (x) == LEU || GET_CODE (x) == GEU)
1928 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1930 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
1932 base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU));
1935 else if (GET_CODE (x) == NE)
1937 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
1939 fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3,
1940 base_bit + 2, base_bit + 2);
1945 /* X is a CR register. Print the number of the third bit of the CR */
1946 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
1947 output_operand_lossage ("invalid %%E value");
1949 fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3);
1953 /* X is a CR register. Print the shift count needed to move it
1954 to the high-order four bits. */
1955 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
1956 output_operand_lossage ("invalid %%f value");
1958 fprintf (file, "%d", 4 * (REGNO (x) - 68));
1962 /* Similar, but print the count for the rotate in the opposite
1964 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
1965 output_operand_lossage ("invalid %%F value");
1967 fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68));
1971 /* X is a constant integer. If it is negative, print "m",
1972 otherwise print "z". This is to make a aze or ame insn. */
1973 if (GET_CODE (x) != CONST_INT)
1974 output_operand_lossage ("invalid %%G value");
1975 else if (INTVAL (x) >= 0)
1982 /* If constant, output low-order five bits. Otherwise,
1985 fprintf (file, "%d", INT_LOWPART (x) & 31);
1987 print_operand (file, x, 0);
1991 /* Print `i' if this is a constant, else nothing. */
1997 /* Write the bit number in CCR for jump. */
2000 output_operand_lossage ("invalid %%j code");
2002 fprintf (file, "%d", i);
2006 /* Similar, but add one for shift count in rlinm for scc and pass
2007 scc flag to `ccr_bit'. */
2010 output_operand_lossage ("invalid %%J code");
2012 /* If we want bit 31, write a shift count of zero, not 32. */
2013 fprintf (file, "%d", i == 31 ? 0 : i + 1);
2017 /* X must be a constant. Write the 1's complement of the
2020 output_operand_lossage ("invalid %%k value");
2022 fprintf (file, "%d", ~ INT_LOWPART (x));
2026 /* Write second word of DImode or DFmode reference. Works on register
2027 or non-indexed memory only. */
2028 if (GET_CODE (x) == REG)
2029 fprintf (file, "%d", REGNO (x) + 1);
2030 else if (GET_CODE (x) == MEM)
2032 /* Handle possible auto-increment. Since it is pre-increment and
2033 we have already done it, we can just use an offset of four. */
2034 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2035 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2036 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4));
2038 output_address (plus_constant (XEXP (x, 0), 4));
2043 /* MB value for a mask operand. */
2044 if (! mask_operand (x, VOIDmode))
2045 output_operand_lossage ("invalid %%m value");
2047 val = INT_LOWPART (x);
2049 /* If the high bit is set and the low bit is not, the value is zero.
2050 If the high bit is zero, the value is the first 1 bit we find from
2052 if (val < 0 && (val & 1) == 0)
2059 for (i = 1; i < 32; i++)
2060 if ((val <<= 1) < 0)
2062 fprintf (file, "%d", i);
2066 /* Otherwise, look for the first 0 bit from the right. The result is its
2067 number plus 1. We know the low-order bit is one. */
2068 for (i = 0; i < 32; i++)
2069 if (((val >>= 1) & 1) == 0)
2072 /* If we ended in ...01, I would be 0. The correct value is 31, so
2074 fprintf (file, "%d", 31 - i);
2078 /* ME value for a mask operand. */
2079 if (! mask_operand (x, VOIDmode))
2080 output_operand_lossage ("invalid %%m value");
2082 val = INT_LOWPART (x);
2084 /* If the low bit is set and the high bit is not, the value is 31.
2085 If the low bit is zero, the value is the first 1 bit we find from
2087 if ((val & 1) && val >= 0)
2092 else if ((val & 1) == 0)
2094 for (i = 0; i < 32; i++)
2095 if ((val >>= 1) & 1)
2098 /* If we had ....10, I would be 0. The result should be
2099 30, so we need 30 - i. */
2100 fprintf (file, "%d", 30 - i);
2104 /* Otherwise, look for the first 0 bit from the left. The result is its
2105 number minus 1. We know the high-order bit is one. */
2106 for (i = 0; i < 32; i++)
2107 if ((val <<= 1) >= 0)
2110 fprintf (file, "%d", i);
2114 /* Write the number of elements in the vector times 4. */
2115 if (GET_CODE (x) != PARALLEL)
2116 output_operand_lossage ("invalid %%N value");
2118 fprintf (file, "%d", XVECLEN (x, 0) * 4);
2122 /* Similar, but subtract 1 first. */
2123 if (GET_CODE (x) != PARALLEL)
2124 output_operand_lossage ("invalid %%N value");
2126 fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4);
2130 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2132 || (i = exact_log2 (INT_LOWPART (x))) < 0)
2133 output_operand_lossage ("invalid %%p value");
2135 fprintf (file, "%d", i);
2139 /* The operand must be an indirect memory reference. The result
2140 is the register number. */
2141 if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
2142 || REGNO (XEXP (x, 0)) >= 32)
2143 output_operand_lossage ("invalid %%P value");
2145 fprintf (file, "%d", REGNO (XEXP (x, 0)));
2149 /* X is a CR register. Print the mask for `mtcrf'. */
2150 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2151 output_operand_lossage ("invalid %%R value");
2153 fprintf (file, "%d", 128 >> (REGNO (x) - 68));
2157 /* Low 5 bits of 32 - value */
2159 output_operand_lossage ("invalid %%s value");
2161 fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31);
2165 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2166 All floating-point operations except NE branch true and integer
2167 EQ, LT, GT, LTU and GTU also branch true. */
2168 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2169 output_operand_lossage ("invalid %%t value");
2171 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2172 && GET_CODE (x) != NE)
2173 || GET_CODE (x) == EQ
2174 || GET_CODE (x) == LT || GET_CODE (x) == GT
2175 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2182 /* Opposite of 't': write 4 if this jump operation will branch if true,
2184 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2185 output_operand_lossage ("invalid %%t value");
2187 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2188 && GET_CODE (x) != NE)
2189 || GET_CODE (x) == EQ
2190 || GET_CODE (x) == LT || GET_CODE (x) == GT
2191 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2198 /* High-order 16 bits of constant. */
2200 output_operand_lossage ("invalid %%u value");
2202 fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff);
2206 /* Print `u' if this has an auto-increment or auto-decrement. */
2207 if (GET_CODE (x) == MEM
2208 && (GET_CODE (XEXP (x, 0)) == PRE_INC
2209 || GET_CODE (XEXP (x, 0)) == PRE_DEC))
2214 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2217 fprintf (file, "%d",
2218 (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000));
2220 print_operand (file, x, 0);
2224 /* If constant, low-order 16 bits of constant, unsigned.
2225 Otherwise, write normally. */
2227 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
2229 print_operand (file, x, 0);
2233 if (GET_CODE (x) == MEM
2234 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0)))
2239 /* Like 'L', for third word of TImode */
2240 if (GET_CODE (x) == REG)
2241 fprintf (file, "%d", REGNO (x) + 2);
2242 else if (GET_CODE (x) == MEM)
2244 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2245 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2246 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8));
2248 output_address (plus_constant (XEXP (x, 0), 8));
2253 /* X is a SYMBOL_REF. Write out the name preceded by a
2254 period and without any trailing data in brackets. Used for function
2255 names. If we are configured for System V (or the embedded ABI) on
2256 the PowerPC, do not emit the period, since those systems do not use
2257 TOCs and the like. */
2258 if (GET_CODE (x) != SYMBOL_REF)
2261 if (XSTR (x, 0)[0] != '.')
2263 switch (DEFAULT_ABI)
2273 case ABI_AIX_NODESC:
2281 RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
2285 /* Like 'L', for last word of TImode. */
2286 if (GET_CODE (x) == REG)
2287 fprintf (file, "%d", REGNO (x) + 3);
2288 else if (GET_CODE (x) == MEM)
2290 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2291 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2292 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12));
2294 output_address (plus_constant (XEXP (x, 0), 12));
2299 if (GET_CODE (x) == REG)
2300 fprintf (file, "%s", reg_names[REGNO (x)]);
2301 else if (GET_CODE (x) == MEM)
2303 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2304 know the width from the mode. */
2305 if (GET_CODE (XEXP (x, 0)) == PRE_INC)
2306 fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)),
2307 REGNO (XEXP (XEXP (x, 0), 0)));
2308 else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
2309 fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)),
2310 REGNO (XEXP (XEXP (x, 0), 0)));
2312 output_address (XEXP (x, 0));
2315 output_addr_const (file, x);
2319 output_operand_lossage ("invalid %%xn code");
2323 /* Print the address of an operand. */
2326 print_operand_address (file, x)
2330 if (GET_CODE (x) == REG)
2331 fprintf (file, "0(%s)", reg_names[ REGNO (x) ]);
2332 else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST)
2334 output_addr_const (file, x);
2335 /* When TARGET_MINIMAL_TOC, use the indirected toc table pointer instead
2336 of the toc pointer. */
2337 #ifdef TARGET_NO_TOC
2342 fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]);
2344 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
2346 if (REGNO (XEXP (x, 0)) == 0)
2347 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ],
2348 reg_names[ REGNO (XEXP (x, 0)) ]);
2350 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ],
2351 reg_names[ REGNO (XEXP (x, 1)) ]);
2353 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
2354 fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]);
2355 else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM
2356 && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1)))
2358 output_addr_const (file, XEXP (x, 1));
2359 fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]);
2365 /* This page contains routines that are used to determine what the function
2366 prologue and epilogue code will do and write them out. */
2368 /* Return the first fixed-point register that is required to be saved. 32 if
2372 first_reg_to_save ()
2376 /* Find lowest numbered live register. */
2377 for (first_reg = 13; first_reg <= 31; first_reg++)
2378 if (regs_ever_live[first_reg])
2381 /* If profiling, then we must save/restore every register that contains
2382 a parameter before/after the .mcount call. Use registers from 30 down
2383 to 23 to do this. Don't use the frame pointer in reg 31.
2385 For now, save enough room for all of the parameter registers. */
2386 if (DEFAULT_ABI == ABI_AIX && profile_flag)
2393 /* Similar, for FP regs. */
2396 first_fp_reg_to_save ()
2400 /* Find lowest numbered live register. */
2401 for (first_reg = 14 + 32; first_reg <= 63; first_reg++)
2402 if (regs_ever_live[first_reg])
2408 /* Return non-zero if this function makes calls. */
2411 rs6000_makes_calls ()
2415 /* If we are profiling, we will be making a call to mcount. */
2419 for (insn = get_insns (); insn; insn = next_insn (insn))
2420 if (GET_CODE (insn) == CALL_INSN)
2427 /* Calculate the stack information for the current function. This is
2428 complicated by having two separate calling sequences, the AIX calling
2429 sequence and the V.4 calling sequence.
2431 AIX stack frames look like:
2433 SP----> +---------------------------------------+
2434 | back chain to caller | 0
2435 +---------------------------------------+
2437 +---------------------------------------+
2439 +---------------------------------------+
2440 | reserved for compilers | 12
2441 +---------------------------------------+
2442 | reserved for binders | 16
2443 +---------------------------------------+
2444 | saved TOC pointer | 20
2445 +---------------------------------------+
2446 | Parameter save area (P) | 24
2447 +---------------------------------------+
2448 | Alloca space (A) | 24+P
2449 +---------------------------------------+
2450 | Local variable space (L) | 24+P+A
2451 +---------------------------------------+
2452 | Save area for GP registers (G) | 24+P+A+L
2453 +---------------------------------------+
2454 | Save area for FP registers (F) | 24+P+A+L+G
2455 +---------------------------------------+
2456 old SP->| back chain to caller's caller |
2457 +---------------------------------------+
2459 V.4 stack frames look like:
2461 SP----> +---------------------------------------+
2462 | back chain to caller | 0
2463 +---------------------------------------+
2464 | caller's saved LR | 4
2465 +---------------------------------------+
2466 | Parameter save area (P) | 8
2467 +---------------------------------------+
2468 | Alloca space (A) | 8+P
2469 +---------------------------------------+
2470 | Varargs save area (V) | 8+P+A
2471 +---------------------------------------+
2472 | Local variable space (L) | 8+P+A+V
2473 +---------------------------------------+
2474 | saved CR (C) | 8+P+A+V+L
2475 +---------------------------------------+
2476 | Save area for GP registers (G) | 8+P+A+V+L+C
2477 +---------------------------------------+
2478 | Save area for FP registers (F) | 8+P+A+V+L+C+G
2479 +---------------------------------------+
2480 old SP->| back chain to caller's caller |
2481 +---------------------------------------+
2484 A PowerPC Windows/NT frame looks like:
2486 SP----> +---------------------------------------+
2487 | back chain to caller | 0
2488 +---------------------------------------+
2490 +---------------------------------------+
2492 +---------------------------------------+
2494 +---------------------------------------+
2496 +---------------------------------------+
2498 +---------------------------------------+
2499 | Parameter save area (P) | 24
2500 +---------------------------------------+
2501 | Alloca space (A) | 24+P
2502 +---------------------------------------+
2503 | Local variable space (L) | 24+P+A
2504 +---------------------------------------+
2505 | Save area for FP registers (F) | 24+P+A+L
2506 +---------------------------------------+
2507 | Possible alignment area (X) | 24+P+A+L+F
2508 +---------------------------------------+
2509 | Save area for GP registers (G) | 24+P+A+L+F+X
2510 +---------------------------------------+
2511 | Save area for CR (C) | 24+P+A+L+F+X+G
2512 +---------------------------------------+
2513 | Save area for TOC (T) | 24+P+A+L+F+X+G+C
2514 +---------------------------------------+
2515 | Save area for LR (R) | 24+P+A+L+F+X+G+C+T
2516 +---------------------------------------+
2517 old SP->| back chain to caller's caller |
2518 +---------------------------------------+
2520 For NT, there is no specific order to save the registers, but in
2521 order to support __builtin_return_address, the save area for the
2522 link register needs to be in a known place, so we use -4 off of the
2523 old SP. To support calls through pointers, we also allocate a
2524 fixed slot to store the TOC, -8 off the old SP. */
2527 rs6000_stack_info ()
2529 static rs6000_stack_t info, zero_info;
2530 rs6000_stack_t *info_ptr = &info;
2531 int reg_size = TARGET_64BIT ? 8 : 4;
2532 enum rs6000_abi abi;
2535 /* Zero all fields portably */
2538 /* Select which calling sequence */
2539 info_ptr->abi = abi = DEFAULT_ABI;
2541 /* Calculate which registers need to be saved & save area size */
2542 info_ptr->first_gp_reg_save = first_reg_to_save ();
2543 info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save);
2545 info_ptr->first_fp_reg_save = first_fp_reg_to_save ();
2546 info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save);
2548 /* Does this function call anything? */
2549 info_ptr->calls_p = rs6000_makes_calls ();
2551 /* Do we need to allocate space to save the toc? */
2552 if (rs6000_save_toc_p)
2554 info_ptr->toc_save_p = 1;
2555 info_ptr->toc_size = reg_size;
2558 /* If this is main and we need to call a function to set things up,
2559 save main's arguments around the call. */
2560 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0)
2562 info_ptr->main_p = 1;
2565 if (DECL_ARGUMENTS (current_function_decl))
2570 info_ptr->main_save_p = 1;
2571 info_ptr->main_size = 0;
2572 info_ptr->calls_p = 1;
2574 for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl));
2575 arg != NULL_TREE && i < 8;
2576 (arg = TREE_CHAIN (arg)), i++)
2578 info_ptr->main_size += reg_size;
2584 /* Determine if we need to save the link register */
2585 if (regs_ever_live[65] || profile_flag
2586 #ifdef TARGET_RELOCATABLE
2587 || (TARGET_RELOCATABLE && (get_pool_size () != 0))
2589 || (info_ptr->first_fp_reg_save != 64
2590 && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save))
2591 || (abi == ABI_V4 && current_function_calls_alloca)
2592 || info_ptr->calls_p)
2594 info_ptr->lr_save_p = 1;
2595 regs_ever_live[65] = 1;
2597 info_ptr->lr_size = reg_size;
2600 /* Determine if we need to save the condition code registers */
2601 if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72])
2603 info_ptr->cr_save_p = 1;
2604 if (abi == ABI_V4 || abi == ABI_NT)
2605 info_ptr->cr_size = reg_size;
2608 /* Determine various sizes */
2609 info_ptr->reg_size = reg_size;
2610 info_ptr->fixed_size = RS6000_SAVE_AREA;
2611 info_ptr->varargs_size = RS6000_VARARGS_AREA;
2612 info_ptr->vars_size = ALIGN (get_frame_size (), 8);
2613 info_ptr->parm_size = ALIGN (current_function_outgoing_args_size, 8);
2614 info_ptr->save_size = ALIGN (info_ptr->fp_size
2618 + info_ptr->toc_size
2619 + info_ptr->main_size, 8);
2621 total_raw_size = (info_ptr->vars_size
2622 + info_ptr->parm_size
2623 + info_ptr->save_size
2624 + info_ptr->varargs_size
2625 + info_ptr->fixed_size);
2627 info_ptr->total_size = ALIGN (total_raw_size, STACK_BOUNDARY / BITS_PER_UNIT);
2629 /* Determine if we need to allocate any stack frame.
2630 For AIX We need to push the stack if a frame pointer is needed (because
2631 the stack might be dynamically adjusted), if we are debugging, if the
2632 total stack size is more than 220 bytes, or if we make calls.
2634 For V.4 we don't have the stack cushion that AIX uses, but assume that
2635 the debugger can handle stackless frames. */
2637 if (info_ptr->calls_p)
2638 info_ptr->push_p = 1;
2640 else if (abi == ABI_V4 || abi == ABI_NT)
2641 info_ptr->push_p = (total_raw_size > info_ptr->fixed_size
2642 || info_ptr->lr_save_p);
2645 info_ptr->push_p = (frame_pointer_needed
2646 || write_symbols != NO_DEBUG
2647 || info_ptr->total_size > 220);
2649 /* Calculate the offsets */
2657 case ABI_AIX_NODESC:
2658 info_ptr->fp_save_offset = - info_ptr->fp_size;
2659 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
2660 info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size;
2661 info_ptr->cr_save_offset = 4;
2662 info_ptr->lr_save_offset = 8;
2666 info_ptr->fp_save_offset = - info_ptr->fp_size;
2667 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
2668 info_ptr->cr_save_offset = info_ptr->gp_save_offset - reg_size;
2669 info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size;
2670 info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
2671 info_ptr->lr_save_offset = reg_size;
2675 info_ptr->lr_save_offset = -4;
2676 info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size;
2677 info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
2678 info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size;
2679 info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size;
2680 if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0)
2681 info_ptr->fp_save_offset -= 4;
2683 info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size;
2687 /* Zero offsets if we're not saving those registers */
2688 if (!info_ptr->fp_size)
2689 info_ptr->fp_save_offset = 0;
2691 if (!info_ptr->gp_size)
2692 info_ptr->gp_save_offset = 0;
2694 if (!info_ptr->lr_save_p)
2695 info_ptr->lr_save_offset = 0;
2697 if (!info_ptr->cr_save_p)
2698 info_ptr->cr_save_offset = 0;
2700 if (!info_ptr->toc_save_p)
2701 info_ptr->toc_save_offset = 0;
2703 if (!info_ptr->main_save_p)
2704 info_ptr->main_save_offset = 0;
2710 debug_stack_info (info)
2711 rs6000_stack_t *info;
2716 info = rs6000_stack_info ();
2718 fprintf (stderr, "\nStack information for function %s:\n",
2719 ((current_function_decl && DECL_NAME (current_function_decl))
2720 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl))
2725 default: abi_string = "Unknown"; break;
2726 case ABI_NONE: abi_string = "NONE"; break;
2727 case ABI_AIX: abi_string = "AIX"; break;
2728 case ABI_AIX_NODESC: abi_string = "AIX"; break;
2729 case ABI_V4: abi_string = "V.4"; break;
2730 case ABI_NT: abi_string = "NT"; break;
2733 fprintf (stderr, "\tABI = %5s\n", abi_string);
2735 if (info->first_gp_reg_save != 32)
2736 fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save);
2738 if (info->first_fp_reg_save != 64)
2739 fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save);
2741 if (info->lr_save_p)
2742 fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p);
2744 if (info->cr_save_p)
2745 fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p);
2747 if (info->toc_save_p)
2748 fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p);
2751 fprintf (stderr, "\tpush_p = %5d\n", info->push_p);
2754 fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p);
2757 fprintf (stderr, "\tmain_p = %5d\n", info->main_p);
2759 if (info->main_save_p)
2760 fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p);
2762 if (info->gp_save_offset)
2763 fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset);
2765 if (info->fp_save_offset)
2766 fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset);
2768 if (info->lr_save_offset)
2769 fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset);
2771 if (info->cr_save_offset)
2772 fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset);
2774 if (info->toc_save_offset)
2775 fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset);
2777 if (info->varargs_save_offset)
2778 fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset);
2780 if (info->main_save_offset)
2781 fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset);
2783 if (info->total_size)
2784 fprintf (stderr, "\ttotal_size = %5d\n", info->total_size);
2786 if (info->varargs_size)
2787 fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size);
2789 if (info->vars_size)
2790 fprintf (stderr, "\tvars_size = %5d\n", info->vars_size);
2792 if (info->parm_size)
2793 fprintf (stderr, "\tparm_size = %5d\n", info->parm_size);
2795 if (info->fixed_size)
2796 fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size);
2799 fprintf (stderr, "\tgp_size = %5d\n", info->gp_size);
2802 fprintf (stderr, "\tfp_size = %5d\n", info->fp_size);
2805 fprintf (stderr, "\tlr_size = %5d\n", info->cr_size);
2808 fprintf (stderr, "\tcr_size = %5d\n", info->cr_size);
2811 fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size);
2813 if (info->main_size)
2814 fprintf (stderr, "\tmain_size = %5d\n", info->main_size);
2816 if (info->save_size)
2817 fprintf (stderr, "\tsave_size = %5d\n", info->save_size);
2819 if (info->reg_size != 4)
2820 fprintf (stderr, "\treg_size = %5d\n", info->reg_size);
2822 fprintf (stderr, "\n");
2826 /* Write function prologue. */
2828 output_prolog (file, size)
2832 rs6000_stack_t *info = rs6000_stack_info ();
2833 int reg_size = info->reg_size;
2839 store_reg = "\tstd %s,%d(%s)";
2840 load_reg = "\tlld %s,%d(%s)";
2844 store_reg = "\t{st|stw} %s,%d(%s)\n";
2845 load_reg = "\t{l|lwz} %s,%d(%s)\n";
2848 if (TARGET_DEBUG_STACK)
2849 debug_stack_info (info);
2851 /* Write .extern for any function we will call to save and restore fp
2853 if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
2854 fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
2855 SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX,
2856 RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
2858 /* Write .extern for truncation routines, if needed. */
2859 if (rs6000_trunc_used && ! trunc_defined)
2861 fprintf (file, "\t.extern .%s\n\t.extern .%s\n",
2862 RS6000_ITRUNC, RS6000_UITRUNC);
2866 /* Write .extern for AIX common mode routines, if needed. */
2867 if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined)
2869 fputs ("\t.extern __mulh\n", file);
2870 fputs ("\t.extern __mull\n", file);
2871 fputs ("\t.extern __divss\n", file);
2872 fputs ("\t.extern __divus\n", file);
2873 fputs ("\t.extern __quoss\n", file);
2874 fputs ("\t.extern __quous\n", file);
2875 common_mode_defined = 1;
2878 /* If we use the link register, get it into r0. */
2879 if (info->lr_save_p)
2880 asm_fprintf (file, "\tmflr %s\n", reg_names[0]);
2882 /* If we need to save CR, put it into r12. */
2883 if (info->cr_save_p)
2884 asm_fprintf (file, "\tmfcr %s\n", reg_names[12]);
2886 /* Do any required saving of fpr's. If only one or two to save, do it
2887 ourself. Otherwise, call function. Note that since they are statically
2888 linked, we do not need a nop following them. */
2889 if (FP_SAVE_INLINE (info->first_fp_reg_save))
2891 int regno = info->first_fp_reg_save;
2892 int loc = info->fp_save_offset;
2894 for ( ; regno < 64; regno++, loc += 8)
2895 asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[1]);
2897 else if (info->first_fp_reg_save != 64)
2898 asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX,
2899 info->first_fp_reg_save - 32, SAVE_FP_SUFFIX);
2901 /* Now save gpr's. */
2902 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
2904 int regno = info->first_gp_reg_save;
2905 int loc = info->gp_save_offset;
2907 for ( ; regno < 32; regno++, loc += reg_size)
2908 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[1]);
2911 else if (info->first_gp_reg_save != 32)
2912 asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n",
2913 reg_names[info->first_gp_reg_save],
2914 info->gp_save_offset,
2917 /* Save main's arguments if we need to call a function */
2919 if (info->main_save_p)
2922 int loc = info->main_save_offset;
2923 int size = info->main_size;
2925 for (regno = 3; size > 0; regno++, loc -= reg_size, size -= reg_size)
2926 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[1]);
2930 /* Save lr if we used it. */
2931 if (info->lr_save_p)
2932 asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset, reg_names[1]);
2934 /* Save CR if we use any that must be preserved. */
2935 if (info->cr_save_p)
2936 asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset, reg_names[1]);
2938 if (info->toc_save_p)
2939 asm_fprintf (file, store_reg, reg_names[2], info->toc_save_offset, reg_names[1]);
2941 /* Update stack and set back pointer. */
2944 if (info->total_size < 32767)
2946 (TARGET_64BIT) ? "\tstdu %s,%d(%s)\n" : "\t{stu|stwu} %s,%d(%s)\n",
2947 reg_names[1], - info->total_size, reg_names[1]);
2950 int neg_size = - info->total_size;
2951 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
2952 reg_names[0], (neg_size >> 16) & 0xffff,
2953 reg_names[0], reg_names[0], neg_size & 0xffff);
2955 (TARGET_64BIT) ? "\tstdux %s,%s,%s\n" : "\t{stux|stwux} %s,%s,%s\n",
2956 reg_names[1], reg_names[1], reg_names[0]);
2960 /* Set frame pointer, if needed. */
2961 if (frame_pointer_needed)
2962 asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]);
2965 /* If we need to call a function to set things up for main, do so now
2966 before dealing with the TOC. */
2971 switch (DEFAULT_ABI)
2973 case ABI_AIX: prefix = "."; break;
2974 case ABI_NT: prefix = ".."; break;
2977 fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN);
2978 #ifdef RS6000_CALL_GLUE2
2979 fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN);
2981 #ifdef RS6000_CALL_GLUE
2982 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT)
2983 fprintf (file, "\t%s\n", RS6000_CALL_GLUE);
2987 if (info->main_save_p)
2991 int size = info->main_size;
2993 if (info->total_size < 32767)
2995 loc = info->total_size + info->main_save_offset;
2996 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
2997 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]);
3000 { /* for large frames, reg 0 above contains -frame size */
3001 loc = info->main_save_offset;
3002 asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0],
3005 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
3006 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]);
3013 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3014 TOC_TABLE address into register 30. */
3015 if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0)
3019 #ifdef TARGET_RELOCATABLE
3020 if (TARGET_RELOCATABLE)
3022 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3023 fputs ("\tbl ", file);
3024 assemble_name (file, buf);
3027 ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno);
3028 fprintf (file, "\tmflr %s\n", reg_names[30]);
3030 asm_fprintf (file, TARGET_64BIT ? "\tld" : "\t{l|lwz}");
3031 fprintf (file, " %s,(", reg_names[0]);
3032 ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno);
3033 assemble_name (file, buf);
3035 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3036 assemble_name (file, buf);
3037 fprintf (file, ")(%s)\n", reg_names[30]);
3038 asm_fprintf (file, "\t{cax|add} %s,%s,%s\n",
3039 reg_names[30], reg_names[0], reg_names[30]);
3040 rs6000_pic_labelno++;
3045 switch (DEFAULT_ABI)
3048 case ABI_AIX_NODESC:
3051 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1);
3052 asm_fprintf (file, "\t{cau|addis} %s,%s,", reg_names[30], reg_names[0]);
3053 assemble_name (file, buf);
3054 asm_fprintf (file, "@ha\n");
3055 if (TARGET_NEW_MNEMONICS)
3057 asm_fprintf (file, "\taddi %s,%s,", reg_names[30], reg_names[30]);
3058 assemble_name (file, buf);
3059 asm_fprintf (file, "@l\n");
3063 asm_fprintf (file, "\tcal %s,", reg_names[30]);
3064 assemble_name (file, buf);
3065 asm_fprintf (file, "@l(%s)\n", reg_names[30]);
3075 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0);
3076 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[30]);
3077 assemble_name (file, buf);
3078 asm_fprintf (file, "(%s)\n", reg_names[2]);
3083 if (DEFAULT_ABI == ABI_NT)
3085 assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3086 fputs (".b:\n", file);
3090 /* Write function epilogue. */
3093 output_epilog (file, size)
3097 rs6000_stack_t *info = rs6000_stack_info ();
3098 char *load_reg = (TARGET_64BIT) ? "\tld %s,%d(%s)" : "\t{l|lwz} %s,%d(%s)\n";
3099 rtx insn = get_last_insn ();
3102 /* Forget about any temporaries created */
3103 for (i = 0; i < NUM_MACHINE_MODES; i++)
3104 stack_temps[i] = NULL_RTX;
3106 /* If the last insn was a BARRIER, we don't have to write anything except
3108 if (GET_CODE (insn) == NOTE)
3109 insn = prev_nonnote_insn (insn);
3110 if (insn == 0 || GET_CODE (insn) != BARRIER)
3112 /* If we have a frame pointer, a call to alloca, or a large stack
3113 frame, restore the old stack pointer using the backchain. Otherwise,
3114 we know what size to update it with. */
3115 if (frame_pointer_needed || current_function_calls_alloca
3116 || info->total_size > 32767)
3117 asm_fprintf (file, load_reg, reg_names[1], 0, reg_names[1]);
3118 else if (info->push_p)
3120 if (TARGET_NEW_MNEMONICS)
3121 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], info->total_size);
3123 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], info->total_size, reg_names[1]);
3126 /* Get the old lr if we saved it. */
3127 if (info->lr_save_p)
3128 asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset, reg_names[1]);
3130 /* Get the old cr if we saved it. */
3131 if (info->cr_save_p)
3132 asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset, reg_names[1]);
3134 /* Set LR here to try to overlap restores below. */
3135 if (info->lr_save_p)
3136 asm_fprintf (file, "\tmtlr %s\n", reg_names[0]);
3138 /* Restore gpr's. */
3139 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3141 int regno = info->first_gp_reg_save;
3142 int loc = info->gp_save_offset;
3143 int reg_size = (TARGET_64BIT) ? 8 : 4;
3145 for ( ; regno < 32; regno++, loc += reg_size)
3146 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]);
3149 else if (info->first_gp_reg_save != 32)
3150 asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n",
3151 reg_names[info->first_gp_reg_save],
3152 info->gp_save_offset,
3155 /* Restore fpr's if we can do it without calling a function. */
3156 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3158 int regno = info->first_fp_reg_save;
3159 int loc = info->fp_save_offset;
3161 for ( ; regno < 64; regno++, loc += 8)
3162 asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[1]);
3165 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3167 if (info->cr_save_p)
3168 asm_fprintf (file, "\tmtcrf %d,%s\n",
3169 (regs_ever_live[70] != 0) * 0x20
3170 + (regs_ever_live[71] != 0) * 0x10
3171 + (regs_ever_live[72] != 0) * 0x8, reg_names[12]);
3173 /* If we have to restore more than two FP registers, branch to the
3174 restore function. It will return to our caller. */
3175 if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
3176 asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX,
3177 info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
3179 asm_fprintf (file, "\t{br|blr}\n");
3182 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3185 We don't output a traceback table if -finhibit-size-directive was
3186 used. The documentation for -finhibit-size-directive reads
3187 ``don't output a @code{.size} assembler directive, or anything
3188 else that would cause trouble if the function is split in the
3189 middle, and the two halves are placed at locations far apart in
3190 memory.'' The traceback table has this property, since it
3191 includes the offset from the start of the function to the
3192 traceback table itself.
3194 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3195 different traceback table. */
3196 if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive)
3198 char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
3199 int fixed_parms, float_parms, parm_info;
3202 while (*fname == '.') /* V.4 encodes . in the name */
3205 /* Need label immediately before tbtab, so we can compute its offset
3206 from the function start. */
3209 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3210 ASM_OUTPUT_LABEL (file, fname);
3212 /* The .tbtab pseudo-op can only be used for the first eight
3213 expressions, since it can't handle the possibly variable
3214 length fields that follow. However, if you omit the optional
3215 fields, the assembler outputs zeros for all optional fields
3216 anyways, giving each variable length field is minimum length
3217 (as defined in sys/debug.h). Thus we can not use the .tbtab
3218 pseudo-op at all. */
3220 /* An all-zero word flags the start of the tbtab, for debuggers
3221 that have to find it by searching forward from the entry
3222 point or from the current pc. */
3223 fputs ("\t.long 0\n", file);
3225 /* Tbtab format type. Use format type 0. */
3226 fputs ("\t.byte 0,", file);
3228 /* Language type. Unfortunately, there doesn't seem to be any
3229 official way to get this info, so we use language_string. C
3230 is 0. C++ is 9. No number defined for Obj-C, so use the
3231 value for C for now. */
3232 if (! strcmp (language_string, "GNU C")
3233 || ! strcmp (language_string, "GNU Obj-C"))
3235 else if (! strcmp (language_string, "GNU F77"))
3237 else if (! strcmp (language_string, "GNU Ada"))
3239 else if (! strcmp (language_string, "GNU PASCAL"))
3241 else if (! strcmp (language_string, "GNU C++"))
3245 fprintf (file, "%d,", i);
3247 /* 8 single bit fields: global linkage (not set for C extern linkage,
3248 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
3249 from start of procedure stored in tbtab, internal function, function
3250 has controlled storage, function has no toc, function uses fp,
3251 function logs/aborts fp operations. */
3252 /* Assume that fp operations are used if any fp reg must be saved. */
3253 fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1));
3255 /* 6 bitfields: function is interrupt handler, name present in
3256 proc table, function calls alloca, on condition directives
3257 (controls stack walks, 3 bits), saves condition reg, saves
3259 /* The `function calls alloca' bit seems to be set whenever reg 31 is
3260 set up as a frame pointer, even when there is no alloca call. */
3261 fprintf (file, "%d,",
3262 ((1 << 6) | (frame_pointer_needed << 5)
3263 | (info->cr_save_p << 1) | (info->lr_save_p)));
3265 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
3267 fprintf (file, "%d,",
3268 (info->push_p << 7) | (64 - info->first_fp_reg_save));
3270 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
3271 fprintf (file, "%d,", (32 - first_reg_to_save ()));
3274 /* Compute the parameter info from the function decl argument
3277 int next_parm_info_bit;
3279 next_parm_info_bit = 31;
3284 for (decl = DECL_ARGUMENTS (current_function_decl);
3285 decl; decl = TREE_CHAIN (decl))
3287 rtx parameter = DECL_INCOMING_RTL (decl);
3288 enum machine_mode mode = GET_MODE (parameter);
3290 if (GET_CODE (parameter) == REG)
3292 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3300 else if (mode == DFmode)
3305 /* If only one bit will fit, don't or in this entry. */
3306 if (next_parm_info_bit > 0)
3307 parm_info |= (bits << (next_parm_info_bit - 1));
3308 next_parm_info_bit -= 2;
3312 fixed_parms += ((GET_MODE_SIZE (mode)
3313 + (UNITS_PER_WORD - 1))
3315 next_parm_info_bit -= 1;
3321 /* Number of fixed point parameters. */
3322 /* This is actually the number of words of fixed point parameters; thus
3323 an 8 byte struct counts as 2; and thus the maximum value is 8. */
3324 fprintf (file, "%d,", fixed_parms);
3326 /* 2 bitfields: number of floating point parameters (7 bits), parameters
3328 /* This is actually the number of fp registers that hold parameters;
3329 and thus the maximum value is 13. */
3330 /* Set parameters on stack bit if parameters are not in their original
3331 registers, regardless of whether they are on the stack? Xlc
3332 seems to set the bit when not optimizing. */
3333 fprintf (file, "%d\n", ((float_parms << 1) | (! optimize)));
3335 /* Optional fields follow. Some are variable length. */
3337 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
3339 /* There is an entry for each parameter in a register, in the order that
3340 they occur in the parameter list. Any intervening arguments on the
3341 stack are ignored. If the list overflows a long (max possible length
3342 34 bits) then completely leave off all elements that don't fit. */
3343 /* Only emit this long if there was at least one parameter. */
3344 if (fixed_parms || float_parms)
3345 fprintf (file, "\t.long %d\n", parm_info);
3347 /* Offset from start of code to tb table. */
3348 fputs ("\t.long ", file);
3349 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3350 RS6000_OUTPUT_BASENAME (file, fname);
3352 RS6000_OUTPUT_BASENAME (file, fname);
3355 /* Interrupt handler mask. */
3356 /* Omit this long, since we never set the interrupt handler bit
3359 /* Number of CTL (controlled storage) anchors. */
3360 /* Omit this long, since the has_ctl bit is never set above. */
3362 /* Displacement into stack of each CTL anchor. */
3363 /* Omit this list of longs, because there are no CTL anchors. */
3365 /* Length of function name. */
3366 fprintf (file, "\t.short %d\n", strlen (fname));
3368 /* Function name. */
3369 assemble_string (fname, strlen (fname));
3371 /* Register for alloca automatic storage; this is always reg 31.
3372 Only emit this if the alloca bit was set above. */
3373 if (frame_pointer_needed)
3374 fputs ("\t.byte 31\n", file);
3377 /* Reset varargs and save TOC indicator */
3378 rs6000_sysv_varargs_p = 0;
3379 rs6000_save_toc_p = 0;
3381 if (DEFAULT_ABI == ABI_NT)
3383 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3384 fputs (".e:\nFE_MOT_RESVD..", file);
3385 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3386 fputs (":\n", file);
3390 /* Output a TOC entry. We derive the entry name from what is
3394 output_toc (file, x, labelno)
3408 /* if we're going to put a double constant in the TOC, make sure it's
3409 aligned properly when strict alignment is on. */
3410 if (GET_CODE (x) == CONST_DOUBLE
3412 && GET_MODE (x) == DFmode
3413 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) {
3414 ASM_OUTPUT_ALIGN (file, 3);
3418 if (TARGET_ELF && TARGET_MINIMAL_TOC)
3420 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC");
3421 fprintf (file, "%d = .-", labelno);
3422 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC");
3423 fputs ("1\n", file);
3426 ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno);
3428 /* Handle FP constants specially. Note that if we have a minimal
3429 TOC, things we put here aren't actually in the TOC, so we can allow
3431 if (GET_CODE (x) == CONST_DOUBLE
3432 && GET_MODE (x) == DFmode
3433 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3438 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
3439 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3440 if (TARGET_MINIMAL_TOC)
3441 fprintf (file, "\t.long %ld\n\t.long %ld\n", l[0], l[1]);
3443 fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
3444 l[0], l[1], l[0], l[1]);
3447 else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode
3448 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3450 rtx val = operand_subword (x, 0, 0, SFmode);
3452 if (val == 0 || GET_CODE (val) != CONST_INT)
3455 if (TARGET_MINIMAL_TOC)
3456 fprintf (file, "\t.long %d\n", INTVAL (val));
3458 fprintf (file, "\t.tc FS_%x[TC],%d\n", INTVAL (val), INTVAL (val));
3462 if (GET_CODE (x) == CONST)
3464 base = XEXP (XEXP (x, 0), 0);
3465 offset = INTVAL (XEXP (XEXP (x, 0), 1));
3468 if (GET_CODE (base) == SYMBOL_REF)
3469 name = XSTR (base, 0);
3470 else if (GET_CODE (base) == LABEL_REF)
3471 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0)));
3472 else if (GET_CODE (base) == CODE_LABEL)
3473 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base));
3477 if (TARGET_MINIMAL_TOC)
3478 fputs ("\t.long ", file);
3481 STRIP_NAME_ENCODING (real_name, name);
3482 fprintf (file, "\t.tc %s", real_name);
3485 fprintf (file, ".N%d", - offset);
3487 fprintf (file, ".P%d", offset);
3489 fputs ("[TC],", file);
3491 output_addr_const (file, x);
3495 /* Output an assembler pseudo-op to write an ASCII string of N characters
3496 starting at P to FILE.
3498 On the RS/6000, we have to do this using the .byte operation and
3499 write out special characters outside the quoted string.
3500 Also, the assembler is broken; very long strings are truncated,
3501 so we must artificially break them up early. */
3504 output_ascii (file, p, n)
3510 int i, count_string;
3511 char *for_string = "\t.byte \"";
3512 char *for_decimal = "\t.byte ";
3513 char *to_close = NULL;
3516 for (i = 0; i < n; i++)
3519 if (c >= ' ' && c < 0177)
3522 fputs (for_string, file);
3525 /* Write two quotes to get one. */
3533 for_decimal = "\"\n\t.byte ";
3537 if (count_string >= 512)
3539 fputs (to_close, file);
3541 for_string = "\t.byte \"";
3542 for_decimal = "\t.byte ";
3550 fputs (for_decimal, file);
3551 fprintf (file, "%d", c);
3553 for_string = "\n\t.byte \"";
3560 /* Now close the string if we have written one. Then end the line. */
3562 fprintf (file, to_close);
3565 /* Generate a unique section name for FILENAME for a section type
3566 represented by SECTION_DESC. Output goes into BUF.
3568 SECTION_DESC can be any string, as long as it is different for each
3569 possible section type.
3571 We name the section in the same manner as xlc. The name begins with an
3572 underscore followed by the filename (after stripping any leading directory
3573 names) with the last period replaced by the string SECTION_DESC. If
3574 FILENAME does not contain a period, SECTION_DESC is appended to the end of
3578 rs6000_gen_section_name (buf, filename, section_desc)
3583 char *q, *after_last_slash, *last_period;
3587 after_last_slash = filename;
3588 for (q = filename; *q; q++)
3591 after_last_slash = q + 1;
3596 len = strlen (after_last_slash) + strlen (section_desc) + 2;
3597 *buf = (char *) permalloc (len);
3602 for (q = after_last_slash; *q; q++)
3604 if (q == last_period)
3606 strcpy (p, section_desc);
3607 p += strlen (section_desc);
3610 else if (isalnum (*q))
3614 if (last_period == 0)
3615 strcpy (p, section_desc);
3620 /* Write function profiler code. */
3623 output_function_profiler (file, labelno)
3627 /* The last used parameter register. */
3632 if (DEFAULT_ABI != ABI_AIX)
3635 /* Set up a TOC entry for the profiler label. */
3637 ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno);
3638 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno);
3639 if (TARGET_MINIMAL_TOC)
3641 fputs ("\t.long ", file);
3642 assemble_name (file, buf);
3647 fputs ("\t.tc\t", file);
3648 assemble_name (file, buf);
3649 fputs ("[TC],", file);
3650 assemble_name (file, buf);
3655 /* Figure out last used parameter register. The proper thing to do is
3656 to walk incoming args of the function. A function might have live
3657 parameter registers even if it has no incoming args. */
3659 for (last_parm_reg = 10;
3660 last_parm_reg > 2 && ! regs_ever_live [last_parm_reg];
3664 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
3665 it might be set up as the frame pointer. */
3667 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
3668 asm_fprintf (file, "\tmr %d,%d\n", j, i);
3670 /* Load location address into r3, and call mcount. */
3672 ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno);
3673 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[3]);
3674 assemble_name (file, buf);
3675 asm_fprintf (file, "(%s)\n\tbl .mcount\n", reg_names[2]);
3677 /* Restore parameter registers. */
3679 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
3680 asm_fprintf (file, "\tmr %d,%d\n", i, j);
3683 /* Adjust the cost of a scheduling dependency. Return the new cost of
3684 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
3687 rs6000_adjust_cost (insn, link, dep_insn, cost)
3693 if (! recog_memoized (insn))
3696 if (REG_NOTE_KIND (link) != 0)
3699 if (REG_NOTE_KIND (link) == 0)
3701 /* Data dependency; DEP_INSN writes a register that INSN reads some
3704 /* Tell the first scheduling pass about the latency between a mtctr
3705 and bctr (and mtlr and br/blr). The first scheduling pass will not
3706 know about this latency since the mtctr instruction, which has the
3707 latency associated to it, will be generated by reload. */
3708 if (get_attr_type (insn) == TYPE_JMPREG)
3709 return TARGET_POWER ? 5 : 4;
3711 /* Fall out to return default cost. */
3717 /* Return how many instructions the machine can issue per cycle */
3718 int get_issue_rate()
3720 switch (rs6000_cpu_attr) {
3741 /* Output insns to flush the {data|instruction} caches after building a
3745 rs6000_sync_trampoline (addr)
3748 enum machine_mode pmode = Pmode;
3749 rtx reg = gen_reg_rtx (pmode);
3752 int size = rs6000_trampoline_size ();
3753 rtx (*sub_fcn) PROTO ((rtx, rtx, rtx));
3754 rtx (*cmp_fcn) PROTO ((rtx, rtx));
3759 abort (); /* no cmpdi function yet */
3763 sub_fcn = gen_subsi3;
3764 cmp_fcn = gen_cmpsi;
3767 addr = force_reg (pmode, addr);
3768 mem2 = gen_rtx (MEM, pmode, gen_rtx (PLUS, pmode, addr, reg));
3769 mem1 = gen_rtx (MEM, pmode, addr);
3771 /* Issue a loop of dcbst's to flush the data cache */
3772 emit_move_insn (reg, GEN_INT (size-4));
3773 label = gen_label_rtx ();
3775 emit_insn (gen_dcbst (mem2, addr, reg));
3776 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
3777 emit_insn ((*cmp_fcn) (reg, const0_rtx));
3778 emit_jump_insn (gen_bgt (label));
3780 /* Issue a sync after the dcbst's to let things settle down */
3781 emit_insn (gen_sync (mem1));
3783 /* Issue a loop of icbi's to flush the instruction cache */
3784 emit_move_insn (reg, GEN_INT (size-4));
3785 label = gen_label_rtx ();
3787 emit_insn (gen_icbi (mem2, addr, reg));
3788 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
3789 emit_insn ((*cmp_fcn) (reg, const0_rtx));
3790 emit_jump_insn (gen_bgt (label));
3792 /* Issue a sync after the icbi's to let things settle down */
3793 emit_insn (gen_sync (mem1));
3795 /* Finally issue an isync to synchronize the icache */
3796 emit_insn (gen_isync (mem1));
3800 /* Output assembler code for a block containing the constant parts
3801 of a trampoline, leaving space for the variable parts.
3803 The trampoline should set the static chain pointer to value placed
3804 into the trampoline and should branch to the specified routine. */
3807 rs6000_trampoline_template (file)
3810 char *sc = reg_names[STATIC_CHAIN_REGNUM];
3811 char *r0 = reg_names[0];
3813 switch (DEFAULT_ABI)
3818 /* Under AIX, this is not code at all, but merely a data area,
3819 since that is the way all functions are called. The first word is
3820 the address of the function, the second word is the TOC pointer (r2),
3821 and the third word is the static chain value. */
3823 fprintf (file, "\t.long %s\n", (TARGET_64BIT) ? "0,0,0,0,0,0" : "0,0,0");
3827 /* V.4/eabi function pointers are just a single pointer, so we need to
3828 do the full gory code to load up the static chain. */
3830 case ABI_AIX_NODESC:
3831 if (STATIC_CHAIN_REGNUM == 0 || !TARGET_NEW_MNEMONICS)
3836 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
3837 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
3838 fprintf (file, "\t.long 0,0,0,0\n"); /* offset 8 */
3839 fprintf (file, ".LTRAMP1:\n");
3840 fprintf (file, "\tmflr %s\n", sc); /* offset 28 */
3841 fprintf (file, "\tmtlr %s\n", r0); /* offset 32 */
3842 fprintf (file, "\tld %s,0(%s)\n", r0, sc); /* offset 36 */
3843 fprintf (file, "\tld %s,8(%s)\n", sc, sc); /* offset 40 */
3844 fprintf (file, "\tmtctr %s\n", r0); /* offset 44 */
3845 fprintf (file, "\tbctr\n"); /* offset 48 */
3849 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
3850 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
3851 fprintf (file, "\t.long 0,0\n"); /* offset 8 */
3852 fprintf (file, ".LTRAMP1:\n");
3853 fprintf (file, "\tmflr %s\n", sc); /* offset 20 */
3854 fprintf (file, "\tmtlr %s\n", r0); /* offset 24 */
3855 fprintf (file, "\tlwz %s,0(%s)\n", r0, sc); /* offset 28 */
3856 fprintf (file, "\tlwz %s,4(%s)\n", sc, sc); /* offset 32 */
3857 fprintf (file, "\tmtctr %s\n", r0); /* offset 36 */
3858 fprintf (file, "\tbctr\n"); /* offset 40 */
3862 /* NT function pointers point to a two word area (real address, TOC)
3863 which unfortunately does not include a static chain field. So we
3864 need to have a 2 word area followed by the code to load up the
3867 if (STATIC_CHAIN_REGNUM == 0 || !TARGET_NEW_MNEMONICS || TARGET_64BIT)
3870 fprintf (file, "\t.ualong 0,0\n"); /* offset 0 */
3871 fprintf (file, "\tmflr %s\n", r0); /* offset 8 */
3872 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 12 */
3873 fprintf (file, "\t.ualong 0,0\n"); /* offset 16 */
3874 fprintf (file, ".LTRAMP1:\n");
3875 fprintf (file, "\tmflr %s\n", sc); /* offset 28 */
3876 fprintf (file, "\tmtlr %s\n", r0); /* offset 32 */
3877 fprintf (file, "\tlwz %s,0(%s)\n", r0, sc); /* offset 36 */
3878 fprintf (file, "\tlwz %s,4(%s)\n", sc, sc); /* offset 40 */
3879 fprintf (file, "\tmtctr %s\n", r0); /* offset 44 */
3880 fprintf (file, "\tbctr\n"); /* offset 48 */
3887 /* Length in units of the trampoline for entering a nested function. */
3890 rs6000_trampoline_size ()
3894 switch (DEFAULT_ABI)
3900 ret = (TARGET_64BIT) ? 24 : 12;
3904 case ABI_AIX_NODESC:
3905 ret = (TARGET_64BIT ? 48 : 40);
3916 /* Emit RTL insns to initialize the variable parts of a trampoline.
3917 FNADDR is an RTX for the address of the function's pure code.
3918 CXT is an RTX for the static chain value for the function. */
3921 rs6000_initialize_trampoline (addr, fnaddr, cxt)
3926 rtx reg, reg2, reg3;
3928 switch (DEFAULT_ABI)
3933 /* Under AIX, just build the 3 word function descriptor */
3935 emit_move_insn (gen_rtx (MEM, SImode,
3936 memory_address (SImode, (addr))),
3937 gen_rtx (MEM, SImode,
3938 memory_address (SImode, (fnaddr))));
3939 emit_move_insn (gen_rtx (MEM, SImode,
3940 memory_address (SImode,
3941 plus_constant ((addr), 4))),
3942 gen_rtx (MEM, SImode,
3943 memory_address (SImode,
3944 plus_constant ((fnaddr), 4))));
3945 emit_move_insn (gen_rtx (MEM, SImode,
3946 memory_address (SImode,
3947 plus_constant ((addr), 8))),
3948 force_reg (SImode, (cxt)));
3951 /* Under V.4/eabi, update the two words after the bl to have the real
3952 function address and the static chain. */
3954 case ABI_AIX_NODESC:
3955 reg = gen_reg_rtx (Pmode);
3957 emit_move_insn (reg, fnaddr);
3958 emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (addr, 8)), reg);
3959 emit_move_insn (gen_rtx (MEM, Pmode,
3960 plus_constant (addr, (TARGET_64BIT ? 16 : 12))),
3963 rs6000_sync_trampoline (addr);
3966 /* Under NT, update the first 2 words to look like a normal descriptor, and
3967 then fill in the fields with the function address and static chain after
3968 the bl instruction. */
3970 reg = gen_reg_rtx (Pmode);
3971 reg2 = gen_reg_rtx (Pmode);
3972 reg3 = gen_reg_rtx (Pmode);
3974 emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (addr, 4)),
3975 gen_rtx (REG, Pmode, 2));
3976 emit_move_insn (reg, fnaddr);
3977 emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg));
3978 emit_move_insn (reg3, plus_constant (addr, 8));
3979 emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (addr, 16)), reg);
3980 emit_move_insn (gen_rtx (MEM, Pmode, addr), reg3);
3981 emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (addr, 20)), cxt);
3982 rs6000_sync_trampoline (addr);