1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
40 #ifndef TARGET_NO_PROTOTYPE
41 #define TARGET_NO_PROTOTYPE 0
44 extern char *language_string;
45 extern int profile_block_flag;
47 #define min(A,B) ((A) < (B) ? (A) : (B))
48 #define max(A,B) ((A) > (B) ? (A) : (B))
52 enum processor_type rs6000_cpu;
53 struct rs6000_cpu_select rs6000_select[3] =
55 /* switch name, tune arch */
56 { (char *)0, "--with-cpu=", 1, 1 },
57 { (char *)0, "-mcpu=", 1, 1 },
58 { (char *)0, "-mtune=", 1, 0 },
61 /* Set to non-zero by "fix" operation to indicate that itrunc and
62 uitrunc must be defined. */
64 int rs6000_trunc_used;
66 /* Set to non-zero once they have been defined. */
68 static int trunc_defined;
70 /* Set to non-zero once AIX common-mode calls have been defined. */
71 static int common_mode_defined;
72 /* Save information from a "cmpxx" operation until the branch or scc is
75 rtx rs6000_compare_op0, rs6000_compare_op1;
76 int rs6000_compare_fp_p;
79 /* Label number of label created for -mrelocatable, to call to so we can
80 get the address of the GOT section */
81 int rs6000_pic_labelno;
84 /* Whether a System V.4 varargs area was created. */
85 int rs6000_sysv_varargs_p;
87 /* Whether we need to save the TOC register. */
88 int rs6000_save_toc_p;
90 /* ABI enumeration available for subtarget to use. */
91 enum rs6000_abi rs6000_current_abi;
93 /* Temporary memory used to convert integer -> float */
94 static rtx stack_temps[NUM_MACHINE_MODES];
97 /* Print the options used in the assembly file. */
99 extern char *version_string, *language_string;
111 output_option (file, type, name, pos)
117 int type_len = strlen (type);
118 int name_len = strlen (name);
120 if (1 + type_len + name_len + pos > MAX_LINE)
122 fprintf (file, "\n # %s%s", type, name);
123 return 3 + type_len + name_len;
125 fprintf (file, " %s%s", type, name);
126 return pos + 1 + type_len + name_len;
129 static struct { char *name; int value; } m_options[] = TARGET_SWITCHES;
132 output_options (file, f_options, f_len, W_options, W_len)
134 struct asm_option *f_options;
136 struct asm_option *W_options;
140 int flags = target_flags;
143 fprintf (file, " # %s %s", language_string, version_string);
148 sprintf (opt_string, "%d", optimize);
149 pos = output_option (file, "-O", opt_string, pos);
153 pos = output_option (file, "-p", "", pos);
155 if (profile_block_flag)
156 pos = output_option (file, "-a", "", pos);
158 if (inhibit_warnings)
159 pos = output_option (file, "-w", "", pos);
161 for (j = 0; j < f_len; j++)
163 if (*f_options[j].variable == f_options[j].on_value)
164 pos = output_option (file, "-f", f_options[j].string, pos);
167 for (j = 0; j < W_len; j++)
169 if (*W_options[j].variable == W_options[j].on_value)
170 pos = output_option (file, "-W", W_options[j].string, pos);
173 for (j = 0; j < sizeof m_options / sizeof m_options[0]; j++)
175 if (m_options[j].name[0] != '\0'
176 && m_options[j].value > 0
177 && ((m_options[j].value & flags) == m_options[j].value))
179 pos = output_option (file, "-m", m_options[j].name, pos);
180 flags &= ~ m_options[j].value;
184 for (j = 0; j < sizeof (rs6000_select) / sizeof(rs6000_select[0]); j++)
185 if (rs6000_select[j].string != (char *)0)
186 pos = output_option (file, rs6000_select[j].name, rs6000_select[j].string, pos);
188 fputs ("\n\n", file);
192 /* Override command line options. Mostly we process the processor
193 type and sometimes adjust other TARGET_ options. */
196 rs6000_override_options (default_cpu)
200 struct rs6000_cpu_select *ptr;
202 /* Simplify the entries below by making a mask for any POWER
203 variant and any PowerPC variant. */
205 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
206 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
207 | MASK_PPC_GFXOPT | MASK_POWERPC64)
208 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
212 char *name; /* Canonical processor name. */
213 enum processor_type processor; /* Processor type enum value. */
214 int target_enable; /* Target flags to enable. */
215 int target_disable; /* Target flags to disable. */
216 } processor_target_table[]
217 = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS,
218 POWER_MASKS | POWERPC_MASKS},
219 {"power", PROCESSOR_POWER,
220 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
221 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
222 {"power2", PROCESSOR_POWER,
223 MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING,
224 POWERPC_MASKS | MASK_NEW_MNEMONICS},
225 {"powerpc", PROCESSOR_POWERPC,
226 MASK_POWERPC | MASK_NEW_MNEMONICS,
227 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
228 {"rios", PROCESSOR_RIOS1,
229 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
230 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
231 {"rios1", PROCESSOR_RIOS1,
232 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
233 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
234 {"rsc", PROCESSOR_PPC601,
235 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
236 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
237 {"rsc1", PROCESSOR_PPC601,
238 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
239 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
240 {"rios2", PROCESSOR_RIOS2,
241 MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2,
242 POWERPC_MASKS | MASK_NEW_MNEMONICS},
243 {"403", PROCESSOR_PPC403,
244 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
245 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
246 {"505", PROCESSOR_MPCCORE,
247 MASK_POWERPC | MASK_NEW_MNEMONICS,
248 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
249 {"601", PROCESSOR_PPC601,
250 MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING,
251 MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
252 {"602", PROCESSOR_PPC603,
253 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
254 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
255 {"603", PROCESSOR_PPC603,
256 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
257 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
258 {"603e", PROCESSOR_PPC603,
259 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
260 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
261 {"604", PROCESSOR_PPC604,
262 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
263 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
264 {"620", PROCESSOR_PPC620,
265 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
266 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
267 {"821", PROCESSOR_MPCCORE,
268 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
269 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
270 {"860", PROCESSOR_MPCCORE,
271 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
272 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}};
274 int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt);
276 int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */
277 int string = TARGET_STRING; /* save current -mstring/-mno-string status */
279 profile_block_flag = 0;
281 /* Identify the processor type */
282 rs6000_select[0].string = default_cpu;
283 rs6000_cpu = PROCESSOR_DEFAULT;
285 for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++)
287 ptr = &rs6000_select[i];
288 if (ptr->string != (char *)0 && ptr->string[0] != '\0')
290 for (j = 0; j < ptt_size; j++)
291 if (! strcmp (ptr->string, processor_target_table[j].name))
294 rs6000_cpu = processor_target_table[j].processor;
298 target_flags |= processor_target_table[j].target_enable;
299 target_flags &= ~processor_target_table[j].target_disable;
305 error ("bad value (%s) for %s switch", ptr->string, ptr->name);
309 /* If -mmultiple or -mno-multiple was explicitly used, don't
310 override with the processor default */
311 if (TARGET_MULTIPLE_SET)
312 target_flags = (target_flags & ~MASK_MULTIPLE) | multiple;
314 /* If -mstring or -mno-string was explicitly used, don't
315 override with the processor default */
316 if (TARGET_STRING_SET)
317 target_flags = (target_flags & ~MASK_STRING) | string;
319 /* Don't allow -mmultiple or -mstring on little endian systems, because the
320 hardware doesn't support the instructions used in little endian mode */
321 if (!BYTES_BIG_ENDIAN)
325 target_flags &= ~MASK_MULTIPLE;
326 if (TARGET_MULTIPLE_SET)
327 warning ("-mmultiple is not supported on little endian systems");
332 target_flags &= ~MASK_STRING;
333 if (TARGET_STRING_SET)
334 warning ("-mstring is not supported on little endian systems");
338 #ifdef SUBTARGET_OVERRIDE_OPTIONS
339 SUBTARGET_OVERRIDE_OPTIONS;
343 /* Create a CONST_DOUBLE from a string. */
346 rs6000_float_const (string, mode)
348 enum machine_mode mode;
350 REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode);
351 return immed_real_const_1 (value, mode);
355 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
356 two parts of the constant if the target is little endian. */
359 rs6000_immed_double_const (i0, i1, mode)
360 HOST_WIDE_INT i0, i1;
361 enum machine_mode mode;
363 if (! WORDS_BIG_ENDIAN)
364 return immed_double_const (i1, i0, mode);
366 return immed_double_const (i0, i1, mode);
370 /* Return non-zero if this function is known to have a null epilogue. */
375 if (reload_completed)
377 rs6000_stack_t *info = rs6000_stack_info ();
379 if (info->first_gp_reg_save == 32
380 && info->first_fp_reg_save == 64
390 /* Returns 1 always. */
393 any_operand (op, mode)
395 enum machine_mode mode;
400 /* Returns 1 if op is the count register */
401 int count_register_operand(op, mode)
403 enum machine_mode mode;
405 if (GET_CODE (op) != REG)
408 if (REGNO (op) == COUNT_REGISTER_REGNUM)
411 if (REGNO (op) > FIRST_PSEUDO_REGISTER)
417 /* Return 1 if OP is a constant that can fit in a D field. */
420 short_cint_operand (op, mode)
422 enum machine_mode mode;
424 return (GET_CODE (op) == CONST_INT
425 && (unsigned) (INTVAL (op) + 0x8000) < 0x10000);
428 /* Similar for a unsigned D field. */
431 u_short_cint_operand (op, mode)
433 enum machine_mode mode;
435 return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0);
438 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
441 non_short_cint_operand (op, mode)
443 enum machine_mode mode;
445 return (GET_CODE (op) == CONST_INT
446 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000);
449 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
453 gpc_reg_operand (op, mode)
455 enum machine_mode mode;
457 return (register_operand (op, mode)
458 && (GET_CODE (op) != REG || REGNO (op) >= 67 || REGNO (op) < 64));
461 /* Returns 1 if OP is either a pseudo-register or a register denoting a
465 cc_reg_operand (op, mode)
467 enum machine_mode mode;
469 return (register_operand (op, mode)
470 && (GET_CODE (op) != REG
471 || REGNO (op) >= FIRST_PSEUDO_REGISTER
472 || CR_REGNO_P (REGNO (op))));
475 /* Returns 1 if OP is either a constant integer valid for a D-field or a
476 non-special register. If a register, it must be in the proper mode unless
480 reg_or_short_operand (op, mode)
482 enum machine_mode mode;
484 return short_cint_operand (op, mode) || gpc_reg_operand (op, mode);
487 /* Similar, except check if the negation of the constant would be valid for
491 reg_or_neg_short_operand (op, mode)
493 enum machine_mode mode;
495 if (GET_CODE (op) == CONST_INT)
496 return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
498 return gpc_reg_operand (op, mode);
501 /* Return 1 if the operand is either a register or an integer whose high-order
505 reg_or_u_short_operand (op, mode)
507 enum machine_mode mode;
509 if (GET_CODE (op) == CONST_INT
510 && (INTVAL (op) & 0xffff0000) == 0)
513 return gpc_reg_operand (op, mode);
516 /* Return 1 is the operand is either a non-special register or ANY
520 reg_or_cint_operand (op, mode)
522 enum machine_mode mode;
524 return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
527 /* Return the number of instructions it takes to form a constant in an
531 num_insns_constant_wide (value)
534 /* signed constant loadable with {cal|addi} */
535 if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000)
538 #if HOST_BITS_PER_WIDE_INT == 32
539 /* constant loadable with {cau|addis} */
540 else if ((value & 0xffff) == 0)
544 /* constant loadable with {cau|addis} */
545 else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0)
548 else if (TARGET_64BIT)
550 HOST_WIDE_INT low = value & 0xffffffff;
551 HOST_WIDE_INT high = value >> 32;
553 if (high == 0 && (low & 0x80000000) == 0)
556 else if (high == 0xffffffff && (low & 0x80000000) != 0)
560 return num_insns_constant_wide (high) + 1;
563 return (num_insns_constant_wide (high)
564 + num_insns_constant_low (low) + 1);
573 num_insns_constant (op, mode)
575 enum machine_mode mode;
577 if (mode != SImode && mode != DImode)
580 if (GET_CODE (op) == CONST_INT)
581 return num_insns_constant_wide (INTVAL (op));
583 else if (GET_CODE (op) == CONST_DOUBLE && TARGET_32BIT)
584 return (num_insns_constant_wide (CONST_DOUBLE_LOW (op))
585 + num_insns_constant_wide (CONST_DOUBLE_HIGH (op)));
587 else if (GET_CODE (op) == CONST_DOUBLE && TARGET_64BIT)
589 HOST_WIDE_INT low = CONST_DOUBLE_LOW (op);
590 HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op);
592 if (high == 0 && (low & 0x80000000) == 0)
593 return num_insns_constant_wide (low);
595 else if (((high & 0xffffffff) == 0xffffffff)
596 && ((low & 0x80000000) != 0))
597 return num_insns_constant_wide (low);
600 return num_insns_constant_wide (high) + 1;
603 return (num_insns_constant_wide (high)
604 + num_insns_constant_wide (low) + 1);
611 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
612 with one instruction per word. We only do this if we can safely read
613 CONST_DOUBLE_{LOW,HIGH}. */
616 easy_fp_constant (op, mode)
618 register enum machine_mode mode;
620 if (GET_CODE (op) != CONST_DOUBLE
621 || GET_MODE (op) != mode
622 || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode))
625 /* Consider all constants with -msoft-float to be easy */
626 if (TARGET_SOFT_FLOAT && mode != DImode)
634 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
635 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
637 return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1
638 && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1);
641 else if (mode == SFmode)
646 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
647 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
649 return num_insns_constant_wide (l) == 1;
652 else if (mode == DImode && TARGET_32BIT)
653 return num_insns_constant (op, DImode) == 2;
659 /* Return 1 if the operand is in volatile memory. Note that during the
660 RTL generation phase, memory_operand does not return TRUE for
661 volatile memory references. So this function allows us to
662 recognize volatile references where its safe. */
665 volatile_mem_operand (op, mode)
667 enum machine_mode mode;
669 if (GET_CODE (op) != MEM)
672 if (!MEM_VOLATILE_P (op))
675 if (mode != GET_MODE (op))
678 if (reload_completed)
679 return memory_operand (op, mode);
681 if (reload_in_progress)
682 return strict_memory_address_p (mode, XEXP (op, 0));
684 return memory_address_p (mode, XEXP (op, 0));
687 /* Return 1 if the operand is an offsettable memory address. */
690 offsettable_addr_operand (op, mode)
692 enum machine_mode mode;
694 return offsettable_address_p (reload_completed | reload_in_progress,
698 /* Return 1 if the operand is either a floating-point register, a pseudo
699 register, or memory. */
702 fp_reg_or_mem_operand (op, mode)
704 enum machine_mode mode;
706 return (memory_operand (op, mode)
707 || volatile_mem_operand (op, mode)
708 || (register_operand (op, mode)
709 && (GET_CODE (op) != REG
710 || REGNO (op) >= FIRST_PSEUDO_REGISTER
711 || FP_REGNO_P (REGNO (op)))));
714 /* Return 1 if the operand is either an easy FP constant (see above) or
718 mem_or_easy_const_operand (op, mode)
720 enum machine_mode mode;
722 return memory_operand (op, mode) || easy_fp_constant (op, mode);
725 /* Return 1 if the operand is either a non-special register or an item
726 that can be used as the operand of an SI add insn. */
729 add_operand (op, mode)
731 enum machine_mode mode;
733 return (reg_or_short_operand (op, mode)
734 || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0));
737 /* Return 1 if OP is a constant but not a valid add_operand. */
740 non_add_cint_operand (op, mode)
742 enum machine_mode mode;
744 return (GET_CODE (op) == CONST_INT
745 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000
746 && (INTVAL (op) & 0xffff) != 0);
749 /* Return 1 if the operand is a non-special register or a constant that
750 can be used as the operand of an OR or XOR insn on the RS/6000. */
753 logical_operand (op, mode)
755 enum machine_mode mode;
757 return (gpc_reg_operand (op, mode)
758 || (GET_CODE (op) == CONST_INT
759 && ((INTVAL (op) & 0xffff0000) == 0
760 || (INTVAL (op) & 0xffff) == 0)));
763 /* Return 1 if C is a constant that is not a logical operand (as
767 non_logical_cint_operand (op, mode)
769 enum machine_mode mode;
771 return (GET_CODE (op) == CONST_INT
772 && (INTVAL (op) & 0xffff0000) != 0
773 && (INTVAL (op) & 0xffff) != 0);
776 /* Return 1 if C is a constant that can be encoded in a mask on the
777 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
778 Reject all ones and all zeros, since these should have been optimized
779 away and confuse the making of MB and ME. */
789 if (c == 0 || c == ~0)
792 last_bit_value = c & 1;
794 for (i = 1; i < 32; i++)
795 if (((c >>= 1) & 1) != last_bit_value)
796 last_bit_value ^= 1, transitions++;
798 return transitions <= 2;
801 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
804 mask_operand (op, mode)
806 enum machine_mode mode;
808 return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
811 /* Return 1 if the operand is either a non-special register or a
812 constant that can be used as the operand of an RS/6000 logical AND insn. */
815 and_operand (op, mode)
817 enum machine_mode mode;
819 return (reg_or_short_operand (op, mode)
820 || logical_operand (op, mode)
821 || mask_operand (op, mode));
824 /* Return 1 if the operand is a constant but not a valid operand for an AND
828 non_and_cint_operand (op, mode)
830 enum machine_mode mode;
832 return GET_CODE (op) == CONST_INT && ! and_operand (op, mode);
835 /* Return 1 if the operand is a general register or memory operand. */
838 reg_or_mem_operand (op, mode)
840 register enum machine_mode mode;
842 return (gpc_reg_operand (op, mode)
843 || memory_operand (op, mode)
844 || volatile_mem_operand (op, mode));
847 /* Return 1 if the operand is a general register or memory operand without
848 pre-inc or pre_dec which produces invalid form of PowerPC lwa
852 lwa_operand (op, mode)
854 register enum machine_mode mode;
858 if (reload_completed && GET_CODE (inner) == SUBREG)
859 inner = SUBREG_REG (inner);
861 return gpc_reg_operand (inner, mode)
862 || (memory_operand (inner, mode)
863 && GET_CODE (XEXP (inner, 0)) != PRE_INC
864 && GET_CODE (XEXP (inner, 0)) != PRE_DEC);
867 /* Return 1 if the operand, used inside a MEM, is a valid first argument
868 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
872 call_operand (op, mode)
874 enum machine_mode mode;
876 if (mode != VOIDmode && GET_MODE (op) != mode)
879 return (GET_CODE (op) == SYMBOL_REF
880 || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER));
884 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
888 current_file_function_operand (op, mode)
890 enum machine_mode mode;
892 return (GET_CODE (op) == SYMBOL_REF
893 && (SYMBOL_REF_FLAG (op)
894 || op == XEXP (DECL_RTL (current_function_decl), 0)));
898 /* Return 1 if this operand is a valid input for a move insn. */
901 input_operand (op, mode)
903 enum machine_mode mode;
905 /* Memory is always valid. */
906 if (memory_operand (op, mode))
909 /* For floating-point, easy constants are valid. */
910 if (GET_MODE_CLASS (mode) == MODE_FLOAT
912 && easy_fp_constant (op, mode))
915 /* Allow any integer constant. */
916 if (GET_MODE_CLASS (mode) == MODE_INT
917 && (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE))
920 /* For floating-point or multi-word mode, the only remaining valid type
922 if (GET_MODE_CLASS (mode) == MODE_FLOAT
923 || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
924 return register_operand (op, mode);
926 /* The only cases left are integral modes one word or smaller (we
927 do not get called for MODE_CC values). These can be in any
929 if (register_operand (op, mode))
932 /* A SYMBOL_REF referring to the TOC is valid. */
933 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op))
936 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
937 directly in the instruction stream */
938 if (DEFAULT_ABI == ABI_NT
939 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF))
942 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
944 if (DEFAULT_ABI == ABI_V4
945 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST)
946 && small_data_operand (op, Pmode))
952 /* Return 1 for an operand in small memory on V.4/eabi */
955 small_data_operand (op, mode)
957 enum machine_mode mode;
959 rtx sym_ref, const_part;
966 if (DEFAULT_ABI != ABI_V4)
969 if (GET_CODE (op) == SYMBOL_REF)
972 else if (GET_CODE (op) != CONST
973 || GET_CODE (XEXP (op, 0)) != PLUS
974 || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF
975 || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT)
979 sym_ref = XEXP (XEXP (op, 0), 0);
981 if (*XSTR (sym_ref, 0) != '@')
988 /* Initialize a variable CUM of type CUMULATIVE_ARGS
989 for a call to a function whose data type is FNTYPE.
990 For a library call, FNTYPE is 0.
992 For incoming args we set the number of arguments in the prototype large
993 so we never return an EXPR_LIST. */
996 init_cumulative_args (cum, fntype, libname, incoming)
997 CUMULATIVE_ARGS *cum;
1002 static CUMULATIVE_ARGS zero_cumulative;
1003 enum rs6000_abi abi = DEFAULT_ABI;
1005 *cum = zero_cumulative;
1007 cum->fregno = FP_ARG_MIN_REG;
1008 cum->prototype = (fntype && TYPE_ARG_TYPES (fntype));
1009 cum->call_cookie = CALL_NORMAL;
1013 cum->nargs_prototype = 1000; /* don't return an EXPR_LIST */
1015 cum->varargs_offset = RS6000_VARARGS_OFFSET;
1018 else if (cum->prototype)
1019 cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1
1020 + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode
1021 || RETURN_IN_MEMORY (TREE_TYPE (fntype))));
1024 cum->nargs_prototype = 0;
1026 cum->orig_nargs = cum->nargs_prototype;
1028 /* Check for DLL import functions */
1031 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype)))
1032 cum->call_cookie = CALL_NT_DLLIMPORT;
1034 /* Also check for longcall's */
1035 else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype)))
1036 cum->call_cookie = CALL_LONG;
1038 if (TARGET_DEBUG_ARG)
1040 fprintf (stderr, "\ninit_cumulative_args:");
1043 tree ret_type = TREE_TYPE (fntype);
1044 fprintf (stderr, " ret code = %s,",
1045 tree_code_name[ (int)TREE_CODE (ret_type) ]);
1048 if (abi == ABI_V4 && incoming)
1049 fprintf (stderr, " varargs = %d, ", cum->varargs_offset);
1051 if (cum->call_cookie & CALL_NT_DLLIMPORT)
1052 fprintf (stderr, " dllimport,");
1054 if (cum->call_cookie & CALL_LONG)
1055 fprintf (stderr, " longcall,");
1057 fprintf (stderr, " proto = %d, nargs = %d\n",
1058 cum->prototype, cum->nargs_prototype);
1062 /* If defined, a C expression that gives the alignment boundary, in bits,
1063 of an argument with the specified mode and type. If it is not defined,
1064 PARM_BOUNDARY is used for all arguments.
1066 Windows NT wants anything >= 8 bytes to be double word aligned.
1068 V.4 wants long longs to be double word aligned. */
1071 function_arg_boundary (mode, type)
1072 enum machine_mode mode;
1075 if (DEFAULT_ABI == ABI_V4 && mode == DImode)
1078 if (DEFAULT_ABI != ABI_NT || TARGET_64BIT)
1079 return PARM_BOUNDARY;
1081 if (mode != BLKmode)
1082 return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32;
1084 return (int_size_in_bytes (type) >= 8) ? 64 : 32;
1087 /* Update the data in CUM to advance over an argument
1088 of mode MODE and data type TYPE.
1089 (TYPE is null for libcalls where that information may not be available.) */
1092 function_arg_advance (cum, mode, type, named)
1093 CUMULATIVE_ARGS *cum;
1094 enum machine_mode mode;
1098 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1099 cum->words += align;
1100 cum->nargs_prototype--;
1102 if (DEFAULT_ABI == ABI_V4)
1104 /* Long longs must not be split between registers and stack */
1105 if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT)
1106 && type && !AGGREGATE_TYPE_P (type)
1107 && cum->words < GP_ARG_NUM_REG
1108 && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
1110 cum->words = GP_ARG_NUM_REG;
1113 /* Aggregates get passed as pointers */
1114 if (type && AGGREGATE_TYPE_P (type))
1117 /* Floats go in registers, & don't occupy space in the GP registers
1118 like they do for AIX unless software floating point. */
1119 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1120 && TARGET_HARD_FLOAT
1121 && cum->fregno <= FP_ARG_V4_MAX_REG)
1125 cum->words += RS6000_ARG_SIZE (mode, type, 1);
1130 cum->words += RS6000_ARG_SIZE (mode, type, named);
1131 if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT)
1135 if (TARGET_DEBUG_ARG)
1137 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1138 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
1141 /* Determine where to put an argument to a function.
1142 Value is zero to push the argument on the stack,
1143 or a hard register in which to store the argument.
1145 MODE is the argument's machine mode.
1146 TYPE is the data type of the argument (as a tree).
1147 This is null for libcalls where that information may
1149 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1150 the preceding args and about the function being called.
1151 NAMED is nonzero if this argument is a named parameter
1152 (otherwise it is an extra parameter matching an ellipsis).
1154 On RS/6000 the first eight words of non-FP are normally in registers
1155 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1156 Under V.4, the first 8 FP args are in registers.
1158 If this is floating-point and no prototype is specified, we use
1159 both an FP and integer register (or possibly FP reg and stack). Library
1160 functions (when TYPE is zero) always have the proper types for args,
1161 so we can pass the FP value just in one register. emit_library_function
1162 doesn't support EXPR_LIST anyway. */
1165 function_arg (cum, mode, type, named)
1166 CUMULATIVE_ARGS *cum;
1167 enum machine_mode mode;
1171 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1172 int align_words = cum->words + align;
1174 if (TARGET_DEBUG_ARG)
1176 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1177 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
1179 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1180 uses to say fp args were passed in registers. Assume that we don't need the
1181 marker for software floating point, or compiler generated library calls. */
1182 if (mode == VOIDmode)
1184 enum rs6000_abi abi = DEFAULT_ABI;
1187 && TARGET_HARD_FLOAT
1188 && cum->nargs_prototype < 0
1189 && type && (cum->prototype || TARGET_NO_PROTOTYPE))
1191 return GEN_INT (cum->call_cookie
1192 | ((cum->fregno == FP_ARG_MIN_REG)
1193 ? CALL_V4_SET_FP_ARGS
1194 : CALL_V4_CLEAR_FP_ARGS));
1197 return GEN_INT (cum->call_cookie);
1202 if (DEFAULT_ABI != ABI_V4)
1206 if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
1209 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1211 if ((cum->nargs_prototype > 0)
1212 || (DEFAULT_ABI == ABI_V4) /* V.4 never passes FP values in GP registers */
1214 return gen_rtx (REG, mode, cum->fregno);
1216 return gen_rtx (EXPR_LIST, VOIDmode,
1217 ((align_words < GP_ARG_NUM_REG)
1218 ? gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words)
1220 gen_rtx (REG, mode, cum->fregno));
1223 /* Long longs won't be split between register and stack */
1224 else if (DEFAULT_ABI == ABI_V4 &&
1225 align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
1230 else if (align_words < GP_ARG_NUM_REG)
1231 return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words);
1236 /* For an arg passed partly in registers and partly in memory,
1237 this is the number of registers used.
1238 For args passed entirely in registers or entirely in memory, zero. */
1241 function_arg_partial_nregs (cum, mode, type, named)
1242 CUMULATIVE_ARGS *cum;
1243 enum machine_mode mode;
1250 if (DEFAULT_ABI == ABI_V4)
1253 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1255 if (cum->nargs_prototype >= 0)
1259 if (cum->words < GP_ARG_NUM_REG
1260 && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named)))
1262 int ret = GP_ARG_NUM_REG - cum->words;
1263 if (ret && TARGET_DEBUG_ARG)
1264 fprintf (stderr, "function_arg_partial_nregs: %d\n", ret);
1272 /* A C expression that indicates when an argument must be passed by
1273 reference. If nonzero for an argument, a copy of that argument is
1274 made in memory and a pointer to the argument is passed instead of
1275 the argument itself. The pointer is passed in whatever way is
1276 appropriate for passing a pointer to that type.
1278 Under V.4, structures and unions are passed by reference. */
1281 function_arg_pass_by_reference (cum, mode, type, named)
1282 CUMULATIVE_ARGS *cum;
1283 enum machine_mode mode;
1287 if (DEFAULT_ABI == ABI_V4 && type && AGGREGATE_TYPE_P (type))
1289 if (TARGET_DEBUG_ARG)
1290 fprintf (stderr, "function_arg_pass_by_reference: aggregate\n");
1299 /* Perform any needed actions needed for a function that is receiving a
1300 variable number of arguments.
1304 MODE and TYPE are the mode and type of the current parameter.
1306 PRETEND_SIZE is a variable that should be set to the amount of stack
1307 that must be pushed by the prolog to pretend that our caller pushed
1310 Normally, this macro will push all remaining incoming registers on the
1311 stack and set PRETEND_SIZE to the length of the registers pushed. */
1314 setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
1315 CUMULATIVE_ARGS *cum;
1316 enum machine_mode mode;
1322 rtx save_area = virtual_incoming_args_rtx;
1323 int reg_size = (TARGET_64BIT) ? 8 : 4;
1325 if (TARGET_DEBUG_ARG)
1327 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1328 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl);
1330 if (DEFAULT_ABI == ABI_V4 && !no_rtl)
1332 rs6000_sysv_varargs_p = 1;
1333 save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET);
1338 int first_reg_offset = cum->words;
1340 if (MUST_PASS_IN_STACK (mode, type))
1341 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1);
1343 if (first_reg_offset > GP_ARG_NUM_REG)
1344 first_reg_offset = GP_ARG_NUM_REG;
1346 if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG)
1348 (GP_ARG_MIN_REG + first_reg_offset,
1349 gen_rtx (MEM, BLKmode,
1350 plus_constant (save_area, first_reg_offset * reg_size)),
1351 GP_ARG_NUM_REG - first_reg_offset,
1352 (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD);
1354 *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD;
1357 /* Save FP registers if needed. */
1358 if (DEFAULT_ABI == ABI_V4 && TARGET_HARD_FLOAT && !no_rtl)
1360 int fregno = cum->fregno;
1361 int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno;
1363 if (num_fp_reg >= 0)
1365 rtx cr1 = gen_rtx (REG, CCmode, 69);
1366 rtx lab = gen_label_rtx ();
1367 int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8);
1369 emit_jump_insn (gen_rtx (SET, VOIDmode,
1371 gen_rtx (IF_THEN_ELSE, VOIDmode,
1372 gen_rtx (NE, VOIDmode, cr1, const0_rtx),
1373 gen_rtx (LABEL_REF, VOIDmode, lab),
1376 while ( num_fp_reg-- >= 0)
1378 emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)),
1379 gen_rtx (REG, DFmode, fregno++));
1388 /* If defined, is a C expression that produces the machine-specific
1389 code for a call to `__builtin_saveregs'. This code will be moved
1390 to the very beginning of the function, before any parameter access
1391 are made. The return value of this function should be an RTX that
1392 contains the value to use as the return of `__builtin_saveregs'.
1394 The argument ARGS is a `tree_list' containing the arguments that
1395 were passed to `__builtin_saveregs'.
1397 If this macro is not defined, the compiler will output an ordinary
1398 call to the library function `__builtin_saveregs'.
1400 On the Power/PowerPC return the address of the area on the stack
1401 used to hold arguments. Under AIX, this includes the 8 word register
1402 save area. Under V.4 this does not. */
1405 expand_builtin_saveregs (args)
1408 return virtual_incoming_args_rtx;
1412 /* Allocate a stack temp. Only allocate one stack temp per type for a
1416 rs6000_stack_temp (mode, size)
1417 enum machine_mode mode;
1420 rtx temp = stack_temps[ (int)mode ];
1423 if (temp == NULL_RTX)
1425 temp = assign_stack_local (mode, size, 0);
1426 addr = XEXP (temp, 0);
1428 if ((size > 4 && !offsettable_address_p (0, mode, addr))
1429 || (size <= 4 && !memory_address_p (mode, addr)))
1431 XEXP (temp, 0) = copy_addr_to_reg (addr);
1434 stack_temps[ (int)mode ] = temp;
1441 /* Generate a memory reference for expand_block_move, copying volatile,
1442 and other bits from an original memory reference. */
1445 expand_block_move_mem (mode, addr, orig_mem)
1446 enum machine_mode mode;
1450 rtx mem = gen_rtx (MEM, mode, addr);
1452 RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem);
1453 MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem);
1454 MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem);
1455 #ifdef MEM_UNALIGNED_P
1456 MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem);
1461 /* Expand a block move operation, and return 1 if successful. Return 0
1462 if we should let the compiler generate normal code.
1464 operands[0] is the destination
1465 operands[1] is the source
1466 operands[2] is the length
1467 operands[3] is the alignment */
1469 #define MAX_MOVE_REG 4
1472 expand_block_move (operands)
1475 rtx orig_dest = operands[0];
1476 rtx orig_src = operands[1];
1477 rtx bytes_rtx = operands[2];
1478 rtx align_rtx = operands[3];
1479 int constp = (GET_CODE (bytes_rtx) == CONST_INT);
1480 int align = XINT (align_rtx, 0);
1490 rtx stores[MAX_MOVE_REG];
1493 /* If this is not a fixed size move, just call memcpy */
1497 /* Anything to move? */
1498 bytes = INTVAL (bytes_rtx);
1502 /* Don't support real large moves. If string instructions are not used,
1503 then don't generate more than 8 loads. */
1509 else if (!STRICT_ALIGNMENT)
1514 else if (bytes > 8*align)
1517 /* Move the address into scratch registers. */
1518 dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0));
1519 src_reg = copy_addr_to_reg (XEXP (orig_src, 0));
1521 if (TARGET_STRING) /* string instructions are available */
1523 for ( ; bytes > 0; bytes -= move_bytes)
1525 if (bytes > 24 /* move up to 32 bytes at a time */
1535 move_bytes = (bytes > 32) ? 32 : bytes;
1536 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1537 expand_block_move_mem (BLKmode, src_reg, orig_src),
1538 GEN_INT ((move_bytes == 32) ? 0 : move_bytes),
1541 else if (bytes > 16 /* move up to 24 bytes at a time */
1549 move_bytes = (bytes > 24) ? 24 : bytes;
1550 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1551 expand_block_move_mem (BLKmode, src_reg, orig_src),
1552 GEN_INT (move_bytes),
1555 else if (bytes > 8 /* move up to 16 bytes at a time */
1561 move_bytes = (bytes > 16) ? 16 : bytes;
1562 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1563 expand_block_move_mem (BLKmode, src_reg, orig_src),
1564 GEN_INT (move_bytes),
1567 else if (bytes > 4 && !TARGET_64BIT)
1568 { /* move up to 8 bytes at a time */
1569 move_bytes = (bytes > 8) ? 8 : bytes;
1570 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1571 expand_block_move_mem (BLKmode, src_reg, orig_src),
1572 GEN_INT (move_bytes),
1575 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1576 { /* move 4 bytes */
1578 tmp_reg = gen_reg_rtx (SImode);
1579 emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src));
1580 emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg);
1582 else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT))
1583 { /* move 2 bytes */
1585 tmp_reg = gen_reg_rtx (HImode);
1586 emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src));
1587 emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg);
1589 else if (bytes == 1) /* move 1 byte */
1592 tmp_reg = gen_reg_rtx (QImode);
1593 emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src));
1594 emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg);
1597 { /* move up to 4 bytes at a time */
1598 move_bytes = (bytes > 4) ? 4 : bytes;
1599 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1600 expand_block_move_mem (BLKmode, src_reg, orig_src),
1601 GEN_INT (move_bytes),
1605 if (bytes > move_bytes)
1607 emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes)));
1608 emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes)));
1613 else /* string instructions not available */
1615 num_reg = offset = 0;
1616 for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes))
1618 /* Calculate the correct offset for src/dest */
1622 dest_addr = dest_reg;
1626 src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset));
1627 dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset));
1630 /* Generate the appropriate load and store, saving the stores for later */
1631 if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT))
1634 tmp_reg = gen_reg_rtx (DImode);
1635 emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src)));
1636 stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg);
1638 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1641 tmp_reg = gen_reg_rtx (SImode);
1642 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src)));
1643 stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg);
1645 else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT))
1648 tmp_reg = gen_reg_rtx (HImode);
1649 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src)));
1650 stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg);
1655 tmp_reg = gen_reg_rtx (QImode);
1656 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src)));
1657 stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg);
1660 if (num_reg >= MAX_MOVE_REG)
1662 for (i = 0; i < num_reg; i++)
1663 emit_insn (stores[i]);
1668 for (i = 0; i < num_reg; i++)
1669 emit_insn (stores[i]);
1676 /* Return 1 if OP is a load multiple operation. It is known to be a
1677 PARALLEL and the first section will be tested. */
1680 load_multiple_operation (op, mode)
1682 enum machine_mode mode;
1684 int count = XVECLEN (op, 0);
1689 /* Perform a quick check so we don't blow up below. */
1691 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1692 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1693 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1696 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1697 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1699 for (i = 1; i < count; i++)
1701 rtx elt = XVECEXP (op, 0, i);
1703 if (GET_CODE (elt) != SET
1704 || GET_CODE (SET_DEST (elt)) != REG
1705 || GET_MODE (SET_DEST (elt)) != SImode
1706 || REGNO (SET_DEST (elt)) != dest_regno + i
1707 || GET_CODE (SET_SRC (elt)) != MEM
1708 || GET_MODE (SET_SRC (elt)) != SImode
1709 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1710 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1711 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1712 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
1719 /* Similar, but tests for store multiple. Here, the second vector element
1720 is a CLOBBER. It will be tested later. */
1723 store_multiple_operation (op, mode)
1725 enum machine_mode mode;
1727 int count = XVECLEN (op, 0) - 1;
1732 /* Perform a quick check so we don't blow up below. */
1734 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1735 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1736 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1739 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1740 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1742 for (i = 1; i < count; i++)
1744 rtx elt = XVECEXP (op, 0, i + 1);
1746 if (GET_CODE (elt) != SET
1747 || GET_CODE (SET_SRC (elt)) != REG
1748 || GET_MODE (SET_SRC (elt)) != SImode
1749 || REGNO (SET_SRC (elt)) != src_regno + i
1750 || GET_CODE (SET_DEST (elt)) != MEM
1751 || GET_MODE (SET_DEST (elt)) != SImode
1752 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1753 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1754 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1755 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
1762 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1763 We only check the opcode against the mode of the CC value here. */
1766 branch_comparison_operator (op, mode)
1768 enum machine_mode mode;
1770 enum rtx_code code = GET_CODE (op);
1771 enum machine_mode cc_mode;
1773 if (GET_RTX_CLASS (code) != '<')
1776 cc_mode = GET_MODE (XEXP (op, 0));
1777 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1780 if ((code == GT || code == LT || code == GE || code == LE)
1781 && cc_mode == CCUNSmode)
1784 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1785 && (cc_mode != CCUNSmode))
1791 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1792 We check the opcode against the mode of the CC value and disallow EQ or
1793 NE comparisons for integers. */
1796 scc_comparison_operator (op, mode)
1798 enum machine_mode mode;
1800 enum rtx_code code = GET_CODE (op);
1801 enum machine_mode cc_mode;
1803 if (GET_MODE (op) != mode && mode != VOIDmode)
1806 if (GET_RTX_CLASS (code) != '<')
1809 cc_mode = GET_MODE (XEXP (op, 0));
1810 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1813 if (code == NE && cc_mode != CCFPmode)
1816 if ((code == GT || code == LT || code == GE || code == LE)
1817 && cc_mode == CCUNSmode)
1820 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1821 && (cc_mode != CCUNSmode))
1824 if (cc_mode == CCEQmode && code != EQ && code != NE)
1830 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1831 mask required to convert the result of a rotate insn into a shift
1832 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1835 includes_lshift_p (shiftop, andop)
1836 register rtx shiftop;
1839 int shift_mask = (~0 << INTVAL (shiftop));
1841 return (INTVAL (andop) & ~shift_mask) == 0;
1844 /* Similar, but for right shift. */
1847 includes_rshift_p (shiftop, andop)
1848 register rtx shiftop;
1851 unsigned shift_mask = ~0;
1853 shift_mask >>= INTVAL (shiftop);
1855 return (INTVAL (andop) & ~ shift_mask) == 0;
1858 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1859 for lfq and stfq insns.
1861 Note reg1 and reg2 *must* be hard registers. To be sure we will
1862 abort if we are passed pseudo registers. */
1865 registers_ok_for_quad_peep (reg1, reg2)
1868 /* We might have been passed a SUBREG. */
1869 if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG)
1872 return (REGNO (reg1) == REGNO (reg2) - 1);
1875 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1876 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1879 addrs_ok_for_quad_peep (addr1, addr2)
1886 /* Extract an offset (if used) from the first addr. */
1887 if (GET_CODE (addr1) == PLUS)
1889 /* If not a REG, return zero. */
1890 if (GET_CODE (XEXP (addr1, 0)) != REG)
1894 reg1 = REGNO (XEXP (addr1, 0));
1895 /* The offset must be constant! */
1896 if (GET_CODE (XEXP (addr1, 1)) != CONST_INT)
1898 offset1 = INTVAL (XEXP (addr1, 1));
1901 else if (GET_CODE (addr1) != REG)
1905 reg1 = REGNO (addr1);
1906 /* This was a simple (mem (reg)) expression. Offset is 0. */
1910 /* Make sure the second address is a (mem (plus (reg) (const_int). */
1911 if (GET_CODE (addr2) != PLUS)
1914 if (GET_CODE (XEXP (addr2, 0)) != REG
1915 || GET_CODE (XEXP (addr2, 1)) != CONST_INT)
1918 if (reg1 != REGNO (XEXP (addr2, 0)))
1921 /* The offset for the second addr must be 8 more than the first addr. */
1922 if (INTVAL (XEXP (addr2, 1)) != offset1 + 8)
1925 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
1930 /* Return the register class of a scratch register needed to copy IN into
1931 or out of a register in CLASS in MODE. If it can be done directly,
1932 NO_REGS is returned. */
1935 secondary_reload_class (class, mode, in)
1936 enum reg_class class;
1937 enum machine_mode mode;
1940 int regno = true_regnum (in);
1942 if (regno >= FIRST_PSEUDO_REGISTER)
1945 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
1947 if (class == GENERAL_REGS || class == BASE_REGS
1948 || (regno >= 0 && INT_REGNO_P (regno)))
1951 /* Constants, memory, and FP registers can go into FP registers. */
1952 if ((regno == -1 || FP_REGNO_P (regno))
1953 && (class == FLOAT_REGS || class == NON_SPECIAL_REGS))
1956 /* We can copy among the CR registers. */
1957 if ((class == CR_REGS || class == CR0_REGS)
1958 && regno >= 0 && CR_REGNO_P (regno))
1961 /* Otherwise, we need GENERAL_REGS. */
1962 return GENERAL_REGS;
1965 /* Given a comparison operation, return the bit number in CCR to test. We
1966 know this is a valid comparison.
1968 SCC_P is 1 if this is for an scc. That means that %D will have been
1969 used instead of %C, so the bits will be in different places.
1971 Return -1 if OP isn't a valid comparison for some reason. */
1978 enum rtx_code code = GET_CODE (op);
1979 enum machine_mode cc_mode;
1983 if (GET_RTX_CLASS (code) != '<')
1986 cc_mode = GET_MODE (XEXP (op, 0));
1987 cc_regnum = REGNO (XEXP (op, 0));
1988 base_bit = 4 * (cc_regnum - 68);
1990 /* In CCEQmode cases we have made sure that the result is always in the
1991 third bit of the CR field. */
1993 if (cc_mode == CCEQmode)
1994 return base_bit + 3;
1999 return scc_p ? base_bit + 3 : base_bit + 2;
2001 return base_bit + 2;
2003 return base_bit + 1;
2008 /* If floating-point, we will have done a cror to put the bit in the
2009 unordered position. So test that bit. For integer, this is ! LT
2010 unless this is an scc insn. */
2011 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit;
2014 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1;
2021 /* Print an operand. Recognize special options, documented below. */
2024 print_operand (file, x, code)
2032 /* These macros test for integers and extract the low-order bits. */
2034 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
2035 && GET_MODE (X) == VOIDmode)
2037 #define INT_LOWPART(X) \
2038 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
2043 /* Write out an instruction after the call which may be replaced
2044 with glue code by the loader. This depends on the AIX version. */
2045 asm_fprintf (file, RS6000_CALL_GLUE);
2049 /* Write the register number of the TOC register. */
2050 fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file);
2054 /* If X is a constant integer whose low-order 5 bits are zero,
2055 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
2056 in the AIX assembler where "sri" with a zero shift count
2057 write a trash instruction. */
2058 if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0)
2065 /* Low-order 16 bits of constant, unsigned. */
2067 output_operand_lossage ("invalid %%b value");
2069 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
2073 /* This is an optional cror needed for LE or GE floating-point
2074 comparisons. Otherwise write nothing. */
2075 if ((GET_CODE (x) == LE || GET_CODE (x) == GE)
2076 && GET_MODE (XEXP (x, 0)) == CCFPmode)
2078 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2080 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
2081 base_bit + 2, base_bit + (GET_CODE (x) == GE));
2086 /* Similar, except that this is for an scc, so we must be able to
2087 encode the test in a single bit that is one. We do the above
2088 for any LE, GE, GEU, or LEU and invert the bit for NE. */
2089 if (GET_CODE (x) == LE || GET_CODE (x) == GE
2090 || GET_CODE (x) == LEU || GET_CODE (x) == GEU)
2092 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2094 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
2096 base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU));
2099 else if (GET_CODE (x) == NE)
2101 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2103 fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3,
2104 base_bit + 2, base_bit + 2);
2109 /* X is a CR register. Print the number of the third bit of the CR */
2110 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2111 output_operand_lossage ("invalid %%E value");
2113 fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3);
2117 /* X is a CR register. Print the shift count needed to move it
2118 to the high-order four bits. */
2119 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2120 output_operand_lossage ("invalid %%f value");
2122 fprintf (file, "%d", 4 * (REGNO (x) - 68));
2126 /* Similar, but print the count for the rotate in the opposite
2128 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2129 output_operand_lossage ("invalid %%F value");
2131 fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68));
2135 /* X is a constant integer. If it is negative, print "m",
2136 otherwise print "z". This is to make a aze or ame insn. */
2137 if (GET_CODE (x) != CONST_INT)
2138 output_operand_lossage ("invalid %%G value");
2139 else if (INTVAL (x) >= 0)
2146 /* If constant, output low-order five bits. Otherwise,
2149 fprintf (file, "%d", INT_LOWPART (x) & 31);
2151 print_operand (file, x, 0);
2155 /* If constant, output low-order six bits. Otherwise,
2158 fprintf (file, "%d", INT_LOWPART (x) & 63);
2160 print_operand (file, x, 0);
2164 /* Print `i' if this is a constant, else nothing. */
2170 /* Write the bit number in CCR for jump. */
2173 output_operand_lossage ("invalid %%j code");
2175 fprintf (file, "%d", i);
2179 /* Similar, but add one for shift count in rlinm for scc and pass
2180 scc flag to `ccr_bit'. */
2183 output_operand_lossage ("invalid %%J code");
2185 /* If we want bit 31, write a shift count of zero, not 32. */
2186 fprintf (file, "%d", i == 31 ? 0 : i + 1);
2190 /* X must be a constant. Write the 1's complement of the
2193 output_operand_lossage ("invalid %%k value");
2195 fprintf (file, "%d", ~ INT_LOWPART (x));
2199 /* Write second word of DImode or DFmode reference. Works on register
2200 or non-indexed memory only. */
2201 if (GET_CODE (x) == REG)
2202 fprintf (file, "%d", REGNO (x) + 1);
2203 else if (GET_CODE (x) == MEM)
2205 /* Handle possible auto-increment. Since it is pre-increment and
2206 we have already done it, we can just use an offset of four. */
2207 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2208 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2209 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4));
2211 output_address (plus_constant (XEXP (x, 0), 4));
2212 if (DEFAULT_ABI == ABI_V4 && small_data_operand (x, GET_MODE (x)))
2213 fprintf (file, "@sda21(%s)", reg_names[0]);
2218 /* MB value for a mask operand. */
2219 if (! mask_operand (x, VOIDmode))
2220 output_operand_lossage ("invalid %%m value");
2222 val = INT_LOWPART (x);
2224 /* If the high bit is set and the low bit is not, the value is zero.
2225 If the high bit is zero, the value is the first 1 bit we find from
2227 if (val < 0 && (val & 1) == 0)
2234 for (i = 1; i < 32; i++)
2235 if ((val <<= 1) < 0)
2237 fprintf (file, "%d", i);
2241 /* Otherwise, look for the first 0 bit from the right. The result is its
2242 number plus 1. We know the low-order bit is one. */
2243 for (i = 0; i < 32; i++)
2244 if (((val >>= 1) & 1) == 0)
2247 /* If we ended in ...01, I would be 0. The correct value is 31, so
2249 fprintf (file, "%d", 31 - i);
2253 /* ME value for a mask operand. */
2254 if (! mask_operand (x, VOIDmode))
2255 output_operand_lossage ("invalid %%m value");
2257 val = INT_LOWPART (x);
2259 /* If the low bit is set and the high bit is not, the value is 31.
2260 If the low bit is zero, the value is the first 1 bit we find from
2262 if ((val & 1) && val >= 0)
2267 else if ((val & 1) == 0)
2269 for (i = 0; i < 32; i++)
2270 if ((val >>= 1) & 1)
2273 /* If we had ....10, I would be 0. The result should be
2274 30, so we need 30 - i. */
2275 fprintf (file, "%d", 30 - i);
2279 /* Otherwise, look for the first 0 bit from the left. The result is its
2280 number minus 1. We know the high-order bit is one. */
2281 for (i = 0; i < 32; i++)
2282 if ((val <<= 1) >= 0)
2285 fprintf (file, "%d", i);
2289 /* Write the number of elements in the vector times 4. */
2290 if (GET_CODE (x) != PARALLEL)
2291 output_operand_lossage ("invalid %%N value");
2293 fprintf (file, "%d", XVECLEN (x, 0) * 4);
2297 /* Similar, but subtract 1 first. */
2298 if (GET_CODE (x) != PARALLEL)
2299 output_operand_lossage ("invalid %%N value");
2301 fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4);
2305 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2307 || (i = exact_log2 (INT_LOWPART (x))) < 0)
2308 output_operand_lossage ("invalid %%p value");
2310 fprintf (file, "%d", i);
2314 /* The operand must be an indirect memory reference. The result
2315 is the register number. */
2316 if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
2317 || REGNO (XEXP (x, 0)) >= 32)
2318 output_operand_lossage ("invalid %%P value");
2320 fprintf (file, "%d", REGNO (XEXP (x, 0)));
2324 /* X is a CR register. Print the mask for `mtcrf'. */
2325 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2326 output_operand_lossage ("invalid %%R value");
2328 fprintf (file, "%d", 128 >> (REGNO (x) - 68));
2332 /* Low 5 bits of 32 - value */
2334 output_operand_lossage ("invalid %%s value");
2336 fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31);
2340 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2341 All floating-point operations except NE branch true and integer
2342 EQ, LT, GT, LTU and GTU also branch true. */
2343 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2344 output_operand_lossage ("invalid %%t value");
2346 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2347 && GET_CODE (x) != NE)
2348 || GET_CODE (x) == EQ
2349 || GET_CODE (x) == LT || GET_CODE (x) == GT
2350 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2357 /* Opposite of 't': write 4 if this jump operation will branch if true,
2359 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2360 output_operand_lossage ("invalid %%t value");
2362 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2363 && GET_CODE (x) != NE)
2364 || GET_CODE (x) == EQ
2365 || GET_CODE (x) == LT || GET_CODE (x) == GT
2366 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2373 /* High-order 16 bits of constant. */
2375 output_operand_lossage ("invalid %%u value");
2377 fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff);
2381 /* Print `u' if this has an auto-increment or auto-decrement. */
2382 if (GET_CODE (x) == MEM
2383 && (GET_CODE (XEXP (x, 0)) == PRE_INC
2384 || GET_CODE (XEXP (x, 0)) == PRE_DEC))
2389 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2392 fprintf (file, "%d",
2393 (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000));
2395 print_operand (file, x, 0);
2399 /* If constant, low-order 16 bits of constant, unsigned.
2400 Otherwise, write normally. */
2402 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
2404 print_operand (file, x, 0);
2408 if (GET_CODE (x) == MEM
2409 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0)))
2414 /* Like 'L', for third word of TImode */
2415 if (GET_CODE (x) == REG)
2416 fprintf (file, "%d", REGNO (x) + 2);
2417 else if (GET_CODE (x) == MEM)
2419 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2420 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2421 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8));
2423 output_address (plus_constant (XEXP (x, 0), 8));
2424 if (DEFAULT_ABI == ABI_V4 && small_data_operand (x, GET_MODE (x)))
2425 fprintf (file, "@sda21(%s)", reg_names[0]);
2430 /* X is a SYMBOL_REF. Write out the name preceded by a
2431 period and without any trailing data in brackets. Used for function
2432 names. If we are configured for System V (or the embedded ABI) on
2433 the PowerPC, do not emit the period, since those systems do not use
2434 TOCs and the like. */
2435 if (GET_CODE (x) != SYMBOL_REF)
2438 if (XSTR (x, 0)[0] != '.')
2440 switch (DEFAULT_ABI)
2450 case ABI_AIX_NODESC:
2458 RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
2462 /* Like 'L', for last word of TImode. */
2463 if (GET_CODE (x) == REG)
2464 fprintf (file, "%d", REGNO (x) + 3);
2465 else if (GET_CODE (x) == MEM)
2467 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2468 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2469 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12));
2471 output_address (plus_constant (XEXP (x, 0), 12));
2472 if (DEFAULT_ABI == ABI_V4 && small_data_operand (x, GET_MODE (x)))
2473 fprintf (file, "@sda21(%s)", reg_names[0]);
2478 if (GET_CODE (x) == REG)
2479 fprintf (file, "%s", reg_names[REGNO (x)]);
2480 else if (GET_CODE (x) == MEM)
2482 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2483 know the width from the mode. */
2484 if (GET_CODE (XEXP (x, 0)) == PRE_INC)
2485 fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)),
2486 REGNO (XEXP (XEXP (x, 0), 0)));
2487 else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
2488 fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)),
2489 REGNO (XEXP (XEXP (x, 0), 0)));
2491 output_address (XEXP (x, 0));
2494 output_addr_const (file, x);
2498 output_operand_lossage ("invalid %%xn code");
2502 /* Print the address of an operand. */
2505 print_operand_address (file, x)
2509 if (GET_CODE (x) == REG)
2510 fprintf (file, "0(%s)", reg_names[ REGNO (x) ]);
2511 else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST)
2513 output_addr_const (file, x);
2514 if (DEFAULT_ABI == ABI_V4 && small_data_operand (x, GET_MODE (x)))
2515 fprintf (file, "@sda21(%s)", reg_names[0]);
2517 #ifdef TARGET_NO_TOC
2518 else if (TARGET_NO_TOC)
2522 fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]);
2524 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
2526 if (REGNO (XEXP (x, 0)) == 0)
2527 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ],
2528 reg_names[ REGNO (XEXP (x, 0)) ]);
2530 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ],
2531 reg_names[ REGNO (XEXP (x, 1)) ]);
2533 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
2534 fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]);
2535 else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM
2536 && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1)))
2538 output_addr_const (file, XEXP (x, 1));
2539 fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]);
2545 /* This page contains routines that are used to determine what the function
2546 prologue and epilogue code will do and write them out. */
2548 /* Return the first fixed-point register that is required to be saved. 32 if
2552 first_reg_to_save ()
2556 /* Find lowest numbered live register. */
2557 for (first_reg = 13; first_reg <= 31; first_reg++)
2558 if (regs_ever_live[first_reg])
2561 /* If profiling, then we must save/restore every register that contains
2562 a parameter before/after the .mcount call. Use registers from 30 down
2563 to 23 to do this. Don't use the frame pointer in reg 31.
2565 For now, save enough room for all of the parameter registers. */
2566 if (DEFAULT_ABI == ABI_AIX && profile_flag)
2573 /* Similar, for FP regs. */
2576 first_fp_reg_to_save ()
2580 /* Find lowest numbered live register. */
2581 for (first_reg = 14 + 32; first_reg <= 63; first_reg++)
2582 if (regs_ever_live[first_reg])
2588 /* Return non-zero if this function makes calls. */
2591 rs6000_makes_calls ()
2595 /* If we are profiling, we will be making a call to mcount. */
2599 for (insn = get_insns (); insn; insn = next_insn (insn))
2600 if (GET_CODE (insn) == CALL_INSN)
2607 /* Calculate the stack information for the current function. This is
2608 complicated by having two separate calling sequences, the AIX calling
2609 sequence and the V.4 calling sequence.
2611 AIX stack frames look like:
2613 SP----> +---------------------------------------+
2614 | back chain to caller | 0
2615 +---------------------------------------+
2617 +---------------------------------------+
2619 +---------------------------------------+
2620 | reserved for compilers | 12
2621 +---------------------------------------+
2622 | reserved for binders | 16
2623 +---------------------------------------+
2624 | saved TOC pointer | 20
2625 +---------------------------------------+
2626 | Parameter save area (P) | 24
2627 +---------------------------------------+
2628 | Alloca space (A) | 24+P
2629 +---------------------------------------+
2630 | Local variable space (L) | 24+P+A
2631 +---------------------------------------+
2632 | Save area for GP registers (G) | 24+P+A+L
2633 +---------------------------------------+
2634 | Save area for FP registers (F) | 24+P+A+L+G
2635 +---------------------------------------+
2636 old SP->| back chain to caller's caller |
2637 +---------------------------------------+
2639 V.4 stack frames look like:
2641 SP----> +---------------------------------------+
2642 | back chain to caller | 0
2643 +---------------------------------------+
2644 | caller's saved LR | 4
2645 +---------------------------------------+
2646 | Parameter save area (P) | 8
2647 +---------------------------------------+
2648 | Alloca space (A) | 8+P
2649 +---------------------------------------+
2650 | Varargs save area (V) | 8+P+A
2651 +---------------------------------------+
2652 | Local variable space (L) | 8+P+A+V
2653 +---------------------------------------+
2654 | saved CR (C) | 8+P+A+V+L
2655 +---------------------------------------+
2656 | Save area for GP registers (G) | 8+P+A+V+L+C
2657 +---------------------------------------+
2658 | Save area for FP registers (F) | 8+P+A+V+L+C+G
2659 +---------------------------------------+
2660 old SP->| back chain to caller's caller |
2661 +---------------------------------------+
2664 A PowerPC Windows/NT frame looks like:
2666 SP----> +---------------------------------------+
2667 | back chain to caller | 0
2668 +---------------------------------------+
2670 +---------------------------------------+
2672 +---------------------------------------+
2674 +---------------------------------------+
2676 +---------------------------------------+
2678 +---------------------------------------+
2679 | Parameter save area (P) | 24
2680 +---------------------------------------+
2681 | Alloca space (A) | 24+P
2682 +---------------------------------------+
2683 | Local variable space (L) | 24+P+A
2684 +---------------------------------------+
2685 | Save area for FP registers (F) | 24+P+A+L
2686 +---------------------------------------+
2687 | Possible alignment area (X) | 24+P+A+L+F
2688 +---------------------------------------+
2689 | Save area for GP registers (G) | 24+P+A+L+F+X
2690 +---------------------------------------+
2691 | Save area for CR (C) | 24+P+A+L+F+X+G
2692 +---------------------------------------+
2693 | Save area for TOC (T) | 24+P+A+L+F+X+G+C
2694 +---------------------------------------+
2695 | Save area for LR (R) | 24+P+A+L+F+X+G+C+T
2696 +---------------------------------------+
2697 old SP->| back chain to caller's caller |
2698 +---------------------------------------+
2700 For NT, there is no specific order to save the registers, but in
2701 order to support __builtin_return_address, the save area for the
2702 link register needs to be in a known place, so we use -4 off of the
2703 old SP. To support calls through pointers, we also allocate a
2704 fixed slot to store the TOC, -8 off the old SP. */
2707 rs6000_stack_info ()
2709 static rs6000_stack_t info, zero_info;
2710 rs6000_stack_t *info_ptr = &info;
2711 int reg_size = TARGET_64BIT ? 8 : 4;
2712 enum rs6000_abi abi;
2715 /* Zero all fields portably */
2718 /* Select which calling sequence */
2719 info_ptr->abi = abi = DEFAULT_ABI;
2721 /* Calculate which registers need to be saved & save area size */
2722 info_ptr->first_gp_reg_save = first_reg_to_save ();
2723 info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save);
2725 info_ptr->first_fp_reg_save = first_fp_reg_to_save ();
2726 info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save);
2728 /* Does this function call anything? */
2729 info_ptr->calls_p = rs6000_makes_calls ();
2731 /* Do we need to allocate space to save the toc? */
2732 if (rs6000_save_toc_p)
2734 info_ptr->toc_save_p = 1;
2735 info_ptr->toc_size = reg_size;
2738 /* If this is main and we need to call a function to set things up,
2739 save main's arguments around the call. */
2740 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0)
2742 info_ptr->main_p = 1;
2745 info_ptr->calls_p = 1;
2747 if (DECL_ARGUMENTS (current_function_decl))
2752 info_ptr->main_save_p = 1;
2753 info_ptr->main_size = 0;
2755 for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl));
2756 arg != NULL_TREE && i < 8;
2757 (arg = TREE_CHAIN (arg)), i++)
2759 info_ptr->main_size += reg_size;
2765 /* Determine if we need to save the link register */
2766 if (regs_ever_live[65] || profile_flag
2767 #ifdef TARGET_RELOCATABLE
2768 || (TARGET_RELOCATABLE && (get_pool_size () != 0))
2770 || (info_ptr->first_fp_reg_save != 64
2771 && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save))
2772 || (abi == ABI_V4 && current_function_calls_alloca)
2773 || info_ptr->calls_p)
2775 info_ptr->lr_save_p = 1;
2776 regs_ever_live[65] = 1;
2778 info_ptr->lr_size = reg_size;
2781 /* Determine if we need to save the condition code registers */
2782 if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72])
2784 info_ptr->cr_save_p = 1;
2785 if (abi == ABI_V4 || abi == ABI_NT)
2786 info_ptr->cr_size = reg_size;
2789 /* Determine various sizes */
2790 info_ptr->reg_size = reg_size;
2791 info_ptr->fixed_size = RS6000_SAVE_AREA;
2792 info_ptr->varargs_size = RS6000_VARARGS_AREA;
2793 info_ptr->vars_size = ALIGN (get_frame_size (), 8);
2794 info_ptr->parm_size = ALIGN (current_function_outgoing_args_size, 8);
2795 info_ptr->save_size = ALIGN (info_ptr->fp_size
2799 + info_ptr->toc_size
2800 + info_ptr->main_size, 8);
2802 total_raw_size = (info_ptr->vars_size
2803 + info_ptr->parm_size
2804 + info_ptr->save_size
2805 + info_ptr->varargs_size
2806 + info_ptr->fixed_size);
2808 info_ptr->total_size = ALIGN (total_raw_size, STACK_BOUNDARY / BITS_PER_UNIT);
2810 /* Determine if we need to allocate any stack frame.
2811 For AIX We need to push the stack if a frame pointer is needed (because
2812 the stack might be dynamically adjusted), if we are debugging, if the
2813 total stack size is more than 220 bytes, or if we make calls.
2815 For V.4 we don't have the stack cushion that AIX uses, but assume that
2816 the debugger can handle stackless frames. */
2818 if (info_ptr->calls_p)
2819 info_ptr->push_p = 1;
2821 else if (abi == ABI_V4 || abi == ABI_NT)
2822 info_ptr->push_p = (total_raw_size > info_ptr->fixed_size
2823 || info_ptr->lr_save_p);
2826 info_ptr->push_p = (frame_pointer_needed
2827 || write_symbols != NO_DEBUG
2828 || info_ptr->total_size > 220);
2830 /* Calculate the offsets */
2838 case ABI_AIX_NODESC:
2839 info_ptr->fp_save_offset = - info_ptr->fp_size;
2840 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
2841 info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size;
2842 info_ptr->cr_save_offset = 4;
2843 info_ptr->lr_save_offset = 8;
2847 info_ptr->fp_save_offset = - info_ptr->fp_size;
2848 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
2849 info_ptr->cr_save_offset = info_ptr->gp_save_offset - reg_size;
2850 info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size;
2851 info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
2852 info_ptr->lr_save_offset = reg_size;
2856 info_ptr->lr_save_offset = -4;
2857 info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size;
2858 info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
2859 info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size;
2860 info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size;
2861 if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0)
2862 info_ptr->fp_save_offset -= 4;
2864 info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size;
2868 /* Zero offsets if we're not saving those registers */
2869 if (!info_ptr->fp_size)
2870 info_ptr->fp_save_offset = 0;
2872 if (!info_ptr->gp_size)
2873 info_ptr->gp_save_offset = 0;
2875 if (!info_ptr->lr_save_p)
2876 info_ptr->lr_save_offset = 0;
2878 if (!info_ptr->cr_save_p)
2879 info_ptr->cr_save_offset = 0;
2881 if (!info_ptr->toc_save_p)
2882 info_ptr->toc_save_offset = 0;
2884 if (!info_ptr->main_save_p)
2885 info_ptr->main_save_offset = 0;
2891 debug_stack_info (info)
2892 rs6000_stack_t *info;
2897 info = rs6000_stack_info ();
2899 fprintf (stderr, "\nStack information for function %s:\n",
2900 ((current_function_decl && DECL_NAME (current_function_decl))
2901 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl))
2906 default: abi_string = "Unknown"; break;
2907 case ABI_NONE: abi_string = "NONE"; break;
2908 case ABI_AIX: abi_string = "AIX"; break;
2909 case ABI_AIX_NODESC: abi_string = "AIX"; break;
2910 case ABI_V4: abi_string = "V.4"; break;
2911 case ABI_NT: abi_string = "NT"; break;
2914 fprintf (stderr, "\tABI = %5s\n", abi_string);
2916 if (info->first_gp_reg_save != 32)
2917 fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save);
2919 if (info->first_fp_reg_save != 64)
2920 fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save);
2922 if (info->lr_save_p)
2923 fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p);
2925 if (info->cr_save_p)
2926 fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p);
2928 if (info->toc_save_p)
2929 fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p);
2932 fprintf (stderr, "\tpush_p = %5d\n", info->push_p);
2935 fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p);
2938 fprintf (stderr, "\tmain_p = %5d\n", info->main_p);
2940 if (info->main_save_p)
2941 fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p);
2943 if (info->gp_save_offset)
2944 fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset);
2946 if (info->fp_save_offset)
2947 fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset);
2949 if (info->lr_save_offset)
2950 fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset);
2952 if (info->cr_save_offset)
2953 fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset);
2955 if (info->toc_save_offset)
2956 fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset);
2958 if (info->varargs_save_offset)
2959 fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset);
2961 if (info->main_save_offset)
2962 fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset);
2964 if (info->total_size)
2965 fprintf (stderr, "\ttotal_size = %5d\n", info->total_size);
2967 if (info->varargs_size)
2968 fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size);
2970 if (info->vars_size)
2971 fprintf (stderr, "\tvars_size = %5d\n", info->vars_size);
2973 if (info->parm_size)
2974 fprintf (stderr, "\tparm_size = %5d\n", info->parm_size);
2976 if (info->fixed_size)
2977 fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size);
2980 fprintf (stderr, "\tgp_size = %5d\n", info->gp_size);
2983 fprintf (stderr, "\tfp_size = %5d\n", info->fp_size);
2986 fprintf (stderr, "\tlr_size = %5d\n", info->cr_size);
2989 fprintf (stderr, "\tcr_size = %5d\n", info->cr_size);
2992 fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size);
2994 if (info->main_size)
2995 fprintf (stderr, "\tmain_size = %5d\n", info->main_size);
2997 if (info->save_size)
2998 fprintf (stderr, "\tsave_size = %5d\n", info->save_size);
3000 if (info->reg_size != 4)
3001 fprintf (stderr, "\treg_size = %5d\n", info->reg_size);
3003 fprintf (stderr, "\n");
3007 /* Write function prologue. */
3009 output_prolog (file, size)
3013 rs6000_stack_t *info = rs6000_stack_info ();
3014 int reg_size = info->reg_size;
3022 store_reg = "\t{st|stw} %s,%d(%s)\n";
3023 load_reg = "\t{l|lwz} %s,%d(%s)\n";
3027 store_reg = "\tstd %s,%d(%s)\n";
3028 load_reg = "\tlld %s,%d(%s)\n";
3031 if (TARGET_DEBUG_STACK)
3032 debug_stack_info (info);
3034 /* Write .extern for any function we will call to save and restore fp
3036 if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
3037 fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
3038 SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX,
3039 RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
3041 /* Write .extern for truncation routines, if needed. */
3042 if (rs6000_trunc_used && ! trunc_defined)
3044 fprintf (file, "\t.extern .%s\n\t.extern .%s\n",
3045 RS6000_ITRUNC, RS6000_UITRUNC);
3049 /* Write .extern for AIX common mode routines, if needed. */
3050 if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined)
3052 fputs ("\t.extern __mulh\n", file);
3053 fputs ("\t.extern __mull\n", file);
3054 fputs ("\t.extern __divss\n", file);
3055 fputs ("\t.extern __divus\n", file);
3056 fputs ("\t.extern __quoss\n", file);
3057 fputs ("\t.extern __quous\n", file);
3058 common_mode_defined = 1;
3061 /* For V.4, update stack before we do any saving and set back pointer. */
3062 if (info->push_p && DEFAULT_ABI == ABI_V4)
3064 if (info->total_size < 32767)
3067 (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3068 reg_names[1], - info->total_size, reg_names[1]);
3069 sp_offset = info->total_size;
3073 int neg_size = - info->total_size;
3075 asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
3076 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3077 reg_names[0], (neg_size >> 16) & 0xffff,
3078 reg_names[0], reg_names[0], neg_size & 0xffff);
3080 (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3081 reg_names[1], reg_names[1], reg_names[0]);
3085 /* If we use the link register, get it into r0. */
3086 if (info->lr_save_p)
3087 asm_fprintf (file, "\tmflr %s\n", reg_names[0]);
3089 /* If we need to save CR, put it into r12. */
3090 if (info->cr_save_p && sp_reg != 12)
3091 asm_fprintf (file, "\tmfcr %s\n", reg_names[12]);
3093 /* Do any required saving of fpr's. If only one or two to save, do it
3094 ourself. Otherwise, call function. Note that since they are statically
3095 linked, we do not need a nop following them. */
3096 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3098 int regno = info->first_fp_reg_save;
3099 int loc = info->fp_save_offset + sp_offset;
3101 for ( ; regno < 64; regno++, loc += 8)
3102 asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]);
3104 else if (info->first_fp_reg_save != 64)
3105 asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX,
3106 info->first_fp_reg_save - 32, SAVE_FP_SUFFIX);
3108 /* Now save gpr's. */
3109 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3111 int regno = info->first_gp_reg_save;
3112 int loc = info->gp_save_offset + sp_offset;
3114 for ( ; regno < 32; regno++, loc += reg_size)
3115 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]);
3118 else if (info->first_gp_reg_save != 32)
3119 asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n",
3120 reg_names[info->first_gp_reg_save],
3121 info->gp_save_offset + sp_offset,
3124 /* Save main's arguments if we need to call a function */
3126 if (info->main_save_p)
3129 int loc = info->main_save_offset;
3130 int size = info->main_size;
3132 for (regno = 3; size > 0; regno++, loc -= reg_size, size -= reg_size)
3133 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]);
3137 /* Save lr if we used it. */
3138 if (info->lr_save_p)
3139 asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset,
3142 /* Save CR if we use any that must be preserved. */
3143 if (info->cr_save_p)
3145 if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */
3147 asm_fprintf (file, "\tmfcr %s\n", reg_names[0]);
3148 asm_fprintf (file, store_reg, reg_names[0],
3149 info->cr_save_offset + sp_offset,
3153 asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset,
3157 if (info->toc_save_p)
3158 asm_fprintf (file, store_reg, reg_names[2], info->toc_save_offset + sp_offset,
3161 /* NT needs us to probe the stack frame every 4k pages for large frames, so
3163 if (DEFAULT_ABI == ABI_NT && info->total_size > 4096)
3165 if (info->total_size < 32768)
3167 int probe_offset = 4096;
3168 while (probe_offset < info->total_size)
3170 asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]);
3171 probe_offset += 4096;
3176 int probe_iterations = info->total_size / 4096;
3177 static int probe_labelno = 0;
3180 if (probe_iterations < 32768)
3181 asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations);
3184 asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16);
3185 if (probe_iterations & 0xffff)
3186 asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12],
3187 probe_iterations & 0xffff);
3189 asm_fprintf (file, "\tmtctr %s\n", reg_names[12]);
3190 asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
3191 ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno);
3192 asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]);
3193 ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno);
3194 fputs ("\tbdnz ", file);
3195 assemble_name (file, buf);
3200 /* Update stack and set back pointer and we have already done so for V.4. */
3201 if (info->push_p && DEFAULT_ABI != ABI_V4)
3203 if (info->total_size < 32767)
3205 (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3206 reg_names[1], - info->total_size, reg_names[1]);
3209 int neg_size = - info->total_size;
3210 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3211 reg_names[0], (neg_size >> 16) & 0xffff,
3212 reg_names[0], reg_names[0], neg_size & 0xffff);
3214 (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3215 reg_names[1], reg_names[1], reg_names[0]);
3219 /* Set frame pointer, if needed. */
3220 if (frame_pointer_needed)
3221 asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]);
3224 /* If we need to call a function to set things up for main, do so now
3225 before dealing with the TOC. */
3230 switch (DEFAULT_ABI)
3232 case ABI_AIX: prefix = "."; break;
3233 case ABI_NT: prefix = ".."; break;
3236 fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN);
3237 #ifdef RS6000_CALL_GLUE2
3238 fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN);
3240 #ifdef RS6000_CALL_GLUE
3241 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT)
3242 fprintf (file, "\t%s\n", RS6000_CALL_GLUE);
3246 if (info->main_save_p)
3250 int size = info->main_size;
3252 if (info->total_size < 32767)
3254 loc = info->total_size + info->main_save_offset;
3255 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
3256 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]);
3259 { /* for large AIX/NT frames, reg 0 above contains -frame size */
3260 /* for V.4, we need to reload -frame size */
3261 loc = info->main_save_offset;
3262 if (DEFAULT_ABI == ABI_V4 && info->total_size > 32767)
3264 int neg_size = - info->total_size;
3265 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3266 reg_names[0], (neg_size >> 16) & 0xffff,
3267 reg_names[0], reg_names[0], neg_size & 0xffff);
3270 asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0],
3273 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
3274 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]);
3281 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3282 TOC_TABLE address into register 30. */
3283 if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0)
3287 #ifdef TARGET_RELOCATABLE
3288 if (TARGET_RELOCATABLE)
3290 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3291 fputs ("\tbl ", file);
3292 assemble_name (file, buf);
3295 ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno);
3296 fprintf (file, "\tmflr %s\n", reg_names[30]);
3298 asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz}" : "\tld");
3299 fprintf (file, " %s,(", reg_names[0]);
3300 ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno);
3301 assemble_name (file, buf);
3303 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3304 assemble_name (file, buf);
3305 fprintf (file, ")(%s)\n", reg_names[30]);
3306 asm_fprintf (file, "\t{cax|add} %s,%s,%s\n",
3307 reg_names[30], reg_names[0], reg_names[30]);
3308 rs6000_pic_labelno++;
3313 switch (DEFAULT_ABI)
3316 case ABI_AIX_NODESC:
3319 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1);
3320 asm_fprintf (file, "\t{cau|addis} %s,%s,", reg_names[30], reg_names[0]);
3321 assemble_name (file, buf);
3322 asm_fprintf (file, "@ha\n");
3323 if (TARGET_NEW_MNEMONICS)
3325 asm_fprintf (file, "\taddi %s,%s,", reg_names[30], reg_names[30]);
3326 assemble_name (file, buf);
3327 asm_fprintf (file, "@l\n");
3331 asm_fprintf (file, "\tcal %s,", reg_names[30]);
3332 assemble_name (file, buf);
3333 asm_fprintf (file, "@l(%s)\n", reg_names[30]);
3343 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0);
3344 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[30]);
3345 assemble_name (file, buf);
3346 asm_fprintf (file, "(%s)\n", reg_names[2]);
3351 if (DEFAULT_ABI == ABI_NT)
3353 assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3354 fputs (".b:\n", file);
3358 /* Write function epilogue. */
3361 output_epilog (file, size)
3365 rs6000_stack_t *info = rs6000_stack_info ();
3366 char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n";
3367 rtx insn = get_last_insn ();
3372 /* Forget about any temporaries created */
3373 for (i = 0; i < NUM_MACHINE_MODES; i++)
3374 stack_temps[i] = NULL_RTX;
3376 /* If the last insn was a BARRIER, we don't have to write anything except
3378 if (GET_CODE (insn) == NOTE)
3379 insn = prev_nonnote_insn (insn);
3380 if (insn == 0 || GET_CODE (insn) != BARRIER)
3382 /* If we have a frame pointer, a call to alloca, or a large stack
3383 frame, restore the old stack pointer using the backchain. Otherwise,
3384 we know what size to update it with. */
3385 if (frame_pointer_needed || current_function_calls_alloca
3386 || info->total_size > 32767)
3388 /* Under V.4, don't reset the stack pointer until after we're done
3389 loading the saved registers. */
3390 if (DEFAULT_ABI == ABI_V4)
3393 asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]);
3395 else if (info->push_p)
3397 if (DEFAULT_ABI == ABI_V4)
3398 sp_offset = info->total_size;
3399 else if (TARGET_NEW_MNEMONICS)
3400 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], info->total_size);
3402 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], info->total_size, reg_names[1]);
3405 /* Get the old lr if we saved it. */
3406 if (info->lr_save_p)
3407 asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]);
3409 /* Get the old cr if we saved it. */
3410 if (info->cr_save_p)
3411 asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]);
3413 /* Set LR here to try to overlap restores below. */
3414 if (info->lr_save_p)
3415 asm_fprintf (file, "\tmtlr %s\n", reg_names[0]);
3417 /* Restore gpr's. */
3418 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3420 int regno = info->first_gp_reg_save;
3421 int loc = info->gp_save_offset + sp_offset;
3422 int reg_size = (TARGET_32BIT) ? 4 : 8;
3424 for ( ; regno < 32; regno++, loc += reg_size)
3425 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]);
3428 else if (info->first_gp_reg_save != 32)
3429 asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n",
3430 reg_names[info->first_gp_reg_save],
3431 info->gp_save_offset + sp_offset,
3434 /* Restore fpr's if we can do it without calling a function. */
3435 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3437 int regno = info->first_fp_reg_save;
3438 int loc = info->fp_save_offset + sp_offset;
3440 for ( ; regno < 64; regno++, loc += 8)
3441 asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]);
3444 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3446 if (info->cr_save_p)
3447 asm_fprintf (file, "\tmtcrf %d,%s\n",
3448 (regs_ever_live[70] != 0) * 0x20
3449 + (regs_ever_live[71] != 0) * 0x10
3450 + (regs_ever_live[72] != 0) * 0x8, reg_names[12]);
3452 /* If this is V.4, unwind the stack pointer after all of the loads have been done */
3455 if (TARGET_NEW_MNEMONICS)
3456 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], sp_offset);
3458 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], sp_offset, reg_names[1]);
3460 else if (sp_reg != 1)
3461 asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]);
3463 /* If we have to restore more than two FP registers, branch to the
3464 restore function. It will return to our caller. */
3465 if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
3466 asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX,
3467 info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
3469 asm_fprintf (file, "\t{br|blr}\n");
3472 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3475 We don't output a traceback table if -finhibit-size-directive was
3476 used. The documentation for -finhibit-size-directive reads
3477 ``don't output a @code{.size} assembler directive, or anything
3478 else that would cause trouble if the function is split in the
3479 middle, and the two halves are placed at locations far apart in
3480 memory.'' The traceback table has this property, since it
3481 includes the offset from the start of the function to the
3482 traceback table itself.
3484 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3485 different traceback table. */
3486 if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive)
3488 char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
3489 int fixed_parms, float_parms, parm_info;
3492 while (*fname == '.') /* V.4 encodes . in the name */
3495 /* Need label immediately before tbtab, so we can compute its offset
3496 from the function start. */
3499 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3500 ASM_OUTPUT_LABEL (file, fname);
3502 /* The .tbtab pseudo-op can only be used for the first eight
3503 expressions, since it can't handle the possibly variable
3504 length fields that follow. However, if you omit the optional
3505 fields, the assembler outputs zeros for all optional fields
3506 anyways, giving each variable length field is minimum length
3507 (as defined in sys/debug.h). Thus we can not use the .tbtab
3508 pseudo-op at all. */
3510 /* An all-zero word flags the start of the tbtab, for debuggers
3511 that have to find it by searching forward from the entry
3512 point or from the current pc. */
3513 fputs ("\t.long 0\n", file);
3515 /* Tbtab format type. Use format type 0. */
3516 fputs ("\t.byte 0,", file);
3518 /* Language type. Unfortunately, there doesn't seem to be any
3519 official way to get this info, so we use language_string. C
3520 is 0. C++ is 9. No number defined for Obj-C, so use the
3521 value for C for now. */
3522 if (! strcmp (language_string, "GNU C")
3523 || ! strcmp (language_string, "GNU Obj-C"))
3525 else if (! strcmp (language_string, "GNU F77"))
3527 else if (! strcmp (language_string, "GNU Ada"))
3529 else if (! strcmp (language_string, "GNU PASCAL"))
3531 else if (! strcmp (language_string, "GNU C++"))
3535 fprintf (file, "%d,", i);
3537 /* 8 single bit fields: global linkage (not set for C extern linkage,
3538 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
3539 from start of procedure stored in tbtab, internal function, function
3540 has controlled storage, function has no toc, function uses fp,
3541 function logs/aborts fp operations. */
3542 /* Assume that fp operations are used if any fp reg must be saved. */
3543 fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1));
3545 /* 6 bitfields: function is interrupt handler, name present in
3546 proc table, function calls alloca, on condition directives
3547 (controls stack walks, 3 bits), saves condition reg, saves
3549 /* The `function calls alloca' bit seems to be set whenever reg 31 is
3550 set up as a frame pointer, even when there is no alloca call. */
3551 fprintf (file, "%d,",
3552 ((1 << 6) | (frame_pointer_needed << 5)
3553 | (info->cr_save_p << 1) | (info->lr_save_p)));
3555 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
3557 fprintf (file, "%d,",
3558 (info->push_p << 7) | (64 - info->first_fp_reg_save));
3560 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
3561 fprintf (file, "%d,", (32 - first_reg_to_save ()));
3564 /* Compute the parameter info from the function decl argument
3567 int next_parm_info_bit;
3569 next_parm_info_bit = 31;
3574 for (decl = DECL_ARGUMENTS (current_function_decl);
3575 decl; decl = TREE_CHAIN (decl))
3577 rtx parameter = DECL_INCOMING_RTL (decl);
3578 enum machine_mode mode = GET_MODE (parameter);
3580 if (GET_CODE (parameter) == REG)
3582 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3590 else if (mode == DFmode)
3595 /* If only one bit will fit, don't or in this entry. */
3596 if (next_parm_info_bit > 0)
3597 parm_info |= (bits << (next_parm_info_bit - 1));
3598 next_parm_info_bit -= 2;
3602 fixed_parms += ((GET_MODE_SIZE (mode)
3603 + (UNITS_PER_WORD - 1))
3605 next_parm_info_bit -= 1;
3611 /* Number of fixed point parameters. */
3612 /* This is actually the number of words of fixed point parameters; thus
3613 an 8 byte struct counts as 2; and thus the maximum value is 8. */
3614 fprintf (file, "%d,", fixed_parms);
3616 /* 2 bitfields: number of floating point parameters (7 bits), parameters
3618 /* This is actually the number of fp registers that hold parameters;
3619 and thus the maximum value is 13. */
3620 /* Set parameters on stack bit if parameters are not in their original
3621 registers, regardless of whether they are on the stack? Xlc
3622 seems to set the bit when not optimizing. */
3623 fprintf (file, "%d\n", ((float_parms << 1) | (! optimize)));
3625 /* Optional fields follow. Some are variable length. */
3627 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
3629 /* There is an entry for each parameter in a register, in the order that
3630 they occur in the parameter list. Any intervening arguments on the
3631 stack are ignored. If the list overflows a long (max possible length
3632 34 bits) then completely leave off all elements that don't fit. */
3633 /* Only emit this long if there was at least one parameter. */
3634 if (fixed_parms || float_parms)
3635 fprintf (file, "\t.long %d\n", parm_info);
3637 /* Offset from start of code to tb table. */
3638 fputs ("\t.long ", file);
3639 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3640 RS6000_OUTPUT_BASENAME (file, fname);
3642 RS6000_OUTPUT_BASENAME (file, fname);
3645 /* Interrupt handler mask. */
3646 /* Omit this long, since we never set the interrupt handler bit
3649 /* Number of CTL (controlled storage) anchors. */
3650 /* Omit this long, since the has_ctl bit is never set above. */
3652 /* Displacement into stack of each CTL anchor. */
3653 /* Omit this list of longs, because there are no CTL anchors. */
3655 /* Length of function name. */
3656 fprintf (file, "\t.short %d\n", strlen (fname));
3658 /* Function name. */
3659 assemble_string (fname, strlen (fname));
3661 /* Register for alloca automatic storage; this is always reg 31.
3662 Only emit this if the alloca bit was set above. */
3663 if (frame_pointer_needed)
3664 fputs ("\t.byte 31\n", file);
3667 /* Reset varargs and save TOC indicator */
3668 rs6000_sysv_varargs_p = 0;
3669 rs6000_save_toc_p = 0;
3671 if (DEFAULT_ABI == ABI_NT)
3673 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3674 fputs (".e:\nFE_MOT_RESVD..", file);
3675 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3676 fputs (":\n", file);
3680 /* Output a TOC entry. We derive the entry name from what is
3684 output_toc (file, x, labelno)
3698 /* if we're going to put a double constant in the TOC, make sure it's
3699 aligned properly when strict alignment is on. */
3700 if (GET_CODE (x) == CONST_DOUBLE
3702 && GET_MODE (x) == DFmode
3703 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) {
3704 ASM_OUTPUT_ALIGN (file, 3);
3708 if (TARGET_ELF && TARGET_MINIMAL_TOC)
3710 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC");
3711 fprintf (file, "%d = .-", labelno);
3712 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC");
3713 fputs ("1\n", file);
3716 ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno);
3718 /* Handle FP constants specially. Note that if we have a minimal
3719 TOC, things we put here aren't actually in the TOC, so we can allow
3721 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode
3722 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3727 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
3728 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
3729 if (TARGET_MINIMAL_TOC)
3730 fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]);
3732 fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
3733 k[0], k[1], k[0], k[1]);
3736 else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode
3737 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3742 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
3743 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
3745 if (TARGET_MINIMAL_TOC)
3746 fprintf (file, "\t.long %d\n", l);
3748 fprintf (file, "\t.tc FS_%x[TC],%d\n", l, l);
3751 else if (GET_MODE (x) == DImode
3752 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
3753 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
3758 if (GET_CODE (x) == CONST_DOUBLE)
3760 low = CONST_DOUBLE_LOW (x);
3761 high = CONST_DOUBLE_HIGH (x);
3764 #if HOST_BITS_PER_WIDE_INT == 32
3767 high = (low < 0) ? ~0 : 0;
3771 low = INTVAL (x) & 0xffffffff;
3772 high = (HOST_WIDE_INT) INTVAL (x) >> 32;
3776 if (TARGET_MINIMAL_TOC)
3777 fprintf (file, "\t.long %ld\n\t.long %ld\n", high, low);
3779 fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n",
3780 high, low, high, low);
3784 if (GET_CODE (x) == CONST)
3786 base = XEXP (XEXP (x, 0), 0);
3787 offset = INTVAL (XEXP (XEXP (x, 0), 1));
3790 if (GET_CODE (base) == SYMBOL_REF)
3791 name = XSTR (base, 0);
3792 else if (GET_CODE (base) == LABEL_REF)
3793 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0)));
3794 else if (GET_CODE (base) == CODE_LABEL)
3795 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base));
3799 if (TARGET_MINIMAL_TOC)
3800 fputs ("\t.long ", file);
3803 STRIP_NAME_ENCODING (real_name, name);
3804 fprintf (file, "\t.tc %s", real_name);
3807 fprintf (file, ".N%d", - offset);
3809 fprintf (file, ".P%d", offset);
3811 fputs ("[TC],", file);
3813 output_addr_const (file, x);
3817 /* Output an assembler pseudo-op to write an ASCII string of N characters
3818 starting at P to FILE.
3820 On the RS/6000, we have to do this using the .byte operation and
3821 write out special characters outside the quoted string.
3822 Also, the assembler is broken; very long strings are truncated,
3823 so we must artificially break them up early. */
3826 output_ascii (file, p, n)
3832 int i, count_string;
3833 char *for_string = "\t.byte \"";
3834 char *for_decimal = "\t.byte ";
3835 char *to_close = NULL;
3838 for (i = 0; i < n; i++)
3841 if (c >= ' ' && c < 0177)
3844 fputs (for_string, file);
3847 /* Write two quotes to get one. */
3855 for_decimal = "\"\n\t.byte ";
3859 if (count_string >= 512)
3861 fputs (to_close, file);
3863 for_string = "\t.byte \"";
3864 for_decimal = "\t.byte ";
3872 fputs (for_decimal, file);
3873 fprintf (file, "%d", c);
3875 for_string = "\n\t.byte \"";
3882 /* Now close the string if we have written one. Then end the line. */
3884 fprintf (file, to_close);
3887 /* Generate a unique section name for FILENAME for a section type
3888 represented by SECTION_DESC. Output goes into BUF.
3890 SECTION_DESC can be any string, as long as it is different for each
3891 possible section type.
3893 We name the section in the same manner as xlc. The name begins with an
3894 underscore followed by the filename (after stripping any leading directory
3895 names) with the last period replaced by the string SECTION_DESC. If
3896 FILENAME does not contain a period, SECTION_DESC is appended to the end of
3900 rs6000_gen_section_name (buf, filename, section_desc)
3905 char *q, *after_last_slash, *last_period;
3909 after_last_slash = filename;
3910 for (q = filename; *q; q++)
3913 after_last_slash = q + 1;
3918 len = strlen (after_last_slash) + strlen (section_desc) + 2;
3919 *buf = (char *) permalloc (len);
3924 for (q = after_last_slash; *q; q++)
3926 if (q == last_period)
3928 strcpy (p, section_desc);
3929 p += strlen (section_desc);
3932 else if (isalnum (*q))
3936 if (last_period == 0)
3937 strcpy (p, section_desc);
3942 /* Write function profiler code. */
3945 output_function_profiler (file, labelno)
3949 /* The last used parameter register. */
3954 if (DEFAULT_ABI != ABI_AIX)
3957 /* Set up a TOC entry for the profiler label. */
3959 ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno);
3960 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno);
3961 if (TARGET_MINIMAL_TOC)
3963 fputs ("\t.long ", file);
3964 assemble_name (file, buf);
3969 fputs ("\t.tc\t", file);
3970 assemble_name (file, buf);
3971 fputs ("[TC],", file);
3972 assemble_name (file, buf);
3977 /* Figure out last used parameter register. The proper thing to do is
3978 to walk incoming args of the function. A function might have live
3979 parameter registers even if it has no incoming args. */
3981 for (last_parm_reg = 10;
3982 last_parm_reg > 2 && ! regs_ever_live [last_parm_reg];
3986 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
3987 it might be set up as the frame pointer. */
3989 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
3990 asm_fprintf (file, "\tmr %d,%d\n", j, i);
3992 /* Load location address into r3, and call mcount. */
3994 ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno);
3995 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[3]);
3996 assemble_name (file, buf);
3997 asm_fprintf (file, "(%s)\n\tbl .mcount\n", reg_names[2]);
3999 /* Restore parameter registers. */
4001 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
4002 asm_fprintf (file, "\tmr %d,%d\n", i, j);
4005 /* Adjust the cost of a scheduling dependency. Return the new cost of
4006 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
4009 rs6000_adjust_cost (insn, link, dep_insn, cost)
4015 if (! recog_memoized (insn))
4018 if (REG_NOTE_KIND (link) != 0)
4021 if (REG_NOTE_KIND (link) == 0)
4023 /* Data dependency; DEP_INSN writes a register that INSN reads some
4026 /* Tell the first scheduling pass about the latency between a mtctr
4027 and bctr (and mtlr and br/blr). The first scheduling pass will not
4028 know about this latency since the mtctr instruction, which has the
4029 latency associated to it, will be generated by reload. */
4030 if (get_attr_type (insn) == TYPE_JMPREG)
4031 return TARGET_POWER ? 5 : 4;
4033 /* Fall out to return default cost. */
4039 /* Return how many instructions the machine can issue per cycle */
4040 int get_issue_rate()
4042 switch (rs6000_cpu_attr) {
4061 /* Output insns to flush the {data|instruction} caches after building a
4065 rs6000_sync_trampoline (addr)
4068 enum machine_mode pmode = Pmode;
4069 rtx reg = gen_reg_rtx (pmode);
4072 int size = rs6000_trampoline_size ();
4073 rtx (*sub_fcn) PROTO ((rtx, rtx, rtx));
4074 rtx (*cmp_fcn) PROTO ((rtx, rtx));
4079 sub_fcn = gen_subsi3;
4080 cmp_fcn = gen_cmpsi;
4084 sub_fcn = gen_subdi3;
4085 cmp_fcn = gen_cmpdi;
4088 addr = force_reg (pmode, addr);
4089 mem2 = gen_rtx (MEM, pmode, gen_rtx (PLUS, pmode, addr, reg));
4090 mem1 = gen_rtx (MEM, pmode, addr);
4092 /* Issue a loop of dcbst's to flush the data cache */
4093 emit_move_insn (reg, GEN_INT (size-4));
4094 label = gen_label_rtx ();
4096 emit_insn (gen_dcbst (mem2, addr, reg));
4097 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
4098 emit_insn ((*cmp_fcn) (reg, const0_rtx));
4099 emit_jump_insn (gen_bgt (label));
4101 /* Issue a sync after the dcbst's to let things settle down */
4102 emit_insn (gen_sync (mem1));
4104 /* Issue a loop of icbi's to flush the instruction cache */
4105 emit_move_insn (reg, GEN_INT (size-4));
4106 label = gen_label_rtx ();
4108 emit_insn (gen_icbi (mem2, addr, reg));
4109 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
4110 emit_insn ((*cmp_fcn) (reg, const0_rtx));
4111 emit_jump_insn (gen_bgt (label));
4113 /* Issue a sync after the icbi's to let things settle down */
4114 emit_insn (gen_sync (mem1));
4116 /* Finally issue an isync to synchronize the icache */
4117 emit_insn (gen_isync (mem1));
4121 /* Output assembler code for a block containing the constant parts
4122 of a trampoline, leaving space for the variable parts.
4124 The trampoline should set the static chain pointer to value placed
4125 into the trampoline and should branch to the specified routine. */
4128 rs6000_trampoline_template (file)
4131 char *sc = reg_names[STATIC_CHAIN_REGNUM];
4132 char *r0 = reg_names[0];
4133 char *r2 = reg_names[2];
4135 switch (DEFAULT_ABI)
4140 /* Under AIX, this is not code at all, but merely a data area,
4141 since that is the way all functions are called. The first word is
4142 the address of the function, the second word is the TOC pointer (r2),
4143 and the third word is the static chain value. */
4145 fprintf (file, "\t.long %s\n", (TARGET_32BIT) ? "0,0,0" : "0,0,0,0,0,0");
4149 /* V.4/eabi function pointers are just a single pointer, so we need to
4150 do the full gory code to load up the static chain. */
4152 case ABI_AIX_NODESC:
4153 if (STATIC_CHAIN_REGNUM == 0 || !TARGET_NEW_MNEMONICS)
4158 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
4159 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
4160 fprintf (file, "\t.long 0,0\n"); /* offset 8 */
4161 fprintf (file, ".LTRAMP1:\n");
4162 fprintf (file, "\tmflr %s\n", sc); /* offset 20 */
4163 fprintf (file, "\tmtlr %s\n", r0); /* offset 24 */
4164 fprintf (file, "\tlwz %s,0(%s)\n", r0, sc); /* offset 28 */
4165 fprintf (file, "\tlwz %s,4(%s)\n", sc, sc); /* offset 32 */
4166 fprintf (file, "\tmtctr %s\n", r0); /* offset 36 */
4167 fprintf (file, "\tbctr\n"); /* offset 40 */
4171 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
4172 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
4173 fprintf (file, "\t.long 0,0,0,0\n"); /* offset 8 */
4174 fprintf (file, ".LTRAMP1:\n");
4175 fprintf (file, "\tmflr %s\n", sc); /* offset 28 */
4176 fprintf (file, "\tmtlr %s\n", r0); /* offset 32 */
4177 fprintf (file, "\tld %s,0(%s)\n", r0, sc); /* offset 36 */
4178 fprintf (file, "\tld %s,8(%s)\n", sc, sc); /* offset 40 */
4179 fprintf (file, "\tmtctr %s\n", r0); /* offset 44 */
4180 fprintf (file, "\tbctr\n"); /* offset 48 */
4184 /* NT function pointers point to a two word area (real address, TOC)
4185 which unfortunately does not include a static chain field. So we
4186 use the function field to point to ..LTRAMP1 and the toc field
4187 to point to the whole table. */
4189 if (STATIC_CHAIN_REGNUM == 0
4190 || STATIC_CHAIN_REGNUM == 2
4192 || !TARGET_NEW_MNEMONICS)
4195 fprintf (file, "\t.ualong 0\n"); /* offset 0 */
4196 fprintf (file, "\t.ualong 0\n"); /* offset 4 */
4197 fprintf (file, "\t.ualong 0\n"); /* offset 8 */
4198 fprintf (file, "\t.ualong 0\n"); /* offset 12 */
4199 fprintf (file, "\t.ualong 0\n"); /* offset 16 */
4200 fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */
4201 fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */
4202 fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */
4203 fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */
4204 fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */
4205 fprintf (file, "\tbctr\n"); /* offset 40 */
4212 /* Length in units of the trampoline for entering a nested function. */
4215 rs6000_trampoline_size ()
4219 switch (DEFAULT_ABI)
4225 ret = (TARGET_32BIT) ? 12 : 24;
4229 case ABI_AIX_NODESC:
4230 ret = (TARGET_32BIT) ? 40 : 48;
4241 /* Emit RTL insns to initialize the variable parts of a trampoline.
4242 FNADDR is an RTX for the address of the function's pure code.
4243 CXT is an RTX for the static chain value for the function. */
4246 rs6000_initialize_trampoline (addr, fnaddr, cxt)
4251 enum machine_mode pmode = Pmode;
4252 int regsize = (TARGET_32BIT) ? 4 : 8;
4253 rtx ctx_reg = force_reg (pmode, cxt);
4255 switch (DEFAULT_ABI)
4260 /* Macros to shorten the code expansions below. */
4261 #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr))
4262 #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset)))
4264 /* Under AIX, just build the 3 word function descriptor */
4267 rtx fn_reg = gen_reg_rtx (pmode);
4268 rtx toc_reg = gen_reg_rtx (pmode);
4269 emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
4270 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4));
4271 emit_move_insn (MEM_DEREF (addr), fn_reg);
4272 emit_move_insn (MEM_PLUS (addr, regsize), toc_reg);
4273 emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg);
4277 /* Under V.4/eabi, update the two words after the bl to have the real
4278 function address and the static chain. */
4280 case ABI_AIX_NODESC:
4282 rtx reg = gen_reg_rtx (pmode);
4283 emit_move_insn (reg, fnaddr);
4284 emit_move_insn (MEM_PLUS (addr, 8), reg);
4285 emit_move_insn (MEM_PLUS (addr, 8 + regsize), ctx_reg);
4286 rs6000_sync_trampoline (addr);
4290 /* Under NT, update the first word to point to the ..LTRAMP1..0 header,
4291 the second word will point to the whole trampoline, third-fifth words
4292 will then have the real address, static chain, and toc value. */
4295 rtx tramp_reg = gen_reg_rtx (pmode);
4296 rtx fn_reg = gen_reg_rtx (pmode);
4297 rtx toc_reg = gen_reg_rtx (pmode);
4299 emit_move_insn (tramp_reg, gen_rtx (SYMBOL_REF, pmode, "..LTRAMP1..0"));
4300 addr = force_reg (pmode, addr);
4301 emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
4302 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize));
4303 emit_move_insn (MEM_DEREF (addr), tramp_reg);
4304 emit_move_insn (MEM_PLUS (addr, regsize), addr);
4305 emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg);
4306 emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg);
4307 emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx (REG, pmode, 2));
4316 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4317 with arguments ARGS is a valid machine specific attribute for DECL.
4318 The attributes in ATTRIBUTES have previously been assigned to DECL. */
4321 rs6000_valid_decl_attribute_p (decl, attributes, identifier, args)
4330 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4331 with arguments ARGS is a valid machine specific attribute for TYPE.
4332 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
4335 rs6000_valid_type_attribute_p (type, attributes, identifier, args)
4341 if (TREE_CODE (type) != FUNCTION_TYPE
4342 && TREE_CODE (type) != FIELD_DECL
4343 && TREE_CODE (type) != TYPE_DECL)
4346 /* Longcall attribute says that the function is not within 2**26 bytes
4347 of the current function, and to do an indirect call. */
4348 if (is_attribute_p ("longcall", identifier))
4349 return (args == NULL_TREE);
4351 if (DEFAULT_ABI == ABI_NT)
4353 /* Stdcall attribute says callee is responsible for popping arguments
4354 if they are not variable. */
4355 if (is_attribute_p ("stdcall", identifier))
4356 return (args == NULL_TREE);
4358 /* Cdecl attribute says the callee is a normal C declaration */
4359 if (is_attribute_p ("cdecl", identifier))
4360 return (args == NULL_TREE);
4362 /* Dllimport attribute says says the caller is to call the function
4363 indirectly through a __imp_<name> pointer. */
4364 if (is_attribute_p ("dllimport", identifier))
4365 return (args == NULL_TREE);
4367 /* Dllexport attribute says says the callee is to create a __imp_<name>
4369 if (is_attribute_p ("dllexport", identifier))
4370 return (args == NULL_TREE);
4372 /* Exception attribute allows the user to specify 1-2 strings or identifiers
4373 that will fill in the 3rd and 4th fields of the structured exception
4375 if (is_attribute_p ("exception", identifier))
4379 if (args == NULL_TREE)
4382 for (i = 0; i < 2 && args != NULL_TREE; i++)
4384 tree this_arg = TREE_VALUE (args);
4385 args = TREE_PURPOSE (args);
4387 if (TREE_CODE (this_arg) != STRING_CST
4388 && TREE_CODE (this_arg) != IDENTIFIER_NODE)
4392 return (args == NULL_TREE);
4399 /* If defined, a C expression whose value is zero if the attributes on
4400 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
4401 two if they are nearly compatible (which causes a warning to be
4405 rs6000_comp_type_attributes (type1, type2)
4412 /* If defined, a C statement that assigns default attributes to newly
4416 rs6000_set_default_type_attributes (type)
4421 /* Return a dll import reference corresponding to to a call's SYMBOL_REF */
4423 rs6000_dll_import_ref (call_ref)
4432 if (GET_CODE (call_ref) != SYMBOL_REF)
4435 call_name = XSTR (call_ref, 0);
4436 len = sizeof ("__imp_") + strlen (call_name);
4438 reg2 = gen_reg_rtx (Pmode);
4440 strcpy (p, "__imp_");
4441 strcat (p, call_name);
4442 node = get_identifier (p);
4444 reg1 = force_reg (Pmode, gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node)));
4445 emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg1));
4450 /* Return a reference suitable for calling a function with the longcall attribute. */
4452 rs6000_longcall_ref (call_ref)
4461 if (GET_CODE (call_ref) != SYMBOL_REF)
4464 /* System V adds '.' to the internal name, so skip them. */
4465 call_name = XSTR (call_ref, 0);
4466 if (*call_name == '.')
4468 while (*call_name == '.')
4471 node = get_identifier (call_name);
4472 call_ref = gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node));
4475 return force_reg (Pmode, call_ref);
4479 /* A C statement or statements to switch to the appropriate section
4480 for output of RTX in mode MODE. You can assume that RTX is some
4481 kind of constant in RTL. The argument MODE is redundant except in
4482 the case of a `const_int' rtx. Select the section by calling
4483 `text_section' or one of the alternatives for other sections.
4485 Do not define this macro if you put all constants in the read-only
4491 rs6000_select_rtx_section (mode, x)
4492 enum machine_mode mode;
4495 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x))
4501 /* A C statement or statements to switch to the appropriate
4502 section for output of DECL. DECL is either a `VAR_DECL' node
4503 or a constant of some sort. RELOC indicates whether forming
4504 the initial value of DECL requires link-time relocations. */
4507 rs6000_select_section (decl, reloc)
4511 int size = int_size_in_bytes (TREE_TYPE (decl));
4513 if (TREE_CODE (decl) == STRING_CST)
4515 if (! flag_writable_strings)
4520 else if (TREE_CODE (decl) == VAR_DECL)
4522 if ((flag_pic && reloc)
4523 || !TREE_READONLY (decl)
4524 || TREE_SIDE_EFFECTS (decl)
4525 || !DECL_INITIAL (decl)
4526 || (DECL_INITIAL (decl) != error_mark_node
4527 && !TREE_CONSTANT (DECL_INITIAL (decl))))
4529 if (TARGET_SDATA && (size > 0) && (size <= g_switch_value))
4536 if (TARGET_SDATA && (size > 0) && (size <= g_switch_value))
4545 #endif /* USING_SVR4_H */