1 /* Definitions of target machine for GNU compiler, for the pdp-11
2 Copyright (C) 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
4 Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 /* check whether load_fpu_reg or not */
25 #define LOAD_FPU_REG_P(x) ((x)>=8 && (x)<=11)
26 #define NO_LOAD_FPU_REG_P(x) ((x)==12 || (x)==13)
27 #define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
28 #define CPU_REG_P(x) ((x)<8)
30 /* Names to predefine in the preprocessor for this target machine. */
32 #define CPP_PREDEFINES "-Dpdp11"
34 /* Print subsidiary information on the compiler version in use. */
35 #define TARGET_VERSION fprintf (stderr, " (pdp11)");
38 /* Generate DBX debugging information. */
40 /* #define DBX_DEBUGGING_INFO */
42 /* Run-time compilation parameters selecting different hardware subsets.
45 extern int target_flags;
47 /* Macro to define tables used to set the flags.
48 This is a list in braces of triplets in braces,
49 each triplet being { "NAME", VALUE, DOC }
50 where VALUE is the bits to set or minus the bits to clear and DOC
51 is the documentation for --help (NULL if intentionally undocumented).
52 An empty string NAME is used to identify the default VALUE. */
54 #define TARGET_SWITCHES \
55 { { "fpu", 1, N_("Use hardware floating point") }, \
56 { "soft-float", -1, N_("Do not use hardware floating point") }, \
57 /* return float result in ac0 */ \
58 { "ac0", 2, N_("Return floating point results in ac0") }, \
59 { "no-ac0", -2, N_("Return floating point results in memory") }, \
61 { "40", 4, N_("Generate code for an 11/40") }, \
62 { "no-40", -4, "" }, \
64 { "45", 8, N_("Generate code for an 11/45") }, \
65 { "no-45", -8, "" }, \
67 { "10", -12, N_("Generate code for an 11/10") }, \
68 /* use movstrhi for bcopy */ \
69 { "bcopy", 16, NULL }, \
70 { "bcopy-builtin", -16, NULL }, \
71 /* use 32 bit for int */ \
72 { "int32", 32, N_("Use 32 bit int") }, \
73 { "no-int16", 32, N_("Use 32 bit int") }, \
74 { "int16", -32, N_("Use 16 bit int") }, \
75 { "no-int32", -32, N_("Use 16 bit int") }, \
76 /* use 32 bit for float */ \
77 { "float32", 64, N_("Use 32 bit float") }, \
78 { "no-float64", 64, N_("Use 32 bit float") }, \
79 { "float64", -64, N_("Use 64 bit float") }, \
80 { "no-float32", -64, N_("Use 64 bit float") }, \
81 /* allow abshi pattern? - can trigger "optimizations" which make code SLOW! */\
82 { "abshi", 128, NULL }, \
83 { "no-abshi", -128, NULL }, \
84 /* is branching expensive - on a PDP, it's actually really cheap */ \
85 /* this is just to play around and check what code gcc generates */ \
86 { "branch-expensive", 256, NULL }, \
87 { "branch-cheap", -256, NULL }, \
88 /* split instruction and data memory? */ \
89 { "split", 1024, N_("Target has split I&D") }, \
90 { "no-split", -1024, N_("Target does not have split I&D") }, \
91 /* UNIX assembler syntax? */ \
92 { "unix-asm", 2048, N_("Use UNIX assembler syntax") }, \
93 { "dec-asm", -2048, N_("Use DEC assembler syntax") }, \
95 { "", TARGET_DEFAULT, NULL} \
98 #define TARGET_DEFAULT (1 | 8 | 128 | TARGET_UNIX_ASM_DEFAULT)
100 #define TARGET_FPU (target_flags & 1)
101 #define TARGET_SOFT_FLOAT (!TARGET_FPU)
103 #define TARGET_AC0 ((target_flags & 2) && TARGET_FPU)
104 #define TARGET_NO_AC0 (! TARGET_AC0)
106 #define TARGET_45 (target_flags & 8)
107 #define TARGET_40_PLUS ((target_flags & 4) || (target_flags & 8))
108 #define TARGET_10 (! TARGET_40_PLUS)
110 #define TARGET_BCOPY_BUILTIN (! (target_flags & 16))
112 #define TARGET_INT16 (! TARGET_INT32)
113 #define TARGET_INT32 (target_flags & 32)
115 #define TARGET_FLOAT32 (target_flags & 64)
116 #define TARGET_FLOAT64 (! TARGET_FLOAT32)
118 #define TARGET_ABSHI_BUILTIN (target_flags & 128)
120 #define TARGET_BRANCH_EXPENSIVE (target_flags & 256)
121 #define TARGET_BRANCH_CHEAP (!TARGET_BRANCH_EXPENSIVE)
123 #define TARGET_SPLIT (target_flags & 1024)
124 #define TARGET_NOSPLIT (! TARGET_SPLIT)
126 #define TARGET_UNIX_ASM (target_flags & 2048)
127 #define TARGET_UNIX_ASM_DEFAULT 0
129 #define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0)
134 #define SHORT_TYPE_SIZE 16
135 #define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32)
136 #define LONG_TYPE_SIZE 32
137 #define LONG_LONG_TYPE_SIZE 64
139 /* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit
140 of saving core for huge arrays - the definitions are
141 already in md - but floats can never reside in
142 an FPU register - we keep the FPU in double float mode
144 #define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64)
145 #define DOUBLE_TYPE_SIZE 64
146 #define LONG_DOUBLE_TYPE_SIZE 64
148 /* machine types from ansi */
149 #define SIZE_TYPE "unsigned int" /* definition of size_t */
150 #define WCHAR_TYPE "int" /* or long int???? */
151 #define WCHAR_TYPE_SIZE 16
153 #define PTRDIFF_TYPE "int"
155 /* target machine storage layout */
157 /* Define this if most significant bit is lowest numbered
158 in instructions that operate on numbered bit-fields. */
159 #define BITS_BIG_ENDIAN 0
161 /* Define this if most significant byte of a word is the lowest numbered. */
162 #define BYTES_BIG_ENDIAN 0
164 /* Define this if most significant word of a multiword number is numbered. */
165 #define WORDS_BIG_ENDIAN 1
167 /* Width of a word, in units (bytes).
169 UNITS OR BYTES - seems like units */
170 #define UNITS_PER_WORD 2
172 /* Maximum sized of reasonable data type
173 DImode or Dfmode ...*/
174 #define MAX_FIXED_MODE_SIZE 64
176 /* Width in bits of a pointer.
177 See also the macro `Pmode' defined below. */
178 #define POINTER_SIZE 16
180 /* Allocation boundary (in *bits*) for storing pointers in memory. */
181 #define POINTER_BOUNDARY 16
183 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
184 #define PARM_BOUNDARY 16
186 /* Boundary (in *bits*) on which stack pointer should be aligned. */
187 #define STACK_BOUNDARY 16
189 /* Allocation boundary (in *bits*) for the code of a function. */
190 #define FUNCTION_BOUNDARY 16
192 /* Alignment of field after `int : 0' in a structure. */
193 #define EMPTY_FIELD_BOUNDARY 16
195 /* No data type wants to be aligned rounder than this. */
196 #define BIGGEST_ALIGNMENT 16
198 /* Define this if move instructions will actually fail to work
199 when given unaligned data. */
200 #define STRICT_ALIGNMENT 1
202 /* Standard register usage. */
204 /* Number of actual hardware registers.
205 The hardware registers are assigned numbers for the compiler
206 from 0 to just below FIRST_PSEUDO_REGISTER.
207 All registers that the compiler knows about must be given numbers,
208 even those that are not normally considered general registers.
210 we have 8 integer registers, plus 6 float
211 (don't use scratch float !) */
213 #define FIRST_PSEUDO_REGISTER 14
215 /* 1 for registers that have pervasive standard uses
216 and are not available for the register allocator.
218 On the pdp, these are:
221 reg 5 = fp; not necessarily!
224 /* don't let them touch fp regs for the time being !*/
226 #define FIXED_REGISTERS \
227 {0, 0, 0, 0, 0, 0, 1, 1, \
232 /* 1 for registers not available across function calls.
233 These must include the FIXED_REGISTERS and also any
234 registers that can be used without being saved.
235 The latter must include the registers where values are returned
236 and the register where structure-value addresses are passed.
237 Aside from that, you can include as many other registers as you like. */
239 /* don't know about fp */
240 #define CALL_USED_REGISTERS \
241 {1, 1, 0, 0, 0, 0, 1, 1, \
245 /* Make sure everything's fine if we *don't* have an FPU.
246 This assumes that putting a register in fixed_regs will keep the
247 compiler's mitts completely off it. We don't bother to zero it out
248 of register classes. Also fix incompatible register naming with
251 #define CONDITIONAL_REGISTER_USAGE \
257 COPY_HARD_REG_SET (x, reg_class_contents[(int)FPU_REGS]); \
258 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
259 if (TEST_HARD_REG_BIT (x, i)) \
260 fixed_regs[i] = call_used_regs[i] = 1; \
264 call_used_regs[8] = 1; \
265 if (TARGET_UNIX_ASM) \
267 /* Change names of FPU registers for the UNIX assembler. */ \
268 reg_names[8] = "fr0"; \
269 reg_names[9] = "fr1"; \
270 reg_names[10] = "fr2"; \
271 reg_names[11] = "fr3"; \
272 reg_names[12] = "fr4"; \
273 reg_names[13] = "fr5"; \
277 /* Return number of consecutive hard regs needed starting at reg REGNO
278 to hold something of mode MODE.
279 This is ordinarily the length in words of a value of mode MODE
280 but can be less for certain modes in special long registers.
283 #define HARD_REGNO_NREGS(REGNO, MODE) \
285 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
289 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
290 On the pdp, the cpu registers can hold any mode - check alignment
292 FPU can only hold DF - simplifies life!
294 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
296 ((GET_MODE_BITSIZE(MODE) <= 16) \
297 || (GET_MODE_BITSIZE(MODE) == 32 && !((REGNO) & 1))) \
301 /* Value is 1 if it is a good idea to tie two pseudo registers
302 when one has mode MODE1 and one has mode MODE2.
303 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
304 for any hard reg, then this must be 0 for correct output. */
305 #define MODES_TIEABLE_P(MODE1, MODE2) 0
307 /* Specify the registers used for certain standard purposes.
308 The values of these macros are register numbers. */
310 /* the pdp11 pc overloaded on a register that the compiler knows about. */
313 /* Register to use for pushing function arguments. */
314 #define STACK_POINTER_REGNUM 6
316 /* Base register for access to local variables of the function. */
317 #define FRAME_POINTER_REGNUM 5
319 /* Value should be nonzero if functions must have frame pointers.
320 Zero means the frame pointer need not be set up (and parms
321 may be accessed via the stack pointer) in functions that seem suitable.
322 This is computed in `reload', in reload1.c.
325 #define FRAME_POINTER_REQUIRED 0
327 /* Base register for access to arguments of the function. */
328 #define ARG_POINTER_REGNUM 5
330 /* Register in which static-chain is passed to a function. */
331 /* ??? - i don't want to give up a reg for this! */
332 #define STATIC_CHAIN_REGNUM 4
334 /* Register in which address to store a structure value
335 is passed to a function.
336 let's make it an invisible first argument!!! */
338 #define STRUCT_VALUE 0
341 /* Define the classes of registers for register constraints in the
342 machine description. Also define ranges of constants.
344 One of the classes must always be named ALL_REGS and include all hard regs.
345 If there is more than one class, another class must be named NO_REGS
346 and contain no registers.
348 The name GENERAL_REGS must be the name of a class (or an alias for
349 another name such as ALL_REGS). This is the class of registers
350 that is allowed by "g" or "r" in a register constraint.
351 Also, registers outside this class are allocated only when
352 instructions express preferences for them.
354 The classes must be numbered in nondecreasing order; that is,
355 a larger-numbered class must never be contained completely
356 in a smaller-numbered class.
358 For any two classes, it is very desirable that there be another
359 class that represents their union. */
361 /* The pdp has a couple of classes:
363 MUL_REGS are used for odd numbered regs, to use in 16 bit multiplication
364 (even numbered do 32 bit multiply)
365 LMUL_REGS long multiply registers (even numbered regs )
366 (don't need them, all 32 bit regs are even numbered!)
367 GENERAL_REGS is all cpu
368 LOAD_FPU_REGS is the first four cpu regs, they are easier to load
369 NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them
370 FPU_REGS is all fpu regs
373 enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES };
375 #define N_REG_CLASSES (int) LIM_REG_CLASSES
377 /* have to allow this till cmpsi/tstsi are fixed in a better way !! */
378 #define SMALL_REGISTER_CLASSES 1
380 /* Since GENERAL_REGS is the same class as ALL_REGS,
381 don't give it a different class number; just make it an alias. */
383 /* #define GENERAL_REGS ALL_REGS */
385 /* Give names of register classes as strings for dump file. */
387 #define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" }
389 /* Define which registers fit in which classes.
390 This is an initializer for a vector of HARD_REG_SET
391 of length N_REG_CLASSES. */
393 #define REG_CLASS_CONTENTS {{0}, {0x00aa}, {0x00ff}, {0x0f00}, {0x3000}, {0x3f00}, {0x3fff}}
395 /* The same information, inverted:
396 Return the class number of the smallest class containing
397 reg number REGNO. This could be a conditional expression
398 or could index an array. */
400 #define REGNO_REG_CLASS(REGNO) \
401 ((REGNO)>=8?((REGNO)<=11?LOAD_FPU_REGS:NO_LOAD_FPU_REGS):(((REGNO)&1)?MUL_REGS:GENERAL_REGS))
404 /* The class value for index registers, and the one for base regs. */
405 #define INDEX_REG_CLASS GENERAL_REGS
406 #define BASE_REG_CLASS GENERAL_REGS
408 /* Get reg_class from a letter such as appears in the machine description. */
410 #define REG_CLASS_FROM_LETTER(C) \
411 ((C) == 'f' ? FPU_REGS : \
412 ((C) == 'd' ? MUL_REGS : \
413 ((C) == 'a' ? LOAD_FPU_REGS : NO_REGS)))
416 /* The letters I, J, K, L and M in a register constraint string
417 can be used to stand for particular ranges of immediate operands.
418 This macro defines what the ranges are.
419 C is the letter, and VALUE is a constant value.
420 Return 1 if VALUE is in the range specified by C.
424 K completely random 32 bit
425 L,M,N -1,1,0 respectively
426 O where doing shifts in sequence is faster than
430 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
431 ((C) == 'I' ? ((VALUE) & 0xffff0000) == 0 \
432 : (C) == 'J' ? ((VALUE) & 0x0000ffff) == 0 \
433 : (C) == 'K' ? (((VALUE) & 0xffff0000) != 0 \
434 && ((VALUE) & 0x0000ffff) != 0) \
435 : (C) == 'L' ? ((VALUE) == 1) \
436 : (C) == 'M' ? ((VALUE) == -1) \
437 : (C) == 'N' ? ((VALUE) == 0) \
438 : (C) == 'O' ? (abs(VALUE) >1 && abs(VALUE) <= 4) \
441 /* Similar, but for floating constants, and defining letters G and H.
442 Here VALUE is the CONST_DOUBLE rtx itself. */
444 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
445 ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
448 /* Letters in the range `Q' through `U' may be defined in a
449 machine-dependent fashion to stand for arbitrary operand types.
450 The machine description macro `EXTRA_CONSTRAINT' is passed the
451 operand as its first argument and the constraint letter as its
454 `Q' is for memory references using take more than 1 instruction.
455 `R' is for memory references which take 1 word for the instruction. */
457 #define EXTRA_CONSTRAINT(OP,CODE) \
458 ((GET_CODE (OP) != MEM) ? 0 \
459 : !legitimate_address_p (GET_MODE (OP), XEXP (OP, 0)) ? 0 \
460 : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
461 : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
464 /* Given an rtx X being reloaded into a reg required to be
465 in class CLASS, return the class of reg to actually use.
466 In general this is just CLASS; but on some machines
467 in some cases it is preferable to use a more restrictive class.
469 loading is easier into LOAD_FPU_REGS than FPU_REGS! */
471 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
472 (((CLASS) != FPU_REGS)?(CLASS):LOAD_FPU_REGS)
474 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,x) \
475 (((CLASS) == NO_LOAD_FPU_REGS && !(REG_P(x) && LOAD_FPU_REG_P(REGNO(x))))?LOAD_FPU_REGS:NO_REGS)
477 /* Return the maximum number of consecutive registers
478 needed to represent mode MODE in a register of class CLASS. */
479 #define CLASS_MAX_NREGS(CLASS, MODE) \
480 ((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \
481 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \
486 /* Stack layout; function entry, exit and calling. */
488 /* Define this if pushing a word on the stack
489 makes the stack pointer a smaller address. */
490 #define STACK_GROWS_DOWNWARD
492 /* Define this if the nominal address of the stack frame
493 is at the high-address end of the local variables;
494 that is, each additional local variable allocated
495 goes at a more negative offset in the frame.
497 #define FRAME_GROWS_DOWNWARD
499 /* Offset within stack frame to start allocating local variables at.
500 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
501 first local allocated. Otherwise, it is the offset to the BEGINNING
502 of the first local allocated. */
503 #define STARTING_FRAME_OFFSET 0
505 /* If we generate an insn to push BYTES bytes,
506 this says how many the stack pointer really advances by.
507 On the pdp11, the stack is on an even boundary */
508 #define PUSH_ROUNDING(BYTES) ((BYTES + 1) & ~1)
510 /* current_first_parm_offset stores the # of registers pushed on the
512 extern int current_first_parm_offset;
514 /* Offset of first parameter from the argument pointer register value.
515 For the pdp11, this is non-zero to account for the return address.
517 2 - frame pointer (always saved, even when not used!!!!)
518 -- chnage some day !!!:q!
521 #define FIRST_PARM_OFFSET(FNDECL) 4
523 /* Value is 1 if returning from a function call automatically
524 pops the arguments described by the number-of-args field in the call.
525 FUNDECL is the declaration node of the function (as a tree),
526 FUNTYPE is the data type of the function (as a tree),
527 or for a library call it is an identifier node for the subroutine name. */
529 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
531 /* Define how to find the value returned by a function.
532 VALTYPE is the data type of the value (as a tree).
533 If the precise function being called is known, FUNC is its FUNCTION_DECL;
534 otherwise, FUNC is 0. */
535 #define BASE_RETURN_VALUE_REG(MODE) \
536 ((MODE) == DFmode ? 8 : 0)
538 /* On the pdp11 the value is found in R0 (or ac0???
539 not without FPU!!!! ) */
541 #define FUNCTION_VALUE(VALTYPE, FUNC) \
542 gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
544 /* and the called function leaves it in the first register.
545 Difference only on machines with register windows. */
547 #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
548 gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
550 /* Define how to find the value returned by a library function
551 assuming the value has mode MODE. */
553 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, BASE_RETURN_VALUE_REG(MODE))
555 /* 1 if N is a possible register number for a function value
556 as seen by the caller.
557 On the pdp, the first "output" reg is the only register thus used.
559 maybe ac0 ? - as option someday! */
561 #define FUNCTION_VALUE_REGNO_P(N) (((N) == 0) || (TARGET_AC0 && (N) == 8))
563 /* should probably return DImode and DFmode in memory,lest
566 have to, else we crash - exception: maybe return result in
567 ac0 if DFmode and FPU present - compatibility problem with
568 libraries for non-floating point ...
571 #define RETURN_IN_MEMORY(TYPE) \
572 (TYPE_MODE(TYPE) == DImode || (TYPE_MODE(TYPE) == DFmode && ! TARGET_AC0))
575 /* 1 if N is a possible register number for function argument passing.
578 #define FUNCTION_ARG_REGNO_P(N) 0
580 /* Define a data type for recording info about an argument list
581 during the scan of that argument list. This data type should
582 hold all necessary information about the function itself
583 and about the args processed so far, enough to enable macros
584 such as FUNCTION_ARG to determine where the next arg should go.
588 #define CUMULATIVE_ARGS int
590 /* Initialize a variable CUM of type CUMULATIVE_ARGS
591 for a call to a function whose data type is FNTYPE.
592 For a library call, FNTYPE is 0.
594 ...., the offset normally starts at 0, but starts at 1 word
595 when the function gets a structure-value-address as an
596 invisible first argument. */
598 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
601 /* Update the data in CUM to advance over an argument
602 of mode MODE and data type TYPE.
603 (TYPE is null for libcalls where that information may not be available.)
608 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
609 ((CUM) += ((MODE) != BLKmode \
610 ? (GET_MODE_SIZE (MODE)) \
611 : (int_size_in_bytes (TYPE))))
613 /* Determine where to put an argument to a function.
614 Value is zero to push the argument on the stack,
615 or a hard register in which to store the argument.
617 MODE is the argument's machine mode.
618 TYPE is the data type of the argument (as a tree).
619 This is null for libcalls where that information may
621 CUM is a variable of type CUMULATIVE_ARGS which gives info about
622 the preceding args and about the function being called.
623 NAMED is nonzero if this argument is a named parameter
624 (otherwise it is an extra parameter matching an ellipsis). */
626 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
628 /* Define where a function finds its arguments.
629 This would be different from FUNCTION_ARG if we had register windows. */
631 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
632 FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
635 /* For an arg passed partly in registers and partly in memory,
636 this is the number of registers used.
637 For args passed entirely in registers or entirely in memory, zero. */
639 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
641 /* Output assembler code to FILE to increment profiler label # LABELNO
642 for profiling a function entry. */
644 #define FUNCTION_PROFILER(FILE, LABELNO) \
647 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
648 the stack pointer does not matter. The value is tested only in
649 functions that have frame pointers.
650 No definition is equivalent to always zero. */
652 extern int may_call_alloca;
654 #define EXIT_IGNORE_STACK 1
656 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH_VAR) \
659 offset = get_frame_size(); \
660 for (regno = 0; regno < 8; regno++) \
661 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
663 for (regno = 8; regno < 14; regno++) \
664 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
666 /* offset -= 2; no fp on stack frame */ \
667 (DEPTH_VAR) = offset; \
671 /* Addressing modes, and classification of registers for them. */
673 #define HAVE_POST_INCREMENT 1
674 /* #define HAVE_POST_DECREMENT 0 */
676 #define HAVE_PRE_DECREMENT 1
677 /* #define HAVE_PRE_INCREMENT 0 */
679 /* Macros to check register numbers against specific register classes. */
681 /* These assume that REGNO is a hard or pseudo reg number.
682 They give nonzero only if REGNO is a hard reg of the suitable class
683 or a pseudo reg currently allocated to a suitable hard reg.
684 Since they use reg_renumber, they are safe only once reg_renumber
685 has been allocated, which happens in local-alloc.c. */
687 #define REGNO_OK_FOR_INDEX_P(REGNO) \
688 ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
689 #define REGNO_OK_FOR_BASE_P(REGNO) \
690 ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
692 /* Now macros that check whether X is a register and also,
693 strictly, whether it is in a specified class.
698 /* Maximum number of registers that can appear in a valid memory address. */
700 #define MAX_REGS_PER_ADDRESS 2
702 /* Recognize any constant value that is a valid address. */
704 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
706 /* Nonzero if the constant value X is a legitimate general operand.
707 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
709 #define LEGITIMATE_CONSTANT_P(X) (1)
711 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
712 and check its validity for a certain class.
713 We have two alternate definitions for each of them.
714 The usual definition accepts all pseudo regs; the other rejects
715 them unless they have been allocated suitable hard regs.
716 The symbol REG_OK_STRICT causes the latter definition to be used.
718 Most source files want to accept pseudo regs in the hope that
719 they will get allocated to the class that the insn wants them to be in.
720 Source files for reload pass need to be strict.
721 After reload, it makes no difference, since pseudo regs have
722 been eliminated by then. */
724 #ifndef REG_OK_STRICT
726 /* Nonzero if X is a hard reg that can be used as an index
727 or if it is a pseudo reg. */
728 #define REG_OK_FOR_INDEX_P(X) (1)
729 /* Nonzero if X is a hard reg that can be used as a base reg
730 or if it is a pseudo reg. */
731 #define REG_OK_FOR_BASE_P(X) (1)
735 /* Nonzero if X is a hard reg that can be used as an index. */
736 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
737 /* Nonzero if X is a hard reg that can be used as a base reg. */
738 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
742 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
743 that is a valid memory address for an instruction.
744 The MODE argument is the machine mode for the MEM expression
745 that wants to use this address.
749 #define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
754 if (GET_CODE (operand) == REG \
755 && REG_OK_FOR_BASE_P(operand)) \
758 /* accept @#address */ \
759 if (CONSTANT_ADDRESS_P (operand)) \
763 if (GET_CODE (operand) == PLUS \
764 && GET_CODE (XEXP (operand, 0)) == REG \
765 && REG_OK_FOR_BASE_P (XEXP (operand, 0)) \
766 && CONSTANT_ADDRESS_P (XEXP (operand, 1))) \
770 if (GET_CODE (operand) == PRE_DEC \
771 && GET_CODE (XEXP (operand, 0)) == REG \
772 && REG_OK_FOR_BASE_P (XEXP (operand, 0))) \
776 if (GET_CODE (operand) == POST_INC \
777 && GET_CODE (XEXP (operand, 0)) == REG \
778 && REG_OK_FOR_BASE_P (XEXP (operand, 0))) \
781 /* handle another level of indirection ! */ \
782 if (GET_CODE(operand) != MEM) \
785 xfoob = XEXP (operand, 0); \
787 /* (MEM:xx (MEM:xx ())) is not valid for SI, DI and currently */ \
788 /* also forbidden for float, because we have to handle this */ \
789 /* in output_move_double and/or output_move_quad() - we could */ \
790 /* do it, but currently it's not worth it!!! */ \
791 /* now that DFmode cannot go into CPU register file, */ \
792 /* maybe I should allow float ... */ \
793 /* but then I have to handle memory-to-memory moves in movdf ?? */ \
795 if (GET_MODE_BITSIZE(mode) > 16) \
798 /* accept @(R0) - which is @0(R0) */ \
799 if (GET_CODE (xfoob) == REG \
800 && REG_OK_FOR_BASE_P(xfoob)) \
803 /* accept @address */ \
804 if (CONSTANT_ADDRESS_P (xfoob)) \
807 /* accept @X(R0) */ \
808 if (GET_CODE (xfoob) == PLUS \
809 && GET_CODE (XEXP (xfoob, 0)) == REG \
810 && REG_OK_FOR_BASE_P (XEXP (xfoob, 0)) \
811 && CONSTANT_ADDRESS_P (XEXP (xfoob, 1))) \
814 /* accept @-(R0) */ \
815 if (GET_CODE (xfoob) == PRE_DEC \
816 && GET_CODE (XEXP (xfoob, 0)) == REG \
817 && REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \
820 /* accept @(R0)+ */ \
821 if (GET_CODE (xfoob) == POST_INC \
822 && GET_CODE (XEXP (xfoob, 0)) == REG \
823 && REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \
826 /* anything else is invalid */ \
831 /* Try machine-dependent ways of modifying an illegitimate address
832 to be legitimate. If we find one, return the new, valid address.
833 This macro is used in only one place: `memory_address' in explow.c.
835 OLDX is the address as it was before break_out_memory_refs was called.
836 In some cases it is useful to look at this to decide what needs to be done.
838 MODE and WIN are passed so that this macro can use
839 GO_IF_LEGITIMATE_ADDRESS.
841 It is always safe for this macro to do nothing. It exists to recognize
842 opportunities to optimize the output. */
844 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
847 /* Go to LABEL if ADDR (a legitimate address expression)
848 has an effect that depends on the machine mode it is used for.
849 On the pdp this is for predec/postinc */
851 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
852 { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
857 /* Specify the machine mode that this machine uses
858 for the index in the tablejump instruction. */
859 #define CASE_VECTOR_MODE HImode
861 /* Define this if a raw index is all that is needed for a
863 #define CASE_TAKES_INDEX_RAW
865 /* Define as C expression which evaluates to nonzero if the tablejump
866 instruction expects the table to contain offsets from the address of the
868 Do not define this if the table should contain absolute addresses. */
869 /* #define CASE_VECTOR_PC_RELATIVE 1 */
871 /* Define this as 1 if `char' should by default be signed; else as 0. */
872 #define DEFAULT_SIGNED_CHAR 1
874 /* Max number of bytes we can move from memory to memory
875 in one reasonably fast instruction.
880 /* Nonzero if access to memory by byte is slow and undesirable. -
882 #define SLOW_BYTE_ACCESS 0
884 /* Do not break .stabs pseudos into continuations. */
885 #define DBX_CONTIN_LENGTH 0
887 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
888 is done just by pretending it is already truncated. */
889 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
892 /* Add any extra modes needed to represent the condition code.
894 CCFPmode is used for FPU, but should we use a separate reg? */
895 #define EXTRA_CC_MODES CC(CCFPmode, "CCFP")
897 /* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
898 return the mode to be used for the comparison. For floating-point, CCFPmode
901 #define SELECT_CC_MODE(OP,X,Y) \
902 (GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode)
904 /* We assume that the store-condition-codes instructions store 0 for false
905 and some other value for true. This is the value stored for true. */
907 /* #define STORE_FLAG_VALUE 1 */
909 /* Specify the machine mode that pointers have.
910 After generation of rtl, the compiler makes no further distinction
911 between pointers and any other objects of this machine mode. */
914 /* A function address in a call instruction
915 is a word address (for indexing purposes)
916 so give the MEM rtx a word's mode. */
917 #define FUNCTION_MODE HImode
919 /* Define this if addresses of constant functions
920 shouldn't be put through pseudo regs where they can be cse'd.
921 Desirable on machines where ordinary constants are expensive
922 but a CALL with constant address is cheap. */
923 /* #define NO_FUNCTION_CSE */
925 /* Compute the cost of computing a constant rtl expression RTX
926 whose rtx-code is CODE. The body of this macro is a portion
927 of a switch statement. If the code is computed here,
928 return it with a return statement. Otherwise, break from the switch.
930 -1, 0, 1 are cheaper for add, sub ...
933 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
935 if (INTVAL(RTX) == 0 \
936 || INTVAL(RTX) == -1 \
937 || INTVAL(RTX) == 1) \
942 /* twice as expensive as REG */ \
945 /* twice (or 4 times) as expensive as 16 bit */ \
948 /* cost of moving one register class to another */
949 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
950 register_move_cost (CLASS1, CLASS2)
952 /* Tell emit-rtl.c how to initialize special values on a per-function base. */
954 extern struct rtx_def *cc0_reg_rtx;
956 #define CC_STATUS_MDEP rtx
958 #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
960 /* Tell final.c how to eliminate redundant test instructions. */
962 /* Here we define machine-dependent flags and fields in cc_status
963 (see `conditions.h'). */
965 #define CC_IN_FPU 04000
967 /* Do UPDATE_CC if EXP is a set, used in
970 floats only do compare correctly, else nullify ...
975 /* Store in cc_status the expressions
976 that the condition codes will describe
977 after execution of an instruction whose pattern is EXP.
978 Do not alter them if the instruction would not alter the cc's. */
980 #define NOTICE_UPDATE_CC(EXP, INSN) \
981 { if (GET_CODE (EXP) == SET) \
983 notice_update_cc_on_set(EXP, INSN); \
985 else if (GET_CODE (EXP) == PARALLEL \
986 && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
988 notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \
990 else if (GET_CODE (EXP) == CALL) \
991 { /* all bets are off */ CC_STATUS_INIT; } \
992 if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
993 && cc_status.value2 \
994 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
996 printf ("here!\n"); \
997 cc_status.value2 = 0; \
1001 /* Control the assembler format that we output. */
1003 /* Output at beginning of assembler file. */
1006 #define ASM_FILE_START(FILE) \
1008 fprintf (FILE, "\t.data\n"), \
1009 fprintf (FILE, "$help$: . = .+8 ; space for tmp moves!\n") \
1010 /* do we need reg def's R0 = %0 etc ??? */ \
1013 #define ASM_FILE_START(FILE)
1017 /* Output to assembler file text saying following lines
1018 may contain character constants, extra white space, comments, etc. */
1020 #define ASM_APP_ON ""
1022 /* Output to assembler file text saying following lines
1023 no longer contain unusual constructs. */
1025 #define ASM_APP_OFF ""
1027 /* Output before read-only data. */
1029 #define TEXT_SECTION_ASM_OP "\t.text\n"
1031 /* Output before writable data. */
1033 #define DATA_SECTION_ASM_OP "\t.data\n"
1035 /* How to refer to registers in assembler output.
1036 This sequence is indexed by compiler's hard-register-number (see above). */
1038 #define REGISTER_NAMES \
1039 {"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \
1040 "ac0", "ac1", "ac2", "ac3", "ac4", "ac5" }
1042 /* This is how to output the definition of a user-level label named NAME,
1043 such as the label on a static function or variable NAME. */
1045 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1046 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1048 /* This is how to output a command to make the user-level label named NAME
1049 defined for reference from other files. */
1051 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1052 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs("\n", FILE); } while (0)
1054 /* The prefix to add to user-visible assembler symbols. */
1056 #define USER_LABEL_PREFIX "_"
1058 /* This is how to output an internal numbered label where
1059 PREFIX is the class of label and NUM is the number within the class. */
1061 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1062 fprintf (FILE, "%s_%d:\n", PREFIX, NUM)
1064 /* This is how to store into the string LABEL
1065 the symbol_ref name of an internal numbered label where
1066 PREFIX is the class of label and NUM is the number within the class.
1067 This is suitable for output with `assemble_name'. */
1069 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1070 sprintf (LABEL, "*%s_%d", PREFIX, NUM)
1072 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1073 output_ascii (FILE, P, SIZE)
1075 /* This is how to output an element of a case-vector that is absolute. */
1077 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1078 fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE)
1080 /* This is how to output an element of a case-vector that is relative.
1081 Don't define this if it is not supported. */
1083 /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
1085 /* This is how to output an assembler line
1086 that says to advance the location counter
1087 to a multiple of 2**LOG bytes.
1092 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1098 fprintf (FILE, "\t.even\n"); \
1104 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1105 fprintf (FILE, "\t.=.+ %o\n", (SIZE))
1107 /* This says how to output an assembler line
1108 to define a global common symbol. */
1110 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1111 ( fprintf ((FILE), ".globl "), \
1112 assemble_name ((FILE), (NAME)), \
1113 fprintf ((FILE), "\n"), \
1114 assemble_name ((FILE), (NAME)), \
1115 fprintf ((FILE), ": .=.+ %o\n", (ROUNDED)) \
1118 /* This says how to output an assembler line
1119 to define a local common symbol. */
1121 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1122 ( assemble_name ((FILE), (NAME)), \
1123 fprintf ((FILE), ":\t.=.+ %o\n", (ROUNDED)))
1125 /* Store in OUTPUT a string (made with alloca) containing
1126 an assembler-name for a local static variable named NAME.
1127 LABELNO is an integer which is different for each call. */
1129 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1130 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1131 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1133 /* Print operand X (an rtx) in assembler syntax to file FILE.
1134 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1135 For `%' followed by punctuation, CODE is the punctuation and X is null.
1140 #define PRINT_OPERAND(FILE, X, CODE) \
1141 { if (CODE == '#') fprintf (FILE, "#"); \
1142 else if (GET_CODE (X) == REG) \
1143 fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1144 else if (GET_CODE (X) == MEM) \
1145 output_address (XEXP (X, 0)); \
1146 else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != SImode) \
1147 { union { double d; int i[2]; } u; \
1148 u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
1149 fprintf (FILE, "#%.20e", u.d); } \
1150 else { putc ('$', FILE); output_addr_const_pdp11 (FILE, X); }}
1152 /* Print a memory address as an operand to reference that memory location. */
1154 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1155 print_operand_address (FILE, ADDR)
1157 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1159 fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \
1162 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1164 fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \
1167 /* trampoline - how should i do it in separate i+d ?
1168 have some allocate_trampoline magic???
1170 the following should work for shared I/D: */
1172 /* lets see whether this works as trampoline:
1173 MV #STATIC, $4 0x940Y 0x0000 <- STATIC; Y = STATIC_CHAIN_REGNUM
1174 JMP FUNCTION 0x0058 0x0000 <- FUNCTION
1177 #define TRAMPOLINE_TEMPLATE(FILE) \
1182 assemble_aligned_integer (2, GEN_INT (0x9400+STATIC_CHAIN_REGNUM)); \
1183 assemble_aligned_integer (2, const0_rtx); \
1184 assemble_aligned_integer (2, GEN_INT(0x0058)); \
1185 assemble_aligned_integer (2, const0_rtx); \
1188 #define TRAMPOLINE_SIZE 8
1189 #define TRAMPOLINE_ALIGNMENT 16
1191 /* Emit RTL insns to initialize the variable parts of a trampoline.
1192 FNADDR is an RTX for the address of the function's pure code.
1193 CXT is an RTX for the static chain value for the function. */
1195 #define INITIALIZE_TRAMPOLINE(TRAMP,FNADDR,CXT) \
1200 emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 2)), CXT); \
1201 emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 6)), FNADDR); \
1205 /* Some machines may desire to change what optimizations are
1206 performed for various optimization levels. This macro, if
1207 defined, is executed once just after the optimization level is
1208 determined and before the remainder of the command options have
1209 been parsed. Values set in this macro are used as the default
1210 values for the other command line options.
1212 LEVEL is the optimization level specified; 2 if -O2 is
1213 specified, 1 if -O is specified, and 0 if neither is specified. */
1215 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
1220 flag_inline_functions = 1; \
1221 flag_omit_frame_pointer = 1; \
1222 /* flag_unroll_loops = 1; */ \
1227 /* Provide the costs of a rtl expression. This is in the body of a
1230 we don't say how expensive SImode is - pretty expensive!!!
1232 there is something wrong in MULT because MULT is not
1233 as cheap as total = 2 even if we can shift!
1235 if optimizing for size make mult etc cheap, but not 1, so when
1236 in doubt the faster insn is chosen.
1239 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1241 if (optimize_size) \
1242 total = COSTS_N_INSNS(2); \
1244 total = COSTS_N_INSNS (11); \
1247 if (optimize_size) \
1248 total = COSTS_N_INSNS(2); \
1250 total = COSTS_N_INSNS (25); \
1253 if (optimize_size) \
1254 total = COSTS_N_INSNS(2); \
1256 total = COSTS_N_INSNS (26); \
1259 /* equivalent to length, so same for optimize_size */ \
1260 total = COSTS_N_INSNS (3); \
1263 /* only used for: qi->hi */ \
1264 total = COSTS_N_INSNS(1); \
1267 if (GET_MODE(X) == HImode) \
1268 total = COSTS_N_INSNS(1); \
1269 else if (GET_MODE(X) == SImode) \
1270 total = COSTS_N_INSNS(6); \
1272 total = COSTS_N_INSNS(2); \
1274 /* case LSHIFT: */ \
1278 if (optimize_size) \
1279 total = COSTS_N_INSNS(1); \
1280 else if (GET_MODE(X) == QImode) \
1282 if (GET_CODE(XEXP (X,1)) != CONST_INT) \
1283 total = COSTS_N_INSNS(8); /* worst case */ \
1285 total = COSTS_N_INSNS(INTVAL(XEXP (X,1))); \
1287 else if (GET_MODE(X) == HImode) \
1289 if (GET_CODE(XEXP (X,1)) == CONST_INT) \
1291 if (abs (INTVAL (XEXP (X, 1))) == 1) \
1292 total = COSTS_N_INSNS(1); \
1294 total = COSTS_N_INSNS(2.5 + 0.5 *INTVAL(XEXP(X,1))); \
1296 else /* worst case */ \
1297 total = COSTS_N_INSNS (10); \
1299 else if (GET_MODE(X) == SImode) \
1301 if (GET_CODE(XEXP (X,1)) == CONST_INT) \
1302 total = COSTS_N_INSNS(2.5 + 0.5 *INTVAL(XEXP(X,1))); \
1303 else /* worst case */ \
1304 total = COSTS_N_INSNS(18); \
1309 /* there is no point in avoiding branches on a pdp,
1310 since branches are really cheap - I just want to find out
1311 how much difference the BRANCH_COST macro makes in code */
1312 #define BRANCH_COST (TARGET_BRANCH_CHEAP ? 0 : 1)
1315 #define COMPARE_FLAG_MODE HImode