1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@mcc.com)
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 enum cmp_type /* comparison type */
25 CMP_SI, /* compare integers */
26 CMP_SF, /* compare single precision floats */
27 CMP_DF, /* compare double precision floats */
28 CMP_MAX /* max comparison type */
31 /* For long call handling. */
32 extern unsigned int total_code_bytes;
34 /* Print subsidiary information on the compiler version in use. */
36 #define TARGET_VERSION fprintf (stderr, " (hppa)");
38 /* Run-time compilation parameters selecting different hardware subsets. */
40 extern int target_flags;
42 /* compile code for HP-PA 1.1 ("Snake") */
44 #define TARGET_SNAKE (target_flags & 1)
46 /* Disable all FP registers (they all become fixed). This may be necessary
47 for compiling kernels which perform lazy context switching of FP regs.
48 Note if you use this option and try to perform floating point operations
49 the compiler will abort! */
51 #define TARGET_DISABLE_FPREGS (target_flags & 2)
53 /* Generate code which assumes that calls through function pointers will
54 never cross a space boundary. Such assumptions are generally safe for
55 building kernels and statically linked executables. Code compiled with
56 this option will fail miserably if the executable is dynamically linked
57 or uses nested functions! */
58 #define TARGET_FAST_INDIRECT_CALLS (target_flags & 4)
60 /* Allow unconditional jumps in the delay slots of call instructions. */
61 #define TARGET_JUMP_IN_DELAY (target_flags & 8)
63 /* In rare cases, a millicode call via "bl" can not be turned into
64 a millicode call using "ble" (when SHLIB_INFO subspace is very large).
66 This option forces just millicode calls to use inline long-calls
67 This is far more efficient than the old long-call option which forced
68 every function to be called indirectly (as is still the case for
69 TARGET_PORTABLE_RUNTIME).
71 ??? What about simple jumps, they can suffer from the same problem.
72 Would require significant surgery in pa.md. */
74 #define TARGET_MILLICODE_LONG_CALLS (target_flags & 16)
76 /* Disable indexed addressing modes. */
78 #define TARGET_DISABLE_INDEXING (target_flags & 32)
80 /* Emit code which follows the new portable runtime calling conventions
81 HP wants everyone to use for ELF objects. If at all possible you want
82 to avoid this since it's a performance loss for non-prototyped code.
84 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
85 long-call stubs which is quite expensive. */
87 #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
89 /* Emit directives only understood by GAS. This allows parameter
90 relocations to work for static functions. There is no way
91 to make them work the HP assembler at this time. */
93 #define TARGET_GAS (target_flags & 128)
95 /* Macro to define tables used to set the flags.
96 This is a list in braces of pairs in braces,
97 each pair being { "NAME", VALUE }
98 where VALUE is the bits to set or minus the bits to clear.
99 An empty string NAME is used to identify the default VALUE. */
101 #define TARGET_SWITCHES \
104 {"pa-risc-1-0", -1}, \
105 {"pa-risc-1-1", 1}, \
106 {"disable-fpregs", 2}, \
107 {"no-disable-fpregs", 2}, \
108 {"fast-indirect-calls", 4}, \
109 {"no-fast-indirect-calls", -4},\
110 {"jump-in-delay", 8}, \
111 {"no-jump-in-delay", -8}, \
112 {"millicode-long-calls", 16},\
113 {"no-millicode-long-calls", -16},\
114 {"disable-indexing", 32}, \
115 {"no-disable-indexing", -32},\
116 {"portable-runtime", 64+16},\
117 {"no-portable-runtime", -(64+16)},\
120 { "", TARGET_DEFAULT}}
122 #ifndef TARGET_DEFAULT
123 #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
126 #define DBX_DEBUGGING_INFO
127 #define DEFAULT_GDB_EXTENSIONS 1
129 /* This is the way other stabs-in-XXX tools do things. We will be
131 #define DBX_BLOCKS_FUNCTION_RELATIVE 1
133 /* Likewise for linenos.
135 We make the first line stab special to avoid adding several
136 gross hacks to GAS. */
137 #undef ASM_OUTPUT_SOURCE_LINE
138 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
139 { static int sym_lineno = 1; \
140 static tree last_function_decl = NULL; \
141 if (current_function_decl == last_function_decl) \
142 fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
144 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
147 fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
148 last_function_decl = current_function_decl; \
151 /* But, to make this work, we have to output the stabs for the function
153 #define DBX_FUNCTION_FIRST
155 /* Only lables should ever begin in colunm zero. */
156 #define ASM_STABS_OP "\t.stabs"
157 #define ASM_STABN_OP "\t.stabn"
159 /* GDB always assumes the current function's frame begins at the value
160 of the stack pointer upon entry to the current function. Accessing
161 local variables and parameters passed on the stack is done using the
162 base of the frame + an offset provided by GCC.
164 For functions which have frame pointers this method works fine;
165 the (frame pointer) == (stack pointer at function entry) and GCC provides
166 an offset relative to the frame pointer.
168 This loses for functions without a frame pointer; GCC provides an offset
169 which is relative to the stack pointer after adjusting for the function's
170 frame size. GDB would prefer the offset to be relative to the value of
171 the stack pointer at the function's entry. Yuk! */
172 #define DEBUGGER_AUTO_OFFSET(X) \
173 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
174 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
176 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
177 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
178 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
180 /* gdb needs a null N_SO at the end of each file for scattered loading. */
182 #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END
183 #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \
185 "%s\t.text\n\t.stabs \"%s\",%d,0,0,L$text_end\nL$text_end:\n",\
186 TEXT_SECTION_ASM_OP, "" , N_SO)
188 #if (TARGET_DEFAULT & 1) == 0
189 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
190 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
192 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:-D__hp9000s700 -D_PA_RISC1_1}}"
195 /* Defines for a K&R CC */
197 #define CC1_SPEC "%{pg:} %{p:}"
199 #define LINK_SPEC "-u main"
201 /* Allow $ in identifiers. */
202 #define DOLLARS_IN_IDENTIFIERS 2
204 /* Make gcc agree with <machine/ansi.h> */
206 #define SIZE_TYPE "unsigned int"
207 #define PTRDIFF_TYPE "int"
208 #define WCHAR_TYPE "unsigned int"
209 #define WCHAR_TYPE_SIZE 32
211 /* Show we can debug even without a frame pointer. */
212 #define CAN_DEBUG_WITHOUT_FP
214 /* Names to predefine in the preprocessor for this target machine. */
216 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
218 /* target machine storage layout */
220 /* Define this if most significant bit is lowest numbered
221 in instructions that operate on numbered bit-fields. */
222 #define BITS_BIG_ENDIAN 1
224 /* Define this if most significant byte of a word is the lowest numbered. */
225 /* That is true on the HP-PA. */
226 #define BYTES_BIG_ENDIAN 1
228 /* Define this if most significant word of a multiword number is lowest
230 /* For the HP-PA we can decide arbitrarily
231 since there are no machine instructions for them. */
232 #define WORDS_BIG_ENDIAN 1
234 /* number of bits in an addressable storage unit */
235 #define BITS_PER_UNIT 8
237 /* Width in bits of a "word", which is the contents of a machine register.
238 Note that this is not necessarily the width of data type `int';
239 if using 16-bit ints on a 68000, this would still be 32.
240 But on a machine with 16-bit registers, this would be 16. */
241 #define BITS_PER_WORD 32
243 /* Width of a word, in units (bytes). */
244 #define UNITS_PER_WORD 4
246 /* Width in bits of a pointer.
247 See also the macro `Pmode' defined below. */
248 #define POINTER_SIZE 32
250 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
251 #define PARM_BOUNDARY 32
253 /* Largest alignment required for any stack parameter, in bits.
254 Don't define this if it is equal to PARM_BOUNDARY */
255 #define MAX_PARM_BOUNDARY 64
257 /* Boundary (in *bits*) on which stack pointer should be aligned. */
258 #define STACK_BOUNDARY 512
260 /* Allocation boundary (in *bits*) for the code of a function. */
261 #define FUNCTION_BOUNDARY 32
263 /* Alignment of field after `int : 0' in a structure. */
264 #define EMPTY_FIELD_BOUNDARY 32
266 /* Every structure's size must be a multiple of this. */
267 #define STRUCTURE_SIZE_BOUNDARY 8
269 /* A bitfield declared as `int' forces `int' alignment for the struct. */
270 #define PCC_BITFIELD_TYPE_MATTERS 1
272 /* No data type wants to be aligned rounder than this. */
273 #define BIGGEST_ALIGNMENT 64
275 /* The .align directive in the HP assembler allows up to a 32 alignment. */
276 #define MAX_OFILE_ALIGNMENT 32768
278 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
279 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
280 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
282 /* Make arrays of chars word-aligned for the same reasons. */
283 #define DATA_ALIGNMENT(TYPE, ALIGN) \
284 (TREE_CODE (TYPE) == ARRAY_TYPE \
285 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
286 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
289 /* Set this nonzero if move instructions will actually fail to work
290 when given unaligned data. */
291 #define STRICT_ALIGNMENT 1
293 /* Generate calls to memcpy, memcmp and memset. */
294 #define TARGET_MEM_FUNCTIONS
296 /* Standard register usage. */
298 /* Number of actual hardware registers.
299 The hardware registers are assigned numbers for the compiler
300 from 0 to just below FIRST_PSEUDO_REGISTER.
301 All registers that the compiler knows about must be given numbers,
302 even those that are not normally considered general registers.
304 HP-PA 1.0 has 32 fullword registers and 16 floating point
305 registers. The floating point registers hold either word or double
308 16 additional registers are reserved.
310 HP-PA 1.1 has 32 fullword registers and 32 floating point
311 registers. However, the floating point registers behave
312 differently: the left and right halves of registers are addressable
313 as 32 bit registers. So, we will set things up like the 68k which
314 has different fp units: define separate register sets for the 1.0
317 #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
320 /* 1 for registers that have pervasive standard uses
321 and are not available for the register allocator.
323 On the HP-PA, these are:
324 Reg 0 = 0 (hardware). However, 0 is used for condition code,
326 Reg 1 = ADDIL target/Temporary (hardware).
327 Reg 2 = Return Pointer
328 Reg 3 = Frame Pointer
329 Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
330 Reg 4-18 = Preserved Registers
331 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
332 Reg 20-22 = Temporary Registers
333 Reg 23-26 = Temporary/Parameter Registers
334 Reg 27 = Global Data Pointer (hp)
335 Reg 28 = Temporary/???/Return Value register
336 Reg 29 = Temporary/Static Chain/Return Value register
337 Reg 30 = stack pointer
338 Reg 31 = Temporary/Millicode Return Pointer (hp)
340 Freg 0-3 = Status Registers -- Not known to the compiler.
341 Freg 4-7 = Arguments/Return Value
342 Freg 8-11 = Temporary Registers
343 Freg 12-15 = Preserved Registers
345 Freg 16-31 = Reserved
347 On the Snake, fp regs are
349 Freg 0-3 = Status Registers -- Not known to the compiler.
350 Freg 4L-7R = Arguments/Return Value
351 Freg 8L-11R = Temporary Registers
352 Freg 12L-21R = Preserved Registers
353 Freg 22L-31R = Temporary Registers
357 #define FIXED_REGISTERS \
358 {0, 0, 0, 0, 0, 0, 0, 0, \
359 0, 0, 0, 0, 0, 0, 0, 0, \
360 0, 0, 0, 0, 0, 0, 0, 0, \
361 0, 0, 0, 1, 0, 0, 1, 0, \
363 0, 0, 0, 0, 0, 0, 0, 0, \
364 0, 0, 0, 0, 0, 0, 0, 0, \
365 0, 0, 0, 0, 0, 0, 0, 0, \
366 0, 0, 0, 0, 0, 0, 0, 0, \
367 0, 0, 0, 0, 0, 0, 0, 0, \
368 0, 0, 0, 0, 0, 0, 0, 0, \
369 0, 0, 0, 0, 0, 0, 0, 0, \
372 /* 1 for registers not available across function calls.
373 These must include the FIXED_REGISTERS and also any
374 registers that can be used without being saved.
375 The latter must include the registers where values are returned
376 and the register where structure-value addresses are passed.
377 Aside from that, you can include as many other registers as you like. */
378 #define CALL_USED_REGISTERS \
379 {1, 1, 1, 0, 0, 0, 0, 0, \
380 0, 0, 0, 0, 0, 0, 0, 0, \
381 0, 0, 0, 1, 1, 1, 1, 1, \
382 1, 1, 1, 1, 1, 1, 1, 1, \
384 1, 1, 1, 1, 1, 1, 1, 1, \
385 1, 1, 1, 1, 1, 1, 1, 1, \
386 0, 0, 0, 0, 0, 0, 0, 0, \
387 0, 0, 0, 0, 0, 0, 0, 0, \
388 0, 0, 0, 0, 1, 1, 1, 1, \
389 1, 1, 1, 1, 1, 1, 1, 1, \
390 1, 1, 1, 1, 1, 1, 1, 1, \
393 #define CONDITIONAL_REGISTER_USAGE \
397 for (i = 56; i < 88; i++) \
398 fixed_regs[i] = call_used_regs[i] = 1; \
399 for (i = 33; i < 88; i += 2) \
400 fixed_regs[i] = call_used_regs[i] = 1; \
402 else if (TARGET_DISABLE_FPREGS) \
404 for (i = 32; i < 88; i++) \
405 fixed_regs[i] = call_used_regs[i] = 1; \
408 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
411 /* Allocate the call used registers first. This should minimize
412 the number of registers that need to be saved (as call used
413 registers will generally not be allocated across a call).
415 Experimentation has shown slightly better results by allocating
416 FP registers first. */
418 #define REG_ALLOC_ORDER \
420 /* caller-saved fp regs. */ \
421 40, 41, 42, 43, 44, 45, 46, 47, \
422 68, 69, 70, 71, 72, 73, 74, 75, \
423 76, 77, 78, 79, 80, 81, 82, 83, \
425 32, 33, 34, 35, 36, 37, 38, 39, \
426 /* caller-saved general regs. */ \
427 19, 20, 21, 22, 23, 24, 25, 26, \
429 /* callee-saved fp regs. */ \
430 48, 49, 50, 51, 52, 53, 54, 55, \
431 56, 57, 58, 59, 60, 61, 62, 63, \
433 /* callee-saved general regs. */ \
434 3, 4, 5, 6, 7, 8, 9, 10, \
435 11, 12, 13, 14, 15, 16, 17, 18, \
436 /* special registers. */ \
440 /* True if register is floating-point. */
441 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
443 /* Return number of consecutive hard regs needed starting at reg REGNO
444 to hold something of mode MODE.
445 This is ordinarily the length in words of a value of mode MODE
446 but can be less for certain modes in special long registers.
448 On the HP-PA, ordinary registers hold 32 bits worth;
449 The floating point registers are 64 bits wide. Snake fp regs are 32
451 #define HARD_REGNO_NREGS(REGNO, MODE) \
452 (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
453 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
455 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
456 On the HP-PA, the cpu registers can hold any mode. We
457 force this to be an even register is it cannot hold the full mode. */
458 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
459 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
460 /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
461 : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
462 ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
463 /* Make wide modes be in aligned registers. */ \
464 : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
466 /* Value is 1 if it is a good idea to tie two pseudo registers
467 when one has mode MODE1 and one has mode MODE2.
468 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
469 for any hard reg, then this must be 0 for correct output. */
470 #define MODES_TIEABLE_P(MODE1, MODE2) \
471 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
473 /* Specify the registers used for certain standard purposes.
474 The values of these macros are register numbers. */
476 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
477 /* #define PC_REGNUM */
479 /* Register to use for pushing function arguments. */
480 #define STACK_POINTER_REGNUM 30
482 /* Base register for access to local variables of the function. */
483 #define FRAME_POINTER_REGNUM 3
485 /* Value should be nonzero if functions must have frame pointers. */
486 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
489 /* C statement to store the difference between the frame pointer
490 and the stack pointer values immediately after the function prologue.
492 Note, we always pretend that this is a leaf function because if
493 it's not, there's no point in trying to eliminate the
494 frame pointer. If it is a leaf function, we guessed right! */
495 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
496 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
498 /* Base register for access to arguments of the function. */
499 #define ARG_POINTER_REGNUM 3
501 /* Register in which static-chain is passed to a function. */
503 #define STATIC_CHAIN_REGNUM 29
505 /* Register which holds offset table for position-independent
508 #define PIC_OFFSET_TABLE_REGNUM 19
509 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
511 /* Initialize hppa_save_pic_table_rtx before RTL generation for
512 each function. We used to do this in FINALIZE_PIC, but FINALIZE_PIC
513 isn't always called for static inline functions. */
514 #define INIT_EXPANDERS hppa_save_pic_table_rtx = 0;
516 /* SOM ABI says that objects larger than 64 bits are returned in memory. */
517 #define RETURN_IN_MEMORY(TYPE) \
518 (TYPE_MODE (TYPE) == BLKmode || int_size_in_bytes (TYPE) > 8)
520 /* Register in which address to store a structure value
521 is passed to a function. */
522 #define STRUCT_VALUE_REGNUM 28
524 /* Define the classes of registers for register constraints in the
525 machine description. Also define ranges of constants.
527 One of the classes must always be named ALL_REGS and include all hard regs.
528 If there is more than one class, another class must be named NO_REGS
529 and contain no registers.
531 The name GENERAL_REGS must be the name of a class (or an alias for
532 another name such as ALL_REGS). This is the class of registers
533 that is allowed by "g" or "r" in a register constraint.
534 Also, registers outside this class are allocated only when
535 instructions express preferences for them.
537 The classes must be numbered in nondecreasing order; that is,
538 a larger-numbered class must never be contained completely
539 in a smaller-numbered class.
541 For any two classes, it is very desirable that there be another
542 class that represents their union. */
544 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
545 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
546 fmpyadd and fmpysub are restricted. */
548 enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
549 SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
551 #define N_REG_CLASSES (int) LIM_REG_CLASSES
553 /* Give names of register classes as strings for dump file. */
555 #define REG_CLASS_NAMES \
556 {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \
557 "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
559 /* Define which registers fit in which classes.
560 This is an initializer for a vector of HARD_REG_SET
561 of length N_REG_CLASSES. Register 0, the "condition code" register,
564 #define REG_CLASS_CONTENTS \
565 {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
566 {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
567 {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
568 {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
569 {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
570 {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
571 {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
573 /* The same information, inverted:
574 Return the class number of the smallest class containing
575 reg number REGNO. This could be a conditional expression
576 or could index an array. */
578 #define REGNO_REG_CLASS(REGNO) \
579 ((REGNO) == 0 ? NO_REGS \
580 : (REGNO) == 1 ? R1_REGS \
581 : (REGNO) < 32 ? GENERAL_REGS \
582 : (REGNO) < 88 ? FP_REGS \
585 /* The class value for index registers, and the one for base regs. */
586 #define INDEX_REG_CLASS GENERAL_REGS
587 #define BASE_REG_CLASS GENERAL_REGS
589 #define FP_REG_CLASS_P(CLASS) \
592 /* Get reg_class from a letter such as appears in the machine description. */
593 /* Keep 'x' for backward compatibility with user asm. */
594 #define REG_CLASS_FROM_LETTER(C) \
595 ((C) == 'f' ? FP_REGS : \
596 (C) == 'x' ? FP_REGS : \
597 (C) == 'q' ? SHIFT_REGS : \
598 (C) == 'a' ? R1_REGS : \
599 (C) == 'Z' ? ALL_REGS : NO_REGS)
601 /* The letters I, J, K, L and M in a register constraint string
602 can be used to stand for particular ranges of immediate operands.
603 This macro defines what the ranges are.
604 C is the letter, and VALUE is a constant value.
605 Return 1 if VALUE is in the range specified by C.
607 `I' is used for the 11 bit constants.
608 `J' is used for the 14 bit constants.
609 `K' is used for values that can be moved with a zdepi insn.
610 `L' is used for the 5 bit constants.
612 `N' is used for values with the least significant 11 bits equal to zero.
613 `O' is used for numbers n such that n+1 is a power of 2.
616 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
617 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
618 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
619 : (C) == 'K' ? zdepi_cint_p (VALUE) \
620 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
621 : (C) == 'M' ? (VALUE) == 0 \
622 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
623 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
624 : (C) == 'P' ? and_mask_p (VALUE) \
627 /* Similar, but for floating or large integer constants, and defining letters
628 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
630 For PA, `G' is the floating-point constant zero. `H' is undefined. */
632 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
633 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
634 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
637 /* Given an rtx X being reloaded into a reg required to be
638 in class CLASS, return the class of reg to actually use.
639 In general this is just CLASS; but on some machines
640 in some cases it is preferable to use a more restrictive class. */
641 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
643 /* Return the register class of a scratch register needed to copy IN into
644 or out of a register in CLASS in MODE. If it can be done directly,
645 NO_REGS is returned. */
647 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
648 secondary_reload_class (CLASS, MODE, IN)
650 /* On the PA it is not possible to directly move data between
651 GENERAL_REGS and FP_REGS. */
652 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
653 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
655 /* Return the stack location to use for secondary memory needed reloads. */
656 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
657 gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
659 /* Return the maximum number of consecutive registers
660 needed to represent mode MODE in a register of class CLASS. */
661 #define CLASS_MAX_NREGS(CLASS, MODE) \
662 (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \
663 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
665 /* Stack layout; function entry, exit and calling. */
667 /* Define this if pushing a word on the stack
668 makes the stack pointer a smaller address. */
669 /* #define STACK_GROWS_DOWNWARD */
671 /* Believe it or not. */
672 #define ARGS_GROW_DOWNWARD
674 /* Define this if the nominal address of the stack frame
675 is at the high-address end of the local variables;
676 that is, each additional local variable allocated
677 goes at a more negative offset in the frame. */
678 /* #define FRAME_GROWS_DOWNWARD */
680 /* Offset within stack frame to start allocating local variables at.
681 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
682 first local allocated. Otherwise, it is the offset to the BEGINNING
683 of the first local allocated. */
684 #define STARTING_FRAME_OFFSET 8
686 /* If we generate an insn to push BYTES bytes,
687 this says how many the stack pointer really advances by.
688 On the HP-PA, don't define this because there are no push insns. */
689 /* #define PUSH_ROUNDING(BYTES) */
691 /* Offset of first parameter from the argument pointer register value.
692 This value will be negated because the arguments grow down.
693 Also note that on STACK_GROWS_UPWARD machines (such as this one)
694 this is the distance from the frame pointer to the end of the first
695 argument, not it's beginning. To get the real offset of the first
696 argument, the size of the argument must be added.
698 ??? Have to check on this.*/
700 #define FIRST_PARM_OFFSET(FNDECL) -32
702 /* Absolute value of offset from top-of-stack address to location to store the
703 function parameter if it can't go in a register.
704 Addresses for following parameters are computed relative to this one. */
705 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
708 /* When a parameter is passed in a register, stack space is still
710 #define REG_PARM_STACK_SPACE(DECL) 16
712 /* Define this if the above stack space is to be considered part of the
713 space allocated by the caller. */
714 #define OUTGOING_REG_PARM_STACK_SPACE
716 /* Keep the stack pointer constant throughout the function.
717 This is both an optimization and a necessity: longjmp
718 doesn't behave itself when the stack pointer moves within
720 #define ACCUMULATE_OUTGOING_ARGS
722 /* The weird HPPA calling conventions require a minimum of 48 bytes on
723 the stack: 16 bytes for register saves, and 32 bytes for magic.
724 This is the difference between the logical top of stack and the
726 #define STACK_POINTER_OFFSET -32
728 #define STACK_DYNAMIC_OFFSET(FNDECL) \
729 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
731 /* Value is 1 if returning from a function call automatically
732 pops the arguments described by the number-of-args field in the call.
733 FUNTYPE is the data type of the function (as a tree),
734 or for a library call it is an identifier node for the subroutine name. */
736 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
738 /* Define how to find the value returned by a function.
739 VALTYPE is the data type of the value (as a tree).
740 If the precise function being called is known, FUNC is its FUNCTION_DECL;
741 otherwise, FUNC is 0. */
743 /* On the HP-PA the value is found in register(s) 28(-29), unless
744 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
747 #define FUNCTION_VALUE(VALTYPE, FUNC) \
748 gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode || \
749 TYPE_MODE (VALTYPE) == DFmode) ? \
752 /* Define how to find the value returned by a library function
753 assuming the value has mode MODE. */
755 #define LIBCALL_VALUE(MODE) \
756 gen_rtx (REG, MODE, ((MODE) == SFmode || (MODE) == DFmode ? 32 : 28))
758 /* 1 if N is a possible register number for a function value
759 as seen by the caller. */
761 #define FUNCTION_VALUE_REGNO_P(N) \
762 ((N) == 28 || (N) == 32)
764 /* 1 if N is a possible register number for function argument passing. */
766 #define FUNCTION_ARG_REGNO_P(N) \
767 (((N) >= 23 && (N) <= 26) || ((N) >= 32 && (N) <= 39))
769 /* Define a data type for recording info about an argument list
770 during the scan of that argument list. This data type should
771 hold all necessary information about the function itself
772 and about the args processed so far, enough to enable macros
773 such as FUNCTION_ARG to determine where the next arg should go.
775 On the HP-PA, this is a single integer, which is a number of words
776 of arguments scanned so far (including the invisible argument,
777 if any, which holds the structure-value-address).
778 Thus 4 or more means all following args should go on the stack. */
780 struct hppa_args {int words, nargs_prototype; };
782 #define CUMULATIVE_ARGS struct hppa_args
784 /* Initialize a variable CUM of type CUMULATIVE_ARGS
785 for a call to a function whose data type is FNTYPE.
786 For a library call, FNTYPE is 0. */
788 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
790 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
791 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
792 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
793 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
798 /* Similar, but when scanning the definition of a procedure. We always
799 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
801 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
803 (CUM).nargs_prototype = 1000
805 /* Figure out the size in words of the function argument. */
807 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
808 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
810 /* Update the data in CUM to advance over an argument
811 of mode MODE and data type TYPE.
812 (TYPE is null for libcalls where that information may not be available.) */
814 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
815 { (CUM).nargs_prototype--; \
816 ((((CUM).words & 01) && (TYPE) != 0 \
817 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
819 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
822 /* Determine where to put an argument to a function.
823 Value is zero to push the argument on the stack,
824 or a hard register in which to store the argument.
826 MODE is the argument's machine mode.
827 TYPE is the data type of the argument (as a tree).
828 This is null for libcalls where that information may
830 CUM is a variable of type CUMULATIVE_ARGS which gives info about
831 the preceding args and about the function being called.
832 NAMED is nonzero if this argument is a named parameter
833 (otherwise it is an extra parameter matching an ellipsis).
835 On the HP-PA the first four words of args are normally in registers
836 and the rest are pushed. But any arg that won't entirely fit in regs
839 Arguments passed in registers are either 1 or 2 words long.
841 The caller must make a distinction between calls to explicitly named
842 functions and calls through pointers to functions -- the conventions
843 are different! Calls through pointers to functions only use general
844 registers for the first four argument words.
846 Of course all this is different for the portable runtime model
847 HP wants everyone to use for ELF. Ugh. Here's a quick description
848 of how it's supposed to work.
850 1) callee side remains unchanged. It expects integer args to be
851 in the integer registers, float args in the float registers and
852 unnamed args in integer registers.
854 2) caller side now depends on if the function being called has
855 a prototype in scope (rather than if it's being called indirectly).
857 2a) If there is a prototype in scope, then arguments are passed
858 according to their type (ints in integer registers, floats in float
859 registers, unnamed args in integer registers.
861 2b) If there is no prototype in scope, then floating point arguments
862 are passed in both integer and float registers. egad.
864 FYI: The portable parameter passing conventions are almost exactly like
865 the standard parameter passing conventions on the RS6000. That's why
866 you'll see lots of similar code in rs6000.h. */
868 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
870 /* Do not expect to understand this without reading it several times. I'm
871 tempted to try and simply it, but I worry about breaking something. */
873 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
874 (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
875 ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
876 || !FLOAT_MODE_P (MODE) || (CUM).nargs_prototype > 0) \
877 ? gen_rtx (REG, (MODE), \
878 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
879 ? (((!current_call_is_indirect \
880 || TARGET_PORTABLE_RUNTIME) \
881 && (MODE) == DFmode) \
882 ? ((CUM).words ? 38 : 34) \
883 : ((CUM).words ? 23 : 25)) \
884 : (((!current_call_is_indirect \
885 || TARGET_PORTABLE_RUNTIME) \
886 && (MODE) == SFmode) \
887 ? (32 + 2 * (CUM).words) \
888 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
890 /* We are calling a non-prototyped function with floating point \
891 arguments using the portable conventions. */ \
892 : gen_rtx (EXPR_LIST, VOIDmode, \
893 gen_rtx (REG, (MODE), \
894 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
895 ? ((CUM).words ? 38 : 34) \
896 : (32 + 2 * (CUM).words))), \
897 gen_rtx (REG, (MODE), \
898 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
899 ? ((CUM).words ? 23 : 25) \
900 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\
902 /* Pass this parameter in the stack. */ \
905 /* For an arg passed partly in registers and partly in memory,
906 this is the number of registers used.
907 For args passed entirely in registers or entirely in memory, zero. */
909 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
911 /* If defined, a C expression that gives the alignment boundary, in
912 bits, of an argument with the specified mode and type. If it is
913 not defined, `PARM_BOUNDARY' is used for all arguments. */
915 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
917 ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
918 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
920 : GET_MODE_ALIGNMENT(MODE)))
922 /* Arguments larger than eight bytes are passed by invisible reference */
924 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
925 ((TYPE) && int_size_in_bytes (TYPE) > 8)
927 extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
928 extern enum cmp_type hppa_branch_type;
930 /* Output the label for a function definition. */
931 #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
932 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
933 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
934 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
936 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
937 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
938 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
941 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
942 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
943 tree tree_type = TREE_TYPE (DECL); \
946 if (TREE_PUBLIC (DECL) || TARGET_GAS) \
947 { extern int current_function_varargs; \
948 if (TREE_PUBLIC (DECL)) \
950 fputs ("\t.EXPORT ", FILE); \
951 assemble_name (FILE, NAME); \
952 fputs (",ENTRY,PRIV_LEV=3", FILE); \
956 fputs ("\t.PARAM ", FILE); \
957 assemble_name (FILE, NAME); \
959 if (TARGET_PORTABLE_RUNTIME) \
961 fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
962 fputs ("RTNVAL=NO\n", FILE); \
965 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
966 parm = TREE_CHAIN (parm)) \
968 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
969 fprintf (FILE, ",ARGW%d=FR", i++); \
970 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
975 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
983 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
984 DECL_ARG_TYPE (parm)); \
985 if (arg_size == 2 && i <= 2) \
988 fprintf (FILE, ",ARGW%d=GR", i++); \
989 fprintf (FILE, ",ARGW%d=GR", i++); \
991 else if (arg_size == 1) \
992 fprintf (FILE, ",ARGW%d=GR", i++); \
997 /* anonymous args */ \
998 if ((TYPE_ARG_TYPES (tree_type) != 0 \
999 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
1000 != void_type_node)) \
1001 || current_function_varargs) \
1003 for (; i < 4; i++) \
1004 fprintf (FILE, ",ARGW%d=GR", i); \
1006 if (TYPE_MODE (fntype) == DFmode) \
1007 fprintf (FILE, ",RTNVAL=FR"); \
1008 else if (TYPE_MODE (fntype) == SFmode) \
1009 fprintf (FILE, ",RTNVAL=FU"); \
1010 else if (fntype != void_type_node) \
1011 fprintf (FILE, ",RTNVAL=GR"); \
1012 fputs ("\n", FILE); \
1015 /* This macro generates the assembly code for function entry.
1016 FILE is a stdio stream to output the code to.
1017 SIZE is an int: how many units of temporary storage to allocate.
1018 Refer to the array `regs_ever_live' to determine which registers
1019 to save; `regs_ever_live[I]' is nonzero if register number I
1020 is ever used in the function. This macro is responsible for
1021 knowing which registers should not be saved even if used. */
1023 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1024 of memory. If any fpu reg is used in the function, we allocate
1025 such a block here, at the bottom of the frame, just in case it's needed.
1027 If this function is a leaf procedure, then we may choose not
1028 to do a "save" insn. The decision about whether or not
1029 to do this is made in regclass.c. */
1031 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1032 output_function_prologue (FILE, SIZE)
1034 /* Output assembler code to FILE to increment profiler label # LABELNO
1035 for profiling a function entry.
1037 Because HPUX _mcount is so different, we actually emit the
1038 profiling code in function_prologue. This just stores LABELNO for
1041 #define PROFILE_BEFORE_PROLOGUE
1042 #define FUNCTION_PROFILER(FILE, LABELNO) \
1043 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1045 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1046 the stack pointer does not matter. The value is tested only in
1047 functions that have frame pointers.
1048 No definition is equivalent to always zero. */
1050 extern int may_call_alloca;
1051 extern int current_function_pretend_args_size;
1053 #define EXIT_IGNORE_STACK \
1054 (get_frame_size () != 0 \
1055 || current_function_calls_alloca || current_function_outgoing_args_size)
1058 /* This macro generates the assembly code for function exit,
1059 on machines that need it. If FUNCTION_EPILOGUE is not defined
1060 then individual return instructions are generated for each
1061 return statement. Args are same as for FUNCTION_PROLOGUE.
1063 The function epilogue should not depend on the current stack pointer!
1064 It should use the frame pointer only. This is mandatory because
1065 of alloca; we also take advantage of it to omit stack adjustments
1066 before returning. */
1068 /* This declaration is needed due to traditional/ANSI
1069 incompatibilities which cannot be #ifdefed away
1070 because they occur inside of macros. Sigh. */
1071 extern union tree_node *current_function_decl;
1073 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1074 output_function_epilogue (FILE, SIZE)
1076 /* Output assembler code for a block containing the constant parts
1077 of a trampoline, leaving space for the variable parts.\
1079 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1080 and then branches to the specified routine.
1082 This code template is copied from text segment to stack location
1083 and then patched with INITIALIZE_TRAMPOLINE to contain
1084 valid values, and then entered as a subroutine.
1086 It is best to keep this as small as possible to avoid having to
1087 flush multiple lines in the cache. */
1089 #define TRAMPOLINE_TEMPLATE(FILE) \
1091 fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1092 fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1093 fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1094 fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1095 fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1096 fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1097 fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1098 fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1099 fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1100 fprintf (FILE, "\t.word 0\n"); \
1101 fprintf (FILE, "\t.word 0\n"); \
1104 /* Length in units of the trampoline for entering a nested function.
1106 Flush the cache entries corresponding to the first and last addresses
1107 of the trampoline. This is necessary as the trampoline may cross two
1110 If the code part of the trampoline ever grows to > 32 bytes, then it
1111 will become necessary to hack on the cacheflush pattern in pa.md. */
1113 #define TRAMPOLINE_SIZE (11 * 4)
1115 /* Emit RTL insns to initialize the variable parts of a trampoline.
1116 FNADDR is an RTX for the address of the function's pure code.
1117 CXT is an RTX for the static chain value for the function.
1119 Move the function address to the trampoline template at offset 12.
1120 Move the static chain value to trampoline template at offset 16. */
1122 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1124 rtx start_addr, end_addr; \
1126 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1127 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1128 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1129 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1130 /* fdc and fic only use registers for the address to flush, \
1131 they do not accept integer displacements. */ \
1132 start_addr = force_reg (SImode, (TRAMP)); \
1133 end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1134 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1135 end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
1136 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1137 gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1140 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1141 reference the 4 integer arg registers and 4 fp arg registers.
1142 Ordinarily they are not call used registers, but they are for
1143 _builtin_saveregs, so we must make this explicit. */
1145 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1148 /* Addressing modes, and classification of registers for them. */
1150 #define HAVE_POST_INCREMENT
1151 #define HAVE_POST_DECREMENT
1153 #define HAVE_PRE_DECREMENT
1154 #define HAVE_PRE_INCREMENT
1156 /* Macros to check register numbers against specific register classes. */
1158 /* These assume that REGNO is a hard or pseudo reg number.
1159 They give nonzero only if REGNO is a hard reg of the suitable class
1160 or a pseudo reg currently allocated to a suitable hard reg.
1161 Since they use reg_renumber, they are safe only once reg_renumber
1162 has been allocated, which happens in local-alloc.c. */
1164 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1165 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1166 #define REGNO_OK_FOR_BASE_P(REGNO) \
1167 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1168 #define REGNO_OK_FOR_FP_P(REGNO) \
1169 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1171 /* Now macros that check whether X is a register and also,
1172 strictly, whether it is in a specified class.
1174 These macros are specific to the the HP-PA, and may be used only
1175 in code for printing assembler insns and in conditions for
1176 define_optimization. */
1178 /* 1 if X is an fp register. */
1180 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1182 /* Maximum number of registers that can appear in a valid memory address. */
1184 #define MAX_REGS_PER_ADDRESS 2
1186 /* Recognize any constant value that is a valid address except
1187 for symbolic addresses. We get better CSE by rejecting them
1188 here and allowing hppa_legitimize_address to break them up. We
1189 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1191 #define CONSTANT_ADDRESS_P(X) \
1192 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1193 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1194 || GET_CODE (X) == HIGH) \
1195 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1197 /* Include all constant integers and constant doubles, but not
1198 floating-point, except for floating-point zero. */
1200 #define LEGITIMATE_CONSTANT_P(X) \
1201 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1202 || (X) == CONST0_RTX (GET_MODE (X))) \
1203 && !(flag_pic && function_label_operand (X, VOIDmode)))
1205 /* Subroutine for EXTRA_CONSTRAINT.
1207 Return 1 iff OP is a pseudo which did not get a hard register and
1208 we are running the reload pass. */
1210 #define IS_RELOADING_PSEUDO_P(OP) \
1211 ((reload_in_progress \
1212 && GET_CODE (OP) == REG \
1213 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1214 && reg_renumber [REGNO (OP)] < 0))
1216 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1218 For the HPPA, `Q' means that this is a memory operand but not a
1219 symbolic memory operand. Note that an unassigned pseudo register
1220 is such a memory operand. Needed because reload will generate
1221 these things in insns and then not re-recognize the insns, causing
1222 constrain_operands to fail.
1224 Also note `Q' accepts any memory operand during the reload pass.
1225 This includes out-of-range displacements in reg+d addressing.
1226 This makes for better code. (??? For 2.5 address this issue).
1232 `T' is for fp loads and stores. */
1233 #define EXTRA_CONSTRAINT(OP, C) \
1235 (IS_RELOADING_PSEUDO_P (OP) \
1236 || (GET_CODE (OP) == MEM \
1237 && reload_in_progress) \
1238 || (GET_CODE (OP) == MEM \
1239 && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1240 && ! symbolic_memory_operand (OP, VOIDmode))) \
1242 (GET_CODE (OP) == MEM \
1243 /* Using DFmode forces only short displacements \
1244 to be recognized as valid in reg+d addresses. */\
1245 && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1247 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1248 and check its validity for a certain class.
1249 We have two alternate definitions for each of them.
1250 The usual definition accepts all pseudo regs; the other rejects
1251 them unless they have been allocated suitable hard regs.
1252 The symbol REG_OK_STRICT causes the latter definition to be used.
1254 Most source files want to accept pseudo regs in the hope that
1255 they will get allocated to the class that the insn wants them to be in.
1256 Source files for reload pass need to be strict.
1257 After reload, it makes no difference, since pseudo regs have
1258 been eliminated by then. */
1260 #ifndef REG_OK_STRICT
1262 /* Nonzero if X is a hard reg that can be used as an index
1263 or if it is a pseudo reg. */
1264 #define REG_OK_FOR_INDEX_P(X) \
1265 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1266 /* Nonzero if X is a hard reg that can be used as a base reg
1267 or if it is a pseudo reg. */
1268 #define REG_OK_FOR_BASE_P(X) \
1269 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1273 /* Nonzero if X is a hard reg that can be used as an index. */
1274 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1275 /* Nonzero if X is a hard reg that can be used as a base reg. */
1276 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1280 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1281 that is a valid memory address for an instruction.
1282 The MODE argument is the machine mode for the MEM expression
1283 that wants to use this address.
1285 On the HP-PA, the actual legitimate addresses must be
1286 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1287 But we can treat a SYMBOL_REF as legitimate if it is part of this
1288 function's constant-pool, because such addresses can actually
1289 be output as REG+SMALLINT.
1291 Note we only allow 5 bit immediates for access to a constant address;
1292 doing so avoids losing for loading/storing a FP register at an address
1293 which will not fit in 5 bits. */
1295 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1296 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1298 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1299 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1301 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1302 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1304 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1305 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1307 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1309 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1310 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1311 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1312 && REG_P (XEXP (X, 0)) \
1313 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1315 else if (GET_CODE (X) == PLUS) \
1317 rtx base = 0, index; \
1318 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1320 if (GET_CODE (XEXP (X, 1)) == REG \
1321 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1323 else if (flag_pic == 1 \
1324 && GET_CODE (XEXP (X, 1)) == SYMBOL_REF)\
1327 else if (REG_P (XEXP (X, 0)) \
1328 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1329 base = XEXP (X, 0), index = XEXP (X, 1); \
1330 else if (REG_P (XEXP (X, 1)) \
1331 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1332 base = XEXP (X, 1), index = XEXP (X, 0); \
1334 if (GET_CODE (index) == CONST_INT \
1335 && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1336 || INT_5_BITS (index))) \
1339 else if (GET_CODE (X) == LO_SUM \
1340 && GET_CODE (XEXP (X, 0)) == REG \
1341 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1342 && CONSTANT_P (XEXP (X, 1)) \
1343 && (MODE) != SFmode \
1344 && (MODE) != DFmode) \
1346 else if (GET_CODE (X) == LO_SUM \
1347 && GET_CODE (XEXP (X, 0)) == SUBREG \
1348 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1349 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1350 && CONSTANT_P (XEXP (X, 1)) \
1351 && (MODE) != SFmode \
1352 && (MODE) != DFmode) \
1354 else if (GET_CODE (X) == LABEL_REF \
1355 || (GET_CODE (X) == CONST_INT \
1356 && INT_5_BITS (X))) \
1358 /* Needed for -fPIC */ \
1359 else if (GET_CODE (X) == LO_SUM \
1360 && GET_CODE (XEXP (X, 0)) == REG \
1361 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1362 && GET_CODE (XEXP (X, 1)) == UNSPEC) \
1366 /* Try machine-dependent ways of modifying an illegitimate address
1367 to be legitimate. If we find one, return the new, valid address.
1368 This macro is used in only one place: `memory_address' in explow.c.
1370 OLDX is the address as it was before break_out_memory_refs was called.
1371 In some cases it is useful to look at this to decide what needs to be done.
1373 MODE and WIN are passed so that this macro can use
1374 GO_IF_LEGITIMATE_ADDRESS.
1376 It is always safe for this macro to do nothing. It exists to recognize
1377 opportunities to optimize the output. */
1379 extern struct rtx_def *hppa_legitimize_address ();
1380 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1381 { rtx orig_x = (X); \
1382 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1383 if ((X) != orig_x && memory_address_p (MODE, X)) \
1386 /* Go to LABEL if ADDR (a legitimate address expression)
1387 has an effect that depends on the machine mode it is used for. */
1389 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1390 if (GET_CODE (ADDR) == PRE_DEC \
1391 || GET_CODE (ADDR) == POST_DEC \
1392 || GET_CODE (ADDR) == PRE_INC \
1393 || GET_CODE (ADDR) == POST_INC) \
1396 /* Define this macro if references to a symbol must be treated
1397 differently depending on something about the variable or
1398 function named by the symbol (such as what section it is in).
1400 The macro definition, if any, is executed immediately after the
1401 rtl for DECL or other node is created.
1402 The value of the rtl will be a `mem' whose address is a
1405 The usual thing for this macro to do is to a flag in the
1406 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1407 name string in the `symbol_ref' (if one bit is not enough
1410 On the HP-PA we use this to indicate if a symbol is in text or
1411 data space. Also, function labels need special treatment. */
1413 #define TEXT_SPACE_P(DECL)\
1414 (TREE_CODE (DECL) == FUNCTION_DECL \
1415 || (TREE_CODE (DECL) == VAR_DECL \
1416 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1418 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1419 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1421 #define FUNCTION_NAME_P(NAME) \
1422 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1424 #define ENCODE_SECTION_INFO(DECL)\
1426 { if (TEXT_SPACE_P (DECL)) \
1428 if (TREE_CODE (DECL) == FUNCTION_DECL \
1429 || TREE_CODE (DECL) == VAR_DECL) \
1430 _rtl = DECL_RTL (DECL); \
1432 _rtl = TREE_CST_RTL (DECL); \
1433 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1434 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1435 hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1440 /* Store the user-specified part of SYMBOL_NAME in VAR.
1441 This is sort of inverse to ENCODE_SECTION_INFO. */
1443 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1444 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1445 1 + (SYMBOL_NAME)[1] == '@'\
1446 : (SYMBOL_NAME)[0] == '@'))
1448 /* Arghh. This is used for stuff in the constant pool; this may include
1449 function addresses on the PA, which during PIC code generation must
1450 reside in the data space. Unfortuantely, there's no way to determine
1451 if a particular label in the constant pool refers to a function address.
1452 So just force everything into the data space during PIC generation. */
1453 #define SELECT_RTX_SECTION(RTX,MODE) \
1457 readonly_data_section ();
1459 /* Specify the machine mode that this machine uses
1460 for the index in the tablejump instruction. */
1461 #define CASE_VECTOR_MODE DImode
1463 /* Define this if the tablejump instruction expects the table
1464 to contain offsets from the address of the table.
1465 Do not define this if the table should contain absolute addresses. */
1466 /* #define CASE_VECTOR_PC_RELATIVE */
1468 #define CASE_DROPS_THROUGH
1469 /* Specify the tree operation to be used to convert reals to integers. */
1470 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1472 /* This is the kind of divide that is easiest to do in the general case. */
1473 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1475 /* Define this as 1 if `char' should by default be signed; else as 0. */
1476 #define DEFAULT_SIGNED_CHAR 1
1478 /* Max number of bytes we can move from memory to memory
1479 in one reasonably fast instruction. */
1482 /* Define if operations between registers always perform the operation
1483 on the full register even if a narrower mode is specified. */
1484 #define WORD_REGISTER_OPERATIONS
1486 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1487 will either zero-extend or sign-extend. The value of this macro should
1488 be the code that says which one of the two operations is implicitly
1489 done, NIL if none. */
1490 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1492 /* Nonzero if access to memory by bytes is slow and undesirable. */
1493 #define SLOW_BYTE_ACCESS 1
1495 /* Do not break .stabs pseudos into continuations. */
1496 #define DBX_CONTIN_LENGTH 0
1498 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1499 is done just by pretending it is already truncated. */
1500 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1502 /* We assume that the store-condition-codes instructions store 0 for false
1503 and some other value for true. This is the value stored for true. */
1505 #define STORE_FLAG_VALUE 1
1507 /* When a prototype says `char' or `short', really pass an `int'. */
1508 #define PROMOTE_PROTOTYPES
1510 /* Specify the machine mode that pointers have.
1511 After generation of rtl, the compiler makes no further distinction
1512 between pointers and any other objects of this machine mode. */
1513 #define Pmode SImode
1515 /* Add any extra modes needed to represent the condition code.
1517 HPPA floating comparisons produce condition codes. */
1518 #define EXTRA_CC_MODES CCFPmode
1520 /* Define the names for the modes specified above. */
1521 #define EXTRA_CC_NAMES "CCFP"
1523 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1524 return the mode to be used for the comparison. For floating-point, CCFPmode
1525 should be used. CC_NOOVmode should be used when the first operand is a
1526 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1528 #define SELECT_CC_MODE(OP,X,Y) \
1529 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1531 /* A function address in a call instruction
1532 is a byte address (for indexing purposes)
1533 so give the MEM rtx a byte's mode. */
1534 #define FUNCTION_MODE SImode
1536 /* Define this if addresses of constant functions
1537 shouldn't be put through pseudo regs where they can be cse'd.
1538 Desirable on machines where ordinary constants are expensive
1539 but a CALL with constant address is cheap. */
1540 #define NO_FUNCTION_CSE
1542 /* Define this to be nonzero if shift instructions ignore all but the low-order
1544 #define SHIFT_COUNT_TRUNCATED 1
1546 /* Use atexit for static constructors/destructors, instead of defining
1547 our own exit function. */
1550 /* Compute the cost of computing a constant rtl expression RTX
1551 whose rtx-code is CODE. The body of this macro is a portion
1552 of a switch statement. If the code is computed here,
1553 return it with a return statement. Otherwise, break from the switch. */
1555 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1557 if (INTVAL (RTX) == 0) return 0; \
1558 if (INT_14_BITS (RTX)) return 1; \
1565 case CONST_DOUBLE: \
1566 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1567 && OUTER_CODE != SET) \
1572 #define ADDRESS_COST(RTX) \
1573 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1575 /* Compute extra cost of moving data between one register class
1578 Make moves from SAR so expensive they should never happen. We used to
1579 have 0xffff here, but that generates overflow in rare cases.
1581 Copies involving a FP register and a non-FP register are relatively
1582 expensive because they must go through memory.
1584 Other copies are reasonably cheap. */
1585 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1586 (CLASS1 == SHIFT_REGS ? 0x100 \
1587 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1588 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1592 /* Provide the costs of a rtl expression. This is in the body of a
1593 switch on CODE. The purpose for the cost of MULT is to encourage
1594 `synth_mult' to find a synthetic multiply when reasonable. */
1596 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1598 return TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1599 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1604 return COSTS_N_INSNS (60); \
1606 if (GET_CODE (XEXP (X, 0)) == MULT \
1607 && shadd_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1608 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1609 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1612 /* Adjust the cost of dependencies. */
1614 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1615 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1617 /* Handling the special cases is going to get too complicated for a macro,
1618 just call `pa_adjust_insn_length' to do the real work. */
1619 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1620 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1622 /* Enable a bug fix. (This is for extra caution.) */
1623 #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1625 /* Millicode insns are actually function calls with some special
1626 constraints on arguments and register usage.
1628 Millicode calls always expect their arguments in the integer argument
1629 registers, and always return their result in %r29 (ret1). They
1630 are expected to clobber their arguments, %r1, %r29, and %r31 and
1633 These macros tell reorg that the references to arguments and
1634 register clobbers for millicode calls do not appear to happen
1635 until after the millicode call. This allows reorg to put insns
1636 which set the argument registers into the delay slot of the millicode
1637 call -- thus they act more like traditional CALL_INSNs.
1639 get_attr_type will try to recognize the given insn, so make sure to
1640 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1642 #define INSN_SETS_ARE_DELAYED(X) \
1643 ((GET_CODE (X) == INSN \
1644 && GET_CODE (PATTERN (X)) != SEQUENCE \
1645 && GET_CODE (PATTERN (X)) != USE \
1646 && GET_CODE (PATTERN (X)) != CLOBBER \
1647 && get_attr_type (X) == TYPE_MILLI))
1649 #define INSN_REFERENCES_ARE_DELAYED(X) \
1650 ((GET_CODE (X) == INSN \
1651 && GET_CODE (PATTERN (X)) != SEQUENCE \
1652 && GET_CODE (PATTERN (X)) != USE \
1653 && GET_CODE (PATTERN (X)) != CLOBBER \
1654 && get_attr_type (X) == TYPE_MILLI))
1657 /* Control the assembler format that we output. */
1659 /* Output at beginning of assembler file. */
1661 #define ASM_FILE_START(FILE) \
1662 do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1663 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1664 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1666 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1667 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1668 \t.IMPORT $global$,DATA\n\
1669 \t.IMPORT $$dyncall,MILLICODE\n");\
1671 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1672 if (write_symbols != NO_DEBUG) \
1673 output_file_directive ((FILE), main_input_filename); \
1676 /* Output to assembler file text saying following lines
1677 may contain character constants, extra white space, comments, etc. */
1679 #define ASM_APP_ON ""
1681 /* Output to assembler file text saying following lines
1682 no longer contain unusual constructs. */
1684 #define ASM_APP_OFF ""
1686 /* We don't yet know how to identify GCC to HP-PA machines. */
1687 #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1689 /* Output before code. */
1691 /* Supposedly the assembler rejects the command if there is no tab! */
1692 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1694 /* Output before read-only data. */
1696 /* Supposedly the assembler rejects the command if there is no tab! */
1697 #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1699 #define READONLY_DATA_SECTION readonly_data
1701 /* Output before writable data. */
1703 /* Supposedly the assembler rejects the command if there is no tab! */
1704 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1706 /* Output before uninitialized data. */
1708 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1710 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1712 #define EXTRA_SECTIONS in_bss, in_readonly_data
1714 /* FIXME: GAS doesn't grok expressions involving two symbols in different
1715 segments (aka subspaces). Two avoid creating such expressions, we place
1716 readonly data into the $CODE$ subspace when generating PIC code. If
1717 GAS ever handles such expressions, this hack can disappear. */
1718 #define EXTRA_SECTION_FUNCTIONS \
1722 if (in_section != in_bss) \
1724 fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1725 in_section = in_bss; \
1731 if (in_section != in_readonly_data) \
1734 fprintf (asm_out_file, "%s\n", TEXT_SECTION_ASM_OP); \
1736 fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1737 in_section = in_readonly_data; \
1742 /* How to refer to registers in assembler output.
1743 This sequence is indexed by compiler's hard-register-number (see above). */
1745 #define REGISTER_NAMES \
1746 {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1747 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1748 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1749 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1750 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1751 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
1752 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
1753 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
1754 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
1755 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
1756 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
1759 #define ADDITIONAL_REGISTER_NAMES \
1760 {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
1761 {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
1762 {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
1763 {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
1764 {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
1765 {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
1766 {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
1769 /* How to renumber registers for dbx and gdb.
1771 Registers 0 - 31 remain unchanged.
1773 Registers 32 - 87 are mapped to 72 - 127
1775 Register 88 is mapped to 32. */
1777 #define DBX_REGISTER_NUMBER(REGNO) \
1778 ((REGNO) <= 31 ? (REGNO) : \
1779 ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
1781 /* This is how to output the definition of a user-level label named NAME,
1782 such as the label on a static function or variable NAME. */
1784 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1785 do { assemble_name (FILE, NAME); \
1786 fputc ('\n', FILE); } while (0)
1788 /* This is how to output a command to make the user-level label named NAME
1789 defined for reference from other files. */
1791 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1792 do { fputs ("\t.IMPORT ", FILE); \
1793 assemble_name (FILE, NAME); \
1794 if (FUNCTION_NAME_P (NAME)) \
1795 fputs (",CODE\n", FILE); \
1797 fputs (",DATA\n", FILE); \
1800 /* The bogus HP assembler requires ALL external references to be
1801 "imported", even library calls. They look a bit different, so
1802 here's this macro. */
1804 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1805 do { fputs ("\t.IMPORT ", FILE); \
1806 assemble_name (FILE, XSTR ((RTL), 0)); \
1807 fputs (",CODE\n", FILE); \
1810 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1812 /* We only handle DATA objects here, functions are globalized in \
1813 ASM_DECLARE_FUNCTION_NAME. */ \
1814 if (! FUNCTION_NAME_P (NAME)) \
1816 fputs ("\t.EXPORT ", FILE); \
1817 assemble_name (FILE, NAME); \
1818 fputs (",DATA\n", FILE); \
1822 /* This is how to output a reference to a user-level label named NAME.
1823 `assemble_name' uses this. */
1825 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1826 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1828 /* This is how to output an internal numbered label where
1829 PREFIX is the class of label and NUM is the number within the class. */
1831 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1832 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1834 /* This is how to store into the string LABEL
1835 the symbol_ref name of an internal numbered label where
1836 PREFIX is the class of label and NUM is the number within the class.
1837 This is suitable for output with `assemble_name'. */
1839 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1840 sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1842 /* This is how to output an assembler line defining a `double' constant. */
1844 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1845 do { union { double d; int i[2];} __u; \
1847 fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1848 __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1851 /* This is how to output an assembler line defining a `float' constant. */
1853 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1854 do { union { float f; int i;} __u; \
1856 fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1859 /* This is how to output an assembler line defining an `int' constant. */
1861 #define ASM_OUTPUT_INT(FILE,VALUE) \
1862 { fprintf (FILE, "\t.word "); \
1863 if (function_label_operand (VALUE, VOIDmode) \
1864 && !TARGET_PORTABLE_RUNTIME) \
1865 fprintf (FILE, "P%%"); \
1866 output_addr_const (FILE, (VALUE)); \
1867 fprintf (FILE, "\n");}
1869 /* Likewise for `short' and `char' constants. */
1871 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1872 ( fprintf (FILE, "\t.half "), \
1873 output_addr_const (FILE, (VALUE)), \
1874 fprintf (FILE, "\n"))
1876 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1877 ( fprintf (FILE, "\t.byte "), \
1878 output_addr_const (FILE, (VALUE)), \
1879 fprintf (FILE, "\n"))
1881 /* This is how to output an assembler line for a numeric constant byte. */
1883 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1884 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1886 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1887 output_ascii ((FILE), (P), (SIZE))
1889 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1890 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1891 /* This is how to output an element of a case-vector that is absolute.
1892 Note that this method makes filling these branch delay slots
1895 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1896 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1898 /* Jump tables are executable code and live in the TEXT section on the PA. */
1899 #define JUMP_TABLES_IN_TEXT_SECTION
1901 /* This is how to output an element of a case-vector that is relative.
1902 This must be defined correctly as it is used when generating PIC code.
1904 I belive it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1905 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1906 rather than a table of absolute addresses. */
1908 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1909 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1911 /* This is how to output an assembler line
1912 that says to advance the location counter
1913 to a multiple of 2**LOG bytes. */
1915 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1916 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1918 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1919 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1921 /* This says how to output an assembler line to define a global common symbol
1922 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1924 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
1926 assemble_name ((FILE), (NAME)); \
1927 fputs ("\t.comm ", (FILE)); \
1928 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
1930 /* This says how to output an assembler line to define a local common symbol
1931 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1933 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
1935 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
1936 assemble_name ((FILE), (NAME)); \
1937 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
1939 /* Store in OUTPUT a string (made with alloca) containing
1940 an assembler-name for a local static variable named NAME.
1941 LABELNO is an integer which is different for each call. */
1943 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1944 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1945 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1947 /* Define the parentheses used to group arithmetic operations
1948 in assembler code. */
1950 #define ASM_OPEN_PAREN "("
1951 #define ASM_CLOSE_PAREN ")"
1953 /* All HP assemblers use "!" to separate logical lines. */
1954 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
1956 /* Define results of standard character escape sequences. */
1957 #define TARGET_BELL 007
1958 #define TARGET_BS 010
1959 #define TARGET_TAB 011
1960 #define TARGET_NEWLINE 012
1961 #define TARGET_VT 013
1962 #define TARGET_FF 014
1963 #define TARGET_CR 015
1965 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1966 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1968 /* Print operand X (an rtx) in assembler syntax to file FILE.
1969 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1970 For `%' followed by punctuation, CODE is the punctuation and X is null.
1972 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1973 and an immediate zero should be represented as `r0'.
1975 Several % codes are defined:
1977 C compare conditions
1978 N extract conditions
1979 M modifier to handle preincrement addressing for memory refs.
1980 F modifier to handle preincrement addressing for fp memory refs */
1982 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1985 /* Print a memory address as an operand to reference that memory location. */
1987 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1988 { register rtx addr = ADDR; \
1989 register rtx base; \
1991 switch (GET_CODE (addr)) \
1994 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1997 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1998 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1999 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2000 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
2003 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
2006 if (flag_pic == 0 || !symbolic_operand (XEXP (addr, 1))) \
2007 fputs ("R'", FILE); \
2008 else if (flag_pic == 1) \
2010 else if (flag_pic == 2) \
2011 fputs ("RT'", FILE); \
2012 output_global_address (FILE, XEXP (addr, 1)); \
2013 fputs ("(", FILE); \
2014 output_operand (XEXP (addr, 0), 0); \
2015 fputs (")", FILE); \
2018 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
2021 output_addr_const (FILE, addr); \
2025 /* Define functions in pa.c and used in insn-output.c. */
2027 extern char *output_and ();
2028 extern char *output_ior ();
2029 extern char *output_move_double ();
2030 extern char *output_fp_move_double ();
2031 extern char *output_block_move ();
2032 extern char *output_cbranch ();
2033 extern char *output_bb ();
2034 extern char *output_dbra ();
2035 extern char *output_movb ();
2036 extern char *output_return ();
2037 extern char *output_call ();
2038 extern char *output_mul_insn ();
2039 extern char *output_div_insn ();
2040 extern char *output_mod_insn ();
2041 extern char *singlemove_string ();
2042 extern void output_arg_descriptor ();
2043 extern void output_global_address ();
2044 extern struct rtx_def *legitimize_pic_address ();
2045 extern struct rtx_def *gen_cmp_fp ();
2046 extern void hppa_encode_label ();
2048 extern struct rtx_def *hppa_save_pic_table_rtx;
2051 #define PREDICATE_CODES \
2052 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
2053 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
2054 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
2055 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
2056 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
2057 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
2058 {"pre_cint_operand", {CONST_INT}}, \
2059 {"post_cint_operand", {CONST_INT}}, \
2060 {"int5_operand", {CONST_INT}}, \
2061 {"uint5_operand", {CONST_INT}}, \
2062 {"uint32_operand", {CONST_INT}}, \
2063 {"int11_operand", {CONST_INT}}, \
2064 {"and_operand", {SUBREG, REG, CONST_INT}}, \
2065 {"ior_operand", {CONST_INT}}, \
2066 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
2067 {"lhs_lshift_cint_operand", {CONST_INT}}, \
2068 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
2069 {"shadd_operand", {CONST_INT}}, \
2070 {"eq_neq_comparison_operator", {EQ, NE}}, \
2071 {"movb_comparison_operator", {EQ, NE, LT, GE}}, \
2072 {"pc_or_label_operand", {LABEL_REF, PC}}, \
2073 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
2074 {"reg_or_nonsymb_mem_operand", {REG, SUBREG, MEM}}, \
2075 {"move_operand", {REG, SUBREG, CONST_INT, MEM}}, \
2076 {"pic_operand", {REG, SUBREG, CONST_INT, SYMBOL_REF, LABEL_REF, \
2077 CONST, HIGH, PC}}, /* No clue */ \
2078 {"function_label_operand", {SYMBOL_REF}}, \
2079 {"reg_or_0_or_nonsymb_mem_operand", {REG, SUBREG, CONST_INT, MEM}}, \
2080 {"div_operand", {REG, CONST_INT}}, \
2081 {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \
OSDN Git Service
