1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 enum cmp_type /* comparison type */
26 CMP_SI, /* compare integers */
27 CMP_SF, /* compare single precision floats */
28 CMP_DF, /* compare double precision floats */
29 CMP_MAX /* max comparison type */
32 /* For long call handling. */
33 extern unsigned int total_code_bytes;
35 /* Which processor to schedule for. */
44 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
46 /* For -mschedule= option. */
47 extern char *pa_cpu_string;
48 extern enum processor_type pa_cpu;
50 /* Print subsidiary information on the compiler version in use. */
52 #define TARGET_VERSION fprintf (stderr, " (hppa)");
54 /* Run-time compilation parameters selecting different hardware subsets. */
56 extern int target_flags;
58 /* compile code for HP-PA 1.1 ("Snake") */
60 #define TARGET_SNAKE (target_flags & 1)
62 /* Disable all FP registers (they all become fixed). This may be necessary
63 for compiling kernels which perform lazy context switching of FP regs.
64 Note if you use this option and try to perform floating point operations
65 the compiler will abort! */
67 #define TARGET_DISABLE_FPREGS (target_flags & 2)
69 /* Generate code which assumes that calls through function pointers will
70 never cross a space boundary. Such assumptions are generally safe for
71 building kernels and statically linked executables. Code compiled with
72 this option will fail miserably if the executable is dynamically linked
73 or uses nested functions!
75 This is also used to trigger agressive unscaled index addressing. */
76 #define TARGET_NO_SPACE_REGS (target_flags & 4)
78 /* Allow unconditional jumps in the delay slots of call instructions. */
79 #define TARGET_JUMP_IN_DELAY (target_flags & 8)
81 /* Disable indexed addressing modes. */
83 #define TARGET_DISABLE_INDEXING (target_flags & 32)
85 /* Emit code which follows the new portable runtime calling conventions
86 HP wants everyone to use for ELF objects. If at all possible you want
87 to avoid this since it's a performance loss for non-prototyped code.
89 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
90 long-call stubs which is quite expensive. */
92 #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
94 /* Emit directives only understood by GAS. This allows parameter
95 relocations to work for static functions. There is no way
96 to make them work the HP assembler at this time. */
98 #define TARGET_GAS (target_flags & 128)
100 /* Emit code for processors which do not have an FPU. */
102 #define TARGET_SOFT_FLOAT (target_flags & 256)
104 /* Macro to define tables used to set the flags.
105 This is a list in braces of pairs in braces,
106 each pair being { "NAME", VALUE }
107 where VALUE is the bits to set or minus the bits to clear.
108 An empty string NAME is used to identify the default VALUE. */
110 #define TARGET_SWITCHES \
113 {"pa-risc-1-0", -1}, \
114 {"pa-risc-1-1", 1}, \
115 {"disable-fpregs", 2}, \
116 {"no-disable-fpregs", -2}, \
117 {"no-space-regs", 4}, \
119 {"jump-in-delay", 8}, \
120 {"no-jump-in-delay", -8}, \
121 {"disable-indexing", 32}, \
122 {"no-disable-indexing", -32},\
123 {"portable-runtime", 64}, \
124 {"no-portable-runtime", -64},\
127 {"soft-float", 256}, \
128 {"no-soft-float", -256}, \
129 { "", TARGET_DEFAULT}}
131 #ifndef TARGET_DEFAULT
132 #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
135 #define TARGET_OPTIONS \
137 { "schedule=", &pa_cpu_string }\
140 #define OVERRIDE_OPTIONS override_options ()
142 #define DBX_DEBUGGING_INFO
143 #define DEFAULT_GDB_EXTENSIONS 1
145 /* This is the way other stabs-in-XXX tools do things. We will be
147 #define DBX_BLOCKS_FUNCTION_RELATIVE 1
149 /* Likewise for linenos.
151 We make the first line stab special to avoid adding several
152 gross hacks to GAS. */
153 #undef ASM_OUTPUT_SOURCE_LINE
154 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
155 { static int sym_lineno = 1; \
156 static tree last_function_decl = NULL; \
157 if (current_function_decl == last_function_decl) \
158 fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
160 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
163 fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
164 last_function_decl = current_function_decl; \
167 /* But, to make this work, we have to output the stabs for the function
169 #define DBX_FUNCTION_FIRST
171 /* Only labels should ever begin in column zero. */
172 #define ASM_STABS_OP "\t.stabs"
173 #define ASM_STABN_OP "\t.stabn"
175 /* GDB always assumes the current function's frame begins at the value
176 of the stack pointer upon entry to the current function. Accessing
177 local variables and parameters passed on the stack is done using the
178 base of the frame + an offset provided by GCC.
180 For functions which have frame pointers this method works fine;
181 the (frame pointer) == (stack pointer at function entry) and GCC provides
182 an offset relative to the frame pointer.
184 This loses for functions without a frame pointer; GCC provides an offset
185 which is relative to the stack pointer after adjusting for the function's
186 frame size. GDB would prefer the offset to be relative to the value of
187 the stack pointer at the function's entry. Yuk! */
188 #define DEBUGGER_AUTO_OFFSET(X) \
189 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
190 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
192 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
193 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
194 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
196 /* gdb needs a null N_SO at the end of each file for scattered loading. */
198 #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END
199 #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \
201 "%s\n\t.stabs \"%s\",%d,0,0,L$text_end\nL$text_end:\n",\
202 TEXT_SECTION_ASM_OP, "" , N_SO)
204 #if (TARGET_DEFAULT & 1) == 0
205 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
206 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
208 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:%{!msoft-float:-D__hp9000s700 -D_PA_RISC1_1}}}"
211 /* Defines for a K&R CC */
213 #define CC1_SPEC "%{pg:} %{p:}"
215 #define LINK_SPEC "%{!shared:-u main} %{shared:-b}"
217 /* We don't want -lg. */
219 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
222 /* Allow $ in identifiers. */
223 #define DOLLARS_IN_IDENTIFIERS 2
225 /* Make gcc agree with <machine/ansi.h> */
227 #define SIZE_TYPE "unsigned int"
228 #define PTRDIFF_TYPE "int"
229 #define WCHAR_TYPE "unsigned int"
230 #define WCHAR_TYPE_SIZE 32
232 /* Show we can debug even without a frame pointer. */
233 #define CAN_DEBUG_WITHOUT_FP
235 /* Machine dependent reorg pass. */
236 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
238 /* Names to predefine in the preprocessor for this target machine. */
240 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
242 /* HPUX has a program 'chatr' to list the dependencies of dynamically
243 linked executables and shared libraries. */
244 #define LDD_SUFFIX "chatr"
245 /* look for lines like "dynamic /usr/lib/X11R5/libX11.sl". */
246 #define PARSE_LDD_OUTPUT(PTR) \
248 while (*PTR == ' ') PTR++; \
249 if (strncmp (PTR, "dynamic", sizeof ("dynamic") - 1) == 0) \
251 PTR += sizeof ("dynamic") - 1; \
252 while (*p == ' ') PTR++; \
258 /* target machine storage layout */
260 /* Define for cross-compilation from a host with a different float format
261 or endianness (e.g. VAX, x86). */
262 #define REAL_ARITHMETIC
264 /* Define this macro if it is advisable to hold scalars in registers
265 in a wider mode than that declared by the program. In such cases,
266 the value is constrained to be within the bounds of the declared
267 type, but kept valid in the wider mode. The signedness of the
268 extension may differ from that of the type. */
270 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
271 if (GET_MODE_CLASS (MODE) == MODE_INT \
272 && GET_MODE_SIZE (MODE) < 4) \
275 /* Define this if most significant bit is lowest numbered
276 in instructions that operate on numbered bit-fields. */
277 #define BITS_BIG_ENDIAN 1
279 /* Define this if most significant byte of a word is the lowest numbered. */
280 /* That is true on the HP-PA. */
281 #define BYTES_BIG_ENDIAN 1
283 /* Define this if most significant word of a multiword number is lowest
285 #define WORDS_BIG_ENDIAN 1
287 /* number of bits in an addressable storage unit */
288 #define BITS_PER_UNIT 8
290 /* Width in bits of a "word", which is the contents of a machine register.
291 Note that this is not necessarily the width of data type `int';
292 if using 16-bit ints on a 68000, this would still be 32.
293 But on a machine with 16-bit registers, this would be 16. */
294 #define BITS_PER_WORD 32
296 /* Width of a word, in units (bytes). */
297 #define UNITS_PER_WORD 4
299 /* Width in bits of a pointer.
300 See also the macro `Pmode' defined below. */
301 #define POINTER_SIZE 32
303 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
304 #define PARM_BOUNDARY 32
306 /* Largest alignment required for any stack parameter, in bits.
307 Don't define this if it is equal to PARM_BOUNDARY */
308 #define MAX_PARM_BOUNDARY 64
310 /* Boundary (in *bits*) on which stack pointer should be aligned. */
311 #define STACK_BOUNDARY 512
313 /* Allocation boundary (in *bits*) for the code of a function. */
314 #define FUNCTION_BOUNDARY 32
316 /* Alignment of field after `int : 0' in a structure. */
317 #define EMPTY_FIELD_BOUNDARY 32
319 /* Every structure's size must be a multiple of this. */
320 #define STRUCTURE_SIZE_BOUNDARY 8
322 /* A bitfield declared as `int' forces `int' alignment for the struct. */
323 #define PCC_BITFIELD_TYPE_MATTERS 1
325 /* No data type wants to be aligned rounder than this. */
326 #define BIGGEST_ALIGNMENT 64
328 /* The .align directive in the HP assembler allows up to a 32 alignment. */
329 #define MAX_OFILE_ALIGNMENT 32768
331 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
332 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
333 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
335 /* Make arrays of chars word-aligned for the same reasons. */
336 #define DATA_ALIGNMENT(TYPE, ALIGN) \
337 (TREE_CODE (TYPE) == ARRAY_TYPE \
338 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
339 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
342 /* Set this nonzero if move instructions will actually fail to work
343 when given unaligned data. */
344 #define STRICT_ALIGNMENT 1
346 /* Generate calls to memcpy, memcmp and memset. */
347 #define TARGET_MEM_FUNCTIONS
349 /* Standard register usage. */
351 /* Number of actual hardware registers.
352 The hardware registers are assigned numbers for the compiler
353 from 0 to just below FIRST_PSEUDO_REGISTER.
354 All registers that the compiler knows about must be given numbers,
355 even those that are not normally considered general registers.
357 HP-PA 1.0 has 32 fullword registers and 16 floating point
358 registers. The floating point registers hold either word or double
361 16 additional registers are reserved.
363 HP-PA 1.1 has 32 fullword registers and 32 floating point
364 registers. However, the floating point registers behave
365 differently: the left and right halves of registers are addressable
366 as 32 bit registers. So, we will set things up like the 68k which
367 has different fp units: define separate register sets for the 1.0
370 #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
373 /* 1 for registers that have pervasive standard uses
374 and are not available for the register allocator.
376 On the HP-PA, these are:
377 Reg 0 = 0 (hardware). However, 0 is used for condition code,
379 Reg 1 = ADDIL target/Temporary (hardware).
380 Reg 2 = Return Pointer
381 Reg 3 = Frame Pointer
382 Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
383 Reg 4-18 = Preserved Registers
384 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
385 Reg 20-22 = Temporary Registers
386 Reg 23-26 = Temporary/Parameter Registers
387 Reg 27 = Global Data Pointer (hp)
388 Reg 28 = Temporary/???/Return Value register
389 Reg 29 = Temporary/Static Chain/Return Value register #2
390 Reg 30 = stack pointer
391 Reg 31 = Temporary/Millicode Return Pointer (hp)
393 Freg 0-3 = Status Registers -- Not known to the compiler.
394 Freg 4-7 = Arguments/Return Value
395 Freg 8-11 = Temporary Registers
396 Freg 12-15 = Preserved Registers
398 Freg 16-31 = Reserved
400 On the Snake, fp regs are
402 Freg 0-3 = Status Registers -- Not known to the compiler.
403 Freg 4L-7R = Arguments/Return Value
404 Freg 8L-11R = Temporary Registers
405 Freg 12L-21R = Preserved Registers
406 Freg 22L-31R = Temporary Registers
410 #define FIXED_REGISTERS \
411 {0, 0, 0, 0, 0, 0, 0, 0, \
412 0, 0, 0, 0, 0, 0, 0, 0, \
413 0, 0, 0, 0, 0, 0, 0, 0, \
414 0, 0, 0, 1, 0, 0, 1, 0, \
416 0, 0, 0, 0, 0, 0, 0, 0, \
417 0, 0, 0, 0, 0, 0, 0, 0, \
418 0, 0, 0, 0, 0, 0, 0, 0, \
419 0, 0, 0, 0, 0, 0, 0, 0, \
420 0, 0, 0, 0, 0, 0, 0, 0, \
421 0, 0, 0, 0, 0, 0, 0, 0, \
422 0, 0, 0, 0, 0, 0, 0, 0, \
425 /* 1 for registers not available across function calls.
426 These must include the FIXED_REGISTERS and also any
427 registers that can be used without being saved.
428 The latter must include the registers where values are returned
429 and the register where structure-value addresses are passed.
430 Aside from that, you can include as many other registers as you like. */
431 #define CALL_USED_REGISTERS \
432 {1, 1, 1, 0, 0, 0, 0, 0, \
433 0, 0, 0, 0, 0, 0, 0, 0, \
434 0, 0, 0, 1, 1, 1, 1, 1, \
435 1, 1, 1, 1, 1, 1, 1, 1, \
437 1, 1, 1, 1, 1, 1, 1, 1, \
438 1, 1, 1, 1, 1, 1, 1, 1, \
439 0, 0, 0, 0, 0, 0, 0, 0, \
440 0, 0, 0, 0, 0, 0, 0, 0, \
441 0, 0, 0, 0, 1, 1, 1, 1, \
442 1, 1, 1, 1, 1, 1, 1, 1, \
443 1, 1, 1, 1, 1, 1, 1, 1, \
446 #define CONDITIONAL_REGISTER_USAGE \
450 for (i = 56; i < 88; i++) \
451 fixed_regs[i] = call_used_regs[i] = 1; \
452 for (i = 33; i < 88; i += 2) \
453 fixed_regs[i] = call_used_regs[i] = 1; \
455 if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)\
457 for (i = 32; i < 88; i++) \
458 fixed_regs[i] = call_used_regs[i] = 1; \
462 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
463 fixed_regs[PIC_OFFSET_TABLE_REGNUM_SAVED] = 1;\
467 /* Allocate the call used registers first. This should minimize
468 the number of registers that need to be saved (as call used
469 registers will generally not be allocated across a call).
471 Experimentation has shown slightly better results by allocating
472 FP registers first. */
474 #define REG_ALLOC_ORDER \
476 /* caller-saved fp regs. */ \
477 40, 41, 42, 43, 44, 45, 46, 47, \
478 68, 69, 70, 71, 72, 73, 74, 75, \
479 76, 77, 78, 79, 80, 81, 82, 83, \
481 32, 33, 34, 35, 36, 37, 38, 39, \
482 /* caller-saved general regs. */ \
483 19, 20, 21, 22, 23, 24, 25, 26, \
485 /* callee-saved fp regs. */ \
486 48, 49, 50, 51, 52, 53, 54, 55, \
487 56, 57, 58, 59, 60, 61, 62, 63, \
489 /* callee-saved general regs. */ \
490 3, 4, 5, 6, 7, 8, 9, 10, \
491 11, 12, 13, 14, 15, 16, 17, 18, \
492 /* special registers. */ \
496 /* True if register is floating-point. */
497 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
499 /* Return number of consecutive hard regs needed starting at reg REGNO
500 to hold something of mode MODE.
501 This is ordinarily the length in words of a value of mode MODE
502 but can be less for certain modes in special long registers.
504 On the HP-PA, ordinary registers hold 32 bits worth;
505 The floating point registers are 64 bits wide. Snake fp regs are 32
507 #define HARD_REGNO_NREGS(REGNO, MODE) \
508 (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
509 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
511 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
512 On the HP-PA, the cpu registers can hold any mode. We
513 force this to be an even register is it cannot hold the full mode. */
514 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
515 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
516 /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
517 : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
518 ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
519 /* Make wide modes be in aligned registers. */ \
520 : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
522 /* Value is 1 if it is a good idea to tie two pseudo registers
523 when one has mode MODE1 and one has mode MODE2.
524 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
525 for any hard reg, then this must be 0 for correct output. */
526 #define MODES_TIEABLE_P(MODE1, MODE2) \
527 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
529 /* Specify the registers used for certain standard purposes.
530 The values of these macros are register numbers. */
532 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
533 /* #define PC_REGNUM */
535 /* Register to use for pushing function arguments. */
536 #define STACK_POINTER_REGNUM 30
538 /* Base register for access to local variables of the function. */
539 #define FRAME_POINTER_REGNUM 3
541 /* Value should be nonzero if functions must have frame pointers. */
542 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
545 /* C statement to store the difference between the frame pointer
546 and the stack pointer values immediately after the function prologue.
548 Note, we always pretend that this is a leaf function because if
549 it's not, there's no point in trying to eliminate the
550 frame pointer. If it is a leaf function, we guessed right! */
551 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
552 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
554 /* Base register for access to arguments of the function. */
555 #define ARG_POINTER_REGNUM 3
557 /* Register in which static-chain is passed to a function. */
559 #define STATIC_CHAIN_REGNUM 29
561 /* Register which holds offset table for position-independent
564 #define PIC_OFFSET_TABLE_REGNUM 19
565 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
567 /* Register into which we save the PIC_OFFEST_TABLE_REGNUM so that it
568 can be restore across function calls. */
569 #define PIC_OFFSET_TABLE_REGNUM_SAVED 4
571 /* SOM ABI says that objects larger than 64 bits are returned in memory. */
572 #define DEFAULT_PCC_STRUCT_RETURN 0
573 #define RETURN_IN_MEMORY(TYPE) \
574 (int_size_in_bytes (TYPE) > 8 || TREE_ADDRESSABLE (TYPE))
576 /* Register in which address to store a structure value
577 is passed to a function. */
578 #define STRUCT_VALUE_REGNUM 28
580 /* Define the classes of registers for register constraints in the
581 machine description. Also define ranges of constants.
583 One of the classes must always be named ALL_REGS and include all hard regs.
584 If there is more than one class, another class must be named NO_REGS
585 and contain no registers.
587 The name GENERAL_REGS must be the name of a class (or an alias for
588 another name such as ALL_REGS). This is the class of registers
589 that is allowed by "g" or "r" in a register constraint.
590 Also, registers outside this class are allocated only when
591 instructions express preferences for them.
593 The classes must be numbered in nondecreasing order; that is,
594 a larger-numbered class must never be contained completely
595 in a smaller-numbered class.
597 For any two classes, it is very desirable that there be another
598 class that represents their union. */
600 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
601 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
602 fmpyadd and fmpysub are restricted. */
604 enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
605 SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
607 #define N_REG_CLASSES (int) LIM_REG_CLASSES
609 /* Give names of register classes as strings for dump file. */
611 #define REG_CLASS_NAMES \
612 {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \
613 "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
615 /* Define which registers fit in which classes.
616 This is an initializer for a vector of HARD_REG_SET
617 of length N_REG_CLASSES. Register 0, the "condition code" register,
620 #define REG_CLASS_CONTENTS \
621 {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
622 {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
623 {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
624 {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
625 {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
626 {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
627 {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
629 /* The same information, inverted:
630 Return the class number of the smallest class containing
631 reg number REGNO. This could be a conditional expression
632 or could index an array. */
634 #define REGNO_REG_CLASS(REGNO) \
635 ((REGNO) == 0 ? NO_REGS \
636 : (REGNO) == 1 ? R1_REGS \
637 : (REGNO) < 32 ? GENERAL_REGS \
638 : (REGNO) < 88 ? FP_REGS \
641 /* The class value for index registers, and the one for base regs. */
642 #define INDEX_REG_CLASS GENERAL_REGS
643 #define BASE_REG_CLASS GENERAL_REGS
645 #define FP_REG_CLASS_P(CLASS) \
648 /* Get reg_class from a letter such as appears in the machine description. */
649 /* Keep 'x' for backward compatibility with user asm. */
650 #define REG_CLASS_FROM_LETTER(C) \
651 ((C) == 'f' ? FP_REGS : \
652 (C) == 'x' ? FP_REGS : \
653 (C) == 'q' ? SHIFT_REGS : \
654 (C) == 'a' ? R1_REGS : \
655 (C) == 'Z' ? ALL_REGS : NO_REGS)
657 /* The letters I, J, K, L and M in a register constraint string
658 can be used to stand for particular ranges of immediate operands.
659 This macro defines what the ranges are.
660 C is the letter, and VALUE is a constant value.
661 Return 1 if VALUE is in the range specified by C.
663 `I' is used for the 11 bit constants.
664 `J' is used for the 14 bit constants.
665 `K' is used for values that can be moved with a zdepi insn.
666 `L' is used for the 5 bit constants.
668 `N' is used for values with the least significant 11 bits equal to zero.
669 `O' is used for numbers n such that n+1 is a power of 2.
672 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
673 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
674 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
675 : (C) == 'K' ? zdepi_cint_p (VALUE) \
676 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
677 : (C) == 'M' ? (VALUE) == 0 \
678 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
679 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
680 : (C) == 'P' ? and_mask_p (VALUE) \
683 /* Similar, but for floating or large integer constants, and defining letters
684 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
686 For PA, `G' is the floating-point constant zero. `H' is undefined. */
688 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
689 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
690 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
693 /* Given an rtx X being reloaded into a reg required to be
694 in class CLASS, return the class of reg to actually use.
695 In general this is just CLASS; but on some machines
696 in some cases it is preferable to use a more restrictive class. */
697 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
699 /* Return the register class of a scratch register needed to copy IN into
700 or out of a register in CLASS in MODE. If it can be done directly,
701 NO_REGS is returned. */
703 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
704 secondary_reload_class (CLASS, MODE, IN)
706 /* On the PA it is not possible to directly move data between
707 GENERAL_REGS and FP_REGS. */
708 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
709 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
711 /* Return the stack location to use for secondary memory needed reloads. */
712 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
713 gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
715 /* Return the maximum number of consecutive registers
716 needed to represent mode MODE in a register of class CLASS. */
717 #define CLASS_MAX_NREGS(CLASS, MODE) \
718 (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \
719 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
721 /* Stack layout; function entry, exit and calling. */
723 /* Define this if pushing a word on the stack
724 makes the stack pointer a smaller address. */
725 /* #define STACK_GROWS_DOWNWARD */
727 /* Believe it or not. */
728 #define ARGS_GROW_DOWNWARD
730 /* Define this if the nominal address of the stack frame
731 is at the high-address end of the local variables;
732 that is, each additional local variable allocated
733 goes at a more negative offset in the frame. */
734 /* #define FRAME_GROWS_DOWNWARD */
736 /* Offset within stack frame to start allocating local variables at.
737 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
738 first local allocated. Otherwise, it is the offset to the BEGINNING
739 of the first local allocated. */
740 #define STARTING_FRAME_OFFSET 8
742 /* If we generate an insn to push BYTES bytes,
743 this says how many the stack pointer really advances by.
744 On the HP-PA, don't define this because there are no push insns. */
745 /* #define PUSH_ROUNDING(BYTES) */
747 /* Offset of first parameter from the argument pointer register value.
748 This value will be negated because the arguments grow down.
749 Also note that on STACK_GROWS_UPWARD machines (such as this one)
750 this is the distance from the frame pointer to the end of the first
751 argument, not it's beginning. To get the real offset of the first
752 argument, the size of the argument must be added.
754 ??? Have to check on this.*/
756 #define FIRST_PARM_OFFSET(FNDECL) -32
758 /* Absolute value of offset from top-of-stack address to location to store the
759 function parameter if it can't go in a register.
760 Addresses for following parameters are computed relative to this one. */
761 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
764 /* When a parameter is passed in a register, stack space is still
766 #define REG_PARM_STACK_SPACE(DECL) 16
768 /* Define this if the above stack space is to be considered part of the
769 space allocated by the caller. */
770 #define OUTGOING_REG_PARM_STACK_SPACE
772 /* Keep the stack pointer constant throughout the function.
773 This is both an optimization and a necessity: longjmp
774 doesn't behave itself when the stack pointer moves within
776 #define ACCUMULATE_OUTGOING_ARGS
778 /* The weird HPPA calling conventions require a minimum of 48 bytes on
779 the stack: 16 bytes for register saves, and 32 bytes for magic.
780 This is the difference between the logical top of stack and the
782 #define STACK_POINTER_OFFSET -32
784 #define STACK_DYNAMIC_OFFSET(FNDECL) \
785 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
787 /* Value is 1 if returning from a function call automatically
788 pops the arguments described by the number-of-args field in the call.
789 FUNDECL is the declaration node of the function (as a tree),
790 FUNTYPE is the data type of the function (as a tree),
791 or for a library call it is an identifier node for the subroutine name. */
793 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
795 /* Define how to find the value returned by a function.
796 VALTYPE is the data type of the value (as a tree).
797 If the precise function being called is known, FUNC is its FUNCTION_DECL;
798 otherwise, FUNC is 0. */
800 /* On the HP-PA the value is found in register(s) 28(-29), unless
801 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
804 #define FUNCTION_VALUE(VALTYPE, FUNC) \
805 gen_rtx (REG, TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \
806 && (TYPE_MODE (VALTYPE) == SFmode || \
807 TYPE_MODE (VALTYPE) == DFmode)) ? \
810 /* Define how to find the value returned by a library function
811 assuming the value has mode MODE. */
813 #define LIBCALL_VALUE(MODE) \
814 gen_rtx (REG, MODE, \
815 (! TARGET_SOFT_FLOAT \
816 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
818 /* 1 if N is a possible register number for a function value
819 as seen by the caller. */
821 #define FUNCTION_VALUE_REGNO_P(N) \
822 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
824 /* 1 if N is a possible register number for function argument passing. */
826 #define FUNCTION_ARG_REGNO_P(N) \
827 (((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
829 /* Define a data type for recording info about an argument list
830 during the scan of that argument list. This data type should
831 hold all necessary information about the function itself
832 and about the args processed so far, enough to enable macros
833 such as FUNCTION_ARG to determine where the next arg should go.
835 On the HP-PA, this is a single integer, which is a number of words
836 of arguments scanned so far (including the invisible argument,
837 if any, which holds the structure-value-address).
838 Thus 4 or more means all following args should go on the stack. */
840 struct hppa_args {int words, nargs_prototype; };
842 #define CUMULATIVE_ARGS struct hppa_args
844 /* Initialize a variable CUM of type CUMULATIVE_ARGS
845 for a call to a function whose data type is FNTYPE.
846 For a library call, FNTYPE is 0. */
848 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
850 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
851 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
852 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
853 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
858 /* Similar, but when scanning the definition of a procedure. We always
859 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
861 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
863 (CUM).nargs_prototype = 1000
865 /* Figure out the size in words of the function argument. */
867 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
868 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
870 /* Update the data in CUM to advance over an argument
871 of mode MODE and data type TYPE.
872 (TYPE is null for libcalls where that information may not be available.) */
874 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
875 { (CUM).nargs_prototype--; \
876 ((((CUM).words & 01) && (TYPE) != 0 \
877 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
879 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
882 /* Determine where to put an argument to a function.
883 Value is zero to push the argument on the stack,
884 or a hard register in which to store the argument.
886 MODE is the argument's machine mode.
887 TYPE is the data type of the argument (as a tree).
888 This is null for libcalls where that information may
890 CUM is a variable of type CUMULATIVE_ARGS which gives info about
891 the preceding args and about the function being called.
892 NAMED is nonzero if this argument is a named parameter
893 (otherwise it is an extra parameter matching an ellipsis).
895 On the HP-PA the first four words of args are normally in registers
896 and the rest are pushed. But any arg that won't entirely fit in regs
899 Arguments passed in registers are either 1 or 2 words long.
901 The caller must make a distinction between calls to explicitly named
902 functions and calls through pointers to functions -- the conventions
903 are different! Calls through pointers to functions only use general
904 registers for the first four argument words.
906 Of course all this is different for the portable runtime model
907 HP wants everyone to use for ELF. Ugh. Here's a quick description
908 of how it's supposed to work.
910 1) callee side remains unchanged. It expects integer args to be
911 in the integer registers, float args in the float registers and
912 unnamed args in integer registers.
914 2) caller side now depends on if the function being called has
915 a prototype in scope (rather than if it's being called indirectly).
917 2a) If there is a prototype in scope, then arguments are passed
918 according to their type (ints in integer registers, floats in float
919 registers, unnamed args in integer registers.
921 2b) If there is no prototype in scope, then floating point arguments
922 are passed in both integer and float registers. egad.
924 FYI: The portable parameter passing conventions are almost exactly like
925 the standard parameter passing conventions on the RS6000. That's why
926 you'll see lots of similar code in rs6000.h. */
928 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
930 /* Do not expect to understand this without reading it several times. I'm
931 tempted to try and simply it, but I worry about breaking something. */
933 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
934 (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
935 ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
936 || !FLOAT_MODE_P (MODE) || TARGET_SOFT_FLOAT \
937 || (CUM).nargs_prototype > 0) \
938 ? gen_rtx (REG, (MODE), \
939 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
940 ? (((!current_call_is_indirect \
941 || TARGET_PORTABLE_RUNTIME) \
942 && (MODE) == DFmode \
943 && ! TARGET_SOFT_FLOAT) \
944 ? ((CUM).words ? 38 : 34) \
945 : ((CUM).words ? 23 : 25)) \
946 : (((!current_call_is_indirect \
947 || TARGET_PORTABLE_RUNTIME) \
948 && (MODE) == SFmode \
949 && ! TARGET_SOFT_FLOAT) \
950 ? (32 + 2 * (CUM).words) \
951 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
953 /* We are calling a non-prototyped function with floating point \
954 arguments using the portable conventions. */ \
955 : gen_rtx (EXPR_LIST, VOIDmode, \
956 gen_rtx (REG, (MODE), \
957 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
958 ? ((CUM).words ? 38 : 34) \
959 : (32 + 2 * (CUM).words))), \
960 gen_rtx (REG, (MODE), \
961 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
962 ? ((CUM).words ? 23 : 25) \
963 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\
965 /* Pass this parameter in the stack. */ \
968 /* For an arg passed partly in registers and partly in memory,
969 this is the number of registers used.
970 For args passed entirely in registers or entirely in memory, zero. */
972 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
974 /* If defined, a C expression that gives the alignment boundary, in
975 bits, of an argument with the specified mode and type. If it is
976 not defined, `PARM_BOUNDARY' is used for all arguments. */
978 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
980 ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
981 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
983 : GET_MODE_ALIGNMENT(MODE)))
985 /* Arguments larger than eight bytes are passed by invisible reference */
987 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
988 ((TYPE) && int_size_in_bytes (TYPE) > 8)
990 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
991 ((TYPE) && int_size_in_bytes (TYPE) > 8)
994 extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
995 extern enum cmp_type hppa_branch_type;
997 /* Output the label for a function definition. */
998 #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
999 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1000 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
1001 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
1003 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1004 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
1005 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
1008 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1009 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
1010 tree tree_type = TREE_TYPE (DECL); \
1013 if (TREE_PUBLIC (DECL) || TARGET_GAS) \
1014 { extern int current_function_varargs; \
1015 if (TREE_PUBLIC (DECL)) \
1017 fputs ("\t.EXPORT ", FILE); \
1018 assemble_name (FILE, NAME); \
1019 fputs (",ENTRY,PRIV_LEV=3", FILE); \
1023 fputs ("\t.PARAM ", FILE); \
1024 assemble_name (FILE, NAME); \
1026 if (TARGET_PORTABLE_RUNTIME) \
1028 fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
1029 fputs ("RTNVAL=NO\n", FILE); \
1032 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
1033 parm = TREE_CHAIN (parm)) \
1035 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode \
1036 && ! TARGET_SOFT_FLOAT) \
1037 fprintf (FILE, ",ARGW%d=FR", i++); \
1038 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode \
1039 && ! TARGET_SOFT_FLOAT) \
1044 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
1052 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
1053 DECL_ARG_TYPE (parm)); \
1054 /* Passing structs by invisible reference uses \
1055 one general register. */ \
1057 || TYPE_NEEDS_CONSTRUCTING (DECL_ARG_TYPE (parm)))\
1059 if (arg_size == 2 && i <= 2) \
1062 fprintf (FILE, ",ARGW%d=GR", i++); \
1063 fprintf (FILE, ",ARGW%d=GR", i++); \
1065 else if (arg_size == 1) \
1066 fprintf (FILE, ",ARGW%d=GR", i++); \
1071 /* anonymous args */ \
1072 if ((TYPE_ARG_TYPES (tree_type) != 0 \
1073 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
1074 != void_type_node)) \
1075 || current_function_varargs) \
1077 for (; i < 4; i++) \
1078 fprintf (FILE, ",ARGW%d=GR", i); \
1080 if (TYPE_MODE (fntype) == DFmode && ! TARGET_SOFT_FLOAT) \
1081 fprintf (FILE, ",RTNVAL=FR"); \
1082 else if (TYPE_MODE (fntype) == SFmode && ! TARGET_SOFT_FLOAT) \
1083 fprintf (FILE, ",RTNVAL=FU"); \
1084 else if (fntype != void_type_node) \
1085 fprintf (FILE, ",RTNVAL=GR"); \
1086 fputs ("\n", FILE); \
1089 /* This macro generates the assembly code for function entry.
1090 FILE is a stdio stream to output the code to.
1091 SIZE is an int: how many units of temporary storage to allocate.
1092 Refer to the array `regs_ever_live' to determine which registers
1093 to save; `regs_ever_live[I]' is nonzero if register number I
1094 is ever used in the function. This macro is responsible for
1095 knowing which registers should not be saved even if used. */
1097 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1098 of memory. If any fpu reg is used in the function, we allocate
1099 such a block here, at the bottom of the frame, just in case it's needed.
1101 If this function is a leaf procedure, then we may choose not
1102 to do a "save" insn. The decision about whether or not
1103 to do this is made in regclass.c. */
1105 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1106 output_function_prologue (FILE, SIZE)
1108 /* Output assembler code to FILE to increment profiler label # LABELNO
1109 for profiling a function entry.
1111 Because HPUX _mcount is so different, we actually emit the
1112 profiling code in function_prologue. This just stores LABELNO for
1115 #define PROFILE_BEFORE_PROLOGUE
1116 #define FUNCTION_PROFILER(FILE, LABELNO) \
1117 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1119 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1120 the stack pointer does not matter. The value is tested only in
1121 functions that have frame pointers.
1122 No definition is equivalent to always zero. */
1124 extern int may_call_alloca;
1125 extern int current_function_pretend_args_size;
1127 #define EXIT_IGNORE_STACK \
1128 (get_frame_size () != 0 \
1129 || current_function_calls_alloca || current_function_outgoing_args_size)
1132 /* This macro generates the assembly code for function exit,
1133 on machines that need it. If FUNCTION_EPILOGUE is not defined
1134 then individual return instructions are generated for each
1135 return statement. Args are same as for FUNCTION_PROLOGUE.
1137 The function epilogue should not depend on the current stack pointer!
1138 It should use the frame pointer only. This is mandatory because
1139 of alloca; we also take advantage of it to omit stack adjustments
1140 before returning. */
1142 /* This declaration is needed due to traditional/ANSI
1143 incompatibilities which cannot be #ifdefed away
1144 because they occur inside of macros. Sigh. */
1145 extern union tree_node *current_function_decl;
1147 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1148 output_function_epilogue (FILE, SIZE)
1150 /* Output assembler code for a block containing the constant parts
1151 of a trampoline, leaving space for the variable parts.\
1153 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1154 and then branches to the specified routine.
1156 This code template is copied from text segment to stack location
1157 and then patched with INITIALIZE_TRAMPOLINE to contain
1158 valid values, and then entered as a subroutine.
1160 It is best to keep this as small as possible to avoid having to
1161 flush multiple lines in the cache. */
1163 #define TRAMPOLINE_TEMPLATE(FILE) \
1165 fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1166 fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1167 fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1168 fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1169 fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1170 fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1171 fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1172 fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1173 fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1174 fprintf (FILE, "\t.word 0\n"); \
1175 fprintf (FILE, "\t.word 0\n"); \
1178 /* Length in units of the trampoline for entering a nested function.
1180 Flush the cache entries corresponding to the first and last addresses
1181 of the trampoline. This is necessary as the trampoline may cross two
1184 If the code part of the trampoline ever grows to > 32 bytes, then it
1185 will become necessary to hack on the cacheflush pattern in pa.md. */
1187 #define TRAMPOLINE_SIZE (11 * 4)
1189 /* Emit RTL insns to initialize the variable parts of a trampoline.
1190 FNADDR is an RTX for the address of the function's pure code.
1191 CXT is an RTX for the static chain value for the function.
1193 Move the function address to the trampoline template at offset 12.
1194 Move the static chain value to trampoline template at offset 16. */
1196 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1198 rtx start_addr, end_addr; \
1200 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1201 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1202 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1203 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1204 /* fdc and fic only use registers for the address to flush, \
1205 they do not accept integer displacements. */ \
1206 start_addr = force_reg (SImode, (TRAMP)); \
1207 end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1208 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1209 end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
1210 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1211 gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1214 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1215 reference the 4 integer arg registers and 4 fp arg registers.
1216 Ordinarily they are not call used registers, but they are for
1217 _builtin_saveregs, so we must make this explicit. */
1219 extern struct rtx_def *hppa_builtin_saveregs ();
1220 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) hppa_builtin_saveregs (ARGLIST)
1223 /* Addressing modes, and classification of registers for them. */
1225 #define HAVE_POST_INCREMENT
1226 #define HAVE_POST_DECREMENT
1228 #define HAVE_PRE_DECREMENT
1229 #define HAVE_PRE_INCREMENT
1231 /* Macros to check register numbers against specific register classes. */
1233 /* These assume that REGNO is a hard or pseudo reg number.
1234 They give nonzero only if REGNO is a hard reg of the suitable class
1235 or a pseudo reg currently allocated to a suitable hard reg.
1236 Since they use reg_renumber, they are safe only once reg_renumber
1237 has been allocated, which happens in local-alloc.c. */
1239 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1240 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1241 #define REGNO_OK_FOR_BASE_P(REGNO) \
1242 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1243 #define REGNO_OK_FOR_FP_P(REGNO) \
1244 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1246 /* Now macros that check whether X is a register and also,
1247 strictly, whether it is in a specified class.
1249 These macros are specific to the the HP-PA, and may be used only
1250 in code for printing assembler insns and in conditions for
1251 define_optimization. */
1253 /* 1 if X is an fp register. */
1255 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1257 /* Maximum number of registers that can appear in a valid memory address. */
1259 #define MAX_REGS_PER_ADDRESS 2
1261 /* Recognize any constant value that is a valid address except
1262 for symbolic addresses. We get better CSE by rejecting them
1263 here and allowing hppa_legitimize_address to break them up. We
1264 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1266 #define CONSTANT_ADDRESS_P(X) \
1267 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1268 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1269 || GET_CODE (X) == HIGH) \
1270 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1272 /* Include all constant integers and constant doubles, but not
1273 floating-point, except for floating-point zero. */
1275 #define LEGITIMATE_CONSTANT_P(X) \
1276 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1277 || (X) == CONST0_RTX (GET_MODE (X))) \
1278 && !(flag_pic && function_label_operand (X, VOIDmode)))
1280 /* Subroutine for EXTRA_CONSTRAINT.
1282 Return 1 iff OP is a pseudo which did not get a hard register and
1283 we are running the reload pass. */
1285 #define IS_RELOADING_PSEUDO_P(OP) \
1286 ((reload_in_progress \
1287 && GET_CODE (OP) == REG \
1288 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1289 && reg_renumber [REGNO (OP)] < 0))
1291 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1293 For the HPPA, `Q' means that this is a memory operand but not a
1294 symbolic memory operand. Note that an unassigned pseudo register
1295 is such a memory operand. Needed because reload will generate
1296 these things in insns and then not re-recognize the insns, causing
1297 constrain_operands to fail.
1303 `T' is for fp loads and stores. */
1304 #define EXTRA_CONSTRAINT(OP, C) \
1306 (IS_RELOADING_PSEUDO_P (OP) \
1307 || (GET_CODE (OP) == MEM \
1308 && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1309 && ! symbolic_memory_operand (OP, VOIDmode))) \
1311 (GET_CODE (OP) == MEM \
1312 /* Using DFmode forces only short displacements \
1313 to be recognized as valid in reg+d addresses. */\
1314 && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1316 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1317 and check its validity for a certain class.
1318 We have two alternate definitions for each of them.
1319 The usual definition accepts all pseudo regs; the other rejects
1320 them unless they have been allocated suitable hard regs.
1321 The symbol REG_OK_STRICT causes the latter definition to be used.
1323 Most source files want to accept pseudo regs in the hope that
1324 they will get allocated to the class that the insn wants them to be in.
1325 Source files for reload pass need to be strict.
1326 After reload, it makes no difference, since pseudo regs have
1327 been eliminated by then. */
1329 #ifndef REG_OK_STRICT
1331 /* Nonzero if X is a hard reg that can be used as an index
1332 or if it is a pseudo reg. */
1333 #define REG_OK_FOR_INDEX_P(X) \
1334 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1335 /* Nonzero if X is a hard reg that can be used as a base reg
1336 or if it is a pseudo reg. */
1337 #define REG_OK_FOR_BASE_P(X) \
1338 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1342 /* Nonzero if X is a hard reg that can be used as an index. */
1343 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1344 /* Nonzero if X is a hard reg that can be used as a base reg. */
1345 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1349 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1350 that is a valid memory address for an instruction.
1351 The MODE argument is the machine mode for the MEM expression
1352 that wants to use this address.
1354 On the HP-PA, the actual legitimate addresses must be
1355 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1356 But we can treat a SYMBOL_REF as legitimate if it is part of this
1357 function's constant-pool, because such addresses can actually
1358 be output as REG+SMALLINT.
1360 Note we only allow 5 bit immediates for access to a constant address;
1361 doing so avoids losing for loading/storing a FP register at an address
1362 which will not fit in 5 bits. */
1364 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1365 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1367 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1368 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1370 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1371 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1373 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1374 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1376 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1378 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1379 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1380 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1381 && REG_P (XEXP (X, 0)) \
1382 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1384 else if (GET_CODE (X) == PLUS) \
1386 rtx base = 0, index; \
1387 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1389 if (GET_CODE (XEXP (X, 1)) == REG \
1390 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1392 else if (flag_pic == 1 \
1393 && GET_CODE (XEXP (X, 1)) == SYMBOL_REF)\
1396 else if (REG_P (XEXP (X, 0)) \
1397 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1398 base = XEXP (X, 0), index = XEXP (X, 1); \
1399 else if (REG_P (XEXP (X, 1)) \
1400 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1401 base = XEXP (X, 1), index = XEXP (X, 0); \
1403 if (GET_CODE (index) == CONST_INT \
1404 && ((INT_14_BITS (index) \
1405 && (TARGET_SOFT_FLOAT \
1406 || ((MODE) != SFmode && (MODE) != DFmode))) \
1407 || INT_5_BITS (index))) \
1410 else if (GET_CODE (X) == LO_SUM \
1411 && GET_CODE (XEXP (X, 0)) == REG \
1412 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1413 && CONSTANT_P (XEXP (X, 1)) \
1414 && (TARGET_SOFT_FLOAT \
1415 || ((MODE) != SFmode \
1416 && (MODE) != DFmode))) \
1418 else if (GET_CODE (X) == LO_SUM \
1419 && GET_CODE (XEXP (X, 0)) == SUBREG \
1420 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1421 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1422 && CONSTANT_P (XEXP (X, 1)) \
1423 && (TARGET_SOFT_FLOAT \
1424 || ((MODE) != SFmode \
1425 && (MODE) != DFmode))) \
1427 else if (GET_CODE (X) == LABEL_REF \
1428 || (GET_CODE (X) == CONST_INT \
1429 && INT_5_BITS (X))) \
1431 /* Needed for -fPIC */ \
1432 else if (GET_CODE (X) == LO_SUM \
1433 && GET_CODE (XEXP (X, 0)) == REG \
1434 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1435 && GET_CODE (XEXP (X, 1)) == UNSPEC) \
1439 /* Try machine-dependent ways of modifying an illegitimate address
1440 to be legitimate. If we find one, return the new, valid address.
1441 This macro is used in only one place: `memory_address' in explow.c.
1443 OLDX is the address as it was before break_out_memory_refs was called.
1444 In some cases it is useful to look at this to decide what needs to be done.
1446 MODE and WIN are passed so that this macro can use
1447 GO_IF_LEGITIMATE_ADDRESS.
1449 It is always safe for this macro to do nothing. It exists to recognize
1450 opportunities to optimize the output. */
1452 extern struct rtx_def *hppa_legitimize_address ();
1453 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1454 { rtx orig_x = (X); \
1455 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1456 if ((X) != orig_x && memory_address_p (MODE, X)) \
1459 /* Go to LABEL if ADDR (a legitimate address expression)
1460 has an effect that depends on the machine mode it is used for. */
1462 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1463 if (GET_CODE (ADDR) == PRE_DEC \
1464 || GET_CODE (ADDR) == POST_DEC \
1465 || GET_CODE (ADDR) == PRE_INC \
1466 || GET_CODE (ADDR) == POST_INC) \
1469 /* Define this macro if references to a symbol must be treated
1470 differently depending on something about the variable or
1471 function named by the symbol (such as what section it is in).
1473 The macro definition, if any, is executed immediately after the
1474 rtl for DECL or other node is created.
1475 The value of the rtl will be a `mem' whose address is a
1478 The usual thing for this macro to do is to a flag in the
1479 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1480 name string in the `symbol_ref' (if one bit is not enough
1483 On the HP-PA we use this to indicate if a symbol is in text or
1484 data space. Also, function labels need special treatment. */
1486 #define TEXT_SPACE_P(DECL)\
1487 (TREE_CODE (DECL) == FUNCTION_DECL \
1488 || (TREE_CODE (DECL) == VAR_DECL \
1489 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1491 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1492 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1494 #define FUNCTION_NAME_P(NAME) \
1495 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1497 #define ENCODE_SECTION_INFO(DECL)\
1499 { if (TEXT_SPACE_P (DECL)) \
1501 if (TREE_CODE (DECL) == FUNCTION_DECL \
1502 || TREE_CODE (DECL) == VAR_DECL) \
1503 _rtl = DECL_RTL (DECL); \
1505 _rtl = TREE_CST_RTL (DECL); \
1506 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1507 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1508 hppa_encode_label (XEXP (DECL_RTL (DECL), 0), 0);\
1513 /* Store the user-specified part of SYMBOL_NAME in VAR.
1514 This is sort of inverse to ENCODE_SECTION_INFO. */
1516 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1517 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1518 1 + (SYMBOL_NAME)[1] == '@'\
1519 : (SYMBOL_NAME)[0] == '@'))
1521 /* Arghh. This is used for stuff in the constant pool; this may include
1522 function addresses on the PA, which during PIC code generation must
1523 reside in the data space. Unfortunately, there's no way to determine
1524 if a particular label in the constant pool refers to a function address.
1525 So just force everything into the data space during PIC generation. */
1526 #define SELECT_RTX_SECTION(RTX,MODE) \
1530 readonly_data_section ();
1532 /* Specify the machine mode that this machine uses
1533 for the index in the tablejump instruction. */
1534 #define CASE_VECTOR_MODE DImode
1536 /* Define this if the tablejump instruction expects the table
1537 to contain offsets from the address of the table.
1538 Do not define this if the table should contain absolute addresses. */
1539 /* #define CASE_VECTOR_PC_RELATIVE */
1541 #define CASE_DROPS_THROUGH
1542 /* Specify the tree operation to be used to convert reals to integers. */
1543 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1545 /* This is the kind of divide that is easiest to do in the general case. */
1546 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1548 /* Define this as 1 if `char' should by default be signed; else as 0. */
1549 #define DEFAULT_SIGNED_CHAR 1
1551 /* Max number of bytes we can move from memory to memory
1552 in one reasonably fast instruction. */
1555 /* Higher than the default as we prefer to use simple move insns
1556 (better scheduling and delay slot filling) and because our
1557 built-in block move is really a 2X unrolled loop. */
1558 #define MOVE_RATIO 4
1560 /* Define if operations between registers always perform the operation
1561 on the full register even if a narrower mode is specified. */
1562 #define WORD_REGISTER_OPERATIONS
1564 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1565 will either zero-extend or sign-extend. The value of this macro should
1566 be the code that says which one of the two operations is implicitly
1567 done, NIL if none. */
1568 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1570 /* Nonzero if access to memory by bytes is slow and undesirable. */
1571 #define SLOW_BYTE_ACCESS 1
1573 /* Do not break .stabs pseudos into continuations. */
1574 #define DBX_CONTIN_LENGTH 0
1576 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1577 is done just by pretending it is already truncated. */
1578 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1580 /* We assume that the store-condition-codes instructions store 0 for false
1581 and some other value for true. This is the value stored for true. */
1583 #define STORE_FLAG_VALUE 1
1585 /* When a prototype says `char' or `short', really pass an `int'. */
1586 #define PROMOTE_PROTOTYPES
1588 /* Specify the machine mode that pointers have.
1589 After generation of rtl, the compiler makes no further distinction
1590 between pointers and any other objects of this machine mode. */
1591 #define Pmode SImode
1593 /* Add any extra modes needed to represent the condition code.
1595 HPPA floating comparisons produce condition codes. */
1596 #define EXTRA_CC_MODES CCFPmode
1598 /* Define the names for the modes specified above. */
1599 #define EXTRA_CC_NAMES "CCFP"
1601 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1602 return the mode to be used for the comparison. For floating-point, CCFPmode
1603 should be used. CC_NOOVmode should be used when the first operand is a
1604 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1606 #define SELECT_CC_MODE(OP,X,Y) \
1607 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1609 /* A function address in a call instruction
1610 is a byte address (for indexing purposes)
1611 so give the MEM rtx a byte's mode. */
1612 #define FUNCTION_MODE SImode
1614 /* Define this if addresses of constant functions
1615 shouldn't be put through pseudo regs where they can be cse'd.
1616 Desirable on machines where ordinary constants are expensive
1617 but a CALL with constant address is cheap. */
1618 #define NO_FUNCTION_CSE
1620 /* Define this to be nonzero if shift instructions ignore all but the low-order
1622 #define SHIFT_COUNT_TRUNCATED 1
1624 /* Use atexit for static constructors/destructors, instead of defining
1625 our own exit function. */
1628 /* Compute the cost of computing a constant rtl expression RTX
1629 whose rtx-code is CODE. The body of this macro is a portion
1630 of a switch statement. If the code is computed here,
1631 return it with a return statement. Otherwise, break from the switch. */
1633 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1635 if (INTVAL (RTX) == 0) return 0; \
1636 if (INT_14_BITS (RTX)) return 1; \
1643 case CONST_DOUBLE: \
1644 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1645 && OUTER_CODE != SET) \
1650 #define ADDRESS_COST(RTX) \
1651 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1653 /* Compute extra cost of moving data between one register class
1656 Make moves from SAR so expensive they should never happen. We used to
1657 have 0xffff here, but that generates overflow in rare cases.
1659 Copies involving a FP register and a non-FP register are relatively
1660 expensive because they must go through memory.
1662 Other copies are reasonably cheap. */
1663 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1664 (CLASS1 == SHIFT_REGS ? 0x100 \
1665 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1666 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1670 /* Provide the costs of a rtl expression. This is in the body of a
1671 switch on CODE. The purpose for the cost of MULT is to encourage
1672 `synth_mult' to find a synthetic multiply when reasonable. */
1674 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1676 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1677 return COSTS_N_INSNS (3); \
1678 return (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
1679 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1681 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1682 return COSTS_N_INSNS (14); \
1686 return COSTS_N_INSNS (60); \
1687 case PLUS: /* this includes shNadd insns */ \
1689 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1690 return COSTS_N_INSNS (3); \
1691 return COSTS_N_INSNS (1); \
1695 return COSTS_N_INSNS (1);
1697 /* Adjust the cost of dependencies. */
1699 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1700 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1702 /* Handling the special cases is going to get too complicated for a macro,
1703 just call `pa_adjust_insn_length' to do the real work. */
1704 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1705 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1707 /* Enable a bug fix. (This is for extra caution.) */
1708 #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1710 /* Millicode insns are actually function calls with some special
1711 constraints on arguments and register usage.
1713 Millicode calls always expect their arguments in the integer argument
1714 registers, and always return their result in %r29 (ret1). They
1715 are expected to clobber their arguments, %r1, %r29, and %r31 and
1718 These macros tell reorg that the references to arguments and
1719 register clobbers for millicode calls do not appear to happen
1720 until after the millicode call. This allows reorg to put insns
1721 which set the argument registers into the delay slot of the millicode
1722 call -- thus they act more like traditional CALL_INSNs.
1724 get_attr_type will try to recognize the given insn, so make sure to
1725 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1727 #define INSN_SETS_ARE_DELAYED(X) \
1728 ((GET_CODE (X) == INSN \
1729 && GET_CODE (PATTERN (X)) != SEQUENCE \
1730 && GET_CODE (PATTERN (X)) != USE \
1731 && GET_CODE (PATTERN (X)) != CLOBBER \
1732 && get_attr_type (X) == TYPE_MILLI))
1734 #define INSN_REFERENCES_ARE_DELAYED(X) \
1735 ((GET_CODE (X) == INSN \
1736 && GET_CODE (PATTERN (X)) != SEQUENCE \
1737 && GET_CODE (PATTERN (X)) != USE \
1738 && GET_CODE (PATTERN (X)) != CLOBBER \
1739 && get_attr_type (X) == TYPE_MILLI))
1742 /* Control the assembler format that we output. */
1744 /* Output at beginning of assembler file. */
1746 #define ASM_FILE_START(FILE) \
1747 do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1748 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1749 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1751 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1752 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1753 \t.IMPORT $global$,DATA\n\
1754 \t.IMPORT $$dyncall,MILLICODE\n");\
1756 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1757 if (write_symbols != NO_DEBUG) \
1758 output_file_directive ((FILE), main_input_filename); \
1761 /* Output to assembler file text saying following lines
1762 may contain character constants, extra white space, comments, etc. */
1764 #define ASM_APP_ON ""
1766 /* Output to assembler file text saying following lines
1767 no longer contain unusual constructs. */
1769 #define ASM_APP_OFF ""
1771 /* We don't yet know how to identify GCC to HP-PA machines. */
1772 #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1774 /* Output before code. */
1776 /* Supposedly the assembler rejects the command if there is no tab! */
1777 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1779 /* Output before read-only data. */
1781 /* Supposedly the assembler rejects the command if there is no tab! */
1782 #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1784 #define READONLY_DATA_SECTION readonly_data
1786 /* Output before writable data. */
1788 /* Supposedly the assembler rejects the command if there is no tab! */
1789 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1791 /* Output before uninitialized data. */
1793 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1795 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1797 #define EXTRA_SECTIONS in_bss, in_readonly_data
1799 /* FIXME: HPUX ld generates incorrect GOT entries for "T" fixups
1800 which reference data within the $TEXT$ space (for example constant
1801 strings in the $LIT$ subspace).
1803 The assemblers (GAS and HP as) both have problems with handling
1804 the difference of two symbols which is the other correct way to
1805 reference constant data during PIC code generation.
1807 So, there's no way to reference constant data which is in the
1808 $TEXT$ space during PIC generation. Instead place all constant
1809 data into the $PRIVATE$ subspace (this reduces sharing, but it
1810 works correctly). */
1812 #define EXTRA_SECTION_FUNCTIONS \
1816 if (in_section != in_bss) \
1818 fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1819 in_section = in_bss; \
1825 if (in_section != in_readonly_data) \
1828 fprintf (asm_out_file, "%s\n", DATA_SECTION_ASM_OP); \
1830 fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1831 in_section = in_readonly_data; \
1836 /* How to refer to registers in assembler output.
1837 This sequence is indexed by compiler's hard-register-number (see above). */
1839 #define REGISTER_NAMES \
1840 {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1841 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1842 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1843 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1844 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1845 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
1846 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
1847 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
1848 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
1849 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
1850 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
1853 #define ADDITIONAL_REGISTER_NAMES \
1854 {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
1855 {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
1856 {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
1857 {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
1858 {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
1859 {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
1860 {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
1863 /* How to renumber registers for dbx and gdb.
1865 Registers 0 - 31 remain unchanged.
1867 Registers 32 - 87 are mapped to 72 - 127
1869 Register 88 is mapped to 32. */
1871 #define DBX_REGISTER_NUMBER(REGNO) \
1872 ((REGNO) <= 31 ? (REGNO) : \
1873 ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
1875 /* This is how to output the definition of a user-level label named NAME,
1876 such as the label on a static function or variable NAME. */
1878 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1879 do { assemble_name (FILE, NAME); \
1880 fputc ('\n', FILE); } while (0)
1882 /* This is how to output a command to make the user-level label named NAME
1883 defined for reference from other files. */
1885 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1886 do { fputs ("\t.IMPORT ", FILE); \
1887 assemble_name (FILE, NAME); \
1888 if (FUNCTION_NAME_P (NAME)) \
1889 fputs (",CODE\n", FILE); \
1891 fputs (",DATA\n", FILE); \
1894 /* The bogus HP assembler requires ALL external references to be
1895 "imported", even library calls. They look a bit different, so
1898 Also note not all libcall names are passed to ENCODE_SECTION_INFO
1899 (__main for example). To make sure all libcall names have section
1900 info recorded in them, we do it here. */
1902 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1903 do { fputs ("\t.IMPORT ", FILE); \
1904 if (!function_label_operand (RTL, VOIDmode)) \
1905 hppa_encode_label (RTL, 1); \
1906 assemble_name (FILE, XSTR ((RTL), 0)); \
1907 fputs (",CODE\n", FILE); \
1910 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1912 /* We only handle DATA objects here, functions are globalized in \
1913 ASM_DECLARE_FUNCTION_NAME. */ \
1914 if (! FUNCTION_NAME_P (NAME)) \
1916 fputs ("\t.EXPORT ", FILE); \
1917 assemble_name (FILE, NAME); \
1918 fputs (",DATA\n", FILE); \
1922 /* This is how to output a reference to a user-level label named NAME.
1923 `assemble_name' uses this. */
1925 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1926 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1928 /* This is how to output an internal numbered label where
1929 PREFIX is the class of label and NUM is the number within the class. */
1931 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1932 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1934 /* This is how to store into the string LABEL
1935 the symbol_ref name of an internal numbered label where
1936 PREFIX is the class of label and NUM is the number within the class.
1937 This is suitable for output with `assemble_name'. */
1939 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1940 sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1942 /* This is how to output an assembler line defining a `double' constant. */
1944 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1946 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1947 fprintf (FILE, "\t.word 0x%lx\n\t.word 0x%lx\n", l[0], l[1]); \
1950 /* This is how to output an assembler line defining a `float' constant. */
1952 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1954 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1955 fprintf (FILE, "\t.word 0x%lx\n", l); \
1958 /* This is how to output an assembler line defining an `int' constant. */
1960 #define ASM_OUTPUT_INT(FILE,VALUE) \
1961 { fprintf (FILE, "\t.word "); \
1962 if (function_label_operand (VALUE, VOIDmode) \
1963 && !TARGET_PORTABLE_RUNTIME) \
1964 fprintf (FILE, "P%%"); \
1965 output_addr_const (FILE, (VALUE)); \
1966 fprintf (FILE, "\n");}
1968 /* Likewise for `short' and `char' constants. */
1970 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1971 ( fprintf (FILE, "\t.half "), \
1972 output_addr_const (FILE, (VALUE)), \
1973 fprintf (FILE, "\n"))
1975 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1976 ( fprintf (FILE, "\t.byte "), \
1977 output_addr_const (FILE, (VALUE)), \
1978 fprintf (FILE, "\n"))
1980 /* This is how to output an assembler line for a numeric constant byte. */
1982 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1983 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1985 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1986 output_ascii ((FILE), (P), (SIZE))
1988 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1989 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1990 /* This is how to output an element of a case-vector that is absolute.
1991 Note that this method makes filling these branch delay slots
1994 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1995 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1997 /* Jump tables are executable code and live in the TEXT section on the PA. */
1998 #define JUMP_TABLES_IN_TEXT_SECTION
2000 /* This is how to output an element of a case-vector that is relative.
2001 This must be defined correctly as it is used when generating PIC code.
2003 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
2004 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
2005 rather than a table of absolute addresses. */
2007 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2008 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
2010 /* This is how to output an assembler line
2011 that says to advance the location counter
2012 to a multiple of 2**LOG bytes. */
2014 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2015 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
2017 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2018 fprintf (FILE, "\t.blockz %d\n", (SIZE))
2020 /* This says how to output an assembler line to define a global common symbol
2021 with size SIZE (in bytes) and alignment ALIGN (in bits). */
2023 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
2025 assemble_name ((FILE), (NAME)); \
2026 fputs ("\t.comm ", (FILE)); \
2027 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
2029 /* This says how to output an assembler line to define a local common symbol
2030 with size SIZE (in bytes) and alignment ALIGN (in bits). */
2032 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
2034 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
2035 assemble_name ((FILE), (NAME)); \
2036 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
2038 /* Store in OUTPUT a string (made with alloca) containing
2039 an assembler-name for a local static variable named NAME.
2040 LABELNO is an integer which is different for each call. */
2042 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2043 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
2044 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
2046 /* Define the parentheses used to group arithmetic operations
2047 in assembler code. */
2049 #define ASM_OPEN_PAREN "("
2050 #define ASM_CLOSE_PAREN ")"
2052 /* All HP assemblers use "!" to separate logical lines. */
2053 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
2055 /* Define results of standard character escape sequences. */
2056 #define TARGET_BELL 007
2057 #define TARGET_BS 010
2058 #define TARGET_TAB 011
2059 #define TARGET_NEWLINE 012
2060 #define TARGET_VT 013
2061 #define TARGET_FF 014
2062 #define TARGET_CR 015
2064 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
2065 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
2067 /* Print operand X (an rtx) in assembler syntax to file FILE.
2068 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2069 For `%' followed by punctuation, CODE is the punctuation and X is null.
2071 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
2072 and an immediate zero should be represented as `r0'.
2074 Several % codes are defined:
2076 C compare conditions
2077 N extract conditions
2078 M modifier to handle preincrement addressing for memory refs.
2079 F modifier to handle preincrement addressing for fp memory refs */
2081 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2084 /* Print a memory address as an operand to reference that memory location. */
2086 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2087 { register rtx addr = ADDR; \
2088 register rtx base; \
2090 switch (GET_CODE (addr)) \
2093 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
2096 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
2097 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
2098 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2099 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
2102 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
2105 if (!symbolic_operand (XEXP (addr, 1))) \
2106 fputs ("R'", FILE); \
2107 else if (flag_pic == 0) \
2108 fputs ("RR'", FILE); \
2109 else if (flag_pic == 1) \
2111 else if (flag_pic == 2) \
2112 fputs ("RT'", FILE); \
2113 output_global_address (FILE, XEXP (addr, 1)); \
2114 fputs ("(", FILE); \
2115 output_operand (XEXP (addr, 0), 0); \
2116 fputs (")", FILE); \
2119 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
2122 output_addr_const (FILE, addr); \
2126 /* Define functions in pa.c and used in insn-output.c. */
2128 extern char *output_and ();
2129 extern char *output_ior ();
2130 extern char *output_move_double ();
2131 extern char *output_fp_move_double ();
2132 extern char *output_block_move ();
2133 extern char *output_cbranch ();
2134 extern char *output_bb ();
2135 extern char *output_dbra ();
2136 extern char *output_movb ();
2137 extern char *output_return ();
2138 extern char *output_call ();
2139 extern char *output_mul_insn ();
2140 extern char *output_div_insn ();
2141 extern char *output_mod_insn ();
2142 extern char *singlemove_string ();
2143 extern void output_arg_descriptor ();
2144 extern void output_global_address ();
2145 extern struct rtx_def *legitimize_pic_address ();
2146 extern struct rtx_def *gen_cmp_fp ();
2147 extern void hppa_encode_label ();
2149 /* We want __gcc_plt_call to appear in every program built by
2150 gcc, so we make a reference to it out of __main.
2151 We use the asm statement to fool the optimizer into not
2152 removing the dead (but important) initialization of
2155 #define DO_GLOBAL_DTORS_BODY \
2157 extern void __gcc_plt_call (); \
2158 void (*reference)() = &__gcc_plt_call; \
2160 __asm__ ("" : : "r" (reference)); \
2161 for (p = __DTOR_LIST__ + 1; *p; ) \
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