1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@mcc.com)
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 enum cmp_type /* comparison type */
25 CMP_SI, /* compare integers */
26 CMP_SF, /* compare single precision floats */
27 CMP_DF, /* compare double precision floats */
28 CMP_MAX /* max comparison type */
31 /* Print subsidiary information on the compiler version in use. */
33 #define TARGET_VERSION fprintf (stderr, " (hppa)");
35 /* Run-time compilation parameters selecting different hardware subsets. */
37 extern int target_flags;
39 /* compile code for HP-PA 1.1 ("Snake") */
41 #define TARGET_SNAKE (target_flags & 1)
43 /* Disable all FP registers (they all become fixed). This may be necessary
44 for compiling kernels which perform lazy context switching of FP regs.
45 Note if you use this option and try to perform floating point operations
46 the compiler will abort! */
48 #define TARGET_DISABLE_FPREGS (target_flags & 2)
50 /* Allow unconditional jumps in the delay slots of call instructions. */
51 #define TARGET_JUMP_IN_DELAY (target_flags & 8)
53 /* Force all function calls to indirect addressing via a register. This
54 avoids lossage when the function is very far away from the current PC.
56 ??? What about simple jumps, they can suffer from the same problem.
57 Would require significant surgery in pa.md. */
59 #define TARGET_LONG_CALLS (target_flags & 16)
61 /* Disable indexed addressing modes. */
63 #define TARGET_DISABLE_INDEXING (target_flags & 32)
65 /* Emit code which follows the new portable runtime calling conventions
66 HP wants everyone to use for ELF objects. If at all possible you want
67 to avoid this since it's a performance loss for non-prototyped code.
69 Note TARGET_PORTABLE_RUNTIME also implies TARGET_LONG_CALLS. */
71 #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
73 /* Emit directives only understood by GAS. This allows parameter
74 relocations to work for static functions. There is no way
75 to make them work the HP assembler at this time. */
77 #define TARGET_GAS (target_flags & 128)
79 /* Macro to define tables used to set the flags.
80 This is a list in braces of pairs in braces,
81 each pair being { "NAME", VALUE }
82 where VALUE is the bits to set or minus the bits to clear.
83 An empty string NAME is used to identify the default VALUE. */
85 #define TARGET_SWITCHES \
88 {"pa-risc-1-0", -1}, \
90 {"disable-fpregs", 2}, \
91 {"no-disable-fpregs", 2}, \
92 {"jump-in-delay", 8}, \
93 {"no-jump-in-delay", -8}, \
95 {"no-long-calls", -16}, \
96 {"disable-indexing", 32}, \
97 {"no-disable-indexing", -32},\
98 {"portable-runtime", 64+16},\
99 {"no-portable-runtime", -(64+16)},\
102 { "", TARGET_DEFAULT}}
104 #ifndef TARGET_DEFAULT
105 #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
108 #define DBX_DEBUGGING_INFO
109 #define DEFAULT_GDB_EXTENSIONS 1
111 /* This is the way other stabs-in-XXX tools do things. We will be
113 #define DBX_BLOCKS_FUNCTION_RELATIVE 1
115 /* Likewise for linenos.
117 We make the first line stab special to avoid adding several
118 gross hacks to GAS. */
119 #undef ASM_OUTPUT_SOURCE_LINE
120 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
121 { static int sym_lineno = 1; \
122 static tree last_function_decl = NULL; \
123 if (current_function_decl == last_function_decl) \
124 fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
126 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
129 fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
130 last_function_decl = current_function_decl; \
133 /* But, to make this work, we have to output the stabs for the function
135 #define DBX_FUNCTION_FIRST
137 /* Only lables should ever begin in colunm zero. */
138 #define ASM_STABS_OP "\t.stabs"
139 #define ASM_STABN_OP "\t.stabn"
141 /* GDB always assumes the current function's frame begins at the value
142 of the stack pointer upon entry to the current function. Accessing
143 local variables and parameters passed on the stack is done using the
144 base of the frame + an offset provided by GCC.
146 For functions which have frame pointers this method works fine;
147 the (frame pointer) == (stack pointer at function entry) and GCC provides
148 an offset relative to the frame pointer.
150 This loses for functions without a frame pointer; GCC provides an offset
151 which is relative to the stack pointer after adjusting for the function's
152 frame size. GDB would prefer the offset to be relative to the value of
153 the stack pointer at the function's entry. Yuk! */
154 #define DEBUGGER_AUTO_OFFSET(X) \
155 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
156 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
158 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
159 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
160 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
162 #if (TARGET_DEFAULT & 1) == 0
163 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
164 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
166 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:-D__hp9000s700 -D_PA_RISC1_1}}"
169 /* Defines for a K&R CC */
171 #define CC1_SPEC "%{pg:} %{p:}"
173 #define LINK_SPEC "-u main"
175 /* Allow $ in identifiers. */
176 #define DOLLARS_IN_IDENTIFIERS 2
178 /* Make gcc agree with <machine/ansi.h> */
180 #define SIZE_TYPE "unsigned int"
181 #define PTRDIFF_TYPE "int"
182 #define WCHAR_TYPE "unsigned int"
183 #define WCHAR_TYPE_SIZE 32
185 /* Sometimes certain combinations of command options do not make sense
186 on a particular target machine. You can define a macro
187 `OVERRIDE_OPTIONS' to take account of this. This macro, if
188 defined, is executed once just after all the command options have
191 On the PA, it is used to explicitly warn the user that -fpic and -fPIC
194 #define OVERRIDE_OPTIONS \
197 warning ("-fpic and -fPIC are not supported on the PA."); \
200 /* Show we can debug even without a frame pointer. */
201 #define CAN_DEBUG_WITHOUT_FP
203 /* Names to predefine in the preprocessor for this target machine. */
205 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
207 /* target machine storage layout */
209 /* Define this if most significant bit is lowest numbered
210 in instructions that operate on numbered bit-fields. */
211 #define BITS_BIG_ENDIAN 1
213 /* Define this if most significant byte of a word is the lowest numbered. */
214 /* That is true on the HP-PA. */
215 #define BYTES_BIG_ENDIAN 1
217 /* Define this if most significant word of a multiword number is lowest
219 /* For the HP-PA we can decide arbitrarily
220 since there are no machine instructions for them. */
221 #define WORDS_BIG_ENDIAN 1
223 /* number of bits in an addressable storage unit */
224 #define BITS_PER_UNIT 8
226 /* Width in bits of a "word", which is the contents of a machine register.
227 Note that this is not necessarily the width of data type `int';
228 if using 16-bit ints on a 68000, this would still be 32.
229 But on a machine with 16-bit registers, this would be 16. */
230 #define BITS_PER_WORD 32
232 /* Width of a word, in units (bytes). */
233 #define UNITS_PER_WORD 4
235 /* Width in bits of a pointer.
236 See also the macro `Pmode' defined below. */
237 #define POINTER_SIZE 32
239 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
240 #define PARM_BOUNDARY 32
242 /* Largest alignment required for any stack parameter, in bits.
243 Don't define this if it is equal to PARM_BOUNDARY */
244 #define MAX_PARM_BOUNDARY 64
246 /* Boundary (in *bits*) on which stack pointer should be aligned. */
247 #define STACK_BOUNDARY 512
249 /* Allocation boundary (in *bits*) for the code of a function. */
250 #define FUNCTION_BOUNDARY 32
252 /* Alignment of field after `int : 0' in a structure. */
253 #define EMPTY_FIELD_BOUNDARY 32
255 /* Every structure's size must be a multiple of this. */
256 #define STRUCTURE_SIZE_BOUNDARY 8
258 /* A bitfield declared as `int' forces `int' alignment for the struct. */
259 #define PCC_BITFIELD_TYPE_MATTERS 1
261 /* No data type wants to be aligned rounder than this. */
262 #define BIGGEST_ALIGNMENT 64
264 /* The .align directive in the HP assembler allows up to a 32 alignment. */
265 #define MAX_OFILE_ALIGNMENT 32768
267 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
268 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
269 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
271 /* Make arrays of chars word-aligned for the same reasons. */
272 #define DATA_ALIGNMENT(TYPE, ALIGN) \
273 (TREE_CODE (TYPE) == ARRAY_TYPE \
274 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
275 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
278 /* Set this nonzero if move instructions will actually fail to work
279 when given unaligned data. */
280 #define STRICT_ALIGNMENT 1
282 /* Generate calls to memcpy, memcmp and memset. */
283 #define TARGET_MEM_FUNCTIONS
285 /* Standard register usage. */
287 /* Number of actual hardware registers.
288 The hardware registers are assigned numbers for the compiler
289 from 0 to just below FIRST_PSEUDO_REGISTER.
290 All registers that the compiler knows about must be given numbers,
291 even those that are not normally considered general registers.
293 HP-PA 1.0 has 32 fullword registers and 16 floating point
294 registers. The floating point registers hold either word or double
297 16 additional registers are reserved.
299 HP-PA 1.1 has 32 fullword registers and 32 floating point
300 registers. However, the floating point registers behave
301 differently: the left and right halves of registers are addressable
302 as 32 bit registers. So, we will set things up like the 68k which
303 has different fp units: define separate register sets for the 1.0
306 #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
309 /* 1 for registers that have pervasive standard uses
310 and are not available for the register allocator.
312 On the HP-PA, these are:
313 Reg 0 = 0 (hardware). However, 0 is used for condition code,
315 Reg 1 = ADDIL target/Temporary (hardware).
316 Reg 2 = Return Pointer
317 Reg 3 = Frame Pointer
318 Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
319 Reg 4-18 = Preserved Registers
320 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
321 Reg 20-22 = Temporary Registers
322 Reg 23-26 = Temporary/Parameter Registers
323 Reg 27 = Global Data Pointer (hp)
324 Reg 28 = Temporary/???/Return Value register
325 Reg 29 = Temporary/Static Chain/Return Value register
326 Reg 30 = stack pointer
327 Reg 31 = Temporary/Millicode Return Pointer (hp)
329 Freg 0-3 = Status Registers -- Not known to the compiler.
330 Freg 4-7 = Arguments/Return Value
331 Freg 8-11 = Temporary Registers
332 Freg 12-15 = Preserved Registers
334 Freg 16-31 = Reserved
336 On the Snake, fp regs are
338 Freg 0-3 = Status Registers -- Not known to the compiler.
339 Freg 4L-7R = Arguments/Return Value
340 Freg 8L-11R = Temporary Registers
341 Freg 12L-21R = Preserved Registers
342 Freg 22L-31R = Temporary Registers
346 #define FIXED_REGISTERS \
347 {0, 0, 0, 0, 0, 0, 0, 0, \
348 0, 0, 0, 0, 0, 0, 0, 0, \
349 0, 0, 0, 0, 0, 0, 0, 0, \
350 0, 0, 0, 1, 0, 0, 1, 0, \
352 0, 0, 0, 0, 0, 0, 0, 0, \
353 0, 0, 0, 0, 0, 0, 0, 0, \
354 0, 0, 0, 0, 0, 0, 0, 0, \
355 0, 0, 0, 0, 0, 0, 0, 0, \
356 0, 0, 0, 0, 0, 0, 0, 0, \
357 0, 0, 0, 0, 0, 0, 0, 0, \
358 0, 0, 0, 0, 0, 0, 0, 0, \
361 /* 1 for registers not available across function calls.
362 These must include the FIXED_REGISTERS and also any
363 registers that can be used without being saved.
364 The latter must include the registers where values are returned
365 and the register where structure-value addresses are passed.
366 Aside from that, you can include as many other registers as you like. */
367 #define CALL_USED_REGISTERS \
368 {1, 1, 1, 0, 0, 0, 0, 0, \
369 0, 0, 0, 0, 0, 0, 0, 0, \
370 0, 0, 0, 1, 1, 1, 1, 1, \
371 1, 1, 1, 1, 1, 1, 1, 1, \
373 1, 1, 1, 1, 1, 1, 1, 1, \
374 1, 1, 1, 1, 1, 1, 1, 1, \
375 0, 0, 0, 0, 0, 0, 0, 0, \
376 0, 0, 0, 0, 0, 0, 0, 0, \
377 0, 0, 0, 0, 1, 1, 1, 1, \
378 1, 1, 1, 1, 1, 1, 1, 1, \
379 1, 1, 1, 1, 1, 1, 1, 1, \
382 #define CONDITIONAL_REGISTER_USAGE \
386 for (i = 56; i < 88; i++) \
387 fixed_regs[i] = call_used_regs[i] = 1; \
388 for (i = 33; i < 88; i += 2) \
389 fixed_regs[i] = call_used_regs[i] = 1; \
391 else if (TARGET_DISABLE_FPREGS) \
393 for (i = 32; i < 88; i++) \
394 fixed_regs[i] = call_used_regs[i] = 1; \
397 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
400 /* Allocate the call used registers first. This should minimize
401 the number of registers that need to be saved (as call used
402 registers will generally not be allocated across a call).
404 Experimentation has shown slightly better results by allocating
405 FP registers first. */
407 #define REG_ALLOC_ORDER \
409 /* caller-saved fp regs. */ \
410 40, 41, 42, 43, 44, 45, 46, 47, \
411 68, 69, 70, 71, 72, 73, 74, 75, \
412 76, 77, 78, 79, 80, 81, 82, 83, \
414 32, 33, 34, 35, 36, 37, 38, 39, \
415 /* caller-saved general regs. */ \
416 19, 20, 21, 22, 23, 24, 25, 26, \
418 /* callee-saved fp regs. */ \
419 48, 49, 50, 51, 52, 53, 54, 55, \
420 56, 57, 58, 59, 60, 61, 62, 63, \
422 /* callee-saved general regs. */ \
423 3, 4, 5, 6, 7, 8, 9, 10, \
424 11, 12, 13, 14, 15, 16, 17, 18, \
425 /* special registers. */ \
429 /* True if register is floating-point. */
430 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
432 /* Return number of consecutive hard regs needed starting at reg REGNO
433 to hold something of mode MODE.
434 This is ordinarily the length in words of a value of mode MODE
435 but can be less for certain modes in special long registers.
437 On the HP-PA, ordinary registers hold 32 bits worth;
438 The floating point registers are 64 bits wide. Snake fp regs are 32
440 #define HARD_REGNO_NREGS(REGNO, MODE) \
441 (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
442 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
444 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
445 On the HP-PA, the cpu registers can hold any mode. We
446 force this to be an even register is it cannot hold the full mode. */
447 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
448 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
449 /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
450 : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
451 ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
452 /* Make wide modes be in aligned registers. */ \
453 : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
455 /* Value is 1 if it is a good idea to tie two pseudo registers
456 when one has mode MODE1 and one has mode MODE2.
457 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
458 for any hard reg, then this must be 0 for correct output. */
459 #define MODES_TIEABLE_P(MODE1, MODE2) \
460 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
462 /* Specify the registers used for certain standard purposes.
463 The values of these macros are register numbers. */
465 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
466 /* #define PC_REGNUM */
468 /* Register to use for pushing function arguments. */
469 #define STACK_POINTER_REGNUM 30
471 /* Base register for access to local variables of the function. */
472 #define FRAME_POINTER_REGNUM 3
474 /* Value should be nonzero if functions must have frame pointers. */
475 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
478 /* C statement to store the difference between the frame pointer
479 and the stack pointer values immediately after the function prologue.
481 Note, we always pretend that this is a leaf function because if
482 it's not, there's no point in trying to eliminate the
483 frame pointer. If it is a leaf function, we guessed right! */
484 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
485 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
487 /* Base register for access to arguments of the function. */
488 #define ARG_POINTER_REGNUM 3
490 /* Register in which static-chain is passed to a function. */
492 #define STATIC_CHAIN_REGNUM 29
494 /* Register which holds offset table for position-independent
497 #define PIC_OFFSET_TABLE_REGNUM 19
499 #define FINALIZE_PIC finalize_pic ()
501 /* SOM ABI says that objects larger than 64 bits are returned in memory. */
502 #define RETURN_IN_MEMORY(TYPE) \
503 (TYPE_MODE (TYPE) == BLKmode || int_size_in_bytes (TYPE) > 8)
505 /* Register in which address to store a structure value
506 is passed to a function. */
507 #define STRUCT_VALUE_REGNUM 28
509 /* Define the classes of registers for register constraints in the
510 machine description. Also define ranges of constants.
512 One of the classes must always be named ALL_REGS and include all hard regs.
513 If there is more than one class, another class must be named NO_REGS
514 and contain no registers.
516 The name GENERAL_REGS must be the name of a class (or an alias for
517 another name such as ALL_REGS). This is the class of registers
518 that is allowed by "g" or "r" in a register constraint.
519 Also, registers outside this class are allocated only when
520 instructions express preferences for them.
522 The classes must be numbered in nondecreasing order; that is,
523 a larger-numbered class must never be contained completely
524 in a smaller-numbered class.
526 For any two classes, it is very desirable that there be another
527 class that represents their union. */
529 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
530 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
531 fmpyadd and fmpysub are restricted. */
533 enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
534 SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
536 #define N_REG_CLASSES (int) LIM_REG_CLASSES
538 /* Give names of register classes as strings for dump file. */
540 #define REG_CLASS_NAMES \
541 {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \
542 "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
544 /* Define which registers fit in which classes.
545 This is an initializer for a vector of HARD_REG_SET
546 of length N_REG_CLASSES. Register 0, the "condition code" register,
549 #define REG_CLASS_CONTENTS \
550 {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
551 {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
552 {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
553 {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
554 {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
555 {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
556 {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
558 /* The same information, inverted:
559 Return the class number of the smallest class containing
560 reg number REGNO. This could be a conditional expression
561 or could index an array. */
563 #define REGNO_REG_CLASS(REGNO) \
564 ((REGNO) == 0 ? NO_REGS \
565 : (REGNO) == 1 ? R1_REGS \
566 : (REGNO) < 32 ? GENERAL_REGS \
567 : (REGNO) < 88 ? FP_REGS \
570 /* The class value for index registers, and the one for base regs. */
571 #define INDEX_REG_CLASS GENERAL_REGS
572 #define BASE_REG_CLASS GENERAL_REGS
574 #define FP_REG_CLASS_P(CLASS) \
577 /* Get reg_class from a letter such as appears in the machine description. */
578 /* Keep 'x' for backward compatibility with user asm. */
579 #define REG_CLASS_FROM_LETTER(C) \
580 ((C) == 'f' ? FP_REGS : \
581 (C) == 'x' ? FP_REGS : \
582 (C) == 'q' ? SHIFT_REGS : \
583 (C) == 'a' ? R1_REGS : \
584 (C) == 'Z' ? ALL_REGS : NO_REGS)
586 /* The letters I, J, K, L and M in a register constraint string
587 can be used to stand for particular ranges of immediate operands.
588 This macro defines what the ranges are.
589 C is the letter, and VALUE is a constant value.
590 Return 1 if VALUE is in the range specified by C.
592 `I' is used for the 11 bit constants.
593 `J' is used for the 14 bit constants.
594 `K' is used for values that can be moved with a zdepi insn.
595 `L' is used for the 5 bit constants.
597 `N' is used for values with the least significant 11 bits equal to zero.
598 `O' is used for numbers n such that n+1 is a power of 2.
601 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
602 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
603 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
604 : (C) == 'K' ? zdepi_cint_p (VALUE) \
605 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
606 : (C) == 'M' ? (VALUE) == 0 \
607 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
608 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
609 : (C) == 'P' ? and_mask_p (VALUE) \
612 /* Similar, but for floating or large integer constants, and defining letters
613 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
615 For PA, `G' is the floating-point constant zero. `H' is undefined. */
617 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
618 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
619 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
622 /* Given an rtx X being reloaded into a reg required to be
623 in class CLASS, return the class of reg to actually use.
624 In general this is just CLASS; but on some machines
625 in some cases it is preferable to use a more restrictive class. */
626 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
628 /* Return the register class of a scratch register needed to copy IN into
629 or out of a register in CLASS in MODE. If it can be done directly,
630 NO_REGS is returned. */
632 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
633 secondary_reload_class (CLASS, MODE, IN)
635 /* On the PA it is not possible to directly move data between
636 GENERAL_REGS and FP_REGS. */
637 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
638 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
640 /* Return the stack location to use for secondary memory needed reloads. */
641 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
642 gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
644 /* Return the maximum number of consecutive registers
645 needed to represent mode MODE in a register of class CLASS. */
646 #define CLASS_MAX_NREGS(CLASS, MODE) \
647 (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \
648 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
650 /* Stack layout; function entry, exit and calling. */
652 /* Define this if pushing a word on the stack
653 makes the stack pointer a smaller address. */
654 /* #define STACK_GROWS_DOWNWARD */
656 /* Believe it or not. */
657 #define ARGS_GROW_DOWNWARD
659 /* Define this if the nominal address of the stack frame
660 is at the high-address end of the local variables;
661 that is, each additional local variable allocated
662 goes at a more negative offset in the frame. */
663 /* #define FRAME_GROWS_DOWNWARD */
665 /* Offset within stack frame to start allocating local variables at.
666 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
667 first local allocated. Otherwise, it is the offset to the BEGINNING
668 of the first local allocated. */
669 #define STARTING_FRAME_OFFSET 8
671 /* If we generate an insn to push BYTES bytes,
672 this says how many the stack pointer really advances by.
673 On the HP-PA, don't define this because there are no push insns. */
674 /* #define PUSH_ROUNDING(BYTES) */
676 /* Offset of first parameter from the argument pointer register value.
677 This value will be negated because the arguments grow down.
678 Also note that on STACK_GROWS_UPWARD machines (such as this one)
679 this is the distance from the frame pointer to the end of the first
680 argument, not it's beginning. To get the real offset of the first
681 argument, the size of the argument must be added.
683 ??? Have to check on this.*/
685 #define FIRST_PARM_OFFSET(FNDECL) -32
687 /* Absolute value of offset from top-of-stack address to location to store the
688 function parameter if it can't go in a register.
689 Addresses for following parameters are computed relative to this one. */
690 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
693 /* When a parameter is passed in a register, stack space is still
695 #define REG_PARM_STACK_SPACE(DECL) 16
697 /* Define this if the above stack space is to be considered part of the
698 space allocated by the caller. */
699 #define OUTGOING_REG_PARM_STACK_SPACE
701 /* Keep the stack pointer constant throughout the function.
702 This is both an optimization and a necessity: longjmp
703 doesn't behave itself when the stack pointer moves within
705 #define ACCUMULATE_OUTGOING_ARGS
707 /* The weird HPPA calling conventions require a minimum of 48 bytes on
708 the stack: 16 bytes for register saves, and 32 bytes for magic.
709 This is the difference between the logical top of stack and the
711 #define STACK_POINTER_OFFSET -32
713 #define STACK_DYNAMIC_OFFSET(FNDECL) \
714 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
716 /* Value is 1 if returning from a function call automatically
717 pops the arguments described by the number-of-args field in the call.
718 FUNTYPE is the data type of the function (as a tree),
719 or for a library call it is an identifier node for the subroutine name. */
721 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
723 /* Define how to find the value returned by a function.
724 VALTYPE is the data type of the value (as a tree).
725 If the precise function being called is known, FUNC is its FUNCTION_DECL;
726 otherwise, FUNC is 0. */
728 /* On the HP-PA the value is found in register(s) 28(-29), unless
729 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
732 #define FUNCTION_VALUE(VALTYPE, FUNC) \
733 gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode || \
734 TYPE_MODE (VALTYPE) == DFmode) ? \
737 /* Define how to find the value returned by a library function
738 assuming the value has mode MODE. */
740 #define LIBCALL_VALUE(MODE) \
741 gen_rtx (REG, MODE, ((MODE) == SFmode || (MODE) == DFmode ? 32 : 28))
743 /* 1 if N is a possible register number for a function value
744 as seen by the caller. */
746 #define FUNCTION_VALUE_REGNO_P(N) \
747 ((N) == 28 || (N) == 32)
749 /* 1 if N is a possible register number for function argument passing. */
751 #define FUNCTION_ARG_REGNO_P(N) \
752 (((N) >= 23 && (N) <= 26) || ((N) >= 32 && (N) <= 39))
754 /* Define a data type for recording info about an argument list
755 during the scan of that argument list. This data type should
756 hold all necessary information about the function itself
757 and about the args processed so far, enough to enable macros
758 such as FUNCTION_ARG to determine where the next arg should go.
760 On the HP-PA, this is a single integer, which is a number of words
761 of arguments scanned so far (including the invisible argument,
762 if any, which holds the structure-value-address).
763 Thus 4 or more means all following args should go on the stack. */
765 struct hppa_args {int words, nargs_prototype; };
767 #define CUMULATIVE_ARGS struct hppa_args
769 /* Initialize a variable CUM of type CUMULATIVE_ARGS
770 for a call to a function whose data type is FNTYPE.
771 For a library call, FNTYPE is 0. */
773 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
775 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
776 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
777 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
778 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
783 /* Similar, but when scanning the definition of a procedure. We always
784 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
786 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
788 (CUM).nargs_prototype = 1000
790 /* Figure out the size in words of the function argument. */
792 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
793 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
795 /* Update the data in CUM to advance over an argument
796 of mode MODE and data type TYPE.
797 (TYPE is null for libcalls where that information may not be available.) */
799 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
800 { (CUM).nargs_prototype--; \
801 ((((CUM).words & 01) && (TYPE) != 0 \
802 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
804 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
807 /* Determine where to put an argument to a function.
808 Value is zero to push the argument on the stack,
809 or a hard register in which to store the argument.
811 MODE is the argument's machine mode.
812 TYPE is the data type of the argument (as a tree).
813 This is null for libcalls where that information may
815 CUM is a variable of type CUMULATIVE_ARGS which gives info about
816 the preceding args and about the function being called.
817 NAMED is nonzero if this argument is a named parameter
818 (otherwise it is an extra parameter matching an ellipsis).
820 On the HP-PA the first four words of args are normally in registers
821 and the rest are pushed. But any arg that won't entirely fit in regs
824 Arguments passed in registers are either 1 or 2 words long.
826 The caller must make a distinction between calls to explicitly named
827 functions and calls through pointers to functions -- the conventions
828 are different! Calls through pointers to functions only use general
829 registers for the first four argument words.
831 Of course all this is different for the portable runtime model
832 HP wants everyone to use for ELF. Ugh. Here's a quick description
833 of how it's supposed to work.
835 1) callee side remains unchanged. It expects integer args to be
836 in the integer registers, float args in the float registers and
837 unnamed args in integer registers.
839 2) caller side now depends on if the function being called has
840 a prototype in scope (rather than if it's being called indirectly).
842 2a) If there is a prototype in scope, then arguments are passed
843 according to their type (ints in integer registers, floats in float
844 registers, unnamed args in integer registers.
846 2b) If there is no prototype in scope, then floating point arguments
847 are passed in both integer and float registers. egad.
849 FYI: The portable parameter passing conventions are almost exactly like
850 the standard parameter passing conventions on the RS6000. That's why
851 you'll see lots of similar code in rs6000.h. */
853 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
855 /* Do not expect to understand this without reading it several times. I'm
856 tempted to try and simply it, but I worry about breaking something. */
858 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
859 (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
860 ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
861 || !FLOAT_MODE_P (MODE) || (CUM).nargs_prototype > 0) \
862 ? gen_rtx (REG, (MODE), \
863 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
864 ? (((!current_call_is_indirect || TARGET_PORTABLE_RUNTIME) \
865 && (MODE) == DFmode) \
866 ? ((CUM).words ? 38 : 34) \
867 : ((CUM).words ? 23 : 25)) \
868 : (((!current_call_is_indirect || TARGET_PORTABLE_RUNTIME) \
869 && (MODE) == SFmode) \
870 ? (32 + 2 * (CUM).words) \
871 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
873 /* We are calling a non-prototyped function with floating point \
874 arguments using the portable conventions. */ \
875 : gen_rtx (EXPR_LIST, VOIDmode, \
876 gen_rtx (REG, (MODE), \
877 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
878 ? ((CUM).words ? 38 : 34) \
879 : (32 + 2 * (CUM).words))), \
880 gen_rtx (REG, (MODE), \
881 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
882 ? ((CUM).words ? 23 : 25) \
883 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\
885 /* Pass this parameter in the stack. */ \
888 /* For an arg passed partly in registers and partly in memory,
889 this is the number of registers used.
890 For args passed entirely in registers or entirely in memory, zero. */
892 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
894 /* If defined, a C expression that gives the alignment boundary, in
895 bits, of an argument with the specified mode and type. If it is
896 not defined, `PARM_BOUNDARY' is used for all arguments. */
898 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
900 ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
901 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
903 : GET_MODE_ALIGNMENT(MODE)))
905 /* Arguments larger than eight bytes are passed by invisible reference */
907 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
908 ((TYPE) && int_size_in_bytes (TYPE) > 8)
910 extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
911 extern enum cmp_type hppa_branch_type;
913 /* Output the label for a function definition. */
914 #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
915 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
916 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
917 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
919 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
920 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
921 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
924 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
925 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
926 tree tree_type = TREE_TYPE (DECL); \
929 if (TREE_PUBLIC (DECL) || TARGET_GAS) \
930 { extern int current_function_varargs; \
931 if (TREE_PUBLIC (DECL)) \
933 fputs ("\t.EXPORT ", FILE); \
934 assemble_name (FILE, NAME); \
935 fputs (",ENTRY,PRIV_LEV=3", FILE); \
939 fputs ("\t.PARAM ", FILE); \
940 assemble_name (FILE, NAME); \
942 if (TARGET_PORTABLE_RUNTIME) \
944 fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
945 fputs ("RTNVAL=NO\n", FILE); \
948 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
949 parm = TREE_CHAIN (parm)) \
951 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
952 fprintf (FILE, ",ARGW%d=FR", i++); \
953 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
958 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
966 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
967 DECL_ARG_TYPE (parm)); \
968 if (arg_size == 2 && i <= 2) \
971 fprintf (FILE, ",ARGW%d=GR", i++); \
972 fprintf (FILE, ",ARGW%d=GR", i++); \
974 else if (arg_size == 1) \
975 fprintf (FILE, ",ARGW%d=GR", i++); \
980 /* anonymous args */ \
981 if ((TYPE_ARG_TYPES (tree_type) != 0 \
982 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
983 != void_type_node)) \
984 || current_function_varargs) \
987 fprintf (FILE, ",ARGW%d=GR", i); \
989 if (TYPE_MODE (fntype) == DFmode) \
990 fprintf (FILE, ",RTNVAL=FR"); \
991 else if (TYPE_MODE (fntype) == SFmode) \
992 fprintf (FILE, ",RTNVAL=FU"); \
993 else if (fntype != void_type_node) \
994 fprintf (FILE, ",RTNVAL=GR"); \
995 fputs ("\n", FILE); \
998 /* This macro generates the assembly code for function entry.
999 FILE is a stdio stream to output the code to.
1000 SIZE is an int: how many units of temporary storage to allocate.
1001 Refer to the array `regs_ever_live' to determine which registers
1002 to save; `regs_ever_live[I]' is nonzero if register number I
1003 is ever used in the function. This macro is responsible for
1004 knowing which registers should not be saved even if used. */
1006 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1007 of memory. If any fpu reg is used in the function, we allocate
1008 such a block here, at the bottom of the frame, just in case it's needed.
1010 If this function is a leaf procedure, then we may choose not
1011 to do a "save" insn. The decision about whether or not
1012 to do this is made in regclass.c. */
1014 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1015 output_function_prologue (FILE, SIZE)
1017 /* Output assembler code to FILE to increment profiler label # LABELNO
1018 for profiling a function entry.
1020 Because HPUX _mcount is so different, we actually emit the
1021 profiling code in function_prologue. This just stores LABELNO for
1024 #define PROFILE_BEFORE_PROLOGUE
1025 #define FUNCTION_PROFILER(FILE, LABELNO) \
1026 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1028 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1029 the stack pointer does not matter. The value is tested only in
1030 functions that have frame pointers.
1031 No definition is equivalent to always zero. */
1033 extern int may_call_alloca;
1034 extern int current_function_pretend_args_size;
1036 #define EXIT_IGNORE_STACK \
1037 (get_frame_size () != 0 \
1038 || current_function_calls_alloca || current_function_outgoing_args_size)
1041 /* This macro generates the assembly code for function exit,
1042 on machines that need it. If FUNCTION_EPILOGUE is not defined
1043 then individual return instructions are generated for each
1044 return statement. Args are same as for FUNCTION_PROLOGUE.
1046 The function epilogue should not depend on the current stack pointer!
1047 It should use the frame pointer only. This is mandatory because
1048 of alloca; we also take advantage of it to omit stack adjustments
1049 before returning. */
1051 /* This declaration is needed due to traditional/ANSI
1052 incompatibilities which cannot be #ifdefed away
1053 because they occur inside of macros. Sigh. */
1054 extern union tree_node *current_function_decl;
1056 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1057 output_function_epilogue (FILE, SIZE)
1059 /* Output assembler code for a block containing the constant parts
1060 of a trampoline, leaving space for the variable parts.\
1062 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1063 and then branches to the specified routine.
1065 This code template is copied from text segment to stack location
1066 and then patched with INITIALIZE_TRAMPOLINE to contain
1067 valid values, and then entered as a subroutine.
1069 It is best to keep this as small as possible to avoid having to
1070 flush multiple lines in the cache. */
1072 #define TRAMPOLINE_TEMPLATE(FILE) \
1074 fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1075 fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1076 fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1077 fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1078 fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1079 fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1080 fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1081 fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1082 fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1083 fprintf (FILE, "\t.word 0\n"); \
1084 fprintf (FILE, "\t.word 0\n"); \
1087 /* Length in units of the trampoline for entering a nested function.
1089 Flush the cache entries corresponding to the first and last addresses
1090 of the trampoline. This is necessary as the trampoline may cross two
1093 If the code part of the trampoline ever grows to > 32 bytes, then it
1094 will become necessary to hack on the cacheflush pattern in pa.md. */
1096 #define TRAMPOLINE_SIZE (11 * 4)
1098 /* Emit RTL insns to initialize the variable parts of a trampoline.
1099 FNADDR is an RTX for the address of the function's pure code.
1100 CXT is an RTX for the static chain value for the function.
1102 Move the function address to the trampoline template at offset 12.
1103 Move the static chain value to trampoline template at offset 16. */
1105 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1107 rtx start_addr, end_addr; \
1109 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1110 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1111 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1112 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1113 /* fdc and fic only use registers for the address to flush, \
1114 they do not accept integer displacements. */ \
1115 start_addr = force_reg (SImode, (TRAMP)); \
1116 end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1117 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1118 end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
1119 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1120 gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1123 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1124 reference the 4 integer arg registers and 4 fp arg registers.
1125 Ordinarily they are not call used registers, but they are for
1126 _builtin_saveregs, so we must make this explicit. */
1128 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1131 /* Addressing modes, and classification of registers for them. */
1133 #define HAVE_POST_INCREMENT
1134 #define HAVE_POST_DECREMENT
1136 #define HAVE_PRE_DECREMENT
1137 #define HAVE_PRE_INCREMENT
1139 /* Macros to check register numbers against specific register classes. */
1141 /* These assume that REGNO is a hard or pseudo reg number.
1142 They give nonzero only if REGNO is a hard reg of the suitable class
1143 or a pseudo reg currently allocated to a suitable hard reg.
1144 Since they use reg_renumber, they are safe only once reg_renumber
1145 has been allocated, which happens in local-alloc.c. */
1147 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1148 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1149 #define REGNO_OK_FOR_BASE_P(REGNO) \
1150 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1151 #define REGNO_OK_FOR_FP_P(REGNO) \
1152 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1154 /* Now macros that check whether X is a register and also,
1155 strictly, whether it is in a specified class.
1157 These macros are specific to the the HP-PA, and may be used only
1158 in code for printing assembler insns and in conditions for
1159 define_optimization. */
1161 /* 1 if X is an fp register. */
1163 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1165 /* Maximum number of registers that can appear in a valid memory address. */
1167 #define MAX_REGS_PER_ADDRESS 2
1169 /* Recognize any constant value that is a valid address except
1170 for symbolic addresses. We get better CSE by rejecting them
1171 here and allowing hppa_legitimize_address to break them up. We
1172 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1174 #define CONSTANT_ADDRESS_P(X) \
1175 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1176 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1177 || GET_CODE (X) == HIGH) \
1178 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1180 /* Include all constant integers and constant doubles, but not
1181 floating-point, except for floating-point zero. */
1183 #define LEGITIMATE_CONSTANT_P(X) \
1184 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1185 || (X) == CONST0_RTX (GET_MODE (X)))
1187 /* Subroutine for EXTRA_CONSTRAINT.
1189 Return 1 iff OP is a pseudo which did not get a hard register and
1190 we are running the reload pass. */
1192 #define IS_RELOADING_PSEUDO_P(OP) \
1193 ((reload_in_progress \
1194 && GET_CODE (OP) == REG \
1195 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1196 && reg_renumber [REGNO (OP)] < 0))
1198 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1200 For the HPPA, `Q' means that this is a memory operand but not a
1201 symbolic memory operand. Note that an unassigned pseudo register
1202 is such a memory operand. Needed because reload will generate
1203 these things in insns and then not re-recognize the insns, causing
1204 constrain_operands to fail.
1206 Also note `Q' accepts any memory operand during the reload pass.
1207 This includes out-of-range displacements in reg+d addressing.
1208 This makes for better code. (??? For 2.5 address this issue).
1214 `T' is for fp loads and stores. */
1215 #define EXTRA_CONSTRAINT(OP, C) \
1217 (IS_RELOADING_PSEUDO_P (OP) \
1218 || (GET_CODE (OP) == MEM \
1219 && reload_in_progress) \
1220 || (GET_CODE (OP) == MEM \
1221 && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1222 && ! symbolic_memory_operand (OP, VOIDmode))) \
1224 (GET_CODE (OP) == MEM \
1225 /* Using DFmode forces only short displacements \
1226 to be recognized as valid in reg+d addresses. */\
1227 && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1229 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1230 and check its validity for a certain class.
1231 We have two alternate definitions for each of them.
1232 The usual definition accepts all pseudo regs; the other rejects
1233 them unless they have been allocated suitable hard regs.
1234 The symbol REG_OK_STRICT causes the latter definition to be used.
1236 Most source files want to accept pseudo regs in the hope that
1237 they will get allocated to the class that the insn wants them to be in.
1238 Source files for reload pass need to be strict.
1239 After reload, it makes no difference, since pseudo regs have
1240 been eliminated by then. */
1242 #ifndef REG_OK_STRICT
1244 /* Nonzero if X is a hard reg that can be used as an index
1245 or if it is a pseudo reg. */
1246 #define REG_OK_FOR_INDEX_P(X) \
1247 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1248 /* Nonzero if X is a hard reg that can be used as a base reg
1249 or if it is a pseudo reg. */
1250 #define REG_OK_FOR_BASE_P(X) \
1251 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1255 /* Nonzero if X is a hard reg that can be used as an index. */
1256 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1257 /* Nonzero if X is a hard reg that can be used as a base reg. */
1258 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1262 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1263 that is a valid memory address for an instruction.
1264 The MODE argument is the machine mode for the MEM expression
1265 that wants to use this address.
1267 On the HP-PA, the actual legitimate addresses must be
1268 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1269 But we can treat a SYMBOL_REF as legitimate if it is part of this
1270 function's constant-pool, because such addresses can actually
1271 be output as REG+SMALLINT. */
1273 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1274 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1276 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1277 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1279 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1280 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1282 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1283 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1285 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1287 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1288 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1289 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1290 && REG_P (XEXP (X, 0)) \
1291 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1293 else if (GET_CODE (X) == PLUS) \
1295 rtx base = 0, index; \
1296 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1298 if (GET_CODE (XEXP (X, 1)) == REG \
1299 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1301 else if (flag_pic == 1 \
1302 && GET_CODE (XEXP (X, 1)) != REG \
1303 && GET_CODE (XEXP (X, 1)) != LO_SUM \
1304 && GET_CODE (XEXP (X, 1)) != MEM) \
1307 else if (REG_P (XEXP (X, 0)) \
1308 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1309 base = XEXP (X, 0), index = XEXP (X, 1); \
1310 else if (REG_P (XEXP (X, 1)) \
1311 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1312 base = XEXP (X, 1), index = XEXP (X, 0); \
1314 if (GET_CODE (index) == CONST_INT \
1315 && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1316 || INT_5_BITS (index))) \
1319 else if (GET_CODE (X) == LO_SUM \
1320 && GET_CODE (XEXP (X, 0)) == REG \
1321 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1322 && CONSTANT_P (XEXP (X, 1)) \
1323 && (MODE) != SFmode \
1324 && (MODE) != DFmode) \
1326 else if (GET_CODE (X) == LO_SUM \
1327 && GET_CODE (XEXP (X, 0)) == SUBREG \
1328 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1329 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1330 && CONSTANT_P (XEXP (X, 1)) \
1331 && (MODE) != SFmode \
1332 && (MODE) != DFmode) \
1334 else if (GET_CODE (X) == LABEL_REF \
1335 || (GET_CODE (X) == CONST_INT \
1336 && INT_14_BITS (X))) \
1340 /* Try machine-dependent ways of modifying an illegitimate address
1341 to be legitimate. If we find one, return the new, valid address.
1342 This macro is used in only one place: `memory_address' in explow.c.
1344 OLDX is the address as it was before break_out_memory_refs was called.
1345 In some cases it is useful to look at this to decide what needs to be done.
1347 MODE and WIN are passed so that this macro can use
1348 GO_IF_LEGITIMATE_ADDRESS.
1350 It is always safe for this macro to do nothing. It exists to recognize
1351 opportunities to optimize the output. */
1353 extern struct rtx_def *hppa_legitimize_address ();
1354 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1355 { rtx orig_x = (X); \
1356 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1357 if ((X) != orig_x && memory_address_p (MODE, X)) \
1360 /* Go to LABEL if ADDR (a legitimate address expression)
1361 has an effect that depends on the machine mode it is used for. */
1363 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1364 if (GET_CODE (ADDR) == PRE_DEC \
1365 || GET_CODE (ADDR) == POST_DEC \
1366 || GET_CODE (ADDR) == PRE_INC \
1367 || GET_CODE (ADDR) == POST_INC) \
1370 /* Define this macro if references to a symbol must be treated
1371 differently depending on something about the variable or
1372 function named by the symbol (such as what section it is in).
1374 The macro definition, if any, is executed immediately after the
1375 rtl for DECL or other node is created.
1376 The value of the rtl will be a `mem' whose address is a
1379 The usual thing for this macro to do is to a flag in the
1380 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1381 name string in the `symbol_ref' (if one bit is not enough
1384 On the HP-PA we use this to indicate if a symbol is in text or
1385 data space. Also, function labels need special treatment. */
1387 #define TEXT_SPACE_P(DECL)\
1388 (TREE_CODE (DECL) == FUNCTION_DECL \
1389 || (TREE_CODE (DECL) == VAR_DECL \
1390 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1392 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1393 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1395 #define FUNCTION_NAME_P(NAME) \
1396 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1398 #define ENCODE_SECTION_INFO(DECL)\
1400 { if (TEXT_SPACE_P (DECL)) \
1402 if (TREE_CODE (DECL) == FUNCTION_DECL \
1403 || TREE_CODE (DECL) == VAR_DECL) \
1404 _rtl = DECL_RTL (DECL); \
1406 _rtl = TREE_CST_RTL (DECL); \
1407 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1408 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1409 hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1414 /* Store the user-specified part of SYMBOL_NAME in VAR.
1415 This is sort of inverse to ENCODE_SECTION_INFO. */
1417 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1418 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1419 1 + (SYMBOL_NAME)[1] == '@'\
1420 : (SYMBOL_NAME)[0] == '@'))
1422 /* Specify the machine mode that this machine uses
1423 for the index in the tablejump instruction. */
1424 #define CASE_VECTOR_MODE DImode
1426 /* Define this if the tablejump instruction expects the table
1427 to contain offsets from the address of the table.
1428 Do not define this if the table should contain absolute addresses. */
1429 /* #define CASE_VECTOR_PC_RELATIVE */
1431 #define CASE_DROPS_THROUGH
1432 /* Specify the tree operation to be used to convert reals to integers. */
1433 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1435 /* This is the kind of divide that is easiest to do in the general case. */
1436 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1438 /* Define this as 1 if `char' should by default be signed; else as 0. */
1439 #define DEFAULT_SIGNED_CHAR 1
1441 /* Max number of bytes we can move from memory to memory
1442 in one reasonably fast instruction. */
1445 /* Define if operations between registers always perform the operation
1446 on the full register even if a narrower mode is specified. */
1447 #define WORD_REGISTER_OPERATIONS
1449 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1450 will either zero-extend or sign-extend. The value of this macro should
1451 be the code that says which one of the two operations is implicitly
1452 done, NIL if none. */
1453 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1455 /* Nonzero if access to memory by bytes is slow and undesirable. */
1456 #define SLOW_BYTE_ACCESS 1
1458 /* Do not break .stabs pseudos into continuations. */
1459 #define DBX_CONTIN_LENGTH 0
1461 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1462 is done just by pretending it is already truncated. */
1463 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1465 /* We assume that the store-condition-codes instructions store 0 for false
1466 and some other value for true. This is the value stored for true. */
1468 #define STORE_FLAG_VALUE 1
1470 /* When a prototype says `char' or `short', really pass an `int'. */
1471 #define PROMOTE_PROTOTYPES
1473 /* Specify the machine mode that pointers have.
1474 After generation of rtl, the compiler makes no further distinction
1475 between pointers and any other objects of this machine mode. */
1476 #define Pmode SImode
1478 /* Add any extra modes needed to represent the condition code.
1480 HPPA floating comparisons produce condition codes. */
1481 #define EXTRA_CC_MODES CCFPmode
1483 /* Define the names for the modes specified above. */
1484 #define EXTRA_CC_NAMES "CCFP"
1486 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1487 return the mode to be used for the comparison. For floating-point, CCFPmode
1488 should be used. CC_NOOVmode should be used when the first operand is a
1489 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1491 #define SELECT_CC_MODE(OP,X,Y) \
1492 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1494 /* A function address in a call instruction
1495 is a byte address (for indexing purposes)
1496 so give the MEM rtx a byte's mode. */
1497 #define FUNCTION_MODE SImode
1499 /* Define this if addresses of constant functions
1500 shouldn't be put through pseudo regs where they can be cse'd.
1501 Desirable on machines where ordinary constants are expensive
1502 but a CALL with constant address is cheap. */
1503 #define NO_FUNCTION_CSE
1505 /* Define this to be nonzero if shift instructions ignore all but the low-order
1507 #define SHIFT_COUNT_TRUNCATED 1
1509 /* Use atexit for static constructors/destructors, instead of defining
1510 our own exit function. */
1513 /* Compute the cost of computing a constant rtl expression RTX
1514 whose rtx-code is CODE. The body of this macro is a portion
1515 of a switch statement. If the code is computed here,
1516 return it with a return statement. Otherwise, break from the switch. */
1518 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1520 if (INTVAL (RTX) == 0) return 0; \
1521 if (INT_14_BITS (RTX)) return 1; \
1528 case CONST_DOUBLE: \
1529 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1530 && OUTER_CODE != SET) \
1535 #define ADDRESS_COST(RTX) \
1536 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1538 /* Compute extra cost of moving data between one register class
1541 Make moves from SAR so expensive they should never happen. We used to
1542 have 0xffff here, but that generates overflow in rare cases.
1544 Copies involving a FP register and a non-FP register are relatively
1545 expensive because they must go through memory.
1547 Other copies are reasonably cheap. */
1548 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1549 (CLASS1 == SHIFT_REGS ? 0x100 \
1550 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1551 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1555 /* Provide the costs of a rtl expression. This is in the body of a
1556 switch on CODE. The purpose for the cost of MULT is to encourage
1557 `synth_mult' to find a synthetic multiply when reasonable. */
1559 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1561 return TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1562 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1567 return COSTS_N_INSNS (60); \
1569 if (GET_CODE (XEXP (X, 0)) == MULT \
1570 && shadd_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1571 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1572 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1575 /* Adjust the cost of dependencies. */
1577 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1578 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1580 /* Handling the special cases is going to get too complicated for a macro,
1581 just call `pa_adjust_insn_length' to do the real work. */
1582 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1583 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1585 /* Enable a bug fix. (This is for extra caution.) */
1586 #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1588 /* Millicode insns are actually function calls with some special
1589 constraints on arguments and register usage.
1591 Millicode calls always expect their arguments in the integer argument
1592 registers, and always return their result in %r29 (ret1). They
1593 are expected to clobber their arguments, %r1, %r29, and %r31 and
1596 These macros tell reorg that the references to arguments and
1597 register clobbers for millicode calls do not appear to happen
1598 until after the millicode call. This allows reorg to put insns
1599 which set the argument registers into the delay slot of the millicode
1600 call -- thus they act more like traditional CALL_INSNs.
1602 get_attr_type will try to recognize the given insn, so make sure to
1603 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1605 #define INSN_SETS_ARE_DELAYED(X) \
1606 ((GET_CODE (X) == INSN \
1607 && GET_CODE (PATTERN (X)) != SEQUENCE \
1608 && GET_CODE (PATTERN (X)) != USE \
1609 && GET_CODE (PATTERN (X)) != CLOBBER \
1610 && get_attr_type (X) == TYPE_MILLI))
1612 #define INSN_REFERENCES_ARE_DELAYED(X) \
1613 ((GET_CODE (X) == INSN \
1614 && GET_CODE (PATTERN (X)) != SEQUENCE \
1615 && GET_CODE (PATTERN (X)) != USE \
1616 && GET_CODE (PATTERN (X)) != CLOBBER \
1617 && get_attr_type (X) == TYPE_MILLI))
1620 /* Control the assembler format that we output. */
1622 /* Output at beginning of assembler file. */
1624 #define ASM_FILE_START(FILE) \
1625 do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1626 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1627 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1629 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1630 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1631 \t.IMPORT $global$,DATA\n\
1632 \t.IMPORT $$dyncall,MILLICODE\n");\
1634 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1635 if (write_symbols != NO_DEBUG) \
1636 output_file_directive ((FILE), main_input_filename); \
1639 /* Output to assembler file text saying following lines
1640 may contain character constants, extra white space, comments, etc. */
1642 #define ASM_APP_ON ""
1644 /* Output to assembler file text saying following lines
1645 no longer contain unusual constructs. */
1647 #define ASM_APP_OFF ""
1649 /* We don't yet know how to identify GCC to HP-PA machines. */
1650 #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1652 /* Output before code. */
1654 /* Supposedly the assembler rejects the command if there is no tab! */
1655 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1657 /* Output before read-only data. */
1659 /* Supposedly the assembler rejects the command if there is no tab! */
1660 #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1662 #define READONLY_DATA_SECTION readonly_data
1664 /* Output before writable data. */
1666 /* Supposedly the assembler rejects the command if there is no tab! */
1667 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1669 /* Output before uninitialized data. */
1671 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1673 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1675 #define EXTRA_SECTIONS in_bss, in_readonly_data
1677 #define EXTRA_SECTION_FUNCTIONS \
1681 if (in_section != in_bss) \
1683 fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1684 in_section = in_bss; \
1690 if (in_section != in_readonly_data) \
1692 fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1693 in_section = in_readonly_data; \
1698 /* How to refer to registers in assembler output.
1699 This sequence is indexed by compiler's hard-register-number (see above). */
1701 #define REGISTER_NAMES \
1702 {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1703 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1704 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1705 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1706 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1707 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
1708 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
1709 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
1710 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
1711 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
1712 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
1715 #define ADDITIONAL_REGISTER_NAMES \
1716 {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
1717 {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
1718 {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
1719 {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
1720 {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
1721 {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
1722 {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
1725 /* How to renumber registers for dbx and gdb.
1727 Registers 0 - 31 remain unchanged.
1729 Registers 32 - 87 are mapped to 72 - 127
1731 Register 88 is mapped to 32. */
1733 #define DBX_REGISTER_NUMBER(REGNO) \
1734 ((REGNO) <= 31 ? (REGNO) : \
1735 ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
1737 /* This is how to output the definition of a user-level label named NAME,
1738 such as the label on a static function or variable NAME. */
1740 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1741 do { assemble_name (FILE, NAME); \
1742 fputc ('\n', FILE); } while (0)
1744 /* This is how to output a command to make the user-level label named NAME
1745 defined for reference from other files. */
1747 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1748 do { fputs ("\t.IMPORT ", FILE); \
1749 assemble_name (FILE, NAME); \
1750 if (FUNCTION_NAME_P (NAME)) \
1751 fputs (",CODE\n", FILE); \
1753 fputs (",DATA\n", FILE); \
1756 /* hpux ld doesn't output the object file name, or anything useful at
1757 all, to indicate the start of an object file's symbols. This screws
1758 up gdb, so we'll output this magic cookie at the end of an object
1759 file with debugging symbols */
1761 #define ASM_FILE_END(FILE) \
1762 do { if (write_symbols == DBX_DEBUG)\
1763 { fputs (TEXT_SECTION_ASM_OP, FILE);\
1764 fputs ("\t.stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1769 /* The bogus HP assembler requires ALL external references to be
1770 "imported", even library calls. They look a bit different, so
1771 here's this macro. */
1773 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1774 do { fputs ("\t.IMPORT ", FILE); \
1775 assemble_name (FILE, XSTR ((RTL), 0)); \
1776 fputs (",CODE\n", FILE); \
1779 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1781 /* We only handle DATA objects here, functions are globalized in \
1782 ASM_DECLARE_FUNCTION_NAME. */ \
1783 if (! FUNCTION_NAME_P (NAME)) \
1785 fputs ("\t.EXPORT ", FILE); \
1786 assemble_name (FILE, NAME); \
1787 fputs (",DATA\n", FILE); \
1791 /* This is how to output a reference to a user-level label named NAME.
1792 `assemble_name' uses this. */
1794 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1795 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1797 /* This is how to output an internal numbered label where
1798 PREFIX is the class of label and NUM is the number within the class. */
1800 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1801 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1803 /* This is how to store into the string LABEL
1804 the symbol_ref name of an internal numbered label where
1805 PREFIX is the class of label and NUM is the number within the class.
1806 This is suitable for output with `assemble_name'. */
1808 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1809 sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1811 /* This is how to output an assembler line defining a `double' constant. */
1813 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1814 do { union { double d; int i[2];} __u; \
1816 fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1817 __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1820 /* This is how to output an assembler line defining a `float' constant. */
1822 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1823 do { union { float f; int i;} __u; \
1825 fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1828 /* This is how to output an assembler line defining an `int' constant. */
1830 #define ASM_OUTPUT_INT(FILE,VALUE) \
1831 { fprintf (FILE, "\t.word "); \
1832 if (function_label_operand (VALUE, VOIDmode) \
1833 && !TARGET_PORTABLE_RUNTIME) \
1834 fprintf (FILE, "P%%"); \
1835 output_addr_const (FILE, (VALUE)); \
1836 fprintf (FILE, "\n");}
1838 /* Likewise for `short' and `char' constants. */
1840 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1841 ( fprintf (FILE, "\t.half "), \
1842 output_addr_const (FILE, (VALUE)), \
1843 fprintf (FILE, "\n"))
1845 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1846 ( fprintf (FILE, "\t.byte "), \
1847 output_addr_const (FILE, (VALUE)), \
1848 fprintf (FILE, "\n"))
1850 /* This is how to output an assembler line for a numeric constant byte. */
1852 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1853 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1855 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1856 output_ascii ((FILE), (P), (SIZE))
1858 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1859 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1860 /* This is how to output an element of a case-vector that is absolute.
1861 Note that this method makes filling these branch delay slots
1864 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1865 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1867 /* Jump tables are executable code and live in the TEXT section on the PA. */
1868 #define JUMP_TABLES_IN_TEXT_SECTION
1870 /* This is how to output an element of a case-vector that is relative.
1871 This must be defined correctly as it is used when generating PIC code.
1873 I belive it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1874 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1875 rather than a table of absolute addresses. */
1877 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1878 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1880 /* This is how to output an assembler line
1881 that says to advance the location counter
1882 to a multiple of 2**LOG bytes. */
1884 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1885 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1887 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1888 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1890 /* This says how to output an assembler line
1891 to define a global common symbol. */
1893 /* Supposedly the assembler rejects the command if there is no tab! */
1896 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1898 assemble_name ((FILE), (NAME)); \
1899 fputs ("\t.comm ", (FILE)); \
1900 fprintf ((FILE), "%d\n", (ROUNDED));}
1902 /* This says how to output an assembler line
1903 to define a local common symbol. */
1905 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1907 fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8); \
1908 assemble_name ((FILE), (NAME)); \
1909 fprintf ((FILE), "\n\t.block %d\n", (ROUNDED));}
1911 /* Store in OUTPUT a string (made with alloca) containing
1912 an assembler-name for a local static variable named NAME.
1913 LABELNO is an integer which is different for each call. */
1915 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1916 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1917 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1919 /* Define the parentheses used to group arithmetic operations
1920 in assembler code. */
1922 #define ASM_OPEN_PAREN "("
1923 #define ASM_CLOSE_PAREN ")"
1925 /* All HP assemblers use "!" to separate logical lines. */
1926 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
1928 /* Define results of standard character escape sequences. */
1929 #define TARGET_BELL 007
1930 #define TARGET_BS 010
1931 #define TARGET_TAB 011
1932 #define TARGET_NEWLINE 012
1933 #define TARGET_VT 013
1934 #define TARGET_FF 014
1935 #define TARGET_CR 015
1937 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1938 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1940 /* Print operand X (an rtx) in assembler syntax to file FILE.
1941 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1942 For `%' followed by punctuation, CODE is the punctuation and X is null.
1944 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1945 and an immediate zero should be represented as `r0'.
1947 Several % codes are defined:
1949 C compare conditions
1950 N extract conditions
1951 M modifier to handle preincrement addressing for memory refs.
1952 F modifier to handle preincrement addressing for fp memory refs */
1954 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1957 /* Print a memory address as an operand to reference that memory location. */
1959 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1960 { register rtx addr = ADDR; \
1961 register rtx base; \
1963 switch (GET_CODE (addr)) \
1966 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1969 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1970 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1971 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1972 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1975 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
1978 fputs ("R'", FILE); \
1979 output_global_address (FILE, XEXP (addr, 1)); \
1980 fputs ("(", FILE); \
1981 output_operand (XEXP (addr, 0), 0); \
1982 fputs (")", FILE); \
1985 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
1988 output_addr_const (FILE, addr); \
1992 /* Define functions in pa.c and used in insn-output.c. */
1994 extern char *output_and ();
1995 extern char *output_ior ();
1996 extern char *output_move_double ();
1997 extern char *output_fp_move_double ();
1998 extern char *output_block_move ();
1999 extern char *output_cbranch ();
2000 extern char *output_bb ();
2001 extern char *output_dbra ();
2002 extern char *output_movb ();
2003 extern char *output_return ();
2004 extern char *output_call ();
2005 extern char *output_mul_insn ();
2006 extern char *output_div_insn ();
2007 extern char *output_mod_insn ();
2008 extern char *singlemove_string ();
2009 extern void output_arg_descriptor ();
2010 extern void output_global_address ();
2011 extern struct rtx_def *legitimize_pic_address ();
2012 extern struct rtx_def *gen_cmp_fp ();
2013 extern void hppa_encode_label ();
2015 extern struct rtx_def *hppa_save_pic_table_rtx;
2018 #define PREDICATE_CODES \
2019 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
2020 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
2021 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
2022 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
2023 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
2024 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
2025 {"pre_cint_operand", {CONST_INT}}, \
2026 {"post_cint_operand", {CONST_INT}}, \
2027 {"int5_operand", {CONST_INT}}, \
2028 {"uint5_operand", {CONST_INT}}, \
2029 {"uint32_operand", {CONST_INT}}, \
2030 {"int11_operand", {CONST_INT}}, \
2031 {"and_operand", {SUBREG, REG, CONST_INT}}, \
2032 {"ior_operand", {CONST_INT}}, \
2033 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
2034 {"lhs_lshift_cint_operand", {CONST_INT}}, \
2035 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
2036 {"shadd_operand", {CONST_INT}}, \
2037 {"eq_neq_comparison_operator", {EQ, NE}}, \
2038 {"movb_comparison_operator", {EQ, NE, LT, GE}}, \
2039 {"pc_or_label_operand", {LABEL_REF, PC}}, \
2040 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
2041 {"reg_or_nonsymb_mem_operand", {REG, SUBREG, MEM}}, \
2042 {"move_operand", {REG, SUBREG, CONST_INT, MEM}}, \
2043 {"pic_operand", {REG, SUBREG, CONST_INT, SYMBOL_REF, LABEL_REF, \
2044 CONST, HIGH, PC}}, /* No clue */ \
2045 {"function_label_operand", {SYMBOL_REF}}, \
2046 {"reg_or_0_or_nonsymb_mem_operand", {REG, SUBREG, CONST_INT, MEM}}, \
2047 {"div_operand", {REG, CONST_INT}}, \
2048 {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \
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