1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 enum cmp_type /* comparison type */
25 CMP_SI, /* compare integers */
26 CMP_SF, /* compare single precision floats */
27 CMP_DF, /* compare double precision floats */
28 CMP_MAX /* max comparison type */
31 /* For long call handling. */
32 extern unsigned int total_code_bytes;
34 /* Which processor to schedule for. */
43 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
45 /* For -mschedule= option. */
46 extern char *pa_cpu_string;
47 extern enum processor_type pa_cpu;
49 /* Print subsidiary information on the compiler version in use. */
51 #define TARGET_VERSION fprintf (stderr, " (hppa)");
53 /* Run-time compilation parameters selecting different hardware subsets. */
55 extern int target_flags;
57 /* compile code for HP-PA 1.1 ("Snake") */
59 #define TARGET_SNAKE (target_flags & 1)
61 /* Disable all FP registers (they all become fixed). This may be necessary
62 for compiling kernels which perform lazy context switching of FP regs.
63 Note if you use this option and try to perform floating point operations
64 the compiler will abort! */
66 #define TARGET_DISABLE_FPREGS (target_flags & 2)
68 /* Generate code which assumes that calls through function pointers will
69 never cross a space boundary. Such assumptions are generally safe for
70 building kernels and statically linked executables. Code compiled with
71 this option will fail miserably if the executable is dynamically linked
72 or uses nested functions! */
73 #define TARGET_FAST_INDIRECT_CALLS (target_flags & 4)
75 /* Allow unconditional jumps in the delay slots of call instructions. */
76 #define TARGET_JUMP_IN_DELAY (target_flags & 8)
78 /* In rare cases, a millicode call via "bl" can not be turned into
79 a millicode call using "ble" (when SHLIB_INFO subspace is very large).
81 This option forces just millicode calls to use inline long-calls
82 This is far more efficient than the old long-call option which forced
83 every function to be called indirectly (as is still the case for
84 TARGET_PORTABLE_RUNTIME).
86 ??? What about simple jumps, they can suffer from the same problem.
87 Would require significant surgery in pa.md. */
89 #define TARGET_MILLICODE_LONG_CALLS (target_flags & 16)
91 /* Disable indexed addressing modes. */
93 #define TARGET_DISABLE_INDEXING (target_flags & 32)
95 /* Emit code which follows the new portable runtime calling conventions
96 HP wants everyone to use for ELF objects. If at all possible you want
97 to avoid this since it's a performance loss for non-prototyped code.
99 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
100 long-call stubs which is quite expensive. */
102 #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
104 /* Emit directives only understood by GAS. This allows parameter
105 relocations to work for static functions. There is no way
106 to make them work the HP assembler at this time. */
108 #define TARGET_GAS (target_flags & 128)
110 /* Emit code for processors which do not have an FPU. */
112 #define TARGET_SOFT_FLOAT (target_flags & 256)
114 /* Macro to define tables used to set the flags.
115 This is a list in braces of pairs in braces,
116 each pair being { "NAME", VALUE }
117 where VALUE is the bits to set or minus the bits to clear.
118 An empty string NAME is used to identify the default VALUE. */
120 #define TARGET_SWITCHES \
123 {"pa-risc-1-0", -1}, \
124 {"pa-risc-1-1", 1}, \
125 {"disable-fpregs", 2}, \
126 {"no-disable-fpregs", -2}, \
127 {"fast-indirect-calls", 4}, \
128 {"no-fast-indirect-calls", -4},\
129 {"jump-in-delay", 8}, \
130 {"no-jump-in-delay", -8}, \
131 {"millicode-long-calls", 16},\
132 {"no-millicode-long-calls", -16},\
133 {"disable-indexing", 32}, \
134 {"no-disable-indexing", -32},\
135 {"portable-runtime", 64+16},\
136 {"no-portable-runtime", -(64+16)},\
139 {"soft-float", 256}, \
140 {"no-soft-float", -256}, \
141 { "", TARGET_DEFAULT}}
143 #ifndef TARGET_DEFAULT
144 #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
147 #define TARGET_OPTIONS \
149 { "schedule=", &pa_cpu_string }\
152 #define OVERRIDE_OPTIONS override_options ()
154 #define DBX_DEBUGGING_INFO
155 #define DEFAULT_GDB_EXTENSIONS 1
157 /* This is the way other stabs-in-XXX tools do things. We will be
159 #define DBX_BLOCKS_FUNCTION_RELATIVE 1
161 /* Likewise for linenos.
163 We make the first line stab special to avoid adding several
164 gross hacks to GAS. */
165 #undef ASM_OUTPUT_SOURCE_LINE
166 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
167 { static int sym_lineno = 1; \
168 static tree last_function_decl = NULL; \
169 if (current_function_decl == last_function_decl) \
170 fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
172 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
175 fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
176 last_function_decl = current_function_decl; \
179 /* But, to make this work, we have to output the stabs for the function
181 #define DBX_FUNCTION_FIRST
183 /* Only lables should ever begin in colunm zero. */
184 #define ASM_STABS_OP "\t.stabs"
185 #define ASM_STABN_OP "\t.stabn"
187 /* GDB always assumes the current function's frame begins at the value
188 of the stack pointer upon entry to the current function. Accessing
189 local variables and parameters passed on the stack is done using the
190 base of the frame + an offset provided by GCC.
192 For functions which have frame pointers this method works fine;
193 the (frame pointer) == (stack pointer at function entry) and GCC provides
194 an offset relative to the frame pointer.
196 This loses for functions without a frame pointer; GCC provides an offset
197 which is relative to the stack pointer after adjusting for the function's
198 frame size. GDB would prefer the offset to be relative to the value of
199 the stack pointer at the function's entry. Yuk! */
200 #define DEBUGGER_AUTO_OFFSET(X) \
201 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
202 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
204 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
205 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
206 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
208 /* gdb needs a null N_SO at the end of each file for scattered loading. */
210 #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END
211 #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \
213 "%s\n\t.stabs \"%s\",%d,0,0,L$text_end\nL$text_end:\n",\
214 TEXT_SECTION_ASM_OP, "" , N_SO)
216 #if (TARGET_DEFAULT & 1) == 0
217 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
218 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
220 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:%{!msoft-float:-D__hp9000s700 -D_PA_RISC1_1}}}"
223 /* Defines for a K&R CC */
225 #define CC1_SPEC "%{pg:} %{p:}"
227 #define LINK_SPEC "%{!shared:-u main} %{shared:-b}"
229 /* Allow $ in identifiers. */
230 #define DOLLARS_IN_IDENTIFIERS 2
232 /* Make gcc agree with <machine/ansi.h> */
234 #define SIZE_TYPE "unsigned int"
235 #define PTRDIFF_TYPE "int"
236 #define WCHAR_TYPE "unsigned int"
237 #define WCHAR_TYPE_SIZE 32
239 /* Show we can debug even without a frame pointer. */
240 #define CAN_DEBUG_WITHOUT_FP
242 /* Machine dependent reorg pass. */
243 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
245 /* Names to predefine in the preprocessor for this target machine. */
247 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
249 /* HPUX has a program 'chatr' to list the dependencies of dynamically
250 linked executables and shared libraries. */
251 #define LDD_SUFFIX "chatr"
252 /* look for lines like "dynamic /usr/lib/X11R5/libX11.sl". */
253 #define PARSE_LDD_OUTPUT(PTR) \
255 while (*PTR == ' ') PTR++; \
256 if (strncmp (PTR, "dynamic", sizeof ("dynamic") - 1) == 0) \
258 PTR += sizeof ("dynamic") - 1; \
259 while (*p == ' ') PTR++; \
265 /* target machine storage layout */
267 /* Define for cross-compilation from a host with a different float format
268 or endianess (e.g. VAX, x86). */
269 #define REAL_ARITHMETIC
271 /* Define this macro if it is advisable to hold scalars in registers
272 in a wider mode than that declared by the program. In such cases,
273 the value is constrained to be within the bounds of the declared
274 type, but kept valid in the wider mode. The signedness of the
275 extension may differ from that of the type. */
277 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
278 if (GET_MODE_CLASS (MODE) == MODE_INT \
279 && GET_MODE_SIZE (MODE) < 4) \
282 /* Define this if most significant bit is lowest numbered
283 in instructions that operate on numbered bit-fields. */
284 #define BITS_BIG_ENDIAN 1
286 /* Define this if most significant byte of a word is the lowest numbered. */
287 /* That is true on the HP-PA. */
288 #define BYTES_BIG_ENDIAN 1
290 /* Define this if most significant word of a multiword number is lowest
292 #define WORDS_BIG_ENDIAN 1
294 /* number of bits in an addressable storage unit */
295 #define BITS_PER_UNIT 8
297 /* Width in bits of a "word", which is the contents of a machine register.
298 Note that this is not necessarily the width of data type `int';
299 if using 16-bit ints on a 68000, this would still be 32.
300 But on a machine with 16-bit registers, this would be 16. */
301 #define BITS_PER_WORD 32
303 /* Width of a word, in units (bytes). */
304 #define UNITS_PER_WORD 4
306 /* Width in bits of a pointer.
307 See also the macro `Pmode' defined below. */
308 #define POINTER_SIZE 32
310 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
311 #define PARM_BOUNDARY 32
313 /* Largest alignment required for any stack parameter, in bits.
314 Don't define this if it is equal to PARM_BOUNDARY */
315 #define MAX_PARM_BOUNDARY 64
317 /* Boundary (in *bits*) on which stack pointer should be aligned. */
318 #define STACK_BOUNDARY 512
320 /* Allocation boundary (in *bits*) for the code of a function. */
321 #define FUNCTION_BOUNDARY 32
323 /* Alignment of field after `int : 0' in a structure. */
324 #define EMPTY_FIELD_BOUNDARY 32
326 /* Every structure's size must be a multiple of this. */
327 #define STRUCTURE_SIZE_BOUNDARY 8
329 /* A bitfield declared as `int' forces `int' alignment for the struct. */
330 #define PCC_BITFIELD_TYPE_MATTERS 1
332 /* No data type wants to be aligned rounder than this. */
333 #define BIGGEST_ALIGNMENT 64
335 /* The .align directive in the HP assembler allows up to a 32 alignment. */
336 #define MAX_OFILE_ALIGNMENT 32768
338 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
339 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
340 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
342 /* Make arrays of chars word-aligned for the same reasons. */
343 #define DATA_ALIGNMENT(TYPE, ALIGN) \
344 (TREE_CODE (TYPE) == ARRAY_TYPE \
345 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
346 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
349 /* Set this nonzero if move instructions will actually fail to work
350 when given unaligned data. */
351 #define STRICT_ALIGNMENT 1
353 /* Generate calls to memcpy, memcmp and memset. */
354 #define TARGET_MEM_FUNCTIONS
356 /* Standard register usage. */
358 /* Number of actual hardware registers.
359 The hardware registers are assigned numbers for the compiler
360 from 0 to just below FIRST_PSEUDO_REGISTER.
361 All registers that the compiler knows about must be given numbers,
362 even those that are not normally considered general registers.
364 HP-PA 1.0 has 32 fullword registers and 16 floating point
365 registers. The floating point registers hold either word or double
368 16 additional registers are reserved.
370 HP-PA 1.1 has 32 fullword registers and 32 floating point
371 registers. However, the floating point registers behave
372 differently: the left and right halves of registers are addressable
373 as 32 bit registers. So, we will set things up like the 68k which
374 has different fp units: define separate register sets for the 1.0
377 #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
380 /* 1 for registers that have pervasive standard uses
381 and are not available for the register allocator.
383 On the HP-PA, these are:
384 Reg 0 = 0 (hardware). However, 0 is used for condition code,
386 Reg 1 = ADDIL target/Temporary (hardware).
387 Reg 2 = Return Pointer
388 Reg 3 = Frame Pointer
389 Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
390 Reg 4-18 = Preserved Registers
391 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
392 Reg 20-22 = Temporary Registers
393 Reg 23-26 = Temporary/Parameter Registers
394 Reg 27 = Global Data Pointer (hp)
395 Reg 28 = Temporary/???/Return Value register
396 Reg 29 = Temporary/Static Chain/Return Value register #2
397 Reg 30 = stack pointer
398 Reg 31 = Temporary/Millicode Return Pointer (hp)
400 Freg 0-3 = Status Registers -- Not known to the compiler.
401 Freg 4-7 = Arguments/Return Value
402 Freg 8-11 = Temporary Registers
403 Freg 12-15 = Preserved Registers
405 Freg 16-31 = Reserved
407 On the Snake, fp regs are
409 Freg 0-3 = Status Registers -- Not known to the compiler.
410 Freg 4L-7R = Arguments/Return Value
411 Freg 8L-11R = Temporary Registers
412 Freg 12L-21R = Preserved Registers
413 Freg 22L-31R = Temporary Registers
417 #define FIXED_REGISTERS \
418 {0, 0, 0, 0, 0, 0, 0, 0, \
419 0, 0, 0, 0, 0, 0, 0, 0, \
420 0, 0, 0, 0, 0, 0, 0, 0, \
421 0, 0, 0, 1, 0, 0, 1, 0, \
423 0, 0, 0, 0, 0, 0, 0, 0, \
424 0, 0, 0, 0, 0, 0, 0, 0, \
425 0, 0, 0, 0, 0, 0, 0, 0, \
426 0, 0, 0, 0, 0, 0, 0, 0, \
427 0, 0, 0, 0, 0, 0, 0, 0, \
428 0, 0, 0, 0, 0, 0, 0, 0, \
429 0, 0, 0, 0, 0, 0, 0, 0, \
432 /* 1 for registers not available across function calls.
433 These must include the FIXED_REGISTERS and also any
434 registers that can be used without being saved.
435 The latter must include the registers where values are returned
436 and the register where structure-value addresses are passed.
437 Aside from that, you can include as many other registers as you like. */
438 #define CALL_USED_REGISTERS \
439 {1, 1, 1, 0, 0, 0, 0, 0, \
440 0, 0, 0, 0, 0, 0, 0, 0, \
441 0, 0, 0, 1, 1, 1, 1, 1, \
442 1, 1, 1, 1, 1, 1, 1, 1, \
444 1, 1, 1, 1, 1, 1, 1, 1, \
445 1, 1, 1, 1, 1, 1, 1, 1, \
446 0, 0, 0, 0, 0, 0, 0, 0, \
447 0, 0, 0, 0, 0, 0, 0, 0, \
448 0, 0, 0, 0, 1, 1, 1, 1, \
449 1, 1, 1, 1, 1, 1, 1, 1, \
450 1, 1, 1, 1, 1, 1, 1, 1, \
453 #define CONDITIONAL_REGISTER_USAGE \
457 for (i = 56; i < 88; i++) \
458 fixed_regs[i] = call_used_regs[i] = 1; \
459 for (i = 33; i < 88; i += 2) \
460 fixed_regs[i] = call_used_regs[i] = 1; \
462 else if (TARGET_DISABLE_FPREGS \
463 || TARGET_SOFT_FLOAT) \
465 for (i = 32; i < 88; i++) \
466 fixed_regs[i] = call_used_regs[i] = 1; \
469 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
472 /* Allocate the call used registers first. This should minimize
473 the number of registers that need to be saved (as call used
474 registers will generally not be allocated across a call).
476 Experimentation has shown slightly better results by allocating
477 FP registers first. */
479 #define REG_ALLOC_ORDER \
481 /* caller-saved fp regs. */ \
482 40, 41, 42, 43, 44, 45, 46, 47, \
483 68, 69, 70, 71, 72, 73, 74, 75, \
484 76, 77, 78, 79, 80, 81, 82, 83, \
486 32, 33, 34, 35, 36, 37, 38, 39, \
487 /* caller-saved general regs. */ \
488 19, 20, 21, 22, 23, 24, 25, 26, \
490 /* callee-saved fp regs. */ \
491 48, 49, 50, 51, 52, 53, 54, 55, \
492 56, 57, 58, 59, 60, 61, 62, 63, \
494 /* callee-saved general regs. */ \
495 3, 4, 5, 6, 7, 8, 9, 10, \
496 11, 12, 13, 14, 15, 16, 17, 18, \
497 /* special registers. */ \
501 /* True if register is floating-point. */
502 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
504 /* Return number of consecutive hard regs needed starting at reg REGNO
505 to hold something of mode MODE.
506 This is ordinarily the length in words of a value of mode MODE
507 but can be less for certain modes in special long registers.
509 On the HP-PA, ordinary registers hold 32 bits worth;
510 The floating point registers are 64 bits wide. Snake fp regs are 32
512 #define HARD_REGNO_NREGS(REGNO, MODE) \
513 (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
514 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
516 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
517 On the HP-PA, the cpu registers can hold any mode. We
518 force this to be an even register is it cannot hold the full mode. */
519 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
520 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
521 /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
522 : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
523 ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
524 /* Make wide modes be in aligned registers. */ \
525 : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
527 /* Value is 1 if it is a good idea to tie two pseudo registers
528 when one has mode MODE1 and one has mode MODE2.
529 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
530 for any hard reg, then this must be 0 for correct output. */
531 #define MODES_TIEABLE_P(MODE1, MODE2) \
532 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
534 /* Specify the registers used for certain standard purposes.
535 The values of these macros are register numbers. */
537 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
538 /* #define PC_REGNUM */
540 /* Register to use for pushing function arguments. */
541 #define STACK_POINTER_REGNUM 30
543 /* Base register for access to local variables of the function. */
544 #define FRAME_POINTER_REGNUM 3
546 /* Value should be nonzero if functions must have frame pointers. */
547 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
550 /* C statement to store the difference between the frame pointer
551 and the stack pointer values immediately after the function prologue.
553 Note, we always pretend that this is a leaf function because if
554 it's not, there's no point in trying to eliminate the
555 frame pointer. If it is a leaf function, we guessed right! */
556 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
557 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
559 /* Base register for access to arguments of the function. */
560 #define ARG_POINTER_REGNUM 3
562 /* Register in which static-chain is passed to a function. */
564 #define STATIC_CHAIN_REGNUM 29
566 /* Register which holds offset table for position-independent
569 #define PIC_OFFSET_TABLE_REGNUM 19
570 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
572 /* Initialize hppa_save_pic_table_rtx before RTL generation for
573 each function. We used to do this in FINALIZE_PIC, but FINALIZE_PIC
574 isn't always called for static inline functions. */
575 #define INIT_EXPANDERS hppa_save_pic_table_rtx = 0;
577 /* SOM ABI says that objects larger than 64 bits are returned in memory. */
578 #define DEFAULT_PCC_STRUCT_RETURN 0
579 #define RETURN_IN_MEMORY(TYPE) \
580 (int_size_in_bytes (TYPE) > 8 || TREE_ADDRESSABLE (TYPE))
582 /* Register in which address to store a structure value
583 is passed to a function. */
584 #define STRUCT_VALUE_REGNUM 28
586 /* Define the classes of registers for register constraints in the
587 machine description. Also define ranges of constants.
589 One of the classes must always be named ALL_REGS and include all hard regs.
590 If there is more than one class, another class must be named NO_REGS
591 and contain no registers.
593 The name GENERAL_REGS must be the name of a class (or an alias for
594 another name such as ALL_REGS). This is the class of registers
595 that is allowed by "g" or "r" in a register constraint.
596 Also, registers outside this class are allocated only when
597 instructions express preferences for them.
599 The classes must be numbered in nondecreasing order; that is,
600 a larger-numbered class must never be contained completely
601 in a smaller-numbered class.
603 For any two classes, it is very desirable that there be another
604 class that represents their union. */
606 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
607 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
608 fmpyadd and fmpysub are restricted. */
610 enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
611 SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
613 #define N_REG_CLASSES (int) LIM_REG_CLASSES
615 /* Give names of register classes as strings for dump file. */
617 #define REG_CLASS_NAMES \
618 {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \
619 "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
621 /* Define which registers fit in which classes.
622 This is an initializer for a vector of HARD_REG_SET
623 of length N_REG_CLASSES. Register 0, the "condition code" register,
626 #define REG_CLASS_CONTENTS \
627 {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
628 {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
629 {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
630 {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
631 {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
632 {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
633 {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
635 /* The same information, inverted:
636 Return the class number of the smallest class containing
637 reg number REGNO. This could be a conditional expression
638 or could index an array. */
640 #define REGNO_REG_CLASS(REGNO) \
641 ((REGNO) == 0 ? NO_REGS \
642 : (REGNO) == 1 ? R1_REGS \
643 : (REGNO) < 32 ? GENERAL_REGS \
644 : (REGNO) < 88 ? FP_REGS \
647 /* The class value for index registers, and the one for base regs. */
648 #define INDEX_REG_CLASS GENERAL_REGS
649 #define BASE_REG_CLASS GENERAL_REGS
651 #define FP_REG_CLASS_P(CLASS) \
654 /* Get reg_class from a letter such as appears in the machine description. */
655 /* Keep 'x' for backward compatibility with user asm. */
656 #define REG_CLASS_FROM_LETTER(C) \
657 ((C) == 'f' ? FP_REGS : \
658 (C) == 'x' ? FP_REGS : \
659 (C) == 'q' ? SHIFT_REGS : \
660 (C) == 'a' ? R1_REGS : \
661 (C) == 'Z' ? ALL_REGS : NO_REGS)
663 /* The letters I, J, K, L and M in a register constraint string
664 can be used to stand for particular ranges of immediate operands.
665 This macro defines what the ranges are.
666 C is the letter, and VALUE is a constant value.
667 Return 1 if VALUE is in the range specified by C.
669 `I' is used for the 11 bit constants.
670 `J' is used for the 14 bit constants.
671 `K' is used for values that can be moved with a zdepi insn.
672 `L' is used for the 5 bit constants.
674 `N' is used for values with the least significant 11 bits equal to zero.
675 `O' is used for numbers n such that n+1 is a power of 2.
678 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
679 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
680 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
681 : (C) == 'K' ? zdepi_cint_p (VALUE) \
682 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
683 : (C) == 'M' ? (VALUE) == 0 \
684 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
685 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
686 : (C) == 'P' ? and_mask_p (VALUE) \
689 /* Similar, but for floating or large integer constants, and defining letters
690 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
692 For PA, `G' is the floating-point constant zero. `H' is undefined. */
694 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
695 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
696 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
699 /* Given an rtx X being reloaded into a reg required to be
700 in class CLASS, return the class of reg to actually use.
701 In general this is just CLASS; but on some machines
702 in some cases it is preferable to use a more restrictive class. */
703 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
705 /* Return the register class of a scratch register needed to copy IN into
706 or out of a register in CLASS in MODE. If it can be done directly,
707 NO_REGS is returned. */
709 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
710 secondary_reload_class (CLASS, MODE, IN)
712 /* On the PA it is not possible to directly move data between
713 GENERAL_REGS and FP_REGS. */
714 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
715 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
717 /* Return the stack location to use for secondary memory needed reloads. */
718 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
719 gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
721 /* Return the maximum number of consecutive registers
722 needed to represent mode MODE in a register of class CLASS. */
723 #define CLASS_MAX_NREGS(CLASS, MODE) \
724 (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \
725 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
727 /* Stack layout; function entry, exit and calling. */
729 /* Define this if pushing a word on the stack
730 makes the stack pointer a smaller address. */
731 /* #define STACK_GROWS_DOWNWARD */
733 /* Believe it or not. */
734 #define ARGS_GROW_DOWNWARD
736 /* Define this if the nominal address of the stack frame
737 is at the high-address end of the local variables;
738 that is, each additional local variable allocated
739 goes at a more negative offset in the frame. */
740 /* #define FRAME_GROWS_DOWNWARD */
742 /* Offset within stack frame to start allocating local variables at.
743 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
744 first local allocated. Otherwise, it is the offset to the BEGINNING
745 of the first local allocated. */
746 #define STARTING_FRAME_OFFSET 8
748 /* If we generate an insn to push BYTES bytes,
749 this says how many the stack pointer really advances by.
750 On the HP-PA, don't define this because there are no push insns. */
751 /* #define PUSH_ROUNDING(BYTES) */
753 /* Offset of first parameter from the argument pointer register value.
754 This value will be negated because the arguments grow down.
755 Also note that on STACK_GROWS_UPWARD machines (such as this one)
756 this is the distance from the frame pointer to the end of the first
757 argument, not it's beginning. To get the real offset of the first
758 argument, the size of the argument must be added.
760 ??? Have to check on this.*/
762 #define FIRST_PARM_OFFSET(FNDECL) -32
764 /* Absolute value of offset from top-of-stack address to location to store the
765 function parameter if it can't go in a register.
766 Addresses for following parameters are computed relative to this one. */
767 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
770 /* When a parameter is passed in a register, stack space is still
772 #define REG_PARM_STACK_SPACE(DECL) 16
774 /* Define this if the above stack space is to be considered part of the
775 space allocated by the caller. */
776 #define OUTGOING_REG_PARM_STACK_SPACE
778 /* Keep the stack pointer constant throughout the function.
779 This is both an optimization and a necessity: longjmp
780 doesn't behave itself when the stack pointer moves within
782 #define ACCUMULATE_OUTGOING_ARGS
784 /* The weird HPPA calling conventions require a minimum of 48 bytes on
785 the stack: 16 bytes for register saves, and 32 bytes for magic.
786 This is the difference between the logical top of stack and the
788 #define STACK_POINTER_OFFSET -32
790 #define STACK_DYNAMIC_OFFSET(FNDECL) \
791 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
793 /* Value is 1 if returning from a function call automatically
794 pops the arguments described by the number-of-args field in the call.
795 FUNDECL is the declaration node of the function (as a tree),
796 FUNTYPE is the data type of the function (as a tree),
797 or for a library call it is an identifier node for the subroutine name. */
799 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
801 /* Define how to find the value returned by a function.
802 VALTYPE is the data type of the value (as a tree).
803 If the precise function being called is known, FUNC is its FUNCTION_DECL;
804 otherwise, FUNC is 0. */
806 /* On the HP-PA the value is found in register(s) 28(-29), unless
807 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
810 #define FUNCTION_VALUE(VALTYPE, FUNC) \
811 gen_rtx (REG, TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \
812 && (TYPE_MODE (VALTYPE) == SFmode || \
813 TYPE_MODE (VALTYPE) == DFmode)) ? \
816 /* Define how to find the value returned by a library function
817 assuming the value has mode MODE. */
819 #define LIBCALL_VALUE(MODE) \
820 gen_rtx (REG, MODE, \
821 (! TARGET_SOFT_FLOAT \
822 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
824 /* 1 if N is a possible register number for a function value
825 as seen by the caller. */
827 #define FUNCTION_VALUE_REGNO_P(N) \
828 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
830 /* 1 if N is a possible register number for function argument passing. */
832 #define FUNCTION_ARG_REGNO_P(N) \
833 (((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
835 /* Define a data type for recording info about an argument list
836 during the scan of that argument list. This data type should
837 hold all necessary information about the function itself
838 and about the args processed so far, enough to enable macros
839 such as FUNCTION_ARG to determine where the next arg should go.
841 On the HP-PA, this is a single integer, which is a number of words
842 of arguments scanned so far (including the invisible argument,
843 if any, which holds the structure-value-address).
844 Thus 4 or more means all following args should go on the stack. */
846 struct hppa_args {int words, nargs_prototype; };
848 #define CUMULATIVE_ARGS struct hppa_args
850 /* Initialize a variable CUM of type CUMULATIVE_ARGS
851 for a call to a function whose data type is FNTYPE.
852 For a library call, FNTYPE is 0. */
854 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
856 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
857 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
858 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
859 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
864 /* Similar, but when scanning the definition of a procedure. We always
865 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
867 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
869 (CUM).nargs_prototype = 1000
871 /* Figure out the size in words of the function argument. */
873 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
874 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
876 /* Update the data in CUM to advance over an argument
877 of mode MODE and data type TYPE.
878 (TYPE is null for libcalls where that information may not be available.) */
880 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
881 { (CUM).nargs_prototype--; \
882 ((((CUM).words & 01) && (TYPE) != 0 \
883 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
885 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
888 /* Determine where to put an argument to a function.
889 Value is zero to push the argument on the stack,
890 or a hard register in which to store the argument.
892 MODE is the argument's machine mode.
893 TYPE is the data type of the argument (as a tree).
894 This is null for libcalls where that information may
896 CUM is a variable of type CUMULATIVE_ARGS which gives info about
897 the preceding args and about the function being called.
898 NAMED is nonzero if this argument is a named parameter
899 (otherwise it is an extra parameter matching an ellipsis).
901 On the HP-PA the first four words of args are normally in registers
902 and the rest are pushed. But any arg that won't entirely fit in regs
905 Arguments passed in registers are either 1 or 2 words long.
907 The caller must make a distinction between calls to explicitly named
908 functions and calls through pointers to functions -- the conventions
909 are different! Calls through pointers to functions only use general
910 registers for the first four argument words.
912 Of course all this is different for the portable runtime model
913 HP wants everyone to use for ELF. Ugh. Here's a quick description
914 of how it's supposed to work.
916 1) callee side remains unchanged. It expects integer args to be
917 in the integer registers, float args in the float registers and
918 unnamed args in integer registers.
920 2) caller side now depends on if the function being called has
921 a prototype in scope (rather than if it's being called indirectly).
923 2a) If there is a prototype in scope, then arguments are passed
924 according to their type (ints in integer registers, floats in float
925 registers, unnamed args in integer registers.
927 2b) If there is no prototype in scope, then floating point arguments
928 are passed in both integer and float registers. egad.
930 FYI: The portable parameter passing conventions are almost exactly like
931 the standard parameter passing conventions on the RS6000. That's why
932 you'll see lots of similar code in rs6000.h. */
934 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
936 /* Do not expect to understand this without reading it several times. I'm
937 tempted to try and simply it, but I worry about breaking something. */
939 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
940 (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
941 ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
942 || !FLOAT_MODE_P (MODE) || TARGET_SOFT_FLOAT \
943 || (CUM).nargs_prototype > 0) \
944 ? gen_rtx (REG, (MODE), \
945 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
946 ? (((!current_call_is_indirect \
947 || TARGET_PORTABLE_RUNTIME) \
948 && (MODE) == DFmode \
949 && ! TARGET_SOFT_FLOAT) \
950 ? ((CUM).words ? 38 : 34) \
951 : ((CUM).words ? 23 : 25)) \
952 : (((!current_call_is_indirect \
953 || TARGET_PORTABLE_RUNTIME) \
954 && (MODE) == SFmode \
955 && ! TARGET_SOFT_FLOAT) \
956 ? (32 + 2 * (CUM).words) \
957 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
959 /* We are calling a non-prototyped function with floating point \
960 arguments using the portable conventions. */ \
961 : gen_rtx (EXPR_LIST, VOIDmode, \
962 gen_rtx (REG, (MODE), \
963 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
964 ? ((CUM).words ? 38 : 34) \
965 : (32 + 2 * (CUM).words))), \
966 gen_rtx (REG, (MODE), \
967 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
968 ? ((CUM).words ? 23 : 25) \
969 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\
971 /* Pass this parameter in the stack. */ \
974 /* For an arg passed partly in registers and partly in memory,
975 this is the number of registers used.
976 For args passed entirely in registers or entirely in memory, zero. */
978 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
980 /* If defined, a C expression that gives the alignment boundary, in
981 bits, of an argument with the specified mode and type. If it is
982 not defined, `PARM_BOUNDARY' is used for all arguments. */
984 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
986 ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
987 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
989 : GET_MODE_ALIGNMENT(MODE)))
991 /* Arguments larger than eight bytes are passed by invisible reference */
993 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
994 ((TYPE) && int_size_in_bytes (TYPE) > 8)
996 extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
997 extern enum cmp_type hppa_branch_type;
999 /* Output the label for a function definition. */
1000 #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
1001 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1002 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
1003 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
1005 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1006 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
1007 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
1010 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1011 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
1012 tree tree_type = TREE_TYPE (DECL); \
1015 if (TREE_PUBLIC (DECL) || TARGET_GAS) \
1016 { extern int current_function_varargs; \
1017 if (TREE_PUBLIC (DECL)) \
1019 fputs ("\t.EXPORT ", FILE); \
1020 assemble_name (FILE, NAME); \
1021 fputs (",ENTRY,PRIV_LEV=3", FILE); \
1025 fputs ("\t.PARAM ", FILE); \
1026 assemble_name (FILE, NAME); \
1028 if (TARGET_PORTABLE_RUNTIME) \
1030 fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
1031 fputs ("RTNVAL=NO\n", FILE); \
1034 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
1035 parm = TREE_CHAIN (parm)) \
1037 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode \
1038 && ! TARGET_SOFT_FLOAT) \
1039 fprintf (FILE, ",ARGW%d=FR", i++); \
1040 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode \
1041 && ! TARGET_SOFT_FLOAT) \
1046 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
1054 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
1055 DECL_ARG_TYPE (parm)); \
1056 /* Passing structs by invisible reference uses \
1057 one general register. */ \
1060 if (arg_size == 2 && i <= 2) \
1063 fprintf (FILE, ",ARGW%d=GR", i++); \
1064 fprintf (FILE, ",ARGW%d=GR", i++); \
1066 else if (arg_size == 1) \
1067 fprintf (FILE, ",ARGW%d=GR", i++); \
1072 /* anonymous args */ \
1073 if ((TYPE_ARG_TYPES (tree_type) != 0 \
1074 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
1075 != void_type_node)) \
1076 || current_function_varargs) \
1078 for (; i < 4; i++) \
1079 fprintf (FILE, ",ARGW%d=GR", i); \
1081 if (TYPE_MODE (fntype) == DFmode && ! TARGET_SOFT_FLOAT) \
1082 fprintf (FILE, ",RTNVAL=FR"); \
1083 else if (TYPE_MODE (fntype) == SFmode && ! TARGET_SOFT_FLOAT) \
1084 fprintf (FILE, ",RTNVAL=FU"); \
1085 else if (fntype != void_type_node) \
1086 fprintf (FILE, ",RTNVAL=GR"); \
1087 fputs ("\n", FILE); \
1090 /* This macro generates the assembly code for function entry.
1091 FILE is a stdio stream to output the code to.
1092 SIZE is an int: how many units of temporary storage to allocate.
1093 Refer to the array `regs_ever_live' to determine which registers
1094 to save; `regs_ever_live[I]' is nonzero if register number I
1095 is ever used in the function. This macro is responsible for
1096 knowing which registers should not be saved even if used. */
1098 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1099 of memory. If any fpu reg is used in the function, we allocate
1100 such a block here, at the bottom of the frame, just in case it's needed.
1102 If this function is a leaf procedure, then we may choose not
1103 to do a "save" insn. The decision about whether or not
1104 to do this is made in regclass.c. */
1106 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1107 output_function_prologue (FILE, SIZE)
1109 /* Output assembler code to FILE to increment profiler label # LABELNO
1110 for profiling a function entry.
1112 Because HPUX _mcount is so different, we actually emit the
1113 profiling code in function_prologue. This just stores LABELNO for
1116 #define PROFILE_BEFORE_PROLOGUE
1117 #define FUNCTION_PROFILER(FILE, LABELNO) \
1118 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1120 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1121 the stack pointer does not matter. The value is tested only in
1122 functions that have frame pointers.
1123 No definition is equivalent to always zero. */
1125 extern int may_call_alloca;
1126 extern int current_function_pretend_args_size;
1128 #define EXIT_IGNORE_STACK \
1129 (get_frame_size () != 0 \
1130 || current_function_calls_alloca || current_function_outgoing_args_size)
1133 /* This macro generates the assembly code for function exit,
1134 on machines that need it. If FUNCTION_EPILOGUE is not defined
1135 then individual return instructions are generated for each
1136 return statement. Args are same as for FUNCTION_PROLOGUE.
1138 The function epilogue should not depend on the current stack pointer!
1139 It should use the frame pointer only. This is mandatory because
1140 of alloca; we also take advantage of it to omit stack adjustments
1141 before returning. */
1143 /* This declaration is needed due to traditional/ANSI
1144 incompatibilities which cannot be #ifdefed away
1145 because they occur inside of macros. Sigh. */
1146 extern union tree_node *current_function_decl;
1148 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1149 output_function_epilogue (FILE, SIZE)
1151 /* Output assembler code for a block containing the constant parts
1152 of a trampoline, leaving space for the variable parts.\
1154 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1155 and then branches to the specified routine.
1157 This code template is copied from text segment to stack location
1158 and then patched with INITIALIZE_TRAMPOLINE to contain
1159 valid values, and then entered as a subroutine.
1161 It is best to keep this as small as possible to avoid having to
1162 flush multiple lines in the cache. */
1164 #define TRAMPOLINE_TEMPLATE(FILE) \
1166 fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1167 fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1168 fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1169 fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1170 fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1171 fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1172 fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1173 fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1174 fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1175 fprintf (FILE, "\t.word 0\n"); \
1176 fprintf (FILE, "\t.word 0\n"); \
1179 /* Length in units of the trampoline for entering a nested function.
1181 Flush the cache entries corresponding to the first and last addresses
1182 of the trampoline. This is necessary as the trampoline may cross two
1185 If the code part of the trampoline ever grows to > 32 bytes, then it
1186 will become necessary to hack on the cacheflush pattern in pa.md. */
1188 #define TRAMPOLINE_SIZE (11 * 4)
1190 /* Emit RTL insns to initialize the variable parts of a trampoline.
1191 FNADDR is an RTX for the address of the function's pure code.
1192 CXT is an RTX for the static chain value for the function.
1194 Move the function address to the trampoline template at offset 12.
1195 Move the static chain value to trampoline template at offset 16. */
1197 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1199 rtx start_addr, end_addr; \
1201 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1202 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1203 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1204 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1205 /* fdc and fic only use registers for the address to flush, \
1206 they do not accept integer displacements. */ \
1207 start_addr = force_reg (SImode, (TRAMP)); \
1208 end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1209 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1210 end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
1211 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1212 gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1215 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1216 reference the 4 integer arg registers and 4 fp arg registers.
1217 Ordinarily they are not call used registers, but they are for
1218 _builtin_saveregs, so we must make this explicit. */
1220 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1223 /* Addressing modes, and classification of registers for them. */
1225 #define HAVE_POST_INCREMENT
1226 #define HAVE_POST_DECREMENT
1228 #define HAVE_PRE_DECREMENT
1229 #define HAVE_PRE_INCREMENT
1231 /* Macros to check register numbers against specific register classes. */
1233 /* These assume that REGNO is a hard or pseudo reg number.
1234 They give nonzero only if REGNO is a hard reg of the suitable class
1235 or a pseudo reg currently allocated to a suitable hard reg.
1236 Since they use reg_renumber, they are safe only once reg_renumber
1237 has been allocated, which happens in local-alloc.c. */
1239 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1240 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1241 #define REGNO_OK_FOR_BASE_P(REGNO) \
1242 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1243 #define REGNO_OK_FOR_FP_P(REGNO) \
1244 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1246 /* Now macros that check whether X is a register and also,
1247 strictly, whether it is in a specified class.
1249 These macros are specific to the the HP-PA, and may be used only
1250 in code for printing assembler insns and in conditions for
1251 define_optimization. */
1253 /* 1 if X is an fp register. */
1255 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1257 /* Maximum number of registers that can appear in a valid memory address. */
1259 #define MAX_REGS_PER_ADDRESS 2
1261 /* Recognize any constant value that is a valid address except
1262 for symbolic addresses. We get better CSE by rejecting them
1263 here and allowing hppa_legitimize_address to break them up. We
1264 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1266 #define CONSTANT_ADDRESS_P(X) \
1267 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1268 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1269 || GET_CODE (X) == HIGH) \
1270 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1272 /* Include all constant integers and constant doubles, but not
1273 floating-point, except for floating-point zero. */
1275 #define LEGITIMATE_CONSTANT_P(X) \
1276 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1277 || (X) == CONST0_RTX (GET_MODE (X))) \
1278 && !(flag_pic && function_label_operand (X, VOIDmode)))
1280 /* Subroutine for EXTRA_CONSTRAINT.
1282 Return 1 iff OP is a pseudo which did not get a hard register and
1283 we are running the reload pass. */
1285 #define IS_RELOADING_PSEUDO_P(OP) \
1286 ((reload_in_progress \
1287 && GET_CODE (OP) == REG \
1288 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1289 && reg_renumber [REGNO (OP)] < 0))
1291 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1293 For the HPPA, `Q' means that this is a memory operand but not a
1294 symbolic memory operand. Note that an unassigned pseudo register
1295 is such a memory operand. Needed because reload will generate
1296 these things in insns and then not re-recognize the insns, causing
1297 constrain_operands to fail.
1299 Also note `Q' accepts any memory operand during the reload pass.
1300 This includes out-of-range displacements in reg+d addressing.
1301 This makes for better code. (??? For 2.5 address this issue).
1307 `T' is for fp loads and stores. */
1308 #define EXTRA_CONSTRAINT(OP, C) \
1310 (IS_RELOADING_PSEUDO_P (OP) \
1311 || (GET_CODE (OP) == MEM \
1312 && reload_in_progress) \
1313 || (GET_CODE (OP) == MEM \
1314 && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1315 && ! symbolic_memory_operand (OP, VOIDmode))) \
1317 (GET_CODE (OP) == MEM \
1318 /* Using DFmode forces only short displacements \
1319 to be recognized as valid in reg+d addresses. */\
1320 && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1322 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1323 and check its validity for a certain class.
1324 We have two alternate definitions for each of them.
1325 The usual definition accepts all pseudo regs; the other rejects
1326 them unless they have been allocated suitable hard regs.
1327 The symbol REG_OK_STRICT causes the latter definition to be used.
1329 Most source files want to accept pseudo regs in the hope that
1330 they will get allocated to the class that the insn wants them to be in.
1331 Source files for reload pass need to be strict.
1332 After reload, it makes no difference, since pseudo regs have
1333 been eliminated by then. */
1335 #ifndef REG_OK_STRICT
1337 /* Nonzero if X is a hard reg that can be used as an index
1338 or if it is a pseudo reg. */
1339 #define REG_OK_FOR_INDEX_P(X) \
1340 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1341 /* Nonzero if X is a hard reg that can be used as a base reg
1342 or if it is a pseudo reg. */
1343 #define REG_OK_FOR_BASE_P(X) \
1344 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1348 /* Nonzero if X is a hard reg that can be used as an index. */
1349 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1350 /* Nonzero if X is a hard reg that can be used as a base reg. */
1351 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1355 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1356 that is a valid memory address for an instruction.
1357 The MODE argument is the machine mode for the MEM expression
1358 that wants to use this address.
1360 On the HP-PA, the actual legitimate addresses must be
1361 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1362 But we can treat a SYMBOL_REF as legitimate if it is part of this
1363 function's constant-pool, because such addresses can actually
1364 be output as REG+SMALLINT.
1366 Note we only allow 5 bit immediates for access to a constant address;
1367 doing so avoids losing for loading/storing a FP register at an address
1368 which will not fit in 5 bits. */
1370 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1371 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1373 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1374 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1376 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1377 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1379 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1380 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1382 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1384 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1385 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1386 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1387 && REG_P (XEXP (X, 0)) \
1388 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1390 else if (GET_CODE (X) == PLUS) \
1392 rtx base = 0, index; \
1393 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1395 if (GET_CODE (XEXP (X, 1)) == REG \
1396 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1398 else if (flag_pic == 1 \
1399 && GET_CODE (XEXP (X, 1)) == SYMBOL_REF)\
1402 else if (REG_P (XEXP (X, 0)) \
1403 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1404 base = XEXP (X, 0), index = XEXP (X, 1); \
1405 else if (REG_P (XEXP (X, 1)) \
1406 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1407 base = XEXP (X, 1), index = XEXP (X, 0); \
1409 if (GET_CODE (index) == CONST_INT \
1410 && ((INT_14_BITS (index) \
1411 && (TARGET_SOFT_FLOAT \
1412 || ((MODE) != SFmode && (MODE) != DFmode))) \
1413 || INT_5_BITS (index))) \
1416 else if (GET_CODE (X) == LO_SUM \
1417 && GET_CODE (XEXP (X, 0)) == REG \
1418 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1419 && CONSTANT_P (XEXP (X, 1)) \
1420 && (TARGET_SOFT_FLOAT \
1421 || ((MODE) != SFmode \
1422 && (MODE) != DFmode))) \
1424 else if (GET_CODE (X) == LO_SUM \
1425 && GET_CODE (XEXP (X, 0)) == SUBREG \
1426 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1427 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1428 && CONSTANT_P (XEXP (X, 1)) \
1429 && (TARGET_SOFT_FLOAT \
1430 || ((MODE) != SFmode \
1431 && (MODE) != DFmode))) \
1433 else if (GET_CODE (X) == LABEL_REF \
1434 || (GET_CODE (X) == CONST_INT \
1435 && INT_5_BITS (X))) \
1437 /* Needed for -fPIC */ \
1438 else if (GET_CODE (X) == LO_SUM \
1439 && GET_CODE (XEXP (X, 0)) == REG \
1440 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1441 && GET_CODE (XEXP (X, 1)) == UNSPEC) \
1445 /* Try machine-dependent ways of modifying an illegitimate address
1446 to be legitimate. If we find one, return the new, valid address.
1447 This macro is used in only one place: `memory_address' in explow.c.
1449 OLDX is the address as it was before break_out_memory_refs was called.
1450 In some cases it is useful to look at this to decide what needs to be done.
1452 MODE and WIN are passed so that this macro can use
1453 GO_IF_LEGITIMATE_ADDRESS.
1455 It is always safe for this macro to do nothing. It exists to recognize
1456 opportunities to optimize the output. */
1458 extern struct rtx_def *hppa_legitimize_address ();
1459 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1460 { rtx orig_x = (X); \
1461 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1462 if ((X) != orig_x && memory_address_p (MODE, X)) \
1465 /* Go to LABEL if ADDR (a legitimate address expression)
1466 has an effect that depends on the machine mode it is used for. */
1468 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1469 if (GET_CODE (ADDR) == PRE_DEC \
1470 || GET_CODE (ADDR) == POST_DEC \
1471 || GET_CODE (ADDR) == PRE_INC \
1472 || GET_CODE (ADDR) == POST_INC) \
1475 /* Define this macro if references to a symbol must be treated
1476 differently depending on something about the variable or
1477 function named by the symbol (such as what section it is in).
1479 The macro definition, if any, is executed immediately after the
1480 rtl for DECL or other node is created.
1481 The value of the rtl will be a `mem' whose address is a
1484 The usual thing for this macro to do is to a flag in the
1485 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1486 name string in the `symbol_ref' (if one bit is not enough
1489 On the HP-PA we use this to indicate if a symbol is in text or
1490 data space. Also, function labels need special treatment. */
1492 #define TEXT_SPACE_P(DECL)\
1493 (TREE_CODE (DECL) == FUNCTION_DECL \
1494 || (TREE_CODE (DECL) == VAR_DECL \
1495 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1497 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1498 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1500 #define FUNCTION_NAME_P(NAME) \
1501 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1503 #define ENCODE_SECTION_INFO(DECL)\
1505 { if (TEXT_SPACE_P (DECL)) \
1507 if (TREE_CODE (DECL) == FUNCTION_DECL \
1508 || TREE_CODE (DECL) == VAR_DECL) \
1509 _rtl = DECL_RTL (DECL); \
1511 _rtl = TREE_CST_RTL (DECL); \
1512 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1513 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1514 hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1519 /* Store the user-specified part of SYMBOL_NAME in VAR.
1520 This is sort of inverse to ENCODE_SECTION_INFO. */
1522 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1523 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1524 1 + (SYMBOL_NAME)[1] == '@'\
1525 : (SYMBOL_NAME)[0] == '@'))
1527 /* Arghh. This is used for stuff in the constant pool; this may include
1528 function addresses on the PA, which during PIC code generation must
1529 reside in the data space. Unfortuantely, there's no way to determine
1530 if a particular label in the constant pool refers to a function address.
1531 So just force everything into the data space during PIC generation. */
1532 #define SELECT_RTX_SECTION(RTX,MODE) \
1536 readonly_data_section ();
1538 /* Specify the machine mode that this machine uses
1539 for the index in the tablejump instruction. */
1540 #define CASE_VECTOR_MODE DImode
1542 /* Define this if the tablejump instruction expects the table
1543 to contain offsets from the address of the table.
1544 Do not define this if the table should contain absolute addresses. */
1545 /* #define CASE_VECTOR_PC_RELATIVE */
1547 #define CASE_DROPS_THROUGH
1548 /* Specify the tree operation to be used to convert reals to integers. */
1549 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1551 /* This is the kind of divide that is easiest to do in the general case. */
1552 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1554 /* Define this as 1 if `char' should by default be signed; else as 0. */
1555 #define DEFAULT_SIGNED_CHAR 1
1557 /* Max number of bytes we can move from memory to memory
1558 in one reasonably fast instruction. */
1561 /* Define if operations between registers always perform the operation
1562 on the full register even if a narrower mode is specified. */
1563 #define WORD_REGISTER_OPERATIONS
1565 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1566 will either zero-extend or sign-extend. The value of this macro should
1567 be the code that says which one of the two operations is implicitly
1568 done, NIL if none. */
1569 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1571 /* Nonzero if access to memory by bytes is slow and undesirable. */
1572 #define SLOW_BYTE_ACCESS 1
1574 /* Do not break .stabs pseudos into continuations. */
1575 #define DBX_CONTIN_LENGTH 0
1577 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1578 is done just by pretending it is already truncated. */
1579 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1581 /* We assume that the store-condition-codes instructions store 0 for false
1582 and some other value for true. This is the value stored for true. */
1584 #define STORE_FLAG_VALUE 1
1586 /* When a prototype says `char' or `short', really pass an `int'. */
1587 #define PROMOTE_PROTOTYPES
1589 /* Specify the machine mode that pointers have.
1590 After generation of rtl, the compiler makes no further distinction
1591 between pointers and any other objects of this machine mode. */
1592 #define Pmode SImode
1594 /* Add any extra modes needed to represent the condition code.
1596 HPPA floating comparisons produce condition codes. */
1597 #define EXTRA_CC_MODES CCFPmode
1599 /* Define the names for the modes specified above. */
1600 #define EXTRA_CC_NAMES "CCFP"
1602 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1603 return the mode to be used for the comparison. For floating-point, CCFPmode
1604 should be used. CC_NOOVmode should be used when the first operand is a
1605 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1607 #define SELECT_CC_MODE(OP,X,Y) \
1608 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1610 /* A function address in a call instruction
1611 is a byte address (for indexing purposes)
1612 so give the MEM rtx a byte's mode. */
1613 #define FUNCTION_MODE SImode
1615 /* Define this if addresses of constant functions
1616 shouldn't be put through pseudo regs where they can be cse'd.
1617 Desirable on machines where ordinary constants are expensive
1618 but a CALL with constant address is cheap. */
1619 #define NO_FUNCTION_CSE
1621 /* Define this to be nonzero if shift instructions ignore all but the low-order
1623 #define SHIFT_COUNT_TRUNCATED 1
1625 /* Use atexit for static constructors/destructors, instead of defining
1626 our own exit function. */
1629 /* Compute the cost of computing a constant rtl expression RTX
1630 whose rtx-code is CODE. The body of this macro is a portion
1631 of a switch statement. If the code is computed here,
1632 return it with a return statement. Otherwise, break from the switch. */
1634 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1636 if (INTVAL (RTX) == 0) return 0; \
1637 if (INT_14_BITS (RTX)) return 1; \
1644 case CONST_DOUBLE: \
1645 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1646 && OUTER_CODE != SET) \
1651 #define ADDRESS_COST(RTX) \
1652 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1654 /* Compute extra cost of moving data between one register class
1657 Make moves from SAR so expensive they should never happen. We used to
1658 have 0xffff here, but that generates overflow in rare cases.
1660 Copies involving a FP register and a non-FP register are relatively
1661 expensive because they must go through memory.
1663 Other copies are reasonably cheap. */
1664 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1665 (CLASS1 == SHIFT_REGS ? 0x100 \
1666 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1667 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1671 /* Provide the costs of a rtl expression. This is in the body of a
1672 switch on CODE. The purpose for the cost of MULT is to encourage
1673 `synth_mult' to find a synthetic multiply when reasonable. */
1675 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1677 return (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1678 && ! TARGET_SOFT_FLOAT \
1679 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20)); \
1684 return COSTS_N_INSNS (60); \
1686 if (GET_CODE (XEXP (X, 0)) == MULT \
1687 && shadd_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1688 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1689 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1692 /* Adjust the cost of dependencies. */
1694 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1695 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1697 /* Handling the special cases is going to get too complicated for a macro,
1698 just call `pa_adjust_insn_length' to do the real work. */
1699 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1700 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1702 /* Enable a bug fix. (This is for extra caution.) */
1703 #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1705 /* Millicode insns are actually function calls with some special
1706 constraints on arguments and register usage.
1708 Millicode calls always expect their arguments in the integer argument
1709 registers, and always return their result in %r29 (ret1). They
1710 are expected to clobber their arguments, %r1, %r29, and %r31 and
1713 These macros tell reorg that the references to arguments and
1714 register clobbers for millicode calls do not appear to happen
1715 until after the millicode call. This allows reorg to put insns
1716 which set the argument registers into the delay slot of the millicode
1717 call -- thus they act more like traditional CALL_INSNs.
1719 get_attr_type will try to recognize the given insn, so make sure to
1720 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1722 #define INSN_SETS_ARE_DELAYED(X) \
1723 ((GET_CODE (X) == INSN \
1724 && GET_CODE (PATTERN (X)) != SEQUENCE \
1725 && GET_CODE (PATTERN (X)) != USE \
1726 && GET_CODE (PATTERN (X)) != CLOBBER \
1727 && get_attr_type (X) == TYPE_MILLI))
1729 #define INSN_REFERENCES_ARE_DELAYED(X) \
1730 ((GET_CODE (X) == INSN \
1731 && GET_CODE (PATTERN (X)) != SEQUENCE \
1732 && GET_CODE (PATTERN (X)) != USE \
1733 && GET_CODE (PATTERN (X)) != CLOBBER \
1734 && get_attr_type (X) == TYPE_MILLI))
1737 /* Control the assembler format that we output. */
1739 /* Output at beginning of assembler file. */
1741 #define ASM_FILE_START(FILE) \
1742 do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1743 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1744 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1746 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1747 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1748 \t.IMPORT $global$,DATA\n\
1749 \t.IMPORT $$dyncall,MILLICODE\n");\
1751 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1752 if (write_symbols != NO_DEBUG) \
1753 output_file_directive ((FILE), main_input_filename); \
1756 /* Output to assembler file text saying following lines
1757 may contain character constants, extra white space, comments, etc. */
1759 #define ASM_APP_ON ""
1761 /* Output to assembler file text saying following lines
1762 no longer contain unusual constructs. */
1764 #define ASM_APP_OFF ""
1766 /* We don't yet know how to identify GCC to HP-PA machines. */
1767 #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1769 /* Output before code. */
1771 /* Supposedly the assembler rejects the command if there is no tab! */
1772 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1774 /* Output before read-only data. */
1776 /* Supposedly the assembler rejects the command if there is no tab! */
1777 #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1779 #define READONLY_DATA_SECTION readonly_data
1781 /* Output before writable data. */
1783 /* Supposedly the assembler rejects the command if there is no tab! */
1784 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1786 /* Output before uninitialized data. */
1788 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1790 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1792 #define EXTRA_SECTIONS in_bss, in_readonly_data
1794 /* FIXME: HPUX ld generates incorrect GOT entries for "T" fixups
1795 which reference data within the $TEXT$ space (for example constant
1796 strings in the $LIT$ subspace).
1798 The assemblers (GAS and HP as) both have problems with handling
1799 the difference of two symbols which is the other correct way to
1800 reference constant data during PIC code generation.
1802 So, there's no way to reference constant data which is in the
1803 $TEXT$ space during PIC generation. Instead place all constant
1804 data into the $PRIVATE$ subspace (this reduces sharing, but it
1805 works correctly). */
1807 #define EXTRA_SECTION_FUNCTIONS \
1811 if (in_section != in_bss) \
1813 fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1814 in_section = in_bss; \
1820 if (in_section != in_readonly_data) \
1823 fprintf (asm_out_file, "%s\n", DATA_SECTION_ASM_OP); \
1825 fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1826 in_section = in_readonly_data; \
1831 /* How to refer to registers in assembler output.
1832 This sequence is indexed by compiler's hard-register-number (see above). */
1834 #define REGISTER_NAMES \
1835 {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1836 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1837 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1838 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1839 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1840 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
1841 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
1842 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
1843 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
1844 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
1845 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
1848 #define ADDITIONAL_REGISTER_NAMES \
1849 {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
1850 {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
1851 {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
1852 {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
1853 {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
1854 {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
1855 {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
1858 /* How to renumber registers for dbx and gdb.
1860 Registers 0 - 31 remain unchanged.
1862 Registers 32 - 87 are mapped to 72 - 127
1864 Register 88 is mapped to 32. */
1866 #define DBX_REGISTER_NUMBER(REGNO) \
1867 ((REGNO) <= 31 ? (REGNO) : \
1868 ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
1870 /* This is how to output the definition of a user-level label named NAME,
1871 such as the label on a static function or variable NAME. */
1873 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1874 do { assemble_name (FILE, NAME); \
1875 fputc ('\n', FILE); } while (0)
1877 /* This is how to output a command to make the user-level label named NAME
1878 defined for reference from other files. */
1880 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1881 do { fputs ("\t.IMPORT ", FILE); \
1882 assemble_name (FILE, NAME); \
1883 if (FUNCTION_NAME_P (NAME)) \
1884 fputs (",CODE\n", FILE); \
1886 fputs (",DATA\n", FILE); \
1889 /* The bogus HP assembler requires ALL external references to be
1890 "imported", even library calls. They look a bit different, so
1891 here's this macro. */
1893 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1894 do { fputs ("\t.IMPORT ", FILE); \
1895 assemble_name (FILE, XSTR ((RTL), 0)); \
1896 fputs (",CODE\n", FILE); \
1899 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1901 /* We only handle DATA objects here, functions are globalized in \
1902 ASM_DECLARE_FUNCTION_NAME. */ \
1903 if (! FUNCTION_NAME_P (NAME)) \
1905 fputs ("\t.EXPORT ", FILE); \
1906 assemble_name (FILE, NAME); \
1907 fputs (",DATA\n", FILE); \
1911 /* This is how to output a reference to a user-level label named NAME.
1912 `assemble_name' uses this. */
1914 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1915 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1917 /* This is how to output an internal numbered label where
1918 PREFIX is the class of label and NUM is the number within the class. */
1920 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1921 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1923 /* This is how to store into the string LABEL
1924 the symbol_ref name of an internal numbered label where
1925 PREFIX is the class of label and NUM is the number within the class.
1926 This is suitable for output with `assemble_name'. */
1928 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1929 sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1931 /* This is how to output an assembler line defining a `double' constant. */
1933 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1935 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1936 fprintf (FILE, "\t.word 0x%lx\n\t.word 0x%lx\n", l[0], l[1]); \
1939 /* This is how to output an assembler line defining a `float' constant. */
1941 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1943 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1944 fprintf (FILE, "\t.word 0x%lx\n", l); \
1947 /* This is how to output an assembler line defining an `int' constant. */
1949 #define ASM_OUTPUT_INT(FILE,VALUE) \
1950 { fprintf (FILE, "\t.word "); \
1951 if (function_label_operand (VALUE, VOIDmode) \
1952 && !TARGET_PORTABLE_RUNTIME) \
1953 fprintf (FILE, "P%%"); \
1954 output_addr_const (FILE, (VALUE)); \
1955 fprintf (FILE, "\n");}
1957 /* Likewise for `short' and `char' constants. */
1959 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1960 ( fprintf (FILE, "\t.half "), \
1961 output_addr_const (FILE, (VALUE)), \
1962 fprintf (FILE, "\n"))
1964 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1965 ( fprintf (FILE, "\t.byte "), \
1966 output_addr_const (FILE, (VALUE)), \
1967 fprintf (FILE, "\n"))
1969 /* This is how to output an assembler line for a numeric constant byte. */
1971 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1972 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1974 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1975 output_ascii ((FILE), (P), (SIZE))
1977 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1978 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1979 /* This is how to output an element of a case-vector that is absolute.
1980 Note that this method makes filling these branch delay slots
1983 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1984 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1986 /* Jump tables are executable code and live in the TEXT section on the PA. */
1987 #define JUMP_TABLES_IN_TEXT_SECTION
1989 /* This is how to output an element of a case-vector that is relative.
1990 This must be defined correctly as it is used when generating PIC code.
1992 I belive it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1993 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1994 rather than a table of absolute addresses. */
1996 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1997 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1999 /* This is how to output an assembler line
2000 that says to advance the location counter
2001 to a multiple of 2**LOG bytes. */
2003 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2004 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
2006 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2007 fprintf (FILE, "\t.blockz %d\n", (SIZE))
2009 /* This says how to output an assembler line to define a global common symbol
2010 with size SIZE (in bytes) and alignment ALIGN (in bits). */
2012 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
2014 assemble_name ((FILE), (NAME)); \
2015 fputs ("\t.comm ", (FILE)); \
2016 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
2018 /* This says how to output an assembler line to define a local common symbol
2019 with size SIZE (in bytes) and alignment ALIGN (in bits). */
2021 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
2023 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
2024 assemble_name ((FILE), (NAME)); \
2025 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
2027 /* Store in OUTPUT a string (made with alloca) containing
2028 an assembler-name for a local static variable named NAME.
2029 LABELNO is an integer which is different for each call. */
2031 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2032 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
2033 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
2035 /* Define the parentheses used to group arithmetic operations
2036 in assembler code. */
2038 #define ASM_OPEN_PAREN "("
2039 #define ASM_CLOSE_PAREN ")"
2041 /* All HP assemblers use "!" to separate logical lines. */
2042 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
2044 /* Define results of standard character escape sequences. */
2045 #define TARGET_BELL 007
2046 #define TARGET_BS 010
2047 #define TARGET_TAB 011
2048 #define TARGET_NEWLINE 012
2049 #define TARGET_VT 013
2050 #define TARGET_FF 014
2051 #define TARGET_CR 015
2053 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
2054 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
2056 /* Print operand X (an rtx) in assembler syntax to file FILE.
2057 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2058 For `%' followed by punctuation, CODE is the punctuation and X is null.
2060 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
2061 and an immediate zero should be represented as `r0'.
2063 Several % codes are defined:
2065 C compare conditions
2066 N extract conditions
2067 M modifier to handle preincrement addressing for memory refs.
2068 F modifier to handle preincrement addressing for fp memory refs */
2070 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2073 /* Print a memory address as an operand to reference that memory location. */
2075 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2076 { register rtx addr = ADDR; \
2077 register rtx base; \
2079 switch (GET_CODE (addr)) \
2082 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
2085 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
2086 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
2087 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2088 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
2091 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
2094 if (flag_pic == 0 || !symbolic_operand (XEXP (addr, 1))) \
2095 fputs ("R'", FILE); \
2096 else if (flag_pic == 1) \
2098 else if (flag_pic == 2) \
2099 fputs ("RT'", FILE); \
2100 output_global_address (FILE, XEXP (addr, 1)); \
2101 fputs ("(", FILE); \
2102 output_operand (XEXP (addr, 0), 0); \
2103 fputs (")", FILE); \
2106 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
2109 output_addr_const (FILE, addr); \
2113 /* Define functions in pa.c and used in insn-output.c. */
2115 extern char *output_and ();
2116 extern char *output_ior ();
2117 extern char *output_move_double ();
2118 extern char *output_fp_move_double ();
2119 extern char *output_block_move ();
2120 extern char *output_cbranch ();
2121 extern char *output_bb ();
2122 extern char *output_dbra ();
2123 extern char *output_movb ();
2124 extern char *output_return ();
2125 extern char *output_call ();
2126 extern char *output_mul_insn ();
2127 extern char *output_div_insn ();
2128 extern char *output_mod_insn ();
2129 extern char *singlemove_string ();
2130 extern void output_arg_descriptor ();
2131 extern void output_global_address ();
2132 extern struct rtx_def *legitimize_pic_address ();
2133 extern struct rtx_def *gen_cmp_fp ();
2134 extern void hppa_encode_label ();
2136 extern struct rtx_def *hppa_save_pic_table_rtx;
2139 #define PREDICATE_CODES \
2140 {"reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
2141 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
2142 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
2143 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
2144 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
2145 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
2146 {"pre_cint_operand", {CONST_INT}}, \
2147 {"post_cint_operand", {CONST_INT}}, \
2148 {"int5_operand", {CONST_INT}}, \
2149 {"uint5_operand", {CONST_INT}}, \
2150 {"uint32_operand", {CONST_INT}}, \
2151 {"int11_operand", {CONST_INT}}, \
2152 {"and_operand", {SUBREG, REG, CONST_INT}}, \
2153 {"ior_operand", {CONST_INT}}, \
2154 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
2155 {"lhs_lshift_cint_operand", {CONST_INT}}, \
2156 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
2157 {"shadd_operand", {CONST_INT}}, \
2158 {"eq_neq_comparison_operator", {EQ, NE}}, \
2159 {"movb_comparison_operator", {EQ, NE, LT, GE}}, \
2160 {"pc_or_label_operand", {LABEL_REF, PC}}, \
2161 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
2162 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
2163 {"move_operand", {SUBREG, REG, CONST_INT, MEM}}, \
2164 {"pic_label_operand", {LABEL_REF, CONST}}, \
2165 {"function_label_operand", {SYMBOL_REF}}, \
2166 {"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, CONST_INT, \
2167 CONST_DOUBLE, MEM}}, \
2168 {"div_operand", {REG, CONST_INT}}, \
2169 {"call_operand_address", {SYMBOL_REF, LABEL_REF, CONST_INT, \
2170 CONST_DOUBLE, CONST, HIGH}},
2173 /* We want __gcc_plt_call to appear in every program built by
2174 gcc, so we make a reference to it out of __main. */
2175 #define DO_GLOBAL_DTORS_BODY \
2177 extern void __gcc_plt_call (); \
2178 void (*reference)() = &__gcc_plt_call; \
2180 for (p = __DTOR_LIST__ + 1; *p; ) \
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