1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
5 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
6 Software Science at the University of Utah.
8 This file is part of GCC.
10 GCC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
15 GCC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING3. If not see
22 <http://www.gnu.org/licenses/>. */
24 enum cmp_type /* comparison type */
26 CMP_SI, /* compare integers */
27 CMP_SF, /* compare single precision floats */
28 CMP_DF, /* compare double precision floats */
29 CMP_MAX /* max comparison type */
32 /* For long call handling. */
33 extern unsigned long total_code_bytes;
35 /* Which processor to schedule for. */
47 /* For -mschedule= option. */
48 extern enum processor_type pa_cpu;
50 /* For -munix= option. */
51 extern int flag_pa_unix;
53 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
55 /* Print subsidiary information on the compiler version in use. */
57 #define TARGET_VERSION fputs (" (hppa)", stderr);
59 #define TARGET_PA_10 (!TARGET_PA_11 && !TARGET_PA_20)
61 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */
63 #define TARGET_64BIT 0
66 /* Generate code for ELF32 ABI. */
68 #define TARGET_ELF32 0
71 /* Generate code for SOM 32bit ABI. */
76 /* HP-UX UNIX features. */
81 /* HP-UX 10.10 UNIX 95 features. */
82 #ifndef TARGET_HPUX_10_10
83 #define TARGET_HPUX_10_10 0
86 /* HP-UX 11.* features (11.00, 11.11, 11.23, etc.) */
87 #ifndef TARGET_HPUX_11
88 #define TARGET_HPUX_11 0
91 /* HP-UX 11i multibyte and UNIX 98 extensions. */
92 #ifndef TARGET_HPUX_11_11
93 #define TARGET_HPUX_11_11 0
96 /* The following three defines are potential target switches. The current
97 defines are optimal given the current capabilities of GAS and GNU ld. */
99 /* Define to a C expression evaluating to true to use long absolute calls.
100 Currently, only the HP assembler and SOM linker support long absolute
101 calls. They are used only in non-pic code. */
102 #define TARGET_LONG_ABS_CALL (TARGET_SOM && !TARGET_GAS)
104 /* Define to a C expression evaluating to true to use long pic symbol
105 difference calls. This is a call variant similar to the long pic
106 pc-relative call. Long pic symbol difference calls are only used with
107 the HP SOM linker. Currently, only the HP assembler supports these
108 calls. GAS doesn't allow an arbitrary difference of two symbols. */
109 #define TARGET_LONG_PIC_SDIFF_CALL (!TARGET_GAS)
111 /* Define to a C expression evaluating to true to use long pic
112 pc-relative calls. Long pic pc-relative calls are only used with
113 GAS. Currently, they are usable for calls within a module but
114 not for external calls. */
115 #define TARGET_LONG_PIC_PCREL_CALL 0
117 /* Define to a C expression evaluating to true to use SOM secondary
118 definition symbols for weak support. Linker support for secondary
119 definition symbols is buggy prior to HP-UX 11.X. */
120 #define TARGET_SOM_SDEF 0
122 /* Define to a C expression evaluating to true to save the entry value
123 of SP in the current frame marker. This is normally unnecessary.
124 However, the HP-UX unwind library looks at the SAVE_SP callinfo flag.
125 HP compilers don't use this flag but it is supported by the assembler.
126 We set this flag to indicate that register %r3 has been saved at the
127 start of the frame. Thus, when the HP unwind library is used, we
128 need to generate additional code to save SP into the frame marker. */
129 #define TARGET_HPUX_UNWIND_LIBRARY 0
131 #ifndef TARGET_DEFAULT
132 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY | MASK_BIG_SWITCH)
135 #ifndef TARGET_CPU_DEFAULT
136 #define TARGET_CPU_DEFAULT 0
139 #ifndef TARGET_SCHED_DEFAULT
140 #define TARGET_SCHED_DEFAULT PROCESSOR_8000
143 /* Support for a compile-time default CPU, et cetera. The rules are:
144 --with-schedule is ignored if -mschedule is specified.
145 --with-arch is ignored if -march is specified. */
146 #define OPTION_DEFAULT_SPECS \
147 {"arch", "%{!march=*:-march=%(VALUE)}" }, \
148 {"schedule", "%{!mschedule=*:-mschedule=%(VALUE)}" }
150 /* Specify the dialect of assembler to use. New mnemonics is dialect one
151 and the old mnemonics are dialect zero. */
152 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
154 #define OVERRIDE_OPTIONS override_options ()
156 /* Override some settings from dbxelf.h. */
158 /* We do not have to be compatible with dbx, so we enable gdb extensions
160 #define DEFAULT_GDB_EXTENSIONS 1
162 /* This used to be zero (no max length), but big enums and such can
163 cause huge strings which killed gas.
165 We also have to avoid lossage in dbxout.c -- it does not compute the
166 string size accurately, so we are real conservative here. */
167 #undef DBX_CONTIN_LENGTH
168 #define DBX_CONTIN_LENGTH 3000
170 /* GDB always assumes the current function's frame begins at the value
171 of the stack pointer upon entry to the current function. Accessing
172 local variables and parameters passed on the stack is done using the
173 base of the frame + an offset provided by GCC.
175 For functions which have frame pointers this method works fine;
176 the (frame pointer) == (stack pointer at function entry) and GCC provides
177 an offset relative to the frame pointer.
179 This loses for functions without a frame pointer; GCC provides an offset
180 which is relative to the stack pointer after adjusting for the function's
181 frame size. GDB would prefer the offset to be relative to the value of
182 the stack pointer at the function's entry. Yuk! */
183 #define DEBUGGER_AUTO_OFFSET(X) \
184 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
185 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
187 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
188 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
189 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
191 #define TARGET_CPU_CPP_BUILTINS() \
193 builtin_assert("cpu=hppa"); \
194 builtin_assert("machine=hppa"); \
195 builtin_define("__hppa"); \
196 builtin_define("__hppa__"); \
198 builtin_define("_PA_RISC2_0"); \
199 else if (TARGET_PA_11) \
200 builtin_define("_PA_RISC1_1"); \
202 builtin_define("_PA_RISC1_0"); \
205 /* An old set of OS defines for various BSD-like systems. */
206 #define TARGET_OS_CPP_BUILTINS() \
209 builtin_define_std ("REVARGV"); \
210 builtin_define_std ("hp800"); \
211 builtin_define_std ("hp9000"); \
212 builtin_define_std ("hp9k8"); \
213 if (!c_dialect_cxx () && !flag_iso) \
214 builtin_define ("hppa"); \
215 builtin_define_std ("spectrum"); \
216 builtin_define_std ("unix"); \
217 builtin_assert ("system=bsd"); \
218 builtin_assert ("system=unix"); \
222 #define CC1_SPEC "%{pg:} %{p:}"
224 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
226 /* We don't want -lg. */
228 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
231 /* This macro defines command-line switches that modify the default
234 The definition is be an initializer for an array of structures. Each
235 array element has have three elements: the switch name, one of the
236 enumeration codes ADD or DELETE to indicate whether the string should be
237 inserted or deleted, and the string to be inserted or deleted. */
238 #define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
240 /* Make gcc agree with <machine/ansi.h> */
242 #define SIZE_TYPE "unsigned int"
243 #define PTRDIFF_TYPE "int"
244 #define WCHAR_TYPE "unsigned int"
245 #define WCHAR_TYPE_SIZE 32
247 /* Show we can debug even without a frame pointer. */
248 #define CAN_DEBUG_WITHOUT_FP
250 /* target machine storage layout */
251 typedef struct machine_function GTY(())
253 /* Flag indicating that a .NSUBSPA directive has been output for
258 /* Define this macro if it is advisable to hold scalars in registers
259 in a wider mode than that declared by the program. In such cases,
260 the value is constrained to be within the bounds of the declared
261 type, but kept valid in the wider mode. The signedness of the
262 extension may differ from that of the type. */
264 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
265 if (GET_MODE_CLASS (MODE) == MODE_INT \
266 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
269 /* Define this if most significant bit is lowest numbered
270 in instructions that operate on numbered bit-fields. */
271 #define BITS_BIG_ENDIAN 1
273 /* Define this if most significant byte of a word is the lowest numbered. */
274 /* That is true on the HP-PA. */
275 #define BYTES_BIG_ENDIAN 1
277 /* Define this if most significant word of a multiword number is lowest
279 #define WORDS_BIG_ENDIAN 1
281 #define MAX_BITS_PER_WORD 64
283 /* Width of a word, in units (bytes). */
284 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
286 /* Minimum number of units in a word. If this is undefined, the default
287 is UNITS_PER_WORD. Otherwise, it is the constant value that is the
288 smallest value that UNITS_PER_WORD can have at run-time.
290 FIXME: This needs to be 4 when TARGET_64BIT is true to suppress the
291 building of various TImode routines in libgcc. The HP runtime
292 specification doesn't provide the alignment requirements and calling
293 conventions for TImode variables. */
294 #define MIN_UNITS_PER_WORD 4
296 /* The widest floating point format supported by the hardware. Note that
297 setting this influences some Ada floating point type sizes, currently
298 required for GNAT to operate properly. */
299 #define WIDEST_HARDWARE_FP_SIZE 64
301 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
302 #define PARM_BOUNDARY BITS_PER_WORD
304 /* Largest alignment required for any stack parameter, in bits.
305 Don't define this if it is equal to PARM_BOUNDARY */
306 #define MAX_PARM_BOUNDARY BIGGEST_ALIGNMENT
308 /* Boundary (in *bits*) on which stack pointer is always aligned;
309 certain optimizations in combine depend on this.
311 The HP-UX runtime documents mandate 64-byte and 16-byte alignment for
312 the stack on the 32 and 64-bit ports, respectively. However, we
313 are only guaranteed that the stack is aligned to BIGGEST_ALIGNMENT
314 in main. Thus, we treat the former as the preferred alignment. */
315 #define STACK_BOUNDARY BIGGEST_ALIGNMENT
316 #define PREFERRED_STACK_BOUNDARY (TARGET_64BIT ? 128 : 512)
318 /* Allocation boundary (in *bits*) for the code of a function. */
319 #define FUNCTION_BOUNDARY BITS_PER_WORD
321 /* Alignment of field after `int : 0' in a structure. */
322 #define EMPTY_FIELD_BOUNDARY 32
324 /* Every structure's size must be a multiple of this. */
325 #define STRUCTURE_SIZE_BOUNDARY 8
327 /* A bit-field declared as `int' forces `int' alignment for the struct. */
328 #define PCC_BITFIELD_TYPE_MATTERS 1
330 /* No data type wants to be aligned rounder than this. */
331 #define BIGGEST_ALIGNMENT (2 * BITS_PER_WORD)
333 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
334 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
335 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
337 /* Make arrays of chars word-aligned for the same reasons. */
338 #define DATA_ALIGNMENT(TYPE, ALIGN) \
339 (TREE_CODE (TYPE) == ARRAY_TYPE \
340 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
341 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
343 /* Set this nonzero if move instructions will actually fail to work
344 when given unaligned data. */
345 #define STRICT_ALIGNMENT 1
347 /* Value is 1 if it is a good idea to tie two pseudo registers
348 when one has mode MODE1 and one has mode MODE2.
349 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
350 for any hard reg, then this must be 0 for correct output. */
351 #define MODES_TIEABLE_P(MODE1, MODE2) \
352 pa_modes_tieable_p (MODE1, MODE2)
354 /* Specify the registers used for certain standard purposes.
355 The values of these macros are register numbers. */
357 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
358 /* #define PC_REGNUM */
360 /* Register to use for pushing function arguments. */
361 #define STACK_POINTER_REGNUM 30
363 /* Base register for access to local variables of the function. */
364 #define FRAME_POINTER_REGNUM 3
366 /* Value should be nonzero if functions must have frame pointers. */
367 #define FRAME_POINTER_REQUIRED \
368 (current_function_calls_alloca)
370 /* Don't allow hard registers to be renamed into r2 unless r2
371 is already live or already being saved (due to eh). */
373 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
374 ((NEW_REG) != 2 || df_regs_ever_live_p (2) || current_function_calls_eh_return)
376 /* C statement to store the difference between the frame pointer
377 and the stack pointer values immediately after the function prologue.
379 Note, we always pretend that this is a leaf function because if
380 it's not, there's no point in trying to eliminate the
381 frame pointer. If it is a leaf function, we guessed right! */
382 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
383 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
385 /* Base register for access to arguments of the function. */
386 #define ARG_POINTER_REGNUM (TARGET_64BIT ? 29 : 3)
388 /* Register in which static-chain is passed to a function. */
389 #define STATIC_CHAIN_REGNUM (TARGET_64BIT ? 31 : 29)
391 /* Register used to address the offset table for position-independent
393 #define PIC_OFFSET_TABLE_REGNUM \
394 (flag_pic ? (TARGET_64BIT ? 27 : 19) : INVALID_REGNUM)
396 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
398 /* Function to return the rtx used to save the pic offset table register
399 across function calls. */
400 extern struct rtx_def *hppa_pic_save_rtx (void);
402 #define DEFAULT_PCC_STRUCT_RETURN 0
404 /* Register in which address to store a structure value
405 is passed to a function. */
406 #define PA_STRUCT_VALUE_REGNUM 28
408 /* Describe how we implement __builtin_eh_return. */
409 #define EH_RETURN_DATA_REGNO(N) \
410 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
411 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
412 #define EH_RETURN_HANDLER_RTX pa_eh_return_handler_rtx ()
414 /* Offset from the frame pointer register value to the top of stack. */
415 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
417 /* A C expression whose value is RTL representing the location of the
418 incoming return address at the beginning of any function, before the
419 prologue. You only need to define this macro if you want to support
420 call frame debugging information like that provided by DWARF 2. */
421 #define INCOMING_RETURN_ADDR_RTX (gen_rtx_REG (word_mode, 2))
422 #define DWARF_FRAME_RETURN_COLUMN (DWARF_FRAME_REGNUM (2))
424 /* A C expression whose value is an integer giving a DWARF 2 column
425 number that may be used as an alternate return column. This should
426 be defined only if DWARF_FRAME_RETURN_COLUMN is set to a general
427 register, but an alternate column needs to be used for signal frames.
429 Column 0 is not used but unfortunately its register size is set to
430 4 bytes (sizeof CCmode) so it can't be used on 64-bit targets. */
431 #define DWARF_ALT_FRAME_RETURN_COLUMN FIRST_PSEUDO_REGISTER
433 /* This macro chooses the encoding of pointers embedded in the exception
434 handling sections. If at all possible, this should be defined such
435 that the exception handling section will not require dynamic relocations,
436 and so may be read-only.
438 Because the HP assembler auto aligns, it is necessary to use
439 DW_EH_PE_aligned. It's not possible to make the data read-only
440 on the HP-UX SOM port since the linker requires fixups for label
441 differences in different sections to be word aligned. However,
442 the SOM linker can do unaligned fixups for absolute pointers.
443 We also need aligned pointers for global and function pointers.
445 Although the HP-UX 64-bit ELF linker can handle unaligned pc-relative
446 fixups, the runtime doesn't have a consistent relationship between
447 text and data for dynamically loaded objects. Thus, it's not possible
448 to use pc-relative encoding for pointers on this target. It may be
449 possible to use segment relative encodings but GAS doesn't currently
450 have a mechanism to generate these encodings. For other targets, we
451 use pc-relative encoding for pointers. If the pointer might require
452 dynamic relocation, we make it indirect. */
453 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
454 (TARGET_GAS && !TARGET_HPUX \
456 | ((GLOBAL) || (CODE) == 2 ? DW_EH_PE_indirect : 0) \
457 | (TARGET_64BIT ? DW_EH_PE_sdata8 : DW_EH_PE_sdata4)) \
458 : (!TARGET_GAS || (GLOBAL) || (CODE) == 2 \
459 ? DW_EH_PE_aligned : DW_EH_PE_absptr))
461 /* Handle special EH pointer encodings. Absolute, pc-relative, and
462 indirect are handled automatically. We output pc-relative, and
463 indirect pc-relative ourself since we need some special magic to
464 generate pc-relative relocations, and to handle indirect function
466 #define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
468 if (((ENCODING) & 0x70) == DW_EH_PE_pcrel) \
470 fputs (integer_asm_op (SIZE, FALSE), FILE); \
471 if ((ENCODING) & DW_EH_PE_indirect) \
472 output_addr_const (FILE, get_deferred_plabel (ADDR)); \
474 assemble_name (FILE, XSTR ((ADDR), 0)); \
475 fputs ("+8-$PIC_pcrel$0", FILE); \
481 /* The class value for index registers, and the one for base regs. */
482 #define INDEX_REG_CLASS GENERAL_REGS
483 #define BASE_REG_CLASS GENERAL_REGS
485 #define FP_REG_CLASS_P(CLASS) \
486 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
488 /* True if register is floating-point. */
489 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
491 /* Given an rtx X being reloaded into a reg required to be
492 in class CLASS, return the class of reg to actually use.
493 In general this is just CLASS; but on some machines
494 in some cases it is preferable to use a more restrictive class. */
495 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
497 #define MAYBE_FP_REG_CLASS_P(CLASS) \
498 reg_classes_intersect_p ((CLASS), FP_REGS)
501 /* Stack layout; function entry, exit and calling. */
503 /* Define this if pushing a word on the stack
504 makes the stack pointer a smaller address. */
505 /* #define STACK_GROWS_DOWNWARD */
507 /* Believe it or not. */
508 #define ARGS_GROW_DOWNWARD
510 /* Define this to nonzero if the nominal address of the stack frame
511 is at the high-address end of the local variables;
512 that is, each additional local variable allocated
513 goes at a more negative offset in the frame. */
514 #define FRAME_GROWS_DOWNWARD 0
516 /* Offset within stack frame to start allocating local variables at.
517 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
518 first local allocated. Otherwise, it is the offset to the BEGINNING
519 of the first local allocated.
521 On the 32-bit ports, we reserve one slot for the previous frame
522 pointer and one fill slot. The fill slot is for compatibility
523 with HP compiled programs. On the 64-bit ports, we reserve one
524 slot for the previous frame pointer. */
525 #define STARTING_FRAME_OFFSET 8
527 /* Define STACK_ALIGNMENT_NEEDED to zero to disable final alignment
528 of the stack. The default is to align it to STACK_BOUNDARY. */
529 #define STACK_ALIGNMENT_NEEDED 0
531 /* If we generate an insn to push BYTES bytes,
532 this says how many the stack pointer really advances by.
533 On the HP-PA, don't define this because there are no push insns. */
534 /* #define PUSH_ROUNDING(BYTES) */
536 /* Offset of first parameter from the argument pointer register value.
537 This value will be negated because the arguments grow down.
538 Also note that on STACK_GROWS_UPWARD machines (such as this one)
539 this is the distance from the frame pointer to the end of the first
540 argument, not it's beginning. To get the real offset of the first
541 argument, the size of the argument must be added. */
543 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
545 /* When a parameter is passed in a register, stack space is still
547 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
549 /* Define this if the above stack space is to be considered part of the
550 space allocated by the caller. */
551 #define OUTGOING_REG_PARM_STACK_SPACE 1
553 /* Keep the stack pointer constant throughout the function.
554 This is both an optimization and a necessity: longjmp
555 doesn't behave itself when the stack pointer moves within
557 #define ACCUMULATE_OUTGOING_ARGS 1
559 /* The weird HPPA calling conventions require a minimum of 48 bytes on
560 the stack: 16 bytes for register saves, and 32 bytes for magic.
561 This is the difference between the logical top of stack and the
564 On the 64-bit port, the HP C compiler allocates a 48-byte frame
565 marker, although the runtime documentation only describes a 16
566 byte marker. For compatibility, we allocate 48 bytes. */
567 #define STACK_POINTER_OFFSET \
568 (TARGET_64BIT ? -(current_function_outgoing_args_size + 48): -32)
570 #define STACK_DYNAMIC_OFFSET(FNDECL) \
572 ? (STACK_POINTER_OFFSET) \
573 : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size))
575 /* Value is 1 if returning from a function call automatically
576 pops the arguments described by the number-of-args field in the call.
577 FUNDECL is the declaration node of the function (as a tree),
578 FUNTYPE is the data type of the function (as a tree),
579 or for a library call it is an identifier node for the subroutine name. */
581 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
583 /* Define how to find the value returned by a function.
584 VALTYPE is the data type of the value (as a tree).
585 If the precise function being called is known, FUNC is its FUNCTION_DECL;
586 otherwise, FUNC is 0. */
588 #define FUNCTION_VALUE(VALTYPE, FUNC) function_value (VALTYPE, FUNC)
590 /* Define how to find the value returned by a library function
591 assuming the value has mode MODE. */
593 #define LIBCALL_VALUE(MODE) \
595 (! TARGET_SOFT_FLOAT \
596 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
598 /* 1 if N is a possible register number for a function value
599 as seen by the caller. */
601 #define FUNCTION_VALUE_REGNO_P(N) \
602 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
605 /* Define a data type for recording info about an argument list
606 during the scan of that argument list. This data type should
607 hold all necessary information about the function itself
608 and about the args processed so far, enough to enable macros
609 such as FUNCTION_ARG to determine where the next arg should go.
611 On the HP-PA, the WORDS field holds the number of words
612 of arguments scanned so far (including the invisible argument,
613 if any, which holds the structure-value-address). Thus, 4 or
614 more means all following args should go on the stack.
616 The INCOMING field tracks whether this is an "incoming" or
619 The INDIRECT field indicates whether this is is an indirect
622 The NARGS_PROTOTYPE field indicates that an argument does not
623 have a prototype when it less than or equal to 0. */
625 struct hppa_args {int words, nargs_prototype, incoming, indirect; };
627 #define CUMULATIVE_ARGS struct hppa_args
629 /* Initialize a variable CUM of type CUMULATIVE_ARGS
630 for a call to a function whose data type is FNTYPE.
631 For a library call, FNTYPE is 0. */
633 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
635 (CUM).incoming = 0, \
636 (CUM).indirect = (FNTYPE) && !(FNDECL), \
637 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
638 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
639 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
640 || pa_return_in_memory (TREE_TYPE (FNTYPE), 0))) \
645 /* Similar, but when scanning the definition of a procedure. We always
646 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
648 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
650 (CUM).incoming = 1, \
651 (CUM).indirect = 0, \
652 (CUM).nargs_prototype = 1000
654 /* Figure out the size in words of the function argument. The size
655 returned by this macro should always be greater than zero because
656 we pass variable and zero sized objects by reference. */
658 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
659 ((((MODE) != BLKmode \
660 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
661 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
663 /* Update the data in CUM to advance over an argument
664 of mode MODE and data type TYPE.
665 (TYPE is null for libcalls where that information may not be available.) */
667 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
668 { (CUM).nargs_prototype--; \
669 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
670 + (((CUM).words & 01) && (TYPE) != 0 \
671 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
674 /* Determine where to put an argument to a function.
675 Value is zero to push the argument on the stack,
676 or a hard register in which to store the argument.
678 MODE is the argument's machine mode.
679 TYPE is the data type of the argument (as a tree).
680 This is null for libcalls where that information may
682 CUM is a variable of type CUMULATIVE_ARGS which gives info about
683 the preceding args and about the function being called.
684 NAMED is nonzero if this argument is a named parameter
685 (otherwise it is an extra parameter matching an ellipsis).
687 On the HP-PA the first four words of args are normally in registers
688 and the rest are pushed. But any arg that won't entirely fit in regs
691 Arguments passed in registers are either 1 or 2 words long.
693 The caller must make a distinction between calls to explicitly named
694 functions and calls through pointers to functions -- the conventions
695 are different! Calls through pointers to functions only use general
696 registers for the first four argument words.
698 Of course all this is different for the portable runtime model
699 HP wants everyone to use for ELF. Ugh. Here's a quick description
700 of how it's supposed to work.
702 1) callee side remains unchanged. It expects integer args to be
703 in the integer registers, float args in the float registers and
704 unnamed args in integer registers.
706 2) caller side now depends on if the function being called has
707 a prototype in scope (rather than if it's being called indirectly).
709 2a) If there is a prototype in scope, then arguments are passed
710 according to their type (ints in integer registers, floats in float
711 registers, unnamed args in integer registers.
713 2b) If there is no prototype in scope, then floating point arguments
714 are passed in both integer and float registers. egad.
716 FYI: The portable parameter passing conventions are almost exactly like
717 the standard parameter passing conventions on the RS6000. That's why
718 you'll see lots of similar code in rs6000.h. */
720 /* If defined, a C expression which determines whether, and in which
721 direction, to pad out an argument with extra space. */
722 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
724 /* Specify padding for the last element of a block move between registers
727 The 64-bit runtime specifies that objects need to be left justified
728 (i.e., the normal justification for a big endian target). The 32-bit
729 runtime specifies right justification for objects smaller than 64 bits.
730 We use a DImode register in the parallel for 5 to 7 byte structures
731 so that there is only one element. This allows the object to be
733 #define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
734 function_arg_padding ((MODE), (TYPE))
736 /* Do not expect to understand this without reading it several times. I'm
737 tempted to try and simply it, but I worry about breaking something. */
739 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
740 function_arg (&CUM, MODE, TYPE, NAMED)
742 /* If defined, a C expression that gives the alignment boundary, in
743 bits, of an argument with the specified mode and type. If it is
744 not defined, `PARM_BOUNDARY' is used for all arguments. */
746 /* Arguments larger than one word are double word aligned. */
748 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
750 ? (integer_zerop (TYPE_SIZE (TYPE)) \
751 || !TREE_CONSTANT (TYPE_SIZE (TYPE)) \
752 || int_size_in_bytes (TYPE) <= UNITS_PER_WORD) \
753 : GET_MODE_SIZE(MODE) <= UNITS_PER_WORD) \
754 ? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
757 extern GTY(()) rtx hppa_compare_op0;
758 extern GTY(()) rtx hppa_compare_op1;
759 extern enum cmp_type hppa_branch_type;
761 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
762 as assembly via FUNCTION_PROFILER. Just output a local label.
763 We can't use the function label because the GAS SOM target can't
764 handle the difference of a global symbol and a local symbol. */
766 #ifndef FUNC_BEGIN_PROLOG_LABEL
767 #define FUNC_BEGIN_PROLOG_LABEL "LFBP"
770 #define FUNCTION_PROFILER(FILE, LABEL) \
771 (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
773 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
774 void hppa_profile_hook (int label_no);
776 /* The profile counter if emitted must come before the prologue. */
777 #define PROFILE_BEFORE_PROLOGUE 1
779 /* We never want final.c to emit profile counters. When profile
780 counters are required, we have to defer emitting them to the end
781 of the current file. */
782 #define NO_PROFILE_COUNTERS 1
784 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
785 the stack pointer does not matter. The value is tested only in
786 functions that have frame pointers.
787 No definition is equivalent to always zero. */
789 extern int may_call_alloca;
791 #define EXIT_IGNORE_STACK \
792 (get_frame_size () != 0 \
793 || current_function_calls_alloca || current_function_outgoing_args_size)
795 /* Output assembler code for a block containing the constant parts
796 of a trampoline, leaving space for the variable parts.\
798 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
799 and then branches to the specified routine.
801 This code template is copied from text segment to stack location
802 and then patched with INITIALIZE_TRAMPOLINE to contain
803 valid values, and then entered as a subroutine.
805 It is best to keep this as small as possible to avoid having to
806 flush multiple lines in the cache. */
808 #define TRAMPOLINE_TEMPLATE(FILE) \
812 fputs ("\tldw 36(%r22),%r21\n", FILE); \
813 fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
814 if (ASSEMBLER_DIALECT == 0) \
815 fputs ("\tdepi 0,31,2,%r21\n", FILE); \
817 fputs ("\tdepwi 0,31,2,%r21\n", FILE); \
818 fputs ("\tldw 4(%r21),%r19\n", FILE); \
819 fputs ("\tldw 0(%r21),%r21\n", FILE); \
822 fputs ("\tbve (%r21)\n", FILE); \
823 fputs ("\tldw 40(%r22),%r29\n", FILE); \
824 fputs ("\t.word 0\n", FILE); \
825 fputs ("\t.word 0\n", FILE); \
829 fputs ("\tldsid (%r21),%r1\n", FILE); \
830 fputs ("\tmtsp %r1,%sr0\n", FILE); \
831 fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
832 fputs ("\tldw 40(%r22),%r29\n", FILE); \
834 fputs ("\t.word 0\n", FILE); \
835 fputs ("\t.word 0\n", FILE); \
836 fputs ("\t.word 0\n", FILE); \
837 fputs ("\t.word 0\n", FILE); \
841 fputs ("\t.dword 0\n", FILE); \
842 fputs ("\t.dword 0\n", FILE); \
843 fputs ("\t.dword 0\n", FILE); \
844 fputs ("\t.dword 0\n", FILE); \
845 fputs ("\tmfia %r31\n", FILE); \
846 fputs ("\tldd 24(%r31),%r1\n", FILE); \
847 fputs ("\tldd 24(%r1),%r27\n", FILE); \
848 fputs ("\tldd 16(%r1),%r1\n", FILE); \
849 fputs ("\tbve (%r1)\n", FILE); \
850 fputs ("\tldd 32(%r31),%r31\n", FILE); \
851 fputs ("\t.dword 0 ; fptr\n", FILE); \
852 fputs ("\t.dword 0 ; static link\n", FILE); \
856 /* Length in units of the trampoline for entering a nested function. */
858 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
860 /* Length in units of the trampoline instruction code. */
862 #define TRAMPOLINE_CODE_SIZE (TARGET_64BIT ? 24 : (TARGET_PA_20 ? 32 : 40))
864 /* Minimum length of a cache line. A length of 16 will work on all
865 PA-RISC processors. All PA 1.1 processors have a cache line of
866 32 bytes. Most but not all PA 2.0 processors have a cache line
867 of 64 bytes. As cache flushes are expensive and we don't support
868 PA 1.0, we use a minimum length of 32. */
870 #define MIN_CACHELINE_SIZE 32
872 /* Emit RTL insns to initialize the variable parts of a trampoline.
873 FNADDR is an RTX for the address of the function's pure code.
874 CXT is an RTX for the static chain value for the function.
876 Move the function address to the trampoline template at offset 36.
877 Move the static chain value to trampoline template at offset 40.
878 Move the trampoline address to trampoline template at offset 44.
879 Move r19 to trampoline template at offset 48. The latter two
880 words create a plabel for the indirect call to the trampoline.
882 A similar sequence is used for the 64-bit port but the plabel is
883 at the beginning of the trampoline.
885 Finally, the cache entries for the trampoline code are flushed.
886 This is necessary to ensure that the trampoline instruction sequence
887 is written to memory prior to any attempts at prefetching the code
890 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
892 rtx start_addr = gen_reg_rtx (Pmode); \
893 rtx end_addr = gen_reg_rtx (Pmode); \
894 rtx line_length = gen_reg_rtx (Pmode); \
899 tmp = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
900 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \
901 tmp = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
902 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \
904 /* Create a fat pointer for the trampoline. */ \
905 tmp = memory_address (Pmode, plus_constant ((TRAMP), 44)); \
906 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (TRAMP)); \
907 tmp = memory_address (Pmode, plus_constant ((TRAMP), 48)); \
908 emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
909 gen_rtx_REG (Pmode, 19)); \
911 /* fdc and fic only use registers for the address to flush, \
912 they do not accept integer displacements. We align the \
913 start and end addresses to the beginning of their respective \
914 cache lines to minimize the number of lines flushed. */ \
915 tmp = force_reg (Pmode, (TRAMP)); \
916 emit_insn (gen_andsi3 (start_addr, tmp, \
917 GEN_INT (-MIN_CACHELINE_SIZE))); \
918 tmp = force_reg (Pmode, \
919 plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \
920 emit_insn (gen_andsi3 (end_addr, tmp, \
921 GEN_INT (-MIN_CACHELINE_SIZE))); \
922 emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \
923 emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \
924 emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \
925 gen_reg_rtx (Pmode), \
926 gen_reg_rtx (Pmode))); \
930 tmp = memory_address (Pmode, plus_constant ((TRAMP), 56)); \
931 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (FNADDR)); \
932 tmp = memory_address (Pmode, plus_constant ((TRAMP), 64)); \
933 emit_move_insn (gen_rtx_MEM (Pmode, tmp), (CXT)); \
935 /* Create a fat pointer for the trampoline. */ \
936 tmp = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
937 emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
938 force_reg (Pmode, plus_constant ((TRAMP), 32))); \
939 tmp = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
940 emit_move_insn (gen_rtx_MEM (Pmode, tmp), \
941 gen_rtx_REG (Pmode, 27)); \
943 /* fdc and fic only use registers for the address to flush, \
944 they do not accept integer displacements. We align the \
945 start and end addresses to the beginning of their respective \
946 cache lines to minimize the number of lines flushed. */ \
947 tmp = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
948 emit_insn (gen_anddi3 (start_addr, tmp, \
949 GEN_INT (-MIN_CACHELINE_SIZE))); \
950 tmp = force_reg (Pmode, \
951 plus_constant (tmp, TRAMPOLINE_CODE_SIZE - 1)); \
952 emit_insn (gen_anddi3 (end_addr, tmp, \
953 GEN_INT (-MIN_CACHELINE_SIZE))); \
954 emit_move_insn (line_length, GEN_INT (MIN_CACHELINE_SIZE)); \
955 emit_insn (gen_dcacheflush (start_addr, end_addr, line_length)); \
956 emit_insn (gen_icacheflush (start_addr, end_addr, line_length, \
957 gen_reg_rtx (Pmode), \
958 gen_reg_rtx (Pmode))); \
962 /* Perform any machine-specific adjustment in the address of the trampoline.
963 ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE.
964 Adjust the trampoline address to point to the plabel at offset 44. */
966 #define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
967 if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
969 /* Addressing modes, and classification of registers for them.
971 Using autoincrement addressing modes on PA8000 class machines is
974 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
975 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
977 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
978 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
980 /* Macros to check register numbers against specific register classes. */
982 /* The following macros assume that X is a hard or pseudo reg number.
983 They give nonzero only if X is a hard reg of the suitable class
984 or a pseudo reg currently allocated to a suitable hard reg.
985 Since they use reg_renumber, they are safe only once reg_renumber
986 has been allocated, which happens in local-alloc.c. */
988 #define REGNO_OK_FOR_INDEX_P(X) \
990 || (X >= FIRST_PSEUDO_REGISTER \
992 && (unsigned) reg_renumber[X] < 32)))
993 #define REGNO_OK_FOR_BASE_P(X) \
995 || (X >= FIRST_PSEUDO_REGISTER \
997 && (unsigned) reg_renumber[X] < 32)))
998 #define REGNO_OK_FOR_FP_P(X) \
1000 || (X >= FIRST_PSEUDO_REGISTER \
1002 && FP_REGNO_P (reg_renumber[X])))
1004 /* Now macros that check whether X is a register and also,
1005 strictly, whether it is in a specified class.
1007 These macros are specific to the HP-PA, and may be used only
1008 in code for printing assembler insns and in conditions for
1009 define_optimization. */
1011 /* 1 if X is an fp register. */
1013 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1015 /* Maximum number of registers that can appear in a valid memory address. */
1017 #define MAX_REGS_PER_ADDRESS 2
1019 /* Non-TLS symbolic references. */
1020 #define PA_SYMBOL_REF_TLS_P(RTX) \
1021 (GET_CODE (RTX) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (RTX) != 0)
1023 /* Recognize any constant value that is a valid address except
1024 for symbolic addresses. We get better CSE by rejecting them
1025 here and allowing hppa_legitimize_address to break them up. We
1026 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1028 #define CONSTANT_ADDRESS_P(X) \
1029 ((GET_CODE (X) == LABEL_REF \
1030 || (GET_CODE (X) == SYMBOL_REF && !SYMBOL_REF_TLS_MODEL (X)) \
1031 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1032 || GET_CODE (X) == HIGH) \
1033 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1035 /* A C expression that is nonzero if we are using the new HP assembler. */
1037 #ifndef NEW_HP_ASSEMBLER
1038 #define NEW_HP_ASSEMBLER 0
1041 /* The macros below define the immediate range for CONST_INTS on
1042 the 64-bit port. Constants in this range can be loaded in three
1043 instructions using a ldil/ldo/depdi sequence. Constants outside
1044 this range are forced to the constant pool prior to reload. */
1046 #define MAX_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) 32 << 31)
1047 #define MIN_LEGIT_64BIT_CONST_INT ((HOST_WIDE_INT) -32 << 31)
1048 #define LEGITIMATE_64BIT_CONST_INT_P(X) \
1049 ((X) >= MIN_LEGIT_64BIT_CONST_INT && (X) < MAX_LEGIT_64BIT_CONST_INT)
1051 /* A C expression that is nonzero if X is a legitimate constant for an
1054 We include all constant integers and constant doubles, but not
1055 floating-point, except for floating-point zero. We reject LABEL_REFs
1056 if we're not using gas or the new HP assembler.
1058 In 64-bit mode, we reject CONST_DOUBLES. We also reject CONST_INTS
1059 that need more than three instructions to load prior to reload. This
1060 limit is somewhat arbitrary. It takes three instructions to load a
1061 CONST_INT from memory but two are memory accesses. It may be better
1062 to increase the allowed range for CONST_INTS. We may also be able
1063 to handle CONST_DOUBLES. */
1065 #define LEGITIMATE_CONSTANT_P(X) \
1066 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1067 || (X) == CONST0_RTX (GET_MODE (X))) \
1068 && (NEW_HP_ASSEMBLER \
1070 || GET_CODE (X) != LABEL_REF) \
1072 || GET_CODE (X) != CONST_DOUBLE) \
1074 || HOST_BITS_PER_WIDE_INT <= 32 \
1075 || GET_CODE (X) != CONST_INT \
1076 || reload_in_progress \
1077 || reload_completed \
1078 || LEGITIMATE_64BIT_CONST_INT_P (INTVAL (X)) \
1079 || cint_ok_for_move (INTVAL (X))) \
1080 && !function_label_operand (X, VOIDmode))
1082 /* Target flags set on a symbol_ref. */
1084 /* Set by ASM_OUTPUT_SYMBOL_REF when a symbol_ref is output. */
1085 #define SYMBOL_FLAG_REFERENCED (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
1086 #define SYMBOL_REF_REFERENCED_P(RTX) \
1087 ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_REFERENCED) != 0)
1089 /* Defines for constraints.md. */
1091 /* Return 1 iff OP is a scaled or unscaled index address. */
1092 #define IS_INDEX_ADDR_P(OP) \
1093 (GET_CODE (OP) == PLUS \
1094 && GET_MODE (OP) == Pmode \
1095 && (GET_CODE (XEXP (OP, 0)) == MULT \
1096 || GET_CODE (XEXP (OP, 1)) == MULT \
1097 || (REG_P (XEXP (OP, 0)) \
1098 && REG_P (XEXP (OP, 1)))))
1100 /* Return 1 iff OP is a LO_SUM DLT address. */
1101 #define IS_LO_SUM_DLT_ADDR_P(OP) \
1102 (GET_CODE (OP) == LO_SUM \
1103 && GET_MODE (OP) == Pmode \
1104 && REG_P (XEXP (OP, 0)) \
1105 && REG_OK_FOR_BASE_P (XEXP (OP, 0)) \
1106 && GET_CODE (XEXP (OP, 1)) == UNSPEC)
1108 /* Nonzero if 14-bit offsets can be used for all loads and stores.
1109 This is not possible when generating PA 1.x code as floating point
1110 loads and stores only support 5-bit offsets. Note that we do not
1111 forbid the use of 14-bit offsets in GO_IF_LEGITIMATE_ADDRESS.
1112 Instead, we use pa_secondary_reload() to reload integer mode
1113 REG+D memory addresses used in floating point loads and stores.
1115 FIXME: the ELF32 linker clobbers the LSB of the FP register number
1116 in PA 2.0 floating-point insns with long displacements. This is
1117 because R_PARISC_DPREL14WR and other relocations like it are not
1118 yet supported by GNU ld. For now, we reject long displacements
1121 #define INT14_OK_STRICT \
1122 (TARGET_SOFT_FLOAT \
1123 || TARGET_DISABLE_FPREGS \
1124 || (TARGET_PA_20 && !TARGET_ELF32))
1126 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1127 and check its validity for a certain class.
1128 We have two alternate definitions for each of them.
1129 The usual definition accepts all pseudo regs; the other rejects
1130 them unless they have been allocated suitable hard regs.
1131 The symbol REG_OK_STRICT causes the latter definition to be used.
1133 Most source files want to accept pseudo regs in the hope that
1134 they will get allocated to the class that the insn wants them to be in.
1135 Source files for reload pass need to be strict.
1136 After reload, it makes no difference, since pseudo regs have
1137 been eliminated by then. */
1139 #ifndef REG_OK_STRICT
1141 /* Nonzero if X is a hard reg that can be used as an index
1142 or if it is a pseudo reg. */
1143 #define REG_OK_FOR_INDEX_P(X) \
1144 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1146 /* Nonzero if X is a hard reg that can be used as a base reg
1147 or if it is a pseudo reg. */
1148 #define REG_OK_FOR_BASE_P(X) \
1149 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1153 /* Nonzero if X is a hard reg that can be used as an index. */
1154 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1156 /* Nonzero if X is a hard reg that can be used as a base reg. */
1157 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1161 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1162 valid memory address for an instruction. The MODE argument is the
1163 machine mode for the MEM expression that wants to use this address.
1165 On HP PA-RISC, the legitimate address forms are REG+SMALLINT,
1166 REG+REG, and REG+(REG*SCALE). The indexed address forms are only
1167 available with floating point loads and stores, and integer loads.
1168 We get better code by allowing indexed addresses in the initial
1171 The acceptance of indexed addresses as legitimate implies that we
1172 must provide patterns for doing indexed integer stores, or the move
1173 expanders must force the address of an indexed store to a register.
1174 We have adopted the latter approach.
1176 Another function of GO_IF_LEGITIMATE_ADDRESS is to ensure that
1177 the base register is a valid pointer for indexed instructions.
1178 On targets that have non-equivalent space registers, we have to
1179 know at the time of assembler output which register in a REG+REG
1180 pair is the base register. The REG_POINTER flag is sometimes lost
1181 in reload and the following passes, so it can't be relied on during
1182 code generation. Thus, we either have to canonicalize the order
1183 of the registers in REG+REG indexed addresses, or treat REG+REG
1184 addresses separately and provide patterns for both permutations.
1186 The latter approach requires several hundred additional lines of
1187 code in pa.md. The downside to canonicalizing is that a PLUS
1188 in the wrong order can't combine to form to make a scaled indexed
1189 memory operand. As we won't need to canonicalize the operands if
1190 the REG_POINTER lossage can be fixed, it seems better canonicalize.
1192 We initially break out scaled indexed addresses in canonical order
1193 in emit_move_sequence. LEGITIMIZE_ADDRESS also canonicalizes
1194 scaled indexed addresses during RTL generation. However, fold_rtx
1195 has its own opinion on how the operands of a PLUS should be ordered.
1196 If one of the operands is equivalent to a constant, it will make
1197 that operand the second operand. As the base register is likely to
1198 be equivalent to a SYMBOL_REF, we have made it the second operand.
1200 GO_IF_LEGITIMATE_ADDRESS accepts REG+REG as legitimate when the
1201 operands are in the order INDEX+BASE on targets with non-equivalent
1202 space registers, and in any order on targets with equivalent space
1203 registers. It accepts both MULT+BASE and BASE+MULT for scaled indexing.
1205 We treat a SYMBOL_REF as legitimate if it is part of the current
1206 function's constant-pool, because such addresses can actually be
1207 output as REG+SMALLINT. */
1209 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
1210 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1212 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
1213 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1215 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
1216 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1218 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
1219 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1221 #if HOST_BITS_PER_WIDE_INT > 32
1222 #define VAL_32_BITS_P(X) \
1223 ((unsigned HOST_WIDE_INT)(X) + ((unsigned HOST_WIDE_INT) 1 << 31) \
1224 < (unsigned HOST_WIDE_INT) 2 << 31)
1226 #define VAL_32_BITS_P(X) 1
1228 #define INT_32_BITS(X) VAL_32_BITS_P (INTVAL (X))
1230 /* These are the modes that we allow for scaled indexing. */
1231 #define MODE_OK_FOR_SCALED_INDEXING_P(MODE) \
1232 ((TARGET_64BIT && (MODE) == DImode) \
1233 || (MODE) == SImode \
1234 || (MODE) == HImode \
1235 || (MODE) == SFmode \
1236 || (MODE) == DFmode)
1238 /* These are the modes that we allow for unscaled indexing. */
1239 #define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
1240 ((TARGET_64BIT && (MODE) == DImode) \
1241 || (MODE) == SImode \
1242 || (MODE) == HImode \
1243 || (MODE) == QImode \
1244 || (MODE) == SFmode \
1245 || (MODE) == DFmode)
1247 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1249 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1250 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1251 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1252 && REG_P (XEXP (X, 0)) \
1253 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1255 else if (GET_CODE (X) == PLUS) \
1257 rtx base = 0, index = 0; \
1258 if (REG_P (XEXP (X, 1)) \
1259 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1260 base = XEXP (X, 1), index = XEXP (X, 0); \
1261 else if (REG_P (XEXP (X, 0)) \
1262 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1263 base = XEXP (X, 0), index = XEXP (X, 1); \
1265 && GET_CODE (index) == CONST_INT \
1266 && ((INT_14_BITS (index) \
1267 && (((MODE) != DImode \
1268 && (MODE) != SFmode \
1269 && (MODE) != DFmode) \
1270 /* The base register for DImode loads and stores \
1271 with long displacements must be aligned because \
1272 the lower three bits in the displacement are \
1273 assumed to be zero. */ \
1274 || ((MODE) == DImode \
1276 || (INTVAL (index) % 8) == 0)) \
1277 /* Similarly, the base register for SFmode/DFmode \
1278 loads and stores with long displacements must \
1280 || (((MODE) == SFmode || (MODE) == DFmode) \
1281 && INT14_OK_STRICT \
1282 && (INTVAL (index) % GET_MODE_SIZE (MODE)) == 0))) \
1283 || INT_5_BITS (index))) \
1285 if (!TARGET_DISABLE_INDEXING \
1286 /* Only accept the "canonical" INDEX+BASE operand order \
1287 on targets with non-equivalent space registers. */ \
1288 && (TARGET_NO_SPACE_REGS \
1289 ? (base && REG_P (index)) \
1290 : (base == XEXP (X, 1) && REG_P (index) \
1291 && (reload_completed \
1292 || (reload_in_progress && HARD_REGISTER_P (base)) \
1293 || REG_POINTER (base)) \
1294 && (reload_completed \
1295 || (reload_in_progress && HARD_REGISTER_P (index)) \
1296 || !REG_POINTER (index)))) \
1297 && MODE_OK_FOR_UNSCALED_INDEXING_P (MODE) \
1298 && REG_OK_FOR_INDEX_P (index) \
1299 && borx_reg_operand (base, Pmode) \
1300 && borx_reg_operand (index, Pmode)) \
1302 if (!TARGET_DISABLE_INDEXING \
1304 && GET_CODE (index) == MULT \
1305 && MODE_OK_FOR_SCALED_INDEXING_P (MODE) \
1306 && REG_P (XEXP (index, 0)) \
1307 && GET_MODE (XEXP (index, 0)) == Pmode \
1308 && REG_OK_FOR_INDEX_P (XEXP (index, 0)) \
1309 && GET_CODE (XEXP (index, 1)) == CONST_INT \
1310 && INTVAL (XEXP (index, 1)) \
1311 == (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
1312 && borx_reg_operand (base, Pmode)) \
1315 else if (GET_CODE (X) == LO_SUM \
1316 && GET_CODE (XEXP (X, 0)) == REG \
1317 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1318 && CONSTANT_P (XEXP (X, 1)) \
1319 && (TARGET_SOFT_FLOAT \
1320 /* We can allow symbolic LO_SUM addresses for PA2.0. */ \
1323 && GET_CODE (XEXP (X, 1)) != CONST_INT) \
1324 || ((MODE) != SFmode \
1325 && (MODE) != DFmode))) \
1327 else if (GET_CODE (X) == LO_SUM \
1328 && GET_CODE (XEXP (X, 0)) == SUBREG \
1329 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG \
1330 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0))) \
1331 && CONSTANT_P (XEXP (X, 1)) \
1332 && (TARGET_SOFT_FLOAT \
1333 /* We can allow symbolic LO_SUM addresses for PA2.0. */ \
1336 && GET_CODE (XEXP (X, 1)) != CONST_INT) \
1337 || ((MODE) != SFmode \
1338 && (MODE) != DFmode))) \
1340 else if (GET_CODE (X) == LABEL_REF \
1341 || (GET_CODE (X) == CONST_INT \
1342 && INT_5_BITS (X))) \
1344 /* Needed for -fPIC */ \
1345 else if (GET_CODE (X) == LO_SUM \
1346 && GET_CODE (XEXP (X, 0)) == REG \
1347 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1348 && GET_CODE (XEXP (X, 1)) == UNSPEC \
1349 && (TARGET_SOFT_FLOAT \
1350 || (TARGET_PA_20 && !TARGET_ELF32) \
1351 || ((MODE) != SFmode \
1352 && (MODE) != DFmode))) \
1356 /* Look for machine dependent ways to make the invalid address AD a
1359 For the PA, transform:
1361 memory(X + <large int>)
1365 if (<large int> & mask) >= 16
1366 Y = (<large int> & ~mask) + mask + 1 Round up.
1368 Y = (<large int> & ~mask) Round down.
1370 memory (Z + (<large int> - Y));
1372 This makes reload inheritance and reload_cse work better since Z
1375 There may be more opportunities to improve code with this hook. */
1376 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
1378 long offset, newoffset, mask; \
1379 rtx new, temp = NULL_RTX; \
1381 mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1382 ? (INT14_OK_STRICT ? 0x3fff : 0x1f) : 0x3fff); \
1384 if (optimize && GET_CODE (AD) == PLUS) \
1385 temp = simplify_binary_operation (PLUS, Pmode, \
1386 XEXP (AD, 0), XEXP (AD, 1)); \
1388 new = temp ? temp : AD; \
1391 && GET_CODE (new) == PLUS \
1392 && GET_CODE (XEXP (new, 0)) == REG \
1393 && GET_CODE (XEXP (new, 1)) == CONST_INT) \
1395 offset = INTVAL (XEXP ((new), 1)); \
1397 /* Choose rounding direction. Round up if we are >= halfway. */ \
1398 if ((offset & mask) >= ((mask + 1) / 2)) \
1399 newoffset = (offset & ~mask) + mask + 1; \
1401 newoffset = offset & ~mask; \
1403 /* Ensure that long displacements are aligned. */ \
1404 if (mask == 0x3fff \
1405 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1406 || (TARGET_64BIT && (MODE) == DImode))) \
1407 newoffset &= ~(GET_MODE_SIZE (MODE) - 1); \
1409 if (newoffset != 0 && VAL_14_BITS_P (newoffset)) \
1411 temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \
1412 GEN_INT (newoffset)); \
1413 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1414 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
1415 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
1425 /* Try machine-dependent ways of modifying an illegitimate address
1426 to be legitimate. If we find one, return the new, valid address.
1427 This macro is used in only one place: `memory_address' in explow.c.
1429 OLDX is the address as it was before break_out_memory_refs was called.
1430 In some cases it is useful to look at this to decide what needs to be done.
1432 MODE and WIN are passed so that this macro can use
1433 GO_IF_LEGITIMATE_ADDRESS.
1435 It is always safe for this macro to do nothing. It exists to recognize
1436 opportunities to optimize the output. */
1438 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1439 { rtx orig_x = (X); \
1440 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1441 if ((X) != orig_x && memory_address_p (MODE, X)) \
1444 /* Go to LABEL if ADDR (a legitimate address expression)
1445 has an effect that depends on the machine mode it is used for. */
1447 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1449 #define TARGET_ASM_SELECT_SECTION pa_select_section
1451 /* Return a nonzero value if DECL has a section attribute. */
1452 #define IN_NAMED_SECTION_P(DECL) \
1453 ((TREE_CODE (DECL) == FUNCTION_DECL || TREE_CODE (DECL) == VAR_DECL) \
1454 && DECL_SECTION_NAME (DECL) != NULL_TREE)
1456 /* Define this macro if references to a symbol must be treated
1457 differently depending on something about the variable or
1458 function named by the symbol (such as what section it is in).
1460 The macro definition, if any, is executed immediately after the
1461 rtl for DECL or other node is created.
1462 The value of the rtl will be a `mem' whose address is a
1465 The usual thing for this macro to do is to a flag in the
1466 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1467 name string in the `symbol_ref' (if one bit is not enough
1470 On the HP-PA we use this to indicate if a symbol is in text or
1471 data space. Also, function labels need special treatment. */
1473 #define TEXT_SPACE_P(DECL)\
1474 (TREE_CODE (DECL) == FUNCTION_DECL \
1475 || (TREE_CODE (DECL) == VAR_DECL \
1476 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1477 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1479 || CONSTANT_CLASS_P (DECL))
1481 #define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
1483 /* Specify the machine mode that this machine uses for the index in the
1484 tablejump instruction. For small tables, an element consists of a
1485 ia-relative branch and its delay slot. When -mbig-switch is specified,
1486 we use a 32-bit absolute address for non-pic code, and a 32-bit offset
1487 for both 32 and 64-bit pic code. */
1488 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? SImode : DImode)
1490 /* Jump tables must be 32-bit aligned, no matter the size of the element. */
1491 #define ADDR_VEC_ALIGN(ADDR_VEC) 2
1493 /* Define this as 1 if `char' should by default be signed; else as 0. */
1494 #define DEFAULT_SIGNED_CHAR 1
1496 /* Max number of bytes we can move from memory to memory
1497 in one reasonably fast instruction. */
1500 /* Higher than the default as we prefer to use simple move insns
1501 (better scheduling and delay slot filling) and because our
1502 built-in block move is really a 2X unrolled loop.
1504 Believe it or not, this has to be big enough to allow for copying all
1505 arguments passed in registers to avoid infinite recursion during argument
1506 setup for a function call. Why? Consider how we copy the stack slots
1507 reserved for parameters when they may be trashed by a call. */
1508 #define MOVE_RATIO (TARGET_64BIT ? 8 : 4)
1510 /* Define if operations between registers always perform the operation
1511 on the full register even if a narrower mode is specified. */
1512 #define WORD_REGISTER_OPERATIONS
1514 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1515 will either zero-extend or sign-extend. The value of this macro should
1516 be the code that says which one of the two operations is implicitly
1517 done, UNKNOWN if none. */
1518 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1520 /* Nonzero if access to memory by bytes is slow and undesirable. */
1521 #define SLOW_BYTE_ACCESS 1
1523 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1524 is done just by pretending it is already truncated. */
1525 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1527 /* Specify the machine mode that pointers have.
1528 After generation of rtl, the compiler makes no further distinction
1529 between pointers and any other objects of this machine mode. */
1530 #define Pmode word_mode
1532 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1533 return the mode to be used for the comparison. For floating-point, CCFPmode
1534 should be used. CC_NOOVmode should be used when the first operand is a
1535 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1537 #define SELECT_CC_MODE(OP,X,Y) \
1538 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1540 /* A function address in a call instruction
1541 is a byte address (for indexing purposes)
1542 so give the MEM rtx a byte's mode. */
1543 #define FUNCTION_MODE SImode
1545 /* Define this if addresses of constant functions
1546 shouldn't be put through pseudo regs where they can be cse'd.
1547 Desirable on machines where ordinary constants are expensive
1548 but a CALL with constant address is cheap. */
1549 #define NO_FUNCTION_CSE
1551 /* Define this to be nonzero if shift instructions ignore all but the low-order
1553 #define SHIFT_COUNT_TRUNCATED 1
1555 /* Compute extra cost of moving data between one register class
1558 Make moves from SAR so expensive they should never happen. We used to
1559 have 0xffff here, but that generates overflow in rare cases.
1561 Copies involving a FP register and a non-FP register are relatively
1562 expensive because they must go through memory.
1564 Other copies are reasonably cheap. */
1565 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1566 (CLASS1 == SHIFT_REGS ? 0x100 \
1567 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1568 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1571 /* Adjust the cost of branches. */
1572 #define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1)
1574 /* Handling the special cases is going to get too complicated for a macro,
1575 just call `pa_adjust_insn_length' to do the real work. */
1576 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1577 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1579 /* Millicode insns are actually function calls with some special
1580 constraints on arguments and register usage.
1582 Millicode calls always expect their arguments in the integer argument
1583 registers, and always return their result in %r29 (ret1). They
1584 are expected to clobber their arguments, %r1, %r29, and the return
1585 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
1587 This macro tells reorg that the references to arguments and
1588 millicode calls do not appear to happen until after the millicode call.
1589 This allows reorg to put insns which set the argument registers into the
1590 delay slot of the millicode call -- thus they act more like traditional
1593 Note we cannot consider side effects of the insn to be delayed because
1594 the branch and link insn will clobber the return pointer. If we happened
1595 to use the return pointer in the delay slot of the call, then we lose.
1597 get_attr_type will try to recognize the given insn, so make sure to
1598 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1600 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
1603 /* Control the assembler format that we output. */
1605 /* A C string constant describing how to begin a comment in the target
1606 assembler language. The compiler assumes that the comment will end at
1607 the end of the line. */
1609 #define ASM_COMMENT_START ";"
1611 /* Output to assembler file text saying following lines
1612 may contain character constants, extra white space, comments, etc. */
1614 #define ASM_APP_ON ""
1616 /* Output to assembler file text saying following lines
1617 no longer contain unusual constructs. */
1619 #define ASM_APP_OFF ""
1621 /* This is how to output the definition of a user-level label named NAME,
1622 such as the label on a static function or variable NAME. */
1624 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1626 assemble_name ((FILE), (NAME)); \
1628 fputs (":\n", (FILE)); \
1630 fputc ('\n', (FILE)); \
1633 /* This is how to output a reference to a user-level label named NAME.
1634 `assemble_name' uses this. */
1636 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1638 const char *xname = (NAME); \
1639 if (FUNCTION_NAME_P (NAME)) \
1641 if (xname[0] == '*') \
1644 fputs (user_label_prefix, FILE); \
1645 fputs (xname, FILE); \
1648 /* This how we output the symbol_ref X. */
1650 #define ASM_OUTPUT_SYMBOL_REF(FILE,X) \
1652 SYMBOL_REF_FLAGS (X) |= SYMBOL_FLAG_REFERENCED; \
1653 assemble_name (FILE, XSTR (X, 0)); \
1656 /* This is how to store into the string LABEL
1657 the symbol_ref name of an internal numbered label where
1658 PREFIX is the class of label and NUM is the number within the class.
1659 This is suitable for output with `assemble_name'. */
1661 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1662 sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
1664 /* Output the definition of a compiler-generated label named NAME. */
1666 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,NAME) \
1668 assemble_name_raw ((FILE), (NAME)); \
1670 fputs (":\n", (FILE)); \
1672 fputc ('\n', (FILE)); \
1675 #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
1677 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1678 output_ascii ((FILE), (P), (SIZE))
1680 /* Jump tables are always placed in the text section. Technically, it
1681 is possible to put them in the readonly data section when -mbig-switch
1682 is specified. This has the benefit of getting the table out of .text
1683 and reducing branch lengths as a result. The downside is that an
1684 additional insn (addil) is needed to access the table when generating
1685 PIC code. The address difference table also has to use 32-bit
1686 pc-relative relocations. Currently, GAS does not support these
1687 relocations, although it is easily modified to do this operation.
1688 The table entries need to look like "$L1+(.+8-$L0)-$PIC_pcrel$0"
1689 when using ELF GAS. A simple difference can be used when using
1690 SOM GAS or the HP assembler. The final downside is GDB complains
1691 about the nesting of the label for the table when debugging. */
1693 #define JUMP_TABLES_IN_TEXT_SECTION 1
1695 /* This is how to output an element of a case-vector that is absolute. */
1697 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1698 if (TARGET_BIG_SWITCH) \
1699 fprintf (FILE, "\t.word L$%04d\n", VALUE); \
1701 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1703 /* This is how to output an element of a case-vector that is relative.
1704 Since we always place jump tables in the text section, the difference
1705 is absolute and requires no relocation. */
1707 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1708 if (TARGET_BIG_SWITCH) \
1709 fprintf (FILE, "\t.word L$%04d-L$%04d\n", VALUE, REL); \
1711 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1713 /* This is how to output an assembler line that says to advance the
1714 location counter to a multiple of 2**LOG bytes. */
1716 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1717 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1719 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1720 fprintf (FILE, "\t.blockz "HOST_WIDE_INT_PRINT_UNSIGNED"\n", \
1721 (unsigned HOST_WIDE_INT)(SIZE))
1723 /* This says how to output an assembler line to define an uninitialized
1724 global variable with size SIZE (in bytes) and alignment ALIGN (in bits).
1725 This macro exists to properly support languages like C++ which do not
1726 have common data. */
1728 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
1729 pa_asm_output_aligned_bss (FILE, NAME, SIZE, ALIGN)
1731 /* This says how to output an assembler line to define a global common symbol
1732 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1734 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
1735 pa_asm_output_aligned_common (FILE, NAME, SIZE, ALIGN)
1737 /* This says how to output an assembler line to define a local common symbol
1738 with size SIZE (in bytes) and alignment ALIGN (in bits). This macro
1739 controls how the assembler definitions of uninitialized static variables
1742 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
1743 pa_asm_output_aligned_local (FILE, NAME, SIZE, ALIGN)
1745 /* All HP assemblers use "!" to separate logical lines. */
1746 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '!')
1748 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1749 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1751 /* Print operand X (an rtx) in assembler syntax to file FILE.
1752 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1753 For `%' followed by punctuation, CODE is the punctuation and X is null.
1755 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1756 and an immediate zero should be represented as `r0'.
1758 Several % codes are defined:
1760 C compare conditions
1761 N extract conditions
1762 M modifier to handle preincrement addressing for memory refs.
1763 F modifier to handle preincrement addressing for fp memory refs */
1765 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1768 /* Print a memory address as an operand to reference that memory location. */
1770 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1771 { rtx addr = ADDR; \
1772 switch (GET_CODE (addr)) \
1775 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
1778 gcc_assert (GET_CODE (XEXP (addr, 1)) == CONST_INT); \
1779 fprintf (FILE, "%d(%s)", (int)INTVAL (XEXP (addr, 1)), \
1780 reg_names [REGNO (XEXP (addr, 0))]); \
1783 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
1784 fputs ("R'", FILE); \
1785 else if (flag_pic == 0) \
1786 fputs ("RR'", FILE); \
1788 fputs ("RT'", FILE); \
1789 output_global_address (FILE, XEXP (addr, 1), 0); \
1790 fputs ("(", FILE); \
1791 output_operand (XEXP (addr, 0), 0); \
1792 fputs (")", FILE); \
1795 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC "(%%r0)", INTVAL (addr)); \
1798 output_addr_const (FILE, addr); \
1802 /* Find the return address associated with the frame given by
1804 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
1805 (return_addr_rtx (COUNT, FRAMEADDR))
1807 /* Used to mask out junk bits from the return address, such as
1808 processor state, interrupt status, condition codes and the like. */
1809 #define MASK_RETURN_ADDR \
1810 /* The privilege level is in the two low order bits, mask em out \
1811 of the return address. */ \
1814 /* The number of Pmode words for the setjmp buffer. */
1815 #define JMP_BUF_SIZE 50
1817 /* We need a libcall to canonicalize function pointers on TARGET_ELF32. */
1818 #define CANONICALIZE_FUNCPTR_FOR_COMPARE_LIBCALL \
1819 "__canonicalize_funcptr_for_compare"
1822 #undef TARGET_HAVE_TLS
1823 #define TARGET_HAVE_TLS true
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