1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
5 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
6 Software Science at the University of Utah.
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 enum cmp_type /* comparison type */
27 CMP_SI, /* compare integers */
28 CMP_SF, /* compare single precision floats */
29 CMP_DF, /* compare double precision floats */
30 CMP_MAX /* max comparison type */
33 /* For long call handling. */
34 extern unsigned int total_code_bytes;
36 /* Which processor to schedule for. */
47 /* For -mschedule= option. */
48 extern const char *pa_cpu_string;
49 extern enum processor_type pa_cpu;
51 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
53 /* Which architecture to generate code for. */
55 enum architecture_type
64 /* For -march= option. */
65 extern const char *pa_arch_string;
66 extern enum architecture_type pa_arch;
68 /* Print subsidiary information on the compiler version in use. */
70 #define TARGET_VERSION fputs (" (hppa)", stderr);
72 /* Run-time compilation parameters selecting different hardware subsets. */
74 extern int target_flags;
76 /* compile code for HP-PA 1.1 ("Snake") */
81 #define TARGET_PA_11 (target_flags & MASK_PA_11)
84 /* Disable all FP registers (they all become fixed). This may be necessary
85 for compiling kernels which perform lazy context switching of FP regs.
86 Note if you use this option and try to perform floating point operations
87 the compiler will abort! */
89 #define MASK_DISABLE_FPREGS 2
90 #define TARGET_DISABLE_FPREGS (target_flags & MASK_DISABLE_FPREGS)
92 /* Generate code which assumes that all space register are equivalent.
93 Triggers aggressive unscaled index addressing and faster
94 builtin_return_address. */
95 #define MASK_NO_SPACE_REGS 4
96 #define TARGET_NO_SPACE_REGS (target_flags & MASK_NO_SPACE_REGS)
98 /* Allow unconditional jumps in the delay slots of call instructions. */
99 #define MASK_JUMP_IN_DELAY 8
100 #define TARGET_JUMP_IN_DELAY (target_flags & MASK_JUMP_IN_DELAY)
102 /* Disable indexed addressing modes. */
103 #define MASK_DISABLE_INDEXING 32
104 #define TARGET_DISABLE_INDEXING (target_flags & MASK_DISABLE_INDEXING)
106 /* Emit code which follows the new portable runtime calling conventions
107 HP wants everyone to use for ELF objects. If at all possible you want
108 to avoid this since it's a performance loss for non-prototyped code.
110 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
111 long-call stubs which is quite expensive. */
112 #define MASK_PORTABLE_RUNTIME 64
113 #define TARGET_PORTABLE_RUNTIME (target_flags & MASK_PORTABLE_RUNTIME)
115 /* Emit directives only understood by GAS. This allows parameter
116 relocations to work for static functions. There is no way
117 to make them work the HP assembler at this time. */
119 #define TARGET_GAS (target_flags & MASK_GAS)
121 /* Emit code for processors which do not have an FPU. */
122 #define MASK_SOFT_FLOAT 256
123 #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
125 /* Use 3-insn load/store sequences for access to large data segments
126 in shared libraries on hpux10. */
127 #define MASK_LONG_LOAD_STORE 512
128 #define TARGET_LONG_LOAD_STORE (target_flags & MASK_LONG_LOAD_STORE)
130 /* Use a faster sequence for indirect calls. This assumes that calls
131 through function pointers will never cross a space boundary, and
132 that the executable is not dynamically linked. Such assumptions
133 are generally safe for building kernels and statically linked
134 executables. Code compiled with this option will fail miserably if
135 the executable is dynamically linked or uses nested functions! */
136 #define MASK_FAST_INDIRECT_CALLS 1024
137 #define TARGET_FAST_INDIRECT_CALLS (target_flags & MASK_FAST_INDIRECT_CALLS)
139 /* Generate code with big switch statements to avoid out of range branches
140 occurring within the switch table. */
141 #define MASK_BIG_SWITCH 2048
142 #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH)
145 /* Generate code for the HPPA 2.0 architecture. TARGET_PA_11 should also be
146 true when this is true. */
147 #define MASK_PA_20 4096
149 #define TARGET_PA_20 (target_flags & MASK_PA_20)
152 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */
154 #define TARGET_64BIT 0
157 /* Generate code for ELF32 ABI. */
159 #define TARGET_ELF32 0
162 /* Macro to define tables used to set the flags.
163 This is a list in braces of pairs in braces,
164 each pair being { "NAME", VALUE }
165 where VALUE is the bits to set or minus the bits to clear.
166 An empty string NAME is used to identify the default VALUE. */
168 #define TARGET_SWITCHES \
169 {{"snake", MASK_PA_11, "Generate PA1.1 code"}, \
170 {"nosnake", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"}, \
171 {"pa-risc-1-0", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"}, \
172 {"pa-risc-1-1", MASK_PA_11, "Generate PA1.1 code"}, \
173 {"pa-risc-2-0", MASK_PA_20, "Generate PA2.0 code. This option requires binutils 2.10 or later"}, \
174 {"disable-fpregs", MASK_DISABLE_FPREGS, "Disable FP regs"}, \
175 {"no-disable-fpregs", -MASK_DISABLE_FPREGS, "Do not disable FP regs"},\
176 {"no-space-regs", MASK_NO_SPACE_REGS, "Disable space regs"}, \
177 {"space-regs", -MASK_NO_SPACE_REGS, "Do not disable space regs"}, \
178 {"jump-in-delay", MASK_JUMP_IN_DELAY, "Put jumps in call delay slots"},\
179 {"no-jump-in-delay", -MASK_JUMP_IN_DELAY, "Do not put jumps in call delay slots"}, \
180 {"disable-indexing", MASK_DISABLE_INDEXING, "Disable indexed addressing"},\
181 {"no-disable-indexing", -MASK_DISABLE_INDEXING, "Do not disable indexed addressing"},\
182 {"portable-runtime", MASK_PORTABLE_RUNTIME, "Use portable calling conventions"}, \
183 {"no-portable-runtime", -MASK_PORTABLE_RUNTIME, "Do not use portable calling conventions"},\
184 {"gas", MASK_GAS, "Assume code will be assembled by GAS"}, \
185 {"no-gas", -MASK_GAS, "Do not assume code will be assembled by GAS"}, \
186 {"soft-float", MASK_SOFT_FLOAT, "Use software floating point"}, \
187 {"no-soft-float", -MASK_SOFT_FLOAT, "Do not use software floating point"}, \
188 {"long-load-store", MASK_LONG_LOAD_STORE, "Emit long load/store sequences"}, \
189 {"no-long-load-store", -MASK_LONG_LOAD_STORE, "Do not emit long load/store sequences"},\
190 {"fast-indirect-calls", MASK_FAST_INDIRECT_CALLS, "Generate fast indirect calls"},\
191 {"no-fast-indirect-calls", -MASK_FAST_INDIRECT_CALLS, "Do not generate fast indirect calls"},\
192 {"big-switch", MASK_BIG_SWITCH, "Generate code for huge switch statements"}, \
193 {"no-big-switch", -MASK_BIG_SWITCH, "Do not generate code for huge switch statements"}, \
194 {"linker-opt", 0, "Enable linker optimizations"}, \
195 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, NULL}}
197 #ifndef TARGET_DEFAULT
198 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY)
201 #ifndef TARGET_CPU_DEFAULT
202 #define TARGET_CPU_DEFAULT 0
205 #define TARGET_OPTIONS \
207 { "schedule=", &pa_cpu_string, "Specify CPU for scheduling purposes" },\
208 { "arch=", &pa_arch_string, "Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later." }\
211 /* Specify the dialect of assembler to use. New mnemonics is dialect one
212 and the old mnemonics are dialect zero. */
213 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
215 #define OVERRIDE_OPTIONS override_options ()
217 /* stabs-in-som is nearly identical to stabs-in-elf. To avoid useless
218 code duplication we simply include this file and override as needed. */
221 /* We do not have to be compatible with dbx, so we enable gdb extensions
223 #define DEFAULT_GDB_EXTENSIONS 1
225 /* This used to be zero (no max length), but big enums and such can
226 cause huge strings which killed gas.
228 We also have to avoid lossage in dbxout.c -- it does not compute the
229 string size accurately, so we are real conservative here. */
230 #undef DBX_CONTIN_LENGTH
231 #define DBX_CONTIN_LENGTH 3000
233 /* Only labels should ever begin in column zero. */
234 #define ASM_STABS_OP "\t.stabs\t"
235 #define ASM_STABN_OP "\t.stabn\t"
237 /* GDB always assumes the current function's frame begins at the value
238 of the stack pointer upon entry to the current function. Accessing
239 local variables and parameters passed on the stack is done using the
240 base of the frame + an offset provided by GCC.
242 For functions which have frame pointers this method works fine;
243 the (frame pointer) == (stack pointer at function entry) and GCC provides
244 an offset relative to the frame pointer.
246 This loses for functions without a frame pointer; GCC provides an offset
247 which is relative to the stack pointer after adjusting for the function's
248 frame size. GDB would prefer the offset to be relative to the value of
249 the stack pointer at the function's entry. Yuk! */
250 #define DEBUGGER_AUTO_OFFSET(X) \
251 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
252 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
254 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
255 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
256 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
258 #define CPP_PA10_SPEC ""
259 #define CPP_PA11_SPEC "-D_PA_RISC1_1 -D__hp9000s700"
260 #define CPP_PA20_SPEC "-D_PA_RISC2_0 -D__hp9000s800"
261 #define CPP_64BIT_SPEC "-D__LP64__ -D__LONG_MAX__=9223372036854775807L"
263 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11) == 0
264 #define CPP_CPU_DEFAULT_SPEC "%(cpp_pa10)"
267 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11) != 0
268 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_20) != 0
269 #define CPP_CPU_DEFAULT_SPEC "%(cpp_pa11) %(cpp_pa20)"
271 #define CPP_CPU_DEFAULT_SPEC "%(cpp_pa11)"
276 #define CPP_64BIT_DEFAULT_SPEC "%(cpp_64bit)"
278 #define CPP_64BIT_DEFAULT_SPEC ""
281 /* This macro defines names of additional specifications to put in the
282 specs that can be used in various specifications like CC1_SPEC. Its
283 definition is an initializer with a subgrouping for each command option.
285 Each subgrouping contains a string constant, that defines the
286 specification name, and a string constant that used by the GNU CC driver
289 Do not define this macro if it does not need to do anything. */
291 #ifndef SUBTARGET_EXTRA_SPECS
292 #define SUBTARGET_EXTRA_SPECS
295 #define EXTRA_SPECS \
296 { "cpp_pa10", CPP_PA10_SPEC}, \
297 { "cpp_pa11", CPP_PA11_SPEC}, \
298 { "cpp_pa20", CPP_PA20_SPEC}, \
299 { "cpp_64bit", CPP_64BIT_SPEC}, \
300 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
301 { "cpp_64bit_default", CPP_64BIT_DEFAULT_SPEC }, \
302 SUBTARGET_EXTRA_SPECS
305 %{mpa-risc-1-0:%(cpp_pa10)} \
306 %{mpa-risc-1-1:%(cpp_pa11)} \
307 %{msnake:%(cpp_pa11)} \
308 %{mpa-risc-2-0:%(cpp_pa20)} \
309 %{!mpa-risc-1-0:%{!mpa-risc-1-1:%{!mpa-risc-2-0:%{!msnake:%(cpp_cpu_default)}}}} \
310 %{m64bit:%(cpp_64bit)} \
311 %{!m64bit:%(cpp_64bit_default)} \
312 %{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE -D__STDC_EXT__ -D_INCLUDE_LONGLONG} \
313 %{threads: -D_REENTRANT -D_DCE_THREADS}"
315 #define CPLUSPLUS_CPP_SPEC "\
316 -D_HPUX_SOURCE -D_HIUX_SOURCE -D__STDC_EXT__ -D_INCLUDE_LONGLONG \
317 %{mpa-risc-1-0:%(cpp_pa10)} \
318 %{mpa-risc-1-1:%(cpp_pa11)} \
319 %{msnake:%(cpp_pa11)} \
320 %{mpa-risc-2-0:%(cpp_pa20)} \
321 %{!mpa-risc-1-0:%{!mpa-risc-1-1:%{!mpa-risc-2-0:%{!msnake:%(cpp_cpu_default)}}}} \
322 %{m64bit:%(cpp_64bit)} \
323 %{!m64bit:%(cpp_64bit_default)} \
324 %{threads: -D_REENTRANT -D_DCE_THREADS}"
326 /* Defines for a K&R CC */
328 #define CC1_SPEC "%{pg:} %{p:}"
330 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
332 /* We don't want -lg. */
334 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
337 /* This macro defines command-line switches that modify the default
340 The definition is be an initializer for an array of structures. Each
341 array element has have three elements: the switch name, one of the
342 enumeration codes ADD or DELETE to indicate whether the string should be
343 inserted or deleted, and the string to be inserted or deleted. */
344 #define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
346 /* Make gcc agree with <machine/ansi.h> */
348 #define SIZE_TYPE "unsigned int"
349 #define PTRDIFF_TYPE "int"
350 #define WCHAR_TYPE "unsigned int"
351 #define WCHAR_TYPE_SIZE 32
353 /* Show we can debug even without a frame pointer. */
354 #define CAN_DEBUG_WITHOUT_FP
356 /* Machine dependent reorg pass. */
357 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
359 /* Names to predefine in the preprocessor for this target machine. */
361 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem=unix -Asystem=bsd -Acpu=hppa -Amachine=hppa"
363 /* target machine storage layout */
365 /* Define this macro if it is advisable to hold scalars in registers
366 in a wider mode than that declared by the program. In such cases,
367 the value is constrained to be within the bounds of the declared
368 type, but kept valid in the wider mode. The signedness of the
369 extension may differ from that of the type. */
371 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
372 if (GET_MODE_CLASS (MODE) == MODE_INT \
373 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
376 /* Define this if most significant bit is lowest numbered
377 in instructions that operate on numbered bit-fields. */
378 #define BITS_BIG_ENDIAN 1
380 /* Define this if most significant byte of a word is the lowest numbered. */
381 /* That is true on the HP-PA. */
382 #define BYTES_BIG_ENDIAN 1
384 /* Define this if most significant word of a multiword number is lowest
386 #define WORDS_BIG_ENDIAN 1
388 #define MAX_BITS_PER_WORD 64
389 #define MAX_LONG_TYPE_SIZE 32
390 #define MAX_WCHAR_TYPE_SIZE 32
392 /* Width of a word, in units (bytes). */
393 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
394 #define MIN_UNITS_PER_WORD 4
396 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
397 #define PARM_BOUNDARY BITS_PER_WORD
399 /* Largest alignment required for any stack parameter, in bits.
400 Don't define this if it is equal to PARM_BOUNDARY */
401 #define MAX_PARM_BOUNDARY 64
403 /* Boundary (in *bits*) on which stack pointer is always aligned;
404 certain optimizations in combine depend on this.
406 GCC for the PA always rounds its stacks to a 512bit boundary,
407 but that happens late in the compilation process. */
408 #define STACK_BOUNDARY (TARGET_64BIT ? 128 : 64)
410 #define PREFERRED_STACK_BOUNDARY 512
412 /* Allocation boundary (in *bits*) for the code of a function. */
413 #define FUNCTION_BOUNDARY (TARGET_64BIT ? 64 : 32)
415 /* Alignment of field after `int : 0' in a structure. */
416 #define EMPTY_FIELD_BOUNDARY 32
418 /* Every structure's size must be a multiple of this. */
419 #define STRUCTURE_SIZE_BOUNDARY 8
421 /* A bitfield declared as `int' forces `int' alignment for the struct. */
422 #define PCC_BITFIELD_TYPE_MATTERS 1
424 /* No data type wants to be aligned rounder than this. This is set
425 to 128 bits to allow for lock semaphores in the stack frame.*/
426 #define BIGGEST_ALIGNMENT 128
428 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
429 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
430 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
432 /* Make arrays of chars word-aligned for the same reasons. */
433 #define DATA_ALIGNMENT(TYPE, ALIGN) \
434 (TREE_CODE (TYPE) == ARRAY_TYPE \
435 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
436 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
439 /* Set this nonzero if move instructions will actually fail to work
440 when given unaligned data. */
441 #define STRICT_ALIGNMENT 1
443 /* Generate calls to memcpy, memcmp and memset. */
444 #define TARGET_MEM_FUNCTIONS
446 /* Value is 1 if it is a good idea to tie two pseudo registers
447 when one has mode MODE1 and one has mode MODE2.
448 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
449 for any hard reg, then this must be 0 for correct output. */
450 #define MODES_TIEABLE_P(MODE1, MODE2) \
451 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
453 /* Specify the registers used for certain standard purposes.
454 The values of these macros are register numbers. */
456 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
457 /* #define PC_REGNUM */
459 /* Register to use for pushing function arguments. */
460 #define STACK_POINTER_REGNUM 30
462 /* Base register for access to local variables of the function. */
463 #define FRAME_POINTER_REGNUM 3
465 /* Value should be nonzero if functions must have frame pointers. */
466 #define FRAME_POINTER_REQUIRED \
467 (current_function_calls_alloca)
469 /* C statement to store the difference between the frame pointer
470 and the stack pointer values immediately after the function prologue.
472 Note, we always pretend that this is a leaf function because if
473 it's not, there's no point in trying to eliminate the
474 frame pointer. If it is a leaf function, we guessed right! */
475 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
476 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
478 /* Base register for access to arguments of the function. */
479 #define ARG_POINTER_REGNUM 3
481 /* Register in which static-chain is passed to a function. */
482 #define STATIC_CHAIN_REGNUM 29
484 /* Register which holds offset table for position-independent
487 #define PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? 27 : 19)
488 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
490 /* Function to return the rtx used to save the pic offset table register
491 across function calls. */
492 extern struct rtx_def *hppa_pic_save_rtx PARAMS ((void));
494 #define DEFAULT_PCC_STRUCT_RETURN 0
496 /* SOM ABI says that objects larger than 64 bits are returned in memory.
497 PA64 ABI says that objects larger than 128 bits are returned in memory.
498 Note, int_size_in_bytes can return -1 if the size of the object is
499 variable or larger than the maximum value that can be expressed as
501 #define RETURN_IN_MEMORY(TYPE) \
502 ((unsigned HOST_WIDE_INT) int_size_in_bytes (TYPE) > (TARGET_64BIT ? 16 : 8))
504 /* Register in which address to store a structure value
505 is passed to a function. */
506 #define STRUCT_VALUE_REGNUM 28
508 /* Describe how we implement __builtin_eh_return. */
509 /* FIXME: What's a good choice for the EH data registers on TARGET_64BIT? */
510 #define EH_RETURN_DATA_REGNO(N) \
512 ? ((N) < 4 ? (N) + 4 : INVALID_REGNUM) \
513 : ((N) < 3 ? (N) + 20 : (N) == 4 ? 31 : INVALID_REGNUM))
514 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
515 #define EH_RETURN_HANDLER_RTX \
516 gen_rtx_MEM (word_mode, \
517 gen_rtx_PLUS (word_mode, frame_pointer_rtx, \
518 TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20)))
521 /* Offset from the argument pointer register value to the top of
522 stack. This is different from FIRST_PARM_OFFSET because of the
524 #define ARG_POINTER_CFA_OFFSET(FNDECL) 0
526 /* The letters I, J, K, L and M in a register constraint string
527 can be used to stand for particular ranges of immediate operands.
528 This macro defines what the ranges are.
529 C is the letter, and VALUE is a constant value.
530 Return 1 if VALUE is in the range specified by C.
532 `I' is used for the 11 bit constants.
533 `J' is used for the 14 bit constants.
534 `K' is used for values that can be moved with a zdepi insn.
535 `L' is used for the 5 bit constants.
537 `N' is used for values with the least significant 11 bits equal to zero
538 and when sign extended from 32 to 64 bits the
539 value does not change.
540 `O' is used for numbers n such that n+1 is a power of 2.
543 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
544 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
545 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
546 : (C) == 'K' ? zdepi_cint_p (VALUE) \
547 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
548 : (C) == 'M' ? (VALUE) == 0 \
549 : (C) == 'N' ? (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) == 0 \
550 || (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \
551 == (HOST_WIDE_INT) -1 << 31)) \
552 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
553 : (C) == 'P' ? and_mask_p (VALUE) \
556 /* Similar, but for floating or large integer constants, and defining letters
557 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
559 For PA, `G' is the floating-point constant zero. `H' is undefined. */
561 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
562 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
563 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
566 /* The class value for index registers, and the one for base regs. */
567 #define INDEX_REG_CLASS GENERAL_REGS
568 #define BASE_REG_CLASS GENERAL_REGS
570 #define FP_REG_CLASS_P(CLASS) \
571 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
573 /* True if register is floating-point. */
574 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
576 /* Given an rtx X being reloaded into a reg required to be
577 in class CLASS, return the class of reg to actually use.
578 In general this is just CLASS; but on some machines
579 in some cases it is preferable to use a more restrictive class. */
580 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
582 /* Return the register class of a scratch register needed to copy IN into
583 or out of a register in CLASS in MODE. If it can be done directly
586 Avoid doing any work for the common case calls. */
588 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
589 ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
590 && REGNO (IN) < FIRST_PSEUDO_REGISTER) \
591 ? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
593 /* On the PA it is not possible to directly move data between
594 GENERAL_REGS and FP_REGS. */
595 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
596 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
598 /* Return the stack location to use for secondary memory needed reloads. */
599 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
600 gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16)))
603 /* Stack layout; function entry, exit and calling. */
605 /* Define this if pushing a word on the stack
606 makes the stack pointer a smaller address. */
607 /* #define STACK_GROWS_DOWNWARD */
609 /* Believe it or not. */
610 #define ARGS_GROW_DOWNWARD
612 /* Define this if the nominal address of the stack frame
613 is at the high-address end of the local variables;
614 that is, each additional local variable allocated
615 goes at a more negative offset in the frame. */
616 /* #define FRAME_GROWS_DOWNWARD */
618 /* Offset within stack frame to start allocating local variables at.
619 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
620 first local allocated. Otherwise, it is the offset to the BEGINNING
621 of the first local allocated. */
622 #define STARTING_FRAME_OFFSET 8
624 /* If we generate an insn to push BYTES bytes,
625 this says how many the stack pointer really advances by.
626 On the HP-PA, don't define this because there are no push insns. */
627 /* #define PUSH_ROUNDING(BYTES) */
629 /* Offset of first parameter from the argument pointer register value.
630 This value will be negated because the arguments grow down.
631 Also note that on STACK_GROWS_UPWARD machines (such as this one)
632 this is the distance from the frame pointer to the end of the first
633 argument, not it's beginning. To get the real offset of the first
634 argument, the size of the argument must be added. */
636 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
638 /* When a parameter is passed in a register, stack space is still
640 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
642 /* Define this if the above stack space is to be considered part of the
643 space allocated by the caller. */
644 #define OUTGOING_REG_PARM_STACK_SPACE
646 /* Keep the stack pointer constant throughout the function.
647 This is both an optimization and a necessity: longjmp
648 doesn't behave itself when the stack pointer moves within
650 #define ACCUMULATE_OUTGOING_ARGS 1
652 /* The weird HPPA calling conventions require a minimum of 48 bytes on
653 the stack: 16 bytes for register saves, and 32 bytes for magic.
654 This is the difference between the logical top of stack and the
656 #define STACK_POINTER_OFFSET \
657 (TARGET_64BIT ? -(current_function_outgoing_args_size + 16): -32)
659 #define STACK_DYNAMIC_OFFSET(FNDECL) \
661 ? (STACK_POINTER_OFFSET) \
662 : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size))
664 /* Value is 1 if returning from a function call automatically
665 pops the arguments described by the number-of-args field in the call.
666 FUNDECL is the declaration node of the function (as a tree),
667 FUNTYPE is the data type of the function (as a tree),
668 or for a library call it is an identifier node for the subroutine name. */
670 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
672 /* Define how to find the value returned by a function.
673 VALTYPE is the data type of the value (as a tree).
674 If the precise function being called is known, FUNC is its FUNCTION_DECL;
675 otherwise, FUNC is 0. */
677 /* On the HP-PA the value is found in register(s) 28(-29), unless
678 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
680 /* This must perform the same promotions as PROMOTE_MODE, else
681 PROMOTE_FUNCTION_RETURN will not work correctly. */
682 #define FUNCTION_VALUE(VALTYPE, FUNC) \
683 gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \
684 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
685 || POINTER_TYPE_P (VALTYPE)) \
686 ? word_mode : TYPE_MODE (VALTYPE), \
687 TREE_CODE (VALTYPE) == REAL_TYPE && !TARGET_SOFT_FLOAT ? 32 : 28)
689 /* Define how to find the value returned by a library function
690 assuming the value has mode MODE. */
692 #define LIBCALL_VALUE(MODE) \
694 (! TARGET_SOFT_FLOAT \
695 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
697 /* 1 if N is a possible register number for a function value
698 as seen by the caller. */
700 #define FUNCTION_VALUE_REGNO_P(N) \
701 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
704 /* Define a data type for recording info about an argument list
705 during the scan of that argument list. This data type should
706 hold all necessary information about the function itself
707 and about the args processed so far, enough to enable macros
708 such as FUNCTION_ARG to determine where the next arg should go.
710 On the HP-PA, this is a single integer, which is a number of words
711 of arguments scanned so far (including the invisible argument,
712 if any, which holds the structure-value-address).
713 Thus 4 or more means all following args should go on the stack. */
715 struct hppa_args {int words, nargs_prototype, indirect; };
717 #define CUMULATIVE_ARGS struct hppa_args
719 /* Initialize a variable CUM of type CUMULATIVE_ARGS
720 for a call to a function whose data type is FNTYPE.
721 For a library call, FNTYPE is 0. */
723 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
725 (CUM).indirect = INDIRECT, \
726 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
727 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
728 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
729 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
734 /* Similar, but when scanning the definition of a procedure. We always
735 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
737 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
739 (CUM).indirect = 0, \
740 (CUM).nargs_prototype = 1000
742 /* Figure out the size in words of the function argument. */
744 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
745 ((((MODE) != BLKmode \
746 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
747 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
749 /* Update the data in CUM to advance over an argument
750 of mode MODE and data type TYPE.
751 (TYPE is null for libcalls where that information may not be available.) */
753 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
754 { (CUM).nargs_prototype--; \
755 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
756 + (((CUM).words & 01) && (TYPE) != 0 \
757 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
760 /* Determine where to put an argument to a function.
761 Value is zero to push the argument on the stack,
762 or a hard register in which to store the argument.
764 MODE is the argument's machine mode.
765 TYPE is the data type of the argument (as a tree).
766 This is null for libcalls where that information may
768 CUM is a variable of type CUMULATIVE_ARGS which gives info about
769 the preceding args and about the function being called.
770 NAMED is nonzero if this argument is a named parameter
771 (otherwise it is an extra parameter matching an ellipsis).
773 On the HP-PA the first four words of args are normally in registers
774 and the rest are pushed. But any arg that won't entirely fit in regs
777 Arguments passed in registers are either 1 or 2 words long.
779 The caller must make a distinction between calls to explicitly named
780 functions and calls through pointers to functions -- the conventions
781 are different! Calls through pointers to functions only use general
782 registers for the first four argument words.
784 Of course all this is different for the portable runtime model
785 HP wants everyone to use for ELF. Ugh. Here's a quick description
786 of how it's supposed to work.
788 1) callee side remains unchanged. It expects integer args to be
789 in the integer registers, float args in the float registers and
790 unnamed args in integer registers.
792 2) caller side now depends on if the function being called has
793 a prototype in scope (rather than if it's being called indirectly).
795 2a) If there is a prototype in scope, then arguments are passed
796 according to their type (ints in integer registers, floats in float
797 registers, unnamed args in integer registers.
799 2b) If there is no prototype in scope, then floating point arguments
800 are passed in both integer and float registers. egad.
802 FYI: The portable parameter passing conventions are almost exactly like
803 the standard parameter passing conventions on the RS6000. That's why
804 you'll see lots of similar code in rs6000.h. */
806 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
808 /* Do not expect to understand this without reading it several times. I'm
809 tempted to try and simply it, but I worry about breaking something. */
811 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
812 function_arg (&CUM, MODE, TYPE, NAMED, 0)
814 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
815 function_arg (&CUM, MODE, TYPE, NAMED, 1)
817 /* For an arg passed partly in registers and partly in memory,
818 this is the number of registers used.
819 For args passed entirely in registers or entirely in memory, zero. */
821 /* For PA32 there are never split arguments. PA64, on the other hand, can
822 pass arguments partially in registers and partially in memory. */
823 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
824 (TARGET_64BIT ? function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) : 0)
826 /* If defined, a C expression that gives the alignment boundary, in
827 bits, of an argument with the specified mode and type. If it is
828 not defined, `PARM_BOUNDARY' is used for all arguments. */
830 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
832 ? ((integer_zerop (TYPE_SIZE (TYPE)) \
833 || ! TREE_CONSTANT (TYPE_SIZE (TYPE))) \
835 : (((int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) \
836 / UNITS_PER_WORD) * BITS_PER_WORD) \
837 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
838 ? PARM_BOUNDARY : GET_MODE_ALIGNMENT(MODE)))
840 /* Arguments larger than eight bytes are passed by invisible reference */
842 /* PA64 does not pass anything by invisible reference. */
843 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
846 : (((TYPE) && int_size_in_bytes (TYPE) > 8) \
847 || ((MODE) && GET_MODE_SIZE (MODE) > 8)))
849 /* PA64 does not pass anything by invisible reference.
850 This should be undef'ed for 64bit, but we'll see if this works. The
851 problem is that we can't test TARGET_64BIT from the preprocessor. */
852 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
855 : (((TYPE) && int_size_in_bytes (TYPE) > 8) \
856 || ((MODE) && GET_MODE_SIZE (MODE) > 8)))
859 extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
860 extern enum cmp_type hppa_branch_type;
862 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
863 { const char *target_name = XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0); \
864 STRIP_NAME_ENCODING (target_name, target_name); \
865 pa_output_function_prologue (FILE, 0); \
866 if (VAL_14_BITS_P (DELTA)) \
868 fprintf (FILE, "\tb %s\n\tldo ", target_name); \
869 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, DELTA); \
870 fprintf (FILE, "(%%r26),%%r26\n"); \
874 fprintf (FILE, "\taddil L%%"); \
875 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, DELTA); \
876 fprintf (FILE, ",%%r26\n\tb %s\n\tldo R%%", target_name); \
877 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, DELTA); \
878 fprintf (FILE, "(%%r1),%%r26\n"); \
880 fprintf (FILE, "\n\t.EXIT\n\t.PROCEND\n"); \
883 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
884 as assembly via FUNCTION_PROFILER. */
886 #define FUNCTION_PROFILER(FILE, LABEL) /* nothing */
888 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
889 void hppa_profile_hook PARAMS ((int label_no));
891 /* The profile counter if emitted must come before the prologue. */
892 #define PROFILE_BEFORE_PROLOGUE 1
894 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
895 the stack pointer does not matter. The value is tested only in
896 functions that have frame pointers.
897 No definition is equivalent to always zero. */
899 extern int may_call_alloca;
901 #define EXIT_IGNORE_STACK \
902 (get_frame_size () != 0 \
903 || current_function_calls_alloca || current_function_outgoing_args_size)
905 /* Output assembler code for a block containing the constant parts
906 of a trampoline, leaving space for the variable parts.\
908 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
909 and then branches to the specified routine.
911 This code template is copied from text segment to stack location
912 and then patched with INITIALIZE_TRAMPOLINE to contain
913 valid values, and then entered as a subroutine.
915 It is best to keep this as small as possible to avoid having to
916 flush multiple lines in the cache. */
918 #define TRAMPOLINE_TEMPLATE(FILE) \
920 if (! TARGET_64BIT) \
922 fputs ("\tldw 36(%r22),%r21\n", FILE); \
923 fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
924 if (ASSEMBLER_DIALECT == 0) \
925 fputs ("\tdepi 0,31,2,%r21\n", FILE); \
927 fputs ("\tdepwi 0,31,2,%r21\n", FILE); \
928 fputs ("\tldw 4(%r21),%r19\n", FILE); \
929 fputs ("\tldw 0(%r21),%r21\n", FILE); \
930 fputs ("\tldsid (%r21),%r1\n", FILE); \
931 fputs ("\tmtsp %r1,%sr0\n", FILE); \
932 fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
933 fputs ("\tldw 40(%r22),%r29\n", FILE); \
934 fputs ("\t.word 0\n", FILE); \
935 fputs ("\t.word 0\n", FILE); \
936 fputs ("\t.word 0\n", FILE); \
937 fputs ("\t.word 0\n", FILE); \
941 fputs ("\t.dword 0\n", FILE); \
942 fputs ("\t.dword 0\n", FILE); \
943 fputs ("\t.dword 0\n", FILE); \
944 fputs ("\t.dword 0\n", FILE); \
945 fputs ("\tmfia %r31\n", FILE); \
946 fputs ("\tldd 24(%r31),%r1\n", FILE); \
947 fputs ("\tldd 24(%r1),%r27\n", FILE); \
948 fputs ("\tldd 16(%r1),%r1\n", FILE); \
949 fputs ("\tbve (%r1)\n", FILE); \
950 fputs ("\tldd 32(%r31),%r31\n", FILE); \
951 fputs ("\t.dword 0 ; fptr\n", FILE); \
952 fputs ("\t.dword 0 ; static link\n", FILE); \
956 /* Length in units of the trampoline for entering a nested function.
958 Flush the cache entries corresponding to the first and last addresses
959 of the trampoline. This is necessary as the trampoline may cross two
962 If the code part of the trampoline ever grows to > 32 bytes, then it
963 will become necessary to hack on the cacheflush pattern in pa.md. */
965 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
967 /* Emit RTL insns to initialize the variable parts of a trampoline.
968 FNADDR is an RTX for the address of the function's pure code.
969 CXT is an RTX for the static chain value for the function.
971 Move the function address to the trampoline template at offset 36.
972 Move the static chain value to trampoline template at offset 40.
973 Move the trampoline address to trampoline template at offset 44.
974 Move r19 to trampoline template at offset 48. The latter two
975 words create a plabel for the indirect call to the trampoline. */
977 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
979 if (! TARGET_64BIT) \
981 rtx start_addr, end_addr; \
983 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
984 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
985 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
986 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
987 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 44)); \
988 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (TRAMP)); \
989 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 48)); \
990 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), \
991 gen_rtx_REG (Pmode, 19)); \
992 /* fdc and fic only use registers for the address to flush, \
993 they do not accept integer displacements. */ \
994 start_addr = force_reg (Pmode, (TRAMP)); \
995 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
996 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
997 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
998 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
999 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1003 rtx start_addr, end_addr; \
1005 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 56)); \
1006 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
1007 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 64)); \
1008 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
1009 /* Create a fat pointer for the trampoline. */ \
1010 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1011 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
1012 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1013 end_addr = gen_rtx_REG (Pmode, 27); \
1014 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
1015 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1016 /* fdc and fic only use registers for the address to flush, \
1017 they do not accept integer displacements. */ \
1018 start_addr = force_reg (Pmode, (TRAMP)); \
1019 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1020 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1021 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
1022 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1023 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1027 /* Perform any machine-specific adjustment in the address of the trampoline.
1028 ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE.
1029 Adjust the trampoline address to point to the plabel at offset 44. */
1031 #define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
1032 if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
1034 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1035 reference the 4 integer arg registers and 4 fp arg registers.
1036 Ordinarily they are not call used registers, but they are for
1037 _builtin_saveregs, so we must make this explicit. */
1039 #define EXPAND_BUILTIN_SAVEREGS() hppa_builtin_saveregs ()
1041 /* Implement `va_start' for varargs and stdarg. */
1043 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
1044 hppa_va_start (stdarg, valist, nextarg)
1046 /* Implement `va_arg'. */
1048 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1049 hppa_va_arg (valist, type)
1051 /* Addressing modes, and classification of registers for them.
1053 Using autoincrement addressing modes on PA8000 class machines is
1056 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
1057 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
1059 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
1060 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
1062 /* Macros to check register numbers against specific register classes. */
1064 /* These assume that REGNO is a hard or pseudo reg number.
1065 They give nonzero only if REGNO is a hard reg of the suitable class
1066 or a pseudo reg currently allocated to a suitable hard reg.
1067 Since they use reg_renumber, they are safe only once reg_renumber
1068 has been allocated, which happens in local-alloc.c. */
1070 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1071 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1072 #define REGNO_OK_FOR_BASE_P(REGNO) \
1073 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1074 #define REGNO_OK_FOR_FP_P(REGNO) \
1075 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1077 /* Now macros that check whether X is a register and also,
1078 strictly, whether it is in a specified class.
1080 These macros are specific to the HP-PA, and may be used only
1081 in code for printing assembler insns and in conditions for
1082 define_optimization. */
1084 /* 1 if X is an fp register. */
1086 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1088 /* Maximum number of registers that can appear in a valid memory address. */
1090 #define MAX_REGS_PER_ADDRESS 2
1092 /* Recognize any constant value that is a valid address except
1093 for symbolic addresses. We get better CSE by rejecting them
1094 here and allowing hppa_legitimize_address to break them up. We
1095 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1097 #define CONSTANT_ADDRESS_P(X) \
1098 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1099 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1100 || GET_CODE (X) == HIGH) \
1101 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1103 /* Include all constant integers and constant doubles, but not
1104 floating-point, except for floating-point zero.
1106 Reject LABEL_REFs if we're not using gas or the new HP assembler.
1108 ?!? For now also reject CONST_DOUBLES in 64bit mode. This will need
1110 #ifndef NEW_HP_ASSEMBLER
1111 #define NEW_HP_ASSEMBLER 0
1113 #define LEGITIMATE_CONSTANT_P(X) \
1114 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1115 || (X) == CONST0_RTX (GET_MODE (X))) \
1116 && (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF) \
1117 && !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE) \
1118 && !(TARGET_64BIT && GET_CODE (X) == CONST_INT \
1119 && !(HOST_BITS_PER_WIDE_INT <= 32 \
1120 || (INTVAL (X) >= (HOST_WIDE_INT) -32 << 31 \
1121 && INTVAL (X) < (HOST_WIDE_INT) 32 << 31) \
1122 || cint_ok_for_move (INTVAL (X)))) \
1123 && !function_label_operand (X, VOIDmode))
1125 /* Subroutine for EXTRA_CONSTRAINT.
1127 Return 1 iff OP is a pseudo which did not get a hard register and
1128 we are running the reload pass. */
1130 #define IS_RELOADING_PSEUDO_P(OP) \
1131 ((reload_in_progress \
1132 && GET_CODE (OP) == REG \
1133 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1134 && reg_renumber [REGNO (OP)] < 0))
1136 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1138 For the HPPA, `Q' means that this is a memory operand but not a
1139 symbolic memory operand. Note that an unassigned pseudo register
1140 is such a memory operand. Needed because reload will generate
1141 these things in insns and then not re-recognize the insns, causing
1142 constrain_operands to fail.
1144 `R' is used for scaled indexed addresses.
1146 `S' is the constant 31.
1148 `T' is for fp loads and stores. */
1149 #define EXTRA_CONSTRAINT(OP, C) \
1151 (IS_RELOADING_PSEUDO_P (OP) \
1152 || (GET_CODE (OP) == MEM \
1153 && (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1154 || reload_in_progress) \
1155 && ! symbolic_memory_operand (OP, VOIDmode) \
1156 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1157 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1158 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\
1160 (GET_CODE (OP) == MEM \
1161 && GET_CODE (XEXP (OP, 0)) == PLUS \
1162 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \
1163 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \
1164 && (move_operand (OP, GET_MODE (OP)) \
1165 || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1166 || reload_in_progress)) \
1168 (GET_CODE (OP) == MEM \
1169 /* Using DFmode forces only short displacements \
1170 to be recognized as valid in reg+d addresses. \
1171 However, this is not necessary for PA2.0 since\
1172 it has long FP loads/stores. */ \
1173 && memory_address_p ((TARGET_PA_20 \
1177 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1178 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1179 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\
1181 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \
1183 (GET_CODE (OP) == MEM \
1184 && GET_CODE (XEXP (OP, 0)) == LO_SUM \
1185 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
1186 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \
1187 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC \
1188 && GET_MODE (XEXP (OP, 0)) == Pmode) \
1190 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0))))))
1193 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1194 and check its validity for a certain class.
1195 We have two alternate definitions for each of them.
1196 The usual definition accepts all pseudo regs; the other rejects
1197 them unless they have been allocated suitable hard regs.
1198 The symbol REG_OK_STRICT causes the latter definition to be used.
1200 Most source files want to accept pseudo regs in the hope that
1201 they will get allocated to the class that the insn wants them to be in.
1202 Source files for reload pass need to be strict.
1203 After reload, it makes no difference, since pseudo regs have
1204 been eliminated by then. */
1206 #ifndef REG_OK_STRICT
1208 /* Nonzero if X is a hard reg that can be used as an index
1209 or if it is a pseudo reg. */
1210 #define REG_OK_FOR_INDEX_P(X) \
1211 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1212 /* Nonzero if X is a hard reg that can be used as a base reg
1213 or if it is a pseudo reg. */
1214 #define REG_OK_FOR_BASE_P(X) \
1215 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1219 /* Nonzero if X is a hard reg that can be used as an index. */
1220 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1221 /* Nonzero if X is a hard reg that can be used as a base reg. */
1222 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1226 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1227 that is a valid memory address for an instruction.
1228 The MODE argument is the machine mode for the MEM expression
1229 that wants to use this address.
1231 On the HP-PA, the actual legitimate addresses must be
1232 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1233 But we can treat a SYMBOL_REF as legitimate if it is part of this
1234 function's constant-pool, because such addresses can actually
1235 be output as REG+SMALLINT.
1237 Note we only allow 5 bit immediates for access to a constant address;
1238 doing so avoids losing for loading/storing a FP register at an address
1239 which will not fit in 5 bits. */
1241 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
1242 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1244 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
1245 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1247 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
1248 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1250 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
1251 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1253 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1255 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1256 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1257 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1258 && REG_P (XEXP (X, 0)) \
1259 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1261 else if (GET_CODE (X) == PLUS) \
1263 rtx base = 0, index = 0; \
1264 if (REG_P (XEXP (X, 0)) \
1265 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1266 base = XEXP (X, 0), index = XEXP (X, 1); \
1267 else if (REG_P (XEXP (X, 1)) \
1268 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1269 base = XEXP (X, 1), index = XEXP (X, 0); \
1271 if (GET_CODE (index) == CONST_INT \
1272 && ((INT_14_BITS (index) \
1273 && (TARGET_SOFT_FLOAT \
1275 && ((MODE == SFmode \
1276 && (INTVAL (index) % 4) == 0)\
1277 || (MODE == DFmode \
1278 && (INTVAL (index) % 8) == 0)))\
1279 || ((MODE) != SFmode && (MODE) != DFmode))) \
1280 || INT_5_BITS (index))) \
1282 if (! TARGET_SOFT_FLOAT \
1283 && ! TARGET_DISABLE_INDEXING \
1285 && ((MODE) == SFmode || (MODE) == DFmode) \
1286 && GET_CODE (index) == MULT \
1287 && GET_CODE (XEXP (index, 0)) == REG \
1288 && REG_OK_FOR_BASE_P (XEXP (index, 0)) \
1289 && GET_CODE (XEXP (index, 1)) == CONST_INT \
1290 && INTVAL (XEXP (index, 1)) == ((MODE) == SFmode ? 4 : 8))\
1293 else if (GET_CODE (X) == LO_SUM \
1294 && GET_CODE (XEXP (X, 0)) == REG \
1295 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1296 && CONSTANT_P (XEXP (X, 1)) \
1297 && (TARGET_SOFT_FLOAT \
1298 /* We can allow symbolic LO_SUM addresses\
1301 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1302 || ((MODE) != SFmode \
1303 && (MODE) != DFmode))) \
1305 else if (GET_CODE (X) == LO_SUM \
1306 && GET_CODE (XEXP (X, 0)) == SUBREG \
1307 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1308 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1309 && CONSTANT_P (XEXP (X, 1)) \
1310 && (TARGET_SOFT_FLOAT \
1311 /* We can allow symbolic LO_SUM addresses\
1314 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1315 || ((MODE) != SFmode \
1316 && (MODE) != DFmode))) \
1318 else if (GET_CODE (X) == LABEL_REF \
1319 || (GET_CODE (X) == CONST_INT \
1320 && INT_5_BITS (X))) \
1322 /* Needed for -fPIC */ \
1323 else if (GET_CODE (X) == LO_SUM \
1324 && GET_CODE (XEXP (X, 0)) == REG \
1325 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1326 && GET_CODE (XEXP (X, 1)) == UNSPEC \
1327 && (TARGET_SOFT_FLOAT \
1329 || ((MODE) != SFmode \
1330 && (MODE) != DFmode))) \
1334 /* Look for machine dependent ways to make the invalid address AD a
1337 For the PA, transform:
1339 memory(X + <large int>)
1343 if (<large int> & mask) >= 16
1344 Y = (<large int> & ~mask) + mask + 1 Round up.
1346 Y = (<large int> & ~mask) Round down.
1348 memory (Z + (<large int> - Y));
1350 This makes reload inheritance and reload_cse work better since Z
1353 There may be more opportunities to improve code with this hook. */
1354 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
1356 int offset, newoffset, mask; \
1357 rtx new, temp = NULL_RTX; \
1359 mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1360 ? (TARGET_PA_20 ? 0x3fff : 0x1f) : 0x3fff); \
1363 && GET_CODE (AD) == PLUS) \
1364 temp = simplify_binary_operation (PLUS, Pmode, \
1365 XEXP (AD, 0), XEXP (AD, 1)); \
1367 new = temp ? temp : AD; \
1370 && GET_CODE (new) == PLUS \
1371 && GET_CODE (XEXP (new, 0)) == REG \
1372 && GET_CODE (XEXP (new, 1)) == CONST_INT) \
1374 offset = INTVAL (XEXP ((new), 1)); \
1376 /* Choose rounding direction. Round up if we are >= halfway. */ \
1377 if ((offset & mask) >= ((mask + 1) / 2)) \
1378 newoffset = (offset & ~mask) + mask + 1; \
1380 newoffset = offset & ~mask; \
1382 if (newoffset != 0 \
1383 && VAL_14_BITS_P (newoffset)) \
1386 temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \
1387 GEN_INT (newoffset)); \
1388 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1389 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
1390 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
1400 /* Try machine-dependent ways of modifying an illegitimate address
1401 to be legitimate. If we find one, return the new, valid address.
1402 This macro is used in only one place: `memory_address' in explow.c.
1404 OLDX is the address as it was before break_out_memory_refs was called.
1405 In some cases it is useful to look at this to decide what needs to be done.
1407 MODE and WIN are passed so that this macro can use
1408 GO_IF_LEGITIMATE_ADDRESS.
1410 It is always safe for this macro to do nothing. It exists to recognize
1411 opportunities to optimize the output. */
1413 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1414 { rtx orig_x = (X); \
1415 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1416 if ((X) != orig_x && memory_address_p (MODE, X)) \
1419 /* Go to LABEL if ADDR (a legitimate address expression)
1420 has an effect that depends on the machine mode it is used for. */
1422 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1423 if (GET_CODE (ADDR) == PRE_DEC \
1424 || GET_CODE (ADDR) == POST_DEC \
1425 || GET_CODE (ADDR) == PRE_INC \
1426 || GET_CODE (ADDR) == POST_INC) \
1429 /* Arghh. The hpux10 linker chokes if we have a reference to symbols
1430 in a readonly data section when the symbol is defined in a shared
1431 library. Since we can't know at compile time if a symbol will be
1432 satisfied by a shared library or main program we put any symbolic
1433 constant into the normal data section. */
1434 #define SELECT_RTX_SECTION(MODE,RTX,ALIGN) \
1435 if (symbolic_operand (RTX, MODE)) \
1438 readonly_data_section ();
1440 /* On hpux10, the linker will give an error if we have a reference
1441 in the read-only data section to a symbol defined in a shared
1442 library. Therefore, expressions that might require a reloc can
1443 not be placed in the read-only data section. */
1444 #define SELECT_SECTION(EXP,RELOC,ALIGN) \
1445 if (TREE_CODE (EXP) == VAR_DECL \
1446 && TREE_READONLY (EXP) \
1447 && !TREE_THIS_VOLATILE (EXP) \
1448 && DECL_INITIAL (EXP) \
1449 && (DECL_INITIAL (EXP) == error_mark_node \
1450 || TREE_CONSTANT (DECL_INITIAL (EXP))) \
1452 readonly_data_section (); \
1453 else if (TREE_CODE_CLASS (TREE_CODE (EXP)) == 'c' \
1454 && !(TREE_CODE (EXP) == STRING_CST && flag_writable_strings) \
1456 readonly_data_section (); \
1460 /* Define this macro if references to a symbol must be treated
1461 differently depending on something about the variable or
1462 function named by the symbol (such as what section it is in).
1464 The macro definition, if any, is executed immediately after the
1465 rtl for DECL or other node is created.
1466 The value of the rtl will be a `mem' whose address is a
1469 The usual thing for this macro to do is to a flag in the
1470 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1471 name string in the `symbol_ref' (if one bit is not enough
1474 On the HP-PA we use this to indicate if a symbol is in text or
1475 data space. Also, function labels need special treatment. */
1477 #define TEXT_SPACE_P(DECL)\
1478 (TREE_CODE (DECL) == FUNCTION_DECL \
1479 || (TREE_CODE (DECL) == VAR_DECL \
1480 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1481 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1483 || (TREE_CODE_CLASS (TREE_CODE (DECL)) == 'c' \
1484 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1486 #define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
1488 #define ENCODE_SECTION_INFO(DECL, FIRST) \
1490 { if (FIRST && TEXT_SPACE_P (DECL)) \
1492 if (TREE_CODE (DECL) == FUNCTION_DECL \
1493 || TREE_CODE (DECL) == VAR_DECL) \
1494 _rtl = DECL_RTL (DECL); \
1496 _rtl = TREE_CST_RTL (DECL); \
1497 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1498 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1499 hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1504 /* Store the user-specified part of SYMBOL_NAME in VAR.
1505 This is sort of inverse to ENCODE_SECTION_INFO. */
1507 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1508 (VAR) = ((SYMBOL_NAME) \
1509 + (*(SYMBOL_NAME) == '*' || *(SYMBOL_NAME) == '@'))
1511 /* Specify the machine mode that this machine uses
1512 for the index in the tablejump instruction. */
1513 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode)
1515 /* Jump tables must be 32 bit aligned, no matter the size of the element. */
1516 #define ADDR_VEC_ALIGN(ADDR_VEC) 2
1518 /* Define this as 1 if `char' should by default be signed; else as 0. */
1519 #define DEFAULT_SIGNED_CHAR 1
1521 /* Max number of bytes we can move from memory to memory
1522 in one reasonably fast instruction. */
1525 /* Higher than the default as we prefer to use simple move insns
1526 (better scheduling and delay slot filling) and because our
1527 built-in block move is really a 2X unrolled loop.
1529 Believe it or not, this has to be big enough to allow for copying all
1530 arguments passed in registers to avoid infinite recursion during argument
1531 setup for a function call. Why? Consider how we copy the stack slots
1532 reserved for parameters when they may be trashed by a call. */
1533 #define MOVE_RATIO (TARGET_64BIT ? 8 : 4)
1535 /* Define if operations between registers always perform the operation
1536 on the full register even if a narrower mode is specified. */
1537 #define WORD_REGISTER_OPERATIONS
1539 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1540 will either zero-extend or sign-extend. The value of this macro should
1541 be the code that says which one of the two operations is implicitly
1542 done, NIL if none. */
1543 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1545 /* Nonzero if access to memory by bytes is slow and undesirable. */
1546 #define SLOW_BYTE_ACCESS 1
1548 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1549 is done just by pretending it is already truncated. */
1550 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1552 /* We assume that the store-condition-codes instructions store 0 for false
1553 and some other value for true. This is the value stored for true. */
1555 #define STORE_FLAG_VALUE 1
1557 /* When a prototype says `char' or `short', really pass an `int'. */
1558 #define PROMOTE_PROTOTYPES 1
1559 #define PROMOTE_FUNCTION_RETURN 1
1561 /* Specify the machine mode that pointers have.
1562 After generation of rtl, the compiler makes no further distinction
1563 between pointers and any other objects of this machine mode. */
1564 #define Pmode word_mode
1566 /* Add any extra modes needed to represent the condition code.
1568 HPPA floating comparisons produce condition codes. */
1569 #define EXTRA_CC_MODES CC(CCFPmode, "CCFP")
1571 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1572 return the mode to be used for the comparison. For floating-point, CCFPmode
1573 should be used. CC_NOOVmode should be used when the first operand is a
1574 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1576 #define SELECT_CC_MODE(OP,X,Y) \
1577 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1579 /* A function address in a call instruction
1580 is a byte address (for indexing purposes)
1581 so give the MEM rtx a byte's mode. */
1582 #define FUNCTION_MODE SImode
1584 /* Define this if addresses of constant functions
1585 shouldn't be put through pseudo regs where they can be cse'd.
1586 Desirable on machines where ordinary constants are expensive
1587 but a CALL with constant address is cheap. */
1588 #define NO_FUNCTION_CSE
1590 /* Define this to be nonzero if shift instructions ignore all but the low-order
1592 #define SHIFT_COUNT_TRUNCATED 1
1594 /* Compute the cost of computing a constant rtl expression RTX
1595 whose rtx-code is CODE. The body of this macro is a portion
1596 of a switch statement. If the code is computed here,
1597 return it with a return statement. Otherwise, break from the switch. */
1599 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1601 if (INTVAL (RTX) == 0) return 0; \
1602 if (INT_14_BITS (RTX)) return 1; \
1609 case CONST_DOUBLE: \
1610 if ((RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)) \
1611 && OUTER_CODE != SET) \
1616 #define ADDRESS_COST(RTX) \
1617 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1619 /* Compute extra cost of moving data between one register class
1622 Make moves from SAR so expensive they should never happen. We used to
1623 have 0xffff here, but that generates overflow in rare cases.
1625 Copies involving a FP register and a non-FP register are relatively
1626 expensive because they must go through memory.
1628 Other copies are reasonably cheap. */
1629 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1630 (CLASS1 == SHIFT_REGS ? 0x100 \
1631 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1632 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1636 /* Provide the costs of a rtl expression. This is in the body of a
1637 switch on CODE. The purpose for the cost of MULT is to encourage
1638 `synth_mult' to find a synthetic multiply when reasonable. */
1640 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1642 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1643 return COSTS_N_INSNS (3); \
1644 return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
1645 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1647 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1648 return COSTS_N_INSNS (14); \
1652 return COSTS_N_INSNS (60); \
1653 case PLUS: /* this includes shNadd insns */ \
1655 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1656 return COSTS_N_INSNS (3); \
1657 return COSTS_N_INSNS (1); \
1661 return COSTS_N_INSNS (1);
1663 /* Adjust the cost of branches. */
1664 #define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1)
1666 /* Handling the special cases is going to get too complicated for a macro,
1667 just call `pa_adjust_insn_length' to do the real work. */
1668 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1669 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1671 /* Millicode insns are actually function calls with some special
1672 constraints on arguments and register usage.
1674 Millicode calls always expect their arguments in the integer argument
1675 registers, and always return their result in %r29 (ret1). They
1676 are expected to clobber their arguments, %r1, %r29, and the return
1677 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
1679 This macro tells reorg that the references to arguments and
1680 millicode calls do not appear to happen until after the millicode call.
1681 This allows reorg to put insns which set the argument registers into the
1682 delay slot of the millicode call -- thus they act more like traditional
1685 Note we can not consider side effects of the insn to be delayed because
1686 the branch and link insn will clobber the return pointer. If we happened
1687 to use the return pointer in the delay slot of the call, then we lose.
1689 get_attr_type will try to recognize the given insn, so make sure to
1690 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1692 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
1695 /* Control the assembler format that we output. */
1697 /* Output to assembler file text saying following lines
1698 may contain character constants, extra white space, comments, etc. */
1700 #define ASM_APP_ON ""
1702 /* Output to assembler file text saying following lines
1703 no longer contain unusual constructs. */
1705 #define ASM_APP_OFF ""
1707 /* Output deferred plabels at the end of the file. */
1709 #define ASM_FILE_END(FILE) output_deferred_plabels (FILE)
1711 /* This is how to output the definition of a user-level label named NAME,
1712 such as the label on a static function or variable NAME. */
1714 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1715 do { assemble_name (FILE, NAME); \
1716 fputc ('\n', FILE); } while (0)
1718 /* This is how to output a reference to a user-level label named NAME.
1719 `assemble_name' uses this. */
1721 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1722 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1724 /* This is how to output an internal numbered label where
1725 PREFIX is the class of label and NUM is the number within the class. */
1727 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1728 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1730 /* This is how to store into the string LABEL
1731 the symbol_ref name of an internal numbered label where
1732 PREFIX is the class of label and NUM is the number within the class.
1733 This is suitable for output with `assemble_name'. */
1735 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1736 sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
1738 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1740 /* We only handle DATA objects here, functions are globalized in \
1741 ASM_DECLARE_FUNCTION_NAME. */ \
1742 if (! FUNCTION_NAME_P (NAME)) \
1744 fputs ("\t.EXPORT ", FILE); \
1745 assemble_name (FILE, NAME); \
1746 fputs (",DATA\n", FILE); \
1750 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1751 output_ascii ((FILE), (P), (SIZE))
1753 /* This is how to output an element of a case-vector that is absolute.
1754 Note that this method makes filling these branch delay slots
1757 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1758 if (TARGET_BIG_SWITCH) \
1759 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldil LR'L$%04d,%%r1\n\tbe RR'L$%04d(%%sr4,%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE, VALUE); \
1761 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1763 /* Jump tables are executable code and live in the TEXT section on the PA. */
1764 #define JUMP_TABLES_IN_TEXT_SECTION 1
1766 /* This is how to output an element of a case-vector that is relative.
1767 This must be defined correctly as it is used when generating PIC code.
1769 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1770 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1771 rather than a table of absolute addresses. */
1773 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1774 if (TARGET_BIG_SWITCH) \
1775 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldw T'L$%04d(%%r19),%%r1\n\tbv %%r0(%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE); \
1777 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1779 /* This is how to output an assembler line
1780 that says to advance the location counter
1781 to a multiple of 2**LOG bytes. */
1783 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1784 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1786 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1787 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1789 /* This says how to output an assembler line to define a global common symbol
1790 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1792 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
1794 assemble_name ((FILE), (NAME)); \
1795 fputs ("\t.comm ", (FILE)); \
1796 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
1798 /* This says how to output an assembler line to define a local common symbol
1799 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1801 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
1803 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
1804 assemble_name ((FILE), (NAME)); \
1805 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
1807 /* Store in OUTPUT a string (made with alloca) containing
1808 an assembler-name for a local static variable named NAME.
1809 LABELNO is an integer which is different for each call. */
1811 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1812 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1813 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1815 /* All HP assemblers use "!" to separate logical lines. */
1816 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
1818 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1819 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1821 /* Print operand X (an rtx) in assembler syntax to file FILE.
1822 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1823 For `%' followed by punctuation, CODE is the punctuation and X is null.
1825 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1826 and an immediate zero should be represented as `r0'.
1828 Several % codes are defined:
1830 C compare conditions
1831 N extract conditions
1832 M modifier to handle preincrement addressing for memory refs.
1833 F modifier to handle preincrement addressing for fp memory refs */
1835 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1838 /* Print a memory address as an operand to reference that memory location. */
1840 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1841 { register rtx addr = ADDR; \
1842 register rtx base; \
1844 switch (GET_CODE (addr)) \
1847 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
1850 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1851 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1852 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1853 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1856 fprintf (FILE, "%d(%s)", offset, reg_names [REGNO (base)]); \
1859 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
1860 fputs ("R'", FILE); \
1861 else if (flag_pic == 0) \
1862 fputs ("RR'", FILE); \
1864 fputs ("RT'", FILE); \
1865 output_global_address (FILE, XEXP (addr, 1), 0); \
1866 fputs ("(", FILE); \
1867 output_operand (XEXP (addr, 0), 0); \
1868 fputs (")", FILE); \
1871 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (addr)); \
1872 fprintf (FILE, "(%%r0)"); \
1875 output_addr_const (FILE, addr); \
1879 /* Find the return address associated with the frame given by
1881 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
1882 (return_addr_rtx (COUNT, FRAMEADDR))
1884 /* Used to mask out junk bits from the return address, such as
1885 processor state, interrupt status, condition codes and the like. */
1886 #define MASK_RETURN_ADDR \
1887 /* The privilege level is in the two low order bits, mask em out \
1888 of the return address. */ \
1891 /* The number of Pmode words for the setjmp buffer. */
1892 #define JMP_BUF_SIZE 50
1894 /* Only direct calls to static functions are allowed to be sibling (tail)
1897 This restriction is necessary because some linker generated stubs will
1898 store return pointers into rp' in some cases which might clobber a
1899 live value already in rp'.
1901 In a sibcall the current function and the target function share stack
1902 space. Thus if the path to the current function and the path to the
1903 target function save a value in rp', they save the value into the
1904 same stack slot, which has undesirable consequences.
1906 Because of the deferred binding nature of shared libraries any function
1907 with external scope could be in a different load module and thus require
1908 rp' to be saved when calling that function. So sibcall optimizations
1909 can only be safe for static function.
1911 Note that GCC never needs return value relocations, so we don't have to
1912 worry about static calls with return value relocations (which require
1915 It is safe to perform a sibcall optimization when the target function
1916 will never return. */
1917 #define FUNCTION_OK_FOR_SIBCALL(DECL) \
1920 && ! TREE_PUBLIC (DECL))
1922 #define PREDICATE_CODES \
1923 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1924 {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \
1925 CONST_DOUBLE, CONST, HIGH, CONSTANT_P_RTX}}, \
1926 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
1927 {"symbolic_memory_operand", {SUBREG, MEM}}, \
1928 {"reg_before_reload_operand", {REG, MEM}}, \
1929 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
1930 {"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, MEM, CONST_INT, \
1932 {"move_operand", {SUBREG, REG, CONSTANT_P_RTX, CONST_INT, MEM}}, \
1933 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
1934 {"pic_label_operand", {LABEL_REF, CONST}}, \
1935 {"fp_reg_operand", {REG}}, \
1936 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1937 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
1938 {"pre_cint_operand", {CONST_INT}}, \
1939 {"post_cint_operand", {CONST_INT}}, \
1940 {"arith_double_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1941 {"ireg_or_int5_operand", {CONST_INT, REG}}, \
1942 {"int5_operand", {CONST_INT}}, \
1943 {"uint5_operand", {CONST_INT}}, \
1944 {"int11_operand", {CONST_INT}}, \
1945 {"uint32_operand", {CONST_INT, \
1946 HOST_BITS_PER_WIDE_INT > 32 ? 0 : CONST_DOUBLE}}, \
1947 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1948 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1949 {"ior_operand", {CONST_INT}}, \
1950 {"lhs_lshift_cint_operand", {CONST_INT}}, \
1951 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
1952 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1953 {"pc_or_label_operand", {PC, LABEL_REF}}, \
1954 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
1955 {"shadd_operand", {CONST_INT}}, \
1956 {"basereg_operand", {REG}}, \
1957 {"div_operand", {REG, CONST_INT}}, \
1958 {"ireg_operand", {REG}}, \
1959 {"cmpib_comparison_operator", {EQ, NE, LT, LE, LEU, \
1961 {"movb_comparison_operator", {EQ, NE, LT, GE}},
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