1 /* Definitions of target machine for GNU compiler. NS32000 version.
2 Copyright (C) 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2004, 2005 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com)
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
24 #define TARGET_CPU_CPP_BUILTINS() \
27 builtin_define ("__ns32000__"); \
31 builtin_define ("__ns32532__"); \
32 else if (TARGET_32332) \
33 builtin_define ("__ns32332__"); \
35 builtin_define ("__ns32032__"); \
39 builtin_define ("__ns32381__"); \
40 else if (TARGET_32081) \
41 builtin_define ("__ns32081__"); \
45 builtin_define ("__RTD__"); \
47 builtin_assert ("cpu=ns32k"); \
48 builtin_assert ("machine=ns32k"); \
52 /* Print subsidiary information on the compiler version in use. */
53 #define TARGET_VERSION fprintf (stderr, " (32000, GAS syntax)");
56 /* ABSOLUTE PREFIX, IMMEDIATE_PREFIX and EXTERNAL_PREFIX can be defined
57 to cover most NS32k addressing syntax variations. This way we don't
58 need to redefine long macros in all the tm.h files for just slight
59 variations in assembler syntax. */
61 #ifndef ABSOLUTE_PREFIX
62 #define ABSOLUTE_PREFIX '@'
65 #if defined(IMMEDIATE_PREFIX) && IMMEDIATE_PREFIX
66 #define PUT_IMMEDIATE_PREFIX(FILE) putc(IMMEDIATE_PREFIX, FILE)
68 #define PUT_IMMEDIATE_PREFIX(FILE)
70 #if defined(ABSOLUTE_PREFIX) && ABSOLUTE_PREFIX
71 #define PUT_ABSOLUTE_PREFIX(FILE) putc(ABSOLUTE_PREFIX, FILE)
73 #define PUT_ABSOLUTE_PREFIX(FILE)
75 #if defined(EXTERNAL_PREFIX) && EXTERNAL_PREFIX
76 #define PUT_EXTERNAL_PREFIX(FILE) putc(EXTERNAL_PREFIX, FILE)
78 #define PUT_EXTERNAL_PREFIX(FILE)
81 /* When we are generating PIC, the sb is used as a pointer
82 to the GOT. 32381 is a superset of 32081 */
84 #define OVERRIDE_OPTIONS \
86 if (target_flags & MASK_32532) \
87 target_flags |= MASK_32332; \
88 if (flag_pic || TARGET_HIMEM) \
89 target_flags &= ~MASK_SB; \
91 target_flags |= MASK_32081; \
93 target_flags &= ~MASK_MULT_ADD; \
94 if (flag_unsafe_math_optimizations) \
95 target_flags &= ~MASK_IEEE_COMPARE; \
98 /* Zero or more C statements that may conditionally modify two
99 variables `fixed_regs' and `call_used_regs' (both of type `char
100 []') after they have been initialized from the two preceding
103 This is necessary in case the fixed or call-clobbered registers
104 depend on target flags.
106 You need not define this macro if it has no work to do.
108 If the usage of an entire class of registers depends on the target
109 flags, you may indicate this to GCC by using this macro to modify
110 `fixed_regs' and `call_used_regs' to 1 for each of the registers in
111 the classes which should not be used by GCC. Also define the macro
112 `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
113 letter for a class that shouldn't be used.
115 (However, if this class is not included in `GENERAL_REGS' and all
116 of the insn patterns whose constraints permit this class are
117 controlled by target switches, then GCC will automatically avoid
118 using these registers when the target switches are opposed to
121 #define CONDITIONAL_REGISTER_USAGE \
128 for (regno = F0_REGNUM; regno <= F0_REGNUM + 8; regno++) \
129 fixed_regs[regno] = call_used_regs[regno] = 1; \
135 for (regno = L1_REGNUM; regno <= L1_REGNUM + 8; regno++) \
136 fixed_regs[regno] = call_used_regs[regno] = 1; \
142 /* target machine storage layout */
144 /* Define this if most significant bit is lowest numbered
145 in instructions that operate on numbered bit-fields.
146 This is not true on the ns32k. */
147 #define BITS_BIG_ENDIAN 0
149 /* Define this if most significant byte of a word is the lowest numbered. */
150 /* That is not true on the ns32k. */
151 #define BYTES_BIG_ENDIAN 0
153 /* Define this if most significant word of a multiword number is lowest
154 numbered. This is not true on the ns32k. */
155 #define WORDS_BIG_ENDIAN 0
157 /* Width of a word, in units (bytes). */
158 #define UNITS_PER_WORD 4
160 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
161 #define PARM_BOUNDARY 32
163 /* Boundary (in *bits*) on which stack pointer should be aligned. */
164 #define STACK_BOUNDARY 32
166 /* Allocation boundary (in *bits*) for the code of a function. */
167 #define FUNCTION_BOUNDARY 16
169 /* Alignment of field after `int : 0' in a structure. */
170 #define EMPTY_FIELD_BOUNDARY 32
172 /* Every structure's size must be a multiple of this. */
173 #define STRUCTURE_SIZE_BOUNDARY 8
175 /* No data type wants to be aligned rounder than this. */
176 #define BIGGEST_ALIGNMENT 32
178 /* Set this nonzero if move instructions will actually fail to work
179 when given unaligned data. National claims that the NS32032
180 works without strict alignment, but rumor has it that operands
181 crossing a page boundary cause unpredictable results. */
182 #define STRICT_ALIGNMENT 1
184 /* If bit field type is int, don't let it cross an int,
185 and give entire struct the alignment of an int. */
186 /* Required on the 386 since it doesn't have a full set of bit-field insns.
187 (There is no signed extv insn.) */
188 #define PCC_BITFIELD_TYPE_MATTERS 1
190 /* Standard register usage. */
192 /* Number of actual hardware registers.
193 The hardware registers are assigned numbers for the compiler
194 from 0 to just below FIRST_PSEUDO_REGISTER.
195 All registers that the compiler knows about must be given numbers,
196 even those that are not normally considered general registers. */
197 #define FIRST_PSEUDO_REGISTER 26
199 /* 1 for registers that have pervasive standard uses
200 and are not available for the register allocator.
201 On the ns32k, these are the FP, SP, (SB and PC are not included here). */
202 #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, \
203 0, 0, 0, 0, 0, 0, 0, 0, \
204 0, 0, 0, 0, 0, 0, 0, 0, \
207 /* 1 for registers not available across function calls.
208 These must include the FIXED_REGISTERS and also any
209 registers that can be used without being saved.
210 The latter must include the registers where values are returned
211 and the register where structure-value addresses are passed.
212 Aside from that, you can include as many other registers as you like. */
213 #define CALL_USED_REGISTERS {1, 1, 1, 0, 0, 0, 0, 0, \
214 1, 1, 1, 1, 0, 0, 0, 0, \
215 1, 1, 0, 0, 0, 0, 0, 0, \
218 /* How to refer to registers in assembler output.
219 This sequence is indexed by compiler's hard-register-number (see above). */
221 #define REGISTER_NAMES \
222 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
223 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
224 "l1", "l1h","l3", "l3h","l5", "l5h","l7", "l7h", \
228 #define ADDITIONAL_REGISTER_NAMES \
229 {{"l0", 8}, {"l2", 10}, {"l4", 12}, {"l6", 14}}
231 /* l0-7 are not recognized by the assembler. These are the names to use,
232 * but we don't want ambiguous names in REGISTER_NAMES
234 #define OUTPUT_REGISTER_NAMES \
235 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
236 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
237 "f1", "l1h","f3", "l3h","f5", "l5h","f7", "f7h", \
240 #define REG_ALLOC_ORDER \
241 {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 16, 10, 11, 18, 12, 13, 20, 14, 15, 22, 24, 25, 17, 19, 23}
243 /* How to renumber registers for dbx and gdb.
244 NS32000 may need more change in the numeration. XXX */
246 #define DBX_REGISTER_NUMBER(REGNO) \
247 ((REGNO) < L1_REGNUM? (REGNO) \
248 : (REGNO) < FRAME_POINTER_REGNUM? (REGNO) - L1_REGNUM + 22 \
249 : (REGNO) == FRAME_POINTER_REGNUM? 17 \
252 /* dwarf2out.c can't understand the funny DBX register numbering.
253 * We use dwarf2out.c for exception handling even though we use DBX
256 #define DWARF_FRAME_REGNUM(REGNO) (REGNO)
264 /* Specify the registers used for certain standard purposes.
265 The values of these macros are register numbers. */
267 /* NS32000 pc is not overloaded on a register. */
268 /* #define PC_REGNUM */
270 /* Register to use for pushing function arguments. */
271 #define STACK_POINTER_REGNUM 25
273 /* Base register for access to local variables of the function. */
274 #define FRAME_POINTER_REGNUM 24
277 /* Return number of consecutive hard regs needed starting at reg REGNO
278 to hold something of mode MODE.
279 This is ordinarily the length in words of a value of mode MODE
280 but can be less for certain modes in special long registers.
281 On the ns32k, all registers are 32 bits long except for the 32381 "long"
282 registers but we treat those as pairs */
283 #define LONG_FP_REGS_P(REGNO) ((REGNO) >= L1_REGNUM && (REGNO) < L1_REGNUM + 8)
284 #define HARD_REGNO_NREGS(REGNO, MODE) \
285 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
287 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
288 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok (REGNO, MODE)
290 /* Value is 1 if it is a good idea to tie two pseudo registers
291 when one has mode MODE1 and one has mode MODE2.
292 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
293 for any hard reg, then this must be 0 for correct output. */
295 #define MODES_TIEABLE_P(MODE1, MODE2) \
296 ((FLOAT_MODE_P(MODE1) && FLOAT_MODE_P(MODE2) \
297 && (GET_MODE_UNIT_SIZE(MODE1) == GET_MODE_UNIT_SIZE(MODE2))) \
298 || (!FLOAT_MODE_P(MODE1) && !FLOAT_MODE_P(MODE2)))
300 /* Value should be nonzero if functions must have frame pointers.
301 Zero means the frame pointer need not be set up (and parms
302 may be accessed via the stack pointer) in functions that seem suitable.
303 This is computed in `reload', in reload1.c. */
304 #define FRAME_POINTER_REQUIRED 0
306 /* Base register for access to arguments of the function. */
307 #define ARG_POINTER_REGNUM 24
309 /* Register in which static-chain is passed to a function. */
310 #define STATIC_CHAIN_REGNUM 1
312 /* Register in which address to store a structure value
313 is passed to a function. */
314 #define NS32K_STRUCT_VALUE_REGNUM 2
316 /* Define the classes of registers for register constraints in the
317 machine description. Also define ranges of constants.
319 One of the classes must always be named ALL_REGS and include all hard regs.
320 If there is more than one class, another class must be named NO_REGS
321 and contain no registers.
323 The name GENERAL_REGS must be the name of a class (or an alias for
324 another name such as ALL_REGS). This is the class of registers
325 that is allowed by "g" or "r" in a register constraint.
326 Also, registers outside this class are allocated only when
327 instructions express preferences for them.
329 The classes must be numbered in nondecreasing order; that is,
330 a larger-numbered class must never be contained completely
331 in a smaller-numbered class.
333 For any two classes, it is very desirable that there be another
334 class that represents their union. */
337 { NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS,
338 LONG_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,
339 STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES };
341 #define N_REG_CLASSES (int) LIM_REG_CLASSES
343 /* Give names of register classes as strings for dump file. */
345 #define REG_CLASS_NAMES \
346 {"NO_REGS", "GENERAL_REGS", "FLOAT_REG0", "LONG_FLOAT_REG0", "FLOAT_REGS", \
347 "LONG_REGS", "FP_REGS", "GEN_AND_FP_REGS", "FRAME_POINTER_REG", \
348 "STACK_POINTER_REG", "GEN_AND_MEM_REGS", "ALL_REGS" }
350 /* Define which registers fit in which classes.
351 This is an initializer for a vector of HARD_REG_SET
352 of length N_REG_CLASSES. */
354 #define REG_CLASS_CONTENTS \
355 {{0}, /* NO_REGS */ \
356 {0x00ff}, /* GENERAL_REGS */ \
357 {0x100}, /* FLOAT_REG0 */ \
358 {0x300}, /* LONG_FLOAT_REG0 */ \
359 {0xff00}, /* FLOAT_REGS */ \
360 {0xff0000}, /* LONG_REGS */ \
361 {0xffff00}, /* FP_REGS */ \
362 {0xffffff}, /* GEN_AND_FP_REGS */ \
363 {0x1000000}, /* FRAME_POINTER_REG */ \
364 {0x2000000}, /* STACK_POINTER_REG */ \
365 {0x30000ff}, /* GEN_AND_MEM_REGS */ \
366 {0x3ffffff} /* ALL_REGS */ \
369 #define SUBSET_P(CLASS1, CLASS2) \
370 ((ns32k_reg_class_contents[CLASS1][0] \
371 & ~ns32k_reg_class_contents[CLASS2][0]) == 0)
374 /* LONG_REGS are registers which can only hold double precision floats
375 * and can only be accessible by long float instructions.
377 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
378 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
379 ? reg_classes_intersect_p (LONG_REGS, CLASS) : 0)
381 /* The same information, inverted:
382 Return the class number of the smallest class containing
383 reg number REGNO. This could be a conditional expression
384 or could index an array. */
386 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
388 /* The class value for index registers, and the one for base regs. */
390 #define INDEX_REG_CLASS GENERAL_REGS
391 #define BASE_REG_CLASS GEN_AND_MEM_REGS
393 /* Get reg_class from a letter such as appears in the machine description. */
395 #define REG_CLASS_FROM_LETTER(C) \
396 ((C) == 'u' ? FLOAT_REG0 \
397 : (C) == 'v' ? LONG_FLOAT_REG0 \
398 : (C) == 'f' ? FLOAT_REGS \
399 : (C) == 'l' ? FP_REGS \
400 : (C) == 'x' ? FRAME_POINTER_REG \
401 : (C) == 'y' ? STACK_POINTER_REG \
404 /* The letters I, J, K, L and M in a register constraint string
405 can be used to stand for particular ranges of immediate operands.
406 This macro defines what the ranges are.
407 C is the letter, and VALUE is a constant value.
408 Return 1 if VALUE is in the range specified by C.
410 On the ns32k, these letters are used as follows:
412 I : Matches integers which are valid shift amounts for scaled indexing.
413 These are 0, 1, 2, 3 for byte, word, double, and quadword.
414 Used for matching arithmetic shifts only on 32032 & 32332.
415 J : Matches integers which fit a "quick" operand.
416 K : Matches integers 0 to 7 (for inss and exts instructions).
419 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
420 ((VALUE) < 8 && (VALUE) + 8 >= 0 ? \
421 ((C) == 'I' ? (!TARGET_32532 && 0 <= (VALUE) && (VALUE) <= 3) : \
422 (C) == 'J' ? (VALUE) <= 7 : \
423 (C) == 'K' ? 0 <= (VALUE) : 0) : 0)
425 /* Similar, but for floating constants, and defining letters G and H.
426 Here VALUE is the CONST_DOUBLE rtx itself. */
428 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
430 /* Given an rtx X being reloaded into a reg required to be
431 in class CLASS, return the class of reg to actually use.
432 In general this is just CLASS; but on some machines
433 in some cases it is preferable to use a more restrictive class. */
435 /* We return GENERAL_REGS instead of GEN_AND_MEM_REGS.
436 The latter offers no real additional possibilities
437 and can cause spurious secondary reloading. */
439 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
440 ((CLASS) == GEN_AND_MEM_REGS ? GENERAL_REGS : (CLASS))
442 /* Return the maximum number of consecutive registers
443 needed to represent mode MODE in a register of class CLASS. */
444 /* On the 32000, this is the size of MODE in words */
446 #define CLASS_MAX_NREGS(CLASS, MODE) \
447 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
449 /* Stack layout; function entry, exit and calling. */
451 /* Define this if pushing a word on the stack
452 makes the stack pointer a smaller address. */
453 #define STACK_GROWS_DOWNWARD
455 /* Define this if the nominal address of the stack frame
456 is at the high-address end of the local variables;
457 that is, each additional local variable allocated
458 goes at a more negative offset in the frame. */
459 #define FRAME_GROWS_DOWNWARD
461 /* Offset within stack frame to start allocating local variables at.
462 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
463 first local allocated. Otherwise, it is the offset to the BEGINNING
464 of the first local allocated. */
465 #define STARTING_FRAME_OFFSET 0
467 /* A C expression whose value is RTL representing the location of the
468 incoming return address at the beginning of any function, before
469 the prologue. This RTL is either a `REG', indicating that the
470 return value is saved in `REG', or a `MEM' representing a location
473 You only need to define this macro if you want to support call
474 frame debugging information like that provided by DWARF 2.
476 Before the prologue, RA is at 0(sp). */
478 #define INCOMING_RETURN_ADDR_RTX \
479 gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
481 /* A C expression whose value is RTL representing the value of the
482 return address for the frame COUNT steps up from the current frame,
483 after the prologue. FRAMEADDR is the frame pointer of the COUNT
484 frame, or the frame pointer of the COUNT - 1 frame if
485 `RETURN_ADDR_IN_PREVIOUS_FRAME' is defined.
487 After the prologue, RA is at 4(fp) in the current frame. */
489 #define RETURN_ADDR_RTX(COUNT, FRAME) \
490 ((COUNT> 0 && flag_omit_frame_pointer)? NULL_RTX \
491 : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4))))
493 /* A C expression whose value is an integer giving the offset, in
494 bytes, from the value of the stack pointer register to the top of
495 the stack frame at the beginning of any function, before the
496 prologue. The top of the frame is defined to be the value of the
497 stack pointer in the previous frame, just before the call
500 You only need to define this macro if you want to support call
501 frame debugging information like that provided by DWARF 2. */
503 #define INCOMING_FRAME_SP_OFFSET 4
505 /* If we generate an insn to push BYTES bytes,
506 this says how many the stack pointer really advances by.
507 On the 32000, sp@- in a byte insn really pushes a BYTE. */
508 #define PUSH_ROUNDING(BYTES) (BYTES)
510 /* Offset of first parameter from the argument pointer register value. */
511 #define FIRST_PARM_OFFSET(FNDECL) 8
513 /* Value is the number of byte of arguments automatically
514 popped when returning from a subroutine call.
515 FUNDECL is the declaration node of the function (as a tree),
516 FUNTYPE is the data type of the function (as a tree),
517 or for a library call it is an identifier node for the subroutine name.
518 SIZE is the number of bytes of arguments passed on the stack.
520 On the 32000, the RET insn may be used to pop them if the number
521 of args is fixed, but if the number is variable then the caller
522 must pop them all. RET can't be used for library calls now
523 because the library is compiled with the Unix compiler.
524 Use of RET is a selectable option, since it is incompatible with
525 standard Unix calling sequences. If the option is not selected,
526 the caller must always pop the args.
528 The attribute stdcall is equivalent to RTD on a per module basis. */
530 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
531 (ns32k_return_pops_args (FUNDECL, FUNTYPE, SIZE))
533 /* Define how to find the value returned by a function.
534 VALTYPE is the data type of the value (as a tree).
535 If the precise function being called is known, FUNC is its FUNCTION_DECL;
536 otherwise, FUNC is 0. */
538 /* On the 32000 the return value is in R0,
539 or perhaps in F0 if there is fp support. */
541 #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE(TYPE_MODE (VALTYPE))
543 /* Define how to find the value returned by a library function
544 assuming the value has mode MODE. */
546 /* On the 32000 the return value is in R0,
547 or perhaps F0 is there is fp support. */
549 #define LIBCALL_VALUE(MODE) \
551 FLOAT_MODE_P(MODE) && TARGET_32081 ? F0_REGNUM: R0_REGNUM)
553 /* Define this if PCC uses the nonreentrant convention for returning
554 structure and union values. */
556 #define PCC_STATIC_STRUCT_RETURN
558 /* 1 if N is a possible register number for a function value.
559 On the 32000, R0 and F0 are the only registers thus used. */
561 #define FUNCTION_VALUE_REGNO_P(N) (((N) & ~8) == 0)
563 /* 1 if N is a possible register number for function argument passing.
564 On the 32000, no registers are used in this way. */
566 #define FUNCTION_ARG_REGNO_P(N) 0
568 /* Define a data type for recording info about an argument list
569 during the scan of that argument list. This data type should
570 hold all necessary information about the function itself
571 and about the args processed so far, enough to enable macros
572 such as FUNCTION_ARG to determine where the next arg should go.
574 On the ns32k, this is a single integer, which is a number of bytes
575 of arguments scanned so far. */
577 #define CUMULATIVE_ARGS int
579 /* Initialize a variable CUM of type CUMULATIVE_ARGS
580 for a call to a function whose data type is FNTYPE.
581 For a library call, FNTYPE is 0.
583 On the ns32k, the offset starts at 0. */
585 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
588 /* Update the data in CUM to advance over an argument
589 of mode MODE and data type TYPE.
590 (TYPE is null for libcalls where that information may not be available.) */
592 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
593 ((CUM) += ((MODE) != BLKmode \
594 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
595 : (int_size_in_bytes (TYPE) + 3) & ~3))
597 /* Define where to put the arguments to a function.
598 Value is zero to push the argument on the stack,
599 or a hard register in which to store the argument.
601 MODE is the argument's machine mode.
602 TYPE is the data type of the argument (as a tree).
603 This is null for libcalls where that information may
605 CUM is a variable of type CUMULATIVE_ARGS which gives info about
606 the preceding args and about the function being called.
607 NAMED is nonzero if this argument is a named parameter
608 (otherwise it is an extra parameter matching an ellipsis). */
610 /* On the 32000 all args are pushed, except if -mregparm is specified
611 then the first two words of arguments are passed in r0, r1.
612 *NOTE* -mregparm does not work.
613 It exists only to test register calling conventions. */
615 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
616 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx_REG ((MODE), (CUM) / 4) : 0)
618 /* Output assembler code to FILE to increment profiler label # LABELNO
619 for profiling a function entry.
621 THIS DEFINITION FOR THE 32000 IS A GUESS. IT HAS NOT BEEN TESTED. */
623 #define FUNCTION_PROFILER(FILE, LABELNO) \
624 fprintf (FILE, "\taddr LP%d,r0\n\tbsr mcount\n", (LABELNO))
626 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
627 the stack pointer does not matter. The value is tested only in
628 functions that have frame pointers.
629 No definition is equivalent to always zero.
631 We use 0, because using 1 requires hair in output_function_epilogue()
632 that is worse than the stack adjust we could save. */
634 /* #define EXIT_IGNORE_STACK 1 */
636 /* Store in the variable DEPTH the initial difference between the
637 frame pointer reg contents and the stack pointer reg contents,
638 as of the start of the function body. This depends on the layout
639 of the fixed parts of the stack frame and on how registers are saved. */
641 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
645 for (regno = 0; regno < FRAME_POINTER_REGNUM; regno++) \
646 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
648 if (flag_pic && current_function_uses_pic_offset_table) \
650 (DEPTH) = (offset + get_frame_size () \
651 + (get_frame_size () == 0 ? 0 : 4)); \
655 /* Output assembler code for a block containing the constant parts
656 of a trampoline, leaving space for the variable parts. */
658 /* On the 32k, the trampoline looks like this:
668 Putting the data in following data is easier than figuring out how to
669 do stores to memory in reverse byte order (the way immediate operands
670 on the 32k are stored). */
672 #define TRAMPOLINE_TEMPLATE(FILE) \
674 fprintf (FILE, "\taddr 0(pc),r2\n"); \
675 fprintf (FILE, "\tmovd 16(r2),tos\n"); \
676 fprintf (FILE, "\tmovd 12(r2),r1\n"); \
677 fprintf (FILE, "\tret 0\n"); \
678 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
679 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
682 /* Length in units of the trampoline for entering a nested function. */
684 #define TRAMPOLINE_SIZE 20
686 /* Emit RTL insns to initialize the variable parts of a trampoline.
687 FNADDR is an RTX for the address of the function's pure code.
688 CXT is an RTX for the static chain value for the function. */
690 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
692 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
693 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
696 /* Addressing modes, and classification of registers for them. */
698 /* Macros to check register numbers against specific register classes. */
700 /* These assume that REGNO is a hard or pseudo reg number.
701 They give nonzero only if REGNO is a hard reg of the suitable class
702 or a pseudo reg currently allocated to a suitable hard reg.
703 Since they use reg_renumber, they are safe only once reg_renumber
704 has been allocated, which happens in local-alloc.c. */
706 /* note that FP and SP cannot be used as an index. What about PC? */
707 #define REGNO_OK_FOR_INDEX_P(REGNO) \
708 ((REGNO) < F0_REGNUM || (unsigned)reg_renumber[REGNO] < F0_REGNUM)
709 #define REGNO_OK_FOR_BASE_P(REGNO) \
710 ((REGNO) < F0_REGNUM || (unsigned)reg_renumber[REGNO] < F0_REGNUM \
711 || (REGNO) == FRAME_POINTER_REGNUM || (REGNO) == STACK_POINTER_REGNUM)
713 #define FP_REG_P(X) \
714 (GET_CODE (X) == REG && REGNO (X) >= F0_REGNUM && REGNO (X) < FRAME_POINTER_REGNUM)
716 /* Maximum number of registers that can appear in a valid memory address. */
718 #define MAX_REGS_PER_ADDRESS 2
720 /* Recognize any constant value that is a valid address.
721 This might not work on future ns32k processors as negative
722 displacements are not officially allowed but a mode reserved
723 to National. This works on processors up to 32532, though,
724 and we don't expect any new ones in the series ;-( */
726 #define CONSTANT_ADDRESS_P(X) \
727 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
728 || GET_CODE (X) == CONST \
729 || (GET_CODE (X) == CONST_INT \
730 && NS32K_DISPLACEMENT_P (INTVAL (X))))
732 #define CONSTANT_ADDRESS_NO_LABEL_P(X) \
733 (GET_CODE (X) == CONST_INT \
734 && NS32K_DISPLACEMENT_P (INTVAL (X)))
736 /* Return the register class of a scratch register needed to copy IN into
737 or out of a register in CLASS in MODE. If it can be done directly,
738 NO_REGS is returned. */
740 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
741 secondary_reload_class (CLASS, MODE, IN)
743 /* Certain machines have the property that some registers cannot be
744 copied to some other registers without using memory. Define this
745 macro on those machines to be a C expression that is nonzero if
746 objects of mode M in registers of CLASS1 can only be copied to
747 registers of class CLASS2 by storing a register of CLASS1 into
748 memory and loading that memory location into a register of CLASS2.
750 On the ns32k, floating point regs can only be loaded through memory
752 The movdf and movsf insns in ns32k.md copy between general and
753 floating registers using the stack. In principle, we could get
754 better code not allowing that case in the constraints and defining
755 SECONDARY_MEMORY_NEEDED in practice, though the stack slots used
756 are not available for optimization. */
759 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, M) \
760 secondary_memory_needed(CLASS1, CLASS2, M)
763 /* SMALL_REGISTER_CLASSES is a run time option. This should no longer
764 be necessary and should go when we have confidence that we won't run
765 out of spill registers */
766 #define SMALL_REGISTER_CLASSES (target_flags & MASK_SRC)
768 /* A C expression whose value is nonzero if pseudos that have been
769 assigned to registers of class CLASS would likely be spilled
770 because registers of CLASS are needed for spill registers.
772 The default definition won't do because class LONG_FLOAT_REG0 has two
773 registers which are always accessed as a pair */
775 #define CLASS_LIKELY_SPILLED_P(CLASS) \
776 (reg_class_size[(int) (CLASS)] == 1 || (CLASS) == LONG_FLOAT_REG0)
779 /* Nonzero if the constant value X is a legitimate general operand.
780 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
782 #define LEGITIMATE_CONSTANT_P(X) 1
784 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
785 and check its validity for a certain class.
786 We have two alternate definitions for each of them.
787 The usual definition accepts all pseudo regs; the other rejects
788 them unless they have been allocated suitable hard regs.
789 The symbol REG_OK_STRICT causes the latter definition to be used.
791 Most source files want to accept pseudo regs in the hope that
792 they will get allocated to the class that the insn wants them to be in.
793 Source files for reload pass need to be strict.
794 After reload, it makes no difference, since pseudo regs have
795 been eliminated by then. */
797 #ifndef REG_OK_STRICT
799 /* Nonzero if X is a hard reg that can be used as an index
800 or if it is a pseudo reg. */
801 #define REG_OK_FOR_INDEX_P(X) \
802 (REGNO (X) < F0_REGNUM || REGNO (X) >= FIRST_PSEUDO_REGISTER)
803 /* Nonzero if X is a hard reg that can be used as a base reg
804 of if it is a pseudo reg. */
805 #define REG_OK_FOR_BASE_P(X) (REGNO (X) < F0_REGNUM || REGNO (X) >= FRAME_POINTER_REGNUM)
806 /* Nonzero if X is a floating point reg or a pseudo reg. */
810 /* Nonzero if X is a hard reg that can be used as an index. */
811 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
812 /* Nonzero if X is a hard reg that can be used as a base reg. */
813 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
817 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
818 that is a valid memory address for an instruction.
819 The MODE argument is the machine mode for the MEM expression
820 that wants to use this address.
822 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
824 /* 1 if X is an address that we could indirect through. */
825 /***** NOTE ***** There is a bug in the Sequent assembler which fails
826 to fixup addressing information for symbols used as offsets
827 from registers which are not FP or SP (or SB or PC). This
828 makes _x(fp) valid, while _x(r0) is invalid. */
830 #define INDIRECTABLE_1_ADDRESS_P(X) \
831 (CONSTANT_ADDRESS_P (X) \
832 || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
833 || (GET_CODE (X) == PLUS \
834 && GET_CODE (XEXP (X, 0)) == REG \
835 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
836 && ((flag_pic || TARGET_HIMEM) ? \
837 CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1)) \
839 CONSTANT_ADDRESS_P (XEXP (X, 1))) \
840 && (GET_CODE (X) != CONST_INT || NS32K_DISPLACEMENT_P (INTVAL (X)))))
842 /* 1 if integer I will fit in a 4 byte displacement field.
843 Strictly speaking, we can't be sure that a symbol will fit this range.
844 But, in practice, it always will. */
846 /* idall@eleceng.adelaide.edu.au says that the 32016 and 32032
847 can handle the full range of displacements--it is only the addresses
848 that have a limited range. So the following was deleted:
849 (((i) <= 16777215 && (i) >= -16777216)
850 || ((TARGET_32532 || TARGET_32332) && ...)) */
851 #define NS32K_DISPLACEMENT_P(i) \
852 ((i) < (1 << 29) && (i) >= - (1 << 29))
854 /* Check for frame pointer or stack pointer. */
856 (GET_CODE (X) == REG && (REGNO (X) == FRAME_POINTER_REGNUM \
857 || REGNO(X) == STACK_POINTER_REGNUM))
859 /* A memory ref whose address is the FP or SP, with optional integer offset,
860 or (on certain machines) a constant address. */
861 #define INDIRECTABLE_2_ADDRESS_P(X) \
862 (GET_CODE (X) == MEM \
863 && (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0)) \
864 || (GET_CODE (xfoo0) == PLUS \
865 && MEM_REG (XEXP (xfoo0, 0)) \
866 && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1)))) \
867 || (TARGET_SB && CONSTANT_ADDRESS_P (xfoo0))))
869 /* Go to ADDR if X is a valid address not using indexing.
870 (This much is the easy part.) */
871 #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
873 if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; \
874 if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
875 if (GET_CODE (X) == PLUS) \
876 if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1))) \
877 if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))) \
881 /* Go to ADDR if X is a valid address not using indexing.
882 (This much is the easy part.) */
883 #define GO_IF_INDEXING(X, MODE, ADDR) \
884 { register rtx xfoob = (X); \
885 if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 0), MODE)) \
886 GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 1), ADDR); \
887 if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 1), MODE)) \
888 GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 0), ADDR); } \
890 #define GO_IF_INDEXABLE_ADDRESS(X, ADDR) \
891 { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; \
892 if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
893 if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; \
896 /* 1 if PROD is either a reg times size of mode MODE
897 or just a reg, if MODE is just one byte. Actually, on the ns32k,
898 since the index mode is independent of the operand size,
899 we can match more stuff...
901 This macro's expansion uses the temporary variables xfoo0, xfoo1
902 and xfoo2 that must be declared in the surrounding context. */
903 #define INDEX_TERM_P(PROD, MODE) \
904 ((GET_CODE (PROD) == REG && REG_OK_FOR_INDEX_P (PROD)) \
905 || (GET_CODE (PROD) == MULT \
906 && (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \
907 (GET_CODE (xfoo1) == CONST_INT \
908 && GET_CODE (xfoo0) == REG \
909 && FITS_INDEX_RANGE (INTVAL (xfoo1)) \
910 && REG_OK_FOR_INDEX_P (xfoo0)))))
912 #define FITS_INDEX_RANGE(X) \
913 ((xfoo2 = (unsigned)(X)-1), \
914 ((xfoo2 < 4 && xfoo2 != 2) || xfoo2 == 7))
916 /* Note that xfoo0, xfoo1, xfoo2 are used in some of the submacros above. */
917 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
918 { register rtx xfooy, xfoo0, xfoo1; \
921 if (flag_pic && cfun && ! current_function_uses_pic_offset_table \
922 && global_symbolic_reference_mentioned_p (X, 1)) \
923 current_function_uses_pic_offset_table = 1; \
924 GO_IF_NONINDEXED_ADDRESS (xfooy, ADDR); \
925 if (GET_CODE (xfooy) == PLUS) \
927 if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 1)) \
928 && GET_CODE (XEXP (xfooy, 0)) == PLUS) \
929 xfooy = XEXP (xfooy, 0); \
930 else if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 0)) \
931 && GET_CODE (XEXP (xfooy, 1)) == PLUS) \
932 xfooy = XEXP (xfooy, 1); \
933 GO_IF_INDEXING (xfooy, MODE, ADDR); \
935 else if (INDEX_TERM_P (xfooy, MODE)) \
937 else if (GET_CODE (xfooy) == PRE_DEC) \
939 if (REGNO (XEXP (xfooy, 0)) == STACK_POINTER_REGNUM) goto ADDR; \
943 /* Nonzero if the constant value X is a legitimate general operand
944 when generating PIC code. It is given that flag_pic is on and
945 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
947 #define LEGITIMATE_PIC_OPERAND_P(X) \
948 (((! current_function_uses_pic_offset_table \
949 && symbolic_reference_mentioned_p (X))? \
950 (current_function_uses_pic_offset_table = 1):0 \
951 ), (! SYMBOLIC_CONST (X) \
952 || GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF))
954 #define SYMBOLIC_CONST(X) \
955 (GET_CODE (X) == SYMBOL_REF \
956 || GET_CODE (X) == LABEL_REF \
957 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
959 /* Go to LABEL if ADDR (a legitimate address expression)
960 has an effect that depends on the machine mode it is used for.
961 On the ns32k, only predecrement and postincrement address depend thus
962 (the amount of decrement or increment being the length of the operand). */
964 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
965 { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
968 /* Specify the machine mode that this machine uses
969 for the index in the tablejump instruction.
970 HI mode is more efficient but the range is not wide enough for
972 #define CASE_VECTOR_MODE SImode
974 /* Define as C expression which evaluates to nonzero if the tablejump
975 instruction expects the table to contain offsets from the address of the
977 Do not define this if the table should contain absolute addresses. */
978 #define CASE_VECTOR_PC_RELATIVE 1
980 /* Define this as 1 if `char' should by default be signed; else as 0. */
981 #define DEFAULT_SIGNED_CHAR 1
983 /* Max number of bytes we can move from memory to memory
984 in one reasonably fast instruction. */
987 /* The number of scalar move insns which should be generated instead
988 of a string move insn or a library call.
990 We have a smart movmemsi insn */
993 #define STORE_RATIO (optimize_size ? 3 : 15)
994 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
995 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
996 < (unsigned int) STORE_RATIO)
998 /* Nonzero if access to memory by bytes is slow and undesirable. */
999 #define SLOW_BYTE_ACCESS 0
1001 /* Define if shifts truncate the shift count
1002 which implies one can omit a sign-extension or zero-extension
1003 of a shift count. */
1004 /* #define SHIFT_COUNT_TRUNCATED */
1006 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1007 is done just by pretending it is already truncated. */
1008 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1010 /* Specify the machine mode that pointers have.
1011 After generation of rtl, the compiler makes no further distinction
1012 between pointers and any other objects of this machine mode. */
1013 #define Pmode SImode
1015 /* A function address in a call instruction
1016 is a byte address (for indexing purposes)
1017 so give the MEM rtx a byte's mode. */
1018 #define FUNCTION_MODE QImode
1020 /* Tell final.c how to eliminate redundant test instructions. */
1022 /* Here we define machine-dependent flags and fields in cc_status
1023 (see `conditions.h'). */
1025 /* This bit means that what ought to be in the Z bit
1026 should be tested in the F bit. */
1027 #define CC_Z_IN_F 04000
1029 /* This bit means that what ought to be in the Z bit
1030 is complemented in the F bit. */
1031 #define CC_Z_IN_NOT_F 010000
1033 /* This bit means that the L bit indicates unordered (IEEE) comparison.
1035 #define CC_UNORD 020000
1037 /* Store in cc_status the expressions
1038 that the condition codes will describe
1039 after execution of an instruction whose pattern is EXP.
1040 Do not alter them if the instruction would not alter the cc's. */
1042 #define NOTICE_UPDATE_CC(EXP, INSN) \
1043 ns32k_notice_update_cc ((EXP), (INSN))
1045 /* Describe the costs of the following register moves which are discouraged:
1046 1.) Moves between the Floating point registers and the frame pointer and stack pointer
1047 2.) Moves between the stack pointer and the frame pointer
1048 3.) Moves between the floating point and general registers
1050 These all involve two memory references. This is worse than a memory
1051 to memory move (default cost 4)
1054 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1055 register_move_cost (CLASS1, CLASS2)
1057 #define OUTPUT_JUMP(NORMAL, NO_OV) \
1058 { if (cc_status.flags & CC_NO_OVERFLOW) \
1062 /* Dividing the output into sections */
1064 /* Output before read-only data. */
1066 #define TEXT_SECTION_ASM_OP "\t.text"
1068 /* Output before writable data. */
1070 #define DATA_SECTION_ASM_OP "\t.data"
1072 /* Define the output Assembly Language */
1074 /* Output to assembler file text saying following lines
1075 may contain character constants, extra white space, comments, etc. */
1077 #define ASM_APP_ON "#APP\n"
1079 /* Output to assembler file text saying following lines
1080 no longer contain unusual constructs. */
1082 #define ASM_APP_OFF "#NO_APP\n"
1084 /* Output of Data */
1086 /* This is how to output an assembler line defining an external/static
1087 address which is not in tree format (for collect.c). */
1089 /* The prefix to add to user-visible assembler symbols. */
1090 #define USER_LABEL_PREFIX "_"
1092 /* This is how to output an insn to push a register on the stack.
1093 It need not be very fast code. */
1095 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1096 fprintf (FILE, "\tmovd %s,tos\n", reg_names[REGNO])
1098 /* This is how to output an insn to pop a register from the stack.
1099 It need not be very fast code. */
1101 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1102 fprintf (FILE, "\tmovd tos,%s\n", reg_names[REGNO])
1104 /* This is how to output a command to make the user-level label named NAME
1105 defined for reference from other files. */
1107 /* Globalizing directive for a label. */
1108 #define GLOBAL_ASM_OP ".globl "
1110 /* This is how to store into the string LABEL
1111 the symbol_ref name of an internal numbered label where
1112 PREFIX is the class of label and NUM is the number within the class.
1113 This is suitable for output with `assemble_name'. */
1115 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1116 sprintf (LABEL, "*%s%ld", PREFIX, (long) NUM)
1118 /* This is how to align the code that follows an unconditional branch. */
1120 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (2)
1122 /* This is how to output an element of a case-vector that is absolute.
1123 (The ns32k does not use such vectors,
1124 but we must define this macro anyway.) */
1126 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1127 fprintf (FILE, "\t.long L%d\n", VALUE)
1129 /* This is how to output an element of a case-vector that is relative. */
1130 /* ** Notice that the second element is LI format! */
1131 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1132 fprintf (FILE, "\t.long L%d-LI%d\n", VALUE, REL)
1134 /* This is how to output an assembler line
1135 that says to advance the location counter
1136 to a multiple of 2**LOG bytes. */
1138 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1139 fprintf (FILE, "\t.align %d\n", (LOG))
1141 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1142 fprintf (FILE, "\t.space %u\n", (int)(SIZE))
1144 /* This says how to output an assembler line
1145 to define a global common symbol. */
1147 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1148 ( fputs (".comm ", (FILE)), \
1149 assemble_name ((FILE), (NAME)), \
1150 fprintf ((FILE), ",%u\n", (int)(ROUNDED)))
1152 /* This says how to output an assembler line
1153 to define a local common symbol. */
1155 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1156 ( fputs (".lcomm ", (FILE)), \
1157 assemble_name ((FILE), (NAME)), \
1158 fprintf ((FILE), ",%u\n", (int)(ROUNDED)))
1160 /* Print an instruction operand X on file FILE.
1161 CODE is the code from the %-spec that requested printing this operand;
1162 if `%z3' was used to print operand 3, then CODE is 'z'. */
1164 /* %$ means print the prefix for an immediate operand. */
1166 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1167 ((CODE) == '$' || (CODE) == '?')
1169 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1171 /* Print a memory operand whose address is X, on file FILE. */
1173 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address(FILE, ADDR)
1175 extern const unsigned int ns32k_reg_class_contents[N_REG_CLASSES][1];
1176 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smallest class containing REGNO */