1 /* Definitions of target machine for GNU compiler. NS32000 version.
2 Copyright (C) 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 /* Note that some other tm.h files include this one and then override
25 many of the definitions that relate to assembler syntax. */
27 /* Names to predefine in the preprocessor for this target machine. */
29 #define CPP_PREDEFINES "-Dns32000 -Dunix -Asystem=unix -Acpu=ns32k -Amachine=ns32k"
31 /* Print subsidiary information on the compiler version in use. */
32 #define TARGET_VERSION fprintf (stderr, " (32000, GAS syntax)");
35 /* ABSOLUTE PREFIX, IMMEDIATE_PREFIX and EXTERNAL_PREFIX can be defined
36 to cover most NS32k addressing syntax variations. This way we don't
37 need to redefine long macros in all the tm.h files for just slight
38 variations in assembler syntax. */
40 #ifndef ABSOLUTE_PREFIX
41 #define ABSOLUTE_PREFIX '@'
44 #if defined(IMMEDIATE_PREFIX) && IMMEDIATE_PREFIX
45 #define PUT_IMMEDIATE_PREFIX(FILE) putc(IMMEDIATE_PREFIX, FILE)
47 #define PUT_IMMEDIATE_PREFIX(FILE)
49 #if defined(ABSOLUTE_PREFIX) && ABSOLUTE_PREFIX
50 #define PUT_ABSOLUTE_PREFIX(FILE) putc(ABSOLUTE_PREFIX, FILE)
52 #define PUT_ABSOLUTE_PREFIX(FILE)
54 #if defined(EXTERNAL_PREFIX) && EXTERNAL_PREFIX
55 #define PUT_EXTERNAL_PREFIX(FILE) putc(EXTERNAL_PREFIX, FILE)
57 #define PUT_EXTERNAL_PREFIX(FILE)
60 /* Run-time compilation parameters selecting different hardware subsets. */
62 extern int target_flags;
64 /* Macros used in the machine description to test the flags. */
66 /* Compile 32081 insns for floating point (not library calls). */
67 #define TARGET_32081 (target_flags & 1)
68 #define TARGET_32381 (target_flags & 256)
70 /* The use of multiply-add instructions is optional because there may
71 * be cases where it produces worse code.
74 #define TARGET_MULT_ADD (target_flags & 512)
76 /* Compile using rtd insn calling sequence.
77 This will not work unless you use prototypes at least
78 for all functions that can take varying numbers of args. */
79 #define TARGET_RTD (target_flags & 2)
81 /* Compile passing first two args in regs 0 and 1. */
82 #define TARGET_REGPARM (target_flags & 4)
84 /* Options to select type of CPU, for better optimization.
85 The output is correct for any kind of 32000 regardless of these options. */
86 #define TARGET_32532 (target_flags & 8)
87 #define TARGET_32332 (target_flags & 16)
89 /* Ok to use the static base register (and presume it's 0) */
90 #define TARGET_SB ((target_flags & 32) == 0)
91 #define TARGET_HIMEM (target_flags & 128)
93 /* Compile using bitfield insns. */
94 #define TARGET_BITFIELD ((target_flags & 64) == 0)
96 /* Macro to define tables used to set the flags.
97 This is a list in braces of pairs in braces,
98 each pair being { "NAME", VALUE }
99 where VALUE is the bits to set or minus the bits to clear.
100 An empty string NAME is used to identify the default VALUE. */
102 #define TARGET_SWITCHES \
103 { { "32081", 1, N_("Use hardware fp")}, \
104 { "soft-float", -257, N_("Don't use hardware fp")}, \
105 { "rtd", 2, N_("Alternative calling convention")}, \
106 { "nortd", -2, N_("Use normal calling convention")}, \
107 { "regparm", 4, N_("Pass some arguments in registers")}, \
108 { "noregparm", -4, N_("Pass all arguments on stack")}, \
109 { "32532", 24, N_("Optimize for 32532 cpu")}, \
110 { "32332", 16, N_("Optimize for 32332 cpu")}, \
112 { "32032", -24, N_("Optimize for 32032")}, \
114 N_("Register sb is zero. Use for absolute addressing")}, \
115 { "nosb", 32, N_("Do not use register sb")}, \
116 { "bitfield", -64, N_("Do not use bitfield instructions")}, \
117 { "nobitfield", 64, N_("Use bitfield instructions")}, \
118 { "himem", 128, N_("Generate code for high memory")}, \
119 { "nohimem", -128, N_("Generate code for low memory")}, \
120 { "32381", 256, N_("32381 fpu")}, \
121 { "mult-add", 512, N_("Use multiply-accumulate fp instructions")}, \
122 { "nomult-add", -512, \
123 N_("Do not use multiply-accumulate fp instructions") }, \
124 { "src", 1024, N_("\"Small register classes\" kludge")}, \
125 { "nosrc", -1024, N_("No \"Small register classes\" kludge")}, \
126 { "", TARGET_DEFAULT, 0}}
128 /* TARGET_DEFAULT is defined in encore.h, pc532.h, etc. */
130 /* When we are generating PIC, the sb is used as a pointer
131 to the GOT. 32381 is a superset of 32081 */
133 #define OVERRIDE_OPTIONS \
135 if (flag_pic || TARGET_HIMEM) target_flags |= 32; \
136 if (TARGET_32381) target_flags |= 1; \
137 else target_flags &= ~512; \
140 /* Zero or more C statements that may conditionally modify two
141 variables `fixed_regs' and `call_used_regs' (both of type `char
142 []') after they have been initialized from the two preceding
145 This is necessary in case the fixed or call-clobbered registers
146 depend on target flags.
148 You need not define this macro if it has no work to do.
150 If the usage of an entire class of registers depends on the target
151 flags, you may indicate this to GCC by using this macro to modify
152 `fixed_regs' and `call_used_regs' to 1 for each of the registers in
153 the classes which should not be used by GCC. Also define the macro
154 `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
155 letter for a class that shouldn't be used.
157 (However, if this class is not included in `GENERAL_REGS' and all
158 of the insn patterns whose constraints permit this class are
159 controlled by target switches, then GCC will automatically avoid
160 using these registers when the target switches are opposed to
163 #define CONDITIONAL_REGISTER_USAGE \
170 for (regno = F0_REGNUM; regno <= F0_REGNUM + 8; regno++) \
171 fixed_regs[regno] = call_used_regs[regno] = 1; \
177 for (regno = L1_REGNUM; regno <= L1_REGNUM + 8; regno++) \
178 fixed_regs[regno] = call_used_regs[regno] = 1; \
184 /* target machine storage layout */
186 /* Define this if most significant bit is lowest numbered
187 in instructions that operate on numbered bit-fields.
188 This is not true on the ns32k. */
189 #define BITS_BIG_ENDIAN 0
191 /* Define this if most significant byte of a word is the lowest numbered. */
192 /* That is not true on the ns32k. */
193 #define BYTES_BIG_ENDIAN 0
195 /* Define this if most significant word of a multiword number is lowest
196 numbered. This is not true on the ns32k. */
197 #define WORDS_BIG_ENDIAN 0
199 /* Number of bits in an addressable storage unit */
200 #define BITS_PER_UNIT 8
202 /* Width in bits of a "word", which is the contents of a machine register.
203 Note that this is not necessarily the width of data type `int';
204 if using 16-bit ints on a 32000, this would still be 32.
205 But on a machine with 16-bit registers, this would be 16. */
206 #define BITS_PER_WORD 32
208 /* Width of a word, in units (bytes). */
209 #define UNITS_PER_WORD 4
211 /* Width in bits of a pointer.
212 See also the macro `Pmode' defined below. */
213 #define POINTER_SIZE 32
215 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
216 #define PARM_BOUNDARY 32
218 /* Boundary (in *bits*) on which stack pointer should be aligned. */
219 #define STACK_BOUNDARY 32
221 /* Allocation boundary (in *bits*) for the code of a function. */
222 #define FUNCTION_BOUNDARY 16
224 /* Alignment of field after `int : 0' in a structure. */
225 #define EMPTY_FIELD_BOUNDARY 32
227 /* Every structure's size must be a multiple of this. */
228 #define STRUCTURE_SIZE_BOUNDARY 8
230 /* No data type wants to be aligned rounder than this. */
231 #define BIGGEST_ALIGNMENT 32
233 /* Set this nonzero if move instructions will actually fail to work
234 when given unaligned data. National claims that the NS32032
235 works without strict alignment, but rumor has it that operands
236 crossing a page boundary cause unpredictable results. */
237 #define STRICT_ALIGNMENT 1
239 /* If bit field type is int, dont let it cross an int,
240 and give entire struct the alignment of an int. */
241 /* Required on the 386 since it doesn't have a full set of bitfield insns.
242 (There is no signed extv insn.) */
243 #define PCC_BITFIELD_TYPE_MATTERS 1
245 /* Standard register usage. */
247 /* Number of actual hardware registers.
248 The hardware registers are assigned numbers for the compiler
249 from 0 to just below FIRST_PSEUDO_REGISTER.
250 All registers that the compiler knows about must be given numbers,
251 even those that are not normally considered general registers. */
252 #define FIRST_PSEUDO_REGISTER 26
254 /* 1 for registers that have pervasive standard uses
255 and are not available for the register allocator.
256 On the ns32k, these are the FP, SP, (SB and PC are not included here). */
257 #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, \
258 0, 0, 0, 0, 0, 0, 0, 0, \
259 0, 0, 0, 0, 0, 0, 0, 0, \
262 /* 1 for registers not available across function calls.
263 These must include the FIXED_REGISTERS and also any
264 registers that can be used without being saved.
265 The latter must include the registers where values are returned
266 and the register where structure-value addresses are passed.
267 Aside from that, you can include as many other registers as you like. */
268 #define CALL_USED_REGISTERS {1, 1, 1, 0, 0, 0, 0, 0, \
269 1, 1, 1, 1, 0, 0, 0, 0, \
270 1, 1, 0, 0, 0, 0, 0, 0, \
273 /* How to refer to registers in assembler output.
274 This sequence is indexed by compiler's hard-register-number (see above). */
276 #define REGISTER_NAMES \
277 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
278 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
279 "l1", "l1h","l3", "l3h","l5", "l5h","l7", "l7h", \
283 #define ADDITIONAL_REGISTER_NAMES \
284 {{"l0", 8}, {"l2", 10}, {"l4", 12}, {"l6", 14}}
286 /* l0-7 are not recognized by the assembler. These are the names to use,
287 * but we don't want ambiguous names in REGISTER_NAMES
289 #define OUTPUT_REGISTER_NAMES \
290 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
291 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
292 "f1", "l1h","f3", "l3h","f5", "l5h","f7", "f7h", \
295 #define REG_ALLOC_ORDER \
296 {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 16, 10, 11, 18, 12, 13, 20, 14, 15, 22, 24, 25, 17, 19, 23}
298 /* How to renumber registers for dbx and gdb.
299 NS32000 may need more change in the numeration. XXX */
301 #define DBX_REGISTER_NUMBER(REGNO) \
302 ((REGNO) < L1_REGNUM? (REGNO) \
303 : (REGNO) < FRAME_POINTER_REGNUM? (REGNO) - L1_REGNUM + 22 \
304 : (REGNO) == FRAME_POINTER_REGNUM? 17 \
307 /* dwarf2out.c can't understand the funny DBX register numbering.
308 * We use dwarf2out.c for exception handling even though we use DBX
311 #define DWARF_FRAME_REGNUM(REGNO) (REGNO)
319 /* Specify the registers used for certain standard purposes.
320 The values of these macros are register numbers. */
322 /* NS32000 pc is not overloaded on a register. */
323 /* #define PC_REGNUM */
325 /* Register to use for pushing function arguments. */
326 #define STACK_POINTER_REGNUM 25
328 /* Base register for access to local variables of the function. */
329 #define FRAME_POINTER_REGNUM 24
332 /* Return number of consecutive hard regs needed starting at reg REGNO
333 to hold something of mode MODE.
334 This is ordinarily the length in words of a value of mode MODE
335 but can be less for certain modes in special long registers.
336 On the ns32k, all registers are 32 bits long except for the 32381 "long"
337 registers but we treat those as pairs */
338 #define LONG_FP_REGS_P(REGNO) ((REGNO) >= L1_REGNUM && (REGNO) < L1_REGNUM + 8)
339 #define HARD_REGNO_NREGS(REGNO, MODE) \
340 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
342 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
343 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok (REGNO, MODE)
345 /* Value is 1 if it is a good idea to tie two pseudo registers
346 when one has mode MODE1 and one has mode MODE2.
347 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
348 for any hard reg, then this must be 0 for correct output.
350 Early documentation says SI and DI are not tieable if some reg can
351 be OK for SI but not for DI. However other ports (mips, i860, mvs
352 and tahoe) don't meet the above criterion. Evidently the real
353 requirement is somewhat laxer. Documentation was changed for gcc
354 2.8 but was not picked up by egcs (at least egcs 1.0). Having all
355 integer modes tieable definitely generates faster code. */
357 #define MODES_TIEABLE_P(MODE1, MODE2) \
358 ((FLOAT_MODE_P(MODE1) && FLOAT_MODE_P(MODE2) \
359 && (GET_MODE_UNIT_SIZE(MODE1) == GET_MODE_UNIT_SIZE(MODE2))) \
360 || (!FLOAT_MODE_P(MODE1) && !FLOAT_MODE_P(MODE2)))
362 /* Value should be nonzero if functions must have frame pointers.
363 Zero means the frame pointer need not be set up (and parms
364 may be accessed via the stack pointer) in functions that seem suitable.
365 This is computed in `reload', in reload1.c. */
366 #define FRAME_POINTER_REQUIRED 0
368 /* Base register for access to arguments of the function. */
369 #define ARG_POINTER_REGNUM 24
371 /* Register in which static-chain is passed to a function. */
372 #define STATIC_CHAIN_REGNUM 1
374 /* Register in which address to store a structure value
375 is passed to a function. */
376 #define STRUCT_VALUE_REGNUM 2
378 /* Define the classes of registers for register constraints in the
379 machine description. Also define ranges of constants.
381 One of the classes must always be named ALL_REGS and include all hard regs.
382 If there is more than one class, another class must be named NO_REGS
383 and contain no registers.
385 The name GENERAL_REGS must be the name of a class (or an alias for
386 another name such as ALL_REGS). This is the class of registers
387 that is allowed by "g" or "r" in a register constraint.
388 Also, registers outside this class are allocated only when
389 instructions express preferences for them.
391 The classes must be numbered in nondecreasing order; that is,
392 a larger-numbered class must never be contained completely
393 in a smaller-numbered class.
395 For any two classes, it is very desirable that there be another
396 class that represents their union. */
399 { NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS,
400 FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG,
401 GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES };
403 #define N_REG_CLASSES (int) LIM_REG_CLASSES
405 /* Give names of register classes as strings for dump file. */
407 #define REG_CLASS_NAMES \
408 {"NO_REGS", "GENERAL_REGS", "FLOAT_REG0", "LONG_FLOAT_REG0", "FLOAT_REGS", \
409 "FP_REGS", "GEN_AND_FP_REGS", "FRAME_POINTER_REG", "STACK_POINTER_REG", \
410 "GEN_AND_MEM_REGS", "ALL_REGS" }
412 /* Define which registers fit in which classes.
413 This is an initializer for a vector of HARD_REG_SET
414 of length N_REG_CLASSES. */
416 #define REG_CLASS_CONTENTS \
417 {{0}, /* NO_REGS */ \
418 {0x00ff}, /* GENERAL_REGS */ \
419 {0x100}, /* FLOAT_REG0 */ \
420 {0x300}, /* LONG_FLOAT_REG0 */ \
421 {0xff00}, /* FLOAT_REGS */ \
422 {0xffff00}, /* FP_REGS */ \
423 {0xffffff}, /* GEN_AND_FP_REGS */ \
424 {0x1000000}, /* FRAME_POINTER_REG */ \
425 {0x2000000}, /* STACK_POINTER_REG */ \
426 {0x30000ff}, /* GEN_AND_MEM_REGS */ \
427 {0x3ffffff} /* ALL_REGS */ \
430 #define SUBSET_P(CLASS1, CLASS2) \
431 ((ns32k_reg_class_contents[CLASS1][0] \
432 & ~ns32k_reg_class_contents[CLASS2][0]) == 0)
434 /* The same information, inverted:
435 Return the class number of the smallest class containing
436 reg number REGNO. This could be a conditional expression
437 or could index an array. */
439 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
441 /* The class value for index registers, and the one for base regs. */
443 #define INDEX_REG_CLASS GENERAL_REGS
444 #define BASE_REG_CLASS GEN_AND_MEM_REGS
446 /* Get reg_class from a letter such as appears in the machine description. */
448 #define REG_CLASS_FROM_LETTER(C) \
449 ((C) == 'u' ? FLOAT_REG0 \
450 : (C) == 'v' ? LONG_FLOAT_REG0 \
451 : (C) == 'f' ? FLOAT_REGS \
452 : (C) == 'l' ? FP_REGS \
453 : (C) == 'x' ? FRAME_POINTER_REG \
454 : (C) == 'y' ? STACK_POINTER_REG \
457 /* The letters I, J, K, L and M in a register constraint string
458 can be used to stand for particular ranges of immediate operands.
459 This macro defines what the ranges are.
460 C is the letter, and VALUE is a constant value.
461 Return 1 if VALUE is in the range specified by C.
463 On the ns32k, these letters are used as follows:
465 I : Matches integers which are valid shift amounts for scaled indexing.
466 These are 0, 1, 2, 3 for byte, word, double, and quadword.
467 Used for matching arithmetic shifts only on 32032 & 32332.
468 J : Matches integers which fit a "quick" operand.
469 K : Matches integers 0 to 7 (for inss and exts instructions).
472 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
473 ((VALUE) < 8 && (VALUE) + 8 >= 0 ? \
474 ((C) == 'I' ? (!TARGET_32532 && 0 <= (VALUE) && (VALUE) <= 3) : \
475 (C) == 'J' ? (VALUE) <= 7 : \
476 (C) == 'K' ? 0 <= (VALUE) : 0) : 0)
478 /* Similar, but for floating constants, and defining letters G and H.
479 Here VALUE is the CONST_DOUBLE rtx itself. */
481 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
483 /* Given an rtx X being reloaded into a reg required to be
484 in class CLASS, return the class of reg to actually use.
485 In general this is just CLASS; but on some machines
486 in some cases it is preferable to use a more restrictive class. */
488 /* We return GENERAL_REGS instead of GEN_AND_MEM_REGS.
489 The latter offers no real additional possibilities
490 and can cause spurious secondary reloading. */
492 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
493 ((CLASS) == GEN_AND_MEM_REGS ? GENERAL_REGS : (CLASS))
495 /* Return the maximum number of consecutive registers
496 needed to represent mode MODE in a register of class CLASS. */
497 /* On the 32000, this is the size of MODE in words */
499 #define CLASS_MAX_NREGS(CLASS, MODE) \
500 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
502 /* Stack layout; function entry, exit and calling. */
504 /* Define this if pushing a word on the stack
505 makes the stack pointer a smaller address. */
506 #define STACK_GROWS_DOWNWARD
508 /* Define this if the nominal address of the stack frame
509 is at the high-address end of the local variables;
510 that is, each additional local variable allocated
511 goes at a more negative offset in the frame. */
512 #define FRAME_GROWS_DOWNWARD
514 /* Offset within stack frame to start allocating local variables at.
515 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
516 first local allocated. Otherwise, it is the offset to the BEGINNING
517 of the first local allocated. */
518 #define STARTING_FRAME_OFFSET 0
520 /* A C expression whose value is RTL representing the location of the
521 incoming return address at the beginning of any function, before
522 the prologue. This RTL is either a `REG', indicating that the
523 return value is saved in `REG', or a `MEM' representing a location
526 You only need to define this macro if you want to support call
527 frame debugging information like that provided by DWARF 2.
529 Before the prologue, RA is at 0(sp). */
531 #define INCOMING_RETURN_ADDR_RTX \
532 gen_rtx (MEM, VOIDmode, gen_rtx (REG, VOIDmode, STACK_POINTER_REGNUM))
534 /* A C expression whose value is RTL representing the value of the
535 return address for the frame COUNT steps up from the current frame,
536 after the prologue. FRAMEADDR is the frame pointer of the COUNT
537 frame, or the frame pointer of the COUNT - 1 frame if
538 `RETURN_ADDR_IN_PREVIOUS_FRAME' is defined.
540 After the prologue, RA is at 4(fp) in the current frame. */
542 #define RETURN_ADDR_RTX(COUNT, FRAME) \
543 (gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, (FRAME), GEN_INT(4))))
545 /* A C expression whose value is an integer giving the offset, in
546 bytes, from the value of the stack pointer register to the top of
547 the stack frame at the beginning of any function, before the
548 prologue. The top of the frame is defined to be the value of the
549 stack pointer in the previous frame, just before the call
552 You only need to define this macro if you want to support call
553 frame debugging information like that provided by DWARF 2. */
555 #define INCOMING_FRAME_SP_OFFSET 4
557 /* If we generate an insn to push BYTES bytes,
558 this says how many the stack pointer really advances by.
559 On the 32000, sp@- in a byte insn really pushes a BYTE. */
560 #define PUSH_ROUNDING(BYTES) (BYTES)
562 /* Offset of first parameter from the argument pointer register value. */
563 #define FIRST_PARM_OFFSET(FNDECL) 8
565 /* Value is the number of byte of arguments automatically
566 popped when returning from a subroutine call.
567 FUNDECL is the declaration node of the function (as a tree),
568 FUNTYPE is the data type of the function (as a tree),
569 or for a library call it is an identifier node for the subroutine name.
570 SIZE is the number of bytes of arguments passed on the stack.
572 On the 32000, the RET insn may be used to pop them if the number
573 of args is fixed, but if the number is variable then the caller
574 must pop them all. RET can't be used for library calls now
575 because the library is compiled with the Unix compiler.
576 Use of RET is a selectable option, since it is incompatible with
577 standard Unix calling sequences. If the option is not selected,
578 the caller must always pop the args.
580 The attribute stdcall is equivalent to RTD on a per module basis. */
582 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
583 (ns32k_return_pops_args (FUNDECL, FUNTYPE, SIZE))
585 /* Define how to find the value returned by a function.
586 VALTYPE is the data type of the value (as a tree).
587 If the precise function being called is known, FUNC is its FUNCTION_DECL;
588 otherwise, FUNC is 0. */
590 /* On the 32000 the return value is in R0,
591 or perhaps in F0 if there is fp support. */
593 #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE(TYPE_MODE (VALTYPE))
595 /* Define how to find the value returned by a library function
596 assuming the value has mode MODE. */
598 /* On the 32000 the return value is in R0,
599 or perhaps F0 is there is fp support. */
601 #define LIBCALL_VALUE(MODE) \
603 FLOAT_MODE_P(MODE) && TARGET_32081 ? F0_REGNUM: R0_REGNUM)
605 /* Define this if PCC uses the nonreentrant convention for returning
606 structure and union values. */
608 #define PCC_STATIC_STRUCT_RETURN
610 /* 1 if N is a possible register number for a function value.
611 On the 32000, R0 and F0 are the only registers thus used. */
613 #define FUNCTION_VALUE_REGNO_P(N) (((N) & ~8) == 0)
615 /* 1 if N is a possible register number for function argument passing.
616 On the 32000, no registers are used in this way. */
618 #define FUNCTION_ARG_REGNO_P(N) 0
620 /* Define a data type for recording info about an argument list
621 during the scan of that argument list. This data type should
622 hold all necessary information about the function itself
623 and about the args processed so far, enough to enable macros
624 such as FUNCTION_ARG to determine where the next arg should go.
626 On the ns32k, this is a single integer, which is a number of bytes
627 of arguments scanned so far. */
629 #define CUMULATIVE_ARGS int
631 /* Initialize a variable CUM of type CUMULATIVE_ARGS
632 for a call to a function whose data type is FNTYPE.
633 For a library call, FNTYPE is 0.
635 On the ns32k, the offset starts at 0. */
637 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
640 /* Update the data in CUM to advance over an argument
641 of mode MODE and data type TYPE.
642 (TYPE is null for libcalls where that information may not be available.) */
644 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
645 ((CUM) += ((MODE) != BLKmode \
646 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
647 : (int_size_in_bytes (TYPE) + 3) & ~3))
649 /* Define where to put the arguments to a function.
650 Value is zero to push the argument on the stack,
651 or a hard register in which to store the argument.
653 MODE is the argument's machine mode.
654 TYPE is the data type of the argument (as a tree).
655 This is null for libcalls where that information may
657 CUM is a variable of type CUMULATIVE_ARGS which gives info about
658 the preceding args and about the function being called.
659 NAMED is nonzero if this argument is a named parameter
660 (otherwise it is an extra parameter matching an ellipsis). */
662 /* On the 32000 all args are pushed, except if -mregparm is specified
663 then the first two words of arguments are passed in r0, r1.
664 *NOTE* -mregparm does not work.
665 It exists only to test register calling conventions. */
667 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
668 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx_REG ((MODE), (CUM) / 4) : 0)
670 /* For an arg passed partly in registers and partly in memory,
671 this is the number of registers used.
672 For args passed entirely in registers or entirely in memory, zero. */
674 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
675 ((TARGET_REGPARM && (CUM) < 8 \
676 && 8 < ((CUM) + ((MODE) == BLKmode \
677 ? int_size_in_bytes (TYPE) \
678 : GET_MODE_SIZE (MODE)))) \
681 #ifndef MAIN_FUNCTION_PROLOGUE
682 #define MAIN_FUNCTION_PROLOGUE
686 * The function prologue for the ns32k is fairly simple.
687 * If a frame pointer is needed (decided in reload.c ?) then
688 * we need assembler of the form
690 * # Save the oldframe pointer, set the new frame pointer, make space
691 * # on the stack and save any general purpose registers necessary
693 * enter [<general purpose regs to save>], <local stack space>
695 * movf fn, tos # Save any floating point registers necessary
699 * If a frame pointer is not needed we need assembler of the form
701 * # Make space on the stack
703 * adjspd <local stack space + 4>
705 * # Save any general purpose registers necessary
707 * save [<general purpose regs to save>]
709 * movf fn, tos # Save any floating point registers necessary
713 #if defined(IMMEDIATE_PREFIX) && IMMEDIATE_PREFIX
714 #define ADJSP(FILE, N) \
715 fprintf (FILE, "\tadjspd %c%d\n", IMMEDIATE_PREFIX, (N))
717 #define ADJSP(FILE, N) \
718 fprintf (FILE, "\tadjspd %d\n", (N))
721 #define FUNCTION_PROLOGUE(FILE, SIZE) \
722 { register int regno, g_regs_used = 0; \
723 int used_regs_buf[8], *bufp = used_regs_buf; \
724 int used_fregs_buf[17], *fbufp = used_fregs_buf; \
725 extern char call_used_regs[]; \
726 MAIN_FUNCTION_PROLOGUE; \
727 for (regno = R0_REGNUM; regno < F0_REGNUM; regno++) \
728 if (regs_ever_live[regno] \
729 && ! call_used_regs[regno]) \
731 *bufp++ = regno; g_regs_used++; \
734 for (; regno < FRAME_POINTER_REGNUM; regno++) \
735 if (regs_ever_live[regno] && !call_used_regs[regno]) \
740 bufp = used_regs_buf; \
741 if (frame_pointer_needed) \
742 fprintf (FILE, "\tenter ["); \
746 ADJSP (FILE, SIZE + 4); \
747 if (g_regs_used && g_regs_used > 4) \
748 fprintf (FILE, "\tsave ["); \
752 fprintf (FILE, "\tmovd r%d,tos\n", *bufp++); \
758 fprintf (FILE, "r%d", *bufp++); \
762 if (frame_pointer_needed) \
763 fprintf (FILE, "],%d\n", SIZE); \
764 else if (g_regs_used) \
765 fprintf (FILE, "]\n"); \
766 fbufp = used_fregs_buf; \
767 while (*fbufp >= 0) \
769 if ((*fbufp & 1) || (fbufp[0] != fbufp[1] - 1)) \
770 fprintf (FILE, "\tmovf %s,tos\n", ns32k_out_reg_names[*fbufp++]); \
773 fprintf (FILE, "\tmovl %s,tos\n", \
774 ns32k_out_reg_names[fbufp[0]]); \
778 if (flag_pic && current_function_uses_pic_offset_table) \
780 fprintf (FILE, "\tsprd sb,tos\n"); \
781 if (TARGET_REGPARM) \
783 fprintf (FILE, "\taddr __GLOBAL_OFFSET_TABLE_(pc),tos\n"); \
784 fprintf (FILE, "\tlprd sb,tos\n"); \
788 fprintf (FILE, "\taddr __GLOBAL_OFFSET_TABLE_(pc),r0\n"); \
789 fprintf (FILE, "\tlprd sb,r0\n"); \
794 /* Output assembler code to FILE to increment profiler label # LABELNO
795 for profiling a function entry.
797 THIS DEFINITION FOR THE 32000 IS A GUESS. IT HAS NOT BEEN TESTED. */
799 #define FUNCTION_PROFILER(FILE, LABELNO) \
800 fprintf (FILE, "\taddr LP%d,r0\n\tbsr mcount\n", (LABELNO))
802 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
803 the stack pointer does not matter. The value is tested only in
804 functions that have frame pointers.
805 No definition is equivalent to always zero.
807 We use 0, because using 1 requires hair in FUNCTION_EPILOGUE
808 that is worse than the stack adjust we could save. */
810 /* #define EXIT_IGNORE_STACK 1 */
812 /* This macro generates the assembly code for function exit,
813 on machines that need it. If FUNCTION_EPILOGUE is not defined
814 then individual return instructions are generated for each
815 return statement. Args are same as for FUNCTION_PROLOGUE.
817 The function epilogue should not depend on the current stack pointer,
818 if EXIT_IGNORE_STACK is nonzero. That doesn't apply here.
820 If a frame pointer is needed (decided in reload.c ?) then
821 we need assembler of the form
823 movf tos, fn # Restore any saved floating point registers
827 # Restore any saved general purpose registers, restore the stack
828 # pointer from the frame pointer, restore the old frame pointer.
829 exit [<general purpose regs to save>]
831 If a frame pointer is not needed we need assembler of the form
832 # Restore any general purpose registers saved
834 movf tos, fn # Restore any saved floating point registers
838 restore [<general purpose regs to save>]
840 # reclaim space allocated on stack
842 adjspd <-(local stack space + 4)> */
845 #define FUNCTION_EPILOGUE(FILE, SIZE) \
846 { register int regno, g_regs_used = 0, f_regs_used = 0; \
847 int used_regs_buf[8], *bufp = used_regs_buf; \
848 int used_fregs_buf[17], *fbufp = used_fregs_buf; \
849 extern char call_used_regs[]; \
850 if (flag_pic && current_function_uses_pic_offset_table) \
851 fprintf (FILE, "\tlprd sb,tos\n"); \
853 for (regno = F0_REGNUM; regno < FRAME_POINTER_REGNUM; regno++) \
854 if (regs_ever_live[regno] && !call_used_regs[regno]) \
856 *fbufp++ = regno; f_regs_used++; \
859 for (regno = 0; regno < F0_REGNUM; regno++) \
860 if (regs_ever_live[regno] \
861 && ! call_used_regs[regno]) \
863 *bufp++ = regno; g_regs_used++; \
865 while (fbufp > used_fregs_buf) \
867 if ((*fbufp & 1) && fbufp[0] == fbufp[-1] + 1) \
869 fprintf (FILE, "\tmovl tos,%s\n", \
870 ns32k_out_reg_names[fbufp[-1]]); \
873 else fprintf (FILE, "\tmovf tos,%s\n", ns32k_out_reg_names[*fbufp--]); \
875 if (frame_pointer_needed) \
876 fprintf (FILE, "\texit ["); \
879 if (g_regs_used && g_regs_used > 4) \
880 fprintf (FILE, "\trestore ["); \
883 while (bufp > used_regs_buf) \
884 fprintf (FILE, "\tmovd tos,r%d\n", *--bufp); \
888 while (bufp > used_regs_buf) \
890 fprintf (FILE, "r%d", *--bufp); \
891 if (bufp > used_regs_buf) \
894 if (g_regs_used || frame_pointer_needed) \
895 fprintf (FILE, "]\n"); \
896 if (SIZE && !frame_pointer_needed) \
897 ADJSP (FILE, -(SIZE + 4)); \
898 if (current_function_pops_args) \
899 fprintf (FILE, "\tret %d\n", current_function_pops_args); \
900 else fprintf (FILE, "\tret 0\n"); }
902 /* Store in the variable DEPTH the initial difference between the
903 frame pointer reg contents and the stack pointer reg contents,
904 as of the start of the function body. This depends on the layout
905 of the fixed parts of the stack frame and on how registers are saved. */
907 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
911 for (regno = 0; regno < L1_REGNUM; regno++) \
912 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
914 for (; regno < FRAME_POINTER_REGNUM; regno++) \
915 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
917 if (flag_pic && current_function_uses_pic_offset_table) \
919 (DEPTH) = (offset + get_frame_size () \
920 + (get_frame_size () == 0 ? 0 : 4)); \
924 /* Output assembler code for a block containing the constant parts
925 of a trampoline, leaving space for the variable parts. */
927 /* On the 32k, the trampoline looks like this:
932 Doing trampolines with a library assist function is easier than figuring
933 out how to do stores to memory in reverse byte order (the way immediate
934 operands on the 32k are stored). */
936 #define TRAMPOLINE_TEMPLATE(FILE) \
938 fprintf (FILE, "\taddr 0(pc),r2\n" ); \
939 fprintf (FILE, "\tjump " ); \
940 PUT_ABSOLUTE_PREFIX (FILE); \
941 fprintf (FILE, "__trampoline\n" ); \
942 ASM_OUTPUT_INT (FILE, const0_rtx); \
943 ASM_OUTPUT_INT (FILE, const0_rtx); \
946 /* Length in units of the trampoline for entering a nested function. */
948 #define TRAMPOLINE_SIZE 20
950 /* Emit RTL insns to initialize the variable parts of a trampoline.
951 FNADDR is an RTX for the address of the function's pure code.
952 CXT is an RTX for the static chain value for the function. */
954 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
956 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
957 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
960 /* This is the library routine that is used
961 to transfer control from the trampoline
962 to the actual nested function. */
964 /* The function name __transfer_from_trampoline is not actually used.
965 The function definition just permits use of "asm with operands"
966 (though the operand list is empty). */
967 #define TRANSFER_FROM_TRAMPOLINE \
969 __transfer_from_trampoline () \
971 asm (".globl __trampoline"); \
972 asm ("__trampoline:"); \
973 asm ("movd 16(r2),tos"); \
974 asm ("movd 12(r2),r1"); \
978 /* Addressing modes, and classification of registers for them. */
980 /* #define HAVE_POST_INCREMENT 0 */
981 /* #define HAVE_POST_DECREMENT 0 */
983 /* #define HAVE_PRE_DECREMENT 0 */
984 /* #define HAVE_PRE_INCREMENT 0 */
986 /* Macros to check register numbers against specific register classes. */
988 /* These assume that REGNO is a hard or pseudo reg number.
989 They give nonzero only if REGNO is a hard reg of the suitable class
990 or a pseudo reg currently allocated to a suitable hard reg.
991 Since they use reg_renumber, they are safe only once reg_renumber
992 has been allocated, which happens in local-alloc.c. */
994 /* note that FP and SP cannot be used as an index. What about PC? */
995 #define REGNO_OK_FOR_INDEX_P(REGNO) \
996 ((REGNO) < F0_REGNUM || (unsigned)reg_renumber[REGNO] < F0_REGNUM)
997 #define REGNO_OK_FOR_BASE_P(REGNO) \
998 ((REGNO) < F0_REGNUM || (unsigned)reg_renumber[REGNO] < F0_REGNUM \
999 || (REGNO) == FRAME_POINTER_REGNUM || (REGNO) == STACK_POINTER_REGNUM)
1001 #define FP_REG_P(X) \
1002 (GET_CODE (X) == REG && REGNO (X) >= F0_REGNUM && REGNO (X) < FRAME_POINTER_REGNUM)
1004 /* Maximum number of registers that can appear in a valid memory address. */
1006 #define MAX_REGS_PER_ADDRESS 2
1008 /* Recognize any constant value that is a valid address.
1009 This might not work on future ns32k processors as negative
1010 displacements are not officially allowed but a mode reserved
1011 to National. This works on processors up to 32532, though,
1012 and we don't expect any new ones in the series ;-( */
1014 #define CONSTANT_ADDRESS_P(X) \
1015 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1016 || GET_CODE (X) == CONST \
1017 || (GET_CODE (X) == CONST_INT \
1018 && NS32K_DISPLACEMENT_P (INTVAL (X))))
1020 #define CONSTANT_ADDRESS_NO_LABEL_P(X) \
1021 (GET_CODE (X) == CONST_INT \
1022 && NS32K_DISPLACEMENT_P (INTVAL (X)))
1024 /* Return the register class of a scratch register needed to copy IN into
1025 or out of a register in CLASS in MODE. If it can be done directly,
1026 NO_REGS is returned. */
1028 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
1029 secondary_reload_class (CLASS, MODE, IN)
1031 /* Certain machines have the property that some registers cannot be
1032 copied to some other registers without using memory. Define this
1033 macro on those machines to be a C expression that is non-zero if
1034 objects of mode M in registers of CLASS1 can only be copied to
1035 registers of class CLASS2 by storing a register of CLASS1 into
1036 memory and loading that memory location into a register of CLASS2.
1038 On the ns32k, floating point regs can only be loaded through memory
1040 The movdf and movsf insns in ns32k.md copy between general and
1041 floating registers using the stack. In principle, we could get
1042 better code not allowing that case in the constraints and defining
1043 SECONDARY_MEMORY_NEEDED in practice, though the stack slots used
1044 are not available for optimization. */
1047 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, M) \
1048 secondary_memory_needed(CLASS1, CLASS2, M)
1051 /* SMALL_REGISTER_CLASSES is a run time option. This should no longer
1052 be necessay and should go when we have confidence that we won't run
1053 out of spill registers */
1054 #define SMALL_REGISTER_CLASSES (target_flags & 1024)
1056 /* A C expression whose value is nonzero if pseudos that have been
1057 assigned to registers of class CLASS would likely be spilled
1058 because registers of CLASS are needed for spill registers.
1060 The default definition won't do because class LONG_FLOAT_REG0 has two
1061 registers which are always acessed as a pair */
1063 #define CLASS_LIKELY_SPILLED_P(CLASS) \
1064 (reg_class_size[(int) (CLASS)] == 1 || (CLASS) == LONG_FLOAT_REG0)
1067 /* Nonzero if the constant value X is a legitimate general operand.
1068 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1070 #define LEGITIMATE_CONSTANT_P(X) 1
1072 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1073 and check its validity for a certain class.
1074 We have two alternate definitions for each of them.
1075 The usual definition accepts all pseudo regs; the other rejects
1076 them unless they have been allocated suitable hard regs.
1077 The symbol REG_OK_STRICT causes the latter definition to be used.
1079 Most source files want to accept pseudo regs in the hope that
1080 they will get allocated to the class that the insn wants them to be in.
1081 Source files for reload pass need to be strict.
1082 After reload, it makes no difference, since pseudo regs have
1083 been eliminated by then. */
1085 #ifndef REG_OK_STRICT
1087 /* Nonzero if X is a hard reg that can be used as an index
1088 or if it is a pseudo reg. */
1089 #define REG_OK_FOR_INDEX_P(X) \
1090 (REGNO (X) < F0_REGNUM || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1091 /* Nonzero if X is a hard reg that can be used as a base reg
1092 of if it is a pseudo reg. */
1093 #define REG_OK_FOR_BASE_P(X) (REGNO (X) < F0_REGNUM || REGNO (X) >= FRAME_POINTER_REGNUM)
1094 /* Nonzero if X is a floating point reg or a pseudo reg. */
1098 /* Nonzero if X is a hard reg that can be used as an index. */
1099 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1100 /* Nonzero if X is a hard reg that can be used as a base reg. */
1101 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1105 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1106 that is a valid memory address for an instruction.
1107 The MODE argument is the machine mode for the MEM expression
1108 that wants to use this address.
1110 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
1112 /* 1 if X is an address that we could indirect through. */
1113 /***** NOTE ***** There is a bug in the Sequent assembler which fails
1114 to fixup addressing information for symbols used as offsets
1115 from registers which are not FP or SP (or SB or PC). This
1116 makes _x(fp) valid, while _x(r0) is invalid. */
1118 #define INDIRECTABLE_1_ADDRESS_P(X) \
1119 (CONSTANT_ADDRESS_P (X) \
1120 || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1121 || (GET_CODE (X) == PLUS \
1122 && GET_CODE (XEXP (X, 0)) == REG \
1123 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1124 && ((flag_pic || TARGET_HIMEM) ? \
1125 CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1)) \
1127 CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1128 && (GET_CODE (X) != CONST_INT || NS32K_DISPLACEMENT_P (INTVAL (X)))))
1130 /* 1 if integer I will fit in a 4 byte displacement field.
1131 Strictly speaking, we can't be sure that a symbol will fit this range.
1132 But, in practice, it always will. */
1134 /* idall@eleceng.adelaide.edu.au says that the 32016 and 32032
1135 can handle the full range of displacements--it is only the addresses
1136 that have a limited range. So the following was deleted:
1137 (((i) <= 16777215 && (i) >= -16777216)
1138 || ((TARGET_32532 || TARGET_32332) && ...)) */
1139 #define NS32K_DISPLACEMENT_P(i) \
1140 ((i) < (1 << 29) && (i) >= - (1 << 29))
1142 /* Check for frame pointer or stack pointer. */
1143 #define MEM_REG(X) \
1144 (GET_CODE (X) == REG && (REGNO (X) == FRAME_POINTER_REGNUM \
1145 || REGNO(X) == STACK_POINTER_REGNUM))
1147 /* A memory ref whose address is the FP or SP, with optional integer offset,
1148 or (on certain machines) a constant address. */
1149 #define INDIRECTABLE_2_ADDRESS_P(X) \
1150 (GET_CODE (X) == MEM \
1151 && (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0)) \
1152 || (GET_CODE (xfoo0) == PLUS \
1153 && MEM_REG (XEXP (xfoo0, 0)) \
1154 && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1)))) \
1155 || (TARGET_SB && CONSTANT_ADDRESS_P (xfoo0))))
1157 /* Go to ADDR if X is a valid address not using indexing.
1158 (This much is the easy part.) */
1159 #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
1161 if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; \
1162 if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
1163 if (GET_CODE (X) == PLUS) \
1164 if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1))) \
1165 if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))) \
1169 /* Go to ADDR if X is a valid address not using indexing.
1170 (This much is the easy part.) */
1171 #define GO_IF_INDEXING(X, MODE, ADDR) \
1172 { register rtx xfoob = (X); \
1173 if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 0), MODE)) \
1174 GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 1), ADDR); \
1175 if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 1), MODE)) \
1176 GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 0), ADDR); } \
1178 #define GO_IF_INDEXABLE_ADDRESS(X, ADDR) \
1179 { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; \
1180 if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
1181 if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; \
1184 /* 1 if PROD is either a reg times size of mode MODE
1185 or just a reg, if MODE is just one byte. Actually, on the ns32k,
1186 since the index mode is independent of the operand size,
1187 we can match more stuff...
1189 This macro's expansion uses the temporary variables xfoo0, xfoo1
1190 and xfoo2 that must be declared in the surrounding context. */
1191 #define INDEX_TERM_P(PROD, MODE) \
1192 ((GET_CODE (PROD) == REG && REG_OK_FOR_INDEX_P (PROD)) \
1193 || (GET_CODE (PROD) == MULT \
1194 && (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \
1195 (GET_CODE (xfoo1) == CONST_INT \
1196 && GET_CODE (xfoo0) == REG \
1197 && FITS_INDEX_RANGE (INTVAL (xfoo1)) \
1198 && REG_OK_FOR_INDEX_P (xfoo0)))))
1200 #define FITS_INDEX_RANGE(X) \
1201 ((xfoo2 = (unsigned)(X)-1), \
1202 ((xfoo2 < 4 && xfoo2 != 2) || xfoo2 == 7))
1204 /* Note that xfoo0, xfoo1, xfoo2 are used in some of the submacros above. */
1205 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1206 { register rtx xfooy, xfoo0, xfoo1; \
1209 if (flag_pic && cfun && ! current_function_uses_pic_offset_table \
1210 && global_symbolic_reference_mentioned_p (X, 1)) \
1211 current_function_uses_pic_offset_table = 1; \
1212 GO_IF_NONINDEXED_ADDRESS (xfooy, ADDR); \
1213 if (GET_CODE (xfooy) == PLUS) \
1215 if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 1)) \
1216 && GET_CODE (XEXP (xfooy, 0)) == PLUS) \
1217 xfooy = XEXP (xfooy, 0); \
1218 else if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 0)) \
1219 && GET_CODE (XEXP (xfooy, 1)) == PLUS) \
1220 xfooy = XEXP (xfooy, 1); \
1221 GO_IF_INDEXING (xfooy, MODE, ADDR); \
1223 else if (INDEX_TERM_P (xfooy, MODE)) \
1225 else if (GET_CODE (xfooy) == PRE_DEC) \
1227 if (REGNO (XEXP (xfooy, 0)) == STACK_POINTER_REGNUM) goto ADDR; \
1232 /* Try machine-dependent ways of modifying an illegitimate address
1233 to be legitimate. If we find one, return the new, valid address.
1234 This macro is used in only one place: `memory_address' in explow.c.
1236 OLDX is the address as it was before break_out_memory_refs was called.
1237 In some cases it is useful to look at this to decide what needs to be done.
1239 MODE and WIN are passed so that this macro can use
1240 GO_IF_LEGITIMATE_ADDRESS.
1242 It is always safe for this macro to do nothing. It exists to recognize
1243 opportunities to optimize the output.
1245 For the ns32k, we do nothing */
1247 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
1249 /* Nonzero if the constant value X is a legitimate general operand
1250 when generating PIC code. It is given that flag_pic is on and
1251 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1253 #define LEGITIMATE_PIC_OPERAND_P(X) \
1254 (((! current_function_uses_pic_offset_table \
1255 && symbolic_reference_mentioned_p (X))? \
1256 (current_function_uses_pic_offset_table = 1):0 \
1257 ), (! SYMBOLIC_CONST (X) \
1258 || GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF))
1260 #define SYMBOLIC_CONST(X) \
1261 (GET_CODE (X) == SYMBOL_REF \
1262 || GET_CODE (X) == LABEL_REF \
1263 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1265 /* Define this macro if references to a symbol must be treated
1266 differently depending on something about the variable or
1267 function named by the symbol (such as what section it is in).
1269 On the ns32k, if using PIC, mark a SYMBOL_REF for a non-global
1270 symbol or a code symbol. These symbols are referenced via pc
1273 #define ENCODE_SECTION_INFO(DECL) \
1276 extern int flag_pic; \
1279 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1280 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1281 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1282 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1283 || ! TREE_PUBLIC (DECL)); \
1288 /* Go to LABEL if ADDR (a legitimate address expression)
1289 has an effect that depends on the machine mode it is used for.
1290 On the ns32k, only predecrement and postincrement address depend thus
1291 (the amount of decrement or increment being the length of the operand). */
1293 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1294 { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
1297 /* Specify the machine mode that this machine uses
1298 for the index in the tablejump instruction.
1299 HI mode is more efficient but the range is not wide enough for
1301 #define CASE_VECTOR_MODE SImode
1303 /* Define as C expression which evaluates to nonzero if the tablejump
1304 instruction expects the table to contain offsets from the address of the
1306 Do not define this if the table should contain absolute addresses. */
1307 #define CASE_VECTOR_PC_RELATIVE 1
1309 /* Specify the tree operation to be used to convert reals to integers. */
1310 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1312 /* This is the kind of divide that is easiest to do in the general case. */
1313 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1315 /* Define this as 1 if `char' should by default be signed; else as 0. */
1316 #define DEFAULT_SIGNED_CHAR 1
1318 /* Max number of bytes we can move from memory to memory
1319 in one reasonably fast instruction. */
1322 /* The number of scalar move insns which should be generated instead
1323 of a string move insn or a library call.
1325 We have a smart movstrsi insn */
1326 #define MOVE_RATIO 0
1328 /* Define this if zero-extension is slow (more than one real instruction). */
1329 /* #define SLOW_ZERO_EXTEND */
1331 /* Nonzero if access to memory by bytes is slow and undesirable. */
1332 #define SLOW_BYTE_ACCESS 0
1334 /* Define if shifts truncate the shift count
1335 which implies one can omit a sign-extension or zero-extension
1336 of a shift count. */
1337 /* #define SHIFT_COUNT_TRUNCATED */
1339 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1340 is done just by pretending it is already truncated. */
1341 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1343 /* We assume that the store-condition-codes instructions store 0 for false
1344 and some other value for true. This is the value stored for true. */
1346 #define STORE_FLAG_VALUE 1
1348 /* Specify the machine mode that pointers have.
1349 After generation of rtl, the compiler makes no further distinction
1350 between pointers and any other objects of this machine mode. */
1351 #define Pmode SImode
1353 /* A function address in a call instruction
1354 is a byte address (for indexing purposes)
1355 so give the MEM rtx a byte's mode. */
1356 #define FUNCTION_MODE QImode
1358 /* Compute the cost of address ADDRESS. */
1360 #define ADDRESS_COST(RTX) calc_address_cost (RTX)
1362 /* Compute the cost of computing a constant rtl expression RTX
1363 whose rtx-code is CODE. The body of this macro is a portion
1364 of a switch statement. If the code is computed here,
1365 return it with a return statement. Otherwise, break from the switch. */
1367 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1369 if (INTVAL (RTX) <= 7 && INTVAL (RTX) >= -8) return 0; \
1370 if (INTVAL (RTX) < 0x2000 && INTVAL (RTX) >= -0x2000) \
1376 case CONST_DOUBLE: \
1379 /* Tell final.c how to eliminate redundant test instructions. */
1381 /* Here we define machine-dependent flags and fields in cc_status
1382 (see `conditions.h'). */
1384 /* This bit means that what ought to be in the Z bit
1385 should be tested in the F bit. */
1386 #define CC_Z_IN_F 04000
1388 /* This bit means that what ought to be in the Z bit
1389 is complemented in the F bit. */
1390 #define CC_Z_IN_NOT_F 010000
1392 /* Store in cc_status the expressions
1393 that the condition codes will describe
1394 after execution of an instruction whose pattern is EXP.
1395 Do not alter them if the instruction would not alter the cc's. */
1397 #define NOTICE_UPDATE_CC(EXP, INSN) \
1398 { if (GET_CODE (EXP) == SET) \
1399 { if (GET_CODE (SET_DEST (EXP)) == CC0) \
1400 { cc_status.flags = 0; \
1401 cc_status.value1 = SET_DEST (EXP); \
1402 cc_status.value2 = SET_SRC (EXP); \
1404 else if (GET_CODE (SET_SRC (EXP)) == CALL) \
1405 { CC_STATUS_INIT; } \
1406 else if (GET_CODE (SET_DEST (EXP)) == REG) \
1407 { if (cc_status.value1 \
1408 && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \
1409 cc_status.value1 = 0; \
1410 if (cc_status.value2 \
1411 && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \
1412 cc_status.value2 = 0; \
1414 else if (GET_CODE (SET_DEST (EXP)) == MEM) \
1415 { CC_STATUS_INIT; } \
1417 else if (GET_CODE (EXP) == PARALLEL \
1418 && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1419 { if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == CC0) \
1420 { cc_status.flags = 0; \
1421 cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
1422 cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \
1424 else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \
1425 { if (cc_status.value1 \
1426 && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \
1427 cc_status.value1 = 0; \
1428 if (cc_status.value2 \
1429 && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \
1430 cc_status.value2 = 0; \
1432 else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \
1433 { CC_STATUS_INIT; } \
1435 else if (GET_CODE (EXP) == CALL) \
1436 { /* all bets are off */ CC_STATUS_INIT; } \
1437 else { /* nothing happens? CC_STATUS_INIT; */} \
1438 if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
1439 && cc_status.value2 \
1440 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
1444 /* Describe the costs of the following register moves which are discouraged:
1445 1.) Moves between the Floating point registers and the frame pointer and stack pointer
1446 2.) Moves between the stack pointer and the frame pointer
1447 3.) Moves between the floating point and general registers
1449 These all involve two memory references. This is worse than a memory
1450 to memory move (default cost 4)
1453 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1454 register_move_cost (CLASS1, CLASS2)
1456 #define OUTPUT_JUMP(NORMAL, NO_OV) \
1457 { if (cc_status.flags & CC_NO_OVERFLOW) \
1461 /* Dividing the output into sections */
1463 /* Output before read-only data. */
1465 #define TEXT_SECTION_ASM_OP "\t.text"
1467 /* Output before writable data. */
1469 #define DATA_SECTION_ASM_OP "\t.data"
1471 /* Define the output Assembly Language */
1473 /* Output at beginning of assembler file. */
1475 #define ASM_FILE_START(FILE) fprintf (FILE, "#NO_APP\n");
1477 /* Output to assembler file text saying following lines
1478 may contain character constants, extra white space, comments, etc. */
1480 #define ASM_APP_ON "#APP\n"
1482 /* Output to assembler file text saying following lines
1483 no longer contain unusual constructs. */
1485 #define ASM_APP_OFF "#NO_APP\n"
1487 /* Output of Data */
1489 /* This is how to output an assembler line defining a `double' constant. */
1491 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1492 fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1494 /* This is how to output an assembler line defining a `float' constant. */
1496 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1497 fprintf (FILE, "\t.float 0f%.20e\n", (VALUE))
1499 /* This is how to output an assembler line defining an `int' constant. */
1501 #define ASM_OUTPUT_INT(FILE,VALUE) \
1502 ( fprintf (FILE, "\t.long "), \
1503 output_addr_const (FILE, (VALUE)), \
1504 fprintf (FILE, "\n"))
1506 /* Likewise for `char' and `short' constants. */
1508 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1509 ( fprintf (FILE, "\t.word "), \
1510 output_addr_const (FILE, (VALUE)), \
1511 fprintf (FILE, "\n"))
1513 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1514 ( fprintf (FILE, "\t.byte "), \
1515 output_addr_const (FILE, (VALUE)), \
1516 fprintf (FILE, "\n"))
1518 /* This is how to output an assembler line for a numeric constant byte. */
1520 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1521 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1523 /* This is how to output an assembler line defining an external/static
1524 address which is not in tree format (for collect.c). */
1526 /* The prefix to add to user-visible assembler symbols. */
1527 #define USER_LABEL_PREFIX "_"
1529 /* This is how to output an insn to push a register on the stack.
1530 It need not be very fast code. */
1532 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1533 fprintf (FILE, "\tmovd %s,tos\n", reg_names[REGNO])
1535 /* This is how to output an insn to pop a register from the stack.
1536 It need not be very fast code. */
1538 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1539 fprintf (FILE, "\tmovd tos,%s\n", reg_names[REGNO])
1541 /* This is how to output the definition of a user-level label named NAME,
1542 such as the label on a static function or variable NAME. */
1545 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1546 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1548 #define ASM_OUTPUT_LABEL(STREAM,NAME) \
1550 fprintf (STREAM, "%s:\n", NAME); \
1554 /* This is how to output a command to make the user-level label named NAME
1555 defined for reference from other files. */
1558 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1559 do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1561 #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
1563 fprintf (STREAM, "\t.globl\t%s\n", NAME); \
1567 /* This is how to output an internal numbered label where
1568 PREFIX is the class of label and NUM is the number within the class. */
1570 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1571 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1573 /* This is how to store into the string LABEL
1574 the symbol_ref name of an internal numbered label where
1575 PREFIX is the class of label and NUM is the number within the class.
1576 This is suitable for output with `assemble_name'. */
1578 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1579 sprintf (LABEL, "*%s%ld", PREFIX, (long) NUM)
1581 /* This is how to align the code that follows an unconditional branch. */
1583 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (2)
1585 /* This is how to output an element of a case-vector that is absolute.
1586 (The ns32k does not use such vectors,
1587 but we must define this macro anyway.) */
1589 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1590 fprintf (FILE, "\t.long L%d\n", VALUE)
1592 /* This is how to output an element of a case-vector that is relative. */
1593 /* ** Notice that the second element is LI format! */
1594 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1595 fprintf (FILE, "\t.long L%d-LI%d\n", VALUE, REL)
1597 /* This is how to output an assembler line
1598 that says to advance the location counter
1599 to a multiple of 2**LOG bytes. */
1601 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1602 fprintf (FILE, "\t.align %d\n", (LOG))
1604 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1605 fprintf (FILE, "\t.space %u\n", (SIZE))
1607 /* This says how to output an assembler line
1608 to define a global common symbol. */
1610 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1611 ( fputs (".comm ", (FILE)), \
1612 assemble_name ((FILE), (NAME)), \
1613 fprintf ((FILE), ",%u\n", (ROUNDED)))
1615 /* This says how to output an assembler line
1616 to define a local common symbol. */
1618 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1619 ( fputs (".lcomm ", (FILE)), \
1620 assemble_name ((FILE), (NAME)), \
1621 fprintf ((FILE), ",%u\n", (ROUNDED)))
1623 /* Store in OUTPUT a string (made with alloca) containing
1624 an assembler-name for a local static variable named NAME.
1625 LABELNO is an integer which is different for each call. */
1627 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1628 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1629 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1631 /* Define the parentheses used to group arithmetic operations
1632 in assembler code. */
1634 #define ASM_OPEN_PAREN "("
1635 #define ASM_CLOSE_PAREN ")"
1637 /* Print an instruction operand X on file FILE.
1638 CODE is the code from the %-spec that requested printing this operand;
1639 if `%z3' was used to print operand 3, then CODE is 'z'. */
1641 /* %$ means print the prefix for an immediate operand. */
1643 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1644 ((CODE) == '$' || (CODE) == '?')
1646 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1648 /* Print a memory operand whose address is X, on file FILE. */
1650 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address(FILE, ADDR)
1652 extern unsigned int ns32k_reg_class_contents[N_REG_CLASSES][1];
1653 extern const char *const ns32k_out_reg_names[];
1654 extern enum reg_class regclass_map[]; /* smallest class containing REGNO */