1 /* Definitions of target machine for GNU compiler.
2 Matsushita MN10300 series
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
5 Contributed by Jeff Law (law@cygnus.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
27 #define LINK_SPEC "%{mrelax:--relax}"
29 #define STARTFILE_SPEC "%{!mno-crt0:%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}"
31 /* Names to predefine in the preprocessor for this target machine. */
33 #define TARGET_CPU_CPP_BUILTINS() \
36 builtin_define ("__mn10300__"); \
37 builtin_define ("__MN10300__"); \
38 builtin_assert ("cpu=mn10300"); \
39 builtin_assert ("machine=mn10300"); \
43 builtin_define ("__AM33__=4"); \
44 builtin_define ("__AM34__"); \
46 else if (TARGET_AM33_2) \
48 builtin_define ("__AM33__=2"); \
49 builtin_define ("__AM33_2__"); \
51 else if (TARGET_AM33) \
52 builtin_define ("__AM33__=1"); \
56 extern GTY(()) int mn10300_unspec_int_label_counter;
66 extern enum processor_type mn10300_processor;
67 extern enum processor_type mn10300_tune_cpu;
69 #define TARGET_AM33 (mn10300_processor >= PROCESSOR_AM33)
70 #define TARGET_AM33_2 (mn10300_processor >= PROCESSOR_AM33_2)
71 #define TARGET_AM34 (mn10300_processor >= PROCESSOR_AM34)
73 #ifndef PROCESSOR_DEFAULT
74 #define PROCESSOR_DEFAULT PROCESSOR_MN10300
77 /* Print subsidiary information on the compiler version in use. */
79 #define TARGET_VERSION fprintf (stderr, " (MN10300)");
82 /* Target machine storage layout */
84 /* Define this if most significant bit is lowest numbered
85 in instructions that operate on numbered bit-fields.
86 This is not true on the Matsushita MN1003. */
87 #define BITS_BIG_ENDIAN 0
89 /* Define this if most significant byte of a word is the lowest numbered. */
90 /* This is not true on the Matsushita MN10300. */
91 #define BYTES_BIG_ENDIAN 0
93 /* Define this if most significant word of a multiword number is lowest
95 This is not true on the Matsushita MN10300. */
96 #define WORDS_BIG_ENDIAN 0
98 /* Width of a word, in units (bytes). */
99 #define UNITS_PER_WORD 4
101 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
102 #define PARM_BOUNDARY 32
104 /* The stack goes in 32-bit lumps. */
105 #define STACK_BOUNDARY 32
107 /* Allocation boundary (in *bits*) for the code of a function.
108 8 is the minimum boundary; it's unclear if bigger alignments
109 would improve performance. */
110 #define FUNCTION_BOUNDARY 8
112 /* No data type wants to be aligned rounder than this. */
113 #define BIGGEST_ALIGNMENT 32
115 /* Alignment of field after `int : 0' in a structure. */
116 #define EMPTY_FIELD_BOUNDARY 32
118 /* Define this if move instructions will actually fail to work
119 when given unaligned data. */
120 #define STRICT_ALIGNMENT 1
122 /* Define this as 1 if `char' should by default be signed; else as 0. */
123 #define DEFAULT_SIGNED_CHAR 0
125 /* Standard register usage. */
127 /* Number of actual hardware registers.
128 The hardware registers are assigned numbers for the compiler
129 from 0 to just below FIRST_PSEUDO_REGISTER.
131 All registers that the compiler knows about must be given numbers,
132 even those that are not normally considered general registers. */
134 #define FIRST_PSEUDO_REGISTER 52
136 /* Specify machine-specific register numbers. The commented out entries
137 are defined in mn10300.md. */
138 #define FIRST_DATA_REGNUM 0
139 #define LAST_DATA_REGNUM 3
140 #define FIRST_ADDRESS_REGNUM 4
141 /* #define PIC_REG 6 */
142 #define LAST_ADDRESS_REGNUM 8
143 /* #define SP_REG 9 */
144 #define FIRST_EXTENDED_REGNUM 10
145 #define LAST_EXTENDED_REGNUM 17
146 #define FIRST_FP_REGNUM 18
147 #define LAST_FP_REGNUM 49
148 #define MDR_REGNUM 50
149 /* #define CC_REG 51 */
150 #define FIRST_ARGUMENT_REGNUM 0
152 /* Specify the registers used for certain standard purposes.
153 The values of these macros are register numbers. */
155 /* Register to use for pushing function arguments. */
156 #define STACK_POINTER_REGNUM (LAST_ADDRESS_REGNUM + 1)
158 /* Base register for access to local variables of the function. */
159 #define FRAME_POINTER_REGNUM (LAST_ADDRESS_REGNUM - 1)
161 /* Base register for access to arguments of the function. This
162 is a fake register and will be eliminated into either the frame
163 pointer or stack pointer. */
164 #define ARG_POINTER_REGNUM LAST_ADDRESS_REGNUM
166 /* Register in which static-chain is passed to a function. */
167 #define STATIC_CHAIN_REGNUM (FIRST_ADDRESS_REGNUM + 1)
169 /* 1 for registers that have pervasive standard uses
170 and are not available for the register allocator. */
172 #define FIXED_REGISTERS \
173 { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 \
174 , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
175 , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1 \
178 /* 1 for registers not available across function calls.
179 These must include the FIXED_REGISTERS and also any
180 registers that can be used without being saved.
181 The latter must include the registers where values are returned
182 and the register where structure-value addresses are passed.
183 Aside from that, you can include as many other registers as you
186 #define CALL_USED_REGISTERS \
187 { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 \
188 , 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
189 , 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
192 /* Note: The definition of CALL_REALLY_USED_REGISTERS is not
193 redundant. It is needed when compiling in PIC mode because
194 the a2 register becomes fixed (and hence must be marked as
195 call_used) but in order to preserve the ABI it is not marked
196 as call_really_used. */
197 #define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS
199 #define REG_ALLOC_ORDER \
200 { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9 \
201 , 42, 43, 44, 45, 46, 47, 48, 49, 34, 35, 36, 37, 38, 39, 40, 41 \
202 , 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 51 \
205 /* Return number of consecutive hard regs needed starting at reg REGNO
206 to hold something of mode MODE.
208 This is ordinarily the length in words of a value of mode MODE
209 but can be less for certain modes in special long registers. */
211 #define HARD_REGNO_NREGS(REGNO, MODE) \
212 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
214 /* Value is 1 if hard register REGNO can hold a value of machine-mode
216 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
217 mn10300_hard_regno_mode_ok ((REGNO), (MODE))
219 /* Value is 1 if it is a good idea to tie two pseudo registers
220 when one has mode MODE1 and one has mode MODE2.
221 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
222 for any hard reg, then this must be 0 for correct output. */
223 #define MODES_TIEABLE_P(MODE1, MODE2) \
224 mn10300_modes_tieable ((MODE1), (MODE2))
226 /* 4 data, and effectively 3 address registers is small as far as I'm
228 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
230 /* Define the classes of registers for register constraints in the
231 machine description. Also define ranges of constants.
233 One of the classes must always be named ALL_REGS and include all hard regs.
234 If there is more than one class, another class must be named NO_REGS
235 and contain no registers.
237 The name GENERAL_REGS must be the name of a class (or an alias for
238 another name such as ALL_REGS). This is the class of registers
239 that is allowed by "g" or "r" in a register constraint.
240 Also, registers outside this class are allocated only when
241 instructions express preferences for them.
243 The classes must be numbered in nondecreasing order; that is,
244 a larger-numbered class must never be contained completely
245 in a smaller-numbered class.
247 For any two classes, it is very desirable that there be another
248 class that represents their union. */
252 NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
253 DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
254 EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS,
255 SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS,
256 FP_REGS, FP_ACC_REGS, CC_REGS,
257 GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
260 #define N_REG_CLASSES (int) LIM_REG_CLASSES
262 /* Give names of register classes as strings for dump file. */
264 #define REG_CLASS_NAMES \
265 { "NO_REGS", "DATA_REGS", "ADDRESS_REGS", \
266 "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS", \
268 "DATA_OR_EXTENDED_REGS", "ADDRESS_OR_EXTENDED_REGS", \
269 "SP_OR_EXTENDED_REGS", "SP_OR_ADDRESS_OR_EXTENDED_REGS", \
270 "FP_REGS", "FP_ACC_REGS", "CC_REGS", \
271 "GENERAL_REGS", "ALL_REGS", "LIM_REGS" \
274 /* Define which registers fit in which classes.
275 This is an initializer for a vector of HARD_REG_SET
276 of length N_REG_CLASSES. */
278 #define REG_CLASS_CONTENTS \
279 { { 0, 0 }, /* No regs */ \
280 { 0x0000000f, 0 }, /* DATA_REGS */ \
281 { 0x000001f0, 0 }, /* ADDRESS_REGS */ \
282 { 0x00000200, 0 }, /* SP_REGS */ \
283 { 0x000001ff, 0 }, /* DATA_OR_ADDRESS_REGS */ \
284 { 0x000003f0, 0 }, /* SP_OR_ADDRESS_REGS */ \
285 { 0x0003fc00, 0 }, /* EXTENDED_REGS */ \
286 { 0x0003fc0f, 0 }, /* DATA_OR_EXTENDED_REGS */ \
287 { 0x0003fdf0, 0 }, /* ADDRESS_OR_EXTENDED_REGS */ \
288 { 0x0003fe00, 0 }, /* SP_OR_EXTENDED_REGS */ \
289 { 0x0003fff0, 0 }, /* SP_OR_ADDRESS_OR_EXTENDED_REGS */ \
290 { 0xfffc0000, 0x3ffff },/* FP_REGS */ \
291 { 0x03fc0000, 0 }, /* FP_ACC_REGS */ \
292 { 0x00000000, 0x80000 },/* CC_REGS */ \
293 { 0x0003fdff, 0 }, /* GENERAL_REGS */ \
294 { 0xffffffff, 0xfffff } /* ALL_REGS */ \
297 /* The following macro defines cover classes for Integrated Register
298 Allocator. Cover classes is a set of non-intersected register
299 classes covering all hard registers used for register allocation
300 purpose. Any move between two registers of a cover class should be
301 cheaper than load or store of the registers. The macro value is
302 array of register classes with LIM_REG_CLASSES used as the end
305 #define IRA_COVER_CLASSES \
307 GENERAL_REGS, FP_REGS, LIM_REG_CLASSES \
310 /* The same information, inverted:
311 Return the class number of the smallest class containing
312 reg number REGNO. This could be a conditional expression
313 or could index an array. */
315 #define REGNO_REG_CLASS(REGNO) \
316 ((REGNO) <= LAST_DATA_REGNUM ? DATA_REGS : \
317 (REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS : \
318 (REGNO) == STACK_POINTER_REGNUM ? SP_REGS : \
319 (REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \
320 (REGNO) <= LAST_FP_REGNUM ? FP_REGS : \
321 (REGNO) == CC_REG ? CC_REGS : \
324 /* The class value for index registers, and the one for base regs. */
325 #define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
326 #define BASE_REG_CLASS SP_OR_ADDRESS_REGS
328 /* Macros to check register numbers against specific register classes. */
330 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
331 and check its validity for a certain class.
332 We have two alternate definitions for each of them.
333 The usual definition accepts all pseudo regs; the other rejects
334 them unless they have been allocated suitable hard regs.
335 The symbol REG_OK_STRICT causes the latter definition to be used.
337 Most source files want to accept pseudo regs in the hope that
338 they will get allocated to the class that the insn wants them to be in.
339 Source files for reload pass need to be strict.
340 After reload, it makes no difference, since pseudo regs have
341 been eliminated by then. */
343 /* These assume that REGNO is a hard or pseudo reg number.
344 They give nonzero only if REGNO is a hard reg of the suitable class
345 or a pseudo reg currently allocated to a suitable hard reg.
346 Since they use reg_renumber, they are safe only once reg_renumber
347 has been allocated, which happens in local-alloc.c. */
349 #ifndef REG_OK_STRICT
350 # define REG_STRICT 0
352 # define REG_STRICT 1
355 # define REGNO_IN_RANGE_P(regno,min,max,strict) \
356 (IN_RANGE ((regno), (min), (max)) \
359 && reg_renumber[(regno)] >= (min) \
360 && reg_renumber[(regno)] <= (max)) \
361 : (regno) >= FIRST_PSEUDO_REGISTER))
363 #define REGNO_DATA_P(regno, strict) \
364 (REGNO_IN_RANGE_P ((regno), FIRST_DATA_REGNUM, LAST_DATA_REGNUM, \
366 #define REGNO_ADDRESS_P(regno, strict) \
367 (REGNO_IN_RANGE_P ((regno), FIRST_ADDRESS_REGNUM, LAST_ADDRESS_REGNUM, \
369 #define REGNO_SP_P(regno, strict) \
370 (REGNO_IN_RANGE_P ((regno), STACK_POINTER_REGNUM, STACK_POINTER_REGNUM, \
372 #define REGNO_EXTENDED_P(regno, strict) \
373 (REGNO_IN_RANGE_P ((regno), FIRST_EXTENDED_REGNUM, LAST_EXTENDED_REGNUM, \
375 #define REGNO_AM33_P(regno, strict) \
376 (REGNO_DATA_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)) \
377 || REGNO_EXTENDED_P ((regno), (strict)))
378 #define REGNO_FP_P(regno, strict) \
379 (REGNO_IN_RANGE_P ((regno), FIRST_FP_REGNUM, LAST_FP_REGNUM, (strict)))
381 #define REGNO_STRICT_OK_FOR_BASE_P(regno, strict) \
382 (REGNO_SP_P ((regno), (strict)) \
383 || REGNO_ADDRESS_P ((regno), (strict)) \
384 || REGNO_EXTENDED_P ((regno), (strict)))
385 #define REGNO_OK_FOR_BASE_P(regno) \
386 (REGNO_STRICT_OK_FOR_BASE_P ((regno), REG_STRICT))
387 #define REG_OK_FOR_BASE_P(X) \
388 (REGNO_OK_FOR_BASE_P (REGNO (X)))
390 #define REGNO_STRICT_OK_FOR_BIT_BASE_P(regno, strict) \
391 (REGNO_SP_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)))
392 #define REGNO_OK_FOR_BIT_BASE_P(regno) \
393 (REGNO_STRICT_OK_FOR_BIT_BASE_P ((regno), REG_STRICT))
394 #define REG_OK_FOR_BIT_BASE_P(X) \
395 (REGNO_OK_FOR_BIT_BASE_P (REGNO (X)))
397 #define REGNO_STRICT_OK_FOR_INDEX_P(regno, strict) \
398 (REGNO_DATA_P ((regno), (strict)) || REGNO_EXTENDED_P ((regno), (strict)))
399 #define REGNO_OK_FOR_INDEX_P(regno) \
400 (REGNO_STRICT_OK_FOR_INDEX_P ((regno), REG_STRICT))
401 #define REG_OK_FOR_INDEX_P(X) \
402 (REGNO_OK_FOR_INDEX_P (REGNO (X)))
404 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
405 (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS)
407 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
408 mn10300_secondary_reload_class(CLASS,MODE,IN)
410 /* Return the maximum number of consecutive registers
411 needed to represent mode MODE in a register of class CLASS. */
413 #define CLASS_MAX_NREGS(CLASS, MODE) \
414 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
416 /* A class that contains registers which the compiler must always
417 access in a mode that is the same size as the mode in which it
418 loaded the register. */
419 #define CLASS_CANNOT_CHANGE_SIZE FP_REGS
421 /* Return 1 if VALUE is in the range specified. */
423 #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
424 #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
427 /* Stack layout; function entry, exit and calling. */
429 /* Define this if pushing a word on the stack
430 makes the stack pointer a smaller address. */
432 #define STACK_GROWS_DOWNWARD
434 /* Define this to nonzero if the nominal address of the stack frame
435 is at the high-address end of the local variables;
436 that is, each additional local variable allocated
437 goes at a more negative offset in the frame. */
439 #define FRAME_GROWS_DOWNWARD 1
441 /* Offset within stack frame to start allocating local variables at.
442 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
443 first local allocated. Otherwise, it is the offset to the BEGINNING
444 of the first local allocated. */
446 #define STARTING_FRAME_OFFSET 0
448 /* Offset of first parameter from the argument pointer register value. */
449 /* Is equal to the size of the saved fp + pc, even if an fp isn't
450 saved since the value is used before we know. */
452 #define FIRST_PARM_OFFSET(FNDECL) 4
454 #define ELIMINABLE_REGS \
455 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
456 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
457 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
459 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
460 OFFSET = mn10300_initial_offset (FROM, TO)
462 /* We use d0/d1 for passing parameters, so allocate 8 bytes of space
463 for a register flushback area. */
464 #define REG_PARM_STACK_SPACE(DECL) 8
465 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
466 #define ACCUMULATE_OUTGOING_ARGS 1
468 /* So we can allocate space for return pointers once for the function
469 instead of around every call. */
470 #define STACK_POINTER_OFFSET 4
472 /* 1 if N is a possible register number for function argument passing.
473 On the MN10300, d0 and d1 are used in this way. */
475 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1)
478 /* Define a data type for recording info about an argument list
479 during the scan of that argument list. This data type should
480 hold all necessary information about the function itself
481 and about the args processed so far, enough to enable macros
482 such as FUNCTION_ARG to determine where the next arg should go.
484 On the MN10300, this is a single integer, which is a number of bytes
485 of arguments scanned so far. */
487 #define CUMULATIVE_ARGS struct cum_arg
494 /* Initialize a variable CUM of type CUMULATIVE_ARGS
495 for a call to a function whose data type is FNTYPE.
496 For a library call, FNTYPE is 0.
498 On the MN10300, the offset starts at 0. */
500 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
503 #define FUNCTION_VALUE_REGNO_P(N) mn10300_function_value_regno_p (N)
505 #define DEFAULT_PCC_STRUCT_RETURN 0
507 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
508 the stack pointer does not matter. The value is tested only in
509 functions that have frame pointers.
510 No definition is equivalent to always zero. */
512 #define EXIT_IGNORE_STACK 1
514 /* Output assembler code to FILE to increment profiler label # LABELNO
515 for profiling a function entry. */
517 #define FUNCTION_PROFILER(FILE, LABELNO) ;
519 /* Length in units of the trampoline for entering a nested function. */
521 #define TRAMPOLINE_SIZE 0x1b
523 #define TRAMPOLINE_ALIGNMENT 32
525 /* A C expression whose value is RTL representing the value of the return
526 address for the frame COUNT steps up from the current frame.
528 On the mn10300, the return address is not at a constant location
529 due to the frame layout. Luckily, it is at a constant offset from
530 the argument pointer, so we define RETURN_ADDR_RTX to return a
531 MEM using arg_pointer_rtx. Reload will replace arg_pointer_rtx
532 with a reference to the stack/frame pointer + an appropriate offset. */
534 #define RETURN_ADDR_RTX(COUNT, FRAME) \
536 ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \
539 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, MDR_REGNUM)
541 /* Maximum number of registers that can appear in a valid memory address. */
543 #define MAX_REGS_PER_ADDRESS 2
546 #define HAVE_POST_INCREMENT (TARGET_AM33)
548 /* Accept either REG or SUBREG where a register is valid. */
550 #define RTX_OK_FOR_BASE_P(X, strict) \
551 ((REG_P (X) && REGNO_STRICT_OK_FOR_BASE_P (REGNO (X), \
553 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
554 && REGNO_STRICT_OK_FOR_BASE_P (REGNO (SUBREG_REG (X)), \
559 /* Nonzero if the constant value X is a legitimate general operand.
560 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
561 #define LEGITIMATE_CONSTANT_P(X) mn10300_legitimate_constant_p (X)
563 /* Zero if this needs fixing up to become PIC. */
565 #define LEGITIMATE_PIC_OPERAND_P(X) \
566 mn10300_legitimate_pic_operand_p (X)
568 /* Register to hold the addressing base for
569 position independent code access to data items. */
570 #define PIC_OFFSET_TABLE_REGNUM PIC_REG
572 /* The name of the pseudo-symbol representing the Global Offset Table. */
573 #define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_"
575 #define SYMBOLIC_CONST_P(X) \
576 ((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF) \
577 && ! LEGITIMATE_PIC_OPERAND_P (X))
579 /* Non-global SYMBOL_REFs have SYMBOL_REF_FLAG enabled. */
580 #define MN10300_GLOBAL_P(X) (! SYMBOL_REF_FLAG (X))
582 #define SELECT_CC_MODE(OP, X, Y) mn10300_select_cc_mode (X)
583 #define REVERSIBLE_CC_MODE(MODE) 0
585 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
586 ((CLASS1 == CLASS2 && (CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS)) ? 2 :\
587 ((CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS) && \
588 (CLASS2 == ADDRESS_REGS || CLASS2 == DATA_REGS)) ? 4 : \
589 (CLASS1 == SP_REGS && CLASS2 == ADDRESS_REGS) ? 2 : \
590 (CLASS1 == ADDRESS_REGS && CLASS2 == SP_REGS) ? 4 : \
591 ! TARGET_AM33 ? 6 : \
592 (CLASS1 == SP_REGS || CLASS2 == SP_REGS) ? 6 : \
593 (CLASS1 == CLASS2 && CLASS1 == EXTENDED_REGS) ? 6 : \
594 (CLASS1 == FP_REGS || CLASS2 == FP_REGS) ? 6 : \
595 (CLASS1 == EXTENDED_REGS || CLASS2 == EXTENDED_REGS) ? 4 : \
598 /* Nonzero if access to memory by bytes or half words is no faster
599 than accessing full words. */
600 #define SLOW_BYTE_ACCESS 1
602 #define NO_FUNCTION_CSE
604 /* According expr.c, a value of around 6 should minimize code size, and
605 for the MN10300 series, that's our primary concern. */
606 #define MOVE_RATIO(speed) 6
608 #define TEXT_SECTION_ASM_OP "\t.section .text"
609 #define DATA_SECTION_ASM_OP "\t.section .data"
610 #define BSS_SECTION_ASM_OP "\t.section .bss"
612 #define ASM_COMMENT_START "#"
614 /* Output to assembler file text saying following lines
615 may contain character constants, extra white space, comments, etc. */
617 #define ASM_APP_ON "#APP\n"
619 /* Output to assembler file text saying following lines
620 no longer contain unusual constructs. */
622 #define ASM_APP_OFF "#NO_APP\n"
624 #undef USER_LABEL_PREFIX
625 #define USER_LABEL_PREFIX "_"
627 /* This says how to output the assembler to define a global
628 uninitialized but not common symbol.
629 Try to use asm_output_bss to implement this macro. */
631 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
632 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
634 /* Globalizing directive for a label. */
635 #define GLOBAL_ASM_OP "\t.global "
637 /* This is how to output a reference to a user-level label named NAME.
638 `assemble_name' uses this. */
640 #undef ASM_OUTPUT_LABELREF
641 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
642 asm_fprintf (FILE, "%U%s", (*targetm.strip_name_encoding) (NAME))
644 #define ASM_PN_FORMAT "%s___%lu"
646 /* This is how we tell the assembler that two symbols have the same value. */
648 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
651 assemble_name (FILE, NAME1); \
652 fputs (" = ", FILE); \
653 assemble_name (FILE, NAME2); \
654 fputc ('\n', FILE); \
658 /* How to refer to registers in assembler output.
659 This sequence is indexed by compiler's hard-register-number (see above). */
661 #define REGISTER_NAMES \
662 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp", \
663 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" \
664 , "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7" \
665 , "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15" \
666 , "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23" \
667 , "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" \
671 #define ADDITIONAL_REGISTER_NAMES \
672 { {"r8", 4}, {"r9", 5}, {"r10", 6}, {"r11", 7}, \
673 {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3}, \
674 {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13}, \
675 {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17} \
676 , {"fd0", 18}, {"fd2", 20}, {"fd4", 22}, {"fd6", 24} \
677 , {"fd8", 26}, {"fd10", 28}, {"fd12", 30}, {"fd14", 32} \
678 , {"fd16", 34}, {"fd18", 36}, {"fd20", 38}, {"fd22", 40} \
679 , {"fd24", 42}, {"fd26", 44}, {"fd28", 46}, {"fd30", 48} \
683 /* Print an instruction operand X on file FILE.
684 look in mn10300.c for details */
686 #define PRINT_OPERAND(FILE, X, CODE) \
687 mn10300_print_operand (FILE, X, CODE)
689 /* Print a memory operand whose address is X, on file FILE.
690 This uses a function in output-vax.c. */
692 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
693 mn10300_print_operand_address (FILE, ADDR)
695 /* This is how to output an element of a case-vector that is absolute. */
697 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
698 fprintf (FILE, "\t%s .L%d\n", ".long", VALUE)
700 /* This is how to output an element of a case-vector that is relative. */
702 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
703 fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL)
705 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
707 fprintf (FILE, "\t.align %d\n", (LOG))
709 /* We don't have to worry about dbx compatibility for the mn10300. */
710 #define DEFAULT_GDB_EXTENSIONS 1
712 /* Use dwarf2 debugging info by default. */
713 #undef PREFERRED_DEBUGGING_TYPE
714 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
715 #define DWARF2_DEBUGGING_INFO 1
717 #define DWARF2_ASM_LINE_DEBUG_INFO 1
719 /* GDB always assumes the current function's frame begins at the value
720 of the stack pointer upon entry to the current function. Accessing
721 local variables and parameters passed on the stack is done using the
722 base of the frame + an offset provided by GCC.
724 For functions which have frame pointers this method works fine;
725 the (frame pointer) == (stack pointer at function entry) and GCC provides
726 an offset relative to the frame pointer.
728 This loses for functions without a frame pointer; GCC provides an offset
729 which is relative to the stack pointer after adjusting for the function's
730 frame size. GDB would prefer the offset to be relative to the value of
731 the stack pointer at the function's entry. Yuk! */
732 #define DEBUGGER_AUTO_OFFSET(X) \
733 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
734 + (frame_pointer_needed \
735 ? 0 : - mn10300_initial_offset (FRAME_POINTER_REGNUM, \
736 STACK_POINTER_REGNUM)))
738 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
739 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
740 + (frame_pointer_needed \
741 ? 0 : - mn10300_initial_offset (ARG_POINTER_REGNUM, \
742 STACK_POINTER_REGNUM)))
744 /* Specify the machine mode that this machine uses
745 for the index in the tablejump instruction. */
746 #define CASE_VECTOR_MODE Pmode
748 /* Define if operations between registers always perform the operation
749 on the full register even if a narrower mode is specified. */
750 #define WORD_REGISTER_OPERATIONS
752 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
754 /* This flag, if defined, says the same insns that convert to a signed fixnum
755 also convert validly to an unsigned one. */
756 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
758 /* Max number of bytes we can move from memory to memory
759 in one reasonably fast instruction. */
762 /* Define if shifts truncate the shift count
763 which implies one can omit a sign-extension or zero-extension
765 #define SHIFT_COUNT_TRUNCATED 1
767 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
768 is done just by pretending it is already truncated. */
769 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
771 /* Specify the machine mode that pointers have.
772 After generation of rtl, the compiler makes no further distinction
773 between pointers and any other objects of this machine mode. */
776 /* A function address in a call instruction
777 is a byte address (for indexing purposes)
778 so give the MEM rtx a byte's mode. */
779 #define FUNCTION_MODE QImode
781 /* The assembler op to get a word. */
783 #define FILE_ASM_OP "\t.file\n"