gcc/config/mips/t-vr

   1 # Copyright (C) 2002, 2004, 2005 Free Software Foundation, Inc.
   2 #
   3 # This file is part of GCC.
   4 #
   5 # GCC is free software; you can redistribute it and/or modify
   6 # it under the terms of the GNU General Public License as published by
   7 # the Free Software Foundation; either version 3, or (at your option)
   8 # any later version.
   9 #
  10 # GCC is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 # GNU General Public License for more details.
  14 #
  15 # You should have received a copy of the GNU General Public License
  16 # along with GCC; see the file COPYING3.  If not see
  17 # <http://www.gnu.org/licenses/>.
  18
  19 # BEGIN boiler-plate MIPS stuff
  20
  21 # Don't let CTOR_LIST end up in sdata section.
  22 CRTSTUFF_T_CFLAGS = -G 0
  23
  24 # We must build libgcc2.a with -G 0, in case the user wants to link
  25 # without the $gp register.
  26 TARGET_LIBGCC2_CFLAGS = -G 0
  27
  28 LIB2FUNCS_STATIC_EXTRA = $(srcdir)/config/mips/mips16.S \
  29                          $(srcdir)/config/mips/vr4120-div.S
  30 EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
  31
  32 # Assemble startup files.
  33 $(T)crti.o: $(srcdir)/config/mips/crti.asm $(GCC_PASSES)
  34         $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
  35         -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/mips/crti.asm
  36
  37 $(T)crtn.o: $(srcdir)/config/mips/crtn.asm $(GCC_PASSES)
  38         $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
  39         -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/mips/crtn.asm
  40
  41 # END boiler-plate
  42
  43 # Main multilibs
  44 # --------------
  45 #
  46 # Endianness: EB or EL
  47 #
  48 # ABIs: mabi=32
  49 #       mabi=o64
  50 #       mabi=eabi
  51 #       mabi=eabi/mlong32
  52 #       mabi=eabi/mgp32
  53 #       mabi=eabi/mgp32/mlong64
  54 #
  55 # Architecture: march=vr4120 with -mfix-vr4120
  56 #               march=vr4130 with -mfix-vr4130 (default)
  57 #               march=vr5000
  58 #               march=vr5400
  59 #               march=vr5500
  60 #
  61 # Total: 2 * 6 * 5 = 60 multilibs.
  62 #
  63 #
  64 # Extra vr4300 multilibs
  65 # ----------------------
  66 #
  67 # Endianness: EB or EL
  68 #
  69 # ABI: o64
  70 #
  71 # Architecture: vr4300.
  72 #
  73 # Total: 2 * 1 * 2 = 2 multilibs.
  74 #
  75 #
  76 # Extra MIPS16 multilibs
  77 # ----------------------
  78 #
  79 # Endianness: EB or EL
  80 #
  81 # ABIs: mabi=o64
  82 #       mabi=eabi/mlong32
  83 #       mabi=eabi/mgp32
  84 #
  85 # Architecture: march=vr4120 with -mfix-vr4120
  86 #               march=vr4130 with -mfix-vr4130 (default)
  87 #
  88 # Total: 2 * 3 * 2 = 12 multilibs.
  89 MULTILIB_OPTIONS =                      \
  90         EL/EB                           \
  91         mabi=32/mabi=o64/mabi=eabi      \
  92         mgp32                           \
  93         mlong64                         \
  94         mips16                          \
  95         mfix-vr4120/mfix-vr4130/march=vr4300/march=vr5000/march=vr5400/march=vr5500
  96
  97 MULTILIB_DIRNAMES =     \
  98         el eb           \
  99         o32 o64 eabi    \
 100         gp32            \
 101         long64          \
 102         mips16          \
 103         vr4120 vr4130 vr4300 vr5000 vr5400 vr5500
 104
 105 MULTILIB_MATCHES = EL=mel EB=meb mfix-vr4120=march?vr4120 \
 106                    mfix-vr4130=march?vr4130
 107
 108 # Assume a 41xx-series is the default: we'd need a *mips16 entry if
 109 # the default processor didn't support mips16.  Also assume the
 110 # default ABI is EABI64 -mlong32.
 111 MULTILIB_EXCEPTIONS =                           \
 112         *mabi=32/mlong64*                       \
 113         *mabi=32/mgp32*                         \
 114         *mabi=o64/mgp32*                        \
 115         *mabi=o64/mlong64*                      \
 116         *mips16/march=vr5*                      \
 117         *mips16/march=vr4300                    \
 118         $(MIPS16_EXCEPTIONS)                    \
 119         $(VR4300_EXCEPTIONS)
 120
 121 MIPS16_EXCEPTIONS =                             \
 122         *mabi=32*mips16*                        \
 123         *mlong64*mips16*
 124
 125 VR4300_EXCEPTIONS =                             \
 126         *mabi=32*march=vr4300                   \
 127         *mgp32*march=vr4300                     \
 128         *mlong64*march=vr4300                   \
 129         march=vr4300                            \
 130         E[LB]/march=vr4300