1 ;; Predicate definitions for MIPS.
2 ;; Copyright (C) 2004, 2007, 2008 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 (define_predicate "const_uns_arith_operand"
21 (and (match_code "const_int")
22 (match_test "SMALL_OPERAND_UNSIGNED (INTVAL (op))")))
24 (define_predicate "uns_arith_operand"
25 (ior (match_operand 0 "const_uns_arith_operand")
26 (match_operand 0 "register_operand")))
28 (define_predicate "const_arith_operand"
29 (and (match_code "const_int")
30 (match_test "SMALL_OPERAND (INTVAL (op))")))
32 (define_predicate "arith_operand"
33 (ior (match_operand 0 "const_arith_operand")
34 (match_operand 0 "register_operand")))
36 (define_predicate "const_uimm6_operand"
37 (and (match_code "const_int")
38 (match_test "UIMM6_OPERAND (INTVAL (op))")))
40 (define_predicate "const_imm10_operand"
41 (and (match_code "const_int")
42 (match_test "IMM10_OPERAND (INTVAL (op))")))
44 (define_predicate "reg_imm10_operand"
45 (ior (match_operand 0 "const_imm10_operand")
46 (match_operand 0 "register_operand")))
48 (define_predicate "sle_operand"
49 (and (match_code "const_int")
50 (match_test "SMALL_OPERAND (INTVAL (op) + 1)")))
52 (define_predicate "sleu_operand"
53 (and (match_operand 0 "sle_operand")
54 (match_test "INTVAL (op) + 1 != 0")))
56 (define_predicate "const_0_operand"
57 (and (match_code "const_int,const_double,const_vector")
58 (match_test "op == CONST0_RTX (GET_MODE (op))")))
60 (define_predicate "reg_or_0_operand"
61 (ior (and (match_operand 0 "const_0_operand")
62 (match_test "!TARGET_MIPS16"))
63 (match_operand 0 "register_operand")))
65 (define_predicate "const_1_operand"
66 (and (match_code "const_int,const_double,const_vector")
67 (match_test "op == CONST1_RTX (GET_MODE (op))")))
69 (define_predicate "reg_or_1_operand"
70 (ior (match_operand 0 "const_1_operand")
71 (match_operand 0 "register_operand")))
73 ;; This is used for indexing into vectors, and hence only accepts const_int.
74 (define_predicate "const_0_or_1_operand"
75 (and (match_code "const_int")
76 (ior (match_test "op == CONST0_RTX (GET_MODE (op))")
77 (match_test "op == CONST1_RTX (GET_MODE (op))"))))
79 (define_predicate "d_operand"
80 (and (match_code "reg")
81 (match_test "TARGET_MIPS16
82 ? M16_REG_P (REGNO (op))
83 : GP_REG_P (REGNO (op))")))
85 (define_predicate "lo_operand"
86 (and (match_code "reg")
87 (match_test "REGNO (op) == LO_REGNUM")))
89 (define_predicate "fcc_reload_operand"
90 (and (match_code "reg,subreg")
91 (match_test "ST_REG_P (true_regnum (op))")))
93 (define_special_predicate "pc_or_label_operand"
94 (match_code "pc,label_ref"))
96 (define_predicate "const_call_insn_operand"
97 (match_code "const,symbol_ref,label_ref")
99 enum mips_symbol_type symbol_type;
101 if (!mips_symbolic_constant_p (op, SYMBOL_CONTEXT_CALL, &symbol_type))
106 case SYMBOL_ABSOLUTE:
107 /* We can only use direct calls if we're sure that the target
108 function does not need $25 to be valid on entry. */
109 if (mips_use_pic_fn_addr_reg_p (op))
112 /* If -mlong-calls or if this function has an explicit long_call
113 attribute, we must use register addressing. The
114 SYMBOL_FLAG_LONG_CALL bit is set by mips_encode_section_info. */
115 return !(GET_CODE (op) == SYMBOL_REF && SYMBOL_REF_LONG_CALL_P (op));
117 case SYMBOL_GOT_DISP:
118 /* Without explicit relocs, there is no special syntax for
119 loading the address of a call destination into a register.
120 Using "la $25,foo; jal $25" would prevent the lazy binding
121 of "foo", so keep the address of global symbols with the
123 return !TARGET_EXPLICIT_RELOCS;
130 (define_predicate "call_insn_operand"
131 (ior (match_operand 0 "const_call_insn_operand")
132 (match_operand 0 "register_operand")))
134 ;; A legitimate CONST_INT operand that takes more than one instruction
136 (define_predicate "splittable_const_int_operand"
137 (match_code "const_int")
139 /* When generating mips16 code, LEGITIMATE_CONSTANT_P rejects
140 CONST_INTs that can't be loaded using simple insns. */
144 /* Don't handle multi-word moves this way; we don't want to introduce
145 the individual word-mode moves until after reload. */
146 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD)
149 /* Otherwise check whether the constant can be loaded in a single
151 return !LUI_INT (op) && !SMALL_INT (op) && !SMALL_INT_UNSIGNED (op);
154 (define_predicate "move_operand"
155 (match_operand 0 "general_operand")
157 enum mips_symbol_type symbol_type;
159 /* The thinking here is as follows:
161 (1) The move expanders should split complex load sequences into
162 individual instructions. Those individual instructions can
163 then be optimized by all rtl passes.
165 (2) The target of pre-reload load sequences should not be used
166 to store temporary results. If the target register is only
167 assigned one value, reload can rematerialize that value
168 on demand, rather than spill it to the stack.
170 (3) If we allowed pre-reload passes like combine and cse to recreate
171 complex load sequences, we would want to be able to split the
172 sequences before reload as well, so that the pre-reload scheduler
173 can see the individual instructions. This falls foul of (2);
174 the splitter would be forced to reuse the target register for
175 intermediate results.
177 (4) We want to define complex load splitters for combine. These
178 splitters can request a temporary scratch register, which avoids
179 the problem in (2). They allow things like:
181 (set (reg T1) (high SYM))
182 (set (reg T2) (low (reg T1) SYM))
183 (set (reg X) (plus (reg T2) (const_int OFFSET)))
187 (set (reg T3) (high SYM+OFFSET))
188 (set (reg X) (lo_sum (reg T3) SYM+OFFSET))
190 if T2 is only used this once. */
191 switch (GET_CODE (op))
194 return !splittable_const_int_operand (op, mode);
201 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type)
202 && !mips_split_p[symbol_type]);
206 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type)
207 && !mips_split_hi_p[symbol_type]);
214 (define_predicate "consttable_operand"
215 (match_test "CONSTANT_P (op)"))
217 (define_predicate "symbolic_operand"
218 (match_code "const,symbol_ref,label_ref")
220 enum mips_symbol_type type;
221 return mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type);
224 (define_predicate "absolute_symbolic_operand"
225 (match_code "const,symbol_ref,label_ref")
227 enum mips_symbol_type type;
228 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
229 && type == SYMBOL_ABSOLUTE);
232 (define_predicate "force_to_mem_operand"
233 (match_code "const,symbol_ref,label_ref")
235 enum mips_symbol_type symbol_type;
236 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &symbol_type)
237 && symbol_type == SYMBOL_FORCE_TO_MEM);
240 (define_predicate "got_disp_operand"
241 (match_code "const,symbol_ref,label_ref")
243 enum mips_symbol_type type;
244 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
245 && type == SYMBOL_GOT_DISP);
248 (define_predicate "got_page_ofst_operand"
249 (match_code "const,symbol_ref,label_ref")
251 enum mips_symbol_type type;
252 return (mips_symbolic_constant_p (op, SYMBOL_CONTEXT_LEA, &type)
253 && type == SYMBOL_GOT_PAGE_OFST);
256 (define_predicate "symbol_ref_operand"
257 (match_code "symbol_ref"))
259 (define_predicate "stack_operand"
260 (and (match_code "mem")
261 (match_test "mips_stack_address_p (XEXP (op, 0), GET_MODE (op))")))
263 (define_predicate "macc_msac_operand"
264 (ior (and (match_code "plus") (match_test "ISA_HAS_MACC"))
265 (and (match_code "minus") (match_test "ISA_HAS_MSAC")))
267 rtx mult = XEXP (op, GET_CODE (op) == PLUS ? 0 : 1);
268 rtx accum = XEXP (op, GET_CODE (op) == PLUS ? 1 : 0);
269 return (GET_CODE (mult) == MULT
270 && REG_P (XEXP (mult, 0))
271 && REG_P (XEXP (mult, 1))
276 (define_predicate "equality_operator"
277 (match_code "eq,ne"))
279 (define_predicate "extend_operator"
280 (match_code "zero_extend,sign_extend"))
282 (define_predicate "trap_comparison_operator"
283 (match_code "eq,ne,lt,ltu,ge,geu"))
285 (define_predicate "order_operator"
286 (match_code "lt,ltu,le,leu,ge,geu,gt,gtu"))
288 ;; For NE, cstore uses sltu instructions in which the first operand is $0.
289 ;; This isn't possible in mips16 code.
291 (define_predicate "mips_cstore_operator"
292 (ior (match_code "eq,gt,gtu,ge,geu,lt,ltu,le,leu")
293 (and (match_code "ne") (match_test "!TARGET_MIPS16"))))
295 (define_predicate "small_data_pattern"
296 (and (match_code "set,parallel,unspec,unspec_volatile,prefetch")
297 (match_test "mips_small_data_pattern_p (op)")))