1 ; Options for the MIPS port of the compiler
3 ; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
5 ; This file is part of GCC.
7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free
9 ; Software Foundation; either version 3, or (at your option) any later
12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ; License for more details.
17 ; You should have received a copy of the GNU General Public License
18 ; along with GCC; see the file COPYING3. If not see
19 ; <http://www.gnu.org/licenses/>.
22 Target RejectNegative Joined
23 -mabi=ABI Generate code that conforms to the given ABI
26 Target Report Mask(ABICALLS)
27 Generate code that can be used in SVR4-style dynamic objects
30 Target Report Var(TARGET_MAD)
31 Use PMC-style 'mad' instructions
34 Target RejectNegative Joined Var(mips_arch_string)
35 -march=ISA Generate code for the given ISA
38 Target RejectNegative Joined UInteger Var(mips_branch_cost)
39 -mbranch-cost=COST Set the cost of branches to roughly COST instructions
42 Target Report Mask(BRANCHLIKELY)
43 Use Branch Likely instructions, overriding the architecture default
46 Target Report Mask(CHECK_ZERO_DIV)
47 Trap on integer divide by zero
50 Target Report RejectNegative Mask(DIVIDE_BREAKS)
51 Use branch-and-break sequences to check for integer divide by zero
54 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
55 Use trap instructions to check for integer divide by zero
58 Target Report RejectNegative Var(TARGET_MDMX)
59 Allow the use of MDMX instructions
62 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
63 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
66 Target Report Mask(DSP)
67 Use MIPS-DSP instructions
70 Target Report Mask(DSPR2)
71 Use MIPS-DSP REV 2 instructions
74 Target Var(TARGET_DEBUG_MODE) Undocumented
77 Target Var(TARGET_DEBUG_D_MODE) Undocumented
80 Target Report RejectNegative Mask(BIG_ENDIAN)
81 Use big-endian byte order
84 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
85 Use little-endian byte order
88 Target Report Var(TARGET_EMBEDDED_DATA)
89 Use ROM instead of RAM
92 Target Report Mask(EXPLICIT_RELOCS)
93 Use NewABI-style %reloc() assembly operators
96 Target Report Mask(FIX_R4000)
97 Work around certain R4000 errata
100 Target Report Mask(FIX_R4400)
101 Work around certain R4400 errata
104 Target Report Var(TARGET_FIX_SB1)
105 Work around errata for early SB-1 revision 2 cores
108 Target Report Var(TARGET_FIX_VR4120)
109 Work around certain VR4120 errata
112 Target Report Var(TARGET_FIX_VR4130)
113 Work around VR4130 mflo/mfhi errata
116 Target Report Var(TARGET_4300_MUL_FIX)
117 Work around an early 4300 hardware bug
120 Target Report Mask(FP_EXCEPTIONS)
121 FP exceptions are enabled
124 Target Report RejectNegative InverseMask(FLOAT64)
125 Use 32-bit floating-point registers
128 Target Report RejectNegative Mask(FLOAT64)
129 Use 64-bit floating-point registers
132 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
133 -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
136 Target Report Mask(FUSED_MADD)
137 Generate floating-point multiply-add instructions
140 Target Report RejectNegative InverseMask(64BIT)
141 Use 32-bit general registers
144 Target Report RejectNegative Mask(64BIT)
145 Use 64-bit general registers
148 Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
149 Allow the use of hardware floating-point instructions
152 Target RejectNegative Joined
153 -mipsN Generate code for ISA level N
156 Target Report RejectNegative Mask(MIPS16)
160 Target Report RejectNegative Mask(MIPS3D)
161 Use MIPS-3D instructions
164 Target Report Var(TARGET_LONG_CALLS)
168 Target Report RejectNegative InverseMask(LONG64, LONG32)
169 Use a 32-bit long type
172 Target Report RejectNegative Mask(LONG64)
173 Use a 64-bit long type
176 Target Report Var(TARGET_MEMCPY)
177 Don't optimize block moves
181 Use the mips-tfile postpass
184 Target Report Var(TARGET_MT)
185 Allow the use of MT instructions
188 Target RejectNegative
189 Do not use a cache-flushing function before calling stack trampolines
192 Target Report RejectNegative InverseVar(MDMX)
193 Do not use MDMX instructions
196 Target Report RejectNegative InverseMask(MIPS16)
197 Generate normal-mode code
200 Target Report RejectNegative InverseMask(MIPS3D)
201 Do not use MIPS-3D instructions
204 Target Report Mask(PAIRED_SINGLE_FLOAT)
205 Use paired-single floating-point instructions
208 Target Report Var(TARGET_SHARED) Init(1)
209 When generating -mabicalls code, make the code suitable for use in shared libraries
212 Target Report RejectNegative Mask(SINGLE_FLOAT)
213 Restrict the use of hardware floating-point instructions to 32-bit operations
216 Target Report RejectNegative Mask(SMARTMIPS)
217 Use SmartMIPS instructions
220 Target Report RejectNegative Mask(SOFT_FLOAT)
221 Prevent the use of all hardware floating-point instructions
224 Target Report Mask(SPLIT_ADDRESSES)
225 Optimize lui/addiu address loads
228 Target Report Var(TARGET_SYM32)
229 Assume all symbols have 32-bit values
232 Target RejectNegative Joined
233 -mcode-readable=SETTING Specify when instructions are allowed to access code
236 Target RejectNegative Joined Var(mips_tune_string)
237 -mtune=PROCESSOR Optimize the output for PROCESSOR
239 muninit-const-in-rodata
240 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
241 Put uninitialized constants in ROM (needs -membedded-data)
244 Target Report Mask(VR4130_ALIGN)
245 Perform VR4130-specific alignment optimizations
248 Target Report Var(TARGET_XGOT)
249 Lift restrictions on GOT size