1 ; Options for the MIPS port of the compiler
3 ; Copyright (C) 2005 Free Software Foundation, Inc.
5 ; This file is part of GCC.
7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free
9 ; Software Foundation; either version 2, or (at your option) any later
12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ; License for more details.
17 ; You should have received a copy of the GNU General Public License
18 ; along with GCC; see the file COPYING. If not, write to the Free
19 ; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Target RejectNegative Joined
24 -mabi=ABI Generate code that conforms to the given ABI
27 Target Report Mask(ABICALLS)
31 Target Report Var(TARGET_MAD)
32 Use PMC-style 'mad' instructions
35 Target RejectNegative Joined Var(mips_arch_string)
36 -march=ISA Generate code for the given ISA
39 Target Report Mask(BRANCHLIKELY)
40 Use Branch Likely instructions, overriding the architecture default
43 Target Report Mask(CHECK_ZERO_DIV)
44 Trap on integer divide by zero
47 Target Report Mask(DIVIDE_BREAKS)
48 Use branch-and-break sequences to check for integer divide by zero
51 Target Report InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
52 Use trap instructions to check for integer divide by zero
55 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
56 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
59 Target Var(TARGET_DEBUG_MODE) Undocumented
62 Target Var(TARGET_DEBUG_D_MODE) Undocumented
65 Target Report RejectNegative Mask(BIG_ENDIAN)
66 Use big-endian byte order
69 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
70 Use little-endian byte order
73 Target Report Var(TARGET_EMBEDDED_DATA)
74 Use ROM instead of RAM
77 Target Report Mask(EXPLICIT_RELOCS)
78 Use NewABI-style %reloc() assembly operators
81 Target Report Mask(FIX_R4000)
82 Work around certain R4000 errata
85 Target Report Mask(FIX_R4400)
86 Work around certain R4400 errata
89 Target Report Var(TARGET_FIX_SB1)
90 Work around errata for early SB-1 revision 2 cores
93 Target Report Var(TARGET_FIX_VR4120)
94 Work around certain VR4120 errata
97 Target Report Var(TARGET_FIX_VR4130)
98 Work around VR4130 mflo/mfhi errata
101 Target Report Var(TARGET_4300_MUL_FIX)
102 Work around an early 4300 hardware bug
105 Target Report Mask(FP_EXCEPTIONS)
106 FP exceptions are enabled
109 Target Report RejectNegative InverseMask(FLOAT64)
110 Use 32-bit floating-point registers
113 Target Report RejectNegative Mask(FLOAT64)
114 Use 64-bit floating-point registers
117 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
118 -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
121 Target Report Mask(FUSED_MADD)
122 Generate floating-point multiply-add instructions
125 Target Report RejectNegative InverseMask(64BIT)
126 Use 32-bit general registers
129 Target Report RejectNegative Mask(64BIT)
130 Use 64-bit general registers
133 Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
134 Allow the use of hardware floating-point instructions
137 Target RejectNegative Joined
138 -mipsN Generate code for ISA level N
141 Target Report RejectNegative Mask(MIPS16)
145 Target Report RejectNegative Mask(MIPS3D)
146 Use MIPS-3D instructions
149 Target Report Var(TARGET_LONG_CALLS)
153 Target Report RejectNegative InverseMask(LONG64, LONG32)
154 Use a 32-bit long type
157 Target Report RejectNegative Mask(LONG64)
158 Use a 64-bit long type
161 Target Report Var(TARGET_MEMCPY)
162 Don't optimize block moves
166 Use the mips-tfile postpass
169 Target RejectNegative
170 Do not use a cache-flushing function before calling stack trampolines
173 Target Report RejectNegative InverseMask(MIPS16)
174 Generate normal-mode code
177 Target Report RejectNegative InverseMask(MIPS3D)
178 Do not use MIPS-3D instructions
181 Target Report Mask(PAIRED_SINGLE_FLOAT)
182 Use paired-single floating-point instructions
185 Target Report RejectNegative Mask(SINGLE_FLOAT)
186 Restrict the use of hardware floating-point instructions to 32-bit operations
189 Target Report RejectNegative Mask(SOFT_FLOAT)
190 Prevent the use of all hardware floating-point instructions
193 Target Report Mask(SPLIT_ADDRESSES)
194 Optimize lui/addiu address loads
197 Target Report Var(TARGET_SYM32)
198 Assume all symbols have 32-bit values
201 Target RejectNegative Joined Var(mips_tune_string)
202 -mtune=PROCESSOR Optimize the output for PROCESSOR
204 muninit-const-in-rodata
205 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
206 Put uninitialized constants in ROM (needs -membedded-data)
209 Target Report Mask(VR4130_ALIGN)
210 Perform VR4130-specific alignment optimizations
213 Target Report Var(TARGET_XGOT)
214 Lift restrictions on GOT size