1 ;; Constraint definitions for MIPS.
2 ;; Copyright (C) 2006, 2007 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 ;; Register constraints
22 (define_register_constraint "d" "BASE_REG_CLASS"
23 "An address register. This is equivalent to @code{r} unless
24 generating MIPS16 code.")
26 (define_register_constraint "t" "T_REG"
29 (define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS"
30 "A floating-point register (if available).")
32 (define_register_constraint "h" "NO_REGS"
33 "Formerly the @code{hi} register. This constraint is no longer supported.")
35 (define_register_constraint "l" "TARGET_BIG_ENDIAN ? MD1_REG : MD0_REG"
36 "The @code{lo} register. Use this register to store values that are
37 no bigger than a word.")
39 (define_register_constraint "x" "MD_REGS"
40 "The concatenated @code{hi} and @code{lo} registers. Use this register
41 to store doubleword values.")
43 (define_register_constraint "b" "ALL_REGS"
46 (define_register_constraint "c" "TARGET_USE_PIC_FN_ADDR_REG ? PIC_FN_ADDR_REG
47 : TARGET_MIPS16 ? M16_NA_REGS
49 "A register suitable for use in an indirect jump. This will always be
50 @code{$25} for @option{-mabicalls}.")
52 (define_register_constraint "e" "LEA_REGS"
55 (define_register_constraint "j" "PIC_FN_ADDR_REG"
58 ;; Don't use this constraint in gcc code! It runs the risk of
59 ;; introducing a spill failure; see tls_get_tp_<mode>.
60 (define_register_constraint "v" "V1_REG"
61 "Register @code{$3}. Do not use this constraint in new code;
62 it is retained only for compatibility with glibc.")
64 (define_register_constraint "y" "GR_REGS"
65 "Equivalent to @code{r}; retained for backwards compatibility.")
67 (define_register_constraint "z" "ST_REGS"
68 "A floating-point condition code register.")
70 (define_register_constraint "A" "DSP_ACC_REGS"
73 (define_register_constraint "a" "ACC_REGS"
76 (define_register_constraint "B" "COP0_REGS"
79 (define_register_constraint "C" "COP2_REGS"
82 (define_register_constraint "D" "COP3_REGS"
85 ;; Registers that can be used as the target of multiply-accumulate
86 ;; instructions. The core MIPS32 ISA provides a hi/lo madd,
87 ;; but the DSPr2 version allows any accumulator target.
88 (define_register_constraint "ka" "ISA_HAS_DSPR2 ? ACC_REGS : MD_REGS")
90 (define_constraint "kf"
92 (match_operand 0 "force_to_mem_operand"))
94 ;; This is a normal rather than a register constraint because we can
95 ;; never use the stack pointer as a reload register.
96 (define_constraint "ks"
98 (and (match_code "reg")
99 (match_test "REGNO (op) == STACK_POINTER_REGNUM")))
101 ;; Integer constraints
103 (define_constraint "I"
104 "A signed 16-bit constant (for arithmetic instructions)."
105 (and (match_code "const_int")
106 (match_test "SMALL_OPERAND (ival)")))
108 (define_constraint "J"
110 (and (match_code "const_int")
111 (match_test "ival == 0")))
113 (define_constraint "K"
114 "An unsigned 16-bit constant (for logic instructions)."
115 (and (match_code "const_int")
116 (match_test "SMALL_OPERAND_UNSIGNED (ival)")))
118 (define_constraint "L"
119 "A signed 32-bit constant in which the lower 16 bits are zero.
120 Such constants can be loaded using @code{lui}."
121 (and (match_code "const_int")
122 (match_test "LUI_OPERAND (ival)")))
124 (define_constraint "M"
125 "A constant that cannot be loaded using @code{lui}, @code{addiu}
127 (and (match_code "const_int")
128 (match_test "!SMALL_OPERAND (ival)")
129 (match_test "!SMALL_OPERAND_UNSIGNED (ival)")
130 (match_test "!LUI_OPERAND (ival)")))
132 (define_constraint "N"
133 "A constant in the range -65535 to -1 (inclusive)."
134 (and (match_code "const_int")
135 (match_test "ival >= -0xffff && ival < 0")))
137 (define_constraint "O"
138 "A signed 15-bit constant."
139 (and (match_code "const_int")
140 (match_test "ival >= -0x4000 && ival < 0x4000")))
142 (define_constraint "P"
143 "A constant in the range 1 to 65535 (inclusive)."
144 (and (match_code "const_int")
145 (match_test "ival > 0 && ival < 0x10000")))
147 ;; Floating-point constraints
149 (define_constraint "G"
150 "Floating-point zero."
151 (and (match_code "const_double")
152 (match_test "op == CONST0_RTX (mode)")))
154 ;; General constraints
156 (define_constraint "Q"
158 (match_operand 0 "const_arith_operand"))
160 (define_memory_constraint "R"
161 "An address that can be used in a non-macro load or store."
162 (and (match_code "mem")
163 (match_test "mips_address_insns (XEXP (op, 0), mode, false) == 1")))
165 (define_constraint "S"
167 A constant call address."
168 (and (match_operand 0 "call_insn_operand")
169 (match_test "CONSTANT_P (op)")))
171 (define_constraint "T"
173 A constant @code{move_operand} that cannot be safely loaded into @code{$25}
175 (and (match_operand 0 "move_operand")
176 (match_test "CONSTANT_P (op)")
177 (match_test "mips_dangerous_for_la25_p (op)")))
179 (define_constraint "U"
181 A constant @code{move_operand} that can be safely loaded into @code{$25}
183 (and (match_operand 0 "move_operand")
184 (match_test "CONSTANT_P (op)")
185 (match_test "!mips_dangerous_for_la25_p (op)")))
187 (define_memory_constraint "W"
189 A memory address based on a member of @code{BASE_REG_CLASS}. This is
190 true for all non-mips16 references (although it can sometimes be implicit
191 if @samp{!TARGET_EXPLICIT_RELOCS}). For MIPS16, it excludes stack and
192 constant-pool references."
193 (and (match_code "mem")
194 (match_operand 0 "memory_operand")
195 (ior (match_test "!TARGET_MIPS16")
196 (and (not (match_operand 0 "stack_operand"))
197 (not (match_test "CONSTANT_P (XEXP (op, 0))"))))))
199 (define_constraint "YG"
202 (and (match_code "const_vector")
203 (match_test "op == CONST0_RTX (mode)")))
205 (define_constraint "YA"
207 An unsigned 6-bit constant."
208 (and (match_code "const_int")
209 (match_test "UIMM6_OPERAND (ival)")))
211 (define_constraint "YB"
213 A signed 10-bit constant."
214 (and (match_code "const_int")
215 (match_test "IMM10_OPERAND (ival)")))