1 /* Definitions of target machine for GNU compiler. Sun 68000/68020 version.
2 Copyright (C) 1987, 88, 93, 94, 95, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Note that some other tm.h files include this one and then override
23 many of the definitions that relate to assembler syntax. */
26 /* Names to predefine in the preprocessor for this target machine. */
28 /* See sun3.h, sun2.h, isi.h for different CPP_PREDEFINES. */
30 /* Print subsidiary information on the compiler version in use. */
32 #define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)");
34 #define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)");
37 /* Define SUPPORT_SUN_FPA to include support for generating code for
38 the Sun Floating Point Accelerator, an optional product for Sun 3
39 machines. By default, it is not defined. Avoid defining it unless
40 you need to output code for the Sun3+FPA architecture, as it has the
41 effect of slowing down the register set operations in hard-reg-set.h
42 (total number of registers will exceed number of bits in a long,
43 if defined, causing the set operations to expand to loops).
44 SUPPORT_SUN_FPA is typically defined in sun3.h. */
46 /* Run-time compilation parameters selecting different hardware subsets. */
48 extern int target_flags;
50 /* Macros used in the machine description to test the flags. */
52 /* Compile for a 68020 (not a 68000 or 68010). */
54 #define TARGET_68020 (target_flags & MASK_68020)
56 /* Compile 68881 insns for floating point (not library calls). */
58 #define TARGET_68881 (target_flags & MASK_68881)
60 /* Compile using 68020 bitfield insns. */
61 #define MASK_BITFIELD 4
62 #define TARGET_BITFIELD (target_flags & MASK_BITFIELD)
64 /* Compile using rtd insn calling sequence.
65 This will not work unless you use prototypes at least
66 for all functions that can take varying numbers of args. */
68 #define TARGET_RTD (target_flags & MASK_RTD)
70 /* Compile passing first two args in regs 0 and 1.
71 This exists only to test compiler features that will
72 be needed for RISC chips. It is not usable
73 and is not intended to be usable on this cpu. */
74 #define MASK_REGPARM 16
75 #define TARGET_REGPARM (target_flags & MASK_REGPARM)
77 /* Compile with 16-bit `int'. */
79 #define TARGET_SHORT (target_flags & MASK_SHORT)
81 /* Compile with special insns for Sun FPA. */
83 #define TARGET_FPA (target_flags & MASK_FPA)
85 /* Compile (actually, link) for Sun SKY board. */
87 #define TARGET_SKY (target_flags & MASK_SKY)
89 /* Optimize for 68040, but still allow execution on 68020
90 (-m68020-40 or -m68040).
91 The 68040 will execute all 68030 and 68881/2 instructions, but some
92 of them must be emulated in software by the OS. When TARGET_68040 is
93 turned on, these instructions won't be used. This code will still
94 run on a 68030 and 68881/2. */
95 #define MASK_68040 (256|512)
96 #define TARGET_68040 (target_flags & MASK_68040)
98 /* Use the 68040-only fp instructions (-m68040 or -m68060). */
99 #define MASK_68040_ONLY 512
100 #define TARGET_68040_ONLY (target_flags & MASK_68040_ONLY)
102 /* Optimize for 68060, but still allow execution on 68020
104 The 68060 will execute all 68030 and 68881/2 instructions, but some
105 of them must be emulated in software by the OS. When TARGET_68060 is
106 turned on, these instructions won't be used. This code will still
107 run on a 68030 and 68881/2. */
108 #define MASK_68060 1024
109 #define TARGET_68060 (target_flags & MASK_68060)
111 /* Compile for mcf5200 */
112 #define MASK_5200 2048
113 #define TARGET_5200 (target_flags & MASK_5200)
115 /* Macro to define tables used to set the flags.
116 This is a list in braces of pairs in braces,
117 each pair being { "NAME", VALUE }
118 where VALUE is the bits to set or minus the bits to clear.
119 An empty string NAME is used to identify the default VALUE. */
121 #define TARGET_SWITCHES \
122 { { "68020", - (MASK_68060|MASK_68040)}, \
123 { "c68020", - (MASK_68060|MASK_68040)}, \
124 { "68020", (MASK_68020|MASK_BITFIELD)}, \
125 { "c68020", (MASK_68020|MASK_BITFIELD)}, \
126 { "68000", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD)}, \
127 { "c68000", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD)}, \
128 { "bitfield", MASK_BITFIELD}, \
129 { "nobitfield", - MASK_BITFIELD}, \
130 { "rtd", MASK_RTD}, \
131 { "nortd", - MASK_RTD}, \
132 { "short", MASK_SHORT}, \
133 { "noshort", - MASK_SHORT}, \
134 { "fpa", -(MASK_SKY|MASK_68040_ONLY|MASK_68881)}, \
135 { "fpa", MASK_FPA}, \
136 { "nofpa", - MASK_FPA}, \
137 { "sky", -(MASK_FPA|MASK_68040_ONLY|MASK_68881)}, \
138 { "sky", MASK_SKY}, \
139 { "nosky", - MASK_SKY}, \
140 { "68881" - (MASK_FPA|MASK_SKY)}, \
141 { "68881", MASK_68881}, \
142 { "soft-float", - (MASK_FPA|MASK_SKY|MASK_68040_ONLY|MASK_68881)}, \
143 { "68020-40", (MASK_BITFIELD|MASK_68881|MASK_68020)}, \
144 { "68030", - (MASK_68040|MASK_68060)}, \
145 { "68030", (MASK_68020|MASK_BITFIELD)}, \
146 { "68040", (MASK_68020|MASK_68881|MASK_BITFIELD|MASK_68040_ONLY)}, \
147 { "68060", (MASK_68020|MASK_68881|MASK_BITFIELD \
148 |MASK_68040_ONLY|MASK_68060)}, \
149 { "5200", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD|MASK_68881)}, \
150 { "5200", (MASK_5200)}, \
153 { "68302", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD)}, \
154 { "68332", - (MASK_68060|MASK_68040|MASK_BITFIELD)}, \
155 { "68332", MASK_68020}, \
157 { "", TARGET_DEFAULT}}
158 /* TARGET_DEFAULT is defined in sun*.h and isi.h, etc. */
160 /* This is meant to be redefined in the host dependent files */
161 #define SUBTARGET_SWITCHES
163 #define OVERRIDE_OPTIONS \
165 if (! TARGET_68020 && flag_pic == 2) \
166 error("-fPIC is not currently supported on the 68000 or 68010\n"); \
167 SUBTARGET_OVERRIDE_OPTIONS; \
170 /* This is meant to be redefined in the host dependent files */
171 #define SUBTARGET_OVERRIDE_OPTIONS
173 /* target machine storage layout */
175 /* Define for XFmode extended real floating point support.
176 This will automatically cause REAL_ARITHMETIC to be defined. */
177 #define LONG_DOUBLE_TYPE_SIZE 96
179 /* Define if you don't want extended real, but do want to use the
180 software floating point emulator for REAL_ARITHMETIC and
181 decimal <-> binary conversion. */
182 /* #define REAL_ARITHMETIC */
184 /* Define this if most significant bit is lowest numbered
185 in instructions that operate on numbered bit-fields.
186 This is true for 68020 insns such as bfins and bfexts.
187 We make it true always by avoiding using the single-bit insns
188 except in special cases with constant bit numbers. */
189 #define BITS_BIG_ENDIAN 1
191 /* Define this if most significant byte of a word is the lowest numbered. */
192 /* That is true on the 68000. */
193 #define BYTES_BIG_ENDIAN 1
195 /* Define this if most significant word of a multiword number is the lowest
197 /* For 68000 we can decide arbitrarily
198 since there are no machine instructions for them.
199 So let's be consistent. */
200 #define WORDS_BIG_ENDIAN 1
202 /* number of bits in an addressable storage unit */
203 #define BITS_PER_UNIT 8
205 /* Width in bits of a "word", which is the contents of a machine register.
206 Note that this is not necessarily the width of data type `int';
207 if using 16-bit ints on a 68000, this would still be 32.
208 But on a machine with 16-bit registers, this would be 16. */
209 #define BITS_PER_WORD 32
211 /* Width of a word, in units (bytes). */
212 #define UNITS_PER_WORD 4
214 /* Width in bits of a pointer.
215 See also the macro `Pmode' defined below. */
216 #define POINTER_SIZE 32
218 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
219 #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)
221 /* Boundary (in *bits*) on which stack pointer should be aligned. */
222 #define STACK_BOUNDARY 16
224 /* Allocation boundary (in *bits*) for the code of a function. */
225 #define FUNCTION_BOUNDARY 16
227 /* Alignment of field after `int : 0' in a structure. */
228 #define EMPTY_FIELD_BOUNDARY 16
230 /* No data type wants to be aligned rounder than this. */
231 #define BIGGEST_ALIGNMENT 16
233 /* Set this nonzero if move instructions will actually fail to work
234 when given unaligned data. */
235 #define STRICT_ALIGNMENT 1
237 #define SELECT_RTX_SECTION(MODE, X) \
240 readonly_data_section(); \
241 else if (LEGITIMATE_PIC_OPERAND_P (X)) \
242 readonly_data_section(); \
247 /* Define number of bits in most basic integer type.
248 (If undefined, default is BITS_PER_WORD). */
250 #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32)
252 /* Define these to avoid dependence on meaning of `int'.
253 Note that WCHAR_TYPE_SIZE is used in cexp.y,
254 where TARGET_SHORT is not available. */
256 #define WCHAR_TYPE "long int"
257 #define WCHAR_TYPE_SIZE 32
259 /* Standard register usage. */
261 /* Number of actual hardware registers.
262 The hardware registers are assigned numbers for the compiler
263 from 0 to just below FIRST_PSEUDO_REGISTER.
264 All registers that the compiler knows about must be given numbers,
265 even those that are not normally considered general registers.
266 For the 68000, we give the data registers numbers 0-7,
267 the address registers numbers 010-017,
268 and the 68881 floating point registers numbers 020-027. */
269 #ifndef SUPPORT_SUN_FPA
270 #define FIRST_PSEUDO_REGISTER 24
272 #define FIRST_PSEUDO_REGISTER 56
275 /* This defines the register which is used to hold the offset table for PIC. */
276 #define PIC_OFFSET_TABLE_REGNUM 13
278 /* Used to output a (use pic_offset_table_rtx) so that we
279 always save/restore a5 in functions that use PIC relocation
280 at *any* time during the compilation process. */
281 #define FINALIZE_PIC finalize_pic()
283 #ifndef SUPPORT_SUN_FPA
285 /* 1 for registers that have pervasive standard uses
286 and are not available for the register allocator.
287 On the 68000, only the stack pointer is such. */
289 #define FIXED_REGISTERS \
290 {/* Data registers. */ \
291 0, 0, 0, 0, 0, 0, 0, 0, \
293 /* Address registers. */ \
294 0, 0, 0, 0, 0, 0, 0, 1, \
296 /* Floating point registers \
298 0, 0, 0, 0, 0, 0, 0, 0 }
300 /* 1 for registers not available across function calls.
301 These must include the FIXED_REGISTERS and also any
302 registers that can be used without being saved.
303 The latter must include the registers where values are returned
304 and the register where structure-value addresses are passed.
305 Aside from that, you can include as many other registers as you like. */
306 #define CALL_USED_REGISTERS \
307 {1, 1, 0, 0, 0, 0, 0, 0, \
308 1, 1, 0, 0, 0, 0, 0, 1, \
309 1, 1, 0, 0, 0, 0, 0, 0 }
311 #else /* SUPPORT_SUN_FPA */
313 /* 1 for registers that have pervasive standard uses
314 and are not available for the register allocator.
315 On the 68000, only the stack pointer is such. */
317 /* fpa0 is also reserved so that it can be used to move shit back and
318 forth between high fpa regs and everything else. */
320 #define FIXED_REGISTERS \
321 {/* Data registers. */ \
322 0, 0, 0, 0, 0, 0, 0, 0, \
324 /* Address registers. */ \
325 0, 0, 0, 0, 0, 0, 0, 1, \
327 /* Floating point registers \
329 0, 0, 0, 0, 0, 0, 0, 0, \
331 /* Sun3 FPA registers. */ \
332 1, 0, 0, 0, 0, 0, 0, 0, \
333 0, 0, 0, 0, 0, 0, 0, 0, \
334 0, 0, 0, 0, 0, 0, 0, 0, \
335 0, 0, 0, 0, 0, 0, 0, 0 }
337 /* 1 for registers not available across function calls.
338 These must include the FIXED_REGISTERS and also any
339 registers that can be used without being saved.
340 The latter must include the registers where values are returned
341 and the register where structure-value addresses are passed.
342 Aside from that, you can include as many other registers as you like. */
343 #define CALL_USED_REGISTERS \
344 {1, 1, 0, 0, 0, 0, 0, 0, \
345 1, 1, 0, 0, 0, 0, 0, 1, \
346 1, 1, 0, 0, 0, 0, 0, 0, \
347 /* FPA registers. */ \
348 1, 1, 1, 1, 0, 0, 0, 0, \
349 0, 0, 0, 0, 0, 0, 0, 0, \
350 0, 0, 0, 0, 0, 0, 0, 0, \
351 0, 0, 0, 0, 0, 0, 0, 0 }
353 #endif /* defined SUPPORT_SUN_FPA */
356 /* Make sure everything's fine if we *don't* have a given processor.
357 This assumes that putting a register in fixed_regs will keep the
358 compiler's mitts completely off it. We don't bother to zero it out
359 of register classes. If neither TARGET_FPA or TARGET_68881 is set,
360 the compiler won't touch since no instructions that use these
361 registers will be valid. */
363 #ifdef SUPPORT_SUN_FPA
365 #define CONDITIONAL_REGISTER_USAGE \
371 COPY_HARD_REG_SET (x, reg_class_contents[(int)FPA_REGS]); \
372 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
373 if (TEST_HARD_REG_BIT (x, i)) \
374 fixed_regs[i] = call_used_regs[i] = 1; \
378 COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
379 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
380 if (TEST_HARD_REG_BIT (x, i)) \
381 fixed_regs[i] = call_used_regs[i] = 1; \
385 #endif /* defined SUPPORT_SUN_FPA */
387 /* Return number of consecutive hard regs needed starting at reg REGNO
388 to hold something of mode MODE.
389 This is ordinarily the length in words of a value of mode MODE
390 but can be less for certain modes in special long registers.
392 On the 68000, ordinary registers hold 32 bits worth;
393 for the 68881 registers, a single register is always enough for
394 anything that can be stored in them at all. */
395 #define HARD_REGNO_NREGS(REGNO, MODE) \
396 ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \
397 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
399 #ifndef SUPPORT_SUN_FPA
401 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
402 On the 68000, the cpu registers can hold any mode but the 68881 registers
403 can hold only SFmode or DFmode. The 68881 registers can't hold anything
404 if 68881 use is disabled. */
406 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
408 && !((REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8)) \
411 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
412 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)))
414 #else /* defined SUPPORT_SUN_FPA */
416 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
417 On the 68000, the cpu registers can hold any mode but the 68881 registers
418 can hold only SFmode or DFmode. And the 68881 registers can't hold anything
419 if 68881 use is disabled. However, the Sun FPA register can
420 (apparently) hold whatever you feel like putting in them.
421 If using the fpa, don't put a double in d7/a0. */
423 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
426 && GET_MODE_CLASS ((MODE)) != MODE_INT \
427 && GET_MODE_UNIT_SIZE ((MODE)) > 4 \
428 && (REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8 \
429 && (REGNO) % (GET_MODE_UNIT_SIZE ((MODE)) / 4) != 0)) \
431 ? TARGET_68881 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
432 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
433 : ((REGNO) < 56 ? TARGET_FPA : 0)))
435 #endif /* defined SUPPORT_SUN_FPA */
437 /* Value is 1 if it is a good idea to tie two pseudo registers
438 when one has mode MODE1 and one has mode MODE2.
439 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
440 for any hard reg, then this must be 0 for correct output. */
441 #define MODES_TIEABLE_P(MODE1, MODE2) \
443 || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
444 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
445 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
446 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)))
448 /* Specify the registers used for certain standard purposes.
449 The values of these macros are register numbers. */
451 /* m68000 pc isn't overloaded on a register. */
452 /* #define PC_REGNUM */
454 /* Register to use for pushing function arguments. */
455 #define STACK_POINTER_REGNUM 15
457 /* Base register for access to local variables of the function. */
458 #define FRAME_POINTER_REGNUM 14
460 /* Value should be nonzero if functions must have frame pointers.
461 Zero means the frame pointer need not be set up (and parms
462 may be accessed via the stack pointer) in functions that seem suitable.
463 This is computed in `reload', in reload1.c. */
464 #define FRAME_POINTER_REQUIRED 0
466 /* Base register for access to arguments of the function. */
467 #define ARG_POINTER_REGNUM 14
469 /* Register in which static-chain is passed to a function. */
470 #define STATIC_CHAIN_REGNUM 8
472 /* Register in which address to store a structure value
473 is passed to a function. */
474 #define STRUCT_VALUE_REGNUM 9
476 /* Define the classes of registers for register constraints in the
477 machine description. Also define ranges of constants.
479 One of the classes must always be named ALL_REGS and include all hard regs.
480 If there is more than one class, another class must be named NO_REGS
481 and contain no registers.
483 The name GENERAL_REGS must be the name of a class (or an alias for
484 another name such as ALL_REGS). This is the class of registers
485 that is allowed by "g" or "r" in a register constraint.
486 Also, registers outside this class are allocated only when
487 instructions express preferences for them.
489 The classes must be numbered in nondecreasing order; that is,
490 a larger-numbered class must never be contained completely
491 in a smaller-numbered class.
493 For any two classes, it is very desirable that there be another
494 class that represents their union. */
496 /* The 68000 has three kinds of registers, so eight classes would be
497 a complete set. One of them is not needed. */
499 #ifndef SUPPORT_SUN_FPA
504 GENERAL_REGS, DATA_OR_FP_REGS,
505 ADDR_OR_FP_REGS, ALL_REGS,
508 #define N_REG_CLASSES (int) LIM_REG_CLASSES
510 /* Give names of register classes as strings for dump file. */
512 #define REG_CLASS_NAMES \
513 { "NO_REGS", "DATA_REGS", \
514 "ADDR_REGS", "FP_REGS", \
515 "GENERAL_REGS", "DATA_OR_FP_REGS", \
516 "ADDR_OR_FP_REGS", "ALL_REGS" }
518 /* Define which registers fit in which classes.
519 This is an initializer for a vector of HARD_REG_SET
520 of length N_REG_CLASSES. */
522 #define REG_CLASS_CONTENTS \
524 0x00000000, /* NO_REGS */ \
525 0x000000ff, /* DATA_REGS */ \
526 0x0000ff00, /* ADDR_REGS */ \
527 0x00ff0000, /* FP_REGS */ \
528 0x0000ffff, /* GENERAL_REGS */ \
529 0x00ff00ff, /* DATA_OR_FP_REGS */ \
530 0x00ffff00, /* ADDR_OR_FP_REGS */ \
531 0x00ffffff, /* ALL_REGS */ \
534 /* The same information, inverted:
535 Return the class number of the smallest class containing
536 reg number REGNO. This could be a conditional expression
537 or could index an array. */
539 #define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1)
541 #else /* defined SUPPORT_SUN_FPA */
544 * Notes on final choices:
546 * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything
548 * 2) Removed all unions that involve address registers with
549 * floating point registers (left in unions of address and data with
551 * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS.
552 * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS.
553 * 4) Left in everything else.
555 enum reg_class { NO_REGS, LO_FPA_REGS, FPA_REGS, FP_REGS,
556 FP_OR_FPA_REGS, DATA_REGS, DATA_OR_FPA_REGS, DATA_OR_FP_REGS,
557 DATA_OR_FP_OR_FPA_REGS, ADDR_REGS, GENERAL_REGS,
558 GENERAL_OR_FPA_REGS, GENERAL_OR_FP_REGS, ALL_REGS,
561 #define N_REG_CLASSES (int) LIM_REG_CLASSES
563 /* Give names of register classes as strings for dump file. */
565 #define REG_CLASS_NAMES \
566 { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \
567 "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \
568 "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \
569 "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" }
571 /* Define which registers fit in which classes.
572 This is an initializer for a vector of HARD_REG_SET
573 of length N_REG_CLASSES. */
575 #define REG_CLASS_CONTENTS \
577 {0, 0}, /* NO_REGS */ \
578 {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \
579 {0xff000000, 0x00ffffff}, /* FPA_REGS */ \
580 {0x00ff0000, 0x00000000}, /* FP_REGS */ \
581 {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \
582 {0x000000ff, 0x00000000}, /* DATA_REGS */ \
583 {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \
584 {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \
585 {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\
586 {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \
587 {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \
588 {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\
589 {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\
590 {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \
593 /* The same information, inverted:
594 Return the class number of the smallest class containing
595 reg number REGNO. This could be a conditional expression
596 or could index an array. */
598 extern enum reg_class regno_reg_class[];
599 #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3])
601 #endif /* SUPPORT_SUN_FPA */
603 /* The class value for index registers, and the one for base regs. */
605 #define INDEX_REG_CLASS GENERAL_REGS
606 #define BASE_REG_CLASS ADDR_REGS
608 /* Get reg_class from a letter such as appears in the machine description.
609 We do a trick here to modify the effective constraints on the
610 machine description; we zorch the constraint letters that aren't
611 appropriate for a specific target. This allows us to guarantee
612 that a specific kind of register will not be used for a given target
613 without fiddling with the register classes above. */
615 #ifndef SUPPORT_SUN_FPA
617 #define REG_CLASS_FROM_LETTER(C) \
618 ((C) == 'a' ? ADDR_REGS : \
619 ((C) == 'd' ? DATA_REGS : \
620 ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
624 #else /* defined SUPPORT_SUN_FPA */
626 #define REG_CLASS_FROM_LETTER(C) \
627 ((C) == 'a' ? ADDR_REGS : \
628 ((C) == 'd' ? DATA_REGS : \
629 ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
631 ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \
633 ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \
637 #endif /* defined SUPPORT_SUN_FPA */
639 /* The letters I, J, K, L and M in a register constraint string
640 can be used to stand for particular ranges of immediate operands.
641 This macro defines what the ranges are.
642 C is the letter, and VALUE is a constant value.
643 Return 1 if VALUE is in the range specified by C.
645 For the 68000, `I' is used for the range 1 to 8
646 allowed as immediate shift counts and in addq.
647 `J' is used for the range of signed numbers that fit in 16 bits.
648 `K' is for numbers that moveq can't handle.
649 `L' is for range -8 to -1, range of values that can be added with subq.
650 `M' is for numbers that moveq+notb can't handle. */
652 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
653 ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \
654 (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
655 (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
656 (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : \
657 (C) == 'M' ? (VALUE) < -0x100 && (VALUE) >= 0x100 : 0)
660 * A small bit of explanation:
661 * "G" defines all of the floating constants that are *NOT* 68881
662 * constants. this is so 68881 constants get reloaded and the
663 * fpmovecr is used. "H" defines *only* the class of constants that
664 * the fpa can use, because these can be gotten at in any fpa
665 * instruction and there is no need to force reloads.
667 #ifndef SUPPORT_SUN_FPA
668 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
669 ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 )
670 #else /* defined SUPPORT_SUN_FPA */
671 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
672 ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \
673 (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0)
674 #endif /* defined SUPPORT_SUN_FPA */
676 /* Given an rtx X being reloaded into a reg required to be
677 in class CLASS, return the class of reg to actually use.
678 In general this is just CLASS; but on some machines
679 in some cases it is preferable to use a more restrictive class.
680 On the 68000 series, use a data reg if possible when the
681 value is a constant in the range where moveq could be used
682 and we ensure that QImodes are reloaded into data regs.
683 Also, if a floating constant needs reloading, put it in memory.
684 Don't do this for !G constants, since all patterns in the md file
685 expect them to be loaded into a register via fpmovecr. See above. */
687 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
688 ((GET_CODE (X) == CONST_INT \
689 && (unsigned) (INTVAL (X) + 0x80) < 0x100 \
690 && (CLASS) != ADDR_REGS) \
692 : (GET_MODE (X) == QImode && (CLASS) != ADDR_REGS) \
694 : (GET_CODE (X) == CONST_DOUBLE \
695 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
696 ? (! CONST_DOUBLE_OK_FOR_LETTER_P (X, 'G') \
697 && (CLASS == FP_REGS || CLASS == DATA_OR_FP_REGS) \
698 ? FP_REGS : NO_REGS) \
701 /* Return the maximum number of consecutive registers
702 needed to represent mode MODE in a register of class CLASS. */
703 /* On the 68000, this is the size of MODE in words,
704 except in the FP regs, where a single reg is always enough. */
705 #ifndef SUPPORT_SUN_FPA
707 #define CLASS_MAX_NREGS(CLASS, MODE) \
708 ((CLASS) == FP_REGS ? 1 \
709 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
711 /* Moves between fp regs and other regs are two insns. */
712 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
713 (((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
714 || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
717 #else /* defined SUPPORT_SUN_FPA */
719 #define CLASS_MAX_NREGS(CLASS, MODE) \
720 ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \
721 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
723 /* Moves between fp regs and other regs are two insns. */
724 /* Likewise for high fpa regs and other regs. */
725 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
726 ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
727 || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
728 || ((CLASS1) == FPA_REGS && (CLASS2) != FPA_REGS) \
729 || ((CLASS2) == FPA_REGS && (CLASS1) != FPA_REGS)) \
732 #endif /* define SUPPORT_SUN_FPA */
734 /* Stack layout; function entry, exit and calling. */
736 /* Define this if pushing a word on the stack
737 makes the stack pointer a smaller address. */
738 #define STACK_GROWS_DOWNWARD
740 /* Nonzero if we need to generate stack-probe insns.
741 On most systems they are not needed.
742 When they are needed, define this as the stack offset to probe at. */
745 /* Define this if the nominal address of the stack frame
746 is at the high-address end of the local variables;
747 that is, each additional local variable allocated
748 goes at a more negative offset in the frame. */
749 #define FRAME_GROWS_DOWNWARD
751 /* Offset within stack frame to start allocating local variables at.
752 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
753 first local allocated. Otherwise, it is the offset to the BEGINNING
754 of the first local allocated. */
755 #define STARTING_FRAME_OFFSET 0
757 /* If we generate an insn to push BYTES bytes,
758 this says how many the stack pointer really advances by.
759 On the 68000, sp@- in a byte insn really pushes a word. */
760 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
762 /* Offset of first parameter from the argument pointer register value. */
763 #define FIRST_PARM_OFFSET(FNDECL) 8
765 /* Value is the number of byte of arguments automatically
766 popped when returning from a subroutine call.
767 FUNDECL is the declaration node of the function (as a tree),
768 FUNTYPE is the data type of the function (as a tree),
769 or for a library call it is an identifier node for the subroutine name.
770 SIZE is the number of bytes of arguments passed on the stack.
772 On the 68000, the RTS insn cannot pop anything.
773 On the 68010, the RTD insn may be used to pop them if the number
774 of args is fixed, but if the number is variable then the caller
775 must pop them all. RTD can't be used for library calls now
776 because the library is compiled with the Unix compiler.
777 Use of RTD is a selectable option, since it is incompatible with
778 standard Unix calling sequences. If the option is not selected,
779 the caller must always pop the args. */
781 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
782 ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
783 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
784 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
785 == void_type_node))) \
788 /* Define how to find the value returned by a function.
789 VALTYPE is the data type of the value (as a tree).
790 If the precise function being called is known, FUNC is its FUNCTION_DECL;
791 otherwise, FUNC is 0. */
793 /* On the 68000 the return value is in D0 regardless. */
795 #define FUNCTION_VALUE(VALTYPE, FUNC) \
796 gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
798 /* Define how to find the value returned by a library function
799 assuming the value has mode MODE. */
801 /* On the 68000 the return value is in D0 regardless. */
803 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
805 /* 1 if N is a possible register number for a function value.
806 On the 68000, d0 is the only register thus used. */
808 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
810 /* Define this to be true when FUNCTION_VALUE_REGNO_P is true for
811 more than one register. */
813 #define NEEDS_UNTYPED_CALL 0
815 /* Define this if PCC uses the nonreentrant convention for returning
816 structure and union values. */
818 #define PCC_STATIC_STRUCT_RETURN
820 /* 1 if N is a possible register number for function argument passing.
821 On the 68000, no registers are used in this way. */
823 #define FUNCTION_ARG_REGNO_P(N) 0
825 /* Define a data type for recording info about an argument list
826 during the scan of that argument list. This data type should
827 hold all necessary information about the function itself
828 and about the args processed so far, enough to enable macros
829 such as FUNCTION_ARG to determine where the next arg should go.
831 On the m68k, this is a single integer, which is a number of bytes
832 of arguments scanned so far. */
834 #define CUMULATIVE_ARGS int
836 /* Initialize a variable CUM of type CUMULATIVE_ARGS
837 for a call to a function whose data type is FNTYPE.
838 For a library call, FNTYPE is 0.
840 On the m68k, the offset starts at 0. */
842 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
845 /* Update the data in CUM to advance over an argument
846 of mode MODE and data type TYPE.
847 (TYPE is null for libcalls where that information may not be available.) */
849 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
850 ((CUM) += ((MODE) != BLKmode \
851 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
852 : (int_size_in_bytes (TYPE) + 3) & ~3))
854 /* Define where to put the arguments to a function.
855 Value is zero to push the argument on the stack,
856 or a hard register in which to store the argument.
858 MODE is the argument's machine mode.
859 TYPE is the data type of the argument (as a tree).
860 This is null for libcalls where that information may
862 CUM is a variable of type CUMULATIVE_ARGS which gives info about
863 the preceding args and about the function being called.
864 NAMED is nonzero if this argument is a named parameter
865 (otherwise it is an extra parameter matching an ellipsis). */
867 /* On the 68000 all args are pushed, except if -mregparm is specified
868 then the first two words of arguments are passed in d0, d1.
869 *NOTE* -mregparm does not work.
870 It exists only to test register calling conventions. */
872 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
873 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
875 /* For an arg passed partly in registers and partly in memory,
876 this is the number of registers used.
877 For args passed entirely in registers or entirely in memory, zero. */
879 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
880 ((TARGET_REGPARM && (CUM) < 8 \
881 && 8 < ((CUM) + ((MODE) == BLKmode \
882 ? int_size_in_bytes (TYPE) \
883 : GET_MODE_SIZE (MODE)))) \
886 /* Generate the assembly code for function entry. */
887 #define FUNCTION_PROLOGUE(FILE, SIZE) output_function_prologue(FILE, SIZE)
889 /* Output assembler code to FILE to increment profiler label # LABELNO
890 for profiling a function entry. */
892 #define FUNCTION_PROFILER(FILE, LABELNO) \
893 asm_fprintf (FILE, "\tlea %LLP%d,%Ra0\n\tjsr mcount\n", (LABELNO))
895 /* Output assembler code to FILE to initialize this source file's
896 basic block profiling info, if that has not already been done. */
898 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
901 switch (profile_block_flag) \
904 asm_fprintf (FILE, "\tpea %d\n\tpea %LLPBX0\n\tjsr %U__bb_init_trace_func\n\taddql %I8,%Rsp\n", \
909 asm_fprintf (FILE, "\ttstl %LLPBX0\n\tbne %LLPI%d\n\tpea %LLPBX0\n\tjsr %U__bb_init_func\n\taddql %I4,%Rsp\n%LLPI%d:\n", \
910 (BLOCK_OR_LABEL), (BLOCK_OR_LABEL)); \
916 /* Output assembler code to FILE to increment the counter for
917 the BLOCKNO'th basic block in this source file. */
919 #define BLOCK_PROFILER(FILE, BLOCKNO) \
922 switch (profile_block_flag) \
925 asm_fprintf (FILE, "\tmovel %Ra1,%Rsp@-\n\tlea ___bb,%Ra1\n\tmovel %I%d,%Ra1@(0)\n\tmovel %I%LLPBX0,%Ra1@(4)\n\tmovel %Rsp@+,%Ra1\n\tjsr %U__bb_trace_func\n", \
930 asm_fprintf (FILE, "\taddql %I1,%LLPBX2+%d\n", 4 * BLOCKNO); \
936 /* Output assembler code to FILE to indicate return from
937 a function during basic block profiling. */
939 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
940 asm_fprintf (FILE, "\tjsr %U__bb_trace_ret\n");
942 /* Save all registers which may be clobbered by a function call. */
945 #define MACHINE_STATE_SAVE(id) \
946 asm ("move.w %ccr,-(%sp)"); \
947 asm ("movm.l &0xc0c0,-(%sp)");
949 #define MACHINE_STATE_SAVE(id) \
950 asm ("movew cc,sp@-"); \
951 asm ("moveml d0/d1/a0/a1,sp@-");
954 /* Restore all registers saved by MACHINE_STATE_SAVE. */
957 #define MACHINE_STATE_RESTORE(id) \
958 asm ("movm.l (%sp)+,&0x0303"); \
959 asm ("move.w (%sp)+,%ccr");
961 #define MACHINE_STATE_RESTORE(id) \
962 asm ("moveml sp@+,d0/d1/a0/a1"); \
963 asm ("movew sp@+,cc");
966 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
967 the stack pointer does not matter. The value is tested only in
968 functions that have frame pointers.
969 No definition is equivalent to always zero. */
971 #define EXIT_IGNORE_STACK 1
973 /* Generate the assembly code for function exit. */
974 #define FUNCTION_EPILOGUE(FILE, SIZE) output_function_epilogue (FILE, SIZE)
976 /* This is a hook for other tm files to change. */
977 /* #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) */
979 /* Determine if the epilogue should be output as RTL.
980 You should override this if you define FUNCTION_EXTRA_EPILOGUE. */
981 #define USE_RETURN_INSN use_return_insn ()
983 /* Store in the variable DEPTH the initial difference between the
984 frame pointer reg contents and the stack pointer reg contents,
985 as of the start of the function body. This depends on the layout
986 of the fixed parts of the stack frame and on how registers are saved.
988 On the 68k, if we have a frame, we must add one word to its length
989 to allow for the place that a6 is stored when we do have a frame pointer.
990 Otherwise, we would need to compute the offset from the frame pointer
991 of a local variable as a function of frame_pointer_needed, which
994 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
997 for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \
998 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
1000 for (regno = 0; regno < 16; regno++) \
1001 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
1003 (DEPTH) = (offset + ((get_frame_size () + 3) & -4) \
1004 + (get_frame_size () == 0 ? 0 : 4)); \
1007 /* Output assembler code for a block containing the constant parts
1008 of a trampoline, leaving space for the variable parts. */
1010 /* On the 68k, the trampoline looks like this:
1014 WARNING: Targets that may run on 68040+ cpus must arrange for
1015 the instruction cache to be flushed. Previous incarnations of
1016 the m68k trampoline code attempted to get around this by either
1017 using an out-of-line transfer function or pc-relative data, but
1018 the fact remains that the code to jump to the transfer function
1019 or the code to load the pc-relative data needs to be flushed
1020 just as much as the "variable" portion of the trampoline.
1021 Recognizing that a cache flush is going to be required anyway,
1022 dispense with such notions and build a smaller trampoline. */
1024 /* Since more instructions are required to move a template into
1025 place than to create it on the spot, don't use a template. */
1027 /* Length in units of the trampoline for entering a nested function. */
1029 #define TRAMPOLINE_SIZE 12
1031 /* Alignment required for a trampoline in bits. */
1033 #define TRAMPOLINE_ALIGNMENT 16
1035 /* Targets redefine this to invoke code to either flush the cache,
1036 or enable stack execution (or both). */
1038 #ifndef FINALIZE_TRAMPOLINE
1039 #define FINALIZE_TRAMPOLINE(TRAMP)
1042 /* Emit RTL insns to initialize the variable parts of a trampoline.
1043 FNADDR is an RTX for the address of the function's pure code.
1044 CXT is an RTX for the static chain value for the function. */
1046 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1048 emit_move_insn (gen_rtx (MEM, HImode, TRAMP), GEN_INT(0x207C)); \
1049 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), CXT); \
1050 emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 6)), \
1052 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 8)), FNADDR); \
1053 FINALIZE_TRAMPOLINE(TRAMP); \
1056 /* This is the library routine that is used
1057 to transfer control from the trampoline
1058 to the actual nested function.
1059 It is defined for backward compatibility,
1060 for linking with object code that used the old
1061 trampoline definition. */
1063 /* A colon is used with no explicit operands
1064 to cause the template string to be scanned for %-constructs. */
1065 /* The function name __transfer_from_trampoline is not actually used.
1066 The function definition just permits use of "asm with operands"
1067 (though the operand list is empty). */
1068 #define TRANSFER_FROM_TRAMPOLINE \
1070 __transfer_from_trampoline () \
1072 register char *a0 asm ("%a0"); \
1073 asm (GLOBAL_ASM_OP " ___trampoline"); \
1074 asm ("___trampoline:"); \
1075 asm volatile ("move%.l %0,%@" : : "m" (a0[22])); \
1076 asm volatile ("move%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \
1080 /* Addressing modes, and classification of registers for them. */
1082 #define HAVE_POST_INCREMENT
1083 /* #define HAVE_POST_DECREMENT */
1085 #define HAVE_PRE_DECREMENT
1086 /* #define HAVE_PRE_INCREMENT */
1088 /* Macros to check register numbers against specific register classes. */
1090 /* These assume that REGNO is a hard or pseudo reg number.
1091 They give nonzero only if REGNO is a hard reg of the suitable class
1092 or a pseudo reg currently allocated to a suitable hard reg.
1093 Since they use reg_renumber, they are safe only once reg_renumber
1094 has been allocated, which happens in local-alloc.c. */
1096 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1097 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
1098 #define REGNO_OK_FOR_BASE_P(REGNO) \
1099 (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8)
1100 #define REGNO_OK_FOR_DATA_P(REGNO) \
1101 ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
1102 #define REGNO_OK_FOR_FP_P(REGNO) \
1103 (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8)
1104 #ifdef SUPPORT_SUN_FPA
1105 #define REGNO_OK_FOR_FPA_P(REGNO) \
1106 (((REGNO) >= 24 && (REGNO) < 56) || (reg_renumber[REGNO] >= 24 && reg_renumber[REGNO] < 56))
1109 /* Now macros that check whether X is a register and also,
1110 strictly, whether it is in a specified class.
1112 These macros are specific to the 68000, and may be used only
1113 in code for printing assembler insns and in conditions for
1114 define_optimization. */
1116 /* 1 if X is a data register. */
1118 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
1120 /* 1 if X is an fp register. */
1122 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1124 /* 1 if X is an address register */
1126 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
1128 #ifdef SUPPORT_SUN_FPA
1129 /* 1 if X is a register in the Sun FPA. */
1130 #define FPA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPA_P (REGNO (X)))
1132 /* Answer must be no if we don't have an FPA. */
1133 #define FPA_REG_P(X) 0
1136 /* Maximum number of registers that can appear in a valid memory address. */
1138 #define MAX_REGS_PER_ADDRESS 2
1140 /* Recognize any constant value that is a valid address. */
1142 #define CONSTANT_ADDRESS_P(X) \
1143 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1144 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1145 || GET_CODE (X) == HIGH)
1147 /* Nonzero if the constant value X is a legitimate general operand.
1148 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1150 #define LEGITIMATE_CONSTANT_P(X) 1
1152 /* Nonzero if the constant value X is a legitimate general operand
1153 when generating PIC code. It is given that flag_pic is on and
1154 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1156 #define LEGITIMATE_PIC_OPERAND_P(X) \
1157 ((! symbolic_operand (X, VOIDmode) \
1158 && ! (GET_CODE (X) == CONST_DOUBLE && CONST_DOUBLE_MEM (X) \
1159 && GET_CODE (CONST_DOUBLE_MEM (X)) == MEM \
1160 && symbolic_operand (XEXP (CONST_DOUBLE_MEM (X), 0), \
1162 || (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)))
1164 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1165 and check its validity for a certain class.
1166 We have two alternate definitions for each of them.
1167 The usual definition accepts all pseudo regs; the other rejects
1168 them unless they have been allocated suitable hard regs.
1169 The symbol REG_OK_STRICT causes the latter definition to be used.
1171 Most source files want to accept pseudo regs in the hope that
1172 they will get allocated to the class that the insn wants them to be in.
1173 Source files for reload pass need to be strict.
1174 After reload, it makes no difference, since pseudo regs have
1175 been eliminated by then. */
1177 #ifndef REG_OK_STRICT
1179 /* Nonzero if X is a hard reg that can be used as an index
1180 or if it is a pseudo reg. */
1181 #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8)
1182 /* Nonzero if X is a hard reg that can be used as a base reg
1183 or if it is a pseudo reg. */
1184 #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0)
1188 /* Nonzero if X is a hard reg that can be used as an index. */
1189 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1190 /* Nonzero if X is a hard reg that can be used as a base reg. */
1191 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1195 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1196 that is a valid memory address for an instruction.
1197 The MODE argument is the machine mode for the MEM expression
1198 that wants to use this address.
1200 When generating PIC, an address involving a SYMBOL_REF is legitimate
1201 if and only if it is the sum of pic_offset_table_rtx and the SYMBOL_REF.
1202 We use LEGITIMATE_PIC_OPERAND_P to throw out the illegitimate addresses,
1203 and we explicitly check for the sum of pic_offset_table_rtx and a SYMBOL_REF.
1205 Likewise for a LABEL_REF when generating PIC.
1207 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
1209 /* Allow SUBREG everywhere we allow REG. This results in better code. It
1210 also makes function inlining work when inline functions are called with
1211 arguments that are SUBREGs. */
1213 #define LEGITIMATE_BASE_REG_P(X) \
1214 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1215 || (GET_CODE (X) == SUBREG \
1216 && GET_CODE (SUBREG_REG (X)) == REG \
1217 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
1219 #define INDIRECTABLE_1_ADDRESS_P(X) \
1220 ((CONSTANT_ADDRESS_P (X) && (!flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
1221 || LEGITIMATE_BASE_REG_P (X) \
1222 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
1223 && LEGITIMATE_BASE_REG_P (XEXP (X, 0))) \
1224 || (GET_CODE (X) == PLUS \
1225 && LEGITIMATE_BASE_REG_P (XEXP (X, 0)) \
1226 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1227 && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000) \
1228 || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1229 && flag_pic && GET_CODE (XEXP (X, 1)) == SYMBOL_REF) \
1230 || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1231 && flag_pic && GET_CODE (XEXP (X, 1)) == LABEL_REF)) \
1234 /* This should replace the last two (non-pic) lines
1235 except that Sun's assembler does not seem to handle such operands. */
1236 && (TARGET_68020 ? CONSTANT_ADDRESS_P (XEXP (X, 1)) \
1237 : (GET_CODE (XEXP (X, 1)) == CONST_INT \
1238 && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000))))
1242 #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
1243 { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; }
1245 /* Only labels on dispatch tables are valid for indexing from. */
1246 #define GO_IF_INDEXABLE_BASE(X, ADDR) \
1248 if (GET_CODE (X) == LABEL_REF \
1249 && (temp = next_nonnote_insn (XEXP (X, 0))) != 0 \
1250 && GET_CODE (temp) == JUMP_INSN \
1251 && (GET_CODE (PATTERN (temp)) == ADDR_VEC \
1252 || GET_CODE (PATTERN (temp)) == ADDR_DIFF_VEC)) \
1254 if (LEGITIMATE_BASE_REG_P (X)) goto ADDR; }
1256 #define GO_IF_INDEXING(X, ADDR) \
1257 { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
1258 { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
1259 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
1260 { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
1262 #define GO_IF_INDEXED_ADDRESS(X, ADDR) \
1263 { GO_IF_INDEXING (X, ADDR); \
1264 if (GET_CODE (X) == PLUS) \
1265 { if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1266 && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \
1267 { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \
1268 if (GET_CODE (XEXP (X, 0)) == CONST_INT \
1269 && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \
1270 { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
1272 #define LEGITIMATE_INDEX_REG_P(X) \
1273 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1274 || (GET_CODE (X) == SIGN_EXTEND \
1275 && GET_CODE (XEXP (X, 0)) == REG \
1276 && GET_MODE (XEXP (X, 0)) == HImode \
1277 && REG_OK_FOR_INDEX_P (XEXP (X, 0))) \
1278 || (GET_CODE (X) == SUBREG \
1279 && GET_CODE (SUBREG_REG (X)) == REG \
1280 && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
1282 #define LEGITIMATE_INDEX_P(X) \
1283 (LEGITIMATE_INDEX_REG_P (X) \
1284 || ((TARGET_68020 || TARGET_5200) && GET_CODE (X) == MULT \
1285 && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
1286 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1287 && (INTVAL (XEXP (X, 1)) == 2 \
1288 || INTVAL (XEXP (X, 1)) == 4 \
1289 || (INTVAL (XEXP (X, 1)) == 8 && !TARGET_5200))))
1291 /* If pic, we accept INDEX+LABEL, which is what do_tablejump makes. */
1292 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1293 { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
1294 GO_IF_INDEXED_ADDRESS (X, ADDR); \
1295 if (flag_pic && MODE == CASE_VECTOR_MODE && GET_CODE (X) == PLUS \
1296 && LEGITIMATE_INDEX_P (XEXP (X, 0)) \
1297 && GET_CODE (XEXP (X, 1)) == LABEL_REF) \
1300 /* Don't call memory_address_noforce for the address to fetch
1301 the switch offset. This address is ok as it stands (see above),
1302 but memory_address_noforce would alter it. */
1303 #define PIC_CASE_VECTOR_ADDRESS(index) index
1305 /* Try machine-dependent ways of modifying an illegitimate address
1306 to be legitimate. If we find one, return the new, valid address.
1307 This macro is used in only one place: `memory_address' in explow.c.
1309 OLDX is the address as it was before break_out_memory_refs was called.
1310 In some cases it is useful to look at this to decide what needs to be done.
1312 MODE and WIN are passed so that this macro can use
1313 GO_IF_LEGITIMATE_ADDRESS.
1315 It is always safe for this macro to do nothing. It exists to recognize
1316 opportunities to optimize the output.
1318 For the 68000, we handle X+REG by loading X into a register R and
1319 using R+REG. R will go in an address reg and indexing will be used.
1320 However, if REG is a broken-out memory address or multiplication,
1321 nothing needs to be done because REG can certainly go in an address reg. */
1323 #define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; }
1324 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1325 { register int ch = (X) != (OLDX); \
1326 if (GET_CODE (X) == PLUS) \
1328 if (GET_CODE (XEXP (X, 0)) == MULT) \
1329 { COPY_ONCE (X); XEXP (X, 0) = force_operand (XEXP (X, 0), 0);} \
1330 if (GET_CODE (XEXP (X, 1)) == MULT) \
1331 { COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \
1332 if (ch && GET_CODE (XEXP (X, 1)) == REG \
1333 && GET_CODE (XEXP (X, 0)) == REG) \
1335 if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1336 if (GET_CODE (XEXP (X, 0)) == REG \
1337 || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
1338 && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
1339 && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
1340 { register rtx temp = gen_reg_rtx (Pmode); \
1341 register rtx val = force_operand (XEXP (X, 1), 0); \
1342 emit_move_insn (temp, val); \
1344 XEXP (X, 1) = temp; \
1346 else if (GET_CODE (XEXP (X, 1)) == REG \
1347 || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
1348 && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1349 && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
1350 { register rtx temp = gen_reg_rtx (Pmode); \
1351 register rtx val = force_operand (XEXP (X, 0), 0); \
1352 emit_move_insn (temp, val); \
1354 XEXP (X, 0) = temp; \
1357 /* Go to LABEL if ADDR (a legitimate address expression)
1358 has an effect that depends on the machine mode it is used for.
1359 On the 68000, only predecrement and postincrement address depend thus
1360 (the amount of decrement or increment being the length of the operand). */
1362 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1363 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL
1365 /* Specify the machine mode that this machine uses
1366 for the index in the tablejump instruction. */
1367 #define CASE_VECTOR_MODE HImode
1369 /* Define this if the tablejump instruction expects the table
1370 to contain offsets from the address of the table.
1371 Do not define this if the table should contain absolute addresses. */
1372 #define CASE_VECTOR_PC_RELATIVE
1374 /* Specify the tree operation to be used to convert reals to integers. */
1375 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1377 /* This is the kind of divide that is easiest to do in the general case. */
1378 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1380 /* Define this as 1 if `char' should by default be signed; else as 0. */
1381 #define DEFAULT_SIGNED_CHAR 1
1383 /* Don't cse the address of the function being compiled. */
1384 #define NO_RECURSIVE_FUNCTION_CSE
1386 /* Max number of bytes we can move from memory to memory
1387 in one reasonably fast instruction. */
1390 /* Define this if zero-extension is slow (more than one real instruction). */
1391 #define SLOW_ZERO_EXTEND
1393 /* Nonzero if access to memory by bytes is slow and undesirable. */
1394 #define SLOW_BYTE_ACCESS 0
1396 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1397 is done just by pretending it is already truncated. */
1398 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1400 /* We assume that the store-condition-codes instructions store 0 for false
1401 and some other value for true. This is the value stored for true. */
1403 #define STORE_FLAG_VALUE -1
1405 /* When a prototype says `char' or `short', really pass an `int'. */
1406 #define PROMOTE_PROTOTYPES
1408 /* Specify the machine mode that pointers have.
1409 After generation of rtl, the compiler makes no further distinction
1410 between pointers and any other objects of this machine mode. */
1411 #define Pmode SImode
1413 /* A function address in a call instruction
1414 is a byte address (for indexing purposes)
1415 so give the MEM rtx a byte's mode. */
1416 #define FUNCTION_MODE QImode
1418 /* Compute the cost of computing a constant rtl expression RTX
1419 whose rtx-code is CODE. The body of this macro is a portion
1420 of a switch statement. If the code is computed here,
1421 return it with a return statement. Otherwise, break from the switch. */
1423 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1425 /* Constant zero is super cheap due to clr instruction. */ \
1426 if (RTX == const0_rtx) return 0; \
1427 /* if ((OUTER_CODE) == SET) */ \
1428 return const_int_cost(RTX); \
1433 case CONST_DOUBLE: \
1436 /* Compute the cost of various arithmetic operations.
1437 These are vaguely right for a 68020. */
1438 /* The costs for long multiply have been adjusted to
1439 work properly in synth_mult on the 68020,
1440 relative to an average of the time for add and the time for shift,
1441 taking away a little more because sometimes move insns are needed. */
1442 /* div?.w is relatively cheaper on 68000 counted in COSTS_N_INSNS terms. */
1443 #define MULL_COST (TARGET_68060 ? 2 : TARGET_68040 ? 5 : 13)
1444 #define MULW_COST (TARGET_68060 ? 2 : TARGET_68040 ? 3 : TARGET_68020 ? 8 : 5)
1445 #define DIVW_COST (TARGET_68020 ? 27 : 12)
1447 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1449 /* An lea costs about three times as much as a simple add. */ \
1450 if (GET_MODE (X) == SImode \
1451 && GET_CODE (XEXP (X, 0)) == REG \
1452 && GET_CODE (XEXP (X, 1)) == MULT \
1453 && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1454 && GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT \
1455 && (INTVAL (XEXP (XEXP (X, 1), 1)) == 2 \
1456 || INTVAL (XEXP (XEXP (X, 1), 1)) == 4 \
1457 || INTVAL (XEXP (XEXP (X, 1), 1)) == 8)) \
1458 return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \
1464 return COSTS_N_INSNS(1); \
1465 if (! TARGET_68020) \
1467 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1469 if (INTVAL (XEXP (X, 1)) < 16) \
1470 return COSTS_N_INSNS (2) + INTVAL (XEXP (X, 1)) / 2; \
1472 /* We're using clrw + swap for these cases. */ \
1473 return COSTS_N_INSNS (4) + (INTVAL (XEXP (X, 1)) - 16) / 2; \
1475 return COSTS_N_INSNS (10); /* worst case */ \
1477 /* A shift by a big integer takes an extra instruction. */ \
1478 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1479 && (INTVAL (XEXP (X, 1)) == 16)) \
1480 return COSTS_N_INSNS (2); /* clrw;swap */ \
1481 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1482 && !(INTVAL (XEXP (X, 1)) > 0 \
1483 && INTVAL (XEXP (X, 1)) <= 8)) \
1484 return COSTS_N_INSNS (3); /* lsr #i,dn */ \
1487 if ((GET_CODE (XEXP (X, 0)) == ZERO_EXTEND \
1488 || GET_CODE (XEXP (X, 0)) == SIGN_EXTEND) \
1489 && GET_MODE (X) == SImode) \
1490 return COSTS_N_INSNS (MULW_COST); \
1491 if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1492 return COSTS_N_INSNS (MULW_COST); \
1494 return COSTS_N_INSNS (MULL_COST); \
1499 if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1500 return COSTS_N_INSNS (DIVW_COST); /* div.w */ \
1501 return COSTS_N_INSNS (43); /* div.l */
1503 /* Tell final.c how to eliminate redundant test instructions. */
1505 /* Here we define machine-dependent flags and fields in cc_status
1506 (see `conditions.h'). */
1508 /* Set if the cc value is actually in the 68881, so a floating point
1509 conditional branch must be output. */
1510 #define CC_IN_68881 04000
1512 /* Store in cc_status the expressions that the condition codes will
1513 describe after execution of an instruction whose pattern is EXP.
1514 Do not alter them if the instruction would not alter the cc's. */
1516 /* On the 68000, all the insns to store in an address register fail to
1517 set the cc's. However, in some cases these instructions can make it
1518 possibly invalid to use the saved cc's. In those cases we clear out
1519 some or all of the saved cc's so they won't be used. */
1521 #define NOTICE_UPDATE_CC(EXP,INSN) notice_update_cc (EXP, INSN)
1523 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1524 { if (cc_prev_status.flags & CC_IN_68881) \
1526 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1530 /* Control the assembler format that we output. */
1532 /* Output at beginning of assembler file. */
1534 #define ASM_FILE_START(FILE) \
1535 fprintf (FILE, "#NO_APP\n");
1537 /* Output to assembler file text saying following lines
1538 may contain character constants, extra white space, comments, etc. */
1540 #define ASM_APP_ON "#APP\n"
1542 /* Output to assembler file text saying following lines
1543 no longer contain unusual constructs. */
1545 #define ASM_APP_OFF "#NO_APP\n"
1547 /* Output before read-only data. */
1549 #define TEXT_SECTION_ASM_OP ".text"
1551 /* Output before writable data. */
1553 #define DATA_SECTION_ASM_OP ".data"
1555 /* Here are four prefixes that are used by asm_fprintf to
1556 facilitate customization for alternate assembler syntaxes.
1557 Machines with no likelihood of an alternate syntax need not
1558 define these and need not use asm_fprintf. */
1560 /* The prefix for register names. Note that REGISTER_NAMES
1561 is supposed to include this prefix. */
1563 #define REGISTER_PREFIX ""
1565 /* The prefix for local labels. You should be able to define this as
1566 an empty string, or any arbitrary string (such as ".", ".L%", etc)
1567 without having to make any other changes to account for the specific
1568 definition. Note it is a string literal, not interpreted by printf
1571 #define LOCAL_LABEL_PREFIX ""
1573 /* The prefix to add to user-visible assembler symbols. */
1575 #define USER_LABEL_PREFIX "_"
1577 /* The prefix for immediate operands. */
1579 #define IMMEDIATE_PREFIX "#"
1581 /* How to refer to registers in assembler output.
1582 This sequence is indexed by compiler's hard-register-number (see above). */
1584 #ifndef SUPPORT_SUN_FPA
1586 #define REGISTER_NAMES \
1587 {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1588 "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1589 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" }
1591 #else /* SUPPORTED_SUN_FPA */
1593 #define REGISTER_NAMES \
1594 {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1595 "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1596 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \
1597 "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \
1598 "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \
1599 "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \
1600 "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31" }
1602 #endif /* defined SUPPORT_SUN_FPA */
1604 /* How to renumber registers for dbx and gdb.
1605 On the Sun-3, the floating point registers have numbers
1606 18 to 25, not 16 to 23 as they do in the compiler. */
1608 #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
1610 /* This is how to output the definition of a user-level label named NAME,
1611 such as the label on a static function or variable NAME. */
1613 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1614 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1616 /* This is how to output a command to make the user-level label named NAME
1617 defined for reference from other files. */
1619 #define GLOBAL_ASM_OP ".globl"
1620 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1621 do { fprintf (FILE, "%s ", GLOBAL_ASM_OP); \
1622 assemble_name (FILE, NAME); \
1623 fputs ("\n", FILE);} while (0)
1625 /* This is how to output a reference to a user-level label named NAME.
1626 `assemble_name' uses this. */
1628 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1629 asm_fprintf (FILE, "%0U%s", NAME)
1631 /* This is how to output an internal numbered label where
1632 PREFIX is the class of label and NUM is the number within the class. */
1634 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1635 asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM)
1637 /* This is how to store into the string LABEL
1638 the symbol_ref name of an internal numbered label where
1639 PREFIX is the class of label and NUM is the number within the class.
1640 This is suitable for output with `assemble_name'. */
1642 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1643 sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
1645 /* This is how to output a `long double' extended real constant. */
1647 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1649 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1650 if (sizeof (int) == sizeof (long)) \
1651 fprintf (FILE, "\t.long 0x%x,0x%x,0x%x\n", l[0], l[1], l[2]); \
1653 fprintf (FILE, "\t.long 0x%lx,0x%lx,0x%lx\n", l[0], l[1], l[2]); \
1656 /* This is how to output an assembler line defining a `double' constant. */
1658 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1659 do { char dstr[30]; \
1660 REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1661 fprintf (FILE, "\t.double 0r%s\n", dstr); \
1664 /* This is how to output an assembler line defining a `float' constant. */
1666 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1668 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1669 if (sizeof (int) == sizeof (long)) \
1670 fprintf (FILE, "\t.long 0x%x\n", l); \
1672 fprintf (FILE, "\t.long 0x%lx\n", l); \
1675 /* This is how to output an assembler line defining an `int' constant. */
1677 #define ASM_OUTPUT_INT(FILE,VALUE) \
1678 ( fprintf (FILE, "\t.long "), \
1679 output_addr_const (FILE, (VALUE)), \
1680 fprintf (FILE, "\n"))
1682 /* Likewise for `char' and `short' constants. */
1684 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1685 ( fprintf (FILE, "\t.word "), \
1686 output_addr_const (FILE, (VALUE)), \
1687 fprintf (FILE, "\n"))
1689 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1690 ( fprintf (FILE, "\t.byte "), \
1691 output_addr_const (FILE, (VALUE)), \
1692 fprintf (FILE, "\n"))
1694 /* This is how to output an assembler line for a numeric constant byte. */
1696 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1697 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1699 /* This is how to output an insn to push a register on the stack.
1700 It need not be very fast code. */
1702 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1703 asm_fprintf (FILE, "\tmovel %s,%Rsp@-\n", reg_names[REGNO])
1705 /* This is how to output an insn to pop a register from the stack.
1706 It need not be very fast code. */
1708 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1709 asm_fprintf (FILE, "\tmovel %Rsp@+,%s\n", reg_names[REGNO])
1711 /* This is how to output an element of a case-vector that is absolute.
1712 (The 68000 does not use such vectors,
1713 but we must define this macro anyway.) */
1715 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1716 asm_fprintf (FILE, "\t.long %LL%d\n", VALUE)
1718 /* This is how to output an element of a case-vector that is relative. */
1720 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1721 asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL)
1723 /* This is how to output an assembler line
1724 that says to advance the location counter
1725 to a multiple of 2**LOG bytes. */
1727 /* We don't have a way to align to more than a two-byte boundary, so do the
1728 best we can and don't complain. */
1729 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1731 fprintf (FILE, "\t.even\n");
1733 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1734 fprintf (FILE, "\t.skip %u\n", (SIZE))
1736 /* This says how to output an assembler line
1737 to define a global common symbol. */
1739 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1740 ( fputs (".comm ", (FILE)), \
1741 assemble_name ((FILE), (NAME)), \
1742 fprintf ((FILE), ",%u\n", (ROUNDED)))
1744 /* This says how to output an assembler line
1745 to define a local common symbol. */
1747 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1748 ( fputs (".lcomm ", (FILE)), \
1749 assemble_name ((FILE), (NAME)), \
1750 fprintf ((FILE), ",%u\n", (ROUNDED)))
1752 /* Store in OUTPUT a string (made with alloca) containing
1753 an assembler-name for a local static variable named NAME.
1754 LABELNO is an integer which is different for each call. */
1756 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1757 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1758 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1760 /* Define the parentheses used to group arithmetic operations
1761 in assembler code. */
1763 #define ASM_OPEN_PAREN "("
1764 #define ASM_CLOSE_PAREN ")"
1766 /* Define results of standard character escape sequences. */
1767 #define TARGET_BELL 007
1768 #define TARGET_BS 010
1769 #define TARGET_TAB 011
1770 #define TARGET_NEWLINE 012
1771 #define TARGET_VT 013
1772 #define TARGET_FF 014
1773 #define TARGET_CR 015
1775 /* Output a float value (represented as a C double) as an immediate operand.
1776 This macro is a 68k-specific macro. */
1778 #define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \
1783 REAL_VALUE_TO_DECIMAL (VALUE, "%.9g", dstr); \
1784 asm_fprintf ((FILE), "%I0r%s", dstr); \
1789 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1790 if (sizeof (int) == sizeof (long)) \
1791 asm_fprintf ((FILE), "%I0x%x", l); \
1793 asm_fprintf ((FILE), "%I0x%lx", l); \
1797 /* Output a double value (represented as a C double) as an immediate operand.
1798 This macro is a 68k-specific macro. */
1799 #define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
1800 do { char dstr[30]; \
1801 REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1802 asm_fprintf (FILE, "%I0r%s", dstr); \
1805 /* Note, long double immediate operands are not actually
1806 generated by m68k.md. */
1807 #define ASM_OUTPUT_LONG_DOUBLE_OPERAND(FILE,VALUE) \
1808 do { char dstr[30]; \
1809 REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1810 asm_fprintf (FILE, "%I0r%s", dstr); \
1813 /* Print operand X (an rtx) in assembler syntax to file FILE.
1814 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1815 For `%' followed by punctuation, CODE is the punctuation and X is null.
1817 On the 68000, we use several CODE characters:
1818 '.' for dot needed in Motorola-style opcode names.
1819 '-' for an operand pushing on the stack:
1820 sp@-, -(sp) or -(%sp) depending on the style of syntax.
1821 '+' for an operand pushing on the stack:
1822 sp@+, (sp)+ or (%sp)+ depending on the style of syntax.
1823 '@' for a reference to the top word on the stack:
1824 sp@, (sp) or (%sp) depending on the style of syntax.
1825 '#' for an immediate operand prefix (# in MIT and Motorola syntax
1826 but & in SGS syntax).
1827 '!' for the fpcr register (used in some float-to-fixed conversions).
1828 '$' for the letter `s' in an op code, but only on the 68040.
1829 '&' for the letter `d' in an op code, but only on the 68040.
1830 '/' for register prefix needed by longlong.h.
1832 'b' for byte insn (no effect, on the Sun; this is for the ISI).
1833 'd' to force memory addressing to be absolute, not relative.
1834 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex)
1835 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather
1836 than directly). Second part of 'y' below.
1837 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex),
1838 or print pair of registers as rx:ry.
1839 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs
1840 CONST_DOUBLE's as SunFPA constant RAM registers if
1841 possible, so it should not be used except for the SunFPA. */
1843 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1844 ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \
1845 || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \
1846 || (CODE) == '$' || (CODE) == '&' || (CODE) == '/')
1848 /* A C compound statement to output to stdio stream STREAM the
1849 assembler syntax for an instruction operand X. X is an RTL
1852 CODE is a value that can be used to specify one of several ways
1853 of printing the operand. It is used when identical operands
1854 must be printed differently depending on the context. CODE
1855 comes from the `%' specification that was used to request
1856 printing of the operand. If the specification was just `%DIGIT'
1857 then CODE is 0; if the specification was `%LTR DIGIT' then CODE
1858 is the ASCII code for LTR.
1860 If X is a register, this macro should print the register's name.
1861 The names can be found in an array `reg_names' whose type is
1862 `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
1864 When the machine description has a specification `%PUNCT' (a `%'
1865 followed by a punctuation character), this macro is called with
1866 a null pointer for X and the punctuation character for CODE.
1868 See m68k.c for the m68k specific codes. */
1870 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1872 /* A C compound statement to output to stdio stream STREAM the
1873 assembler syntax for an instruction operand that is a memory
1874 reference whose address is ADDR. ADDR is an RTL expression.
1876 On some machines, the syntax for a symbolic address depends on
1877 the section that the address refers to. On these machines,
1878 define the macro `ENCODE_SECTION_INFO' to store the information
1879 into the `symbol_ref', and then check for it here. */
1881 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1884 /* Definitions for generating bytecode */
1886 /* Just so it's known this target is supported by the bytecode generator.
1887 If this define isn't found anywhere in the target config files, then
1888 dummy stubs are supplied by bytecode.h, and any attempt to use
1889 -fbytecode will result in an error message. */
1891 #define TARGET_SUPPORTS_BYTECODE
1893 /* Minimal segment alignment within sections is 8 units. */
1894 #define MACHINE_SEG_ALIGN 3
1896 /* Integer alignment is two units. */
1899 /* Pointer alignment is eight units. */
1902 /* Global symbols begin with `_' */
1903 #define NAMES_HAVE_UNDERSCORES
1905 /* BC_xxx below are similar to their ASM_xxx counterparts above. */
1906 #define BC_GLOBALIZE_LABEL(FP, NAME) bc_globalize_label(NAME)
1908 #define BC_OUTPUT_COMMON(FP, NAME, SIZE, ROUNDED) \
1909 do { bc_emit_common(NAME, ROUNDED); bc_globalize_label(NAME); } while (0)
1911 #define BC_OUTPUT_BSS(FP, NAME, SIZE, ROUNDED) \
1912 do { bc_data (); bc_emit_labeldef(NAME); bc_emit_skip (SIZE); } while (0)
1914 #define BC_OUTPUT_LOCAL(FP, NAME, SIZE, ROUNDED) \
1915 bc_emit_common(NAME, ROUNDED)
1917 #define BC_OUTPUT_ALIGN(FP, ALIGN) bc_align(ALIGN)
1919 #define BC_OUTPUT_LABEL(FP, NAME) bc_emit_labeldef(NAME)
1921 #define BC_OUTPUT_SKIP(FP, SIZE) bc_emit_skip(SIZE)
1923 #define BC_OUTPUT_LABELREF(FP, NAME) \
1925 char *foo = (char *) xmalloc(strlen(NAME) + 2); \
1927 strcat(foo, NAME); \
1928 bc_emit_labelref (foo); \
1932 #define BC_OUTPUT_FLOAT(FP, VAL) \
1935 bc_emit ((char *) &F, sizeof F); \
1938 #define BC_OUTPUT_DOUBLE(FP, VAL) \
1941 bc_emit ((char *) &D, sizeof D); \
1944 #define BC_OUTPUT_BYTE(FP, VAL) \
1951 #define BC_OUTPUT_FILE ASM_OUTPUT_FILE
1952 #define BC_OUTPUT_ASCII ASM_OUTPUT_ASCII
1953 #define BC_OUTPUT_IDENT ASM_OUTPUT_IDENT
1955 /* Same as XSTR, but for bytecode */
1956 #define BCXSTR(RTX) ((RTX)->bc_label)
1959 /* Flush bytecode buffer onto file */
1960 #define BC_WRITE_FILE(FP) \
1962 fprintf (FP, ".text\n"); \
1963 bc_seg_write (bc_text_seg, FP); \
1964 fprintf(FP, "\n.data\n"); \
1965 bc_seg_write (bc_data_seg, FP); \
1966 bc_sym_write (FP); /* do .globl, .bss, etc. */ \
1969 /* Write one symbol */
1970 #define BC_WRITE_SEGSYM(SEGSYM, FP) \
1972 prsym (FP, (SEGSYM)->sym->name); \
1973 fprintf (FP, ":\n"); \
1977 /* Write one reloc entry */
1978 #define BC_WRITE_RELOC_ENTRY(SEGRELOC, FP, OFFSET) \
1980 fprintf (FP, "\t.long "); \
1981 prsym (FP, (SEGRELOC)->sym->name); \
1982 fprintf (FP, " + %d\n", OFFSET); \
1985 /* Start new line of bytecodes */
1986 #define BC_START_BYTECODE_LINE(FP) \
1988 fprintf (FP, "\t.byte"); \
1991 /* Write one bytecode */
1992 #define BC_WRITE_BYTECODE(SEP, VAL, FP) \
1994 fprintf (FP, "%c0x%02X", (SEP), (VAL) & 0xff); \
1997 /* Write one bytecode RTL entry */
1998 #define BC_WRITE_RTL(R, FP) \
2000 fprintf (FP, "%s+%d/0x%08X\n", (R)->label, (R)->offset, (R)->bc_label); \
2004 /* Emit function entry trampoline */
2005 #define BC_EMIT_TRAMPOLINE(TRAMPSEG, CALLINFO) \
2009 /* Push a reference to the callinfo structure. */ \
2010 insn = 0x4879; /* pea xxx.L */ \
2011 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
2012 seg_refsym (TRAMPSEG, CALLINFO, 0); \
2014 /* Call __interp, pop arguments, and return. */ \
2015 insn = 0x4eb9; /* jsr xxx.L */ \
2016 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
2017 seg_refsym (TRAMPSEG, "__callint", 0); \
2018 insn = 0x588f; /* addql #4, sp */ \
2019 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
2020 insn = 0x4e75; /* rts */ \
2021 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
2027 #define VALIDATE_STACK() if (stack_depth < 0) abort ();
2030 #define VALIDATE_STACK() \
2031 fprintf (stderr, " %%%d%%", stack_depth);
2035 /* Define functions defined in aux-output.c and used in templates. */
2037 extern char *output_move_const_into_data_reg ();
2038 extern char *output_move_simode_const ();
2039 extern char *output_move_double ();
2040 extern char *output_move_const_single ();
2041 extern char *output_move_const_double ();
2042 extern char *output_btst ();
2043 extern char *output_scc_di ();
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