1 /* Definitions of target machine for GNU compiler. Sun 68000/68020 version.
2 Copyright (C) 1987, 88, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Note that some other tm.h files include this one and then override
23 many of the definitions that relate to assembler syntax. */
26 /* Names to predefine in the preprocessor for this target machine. */
28 /* See sun3.h, sun2.h, isi.h for different CPP_PREDEFINES. */
30 /* Print subsidiary information on the compiler version in use. */
32 #define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)");
34 #define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)");
37 /* Define SUPPORT_SUN_FPA to include support for generating code for
38 the Sun Floating Point Accelerator, an optional product for Sun 3
39 machines. By default, it is not defined. Avoid defining it unless
40 you need to output code for the Sun3+FPA architecture, as it has the
41 effect of slowing down the register set operations in hard-reg-set.h
42 (total number of registers will exceed number of bits in a long,
43 if defined, causing the set operations to expand to loops).
44 SUPPORT_SUN_FPA is typically defined in sun3.h. */
46 /* Run-time compilation parameters selecting different hardware subsets. */
48 extern int target_flags;
50 /* Macros used in the machine description to test the flags. */
52 /* Compile for a 68020 (not a 68000 or 68010). */
54 #define TARGET_68020 (target_flags & MASK_68020)
56 /* Compile 68881 insns for floating point (not library calls). */
58 #define TARGET_68881 (target_flags & MASK_68881)
60 /* Compile using 68020 bitfield insns. */
61 #define MASK_BITFIELD 4
62 #define TARGET_BITFIELD (target_flags & MASK_BITFIELD)
64 /* Compile using rtd insn calling sequence.
65 This will not work unless you use prototypes at least
66 for all functions that can take varying numbers of args. */
68 #define TARGET_RTD (target_flags & MASK_RTD)
70 /* Compile passing first two args in regs 0 and 1.
71 This exists only to test compiler features that will
72 be needed for RISC chips. It is not usable
73 and is not intended to be usable on this cpu. */
74 #define MASK_REGPARM 16
75 #define TARGET_REGPARM (target_flags & MASK_REGPARM)
77 /* Compile with 16-bit `int'. */
79 #define TARGET_SHORT (target_flags & MASK_SHORT)
81 /* Compile with special insns for Sun FPA. */
83 #define TARGET_FPA (target_flags & MASK_FPA)
85 /* Compile (actually, link) for Sun SKY board. */
87 #define TARGET_SKY (target_flags & MASK_SKY)
89 /* Optimize for 68040, but still allow execution on 68020
90 (-m68020-40 or -m68040).
91 The 68040 will execute all 68030 and 68881/2 instructions, but some
92 of them must be emulated in software by the OS. When TARGET_68040 is
93 turned on, these instructions won't be used. This code will still
94 run on a 68030 and 68881/2. */
95 #define MASK_68040_ALSO (256)
96 #define MASK_68040 (256|512)
97 #define TARGET_68040 (target_flags & MASK_68040)
99 /* Use the 68040-only fp instructions (-m68040 or -m68060). */
100 #define MASK_68040_ONLY 512
101 #define TARGET_68040_ONLY (target_flags & MASK_68040_ONLY)
103 /* Optimize for 68060, but still allow execution on 68020
105 The 68060 will execute all 68030 and 68881/2 instructions, but some
106 of them must be emulated in software by the OS. When TARGET_68060 is
107 turned on, these instructions won't be used. This code will still
108 run on a 68030 and 68881/2. */
109 #define MASK_68060 1024
110 #define TARGET_68060 (target_flags & MASK_68060)
112 /* Compile for mcf5200 */
113 #define MASK_5200 2048
114 #define TARGET_5200 (target_flags & MASK_5200)
116 /* Compile for a CPU32 */
117 /* A 68020 without bitfields is a good heuristic for a CPU32 */
118 #define TARGET_CPU32 (TARGET_68020 && !TARGET_BITFIELD)
120 /* Macro to define tables used to set the flags.
121 This is a list in braces of pairs in braces,
122 each pair being { "NAME", VALUE }
123 where VALUE is the bits to set or minus the bits to clear.
124 An empty string NAME is used to identify the default VALUE. */
126 #define TARGET_SWITCHES \
127 { { "68020", - (MASK_68060|MASK_68040)}, \
128 { "c68020", - (MASK_68060|MASK_68040)}, \
129 { "68020", (MASK_68020|MASK_BITFIELD)}, \
130 { "c68020", (MASK_68020|MASK_BITFIELD)}, \
131 { "68000", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD)}, \
132 { "c68000", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD)}, \
133 { "bitfield", MASK_BITFIELD}, \
134 { "nobitfield", - MASK_BITFIELD}, \
135 { "rtd", MASK_RTD}, \
136 { "nortd", - MASK_RTD}, \
137 { "short", MASK_SHORT}, \
138 { "noshort", - MASK_SHORT}, \
139 { "fpa", -(MASK_SKY|MASK_68040_ONLY|MASK_68881)}, \
140 { "fpa", MASK_FPA}, \
141 { "nofpa", - MASK_FPA}, \
142 { "sky", -(MASK_FPA|MASK_68040_ONLY|MASK_68881)}, \
143 { "sky", MASK_SKY}, \
144 { "nosky", - MASK_SKY}, \
145 { "68881" - (MASK_FPA|MASK_SKY)}, \
146 { "68881", MASK_68881}, \
147 { "soft-float", - (MASK_FPA|MASK_SKY|MASK_68040_ONLY|MASK_68881)}, \
148 { "68020-40", (MASK_BITFIELD|MASK_68881|MASK_68020|MASK_68040_ALSO)}, \
149 { "68030", - (MASK_68040|MASK_68060)}, \
150 { "68030", (MASK_68020|MASK_BITFIELD)}, \
151 { "68040", (MASK_68020|MASK_68881|MASK_BITFIELD|MASK_68040_ONLY)}, \
152 { "68060", (MASK_68020|MASK_68881|MASK_BITFIELD \
153 |MASK_68040_ONLY|MASK_68060)}, \
154 { "5200", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD|MASK_68881)}, \
155 { "5200", (MASK_5200)}, \
158 { "68302", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD)}, \
159 { "68332", - (MASK_68060|MASK_68040|MASK_BITFIELD)}, \
160 { "68332", MASK_68020}, \
162 { "", TARGET_DEFAULT}}
163 /* TARGET_DEFAULT is defined in sun*.h and isi.h, etc. */
165 /* This macro is similar to `TARGET_SWITCHES' but defines names of
166 command options that have values. Its definition is an
167 initializer with a subgrouping for each command option.
169 Each subgrouping contains a string constant, that defines the
170 fixed part of the option name, and the address of a variable. The
171 variable, type `char *', is set to the variable part of the given
172 option if the fixed part matches. The actual option name is made
173 by appending `-m' to the specified name. */
174 #define TARGET_OPTIONS \
175 { { "align-loops=", &m68k_align_loops_string }, \
176 { "align-jumps=", &m68k_align_jumps_string }, \
177 { "align-functions=", &m68k_align_funcs_string }, \
181 /* Sometimes certain combinations of command options do not make
182 sense on a particular target machine. You can define a macro
183 `OVERRIDE_OPTIONS' to take account of this. This macro, if
184 defined, is executed once just after all the command options have
187 Don't use this macro to turn on various extra optimizations for
188 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
190 #define OVERRIDE_OPTIONS \
192 override_options(); \
193 if (! TARGET_68020 && flag_pic == 2) \
194 error("-fPIC is not currently supported on the 68000 or 68010\n"); \
195 SUBTARGET_OVERRIDE_OPTIONS; \
198 /* These are meant to be redefined in the host dependent files */
199 #define SUBTARGET_SWITCHES
200 #define SUBTARGET_OPTIONS
201 #define SUBTARGET_OVERRIDE_OPTIONS
203 /* target machine storage layout */
205 /* Define for XFmode extended real floating point support.
206 This will automatically cause REAL_ARITHMETIC to be defined. */
207 #define LONG_DOUBLE_TYPE_SIZE 96
209 /* Define if you don't want extended real, but do want to use the
210 software floating point emulator for REAL_ARITHMETIC and
211 decimal <-> binary conversion. */
212 /* #define REAL_ARITHMETIC */
214 /* Define this if most significant bit is lowest numbered
215 in instructions that operate on numbered bit-fields.
216 This is true for 68020 insns such as bfins and bfexts.
217 We make it true always by avoiding using the single-bit insns
218 except in special cases with constant bit numbers. */
219 #define BITS_BIG_ENDIAN 1
221 /* Define this if most significant byte of a word is the lowest numbered. */
222 /* That is true on the 68000. */
223 #define BYTES_BIG_ENDIAN 1
225 /* Define this if most significant word of a multiword number is the lowest
227 /* For 68000 we can decide arbitrarily
228 since there are no machine instructions for them.
229 So let's be consistent. */
230 #define WORDS_BIG_ENDIAN 1
232 /* number of bits in an addressable storage unit */
233 #define BITS_PER_UNIT 8
235 /* Width in bits of a "word", which is the contents of a machine register.
236 Note that this is not necessarily the width of data type `int';
237 if using 16-bit ints on a 68000, this would still be 32.
238 But on a machine with 16-bit registers, this would be 16. */
239 #define BITS_PER_WORD 32
241 /* Width of a word, in units (bytes). */
242 #define UNITS_PER_WORD 4
244 /* Width in bits of a pointer.
245 See also the macro `Pmode' defined below. */
246 #define POINTER_SIZE 32
248 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
249 #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)
251 /* Boundary (in *bits*) on which stack pointer should be aligned. */
252 #define STACK_BOUNDARY 16
254 /* Allocation boundary (in *bits*) for the code of a function. */
255 #define FUNCTION_BOUNDARY (1 << (m68k_align_funcs + 3))
257 /* Alignment of field after `int : 0' in a structure. */
258 #define EMPTY_FIELD_BOUNDARY 16
260 /* No data type wants to be aligned rounder than this. */
261 #define BIGGEST_ALIGNMENT 16
263 /* Set this nonzero if move instructions will actually fail to work
264 when given unaligned data. */
265 #define STRICT_ALIGNMENT 1
267 /* Maximum power of 2 that code can be aligned to. */
268 #define MAX_CODE_ALIGN 2 /* 4 byte alignment */
270 /* Align loop starts for optimal branching. */
271 #define ASM_OUTPUT_LOOP_ALIGN(FILE) ASM_OUTPUT_ALIGN ((FILE), m68k_align_loops)
273 /* This is how to align an instruction for optimal branching. */
274 #define ASM_OUTPUT_ALIGN_CODE(FILE) ASM_OUTPUT_ALIGN ((FILE), m68k_align_jumps)
276 #define SELECT_RTX_SECTION(MODE, X) \
279 readonly_data_section(); \
280 else if (LEGITIMATE_PIC_OPERAND_P (X)) \
281 readonly_data_section(); \
286 /* Define number of bits in most basic integer type.
287 (If undefined, default is BITS_PER_WORD). */
289 #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32)
291 /* Define these to avoid dependence on meaning of `int'.
292 Note that WCHAR_TYPE_SIZE is used in cexp.y,
293 where TARGET_SHORT is not available. */
295 #define WCHAR_TYPE "long int"
296 #define WCHAR_TYPE_SIZE 32
298 /* Standard register usage. */
300 /* Number of actual hardware registers.
301 The hardware registers are assigned numbers for the compiler
302 from 0 to just below FIRST_PSEUDO_REGISTER.
303 All registers that the compiler knows about must be given numbers,
304 even those that are not normally considered general registers.
305 For the 68000, we give the data registers numbers 0-7,
306 the address registers numbers 010-017,
307 and the 68881 floating point registers numbers 020-027. */
308 #ifndef SUPPORT_SUN_FPA
309 #define FIRST_PSEUDO_REGISTER 24
311 #define FIRST_PSEUDO_REGISTER 56
314 /* This defines the register which is used to hold the offset table for PIC. */
315 #define PIC_OFFSET_TABLE_REGNUM 13
317 /* Used to output a (use pic_offset_table_rtx) so that we
318 always save/restore a5 in functions that use PIC relocation
319 at *any* time during the compilation process. */
320 #define FINALIZE_PIC finalize_pic()
322 #ifndef SUPPORT_SUN_FPA
324 /* 1 for registers that have pervasive standard uses
325 and are not available for the register allocator.
326 On the 68000, only the stack pointer is such. */
328 #define FIXED_REGISTERS \
329 {/* Data registers. */ \
330 0, 0, 0, 0, 0, 0, 0, 0, \
332 /* Address registers. */ \
333 0, 0, 0, 0, 0, 0, 0, 1, \
335 /* Floating point registers \
337 0, 0, 0, 0, 0, 0, 0, 0 }
339 /* 1 for registers not available across function calls.
340 These must include the FIXED_REGISTERS and also any
341 registers that can be used without being saved.
342 The latter must include the registers where values are returned
343 and the register where structure-value addresses are passed.
344 Aside from that, you can include as many other registers as you like. */
345 #define CALL_USED_REGISTERS \
346 {1, 1, 0, 0, 0, 0, 0, 0, \
347 1, 1, 0, 0, 0, 0, 0, 1, \
348 1, 1, 0, 0, 0, 0, 0, 0 }
350 #else /* SUPPORT_SUN_FPA */
352 /* 1 for registers that have pervasive standard uses
353 and are not available for the register allocator.
354 On the 68000, only the stack pointer is such. */
356 /* fpa0 is also reserved so that it can be used to move shit back and
357 forth between high fpa regs and everything else. */
359 #define FIXED_REGISTERS \
360 {/* Data registers. */ \
361 0, 0, 0, 0, 0, 0, 0, 0, \
363 /* Address registers. */ \
364 0, 0, 0, 0, 0, 0, 0, 1, \
366 /* Floating point registers \
368 0, 0, 0, 0, 0, 0, 0, 0, \
370 /* Sun3 FPA registers. */ \
371 1, 0, 0, 0, 0, 0, 0, 0, \
372 0, 0, 0, 0, 0, 0, 0, 0, \
373 0, 0, 0, 0, 0, 0, 0, 0, \
374 0, 0, 0, 0, 0, 0, 0, 0 }
376 /* 1 for registers not available across function calls.
377 These must include the FIXED_REGISTERS and also any
378 registers that can be used without being saved.
379 The latter must include the registers where values are returned
380 and the register where structure-value addresses are passed.
381 Aside from that, you can include as many other registers as you like. */
382 #define CALL_USED_REGISTERS \
383 {1, 1, 0, 0, 0, 0, 0, 0, \
384 1, 1, 0, 0, 0, 0, 0, 1, \
385 1, 1, 0, 0, 0, 0, 0, 0, \
386 /* FPA registers. */ \
387 1, 1, 1, 1, 0, 0, 0, 0, \
388 0, 0, 0, 0, 0, 0, 0, 0, \
389 0, 0, 0, 0, 0, 0, 0, 0, \
390 0, 0, 0, 0, 0, 0, 0, 0 }
392 #endif /* defined SUPPORT_SUN_FPA */
395 /* Make sure everything's fine if we *don't* have a given processor.
396 This assumes that putting a register in fixed_regs will keep the
397 compiler's mitts completely off it. We don't bother to zero it out
398 of register classes. If neither TARGET_FPA or TARGET_68881 is set,
399 the compiler won't touch since no instructions that use these
400 registers will be valid. */
402 #ifdef SUPPORT_SUN_FPA
404 #define CONDITIONAL_REGISTER_USAGE \
410 COPY_HARD_REG_SET (x, reg_class_contents[(int)FPA_REGS]); \
411 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
412 if (TEST_HARD_REG_BIT (x, i)) \
413 fixed_regs[i] = call_used_regs[i] = 1; \
417 COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
418 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
419 if (TEST_HARD_REG_BIT (x, i)) \
420 fixed_regs[i] = call_used_regs[i] = 1; \
424 #endif /* defined SUPPORT_SUN_FPA */
426 /* Return number of consecutive hard regs needed starting at reg REGNO
427 to hold something of mode MODE.
428 This is ordinarily the length in words of a value of mode MODE
429 but can be less for certain modes in special long registers.
431 On the 68000, ordinary registers hold 32 bits worth;
432 for the 68881 registers, a single register is always enough for
433 anything that can be stored in them at all. */
434 #define HARD_REGNO_NREGS(REGNO, MODE) \
435 ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \
436 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
438 #ifndef SUPPORT_SUN_FPA
440 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
441 On the 68000, the cpu registers can hold any mode but the 68881 registers
442 can hold only SFmode or DFmode. The 68881 registers can't hold anything
443 if 68881 use is disabled. */
445 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
447 && !((REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8)) \
450 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
451 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)))
453 #else /* defined SUPPORT_SUN_FPA */
455 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
456 On the 68000, the cpu registers can hold any mode but the 68881 registers
457 can hold only SFmode or DFmode. And the 68881 registers can't hold anything
458 if 68881 use is disabled. However, the Sun FPA register can
459 (apparently) hold whatever you feel like putting in them.
460 If using the fpa, don't put a double in d7/a0. */
462 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
465 && GET_MODE_CLASS ((MODE)) != MODE_INT \
466 && GET_MODE_UNIT_SIZE ((MODE)) > 4 \
467 && (REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8 \
468 && (REGNO) % (GET_MODE_UNIT_SIZE ((MODE)) / 4) != 0)) \
470 ? TARGET_68881 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
471 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
472 : ((REGNO) < 56 ? TARGET_FPA : 0)))
474 #endif /* defined SUPPORT_SUN_FPA */
476 /* Value is 1 if it is a good idea to tie two pseudo registers
477 when one has mode MODE1 and one has mode MODE2.
478 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
479 for any hard reg, then this must be 0 for correct output. */
480 #define MODES_TIEABLE_P(MODE1, MODE2) \
482 || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
483 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
484 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
485 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)))
487 /* Specify the registers used for certain standard purposes.
488 The values of these macros are register numbers. */
490 /* m68000 pc isn't overloaded on a register. */
491 /* #define PC_REGNUM */
493 /* Register to use for pushing function arguments. */
494 #define STACK_POINTER_REGNUM 15
496 /* Base register for access to local variables of the function. */
497 #define FRAME_POINTER_REGNUM 14
499 /* Value should be nonzero if functions must have frame pointers.
500 Zero means the frame pointer need not be set up (and parms
501 may be accessed via the stack pointer) in functions that seem suitable.
502 This is computed in `reload', in reload1.c. */
503 #define FRAME_POINTER_REQUIRED 0
505 /* Base register for access to arguments of the function. */
506 #define ARG_POINTER_REGNUM 14
508 /* Register in which static-chain is passed to a function. */
509 #define STATIC_CHAIN_REGNUM 8
511 /* Register in which address to store a structure value
512 is passed to a function. */
513 #define STRUCT_VALUE_REGNUM 9
515 /* Define the classes of registers for register constraints in the
516 machine description. Also define ranges of constants.
518 One of the classes must always be named ALL_REGS and include all hard regs.
519 If there is more than one class, another class must be named NO_REGS
520 and contain no registers.
522 The name GENERAL_REGS must be the name of a class (or an alias for
523 another name such as ALL_REGS). This is the class of registers
524 that is allowed by "g" or "r" in a register constraint.
525 Also, registers outside this class are allocated only when
526 instructions express preferences for them.
528 The classes must be numbered in nondecreasing order; that is,
529 a larger-numbered class must never be contained completely
530 in a smaller-numbered class.
532 For any two classes, it is very desirable that there be another
533 class that represents their union. */
535 /* The 68000 has three kinds of registers, so eight classes would be
536 a complete set. One of them is not needed. */
538 #ifndef SUPPORT_SUN_FPA
543 GENERAL_REGS, DATA_OR_FP_REGS,
544 ADDR_OR_FP_REGS, ALL_REGS,
547 #define N_REG_CLASSES (int) LIM_REG_CLASSES
549 /* Give names of register classes as strings for dump file. */
551 #define REG_CLASS_NAMES \
552 { "NO_REGS", "DATA_REGS", \
553 "ADDR_REGS", "FP_REGS", \
554 "GENERAL_REGS", "DATA_OR_FP_REGS", \
555 "ADDR_OR_FP_REGS", "ALL_REGS" }
557 /* Define which registers fit in which classes.
558 This is an initializer for a vector of HARD_REG_SET
559 of length N_REG_CLASSES. */
561 #define REG_CLASS_CONTENTS \
563 0x00000000, /* NO_REGS */ \
564 0x000000ff, /* DATA_REGS */ \
565 0x0000ff00, /* ADDR_REGS */ \
566 0x00ff0000, /* FP_REGS */ \
567 0x0000ffff, /* GENERAL_REGS */ \
568 0x00ff00ff, /* DATA_OR_FP_REGS */ \
569 0x00ffff00, /* ADDR_OR_FP_REGS */ \
570 0x00ffffff, /* ALL_REGS */ \
573 /* The same information, inverted:
574 Return the class number of the smallest class containing
575 reg number REGNO. This could be a conditional expression
576 or could index an array. */
578 #define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1)
580 #else /* defined SUPPORT_SUN_FPA */
583 * Notes on final choices:
585 * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything
587 * 2) Removed all unions that involve address registers with
588 * floating point registers (left in unions of address and data with
590 * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS.
591 * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS.
592 * 4) Left in everything else.
594 enum reg_class { NO_REGS, LO_FPA_REGS, FPA_REGS, FP_REGS,
595 FP_OR_FPA_REGS, DATA_REGS, DATA_OR_FPA_REGS, DATA_OR_FP_REGS,
596 DATA_OR_FP_OR_FPA_REGS, ADDR_REGS, GENERAL_REGS,
597 GENERAL_OR_FPA_REGS, GENERAL_OR_FP_REGS, ALL_REGS,
600 #define N_REG_CLASSES (int) LIM_REG_CLASSES
602 /* Give names of register classes as strings for dump file. */
604 #define REG_CLASS_NAMES \
605 { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \
606 "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \
607 "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \
608 "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" }
610 /* Define which registers fit in which classes.
611 This is an initializer for a vector of HARD_REG_SET
612 of length N_REG_CLASSES. */
614 #define REG_CLASS_CONTENTS \
616 {0, 0}, /* NO_REGS */ \
617 {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \
618 {0xff000000, 0x00ffffff}, /* FPA_REGS */ \
619 {0x00ff0000, 0x00000000}, /* FP_REGS */ \
620 {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \
621 {0x000000ff, 0x00000000}, /* DATA_REGS */ \
622 {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \
623 {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \
624 {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\
625 {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \
626 {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \
627 {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\
628 {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\
629 {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \
632 /* The same information, inverted:
633 Return the class number of the smallest class containing
634 reg number REGNO. This could be a conditional expression
635 or could index an array. */
637 extern enum reg_class regno_reg_class[];
638 #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3])
640 #endif /* SUPPORT_SUN_FPA */
642 /* The class value for index registers, and the one for base regs. */
644 #define INDEX_REG_CLASS GENERAL_REGS
645 #define BASE_REG_CLASS ADDR_REGS
647 /* Get reg_class from a letter such as appears in the machine description.
648 We do a trick here to modify the effective constraints on the
649 machine description; we zorch the constraint letters that aren't
650 appropriate for a specific target. This allows us to guarantee
651 that a specific kind of register will not be used for a given target
652 without fiddling with the register classes above. */
654 #ifndef SUPPORT_SUN_FPA
656 #define REG_CLASS_FROM_LETTER(C) \
657 ((C) == 'a' ? ADDR_REGS : \
658 ((C) == 'd' ? DATA_REGS : \
659 ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
663 #else /* defined SUPPORT_SUN_FPA */
665 #define REG_CLASS_FROM_LETTER(C) \
666 ((C) == 'a' ? ADDR_REGS : \
667 ((C) == 'd' ? DATA_REGS : \
668 ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
670 ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \
672 ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \
676 #endif /* defined SUPPORT_SUN_FPA */
678 /* The letters I, J, K, L and M in a register constraint string
679 can be used to stand for particular ranges of immediate operands.
680 This macro defines what the ranges are.
681 C is the letter, and VALUE is a constant value.
682 Return 1 if VALUE is in the range specified by C.
684 For the 68000, `I' is used for the range 1 to 8
685 allowed as immediate shift counts and in addq.
686 `J' is used for the range of signed numbers that fit in 16 bits.
687 `K' is for numbers that moveq can't handle.
688 `L' is for range -8 to -1, range of values that can be added with subq.
689 `M' is for numbers that moveq+notb can't handle.
690 'N' is for range 24 to 31, rotatert:SI 8 to 1 expressed as rotate.
691 'O' is for 16 (for rotate using swap).
692 'P' is for range 8 to 15, rotatert:HI 8 to 1 expressed as rotate. */
694 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
695 ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \
696 (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
697 (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
698 (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : \
699 (C) == 'M' ? (VALUE) < -0x100 && (VALUE) >= 0x100 : \
700 (C) == 'N' ? (VALUE) >= 24 && (VALUE) <= 31 : \
701 (C) == 'O' ? (VALUE) == 16 : \
702 (C) == 'P' ? (VALUE) >= 8 && (VALUE) <= 15 : 0)
705 * A small bit of explanation:
706 * "G" defines all of the floating constants that are *NOT* 68881
707 * constants. this is so 68881 constants get reloaded and the
708 * fpmovecr is used. "H" defines *only* the class of constants that
709 * the fpa can use, because these can be gotten at in any fpa
710 * instruction and there is no need to force reloads.
712 #ifndef SUPPORT_SUN_FPA
713 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
714 ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 )
715 #else /* defined SUPPORT_SUN_FPA */
716 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
717 ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \
718 (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0)
719 #endif /* defined SUPPORT_SUN_FPA */
721 /* Given an rtx X being reloaded into a reg required to be
722 in class CLASS, return the class of reg to actually use.
723 In general this is just CLASS; but on some machines
724 in some cases it is preferable to use a more restrictive class.
725 On the 68000 series, use a data reg if possible when the
726 value is a constant in the range where moveq could be used
727 and we ensure that QImodes are reloaded into data regs.
728 Also, if a floating constant needs reloading, put it in memory.
729 Don't do this for !G constants, since all patterns in the md file
730 expect them to be loaded into a register via fpmovecr. See above. */
732 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
733 ((GET_CODE (X) == CONST_INT \
734 && (unsigned) (INTVAL (X) + 0x80) < 0x100 \
735 && (CLASS) != ADDR_REGS) \
737 : (GET_MODE (X) == QImode && (CLASS) != ADDR_REGS) \
739 : (GET_CODE (X) == CONST_DOUBLE \
740 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
741 ? (! CONST_DOUBLE_OK_FOR_LETTER_P (X, 'G') \
742 && (CLASS == FP_REGS || CLASS == DATA_OR_FP_REGS) \
743 ? FP_REGS : NO_REGS) \
746 /* Return the maximum number of consecutive registers
747 needed to represent mode MODE in a register of class CLASS. */
748 /* On the 68000, this is the size of MODE in words,
749 except in the FP regs, where a single reg is always enough. */
750 #ifndef SUPPORT_SUN_FPA
752 #define CLASS_MAX_NREGS(CLASS, MODE) \
753 ((CLASS) == FP_REGS ? 1 \
754 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
756 /* Moves between fp regs and other regs are two insns. */
757 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
758 (((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
759 || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
762 #else /* defined SUPPORT_SUN_FPA */
764 #define CLASS_MAX_NREGS(CLASS, MODE) \
765 ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \
766 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
768 /* Moves between fp regs and other regs are two insns. */
769 /* Likewise for high fpa regs and other regs. */
770 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
771 ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
772 || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
773 || ((CLASS1) == FPA_REGS && (CLASS2) != FPA_REGS) \
774 || ((CLASS2) == FPA_REGS && (CLASS1) != FPA_REGS)) \
777 #endif /* define SUPPORT_SUN_FPA */
779 /* Stack layout; function entry, exit and calling. */
781 /* Define this if pushing a word on the stack
782 makes the stack pointer a smaller address. */
783 #define STACK_GROWS_DOWNWARD
785 /* Nonzero if we need to generate stack-probe insns.
786 On most systems they are not needed.
787 When they are needed, define this as the stack offset to probe at. */
790 /* Define this if the nominal address of the stack frame
791 is at the high-address end of the local variables;
792 that is, each additional local variable allocated
793 goes at a more negative offset in the frame. */
794 #define FRAME_GROWS_DOWNWARD
796 /* Offset within stack frame to start allocating local variables at.
797 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
798 first local allocated. Otherwise, it is the offset to the BEGINNING
799 of the first local allocated. */
800 #define STARTING_FRAME_OFFSET 0
802 /* If we generate an insn to push BYTES bytes,
803 this says how many the stack pointer really advances by.
804 On the 68000, sp@- in a byte insn really pushes a word. */
805 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
807 /* Offset of first parameter from the argument pointer register value. */
808 #define FIRST_PARM_OFFSET(FNDECL) 8
810 /* Value is the number of byte of arguments automatically
811 popped when returning from a subroutine call.
812 FUNDECL is the declaration node of the function (as a tree),
813 FUNTYPE is the data type of the function (as a tree),
814 or for a library call it is an identifier node for the subroutine name.
815 SIZE is the number of bytes of arguments passed on the stack.
817 On the 68000, the RTS insn cannot pop anything.
818 On the 68010, the RTD insn may be used to pop them if the number
819 of args is fixed, but if the number is variable then the caller
820 must pop them all. RTD can't be used for library calls now
821 because the library is compiled with the Unix compiler.
822 Use of RTD is a selectable option, since it is incompatible with
823 standard Unix calling sequences. If the option is not selected,
824 the caller must always pop the args. */
826 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
827 ((TARGET_RTD && (!(FUNDECL) || TREE_CODE (FUNDECL) != IDENTIFIER_NODE) \
828 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
829 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
830 == void_type_node))) \
833 /* Define how to find the value returned by a function.
834 VALTYPE is the data type of the value (as a tree).
835 If the precise function being called is known, FUNC is its FUNCTION_DECL;
836 otherwise, FUNC is 0. */
838 /* On the 68000 the return value is in D0 regardless. */
840 #define FUNCTION_VALUE(VALTYPE, FUNC) \
841 gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
843 /* Define how to find the value returned by a library function
844 assuming the value has mode MODE. */
846 /* On the 68000 the return value is in D0 regardless. */
848 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
850 /* 1 if N is a possible register number for a function value.
851 On the 68000, d0 is the only register thus used. */
853 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
855 /* Define this to be true when FUNCTION_VALUE_REGNO_P is true for
856 more than one register. */
858 #define NEEDS_UNTYPED_CALL 0
860 /* Define this if PCC uses the nonreentrant convention for returning
861 structure and union values. */
863 #define PCC_STATIC_STRUCT_RETURN
865 /* 1 if N is a possible register number for function argument passing.
866 On the 68000, no registers are used in this way. */
868 #define FUNCTION_ARG_REGNO_P(N) 0
870 /* Define a data type for recording info about an argument list
871 during the scan of that argument list. This data type should
872 hold all necessary information about the function itself
873 and about the args processed so far, enough to enable macros
874 such as FUNCTION_ARG to determine where the next arg should go.
876 On the m68k, this is a single integer, which is a number of bytes
877 of arguments scanned so far. */
879 #define CUMULATIVE_ARGS int
881 /* Initialize a variable CUM of type CUMULATIVE_ARGS
882 for a call to a function whose data type is FNTYPE.
883 For a library call, FNTYPE is 0.
885 On the m68k, the offset starts at 0. */
887 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
890 /* Update the data in CUM to advance over an argument
891 of mode MODE and data type TYPE.
892 (TYPE is null for libcalls where that information may not be available.) */
894 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
895 ((CUM) += ((MODE) != BLKmode \
896 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
897 : (int_size_in_bytes (TYPE) + 3) & ~3))
899 /* Define where to put the arguments to a function.
900 Value is zero to push the argument on the stack,
901 or a hard register in which to store the argument.
903 MODE is the argument's machine mode.
904 TYPE is the data type of the argument (as a tree).
905 This is null for libcalls where that information may
907 CUM is a variable of type CUMULATIVE_ARGS which gives info about
908 the preceding args and about the function being called.
909 NAMED is nonzero if this argument is a named parameter
910 (otherwise it is an extra parameter matching an ellipsis). */
912 /* On the 68000 all args are pushed, except if -mregparm is specified
913 then the first two words of arguments are passed in d0, d1.
914 *NOTE* -mregparm does not work.
915 It exists only to test register calling conventions. */
917 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
918 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
920 /* For an arg passed partly in registers and partly in memory,
921 this is the number of registers used.
922 For args passed entirely in registers or entirely in memory, zero. */
924 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
925 ((TARGET_REGPARM && (CUM) < 8 \
926 && 8 < ((CUM) + ((MODE) == BLKmode \
927 ? int_size_in_bytes (TYPE) \
928 : GET_MODE_SIZE (MODE)))) \
931 /* Generate the assembly code for function entry. */
932 #define FUNCTION_PROLOGUE(FILE, SIZE) output_function_prologue(FILE, SIZE)
934 /* Output assembler code to FILE to increment profiler label # LABELNO
935 for profiling a function entry. */
937 #define FUNCTION_PROFILER(FILE, LABELNO) \
938 asm_fprintf (FILE, "\tlea %LLP%d,%Ra0\n\tjsr mcount\n", (LABELNO))
940 /* Output assembler code to FILE to initialize this source file's
941 basic block profiling info, if that has not already been done. */
943 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
946 switch (profile_block_flag) \
949 asm_fprintf (FILE, "\tpea %d\n\tpea %LLPBX0\n\tjsr %U__bb_init_trace_func\n\taddql %I8,%Rsp\n", \
954 asm_fprintf (FILE, "\ttstl %LLPBX0\n\tbne %LLPI%d\n\tpea %LLPBX0\n\tjsr %U__bb_init_func\n\taddql %I4,%Rsp\n%LLPI%d:\n", \
955 (BLOCK_OR_LABEL), (BLOCK_OR_LABEL)); \
961 /* Output assembler code to FILE to increment the counter for
962 the BLOCKNO'th basic block in this source file. */
964 #define BLOCK_PROFILER(FILE, BLOCKNO) \
967 switch (profile_block_flag) \
970 asm_fprintf (FILE, "\tmovel %Ra1,%Rsp@-\n\tlea ___bb,%Ra1\n\tmovel %I%d,%Ra1@(0)\n\tmovel %I%LLPBX0,%Ra1@(4)\n\tmovel %Rsp@+,%Ra1\n\tjsr %U__bb_trace_func\n", \
975 asm_fprintf (FILE, "\taddql %I1,%LLPBX2+%d\n", 4 * BLOCKNO); \
981 /* Output assembler code to FILE to indicate return from
982 a function during basic block profiling. */
984 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
985 asm_fprintf (FILE, "\tjsr %U__bb_trace_ret\n");
987 /* Save all registers which may be clobbered by a function call. */
990 #define MACHINE_STATE_SAVE(id) \
991 asm ("move.w %ccr,-(%sp)"); \
992 asm ("movm.l &0xc0c0,-(%sp)");
994 #define MACHINE_STATE_SAVE(id) \
995 asm ("movew cc,sp@-"); \
996 asm ("moveml d0/d1/a0/a1,sp@-");
999 /* Restore all registers saved by MACHINE_STATE_SAVE. */
1002 #define MACHINE_STATE_RESTORE(id) \
1003 asm ("movm.l (%sp)+,&0x0303"); \
1004 asm ("move.w (%sp)+,%ccr");
1006 #define MACHINE_STATE_RESTORE(id) \
1007 asm ("moveml sp@+,d0/d1/a0/a1"); \
1008 asm ("movew sp@+,cc");
1011 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1012 the stack pointer does not matter. The value is tested only in
1013 functions that have frame pointers.
1014 No definition is equivalent to always zero. */
1016 #define EXIT_IGNORE_STACK 1
1018 /* Generate the assembly code for function exit. */
1019 #define FUNCTION_EPILOGUE(FILE, SIZE) output_function_epilogue (FILE, SIZE)
1021 /* This is a hook for other tm files to change. */
1022 /* #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) */
1024 /* Determine if the epilogue should be output as RTL.
1025 You should override this if you define FUNCTION_EXTRA_EPILOGUE. */
1026 #define USE_RETURN_INSN use_return_insn ()
1028 /* Store in the variable DEPTH the initial difference between the
1029 frame pointer reg contents and the stack pointer reg contents,
1030 as of the start of the function body. This depends on the layout
1031 of the fixed parts of the stack frame and on how registers are saved.
1033 On the 68k, if we have a frame, we must add one word to its length
1034 to allow for the place that a6 is stored when we do have a frame pointer.
1035 Otherwise, we would need to compute the offset from the frame pointer
1036 of a local variable as a function of frame_pointer_needed, which
1039 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
1042 for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \
1043 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
1045 for (regno = 0; regno < 16; regno++) \
1046 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
1048 (DEPTH) = (offset + ((get_frame_size () + 3) & -4) \
1049 + (get_frame_size () == 0 ? 0 : 4)); \
1052 /* Output assembler code for a block containing the constant parts
1053 of a trampoline, leaving space for the variable parts. */
1055 /* On the 68k, the trampoline looks like this:
1059 WARNING: Targets that may run on 68040+ cpus must arrange for
1060 the instruction cache to be flushed. Previous incarnations of
1061 the m68k trampoline code attempted to get around this by either
1062 using an out-of-line transfer function or pc-relative data, but
1063 the fact remains that the code to jump to the transfer function
1064 or the code to load the pc-relative data needs to be flushed
1065 just as much as the "variable" portion of the trampoline.
1066 Recognizing that a cache flush is going to be required anyway,
1067 dispense with such notions and build a smaller trampoline. */
1069 /* Since more instructions are required to move a template into
1070 place than to create it on the spot, don't use a template. */
1072 /* Length in units of the trampoline for entering a nested function. */
1074 #define TRAMPOLINE_SIZE 12
1076 /* Alignment required for a trampoline in bits. */
1078 #define TRAMPOLINE_ALIGNMENT 16
1080 /* Targets redefine this to invoke code to either flush the cache,
1081 or enable stack execution (or both). */
1083 #ifndef FINALIZE_TRAMPOLINE
1084 #define FINALIZE_TRAMPOLINE(TRAMP)
1087 /* Emit RTL insns to initialize the variable parts of a trampoline.
1088 FNADDR is an RTX for the address of the function's pure code.
1089 CXT is an RTX for the static chain value for the function. */
1091 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1093 emit_move_insn (gen_rtx (MEM, HImode, TRAMP), GEN_INT(0x207C)); \
1094 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), CXT); \
1095 emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 6)), \
1097 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 8)), FNADDR); \
1098 FINALIZE_TRAMPOLINE(TRAMP); \
1101 /* This is the library routine that is used
1102 to transfer control from the trampoline
1103 to the actual nested function.
1104 It is defined for backward compatibility,
1105 for linking with object code that used the old
1106 trampoline definition. */
1108 /* A colon is used with no explicit operands
1109 to cause the template string to be scanned for %-constructs. */
1110 /* The function name __transfer_from_trampoline is not actually used.
1111 The function definition just permits use of "asm with operands"
1112 (though the operand list is empty). */
1113 #define TRANSFER_FROM_TRAMPOLINE \
1115 __transfer_from_trampoline () \
1117 register char *a0 asm ("%a0"); \
1118 asm (GLOBAL_ASM_OP " ___trampoline"); \
1119 asm ("___trampoline:"); \
1120 asm volatile ("move%.l %0,%@" : : "m" (a0[22])); \
1121 asm volatile ("move%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \
1125 /* Addressing modes, and classification of registers for them. */
1127 #define HAVE_POST_INCREMENT
1128 /* #define HAVE_POST_DECREMENT */
1130 #define HAVE_PRE_DECREMENT
1131 /* #define HAVE_PRE_INCREMENT */
1133 /* Macros to check register numbers against specific register classes. */
1135 /* These assume that REGNO is a hard or pseudo reg number.
1136 They give nonzero only if REGNO is a hard reg of the suitable class
1137 or a pseudo reg currently allocated to a suitable hard reg.
1138 Since they use reg_renumber, they are safe only once reg_renumber
1139 has been allocated, which happens in local-alloc.c. */
1141 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1142 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
1143 #define REGNO_OK_FOR_BASE_P(REGNO) \
1144 (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8)
1145 #define REGNO_OK_FOR_DATA_P(REGNO) \
1146 ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
1147 #define REGNO_OK_FOR_FP_P(REGNO) \
1148 (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8)
1149 #ifdef SUPPORT_SUN_FPA
1150 #define REGNO_OK_FOR_FPA_P(REGNO) \
1151 (((REGNO) >= 24 && (REGNO) < 56) || (reg_renumber[REGNO] >= 24 && reg_renumber[REGNO] < 56))
1154 /* Now macros that check whether X is a register and also,
1155 strictly, whether it is in a specified class.
1157 These macros are specific to the 68000, and may be used only
1158 in code for printing assembler insns and in conditions for
1159 define_optimization. */
1161 /* 1 if X is a data register. */
1163 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
1165 /* 1 if X is an fp register. */
1167 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1169 /* 1 if X is an address register */
1171 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
1173 #ifdef SUPPORT_SUN_FPA
1174 /* 1 if X is a register in the Sun FPA. */
1175 #define FPA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPA_P (REGNO (X)))
1177 /* Answer must be no if we don't have an FPA. */
1178 #define FPA_REG_P(X) 0
1181 /* Maximum number of registers that can appear in a valid memory address. */
1183 #define MAX_REGS_PER_ADDRESS 2
1185 /* Recognize any constant value that is a valid address. */
1187 #define CONSTANT_ADDRESS_P(X) \
1188 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1189 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1190 || GET_CODE (X) == HIGH)
1192 /* Nonzero if the constant value X is a legitimate general operand.
1193 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1195 #define LEGITIMATE_CONSTANT_P(X) 1
1197 /* Nonzero if the constant value X is a legitimate general operand
1198 when generating PIC code. It is given that flag_pic is on and
1199 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1201 #define LEGITIMATE_PIC_OPERAND_P(X) \
1202 ((! symbolic_operand (X, VOIDmode) \
1203 && ! (GET_CODE (X) == CONST_DOUBLE && CONST_DOUBLE_MEM (X) \
1204 && GET_CODE (CONST_DOUBLE_MEM (X)) == MEM \
1205 && symbolic_operand (XEXP (CONST_DOUBLE_MEM (X), 0), \
1207 || (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)))
1209 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1210 and check its validity for a certain class.
1211 We have two alternate definitions for each of them.
1212 The usual definition accepts all pseudo regs; the other rejects
1213 them unless they have been allocated suitable hard regs.
1214 The symbol REG_OK_STRICT causes the latter definition to be used.
1216 Most source files want to accept pseudo regs in the hope that
1217 they will get allocated to the class that the insn wants them to be in.
1218 Source files for reload pass need to be strict.
1219 After reload, it makes no difference, since pseudo regs have
1220 been eliminated by then. */
1222 #ifndef REG_OK_STRICT
1224 /* Nonzero if X is a hard reg that can be used as an index
1225 or if it is a pseudo reg. */
1226 #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8)
1227 /* Nonzero if X is a hard reg that can be used as a base reg
1228 or if it is a pseudo reg. */
1229 #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0)
1233 /* Nonzero if X is a hard reg that can be used as an index. */
1234 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1235 /* Nonzero if X is a hard reg that can be used as a base reg. */
1236 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1240 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1241 that is a valid memory address for an instruction.
1242 The MODE argument is the machine mode for the MEM expression
1243 that wants to use this address.
1245 When generating PIC, an address involving a SYMBOL_REF is legitimate
1246 if and only if it is the sum of pic_offset_table_rtx and the SYMBOL_REF.
1247 We use LEGITIMATE_PIC_OPERAND_P to throw out the illegitimate addresses,
1248 and we explicitly check for the sum of pic_offset_table_rtx and a SYMBOL_REF.
1250 Likewise for a LABEL_REF when generating PIC.
1252 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
1254 /* Allow SUBREG everywhere we allow REG. This results in better code. It
1255 also makes function inlining work when inline functions are called with
1256 arguments that are SUBREGs. */
1258 #define LEGITIMATE_BASE_REG_P(X) \
1259 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1260 || (GET_CODE (X) == SUBREG \
1261 && GET_CODE (SUBREG_REG (X)) == REG \
1262 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
1264 #define INDIRECTABLE_1_ADDRESS_P(X) \
1265 ((CONSTANT_ADDRESS_P (X) && (!flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
1266 || LEGITIMATE_BASE_REG_P (X) \
1267 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
1268 && LEGITIMATE_BASE_REG_P (XEXP (X, 0))) \
1269 || (GET_CODE (X) == PLUS \
1270 && LEGITIMATE_BASE_REG_P (XEXP (X, 0)) \
1271 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1272 && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000) \
1273 || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1274 && flag_pic && GET_CODE (XEXP (X, 1)) == SYMBOL_REF) \
1275 || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1276 && flag_pic && GET_CODE (XEXP (X, 1)) == LABEL_REF)) \
1279 /* This should replace the last two (non-pic) lines
1280 except that Sun's assembler does not seem to handle such operands. */
1281 && (TARGET_68020 ? CONSTANT_ADDRESS_P (XEXP (X, 1)) \
1282 : (GET_CODE (XEXP (X, 1)) == CONST_INT \
1283 && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000))))
1287 #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
1288 { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; }
1290 /* Only labels on dispatch tables are valid for indexing from. */
1291 #define GO_IF_INDEXABLE_BASE(X, ADDR) \
1293 if (GET_CODE (X) == LABEL_REF \
1294 && (temp = next_nonnote_insn (XEXP (X, 0))) != 0 \
1295 && GET_CODE (temp) == JUMP_INSN \
1296 && (GET_CODE (PATTERN (temp)) == ADDR_VEC \
1297 || GET_CODE (PATTERN (temp)) == ADDR_DIFF_VEC)) \
1299 if (LEGITIMATE_BASE_REG_P (X)) goto ADDR; }
1301 #define GO_IF_INDEXING(X, ADDR) \
1302 { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
1303 { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
1304 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
1305 { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
1307 #define GO_IF_INDEXED_ADDRESS(X, ADDR) \
1308 { GO_IF_INDEXING (X, ADDR); \
1309 if (GET_CODE (X) == PLUS) \
1310 { if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1311 && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \
1312 { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \
1313 if (GET_CODE (XEXP (X, 0)) == CONST_INT \
1314 && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \
1315 { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
1317 #define LEGITIMATE_INDEX_REG_P(X) \
1318 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1319 || (GET_CODE (X) == SIGN_EXTEND \
1320 && GET_CODE (XEXP (X, 0)) == REG \
1321 && GET_MODE (XEXP (X, 0)) == HImode \
1322 && REG_OK_FOR_INDEX_P (XEXP (X, 0))) \
1323 || (GET_CODE (X) == SUBREG \
1324 && GET_CODE (SUBREG_REG (X)) == REG \
1325 && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
1327 #define LEGITIMATE_INDEX_P(X) \
1328 (LEGITIMATE_INDEX_REG_P (X) \
1329 || ((TARGET_68020 || TARGET_5200) && GET_CODE (X) == MULT \
1330 && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
1331 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1332 && (INTVAL (XEXP (X, 1)) == 2 \
1333 || INTVAL (XEXP (X, 1)) == 4 \
1334 || (INTVAL (XEXP (X, 1)) == 8 && !TARGET_5200))))
1336 /* If pic, we accept INDEX+LABEL, which is what do_tablejump makes. */
1337 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1338 { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
1339 GO_IF_INDEXED_ADDRESS (X, ADDR); \
1340 if (flag_pic && MODE == CASE_VECTOR_MODE && GET_CODE (X) == PLUS \
1341 && LEGITIMATE_INDEX_P (XEXP (X, 0)) \
1342 && GET_CODE (XEXP (X, 1)) == LABEL_REF) \
1345 /* Don't call memory_address_noforce for the address to fetch
1346 the switch offset. This address is ok as it stands (see above),
1347 but memory_address_noforce would alter it. */
1348 #define PIC_CASE_VECTOR_ADDRESS(index) index
1350 /* Try machine-dependent ways of modifying an illegitimate address
1351 to be legitimate. If we find one, return the new, valid address.
1352 This macro is used in only one place: `memory_address' in explow.c.
1354 OLDX is the address as it was before break_out_memory_refs was called.
1355 In some cases it is useful to look at this to decide what needs to be done.
1357 MODE and WIN are passed so that this macro can use
1358 GO_IF_LEGITIMATE_ADDRESS.
1360 It is always safe for this macro to do nothing. It exists to recognize
1361 opportunities to optimize the output.
1363 For the 68000, we handle X+REG by loading X into a register R and
1364 using R+REG. R will go in an address reg and indexing will be used.
1365 However, if REG is a broken-out memory address or multiplication,
1366 nothing needs to be done because REG can certainly go in an address reg. */
1368 #define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; }
1369 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1370 { register int ch = (X) != (OLDX); \
1371 if (GET_CODE (X) == PLUS) \
1373 if (GET_CODE (XEXP (X, 0)) == MULT) \
1374 { COPY_ONCE (X); XEXP (X, 0) = force_operand (XEXP (X, 0), 0);} \
1375 if (GET_CODE (XEXP (X, 1)) == MULT) \
1376 { COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \
1377 if (ch && GET_CODE (XEXP (X, 1)) == REG \
1378 && GET_CODE (XEXP (X, 0)) == REG) \
1380 if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1381 if (GET_CODE (XEXP (X, 0)) == REG \
1382 || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
1383 && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
1384 && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
1385 { register rtx temp = gen_reg_rtx (Pmode); \
1386 register rtx val = force_operand (XEXP (X, 1), 0); \
1387 emit_move_insn (temp, val); \
1389 XEXP (X, 1) = temp; \
1391 else if (GET_CODE (XEXP (X, 1)) == REG \
1392 || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
1393 && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1394 && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
1395 { register rtx temp = gen_reg_rtx (Pmode); \
1396 register rtx val = force_operand (XEXP (X, 0), 0); \
1397 emit_move_insn (temp, val); \
1399 XEXP (X, 0) = temp; \
1402 /* Go to LABEL if ADDR (a legitimate address expression)
1403 has an effect that depends on the machine mode it is used for.
1404 On the 68000, only predecrement and postincrement address depend thus
1405 (the amount of decrement or increment being the length of the operand). */
1407 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1408 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL
1410 /* Specify the machine mode that this machine uses
1411 for the index in the tablejump instruction. */
1412 #define CASE_VECTOR_MODE HImode
1414 /* Define this if the tablejump instruction expects the table
1415 to contain offsets from the address of the table.
1416 Do not define this if the table should contain absolute addresses. */
1417 #define CASE_VECTOR_PC_RELATIVE
1419 /* Specify the tree operation to be used to convert reals to integers. */
1420 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1422 /* This is the kind of divide that is easiest to do in the general case. */
1423 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1425 /* Define this as 1 if `char' should by default be signed; else as 0. */
1426 #define DEFAULT_SIGNED_CHAR 1
1428 /* Don't cse the address of the function being compiled. */
1429 #define NO_RECURSIVE_FUNCTION_CSE
1431 /* Max number of bytes we can move from memory to memory
1432 in one reasonably fast instruction. */
1435 /* Define this if zero-extension is slow (more than one real instruction). */
1436 #define SLOW_ZERO_EXTEND
1438 /* Nonzero if access to memory by bytes is slow and undesirable. */
1439 #define SLOW_BYTE_ACCESS 0
1441 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1442 is done just by pretending it is already truncated. */
1443 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1445 /* We assume that the store-condition-codes instructions store 0 for false
1446 and some other value for true. This is the value stored for true. */
1448 #define STORE_FLAG_VALUE -1
1450 /* When a prototype says `char' or `short', really pass an `int'. */
1451 #define PROMOTE_PROTOTYPES
1453 /* Specify the machine mode that pointers have.
1454 After generation of rtl, the compiler makes no further distinction
1455 between pointers and any other objects of this machine mode. */
1456 #define Pmode SImode
1458 /* A function address in a call instruction
1459 is a byte address (for indexing purposes)
1460 so give the MEM rtx a byte's mode. */
1461 #define FUNCTION_MODE QImode
1463 /* Compute the cost of computing a constant rtl expression RTX
1464 whose rtx-code is CODE. The body of this macro is a portion
1465 of a switch statement. If the code is computed here,
1466 return it with a return statement. Otherwise, break from the switch. */
1468 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1470 /* Constant zero is super cheap due to clr instruction. */ \
1471 if (RTX == const0_rtx) return 0; \
1472 /* if ((OUTER_CODE) == SET) */ \
1473 return const_int_cost(RTX); \
1478 case CONST_DOUBLE: \
1481 /* Compute the cost of various arithmetic operations.
1482 These are vaguely right for a 68020. */
1483 /* The costs for long multiply have been adjusted to
1484 work properly in synth_mult on the 68020,
1485 relative to an average of the time for add and the time for shift,
1486 taking away a little more because sometimes move insns are needed. */
1487 /* div?.w is relatively cheaper on 68000 counted in COSTS_N_INSNS terms. */
1488 #define MULL_COST (TARGET_68060 ? 2 : TARGET_68040 ? 5 : 13)
1489 #define MULW_COST (TARGET_68060 ? 2 : TARGET_68040 ? 3 : TARGET_68020 ? 8 : 5)
1490 #define DIVW_COST (TARGET_68020 ? 27 : 12)
1492 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1494 /* An lea costs about three times as much as a simple add. */ \
1495 if (GET_MODE (X) == SImode \
1496 && GET_CODE (XEXP (X, 1)) == REG \
1497 && GET_CODE (XEXP (X, 0)) == MULT \
1498 && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
1499 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1500 && (INTVAL (XEXP (XEXP (X, 0), 1)) == 2 \
1501 || INTVAL (XEXP (XEXP (X, 0), 1)) == 4 \
1502 || INTVAL (XEXP (XEXP (X, 0), 1)) == 8)) \
1503 return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \
1509 return COSTS_N_INSNS(1); \
1510 if (! TARGET_68020) \
1512 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1514 if (INTVAL (XEXP (X, 1)) < 16) \
1515 return COSTS_N_INSNS (2) + INTVAL (XEXP (X, 1)) / 2; \
1517 /* We're using clrw + swap for these cases. */ \
1518 return COSTS_N_INSNS (4) + (INTVAL (XEXP (X, 1)) - 16) / 2; \
1520 return COSTS_N_INSNS (10); /* worst case */ \
1522 /* A shift by a big integer takes an extra instruction. */ \
1523 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1524 && (INTVAL (XEXP (X, 1)) == 16)) \
1525 return COSTS_N_INSNS (2); /* clrw;swap */ \
1526 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1527 && !(INTVAL (XEXP (X, 1)) > 0 \
1528 && INTVAL (XEXP (X, 1)) <= 8)) \
1529 return COSTS_N_INSNS (3); /* lsr #i,dn */ \
1532 if ((GET_CODE (XEXP (X, 0)) == ZERO_EXTEND \
1533 || GET_CODE (XEXP (X, 0)) == SIGN_EXTEND) \
1534 && GET_MODE (X) == SImode) \
1535 return COSTS_N_INSNS (MULW_COST); \
1536 if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1537 return COSTS_N_INSNS (MULW_COST); \
1539 return COSTS_N_INSNS (MULL_COST); \
1544 if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1545 return COSTS_N_INSNS (DIVW_COST); /* div.w */ \
1546 return COSTS_N_INSNS (43); /* div.l */
1548 /* Tell final.c how to eliminate redundant test instructions. */
1550 /* Here we define machine-dependent flags and fields in cc_status
1551 (see `conditions.h'). */
1553 /* Set if the cc value is actually in the 68881, so a floating point
1554 conditional branch must be output. */
1555 #define CC_IN_68881 04000
1557 /* Store in cc_status the expressions that the condition codes will
1558 describe after execution of an instruction whose pattern is EXP.
1559 Do not alter them if the instruction would not alter the cc's. */
1561 /* On the 68000, all the insns to store in an address register fail to
1562 set the cc's. However, in some cases these instructions can make it
1563 possibly invalid to use the saved cc's. In those cases we clear out
1564 some or all of the saved cc's so they won't be used. */
1566 #define NOTICE_UPDATE_CC(EXP,INSN) notice_update_cc (EXP, INSN)
1568 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1569 { if (cc_prev_status.flags & CC_IN_68881) \
1571 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1575 /* Control the assembler format that we output. */
1577 /* Output at beginning of assembler file. */
1579 #define ASM_FILE_START(FILE) \
1580 fprintf (FILE, "#NO_APP\n");
1582 /* Output to assembler file text saying following lines
1583 may contain character constants, extra white space, comments, etc. */
1585 #define ASM_APP_ON "#APP\n"
1587 /* Output to assembler file text saying following lines
1588 no longer contain unusual constructs. */
1590 #define ASM_APP_OFF "#NO_APP\n"
1592 /* Output before read-only data. */
1594 #define TEXT_SECTION_ASM_OP ".text"
1596 /* Output before writable data. */
1598 #define DATA_SECTION_ASM_OP ".data"
1600 /* Here are four prefixes that are used by asm_fprintf to
1601 facilitate customization for alternate assembler syntaxes.
1602 Machines with no likelihood of an alternate syntax need not
1603 define these and need not use asm_fprintf. */
1605 /* The prefix for register names. Note that REGISTER_NAMES
1606 is supposed to include this prefix. */
1608 #define REGISTER_PREFIX ""
1610 /* The prefix for local labels. You should be able to define this as
1611 an empty string, or any arbitrary string (such as ".", ".L%", etc)
1612 without having to make any other changes to account for the specific
1613 definition. Note it is a string literal, not interpreted by printf
1616 #define LOCAL_LABEL_PREFIX ""
1618 /* The prefix to add to user-visible assembler symbols. */
1620 #define USER_LABEL_PREFIX "_"
1622 /* The prefix for immediate operands. */
1624 #define IMMEDIATE_PREFIX "#"
1626 /* How to refer to registers in assembler output.
1627 This sequence is indexed by compiler's hard-register-number (see above). */
1629 #ifndef SUPPORT_SUN_FPA
1631 #define REGISTER_NAMES \
1632 {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1633 "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1634 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" }
1636 #else /* SUPPORTED_SUN_FPA */
1638 #define REGISTER_NAMES \
1639 {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1640 "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1641 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \
1642 "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \
1643 "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \
1644 "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \
1645 "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31" }
1647 #endif /* defined SUPPORT_SUN_FPA */
1649 /* How to renumber registers for dbx and gdb.
1650 On the Sun-3, the floating point registers have numbers
1651 18 to 25, not 16 to 23 as they do in the compiler. */
1653 #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
1655 /* This is how to output the definition of a user-level label named NAME,
1656 such as the label on a static function or variable NAME. */
1658 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1659 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1661 /* This is how to output a command to make the user-level label named NAME
1662 defined for reference from other files. */
1664 #define GLOBAL_ASM_OP ".globl"
1665 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1666 do { fprintf (FILE, "%s ", GLOBAL_ASM_OP); \
1667 assemble_name (FILE, NAME); \
1668 fputs ("\n", FILE);} while (0)
1670 /* This is how to output a reference to a user-level label named NAME.
1671 `assemble_name' uses this. */
1673 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1674 asm_fprintf (FILE, "%0U%s", NAME)
1676 /* This is how to output an internal numbered label where
1677 PREFIX is the class of label and NUM is the number within the class. */
1679 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1680 asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM)
1682 /* This is how to store into the string LABEL
1683 the symbol_ref name of an internal numbered label where
1684 PREFIX is the class of label and NUM is the number within the class.
1685 This is suitable for output with `assemble_name'. */
1687 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1688 sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
1690 /* This is how to output a `long double' extended real constant. */
1692 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1694 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1695 if (sizeof (int) == sizeof (long)) \
1696 fprintf (FILE, "\t.long 0x%x,0x%x,0x%x\n", l[0], l[1], l[2]); \
1698 fprintf (FILE, "\t.long 0x%lx,0x%lx,0x%lx\n", l[0], l[1], l[2]); \
1701 /* This is how to output an assembler line defining a `double' constant. */
1703 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1704 do { char dstr[30]; \
1705 REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1706 fprintf (FILE, "\t.double 0r%s\n", dstr); \
1709 /* This is how to output an assembler line defining a `float' constant. */
1711 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1713 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1714 if (sizeof (int) == sizeof (long)) \
1715 fprintf (FILE, "\t.long 0x%x\n", l); \
1717 fprintf (FILE, "\t.long 0x%lx\n", l); \
1720 /* This is how to output an assembler line defining an `int' constant. */
1722 #define ASM_OUTPUT_INT(FILE,VALUE) \
1723 ( fprintf (FILE, "\t.long "), \
1724 output_addr_const (FILE, (VALUE)), \
1725 fprintf (FILE, "\n"))
1727 /* Likewise for `char' and `short' constants. */
1729 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1730 ( fprintf (FILE, "\t.word "), \
1731 output_addr_const (FILE, (VALUE)), \
1732 fprintf (FILE, "\n"))
1734 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1735 ( fprintf (FILE, "\t.byte "), \
1736 output_addr_const (FILE, (VALUE)), \
1737 fprintf (FILE, "\n"))
1739 /* This is how to output an assembler line for a numeric constant byte. */
1741 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1742 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1744 /* This is how to output an insn to push a register on the stack.
1745 It need not be very fast code. */
1747 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1748 asm_fprintf (FILE, "\tmovel %s,%Rsp@-\n", reg_names[REGNO])
1750 /* This is how to output an insn to pop a register from the stack.
1751 It need not be very fast code. */
1753 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1754 asm_fprintf (FILE, "\tmovel %Rsp@+,%s\n", reg_names[REGNO])
1756 /* This is how to output an element of a case-vector that is absolute.
1757 (The 68000 does not use such vectors,
1758 but we must define this macro anyway.) */
1760 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1761 asm_fprintf (FILE, "\t.long %LL%d\n", VALUE)
1763 /* This is how to output an element of a case-vector that is relative. */
1765 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1766 asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL)
1768 /* This is how to output an assembler line
1769 that says to advance the location counter
1770 to a multiple of 2**LOG bytes. */
1772 /* We don't have a way to align to more than a two-byte boundary, so do the
1773 best we can and don't complain. */
1774 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1776 fprintf (FILE, "\t.even\n");
1778 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1779 fprintf (FILE, "\t.skip %u\n", (SIZE))
1781 /* This says how to output an assembler line
1782 to define a global common symbol. */
1784 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1785 ( fputs (".comm ", (FILE)), \
1786 assemble_name ((FILE), (NAME)), \
1787 fprintf ((FILE), ",%u\n", (ROUNDED)))
1789 /* This says how to output an assembler line
1790 to define a local common symbol. */
1792 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1793 ( fputs (".lcomm ", (FILE)), \
1794 assemble_name ((FILE), (NAME)), \
1795 fprintf ((FILE), ",%u\n", (ROUNDED)))
1797 /* Store in OUTPUT a string (made with alloca) containing
1798 an assembler-name for a local static variable named NAME.
1799 LABELNO is an integer which is different for each call. */
1801 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1802 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1803 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1805 /* Define the parentheses used to group arithmetic operations
1806 in assembler code. */
1808 #define ASM_OPEN_PAREN "("
1809 #define ASM_CLOSE_PAREN ")"
1811 /* Define results of standard character escape sequences. */
1812 #define TARGET_BELL 007
1813 #define TARGET_BS 010
1814 #define TARGET_TAB 011
1815 #define TARGET_NEWLINE 012
1816 #define TARGET_VT 013
1817 #define TARGET_FF 014
1818 #define TARGET_CR 015
1820 /* Output a float value (represented as a C double) as an immediate operand.
1821 This macro is a 68k-specific macro. */
1823 #define ASM_OUTPUT_FLOAT_OPERAND(CODE,FILE,VALUE) \
1828 REAL_VALUE_TO_DECIMAL (VALUE, "%.9g", dstr); \
1829 asm_fprintf ((FILE), "%I0r%s", dstr); \
1834 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1835 if (sizeof (int) == sizeof (long)) \
1836 asm_fprintf ((FILE), "%I0x%x", l); \
1838 asm_fprintf ((FILE), "%I0x%lx", l); \
1842 /* Output a double value (represented as a C double) as an immediate operand.
1843 This macro is a 68k-specific macro. */
1844 #define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
1845 do { char dstr[30]; \
1846 REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1847 asm_fprintf (FILE, "%I0r%s", dstr); \
1850 /* Note, long double immediate operands are not actually
1851 generated by m68k.md. */
1852 #define ASM_OUTPUT_LONG_DOUBLE_OPERAND(FILE,VALUE) \
1853 do { char dstr[30]; \
1854 REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
1855 asm_fprintf (FILE, "%I0r%s", dstr); \
1858 /* Print operand X (an rtx) in assembler syntax to file FILE.
1859 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1860 For `%' followed by punctuation, CODE is the punctuation and X is null.
1862 On the 68000, we use several CODE characters:
1863 '.' for dot needed in Motorola-style opcode names.
1864 '-' for an operand pushing on the stack:
1865 sp@-, -(sp) or -(%sp) depending on the style of syntax.
1866 '+' for an operand pushing on the stack:
1867 sp@+, (sp)+ or (%sp)+ depending on the style of syntax.
1868 '@' for a reference to the top word on the stack:
1869 sp@, (sp) or (%sp) depending on the style of syntax.
1870 '#' for an immediate operand prefix (# in MIT and Motorola syntax
1871 but & in SGS syntax).
1872 '!' for the fpcr register (used in some float-to-fixed conversions).
1873 '$' for the letter `s' in an op code, but only on the 68040.
1874 '&' for the letter `d' in an op code, but only on the 68040.
1875 '/' for register prefix needed by longlong.h.
1877 'b' for byte insn (no effect, on the Sun; this is for the ISI).
1878 'd' to force memory addressing to be absolute, not relative.
1879 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex)
1880 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather
1881 than directly). Second part of 'y' below.
1882 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex),
1883 or print pair of registers as rx:ry.
1884 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs
1885 CONST_DOUBLE's as SunFPA constant RAM registers if
1886 possible, so it should not be used except for the SunFPA. */
1888 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1889 ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \
1890 || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \
1891 || (CODE) == '$' || (CODE) == '&' || (CODE) == '/')
1893 /* A C compound statement to output to stdio stream STREAM the
1894 assembler syntax for an instruction operand X. X is an RTL
1897 CODE is a value that can be used to specify one of several ways
1898 of printing the operand. It is used when identical operands
1899 must be printed differently depending on the context. CODE
1900 comes from the `%' specification that was used to request
1901 printing of the operand. If the specification was just `%DIGIT'
1902 then CODE is 0; if the specification was `%LTR DIGIT' then CODE
1903 is the ASCII code for LTR.
1905 If X is a register, this macro should print the register's name.
1906 The names can be found in an array `reg_names' whose type is
1907 `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
1909 When the machine description has a specification `%PUNCT' (a `%'
1910 followed by a punctuation character), this macro is called with
1911 a null pointer for X and the punctuation character for CODE.
1913 See m68k.c for the m68k specific codes. */
1915 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1917 /* A C compound statement to output to stdio stream STREAM the
1918 assembler syntax for an instruction operand that is a memory
1919 reference whose address is ADDR. ADDR is an RTL expression.
1921 On some machines, the syntax for a symbolic address depends on
1922 the section that the address refers to. On these machines,
1923 define the macro `ENCODE_SECTION_INFO' to store the information
1924 into the `symbol_ref', and then check for it here. */
1926 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1929 /* Definitions for generating bytecode */
1931 /* Just so it's known this target is supported by the bytecode generator.
1932 If this define isn't found anywhere in the target config files, then
1933 dummy stubs are supplied by bytecode.h, and any attempt to use
1934 -fbytecode will result in an error message. */
1936 #define TARGET_SUPPORTS_BYTECODE
1938 /* Minimal segment alignment within sections is 8 units. */
1939 #define MACHINE_SEG_ALIGN 3
1941 /* Integer alignment is two units. */
1944 /* Pointer alignment is eight units. */
1947 /* Global symbols begin with `_' */
1948 #define NAMES_HAVE_UNDERSCORES
1950 /* BC_xxx below are similar to their ASM_xxx counterparts above. */
1951 #define BC_GLOBALIZE_LABEL(FP, NAME) bc_globalize_label(NAME)
1953 #define BC_OUTPUT_COMMON(FP, NAME, SIZE, ROUNDED) \
1954 do { bc_emit_common(NAME, ROUNDED); bc_globalize_label(NAME); } while (0)
1956 #define BC_OUTPUT_BSS(FP, NAME, SIZE, ROUNDED) \
1957 do { bc_data (); bc_emit_labeldef(NAME); bc_emit_skip (SIZE); } while (0)
1959 #define BC_OUTPUT_LOCAL(FP, NAME, SIZE, ROUNDED) \
1960 bc_emit_common(NAME, ROUNDED)
1962 #define BC_OUTPUT_ALIGN(FP, ALIGN) bc_align(ALIGN)
1964 #define BC_OUTPUT_LABEL(FP, NAME) bc_emit_labeldef(NAME)
1966 #define BC_OUTPUT_SKIP(FP, SIZE) bc_emit_skip(SIZE)
1968 #define BC_OUTPUT_LABELREF(FP, NAME) \
1970 char *foo = (char *) xmalloc(strlen(NAME) + 2); \
1972 strcat(foo, NAME); \
1973 bc_emit_labelref (foo); \
1977 #define BC_OUTPUT_FLOAT(FP, VAL) \
1980 bc_emit ((char *) &F, sizeof F); \
1983 #define BC_OUTPUT_DOUBLE(FP, VAL) \
1986 bc_emit ((char *) &D, sizeof D); \
1989 #define BC_OUTPUT_BYTE(FP, VAL) \
1996 #define BC_OUTPUT_FILE ASM_OUTPUT_FILE
1997 #define BC_OUTPUT_ASCII ASM_OUTPUT_ASCII
1998 #define BC_OUTPUT_IDENT ASM_OUTPUT_IDENT
2000 /* Same as XSTR, but for bytecode */
2001 #define BCXSTR(RTX) ((RTX)->bc_label)
2004 /* Flush bytecode buffer onto file */
2005 #define BC_WRITE_FILE(FP) \
2007 fprintf (FP, ".text\n"); \
2008 bc_seg_write (bc_text_seg, FP); \
2009 fprintf(FP, "\n.data\n"); \
2010 bc_seg_write (bc_data_seg, FP); \
2011 bc_sym_write (FP); /* do .globl, .bss, etc. */ \
2014 /* Write one symbol */
2015 #define BC_WRITE_SEGSYM(SEGSYM, FP) \
2017 prsym (FP, (SEGSYM)->sym->name); \
2018 fprintf (FP, ":\n"); \
2022 /* Write one reloc entry */
2023 #define BC_WRITE_RELOC_ENTRY(SEGRELOC, FP, OFFSET) \
2025 fprintf (FP, "\t.long "); \
2026 prsym (FP, (SEGRELOC)->sym->name); \
2027 fprintf (FP, " + %d\n", OFFSET); \
2030 /* Start new line of bytecodes */
2031 #define BC_START_BYTECODE_LINE(FP) \
2033 fprintf (FP, "\t.byte"); \
2036 /* Write one bytecode */
2037 #define BC_WRITE_BYTECODE(SEP, VAL, FP) \
2039 fprintf (FP, "%c0x%02X", (SEP), (VAL) & 0xff); \
2042 /* Write one bytecode RTL entry */
2043 #define BC_WRITE_RTL(R, FP) \
2045 fprintf (FP, "%s+%d/0x%08X\n", (R)->label, (R)->offset, (R)->bc_label); \
2049 /* Emit function entry trampoline */
2050 #define BC_EMIT_TRAMPOLINE(TRAMPSEG, CALLINFO) \
2054 /* Push a reference to the callinfo structure. */ \
2055 insn = 0x4879; /* pea xxx.L */ \
2056 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
2057 seg_refsym (TRAMPSEG, CALLINFO, 0); \
2059 /* Call __interp, pop arguments, and return. */ \
2060 insn = 0x4eb9; /* jsr xxx.L */ \
2061 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
2062 seg_refsym (TRAMPSEG, "__callint", 0); \
2063 insn = 0x588f; /* addql #4, sp */ \
2064 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
2065 insn = 0x4e75; /* rts */ \
2066 seg_data (TRAMPSEG, (char *) &insn, sizeof insn); \
2072 #define VALIDATE_STACK() if (stack_depth < 0) abort ();
2075 #define VALIDATE_STACK() \
2076 fprintf (stderr, " %%%d%%", stack_depth);
2080 /* Define functions defined in aux-output.c and used in templates. */
2082 extern char *output_move_const_into_data_reg ();
2083 extern char *output_move_simode_const ();
2084 extern char *output_move_double ();
2085 extern char *output_move_const_single ();
2086 extern char *output_move_const_double ();
2087 extern char *output_btst ();
2088 extern char *output_scc_di ();
2090 /* Variables in m68k.c */
2091 extern char *m68k_align_loops_string;
2092 extern char *m68k_align_jumps_string;
2093 extern char *m68k_align_funcs_string;
2094 extern int m68k_align_loops;
2095 extern int m68k_align_jumps;
2096 extern int m68k_align_funcs;
2097 extern int m68k_last_compare_had_fp_operands;
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