1 /* Definitions of target machine for GNU compiler. Sun 68000/68020 version.
2 Copyright (C) 1987, 1988 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Note that some other tm.h files include this one and then override
22 many of the definitions that relate to assembler syntax. */
25 /* Names to predefine in the preprocessor for this target machine. */
27 /* See sun3.h, sun2.h, isi.h for different CPP_PREDEFINES. */
29 /* Print subsidiary information on the compiler version in use. */
31 #define TARGET_VERSION fprintf (stderr, " (68k, Motorola syntax)");
33 #define TARGET_VERSION fprintf (stderr, " (68k, MIT syntax)");
36 /* Define SUPPORT_SUN_FPA to include support for generating code for
37 the Sun Floating Point Accelerator, an optional product for Sun 3
38 machines. By default, it is not defined. Avoid defining it unless
39 you need to output code for the Sun3+FPA architecture, as it has the
40 effect of slowing down the register set operations in hard-reg-set.h
41 (total number of registers will exceed number of bits in a long,
42 if defined, causing the set operations to expand to loops).
43 SUPPORT_SUN_FPA is typically defined in sun3.h. */
45 /* Run-time compilation parameters selecting different hardware subsets. */
47 extern int target_flags;
49 /* Macros used in the machine description to test the flags. */
51 /* Compile for a 68020 (not a 68000 or 68010). */
52 #define TARGET_68020 (target_flags & 1)
54 /* Compile 68881 insns for floating point (not library calls). */
55 #define TARGET_68881 (target_flags & 2)
57 /* Compile using 68020 bitfield insns. */
58 #define TARGET_BITFIELD (target_flags & 4)
60 /* Compile using rtd insn calling sequence.
61 This will not work unless you use prototypes at least
62 for all functions that can take varying numbers of args. */
63 #define TARGET_RTD (target_flags & 8)
65 /* Compile passing first two args in regs 0 and 1.
66 This exists only to test compiler features that will
67 be needed for RISC chips. It is not usable
68 and is not intended to be usable on this cpu. */
69 #define TARGET_REGPARM (target_flags & 020)
71 /* Compile with 16-bit `int'. */
72 #define TARGET_SHORT (target_flags & 040)
74 /* Compile with special insns for Sun FPA. */
75 #ifdef SUPPORT_SUN_FPA
76 #define TARGET_FPA (target_flags & 0100)
81 /* Compile (actually, link) for Sun SKY board. */
82 #define TARGET_SKY (target_flags & 0200)
84 /* Optimize for 68040.
85 The 68040 will execute all 68030 and 68881/2 instructions, but some
86 of them must be emulated in software by the OS. When TARGET_68040 is
87 turned on, these instructions won't be used. This code will still
88 run on a 68030 and 68881/2. */
89 #define TARGET_68040 (target_flags & 0400)
91 /* Support 68040 fp instructions. */
92 #define TARGET_68040_ONLY (target_flags & 01000)
94 /* Macro to define tables used to set the flags.
95 This is a list in braces of pairs in braces,
96 each pair being { "NAME", VALUE }
97 where VALUE is the bits to set or minus the bits to clear.
98 An empty string NAME is used to identify the default VALUE. */
100 #define TARGET_SWITCHES \
107 { "soft-float", -0102}, \
108 { "nobitfield", -4}, \
112 { "noshort", -040}, \
118 { "68030", -01400}, \
120 { "68040-only", 01000}, \
121 { "", TARGET_DEFAULT}}
122 /* TARGET_DEFAULT is defined in sun*.h and isi.h, etc. */
124 #ifdef SUPPORT_SUN_FPA
125 /* Blow away 68881 flag silently on TARGET_FPA (since we can't clear
126 any bits in TARGET_SWITCHES above) */
127 #define OVERRIDE_OPTIONS \
129 if (TARGET_FPA) target_flags &= ~2; \
130 if (! TARGET_68020 && flag_pic == 2) \
131 error("-fPIC is not currently supported on the 68000 or 68010\n"); \
134 #define OVERRIDE_OPTIONS \
136 if (! TARGET_68020 && flag_pic == 2) \
137 error("-fPIC is not currently supported on the 68000 or 68010\n"); \
139 #endif /* defined SUPPORT_SUN_FPA */
141 /* target machine storage layout */
143 /* Define this if most significant bit is lowest numbered
144 in instructions that operate on numbered bit-fields.
145 This is true for 68020 insns such as bfins and bfexts.
146 We make it true always by avoiding using the single-bit insns
147 except in special cases with constant bit numbers. */
148 #define BITS_BIG_ENDIAN 1
150 /* Define this if most significant byte of a word is the lowest numbered. */
151 /* That is true on the 68000. */
152 #define BYTES_BIG_ENDIAN 1
154 /* Define this if most significant word of a multiword number is the lowest
156 /* For 68000 we can decide arbitrarily
157 since there are no machine instructions for them.
158 So let's be consistent. */
159 #define WORDS_BIG_ENDIAN 1
161 /* number of bits in an addressable storage unit */
162 #define BITS_PER_UNIT 8
164 /* Width in bits of a "word", which is the contents of a machine register.
165 Note that this is not necessarily the width of data type `int';
166 if using 16-bit ints on a 68000, this would still be 32.
167 But on a machine with 16-bit registers, this would be 16. */
168 #define BITS_PER_WORD 32
170 /* Width of a word, in units (bytes). */
171 #define UNITS_PER_WORD 4
173 /* Width in bits of a pointer.
174 See also the macro `Pmode' defined below. */
175 #define POINTER_SIZE 32
177 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
178 #define PARM_BOUNDARY (TARGET_SHORT ? 16 : 32)
180 /* Boundary (in *bits*) on which stack pointer should be aligned. */
181 #define STACK_BOUNDARY 16
183 /* Allocation boundary (in *bits*) for the code of a function. */
184 #define FUNCTION_BOUNDARY 16
186 /* Alignment of field after `int : 0' in a structure. */
187 #define EMPTY_FIELD_BOUNDARY 16
189 /* No data type wants to be aligned rounder than this. */
190 #define BIGGEST_ALIGNMENT 16
192 /* Set this nonzero if move instructions will actually fail to work
193 when given unaligned data. */
194 #define STRICT_ALIGNMENT 1
196 #define SELECT_RTX_SECTION(MODE, X) \
199 readonly_data_section(); \
200 else if (LEGITIMATE_PIC_OPERAND_P (X)) \
201 readonly_data_section(); \
206 /* Define number of bits in most basic integer type.
207 (If undefined, default is BITS_PER_WORD). */
209 #define INT_TYPE_SIZE (TARGET_SHORT ? 16 : 32)
211 /* Define these to avoid dependence on meaning of `int'.
212 Note that WCHAR_TYPE_SIZE is used in cexp.y,
213 where TARGET_SHORT is not available. */
215 #define WCHAR_TYPE "long int"
216 #define WCHAR_TYPE_SIZE 32
218 /* Standard register usage. */
220 /* Number of actual hardware registers.
221 The hardware registers are assigned numbers for the compiler
222 from 0 to just below FIRST_PSEUDO_REGISTER.
223 All registers that the compiler knows about must be given numbers,
224 even those that are not normally considered general registers.
225 For the 68000, we give the data registers numbers 0-7,
226 the address registers numbers 010-017,
227 and the 68881 floating point registers numbers 020-027. */
228 #ifndef SUPPORT_SUN_FPA
229 #define FIRST_PSEUDO_REGISTER 24
231 #define FIRST_PSEUDO_REGISTER 56
234 /* This defines the register which is used to hold the offset table for PIC. */
235 #define PIC_OFFSET_TABLE_REGNUM 13
237 /* Used to output a (use pic_offset_table_rtx) so that we
238 always save/restore a5 in functions that use PIC relocation
239 at *any* time during the compilation process. */
240 #define FINALIZE_PIC finalize_pic()
242 #ifndef SUPPORT_SUN_FPA
244 /* 1 for registers that have pervasive standard uses
245 and are not available for the register allocator.
246 On the 68000, only the stack pointer is such. */
248 #define FIXED_REGISTERS \
249 {/* Data registers. */ \
250 0, 0, 0, 0, 0, 0, 0, 0, \
252 /* Address registers. */ \
253 0, 0, 0, 0, 0, 0, 0, 1, \
255 /* Floating point registers \
257 0, 0, 0, 0, 0, 0, 0, 0 }
259 /* 1 for registers not available across function calls.
260 These must include the FIXED_REGISTERS and also any
261 registers that can be used without being saved.
262 The latter must include the registers where values are returned
263 and the register where structure-value addresses are passed.
264 Aside from that, you can include as many other registers as you like. */
265 #define CALL_USED_REGISTERS \
266 {1, 1, 0, 0, 0, 0, 0, 0, \
267 1, 1, 0, 0, 0, 0, 0, 1, \
268 1, 1, 0, 0, 0, 0, 0, 0 }
270 #else /* SUPPORT_SUN_FPA */
272 /* 1 for registers that have pervasive standard uses
273 and are not available for the register allocator.
274 On the 68000, only the stack pointer is such. */
276 /* fpa0 is also reserved so that it can be used to move shit back and
277 forth between high fpa regs and everything else. */
279 #define FIXED_REGISTERS \
280 {/* Data registers. */ \
281 0, 0, 0, 0, 0, 0, 0, 0, \
283 /* Address registers. */ \
284 0, 0, 0, 0, 0, 0, 0, 1, \
286 /* Floating point registers \
288 0, 0, 0, 0, 0, 0, 0, 0, \
290 /* Sun3 FPA registers. */ \
291 1, 0, 0, 0, 0, 0, 0, 0, \
292 0, 0, 0, 0, 0, 0, 0, 0, \
293 0, 0, 0, 0, 0, 0, 0, 0, \
294 0, 0, 0, 0, 0, 0, 0, 0 }
296 /* 1 for registers not available across function calls.
297 These must include the FIXED_REGISTERS and also any
298 registers that can be used without being saved.
299 The latter must include the registers where values are returned
300 and the register where structure-value addresses are passed.
301 Aside from that, you can include as many other registers as you like. */
302 #define CALL_USED_REGISTERS \
303 {1, 1, 0, 0, 0, 0, 0, 0, \
304 1, 1, 0, 0, 0, 0, 0, 1, \
305 1, 1, 0, 0, 0, 0, 0, 0, \
306 /* FPA registers. */ \
307 1, 1, 1, 1, 0, 0, 0, 0, \
308 0, 0, 0, 0, 0, 0, 0, 0, \
309 0, 0, 0, 0, 0, 0, 0, 0, \
310 0, 0, 0, 0, 0, 0, 0, 0 }
312 #endif /* defined SUPPORT_SUN_FPA */
315 /* Make sure everything's fine if we *don't* have a given processor.
316 This assumes that putting a register in fixed_regs will keep the
317 compiler's mitts completely off it. We don't bother to zero it out
318 of register classes. If neither TARGET_FPA or TARGET_68881 is set,
319 the compiler won't touch since no instructions that use these
320 registers will be valid.
322 Reserve PIC_OFFSET_TABLE_REGNUM (a5) for doing PIC relocation if
323 position independent code is being generated by making it a
326 #ifndef SUPPORT_SUN_FPA
328 #define CONDITIONAL_REGISTER_USAGE \
331 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
334 #else /* defined SUPPORT_SUN_FPA */
336 #define CONDITIONAL_REGISTER_USAGE \
342 COPY_HARD_REG_SET (x, reg_class_contents[(int)FPA_REGS]); \
343 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
344 if (TEST_HARD_REG_BIT (x, i)) \
345 fixed_regs[i] = call_used_regs[i] = 1; \
349 COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
350 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
351 if (TEST_HARD_REG_BIT (x, i)) \
352 fixed_regs[i] = call_used_regs[i] = 1; \
355 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
358 #endif /* defined SUPPORT_SUN_FPA */
360 /* Return number of consecutive hard regs needed starting at reg REGNO
361 to hold something of mode MODE.
362 This is ordinarily the length in words of a value of mode MODE
363 but can be less for certain modes in special long registers.
365 On the 68000, ordinary registers hold 32 bits worth;
366 for the 68881 registers, a single register is always enough for
367 anything that can be stored in them at all. */
368 #define HARD_REGNO_NREGS(REGNO, MODE) \
369 ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \
370 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
372 #ifndef SUPPORT_SUN_FPA
374 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
375 On the 68000, the cpu registers can hold any mode but the 68881 registers
376 can hold only SFmode or DFmode. The 68881 registers can't hold anything
377 if 68881 use is disabled. */
379 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
383 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
384 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)))
386 #else /* defined SUPPORT_SUN_FPA */
388 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
389 On the 68000, the cpu registers can hold any mode but the 68881 registers
390 can hold only SFmode or DFmode. And the 68881 registers can't hold anything
391 if 68881 use is disabled. However, the Sun FPA register can
392 (apparently) hold whatever you feel like putting in them.
393 If using the fpa, don't put a double in d7/a0. */
395 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
398 && GET_MODE_CLASS ((MODE)) != MODE_INT \
399 && GET_MODE_UNIT_SIZE ((MODE)) > 4 \
400 && (REGNO) < 8 && (REGNO) + GET_MODE_SIZE ((MODE)) / 4 > 8 \
401 && (REGNO) % (GET_MODE_UNIT_SIZE ((MODE)) / 4) != 0)) \
403 ? TARGET_68881 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
404 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
405 : ((REGNO) < 56 ? TARGET_FPA : 0)))
407 #endif /* defined SUPPORT_SUN_FPA */
409 /* Value is 1 if it is a good idea to tie two pseudo registers
410 when one has mode MODE1 and one has mode MODE2.
411 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
412 for any hard reg, then this must be 0 for correct output. */
413 #define MODES_TIEABLE_P(MODE1, MODE2) \
415 || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
416 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
417 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
418 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)))
420 /* Specify the registers used for certain standard purposes.
421 The values of these macros are register numbers. */
423 /* m68000 pc isn't overloaded on a register. */
424 /* #define PC_REGNUM */
426 /* Register to use for pushing function arguments. */
427 #define STACK_POINTER_REGNUM 15
429 /* Base register for access to local variables of the function. */
430 #define FRAME_POINTER_REGNUM 14
432 /* Value should be nonzero if functions must have frame pointers.
433 Zero means the frame pointer need not be set up (and parms
434 may be accessed via the stack pointer) in functions that seem suitable.
435 This is computed in `reload', in reload1.c. */
436 #define FRAME_POINTER_REQUIRED 0
438 /* Base register for access to arguments of the function. */
439 #define ARG_POINTER_REGNUM 14
441 /* Register in which static-chain is passed to a function. */
442 #define STATIC_CHAIN_REGNUM 8
444 /* Register in which address to store a structure value
445 is passed to a function. */
446 #define STRUCT_VALUE_REGNUM 9
448 /* Define the classes of registers for register constraints in the
449 machine description. Also define ranges of constants.
451 One of the classes must always be named ALL_REGS and include all hard regs.
452 If there is more than one class, another class must be named NO_REGS
453 and contain no registers.
455 The name GENERAL_REGS must be the name of a class (or an alias for
456 another name such as ALL_REGS). This is the class of registers
457 that is allowed by "g" or "r" in a register constraint.
458 Also, registers outside this class are allocated only when
459 instructions express preferences for them.
461 The classes must be numbered in nondecreasing order; that is,
462 a larger-numbered class must never be contained completely
463 in a smaller-numbered class.
465 For any two classes, it is very desirable that there be another
466 class that represents their union. */
468 /* The 68000 has three kinds of registers, so eight classes would be
469 a complete set. One of them is not needed. */
471 #ifndef SUPPORT_SUN_FPA
476 GENERAL_REGS, DATA_OR_FP_REGS,
477 ADDR_OR_FP_REGS, ALL_REGS,
480 #define N_REG_CLASSES (int) LIM_REG_CLASSES
482 /* Give names of register classes as strings for dump file. */
484 #define REG_CLASS_NAMES \
485 { "NO_REGS", "DATA_REGS", \
486 "ADDR_REGS", "FP_REGS", \
487 "GENERAL_REGS", "DATA_OR_FP_REGS", \
488 "ADDR_OR_FP_REGS", "ALL_REGS" }
490 /* Define which registers fit in which classes.
491 This is an initializer for a vector of HARD_REG_SET
492 of length N_REG_CLASSES. */
494 #define REG_CLASS_CONTENTS \
496 0x00000000, /* NO_REGS */ \
497 0x000000ff, /* DATA_REGS */ \
498 0x0000ff00, /* ADDR_REGS */ \
499 0x00ff0000, /* FP_REGS */ \
500 0x0000ffff, /* GENERAL_REGS */ \
501 0x00ff00ff, /* DATA_OR_FP_REGS */ \
502 0x00ffff00, /* ADDR_OR_FP_REGS */ \
503 0x00ffffff, /* ALL_REGS */ \
506 /* The same information, inverted:
507 Return the class number of the smallest class containing
508 reg number REGNO. This could be a conditional expression
509 or could index an array. */
511 #define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1)
513 #else /* defined SUPPORT_SUN_FPA */
516 * Notes on final choices:
518 * 1) Didn't feel any need to union-ize LOW_FPA_REGS with anything
520 * 2) Removed all unions that involve address registers with
521 * floating point registers (left in unions of address and data with
523 * 3) Defined GENERAL_REGS as ADDR_OR_DATA_REGS.
524 * 4) Defined ALL_REGS as FPA_OR_FP_OR_GENERAL_REGS.
525 * 4) Left in everything else.
527 enum reg_class { NO_REGS, LO_FPA_REGS, FPA_REGS, FP_REGS,
528 FP_OR_FPA_REGS, DATA_REGS, DATA_OR_FPA_REGS, DATA_OR_FP_REGS,
529 DATA_OR_FP_OR_FPA_REGS, ADDR_REGS, GENERAL_REGS,
530 GENERAL_OR_FPA_REGS, GENERAL_OR_FP_REGS, ALL_REGS,
533 #define N_REG_CLASSES (int) LIM_REG_CLASSES
535 /* Give names of register classes as strings for dump file. */
537 #define REG_CLASS_NAMES \
538 { "NO_REGS", "LO_FPA_REGS", "FPA_REGS", "FP_REGS", \
539 "FP_OR_FPA_REGS", "DATA_REGS", "DATA_OR_FPA_REGS", "DATA_OR_FP_REGS", \
540 "DATA_OR_FP_OR_FPA_REGS", "ADDR_REGS", "GENERAL_REGS", \
541 "GENERAL_OR_FPA_REGS", "GENERAL_OR_FP_REGS", "ALL_REGS" }
543 /* Define which registers fit in which classes.
544 This is an initializer for a vector of HARD_REG_SET
545 of length N_REG_CLASSES. */
547 #define REG_CLASS_CONTENTS \
549 {0, 0}, /* NO_REGS */ \
550 {0xff000000, 0x000000ff}, /* LO_FPA_REGS */ \
551 {0xff000000, 0x00ffffff}, /* FPA_REGS */ \
552 {0x00ff0000, 0x00000000}, /* FP_REGS */ \
553 {0xffff0000, 0x00ffffff}, /* FP_OR_FPA_REGS */ \
554 {0x000000ff, 0x00000000}, /* DATA_REGS */ \
555 {0xff0000ff, 0x00ffffff}, /* DATA_OR_FPA_REGS */ \
556 {0x00ff00ff, 0x00000000}, /* DATA_OR_FP_REGS */ \
557 {0xffff00ff, 0x00ffffff}, /* DATA_OR_FP_OR_FPA_REGS */\
558 {0x0000ff00, 0x00000000}, /* ADDR_REGS */ \
559 {0x0000ffff, 0x00000000}, /* GENERAL_REGS */ \
560 {0xff00ffff, 0x00ffffff}, /* GENERAL_OR_FPA_REGS */\
561 {0x00ffffff, 0x00000000}, /* GENERAL_OR_FP_REGS */\
562 {0xffffffff, 0x00ffffff}, /* ALL_REGS */ \
565 /* The same information, inverted:
566 Return the class number of the smallest class containing
567 reg number REGNO. This could be a conditional expression
568 or could index an array. */
570 extern enum reg_class regno_reg_class[];
571 #define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)>>3])
573 #endif /* SUPPORT_SUN_FPA */
575 /* The class value for index registers, and the one for base regs. */
577 #define INDEX_REG_CLASS GENERAL_REGS
578 #define BASE_REG_CLASS ADDR_REGS
580 /* Get reg_class from a letter such as appears in the machine description.
581 We do a trick here to modify the effective constraints on the
582 machine description; we zorch the constraint letters that aren't
583 appropriate for a specific target. This allows us to guarantee
584 that a specific kind of register will not be used for a given target
585 without fiddling with the register classes above. */
587 #ifndef SUPPORT_SUN_FPA
589 #define REG_CLASS_FROM_LETTER(C) \
590 ((C) == 'a' ? ADDR_REGS : \
591 ((C) == 'd' ? DATA_REGS : \
592 ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
596 #else /* defined SUPPORT_SUN_FPA */
598 #define REG_CLASS_FROM_LETTER(C) \
599 ((C) == 'a' ? ADDR_REGS : \
600 ((C) == 'd' ? DATA_REGS : \
601 ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \
603 ((C) == 'x' ? (TARGET_FPA ? FPA_REGS : \
605 ((C) == 'y' ? (TARGET_FPA ? LO_FPA_REGS : \
609 #endif /* defined SUPPORT_SUN_FPA */
611 /* The letters I, J, K, L and M in a register constraint string
612 can be used to stand for particular ranges of immediate operands.
613 This macro defines what the ranges are.
614 C is the letter, and VALUE is a constant value.
615 Return 1 if VALUE is in the range specified by C.
617 For the 68000, `I' is used for the range 1 to 8
618 allowed as immediate shift counts and in addq.
619 `J' is used for the range of signed numbers that fit in 16 bits.
620 `K' is for numbers that moveq can't handle.
621 `L' is for range -8 to -1, range of values that can be added with subq. */
623 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
624 ((C) == 'I' ? (VALUE) > 0 && (VALUE) <= 8 : \
625 (C) == 'J' ? (VALUE) >= -0x8000 && (VALUE) <= 0x7FFF : \
626 (C) == 'K' ? (VALUE) < -0x80 || (VALUE) >= 0x80 : \
627 (C) == 'L' ? (VALUE) < 0 && (VALUE) >= -8 : 0)
630 * A small bit of explanation:
631 * "G" defines all of the floating constants that are *NOT* 68881
632 * constants. this is so 68881 constants get reloaded and the
633 * fpmovecr is used. "H" defines *only* the class of constants that
634 * the fpa can use, because these can be gotten at in any fpa
635 * instruction and there is no need to force reloads.
637 #ifndef SUPPORT_SUN_FPA
638 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
639 ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : 0 )
640 #else /* defined SUPPORT_SUN_FPA */
641 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
642 ((C) == 'G' ? ! (TARGET_68881 && standard_68881_constant_p (VALUE)) : \
643 (C) == 'H' ? (TARGET_FPA && standard_sun_fpa_constant_p (VALUE)) : 0)
644 #endif /* defined SUPPORT_SUN_FPA */
646 /* Given an rtx X being reloaded into a reg required to be
647 in class CLASS, return the class of reg to actually use.
648 In general this is just CLASS; but on some machines
649 in some cases it is preferable to use a more restrictive class.
650 On the 68000 series, use a data reg if possible when the
651 value is a constant in the range where moveq could be used
652 and we ensure that QImodes are reloaded into data regs.
653 Also, if a floating constant needs reloading, put it in memory
656 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
657 ((GET_CODE (X) == CONST_INT \
658 && (unsigned) (INTVAL (X) + 0x80) < 0x100 \
659 && (CLASS) != ADDR_REGS) \
661 : (GET_MODE (X) == QImode && (CLASS) != ADDR_REGS) \
663 : (GET_CODE (X) == CONST_DOUBLE \
664 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
668 /* Return the maximum number of consecutive registers
669 needed to represent mode MODE in a register of class CLASS. */
670 /* On the 68000, this is the size of MODE in words,
671 except in the FP regs, where a single reg is always enough. */
672 #ifndef SUPPORT_SUN_FPA
674 #define CLASS_MAX_NREGS(CLASS, MODE) \
675 ((CLASS) == FP_REGS ? 1 \
676 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
678 /* Moves between fp regs and other regs are two insns. */
679 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
680 (((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
681 || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
684 #else /* defined SUPPORT_SUN_FPA */
686 #define CLASS_MAX_NREGS(CLASS, MODE) \
687 ((CLASS) == FP_REGS || (CLASS) == FPA_REGS || (CLASS) == LO_FPA_REGS ? 1 \
688 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
690 /* Moves between fp regs and other regs are two insns. */
691 /* Likewise for high fpa regs and other regs. */
692 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
693 ((((CLASS1) == FP_REGS && (CLASS2) != FP_REGS) \
694 || ((CLASS2) == FP_REGS && (CLASS1) != FP_REGS) \
695 || ((CLASS1) == FPA_REGS && (CLASS2) != FPA_REGS) \
696 || ((CLASS2) == FPA_REGS && (CLASS1) != FPA_REGS)) \
699 #endif /* define SUPPORT_SUN_FPA */
701 /* Stack layout; function entry, exit and calling. */
703 /* Define this if pushing a word on the stack
704 makes the stack pointer a smaller address. */
705 #define STACK_GROWS_DOWNWARD
707 /* Nonzero if we need to generate stack-probe insns.
708 On most systems they are not needed.
709 When they are needed, define this as the stack offset to probe at. */
712 /* Define this if the nominal address of the stack frame
713 is at the high-address end of the local variables;
714 that is, each additional local variable allocated
715 goes at a more negative offset in the frame. */
716 #define FRAME_GROWS_DOWNWARD
718 /* Offset within stack frame to start allocating local variables at.
719 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
720 first local allocated. Otherwise, it is the offset to the BEGINNING
721 of the first local allocated. */
722 #define STARTING_FRAME_OFFSET 0
724 /* If we generate an insn to push BYTES bytes,
725 this says how many the stack pointer really advances by.
726 On the 68000, sp@- in a byte insn really pushes a word. */
727 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
729 /* Offset of first parameter from the argument pointer register value. */
730 #define FIRST_PARM_OFFSET(FNDECL) 8
732 /* Value is the number of byte of arguments automatically
733 popped when returning from a subroutine call.
734 FUNTYPE is the data type of the function (as a tree),
735 or for a library call it is an identifier node for the subroutine name.
736 SIZE is the number of bytes of arguments passed on the stack.
738 On the 68000, the RTS insn cannot pop anything.
739 On the 68010, the RTD insn may be used to pop them if the number
740 of args is fixed, but if the number is variable then the caller
741 must pop them all. RTD can't be used for library calls now
742 because the library is compiled with the Unix compiler.
743 Use of RTD is a selectable option, since it is incompatible with
744 standard Unix calling sequences. If the option is not selected,
745 the caller must always pop the args. */
747 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
748 ((TARGET_RTD && TREE_CODE (FUNTYPE) != IDENTIFIER_NODE \
749 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
750 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
751 == void_type_node))) \
754 /* Define how to find the value returned by a function.
755 VALTYPE is the data type of the value (as a tree).
756 If the precise function being called is known, FUNC is its FUNCTION_DECL;
757 otherwise, FUNC is 0. */
759 /* On the 68000 the return value is in D0 regardless. */
761 #define FUNCTION_VALUE(VALTYPE, FUNC) \
762 gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
764 /* Define how to find the value returned by a library function
765 assuming the value has mode MODE. */
767 /* On the 68000 the return value is in D0 regardless. */
769 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
771 /* 1 if N is a possible register number for a function value.
772 On the 68000, d0 is the only register thus used. */
774 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
776 /* Define this if PCC uses the nonreentrant convention for returning
777 structure and union values. */
779 #define PCC_STATIC_STRUCT_RETURN
781 /* 1 if N is a possible register number for function argument passing.
782 On the 68000, no registers are used in this way. */
784 #define FUNCTION_ARG_REGNO_P(N) 0
786 /* Define a data type for recording info about an argument list
787 during the scan of that argument list. This data type should
788 hold all necessary information about the function itself
789 and about the args processed so far, enough to enable macros
790 such as FUNCTION_ARG to determine where the next arg should go.
792 On the m68k, this is a single integer, which is a number of bytes
793 of arguments scanned so far. */
795 #define CUMULATIVE_ARGS int
797 /* Initialize a variable CUM of type CUMULATIVE_ARGS
798 for a call to a function whose data type is FNTYPE.
799 For a library call, FNTYPE is 0.
801 On the m68k, the offset starts at 0. */
803 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
806 /* Update the data in CUM to advance over an argument
807 of mode MODE and data type TYPE.
808 (TYPE is null for libcalls where that information may not be available.) */
810 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
811 ((CUM) += ((MODE) != BLKmode \
812 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
813 : (int_size_in_bytes (TYPE) + 3) & ~3))
815 /* Define where to put the arguments to a function.
816 Value is zero to push the argument on the stack,
817 or a hard register in which to store the argument.
819 MODE is the argument's machine mode.
820 TYPE is the data type of the argument (as a tree).
821 This is null for libcalls where that information may
823 CUM is a variable of type CUMULATIVE_ARGS which gives info about
824 the preceding args and about the function being called.
825 NAMED is nonzero if this argument is a named parameter
826 (otherwise it is an extra parameter matching an ellipsis). */
828 /* On the 68000 all args are pushed, except if -mregparm is specified
829 then the first two words of arguments are passed in d0, d1.
830 *NOTE* -mregparm does not work.
831 It exists only to test register calling conventions. */
833 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
834 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
836 /* For an arg passed partly in registers and partly in memory,
837 this is the number of registers used.
838 For args passed entirely in registers or entirely in memory, zero. */
840 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
841 ((TARGET_REGPARM && (CUM) < 8 \
842 && 8 < ((CUM) + ((MODE) == BLKmode \
843 ? int_size_in_bytes (TYPE) \
844 : GET_MODE_SIZE (MODE)))) \
847 /* Generate the assembly code for function entry. */
848 #define FUNCTION_PROLOGUE(FILE, SIZE) output_function_prologue(FILE, SIZE)
850 /* Output assembler code to FILE to increment profiler label # LABELNO
851 for profiling a function entry. */
853 #define FUNCTION_PROFILER(FILE, LABELNO) \
854 asm_fprintf (FILE, "\tlea %LLP%d,%Ra0\n\tjsr mcount\n", (LABELNO))
856 /* Output assembler code to FILE to initialize this source file's
857 basic block profiling info, if that has not already been done. */
859 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
860 asm_fprintf (FILE, "\ttstl %LLPBX0\n\tbne %LLPI%d\n\tpea %LLPBX0\n\tjsr %U__bb_init_func\n\taddql %I4,%Rsp\n%LLPI%d:\n", \
863 /* Output assembler code to FILE to increment the entry-count for
864 the BLOCKNO'th basic block in this source file. */
866 #define BLOCK_PROFILER(FILE, BLOCKNO) \
867 asm_fprintf (FILE, "\taddql %I1,%LLPBX2+%d\n", 4 * BLOCKNO)
869 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
870 the stack pointer does not matter. The value is tested only in
871 functions that have frame pointers.
872 No definition is equivalent to always zero. */
874 #define EXIT_IGNORE_STACK 1
876 /* Generate the assembly code for function exit. */
877 #define FUNCTION_EPILOGUE(FILE, SIZE) output_function_epilogue (FILE, SIZE)
879 /* This is a hook for other tm files to change. */
880 /* #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) */
882 /* Determine if the epilogue should be output as RTL.
883 You should override this if you define FUNCTION_EXTRA_EPILOGUE. */
884 #define USE_RETURN_INSN use_return_insn ()
886 /* Store in the variable DEPTH the initial difference between the
887 frame pointer reg contents and the stack pointer reg contents,
888 as of the start of the function body. This depends on the layout
889 of the fixed parts of the stack frame and on how registers are saved.
891 On the 68k, if we have a frame, we must add one word to its length
892 to allow for the place that a6 is stored when we do have a frame pointer.
893 Otherwise, we would need to compute the offset from the frame pointer
894 of a local variable as a function of frame_pointer_needed, which
897 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
900 for (regno = 16; regno < FIRST_PSEUDO_REGISTER; regno++) \
901 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
903 for (regno = 0; regno < 16; regno++) \
904 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
906 (DEPTH) = (offset + ((get_frame_size () + 3) & -4) \
907 + (get_frame_size () == 0 ? 0 : 4)); \
910 /* Output assembler code for a block containing the constant parts
911 of a trampoline, leaving space for the variable parts. */
913 /* On the 68k, the trampoline looks like this:
919 The reason for having three jsr insns is so that an entire line
920 of the instruction cache is filled in a predictable way
921 that will always be the same.
923 We always use the assembler label ___trampoline
924 regardless of whether the system adds underscores. */
926 #define TRAMPOLINE_TEMPLATE(FILE) \
928 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x207c)); \
929 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
930 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
931 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \
932 ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\
933 ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4eb9)); \
934 ASM_OUTPUT_INT (FILE, gen_rtx (SYMBOL_REF, SImode, "*___trampoline"));\
935 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
936 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
937 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
938 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
941 /* Length in units of the trampoline for entering a nested function. */
943 #define TRAMPOLINE_SIZE 26
945 /* Alignment required for a trampoline. 16 is used to find the
946 beginning of a line in the instruction cache. */
948 #define TRAMPOLINE_ALIGN 16
950 /* Emit RTL insns to initialize the variable parts of a trampoline.
951 FNADDR is an RTX for the address of the function's pure code.
952 CXT is an RTX for the static chain value for the function. */
954 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
956 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), TRAMP); \
957 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 18)), CXT); \
958 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 22)), FNADDR); \
961 /* This is the library routine that is used
962 to transfer control from the trampoline
963 to the actual nested function. */
965 /* A colon is used with no explicit operands
966 to cause the template string to be scanned for %-constructs. */
967 /* The function name __transfer_from_trampoline is not actually used.
968 The function definition just permits use of "asm with operands"
969 (though the operand list is empty). */
970 #define TRANSFER_FROM_TRAMPOLINE \
972 __transfer_from_trampoline () \
974 register char *a0 asm ("%a0"); \
975 asm (GLOBAL_ASM_OP " ___trampoline"); \
976 asm ("___trampoline:"); \
977 asm volatile ("move%.l %0,%@" : : "m" (a0[22])); \
978 asm volatile ("move%.l %1,%0" : "=a" (a0) : "m" (a0[18])); \
982 /* Addressing modes, and classification of registers for them. */
984 #define HAVE_POST_INCREMENT
985 /* #define HAVE_POST_DECREMENT */
987 #define HAVE_PRE_DECREMENT
988 /* #define HAVE_PRE_INCREMENT */
990 /* Macros to check register numbers against specific register classes. */
992 /* These assume that REGNO is a hard or pseudo reg number.
993 They give nonzero only if REGNO is a hard reg of the suitable class
994 or a pseudo reg currently allocated to a suitable hard reg.
995 Since they use reg_renumber, they are safe only once reg_renumber
996 has been allocated, which happens in local-alloc.c. */
998 #define REGNO_OK_FOR_INDEX_P(REGNO) \
999 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
1000 #define REGNO_OK_FOR_BASE_P(REGNO) \
1001 (((REGNO) ^ 010) < 8 || (unsigned) (reg_renumber[REGNO] ^ 010) < 8)
1002 #define REGNO_OK_FOR_DATA_P(REGNO) \
1003 ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
1004 #define REGNO_OK_FOR_FP_P(REGNO) \
1005 (((REGNO) ^ 020) < 8 || (unsigned) (reg_renumber[REGNO] ^ 020) < 8)
1006 #ifdef SUPPORT_SUN_FPA
1007 #define REGNO_OK_FOR_FPA_P(REGNO) \
1008 (((REGNO) >= 24 && (REGNO) < 56) || (reg_renumber[REGNO] >= 24 && reg_renumber[REGNO] < 56))
1011 /* Now macros that check whether X is a register and also,
1012 strictly, whether it is in a specified class.
1014 These macros are specific to the 68000, and may be used only
1015 in code for printing assembler insns and in conditions for
1016 define_optimization. */
1018 /* 1 if X is a data register. */
1020 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
1022 /* 1 if X is an fp register. */
1024 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1026 /* 1 if X is an address register */
1028 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
1030 #ifdef SUPPORT_SUN_FPA
1031 /* 1 if X is a register in the Sun FPA. */
1032 #define FPA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FPA_P (REGNO (X)))
1034 /* Answer must be no if we don't have an FPA. */
1035 #define FPA_REG_P(X) 0
1038 /* Maximum number of registers that can appear in a valid memory address. */
1040 #define MAX_REGS_PER_ADDRESS 2
1042 /* Recognize any constant value that is a valid address. */
1044 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
1046 /* Nonzero if the constant value X is a legitimate general operand.
1047 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1049 #define LEGITIMATE_CONSTANT_P(X) 1
1051 /* Nonzero if the constant value X is a legitimate general operand
1052 when generating PIC code. It is given that flag_pic is on and
1053 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1055 #define LEGITIMATE_PIC_OPERAND_P(X) \
1056 (! symbolic_operand (X, VOIDmode))
1058 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1059 and check its validity for a certain class.
1060 We have two alternate definitions for each of them.
1061 The usual definition accepts all pseudo regs; the other rejects
1062 them unless they have been allocated suitable hard regs.
1063 The symbol REG_OK_STRICT causes the latter definition to be used.
1065 Most source files want to accept pseudo regs in the hope that
1066 they will get allocated to the class that the insn wants them to be in.
1067 Source files for reload pass need to be strict.
1068 After reload, it makes no difference, since pseudo regs have
1069 been eliminated by then. */
1071 #ifndef REG_OK_STRICT
1073 /* Nonzero if X is a hard reg that can be used as an index
1074 or if it is a pseudo reg. */
1075 #define REG_OK_FOR_INDEX_P(X) ((REGNO (X) ^ 020) >= 8)
1076 /* Nonzero if X is a hard reg that can be used as a base reg
1077 or if it is a pseudo reg. */
1078 #define REG_OK_FOR_BASE_P(X) ((REGNO (X) & ~027) != 0)
1082 /* Nonzero if X is a hard reg that can be used as an index. */
1083 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1084 /* Nonzero if X is a hard reg that can be used as a base reg. */
1085 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1089 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1090 that is a valid memory address for an instruction.
1091 The MODE argument is the machine mode for the MEM expression
1092 that wants to use this address.
1094 When generating PIC, an address involving a SYMBOL_REF is legitimate
1095 if and only if it is the sum of pic_offset_table_rtx and the SYMBOL_REF.
1096 We use LEGITIMATE_PIC_OPERAND_P to throw out the illegitimate addresses,
1097 and we explicitly check for the sum of pic_offset_table_rtx and a SYMBOL_REF.
1099 Likewise for a LABEL_REF when generating PIC.
1101 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
1103 #define INDIRECTABLE_1_ADDRESS_P(X) \
1104 ((CONSTANT_ADDRESS_P (X) && (!flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
1105 || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1106 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \
1107 && REG_P (XEXP (X, 0)) \
1108 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1109 || (GET_CODE (X) == PLUS \
1110 && REG_P (XEXP (X, 0)) && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1111 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1112 && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000) \
1113 || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1114 && flag_pic && GET_CODE (XEXP (X, 1)) == SYMBOL_REF) \
1115 || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \
1116 && flag_pic && GET_CODE (XEXP (X, 1)) == LABEL_REF)) \
1119 /* This should replace the last two (non-pic) lines
1120 except that Sun's assembler does not seem to handle such operands. */
1121 && (TARGET_68020 ? CONSTANT_ADDRESS_P (XEXP (X, 1)) \
1122 : (GET_CODE (XEXP (X, 1)) == CONST_INT \
1123 && ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000))))
1127 #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
1128 { if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; }
1130 #define GO_IF_INDEXABLE_BASE(X, ADDR) \
1131 { if (GET_CODE (X) == LABEL_REF) goto ADDR; \
1132 if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; }
1134 #define GO_IF_INDEXING(X, ADDR) \
1135 { if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
1136 { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
1137 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
1138 { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
1140 #define GO_IF_INDEXED_ADDRESS(X, ADDR) \
1141 { GO_IF_INDEXING (X, ADDR); \
1142 if (GET_CODE (X) == PLUS) \
1143 { if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1144 && (unsigned) INTVAL (XEXP (X, 1)) + 0x80 < 0x100) \
1145 { rtx go_temp = XEXP (X, 0); GO_IF_INDEXING (go_temp, ADDR); } \
1146 if (GET_CODE (XEXP (X, 0)) == CONST_INT \
1147 && (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100) \
1148 { rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
1150 #define LEGITIMATE_INDEX_REG_P(X) \
1151 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1152 || (GET_CODE (X) == SIGN_EXTEND \
1153 && GET_CODE (XEXP (X, 0)) == REG \
1154 && GET_MODE (XEXP (X, 0)) == HImode \
1155 && REG_OK_FOR_INDEX_P (XEXP (X, 0))))
1157 #define LEGITIMATE_INDEX_P(X) \
1158 (LEGITIMATE_INDEX_REG_P (X) \
1159 || (TARGET_68020 && GET_CODE (X) == MULT \
1160 && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
1161 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1162 && (INTVAL (XEXP (X, 1)) == 2 \
1163 || INTVAL (XEXP (X, 1)) == 4 \
1164 || INTVAL (XEXP (X, 1)) == 8)))
1166 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1167 { GO_IF_NONINDEXED_ADDRESS (X, ADDR); \
1168 GO_IF_INDEXED_ADDRESS (X, ADDR); }
1170 /* Try machine-dependent ways of modifying an illegitimate address
1171 to be legitimate. If we find one, return the new, valid address.
1172 This macro is used in only one place: `memory_address' in explow.c.
1174 OLDX is the address as it was before break_out_memory_refs was called.
1175 In some cases it is useful to look at this to decide what needs to be done.
1177 MODE and WIN are passed so that this macro can use
1178 GO_IF_LEGITIMATE_ADDRESS.
1180 It is always safe for this macro to do nothing. It exists to recognize
1181 opportunities to optimize the output.
1183 For the 68000, we handle X+REG by loading X into a register R and
1184 using R+REG. R will go in an address reg and indexing will be used.
1185 However, if REG is a broken-out memory address or multiplication,
1186 nothing needs to be done because REG can certainly go in an address reg. */
1188 #define COPY_ONCE(Y) if (!copied) { Y = copy_rtx (Y); copied = ch = 1; }
1189 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1190 { register int ch = (X) != (OLDX); \
1191 if (GET_CODE (X) == PLUS) \
1193 if (GET_CODE (XEXP (X, 0)) == MULT) \
1194 { COPY_ONCE (X); XEXP (X, 0) = force_operand (XEXP (X, 0), 0);} \
1195 if (GET_CODE (XEXP (X, 1)) == MULT) \
1196 { COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \
1197 if (ch && GET_CODE (XEXP (X, 1)) == REG \
1198 && GET_CODE (XEXP (X, 0)) == REG) \
1200 if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1201 if (GET_CODE (XEXP (X, 0)) == REG \
1202 || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \
1203 && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
1204 && GET_MODE (XEXP (XEXP (X, 0), 0)) == HImode)) \
1205 { register rtx temp = gen_reg_rtx (Pmode); \
1206 register rtx val = force_operand (XEXP (X, 1), 0); \
1207 emit_move_insn (temp, val); \
1209 XEXP (X, 1) = temp; \
1211 else if (GET_CODE (XEXP (X, 1)) == REG \
1212 || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \
1213 && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1214 && GET_MODE (XEXP (XEXP (X, 1), 0)) == HImode)) \
1215 { register rtx temp = gen_reg_rtx (Pmode); \
1216 register rtx val = force_operand (XEXP (X, 0), 0); \
1217 emit_move_insn (temp, val); \
1219 XEXP (X, 0) = temp; \
1222 /* Go to LABEL if ADDR (a legitimate address expression)
1223 has an effect that depends on the machine mode it is used for.
1224 On the 68000, only predecrement and postincrement address depend thus
1225 (the amount of decrement or increment being the length of the operand). */
1227 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1228 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL
1230 /* Specify the machine mode that this machine uses
1231 for the index in the tablejump instruction. */
1232 #define CASE_VECTOR_MODE HImode
1234 /* Define this if the tablejump instruction expects the table
1235 to contain offsets from the address of the table.
1236 Do not define this if the table should contain absolute addresses. */
1237 #define CASE_VECTOR_PC_RELATIVE
1239 /* Specify the tree operation to be used to convert reals to integers. */
1240 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1242 /* This is the kind of divide that is easiest to do in the general case. */
1243 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1245 /* Define this as 1 if `char' should by default be signed; else as 0. */
1246 #define DEFAULT_SIGNED_CHAR 1
1248 /* Don't cse the address of the function being compiled. */
1249 #define NO_RECURSIVE_FUNCTION_CSE
1251 /* Max number of bytes we can move from memory to memory
1252 in one reasonably fast instruction. */
1255 /* Define this if zero-extension is slow (more than one real instruction). */
1256 #define SLOW_ZERO_EXTEND
1258 /* Nonzero if access to memory by bytes is slow and undesirable. */
1259 #define SLOW_BYTE_ACCESS 0
1261 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1262 is done just by pretending it is already truncated. */
1263 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1265 /* We assume that the store-condition-codes instructions store 0 for false
1266 and some other value for true. This is the value stored for true. */
1268 #define STORE_FLAG_VALUE -1
1270 /* When a prototype says `char' or `short', really pass an `int'. */
1271 #define PROMOTE_PROTOTYPES
1273 /* Specify the machine mode that pointers have.
1274 After generation of rtl, the compiler makes no further distinction
1275 between pointers and any other objects of this machine mode. */
1276 #define Pmode SImode
1278 /* A function address in a call instruction
1279 is a byte address (for indexing purposes)
1280 so give the MEM rtx a byte's mode. */
1281 #define FUNCTION_MODE QImode
1283 /* Compute the cost of computing a constant rtl expression RTX
1284 whose rtx-code is CODE. The body of this macro is a portion
1285 of a switch statement. If the code is computed here,
1286 return it with a return statement. Otherwise, break from the switch. */
1288 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1290 /* Constant zero is super cheap due to clr instruction. */ \
1291 if (RTX == const0_rtx) return 0; \
1292 /* Constants between -128 and 127 are cheap due to moveq */ \
1293 if (INTVAL (RTX) >= -128 && INTVAL (RTX) <= 127) return 1; \
1294 /* Constants between -136 and 254 are easily generated */ \
1295 /* by intelligent uses of moveq, add[q], and subq */ \
1296 if ((OUTER_CODE) == SET && INTVAL (RTX) >= -136 \
1297 && INTVAL (RTX) <= 254) return 2; \
1302 case CONST_DOUBLE: \
1305 /* Compute the cost of various arithmetic operations.
1306 These are vaguely right for a 68020. */
1307 /* The costs for long multiply have been adjusted to
1308 work properly in synth_mult on the 68020,
1309 relative to an average of the time for add and the time for shift,
1310 taking away a little more because sometimes move insns are needed. */
1311 #define MULL_COST (TARGET_68040 ? 5 : 13)
1312 #define MULW_COST (TARGET_68040 ? 3 : 8)
1314 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1316 /* An lea costs about three times as much as a simple add. */ \
1317 if (GET_MODE (X) == SImode \
1318 && GET_CODE (XEXP (X, 0)) == REG \
1319 && GET_CODE (XEXP (X, 1)) == MULT \
1320 && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \
1321 && GET_CODE (XEXP (XEXP (X, 1), 1)) == CONST_INT \
1322 && (INTVAL (XEXP (XEXP (X, 1), 1)) == 2 \
1323 || INTVAL (XEXP (XEXP (X, 1), 1)) == 4 \
1324 || INTVAL (XEXP (XEXP (X, 1), 1)) == 8)) \
1325 return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \
1331 /* A shift by a big integer takes an extra instruction. */ \
1332 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1333 && (INTVAL (XEXP (X, 1)) == 16)) \
1334 return COSTS_N_INSNS (2); /* clrw;swap */ \
1335 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1336 && !(INTVAL (XEXP (X, 1)) > 0 \
1337 && INTVAL (XEXP (X, 1)) <= 8)) \
1338 return COSTS_N_INSNS (3); /* lsr #i,dn */ \
1341 if (GET_CODE (XEXP (x, 1)) == CONST_INT \
1342 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0) \
1344 /* A shift by a big integer takes an extra instruction. */ \
1345 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1346 && (INTVAL (XEXP (X, 1)) == (1 << 16))) \
1347 return COSTS_N_INSNS (2); /* clrw;swap */ \
1348 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1349 && !(INTVAL (XEXP (X, 1)) > 1 \
1350 && INTVAL (XEXP (X, 1)) <= 256)) \
1351 return COSTS_N_INSNS (3); /* lsr #i,dn */ \
1354 else if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1355 return COSTS_N_INSNS (MULW_COST); \
1357 return COSTS_N_INSNS (MULL_COST); \
1363 if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \
1364 return COSTS_N_INSNS (27); /* div.w */ \
1365 return COSTS_N_INSNS (43); /* div.l */
1367 /* Tell final.c how to eliminate redundant test instructions. */
1369 /* Here we define machine-dependent flags and fields in cc_status
1370 (see `conditions.h'). */
1372 /* Set if the cc value is actually in the 68881, so a floating point
1373 conditional branch must be output. */
1374 #define CC_IN_68881 04000
1376 /* Store in cc_status the expressions that the condition codes will
1377 describe after execution of an instruction whose pattern is EXP.
1378 Do not alter them if the instruction would not alter the cc's. */
1380 /* On the 68000, all the insns to store in an address register fail to
1381 set the cc's. However, in some cases these instructions can make it
1382 possibly invalid to use the saved cc's. In those cases we clear out
1383 some or all of the saved cc's so they won't be used. */
1385 #define NOTICE_UPDATE_CC(EXP,INSN) notice_update_cc (EXP, INSN)
1387 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1388 { if (cc_prev_status.flags & CC_IN_68881) \
1390 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1394 /* Control the assembler format that we output. */
1396 /* Output at beginning of assembler file. */
1398 #define ASM_FILE_START(FILE) \
1399 fprintf (FILE, "#NO_APP\n");
1401 /* Output to assembler file text saying following lines
1402 may contain character constants, extra white space, comments, etc. */
1404 #define ASM_APP_ON "#APP\n"
1406 /* Output to assembler file text saying following lines
1407 no longer contain unusual constructs. */
1409 #define ASM_APP_OFF "#NO_APP\n"
1411 /* Output before read-only data. */
1413 #define TEXT_SECTION_ASM_OP ".text"
1415 /* Output before writable data. */
1417 #define DATA_SECTION_ASM_OP ".data"
1419 /* Here are four prefixes that are used by asm_fprintf to
1420 facilitate customization for alternate assembler syntaxes.
1421 Machines with no likelihood of an alternate syntax need not
1422 define these and need not use asm_fprintf. */
1424 /* The prefix for register names. Note that REGISTER_NAMES
1425 is supposed to include this prefix. */
1427 #define REGISTER_PREFIX ""
1429 /* The prefix for local labels. You should be able to define this as
1430 an empty string, or any arbitrary string (such as ".", ".L%", etc)
1431 without having to make any other changes to account for the specific
1432 definition. Note it is a string literal, not interpreted by printf
1435 #define LOCAL_LABEL_PREFIX ""
1437 /* The prefix to add to user-visible assembler symbols. */
1439 #define USER_LABEL_PREFIX "_"
1441 /* The prefix for immediate operands. */
1443 #define IMMEDIATE_PREFIX "#"
1445 /* How to refer to registers in assembler output.
1446 This sequence is indexed by compiler's hard-register-number (see above). */
1448 #ifndef SUPPORT_SUN_FPA
1450 #define REGISTER_NAMES \
1451 {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1452 "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1453 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" }
1455 #else /* SUPPORTED_SUN_FPA */
1457 #define REGISTER_NAMES \
1458 {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
1459 "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
1460 "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \
1461 "fpa0", "fpa1", "fpa2", "fpa3", "fpa4", "fpa5", "fpa6", "fpa7", \
1462 "fpa8", "fpa9", "fpa10", "fpa11", "fpa12", "fpa13", "fpa14", "fpa15", \
1463 "fpa16", "fpa17", "fpa18", "fpa19", "fpa20", "fpa21", "fpa22", "fpa23", \
1464 "fpa24", "fpa25", "fpa26", "fpa27", "fpa28", "fpa29", "fpa30", "fpa31" }
1466 #endif /* defined SUPPORT_SUN_FPA */
1468 /* How to renumber registers for dbx and gdb.
1469 On the Sun-3, the floating point registers have numbers
1470 18 to 25, not 16 to 23 as they do in the compiler. */
1472 #define DBX_REGISTER_NUMBER(REGNO) ((REGNO) < 16 ? (REGNO) : (REGNO) + 2)
1474 /* This is how to output the definition of a user-level label named NAME,
1475 such as the label on a static function or variable NAME. */
1477 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1478 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1480 /* This is how to output a command to make the user-level label named NAME
1481 defined for reference from other files. */
1483 #define GLOBAL_ASM_OP ".globl"
1484 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1485 do { fprintf (FILE, "%s ", GLOBAL_ASM_OP); \
1486 assemble_name (FILE, NAME); \
1487 fputs ("\n", FILE);} while (0)
1489 /* This is how to output a reference to a user-level label named NAME.
1490 `assemble_name' uses this. */
1492 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1493 asm_fprintf (FILE, "%0U%s", NAME)
1495 /* This is how to output an internal numbered label where
1496 PREFIX is the class of label and NUM is the number within the class. */
1498 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1499 asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM)
1501 /* This is how to store into the string LABEL
1502 the symbol_ref name of an internal numbered label where
1503 PREFIX is the class of label and NUM is the number within the class.
1504 This is suitable for output with `assemble_name'. */
1506 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1507 sprintf (LABEL, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
1509 /* This is how to output an assembler line defining a `double' constant. */
1511 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1512 fprintf (FILE, "\t.double 0r%.20g\n", (VALUE))
1514 /* This is how to output an assembler line defining a `float' constant. */
1516 /* Sun's assembler can't handle floating constants written as floating.
1517 However, when cross-compiling, always use that in case format differs. */
1519 #ifdef CROSS_COMPILE
1521 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1522 fprintf (FILE, "\t.float 0r%.10g\n", (VALUE))
1526 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1527 do { union { float f; long l;} tem; \
1529 fprintf (FILE, "\t.long 0x%x\n", tem.l); \
1532 #endif /* not CROSS_COMPILE */
1534 /* This is how to output an assembler line defining an `int' constant. */
1536 #define ASM_OUTPUT_INT(FILE,VALUE) \
1537 ( fprintf (FILE, "\t.long "), \
1538 output_addr_const (FILE, (VALUE)), \
1539 fprintf (FILE, "\n"))
1541 /* Likewise for `char' and `short' constants. */
1543 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1544 ( fprintf (FILE, "\t.word "), \
1545 output_addr_const (FILE, (VALUE)), \
1546 fprintf (FILE, "\n"))
1548 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1549 ( fprintf (FILE, "\t.byte "), \
1550 output_addr_const (FILE, (VALUE)), \
1551 fprintf (FILE, "\n"))
1553 /* This is how to output an assembler line for a numeric constant byte. */
1555 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1556 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1558 /* This is how to output an insn to push a register on the stack.
1559 It need not be very fast code. */
1561 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1562 asm_fprintf (FILE, "\tmovel %s,%Rsp@-\n", reg_names[REGNO])
1564 /* This is how to output an insn to pop a register from the stack.
1565 It need not be very fast code. */
1567 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1568 asm_fprintf (FILE, "\tmovel %Rsp@+,%s\n", reg_names[REGNO])
1570 /* This is how to output an element of a case-vector that is absolute.
1571 (The 68000 does not use such vectors,
1572 but we must define this macro anyway.) */
1574 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1575 asm_fprintf (FILE, "\t.long %LL%d\n", VALUE)
1577 /* This is how to output an element of a case-vector that is relative. */
1579 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1580 asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL)
1582 /* This is how to output an assembler line
1583 that says to advance the location counter
1584 to a multiple of 2**LOG bytes. */
1586 /* We don't have a way to align to more than a two-byte boundary, so do the
1587 best we can and don't complain. */
1588 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1590 fprintf (FILE, "\t.even\n");
1592 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1593 fprintf (FILE, "\t.skip %u\n", (SIZE))
1595 /* This says how to output an assembler line
1596 to define a global common symbol. */
1598 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1599 ( fputs (".comm ", (FILE)), \
1600 assemble_name ((FILE), (NAME)), \
1601 fprintf ((FILE), ",%u\n", (ROUNDED)))
1603 /* This says how to output an assembler line
1604 to define a local common symbol. */
1606 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1607 ( fputs (".lcomm ", (FILE)), \
1608 assemble_name ((FILE), (NAME)), \
1609 fprintf ((FILE), ",%u\n", (ROUNDED)))
1611 /* Store in OUTPUT a string (made with alloca) containing
1612 an assembler-name for a local static variable named NAME.
1613 LABELNO is an integer which is different for each call. */
1615 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1616 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1617 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1619 /* Define the parentheses used to group arithmetic operations
1620 in assembler code. */
1622 #define ASM_OPEN_PAREN "("
1623 #define ASM_CLOSE_PAREN ")"
1625 /* Define results of standard character escape sequences. */
1626 #define TARGET_BELL 007
1627 #define TARGET_BS 010
1628 #define TARGET_TAB 011
1629 #define TARGET_NEWLINE 012
1630 #define TARGET_VT 013
1631 #define TARGET_FF 014
1632 #define TARGET_CR 015
1634 /* Output a float value (represented as a C double) as an immediate operand.
1635 This macro is a 68k-specific macro. */
1636 #define ASM_OUTPUT_FLOAT_OPERAND(FILE,VALUE) \
1637 asm_fprintf (FILE, "%I0r%.9g", (VALUE))
1639 /* Output a double value (represented as a C double) as an immediate operand.
1640 This macro is a 68k-specific macro. */
1641 #define ASM_OUTPUT_DOUBLE_OPERAND(FILE,VALUE) \
1642 asm_fprintf (FILE, "%I0r%.20g", (VALUE))
1644 /* Print operand X (an rtx) in assembler syntax to file FILE.
1645 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1646 For `%' followed by punctuation, CODE is the punctuation and X is null.
1648 On the 68000, we use several CODE characters:
1649 '.' for dot needed in Motorola-style opcode names.
1650 '-' for an operand pushing on the stack:
1651 sp@-, -(sp) or -(%sp) depending on the style of syntax.
1652 '+' for an operand pushing on the stack:
1653 sp@+, (sp)+ or (%sp)+ depending on the style of syntax.
1654 '@' for a reference to the top word on the stack:
1655 sp@, (sp) or (%sp) depending on the style of syntax.
1656 '#' for an immediate operand prefix (# in MIT and Motorola syntax
1657 but & in SGS syntax).
1658 '!' for the fpcr register (used in some float-to-fixed conversions).
1659 '$' for the letter `s' in an op code, but only on the 68040.
1660 '&' for the letter `d' in an op code, but only on the 68040.
1662 'b' for byte insn (no effect, on the Sun; this is for the ISI).
1663 'd' to force memory addressing to be absolute, not relative.
1664 'f' for float insn (print a CONST_DOUBLE as a float rather than in hex)
1665 'w' for FPA insn (print a CONST_DOUBLE as a SunFPA constant rather
1666 than directly). Second part of 'y' below.
1667 'x' for float insn (print a CONST_DOUBLE as a float rather than in hex),
1668 or print pair of registers as rx:ry.
1669 'y' for a FPA insn (print pair of registers as rx:ry). This also outputs
1670 CONST_DOUBLE's as SunFPA constant RAM registers if
1671 possible, so it should not be used except for the SunFPA. */
1673 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1674 ((CODE) == '.' || (CODE) == '#' || (CODE) == '-' \
1675 || (CODE) == '+' || (CODE) == '@' || (CODE) == '!' \
1676 || (CODE) == '$' || (CODE) == '&')
1678 #ifdef HOST_WORDS_BIG_ENDIAN
1679 #define PRINT_OPERAND_EXTRACT_FLOAT(X) \
1680 u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X);
1682 #define PRINT_OPERAND_EXTRACT_FLOAT(X) \
1683 u.i[0] = CONST_DOUBLE_HIGH (X); u.i[1] = CONST_DOUBLE_LOW (X);
1686 #ifdef CROSS_COMPILE
1687 #define PRINT_OPERAND_PRINT_FLOAT(CODE, FILE) \
1688 ASM_OUTPUT_FLOAT_OPERAND (FILE, u1.f);
1690 #define PRINT_OPERAND_PRINT_FLOAT(CODE, FILE) \
1691 { if (CODE == 'f') \
1692 ASM_OUTPUT_FLOAT_OPERAND (FILE, u1.f); \
1694 asm_fprintf (FILE, "%I0x%x", u1.i); }
1697 /* A C compound statement to output to stdio stream STREAM the
1698 assembler syntax for an instruction operand X. X is an RTL
1701 CODE is a value that can be used to specify one of several ways
1702 of printing the operand. It is used when identical operands
1703 must be printed differently depending on the context. CODE
1704 comes from the `%' specification that was used to request
1705 printing of the operand. If the specification was just `%DIGIT'
1706 then CODE is 0; if the specification was `%LTR DIGIT' then CODE
1707 is the ASCII code for LTR.
1709 If X is a register, this macro should print the register's name.
1710 The names can be found in an array `reg_names' whose type is
1711 `char *[]'. `reg_names' is initialized from `REGISTER_NAMES'.
1713 When the machine description has a specification `%PUNCT' (a `%'
1714 followed by a punctuation character), this macro is called with
1715 a null pointer for X and the punctuation character for CODE.
1717 See m68k.c for the m68k specific codes. */
1719 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1721 /* A C compound statement to output to stdio stream STREAM the
1722 assembler syntax for an instruction operand that is a memory
1723 reference whose address is ADDR. ADDR is an RTL expression.
1725 On some machines, the syntax for a symbolic address depends on
1726 the section that the address refers to. On these machines,
1727 define the macro `ENCODE_SECTION_INFO' to store the information
1728 into the `symbol_ref', and then check for it here. */
1730 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1733 /* Define functions defined in aux-output.c and used in templates. */
1735 extern char *output_move_double ();
1736 extern char *output_move_const_single ();
1737 extern char *output_move_const_double ();
1738 extern char *output_btst ();