1 /* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu.
2 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 /* ??? Create elf.h and have svr4.h include it. */
28 #undef SWITCH_TAKES_ARG
29 #undef WORD_SWITCH_TAKES_ARG
30 #undef HANDLE_SYSV_PRAGMA
34 #undef WCHAR_TYPE_SIZE
36 #undef ASM_OUTPUT_EXTERNAL_LIBCALL
38 /* Print subsidiary information on the compiler version in use. */
39 #define TARGET_VERSION fprintf (stderr, " (m32r)")
42 /* Switch Recognition by gcc.c. Add -G xx support */
44 #undef SWITCH_TAKES_ARG
45 #define SWITCH_TAKES_ARG(CHAR) \
46 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
48 /* Names to predefine in the preprocessor for this target machine. */
49 /* __M32R__ is defined by the existing compiler so we use that. */
50 #define CPP_PREDEFINES "-Acpu(m32r) -Amachine(m32r) -D__M32R__"
53 #define CC1_SPEC "%{G*}"
55 /* Options to pass on to the assembler. */
57 #define ASM_SPEC "%{v}"
59 #if 0 /* not supported yet */
61 #define ASM_SPEC "%{v} %{mrelax:-relax}"
68 #if 0 /* not supported yet */
69 #define LINK_SPEC "%{v} %{mrelax:-relax}"
71 #define LINK_SPEC "%{v}"
75 #define STARTFILE_SPEC "%{!shared:crt0.o%s} crtinit.o%s"
79 #define ENDFILE_SPEC "crtfini.o%s"
84 /* Run-time compilation parameters selecting different hardware subsets. */
86 extern int target_flags;
88 /* If non-zero, tell the linker to do relaxing.
89 We don't do anything with the option, other than recognize it.
90 LINK_SPEC handles passing -relax to the linker.
91 This can cause incorrect debugging information as line numbers may
92 turn out wrong. This shouldn't be specified unless accompanied with -O2
93 [where the user expects debugging information to be less accurate]. */
94 #define TARGET_RELAX_MASK 1
96 /* For miscellaneous debugging purposes. */
97 #define TARGET_DEBUG_MASK 2
98 #define TARGET_DEBUG (target_flags & TARGET_DEBUG_MASK)
100 /* Align loops to 32 byte boundaries (cache line size). */
101 /* ??? This option is experimental and is not documented. */
102 #define TARGET_ALIGN_LOOPS_MASK 4
103 #define TARGET_ALIGN_LOOPS (target_flags & TARGET_ALIGN_LOOPS_MASK)
105 /* Use old compare/branch support (kept around for awhile for
106 comparison and backoff purposes). */
107 /* ??? This option is experimental and is not documented.
108 Eventually it will be deleted. */
109 #define TARGET_OLD_COMPARE_MASK 8
110 #define TARGET_OLD_COMPARE (target_flags & TARGET_OLD_COMPARE_MASK)
112 /* Target machine to compile for. */
113 #define TARGET_M32R 1
116 /* Macro to define tables used to set the flags.
117 This is a list in braces of pairs in braces,
118 each pair being { "NAME", VALUE }
119 where VALUE is the bits to set or minus the bits to clear.
120 An empty string NAME is used to identify the default VALUE. */
122 #define TARGET_SWITCHES \
124 /* { "relax", TARGET_RELAX_MASK }, \
125 { "no-relax", -TARGET_RELAX_MASK },*/ \
126 { "debug", TARGET_DEBUG_MASK }, \
127 { "align-loops", TARGET_ALIGN_LOOPS_MASK }, \
128 { "no-align-loops", -TARGET_ALIGN_LOOPS_MASK }, \
129 { "old-compare", TARGET_OLD_COMPARE_MASK }, \
130 { "no-old-compare", -TARGET_OLD_COMPARE_MASK }, \
132 { "", TARGET_DEFAULT } \
135 #define TARGET_DEFAULT (0)
137 #define SUBTARGET_SWITCHES
139 /* This macro is similar to `TARGET_SWITCHES' but defines names of
140 command options that have values. Its definition is an
141 initializer with a subgrouping for each command option.
143 Each subgrouping contains a string constant, that defines the
144 fixed part of the option name, and the address of a variable.
145 The variable, type `char *', is set to the variable part of the
146 given option if the fixed part matches. The actual option name
147 is made by appending `-m' to the specified name.
149 Here is an example which defines `-mshort-data-NUMBER'. If the
150 given option is `-mshort-data-512', the variable `m88k_short_data'
151 will be set to the string `"512"'.
153 extern char *m88k_short_data;
154 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
156 extern char *m32r_model_string;
157 extern char *m32r_sdata_string;
160 #define TARGET_OPTIONS \
162 { "model=", &m32r_model_string }, \
163 { "sdata=", &m32r_sdata_string }, \
168 Code models are used to select between two choices of two separate
169 possibilities (address space size, call insn to use):
171 small: addresses use 24 bits, use bl to make calls
172 medium: addresses use 32 bits, use bl to make calls (*1)
173 large: addresses use 32 bits, use seth/add3/jl to make calls (*2)
175 The fourth is "addresses use 24 bits, use seth/add3/jl to make calls" but
176 using this one doesn't make much sense.
178 (*1) The linker may eventually be able to relax seth/add3 -> ld24.
179 (*2) The linker may eventually be able to relax seth/add3/jl -> bl.
181 Internally these are recorded as TARGET_ADDR{24,32} and
184 The __model__ attribute can be used to select the code model to use when
185 accessing particular objects. */
187 enum m32r_model { M32R_MODEL_SMALL, M32R_MODEL_MEDIUM, M32R_MODEL_LARGE };
189 extern enum m32r_model m32r_model;
190 #define TARGET_MODEL_SMALL (m32r_model == M32R_MODEL_SMALL)
191 #define TARGET_MODEL_MEDIUM (m32r_model == M32R_MODEL_MEDIUM)
192 #define TARGET_MODEL_LARGE (m32r_model == M32R_MODEL_LARGE)
193 #define TARGET_ADDR24 (m32r_model == M32R_MODEL_SMALL)
194 #define TARGET_ADDR32 (! TARGET_ADDR24)
195 #define TARGET_CALL26 (! TARGET_CALL32)
196 #define TARGET_CALL32 (m32r_model == M32R_MODEL_LARGE)
198 /* The default is the small model. */
199 #define M32R_MODEL_DEFAULT "small"
203 The SDA consists of sections .sdata, .sbss, and .scommon.
204 .scommon isn't a real section, symbols in it have their section index
205 set to SHN_M32R_SCOMMON, though support for it exists in the linker script.
207 Two switches control the SDA:
209 -G NNN - specifies the maximum size of variable to go in the SDA
211 -msdata=foo - specifies how such variables are handled
213 -msdata=none - small data area is disabled
215 -msdata=sdata - small data goes in the SDA, special code isn't
216 generated to use it, and special relocs aren't
219 -msdata=use - small data goes in the SDA, special code is generated
220 to use the SDA and special relocs are generated
222 The SDA is not multilib'd, it isn't necessary.
223 MULTILIB_EXTRA_OPTS is set in tmake_file to -msdata=sdata so multilib'd
224 libraries have small data in .sdata/SHN_M32R_SCOMMON so programs that use
225 -msdata=use will successfully link with them (references in header files
226 will cause the compiler to emit code that refers to library objects in
227 .data). ??? There can be a problem if the user passes a -G value greater
228 than the default and a library object in a header file is that size.
229 The default is 8 so this should be rare - if it occurs the user
230 is required to rebuild the libraries or use a smaller value for -G.
233 /* Maximum size of variables that go in .sdata/.sbss.
234 The -msdata=foo switch also controls how small variables are handled. */
235 #define SDATA_DEFAULT_SIZE 8
237 extern int g_switch_value; /* value of the -G xx switch */
238 extern int g_switch_set; /* whether -G xx was passed. */
240 enum m32r_sdata { M32R_SDATA_NONE, M32R_SDATA_SDATA, M32R_SDATA_USE };
242 extern enum m32r_sdata m32r_sdata;
243 #define TARGET_SDATA_NONE (m32r_sdata == M32R_SDATA_NONE)
244 #define TARGET_SDATA_SDATA (m32r_sdata == M32R_SDATA_SDATA)
245 #define TARGET_SDATA_USE (m32r_sdata == M32R_SDATA_USE)
247 /* Default is to disable the SDA
248 [for upward compatibility with previous toolchains]. */
249 #define M32R_SDATA_DEFAULT "none"
251 /* Define this macro as a C expression for the initializer of an array of
252 strings to tell the driver program which options are defaults for this
253 target and thus do not need to be handled specially when using
254 `MULTILIB_OPTIONS'. */
255 #define MULTILIB_DEFAULTS { "mmodel=small", "m32r" }
257 /* Sometimes certain combinations of command options do not make
258 sense on a particular target machine. You can define a macro
259 `OVERRIDE_OPTIONS' to take account of this. This macro, if
260 defined, is executed once just after all the command options have
263 Don't use this macro to turn on various extra optimizations for
264 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
266 #define OVERRIDE_OPTIONS \
268 /* These need to be done at start up. It's convenient to do them here. */ \
272 /* Define this macro if debugging can be performed even without a
273 frame pointer. If this macro is defined, GNU CC will turn on the
274 `-fomit-frame-pointer' option whenever `-O' is specified. */
275 #define CAN_DEBUG_WITHOUT_FP
277 /* Target machine storage layout. */
279 /* Define to use software floating point emulator for REAL_ARITHMETIC and
280 decimal <-> binary conversion. */
281 #define REAL_ARITHMETIC
283 /* Define this if most significant bit is lowest numbered
284 in instructions that operate on numbered bit-fields. */
285 #define BITS_BIG_ENDIAN 1
287 /* Define this if most significant byte of a word is the lowest numbered. */
288 #define BYTES_BIG_ENDIAN 1
290 /* Define this if most significant word of a multiword number is the lowest
292 #define WORDS_BIG_ENDIAN 1
294 /* Define this macro if WORDS_BIG_ENDIAN is not constant. This must
295 be a constant value with the same meaning as WORDS_BIG_ENDIAN,
296 which will be used only when compiling libgcc2.c. Typically the
297 value will be set based on preprocessor defines. */
298 /*#define LIBGCC2_WORDS_BIG_ENDIAN 1*/
300 /* Number of bits in an addressable storage unit. */
301 #define BITS_PER_UNIT 8
303 /* Width in bits of a "word", which is the contents of a machine register.
304 Note that this is not necessarily the width of data type `int';
305 if using 16-bit ints on a 68000, this would still be 32.
306 But on a machine with 16-bit registers, this would be 16. */
307 #define BITS_PER_WORD 32
309 /* Width of a word, in units (bytes). */
310 #define UNITS_PER_WORD 4
312 /* Define this macro if it is advisable to hold scalars in registers
313 in a wider mode than that declared by the program. In such cases,
314 the value is constrained to be within the bounds of the declared
315 type, but kept valid in the wider mode. The signedness of the
316 extension may differ from that of the type. */
317 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
318 if (GET_MODE_CLASS (MODE) == MODE_INT \
319 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
324 /* Define this macro if the promotion described by `PROMOTE_MODE'
325 should also be done for outgoing function arguments. */
326 /*#define PROMOTE_FUNCTION_ARGS*/
328 /* Likewise, if the function return value is promoted.
329 If defined, FUNCTION_VALUE must perform the same promotions done by
331 /*#define PROMOTE_FUNCTION_RETURN*/
333 /* Width in bits of a pointer.
334 See also the macro `Pmode' defined below. */
335 #define POINTER_SIZE 32
337 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
338 #define PARM_BOUNDARY 32
340 /* Boundary (in *bits*) on which stack pointer should be aligned. */
341 #define STACK_BOUNDARY 32
343 /* ALIGN FRAMES on word boundaries */
344 #define M32R_STACK_ALIGN(LOC) (((LOC)+3) & ~3)
346 /* Allocation boundary (in *bits*) for the code of a function. */
347 #define FUNCTION_BOUNDARY 32
349 /* Alignment of field after `int : 0' in a structure. */
350 #define EMPTY_FIELD_BOUNDARY 32
352 /* Every structure's size must be a multiple of this. */
353 #define STRUCTURE_SIZE_BOUNDARY 8
355 /* A bitfield declared as `int' forces `int' alignment for the struct. */
356 #define PCC_BITFIELD_TYPE_MATTERS 1
358 /* No data type wants to be aligned rounder than this. */
359 #define BIGGEST_ALIGNMENT 32
361 /* The best alignment to use in cases where we have a choice. */
362 #define FASTEST_ALIGNMENT 32
364 /* Make strings word-aligned so strcpy from constants will be faster. */
365 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
366 ((TREE_CODE (EXP) == STRING_CST \
367 && (ALIGN) < FASTEST_ALIGNMENT) \
368 ? FASTEST_ALIGNMENT : (ALIGN))
370 /* Make arrays of chars word-aligned for the same reasons. */
371 #define DATA_ALIGNMENT(TYPE, ALIGN) \
372 (TREE_CODE (TYPE) == ARRAY_TYPE \
373 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
374 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
376 /* Set this nonzero if move instructions will actually fail to work
377 when given unaligned data. */
378 #define STRICT_ALIGNMENT 1
380 /* Layout of source language data types. */
382 #define SHORT_TYPE_SIZE 16
383 #define INT_TYPE_SIZE 32
384 #define LONG_TYPE_SIZE 32
385 #define LONG_LONG_TYPE_SIZE 64
386 #define FLOAT_TYPE_SIZE 32
387 #define DOUBLE_TYPE_SIZE 64
388 #define LONG_DOUBLE_TYPE_SIZE 64
390 /* Define this as 1 if `char' should by default be signed; else as 0. */
391 #define DEFAULT_SIGNED_CHAR 1
393 #define SIZE_TYPE "long unsigned int"
394 #define PTRDIFF_TYPE "long int"
395 #define WCHAR_TYPE "short unsigned int"
396 #define WCHAR_TYPE_SIZE 16
398 /* Define results of standard character escape sequences. */
399 #define TARGET_BELL 007
400 #define TARGET_BS 010
401 #define TARGET_TAB 011
402 #define TARGET_NEWLINE 012
403 #define TARGET_VT 013
404 #define TARGET_FF 014
405 #define TARGET_CR 015
407 /* Standard register usage. */
409 /* Number of actual hardware registers.
410 The hardware registers are assigned numbers for the compiler
411 from 0 to just below FIRST_PSEUDO_REGISTER.
412 All registers that the compiler knows about must be given numbers,
413 even those that are not normally considered general registers. */
414 #define FIRST_PSEUDO_REGISTER 18
416 /* 1 for registers that have pervasive standard uses
417 and are not available for the register allocator.
419 0-3 - arguments/results
420 4-5 - call used [4 is used as a tmp during prologue/epilogue generation]
422 7 - call used, static chain pointer
424 12 - call saved [reserved for global pointer]
426 14 - subroutine link register
432 By default, the extension registers are not available. */
434 #define FIXED_REGISTERS \
435 { 0, 0, 0, 0, 0, 0, 0, 0, \
436 0, 0, 0, 0, 0, 0, 0, 1, \
440 /* 1 for registers not available across function calls.
441 These must include the FIXED_REGISTERS and also any
442 registers that can be used without being saved.
443 The latter must include the registers where values are returned
444 and the register where structure-value addresses are passed.
445 Aside from that, you can include as many other registers as you like. */
447 #define CALL_USED_REGISTERS \
448 { 1, 1, 1, 1, 1, 1, 1, 1, \
449 0, 0, 0, 0, 0, 0, 1, 1, \
453 /* Zero or more C statements that may conditionally modify two variables
454 `fixed_regs' and `call_used_regs' (both of type `char []') after they
455 have been initialized from the two preceding macros.
457 This is necessary in case the fixed or call-clobbered registers depend
460 You need not define this macro if it has no work to do. */
462 /*#define CONDITIONAL_REGISTER_USAGE*/
464 /* If defined, an initializer for a vector of integers, containing the
465 numbers of hard registers in the order in which GNU CC should
466 prefer to use them (from most preferred to least). */
467 #if 1 /* better for int code */
468 #define REG_ALLOC_ORDER \
469 { 4, 5, 6, 7, 2, 3, 8, 9, 10, 11, 12, 13, 14, 0, 1, 15, 16, 17 }
470 #else /* better for fp code at expense of int code */
471 #define REG_ALLOC_ORDER \
472 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 }
475 /* Return number of consecutive hard regs needed starting at reg REGNO
476 to hold something of mode MODE.
477 This is ordinarily the length in words of a value of mode MODE
478 but can be less for certain modes in special long registers. */
479 #define HARD_REGNO_NREGS(REGNO, MODE) \
480 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
482 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
483 extern unsigned int m32r_hard_regno_mode_ok[];
484 extern unsigned int m32r_mode_class[];
485 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
486 ((m32r_hard_regno_mode_ok[REGNO] & m32r_mode_class[MODE]) != 0)
488 /* A C expression that is nonzero if it is desirable to choose
489 register allocation so as to avoid move instructions between a
490 value of mode MODE1 and a value of mode MODE2.
492 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
493 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
494 MODE2)' must be zero. */
496 /* Tie QI/HI/SI modes together. */
497 #define MODES_TIEABLE_P(MODE1, MODE2) \
498 (GET_MODE_CLASS (MODE1) == MODE_INT \
499 && GET_MODE_CLASS (MODE2) == MODE_INT \
500 && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \
501 && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD)
503 /* Register classes and constants. */
505 /* Define the classes of registers for register constraints in the
506 machine description. Also define ranges of constants.
508 One of the classes must always be named ALL_REGS and include all hard regs.
509 If there is more than one class, another class must be named NO_REGS
510 and contain no registers.
512 The name GENERAL_REGS must be the name of a class (or an alias for
513 another name such as ALL_REGS). This is the class of registers
514 that is allowed by "g" or "r" in a register constraint.
515 Also, registers outside this class are allocated only when
516 instructions express preferences for them.
518 The classes must be numbered in nondecreasing order; that is,
519 a larger-numbered class must never be contained completely
520 in a smaller-numbered class.
522 For any two classes, it is very desirable that there be another
523 class that represents their union.
525 It is important that any condition codes have class NO_REGS.
526 See `register_operand'. */
529 NO_REGS, CARRY_REG, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
532 #define N_REG_CLASSES (int) LIM_REG_CLASSES
534 /* Give names of register classes as strings for dump file. */
535 #define REG_CLASS_NAMES \
536 { "NO_REGS", "CARRY_REG", "GENERAL_REGS", "ALL_REGS" }
538 /* Define which registers fit in which classes.
539 This is an initializer for a vector of HARD_REG_SET
540 of length N_REG_CLASSES. */
542 #define REG_CLASS_CONTENTS \
543 { {0}, {0x20000}, {0x1ffff}, {0x3ffff} }
546 /* The same information, inverted:
547 Return the class number of the smallest class containing
548 reg number REGNO. This could be a conditional expression
549 or could index an array. */
550 extern enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
551 #define REGNO_REG_CLASS(REGNO) \
552 (m32r_regno_reg_class[REGNO])
554 /* The class value for index registers, and the one for base regs. */
555 #define INDEX_REG_CLASS GENERAL_REGS
556 #define BASE_REG_CLASS GENERAL_REGS
558 /* Get reg_class from a letter such as appears in the machine description. */
559 #define REG_CLASS_FROM_LETTER(C) NO_REGS
561 /* These assume that REGNO is a hard or pseudo reg number.
562 They give nonzero only if REGNO is a hard reg of the suitable class
563 or a pseudo reg currently allocated to a suitable hard reg.
564 Since they use reg_renumber, they are safe only once reg_renumber
565 has been allocated, which happens in local-alloc.c. */
566 #define REGNO_OK_FOR_BASE_P(REGNO) \
567 ((REGNO) < FIRST_PSEUDO_REGISTER \
568 ? GPR_P (REGNO) || (REGNO) == ARG_POINTER_REGNUM \
569 : GPR_P (reg_renumber[REGNO]))
570 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
572 /* Given an rtx X being reloaded into a reg required to be
573 in class CLASS, return the class of reg to actually use.
574 In general this is just CLASS; but on some machines
575 in some cases it is preferable to use a more restrictive class. */
576 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
579 /* Return the maximum number of consecutive registers
580 needed to represent mode MODE in a register of class CLASS. */
581 #define CLASS_MAX_NREGS(CLASS, MODE) \
582 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
584 /* The letters I, J, K, L, M, N, O, P in a register constraint string
585 can be used to stand for particular ranges of immediate operands.
586 This macro defines what the ranges are.
587 C is the letter, and VALUE is a constant value.
588 Return 1 if VALUE is in the range specified by C. */
589 /* 'I' is used for 8 bit signed immediates.
590 'J' is used for 16 bit signed immediates.
591 'K' is used for 16 bit unsigned immediates.
592 'L' is used for 16 bit immediates left shifted by 16 (sign ???).
593 'M' is used for 24 bit unsigned immediates.
594 'N' is used for any 32 bit non-symbolic value.
595 'O' is used for 5 bit unsigned immediates (shift count).
596 'P' is used for 16 bit signed immediates for compares
597 (values in the range -32767 to +32768). */
599 /* local to this file */
600 #define INT8_P(X) ((unsigned) ((X) + 0x80) < 0x100)
601 #define INT16_P(X) ((unsigned) ((X) + 0x8000) < 0x10000)
602 #define CMP_INT16_P(X) ((unsigned) ((X) - 1 + 0x8000) < 0x10000)
603 #define UINT16_P(X) ((unsigned) (X) < 0x10000)
604 #define UPPER16_P(X) (((X) & ~0xffff0000) == 0)
605 #define UINT24_P(X) ((unsigned) (X) < 0x1000000)
606 #define INT32_P(X) ((X) >= (-(HOST_WIDE_INT) 0x7fffffff - 1) \
607 && (X) <= (unsigned HOST_WIDE_INT) 0xffffffff)
608 #define UINT5_P(X) ((unsigned) (X) < 32)
609 #define INVERTED_SIGNED_8BIT(VAL) ((VAL) >= -127 && (VAL) <= 128)
611 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
612 ((C) == 'I' ? INT8_P (VALUE) \
613 : (C) == 'J' ? INT16_P (VALUE) \
614 : (C) == 'K' ? UINT16_P (VALUE) \
615 : (C) == 'L' ? UPPER16_P (VALUE) \
616 : (C) == 'M' ? UINT24_P (VALUE) \
617 : (C) == 'N' ? INVERTED_SIGNED_8BIT (VALUE) \
618 : (C) == 'O' ? UINT5_P (VALUE) \
619 : (C) == 'P' ? CMP_INT16_P (VALUE) \
622 /* Similar, but for floating constants, and defining letters G and H.
623 Here VALUE is the CONST_DOUBLE rtx itself.
624 For the m32r, handle a few constants inline.
625 ??? We needn't treat DI and DF modes differently, but for now we do. */
626 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
627 ((C) == 'G' ? easy_di_const (VALUE) \
628 : (C) == 'H' ? easy_df_const (VALUE) \
631 /* A C expression that defines the optional machine-dependent constraint
632 letters that can be used to segregate specific types of operands,
633 usually memory references, for the target machine. It should return 1 if
634 VALUE corresponds to the operand type represented by the constraint letter
635 C. If C is not defined as an extra constraint, the value returned should
636 be 0 regardless of VALUE. */
637 /* Q is for symbolic addresses loadable with ld24.
638 R is for symbolic addresses when ld24 can't be used.
640 T is for indirect of a pointer.
641 U is for pushes and pops of the stack pointer. */
643 #define EXTRA_CONSTRAINT(VALUE, C) \
645 ? ((TARGET_ADDR24 && GET_CODE (VALUE) == LABEL_REF) \
646 || addr24_operand (VALUE, VOIDmode)) \
648 ? ((TARGET_ADDR32 && GET_CODE (VALUE) == LABEL_REF) \
649 || addr32_operand (VALUE, VOIDmode)) \
653 ? (GET_CODE (VALUE) == MEM \
654 && memreg_operand (VALUE, GET_MODE (VALUE))) \
656 ? (GET_CODE (VALUE) == MEM \
657 && PUSH_POP_P (GET_MODE (VALUE), XEXP (VALUE, 0))) \
660 /* Stack layout and stack pointer usage. */
662 /* Define this macro if pushing a word onto the stack moves the stack
663 pointer to a smaller address. */
664 #define STACK_GROWS_DOWNWARD
666 /* Define this if the nominal address of the stack frame
667 is at the high-address end of the local variables;
668 that is, each additional local variable allocated
669 goes at a more negative offset from the frame pointer. */
670 /*#define FRAME_GROWS_DOWNWARD*/
672 /* Offset from frame pointer to start allocating local variables at.
673 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
674 first local allocated. Otherwise, it is the offset to the BEGINNING
675 of the first local allocated. */
676 /* The frame pointer points at the same place as the stack pointer, except if
677 alloca has been called. */
678 #define STARTING_FRAME_OFFSET \
679 M32R_STACK_ALIGN (current_function_outgoing_args_size)
681 /* Offset from the stack pointer register to the first location at which
682 outgoing arguments are placed. */
683 #define STACK_POINTER_OFFSET 0
685 /* Offset of first parameter from the argument pointer register value. */
686 #define FIRST_PARM_OFFSET(FNDECL) 0
688 /* A C expression whose value is RTL representing the address in a
689 stack frame where the pointer to the caller's frame is stored.
690 Assume that FRAMEADDR is an RTL expression for the address of the
693 If you don't define this macro, the default is to return the value
694 of FRAMEADDR--that is, the stack frame address is also the address
695 of the stack word that points to the previous frame. */
696 /*define DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)*/
698 /* A C expression whose value is RTL representing the value of the
699 return address for the frame COUNT steps up from the current frame.
700 FRAMEADDR is the frame pointer of the COUNT frame, or the frame
701 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME'
703 /* The current return address is in r14. */
704 #if 0 /* The default value should work. */
705 #define RETURN_ADDR_RTX(COUNT, FRAME) \
707 ? gen_rtx (REG, Pmode, 14) \
708 : copy_to_reg (gen_rtx (MEM, Pmode, \
709 memory_address (Pmode, plus_constant ((FRAME), UNITS_PER_WORD)))))
712 /* Register to use for pushing function arguments. */
713 #define STACK_POINTER_REGNUM 15
715 /* Base register for access to local variables of the function. */
716 #define FRAME_POINTER_REGNUM 13
718 /* Base register for access to arguments of the function. */
719 #define ARG_POINTER_REGNUM 16
721 /* The register number of the return address pointer register, which
722 is used to access the current function's return address from the
723 stack. On some machines, the return address is not at a fixed
724 offset from the frame pointer or stack pointer or argument
725 pointer. This register can be defined to point to the return
726 address on the stack, and then be converted by `ELIMINABLE_REGS'
727 into either the frame pointer or stack pointer.
729 Do not define this macro unless there is no other way to get the
730 return address from the stack. */
732 /* #define RETURN_ADDRESS_POINTER_REGNUM */
734 /* Register in which static-chain is passed to a function. This must
735 not be a register used by the prologue. */
736 #define STATIC_CHAIN_REGNUM 7
738 /* These aren't official macros. */
739 #define PROLOGUE_TMP_REGNUM 4
740 #define RETURN_ADDR_REGNUM 14
741 /* #define GP_REGNUM 12 */
742 #define CARRY_REGNUM 17
743 #define M32R_MAX_INT_REGS 16
746 #define GPR_P(REGNO) ((unsigned) (REGNO) < M32R_MAX_INT_REGS)
748 /* Eliminating the frame and arg pointers. */
750 /* A C expression which is nonzero if a function must have and use a
751 frame pointer. This expression is evaluated in the reload pass.
752 If its value is nonzero the function will have a frame pointer. */
753 #define FRAME_POINTER_REQUIRED \
754 (current_function_calls_alloca)
757 /* C statement to store the difference between the frame pointer
758 and the stack pointer values immediately after the function prologue.
759 If `ELIMINABLE_REGS' is defined, this macro will be not be used and
760 need not be defined. */
761 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
762 ((VAR) = m32r_compute_frame_size (get_frame_size ()))
765 /* If defined, this macro specifies a table of register pairs used to
766 eliminate unneeded registers that point into the stack frame. If
767 it is not defined, the only elimination attempted by the compiler
768 is to replace references to the frame pointer with references to
771 Note that the elimination of the argument pointer with the stack
772 pointer is specified first since that is the preferred elimination. */
774 #define ELIMINABLE_REGS \
775 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
776 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
777 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }} \
779 /* A C expression that returns non-zero if the compiler is allowed to
780 try to replace register number FROM-REG with register number
781 TO-REG. This macro need only be defined if `ELIMINABLE_REGS' is
782 defined, and will usually be the constant 1, since most of the
783 cases preventing register elimination are things that the compiler
784 already knows about. */
786 #define CAN_ELIMINATE(FROM, TO) \
787 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
788 ? ! frame_pointer_needed \
791 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
792 specifies the initial difference between the specified pair of
793 registers. This macro must be defined if `ELIMINABLE_REGS' is
796 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
798 int size = m32r_compute_frame_size (get_frame_size ()); \
800 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
802 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
803 (OFFSET) = size - current_function_pretend_args_size; \
804 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
805 (OFFSET) = size - current_function_pretend_args_size; \
810 /* Function argument passing. */
812 /* When a prototype says `char' or `short', really pass an `int'. */
813 #define PROMOTE_PROTOTYPES
815 /* If defined, the maximum amount of space required for outgoing
816 arguments will be computed and placed into the variable
817 `current_function_outgoing_args_size'. No space will be pushed
818 onto the stack for each call; instead, the function prologue should
819 increase the stack frame size by this amount. */
820 #define ACCUMULATE_OUTGOING_ARGS
822 /* Define this macro if functions should assume that stack space has
823 been allocated for arguments even when their values are passed in
826 The value of this macro is the size, in bytes, of the area
827 reserved for arguments passed in registers for the function
828 represented by FNDECL.
830 This space can be allocated by the caller, or be a part of the
831 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says
834 #define REG_PARM_STACK_SPACE(FNDECL) \
835 (M32R_MAX_PARM_REGS * UNITS_PER_WORD)
838 /* Value is the number of bytes of arguments automatically
839 popped when returning from a subroutine call.
840 FUNDECL is the declaration node of the function (as a tree),
841 FUNTYPE is the data type of the function (as a tree),
842 or for a library call it is an identifier node for the subroutine name.
843 SIZE is the number of bytes of arguments passed on the stack. */
844 #define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0
846 /* Define a data type for recording info about an argument list
847 during the scan of that argument list. This data type should
848 hold all necessary information about the function itself
849 and about the args processed so far, enough to enable macros
850 such as FUNCTION_ARG to determine where the next arg should go. */
851 #define CUMULATIVE_ARGS int
853 /* Initialize a variable CUM of type CUMULATIVE_ARGS
854 for a call to a function whose data type is FNTYPE.
855 For a library call, FNTYPE is 0. */
856 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
859 /* The number of registers used for parameter passing. Local to this file. */
860 #define M32R_MAX_PARM_REGS 4
862 /* 1 if N is a possible register number for function argument passing. */
863 #define FUNCTION_ARG_REGNO_P(N) \
864 ((unsigned) (N) < M32R_MAX_PARM_REGS)
866 /* The ROUND_ADVANCE* macros are local to this file. */
867 /* Round SIZE up to a word boundary. */
868 #define ROUND_ADVANCE(SIZE) \
869 (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
871 /* Round arg MODE/TYPE up to the next word boundary. */
872 #define ROUND_ADVANCE_ARG(MODE, TYPE) \
874 ? ROUND_ADVANCE (int_size_in_bytes (TYPE)) \
875 : ROUND_ADVANCE (GET_MODE_SIZE (MODE)))
877 /* Round CUM up to the necessary point for argument MODE/TYPE. */
879 #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) \
880 ((((MODE) == BLKmode ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) \
885 #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) (CUM)
888 /* Return boolean indicating arg of type TYPE and mode MODE will be passed in
889 a reg. This includes arguments that have to be passed by reference as the
890 pointer to them is passed in a reg if one is available (and that is what
892 This macro is only used in this file. */
893 #define PASS_IN_REG_P(CUM, MODE, TYPE, NAMED) \
894 (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < M32R_MAX_PARM_REGS)
896 /* Determine where to put an argument to a function.
897 Value is zero to push the argument on the stack,
898 or a hard register in which to store the argument.
900 MODE is the argument's machine mode.
901 TYPE is the data type of the argument (as a tree).
902 This is null for libcalls where that information may
904 CUM is a variable of type CUMULATIVE_ARGS which gives info about
905 the preceding args and about the function being called.
906 NAMED is nonzero if this argument is a named parameter
907 (otherwise it is an extra parameter matching an ellipsis). */
908 /* On the M32R the first M32R_MAX_PARM_REGS args are normally in registers
909 and the rest are pushed. */
910 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
911 (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \
912 ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
915 /* ??? Quick hack to try to get varargs working the normal way. */
916 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
917 (((! current_function_varargs || (NAMED)) \
918 && PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED))) \
919 ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
922 /* A C expression for the number of words, at the beginning of an
923 argument, must be put in registers. The value must be zero for
924 arguments that are passed entirely in registers or that are entirely
927 On some machines, certain arguments must be passed partially in
928 registers and partially in memory. On these machines, typically the
929 first @var{n} words of arguments are passed in registers, and the rest
930 on the stack. If a multi-word argument (a @code{double} or a
931 structure) crosses that boundary, its first few words must be passed
932 in registers and the rest must be pushed. This macro tells the
933 compiler when this occurs, and how many of the words should go in
935 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
936 function_arg_partial_nregs (&CUM, (int)MODE, TYPE, NAMED)
938 /* A C expression that indicates when an argument must be passed by
939 reference. If nonzero for an argument, a copy of that argument is
940 made in memory and a pointer to the argument is passed instead of
941 the argument itself. The pointer is passed in whatever way is
942 appropriate for passing a pointer to that type. */
943 /* All arguments greater than 8 bytes are passed this way. */
944 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
945 ((TYPE) && int_size_in_bytes (TYPE) > 8)
947 /* Update the data in CUM to advance over an argument
948 of mode MODE and data type TYPE.
949 (TYPE is null for libcalls where that information may not be available.) */
950 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
951 ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \
952 + ROUND_ADVANCE_ARG ((MODE), (TYPE))))
954 /* If defined, a C expression that gives the alignment boundary, in bits,
955 of an argument with the specified mode and type. If it is not defined,
956 PARM_BOUNDARY is used for all arguments. */
958 /* We assume PARM_BOUNDARY == UNITS_PER_WORD here. */
959 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
960 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
966 /* If defined, is a C expression that produces the machine-specific
967 code for a call to `__builtin_saveregs'. This code will be moved
968 to the very beginning of the function, before any parameter access
969 are made. The return value of this function should be an RTX that
970 contains the value to use as the return of `__builtin_saveregs'.
972 The argument ARGS is a `tree_list' containing the arguments that
973 were passed to `__builtin_saveregs'.
975 If this macro is not defined, the compiler will output an ordinary
976 call to the library function `__builtin_saveregs'. */
977 extern struct rtx *m32r_expand_builtin_savergs ();
978 #define EXPAND_BUILTIN_SAVEREGS(ARGS) m32r_expand_builtin_saveregs (ARGS)
981 /* This macro offers an alternative
982 to using `__builtin_saveregs' and defining the macro
983 `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register
984 arguments into the stack so that all the arguments appear to have
985 been passed consecutively on the stack. Once this is done, you
986 can use the standard implementation of varargs that works for
987 machines that pass all their arguments on the stack.
989 The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure,
990 containing the values that obtain after processing of the named
991 arguments. The arguments MODE and TYPE describe the last named
992 argument--its machine mode and its data type as a tree node.
994 The macro implementation should do two things: first, push onto the
995 stack all the argument registers *not* used for the named
996 arguments, and second, store the size of the data thus pushed into
997 the `int'-valued variable whose name is supplied as the argument
998 PRETEND_SIZE. The value that you store here will serve as
999 additional offset for setting up the stack frame.
1001 If the argument NO_RTL is nonzero, it means that the
1002 arguments of the function are being analyzed for the second time.
1003 This happens for an inline function, which is not actually
1004 compiled until the end of the source file. The macro
1005 `SETUP_INCOMING_VARARGS' should not generate any instructions in
1008 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) \
1009 m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
1011 /* Function results. */
1013 /* Define how to find the value returned by a function.
1014 VALTYPE is the data type of the value (as a tree).
1015 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1016 otherwise, FUNC is 0. */
1017 #define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
1019 /* Define how to find the value returned by a library function
1020 assuming the value has mode MODE. */
1021 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
1023 /* 1 if N is a possible register number for a function value
1024 as seen by the caller. */
1025 /* ??? What about r1 in DI/DF values. */
1026 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
1028 /* A C expression which can inhibit the returning of certain function
1029 values in registers, based on the type of value. A nonzero value says
1030 to return the function value in memory, just as large structures are
1031 always returned. Here TYPE will be a C expression of type `tree',
1032 representing the data type of the value. */
1033 #define RETURN_IN_MEMORY(TYPE) \
1034 (int_size_in_bytes (TYPE) > 8)
1036 /* Tell GCC to use RETURN_IN_MEMORY. */
1037 #define DEFAULT_PCC_STRUCT_RETURN 0
1039 /* Register in which address to store a structure value
1040 is passed to a function, or 0 to use `invisible' first argument. */
1041 #define STRUCT_VALUE 0
1043 /* Function entry and exit. */
1045 /* Initialize data used by insn expanders. This is called from
1046 init_emit, once for each function, before code is generated. */
1047 #define INIT_EXPANDERS m32r_init_expanders ()
1049 /* This macro generates the assembly code for function entry.
1050 FILE is a stdio stream to output the code to.
1051 SIZE is an int: how many units of temporary storage to allocate.
1052 Refer to the array `regs_ever_live' to determine which registers
1053 to save; `regs_ever_live[I]' is nonzero if register number I
1054 is ever used in the function. This macro is responsible for
1055 knowing which registers should not be saved even if used. */
1056 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1057 m32r_output_function_prologue (FILE, SIZE)
1059 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1060 the stack pointer does not matter. The value is tested only in
1061 functions that have frame pointers.
1062 No definition is equivalent to always zero. */
1063 #define EXIT_IGNORE_STACK 1
1065 /* This macro generates the assembly code for function exit,
1066 on machines that need it. If FUNCTION_EPILOGUE is not defined
1067 then individual return instructions are generated for each
1068 return statement. Args are same as for FUNCTION_PROLOGUE.
1070 The function epilogue should not depend on the current stack pointer!
1071 It should use the frame pointer only. This is mandatory because
1072 of alloca; we also take advantage of it to omit stack adjustments
1073 before returning. */
1074 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1075 m32r_output_function_epilogue (FILE, SIZE)
1077 /* Output assembler code to FILE to increment profiler label # LABELNO
1078 for profiling a function entry. */
1079 #define FUNCTION_PROFILER(FILE, LABELNO) abort ()
1083 /* On the M32R, the trampoline is
1090 ??? Need addr32 support.
1093 /* Length in bytes of the trampoline for entering a nested function. */
1094 #define TRAMPOLINE_SIZE 12
1096 /* Emit RTL insns to initialize the variable parts of a trampoline.
1097 FNADDR is an RTX for the address of the function's pure code.
1098 CXT is an RTX for the static chain value for the function. */
1099 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1101 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 0)), \
1102 plus_constant ((CXT), 0xe7000000)); \
1103 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), \
1104 plus_constant ((FNADDR), 0xe6000000)); \
1105 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 8)), \
1106 GEN_INT (0x1fc67000)); \
1107 emit_insn (gen_flush_icache (validize_mem (gen_rtx (MEM, SImode, TRAMP)))); \
1110 /* Library calls. */
1112 /* Generate calls to memcpy, memcmp and memset. */
1113 #define TARGET_MEM_FUNCTIONS
1115 /* Addressing modes, and classification of registers for them. */
1117 /* Maximum number of registers that can appear in a valid memory address. */
1118 #define MAX_REGS_PER_ADDRESS 1
1120 /* We have post-inc load and pre-dec,pre-inc store,
1121 but only for 4 byte vals. */
1123 #define HAVE_PRE_DECREMENT
1124 #define HAVE_PRE_INCREMENT
1125 #define HAVE_POST_INCREMENT
1128 /* Recognize any constant value that is a valid address. */
1129 #define CONSTANT_ADDRESS_P(X) \
1130 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1131 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
1133 /* Nonzero if the constant value X is a legitimate general operand.
1134 We don't allow (plus symbol large-constant) as the relocations can't
1135 describe it. INTVAL > 32767 handles both 16 bit and 24 bit relocations.
1136 We allow all CONST_DOUBLE's as the md file patterns will force the
1137 constant to memory if they can't handle them. */
1139 #define LEGITIMATE_CONSTANT_P(X) \
1140 (! (GET_CODE (X) == CONST \
1141 && GET_CODE (XEXP (X, 0)) == PLUS \
1142 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
1143 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1144 && (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (X, 0), 1)) > 32767))
1146 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1147 and check its validity for a certain class.
1148 We have two alternate definitions for each of them.
1149 The usual definition accepts all pseudo regs; the other rejects
1150 them unless they have been allocated suitable hard regs.
1151 The symbol REG_OK_STRICT causes the latter definition to be used.
1153 Most source files want to accept pseudo regs in the hope that
1154 they will get allocated to the class that the insn wants them to be in.
1155 Source files for reload pass need to be strict.
1156 After reload, it makes no difference, since pseudo regs have
1157 been eliminated by then. */
1159 #ifdef REG_OK_STRICT
1161 /* Nonzero if X is a hard reg that can be used as a base reg. */
1162 #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X))
1163 /* Nonzero if X is a hard reg that can be used as an index. */
1164 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1168 /* Nonzero if X is a hard reg that can be used as a base reg
1169 or if it is a pseudo reg. */
1170 #define REG_OK_FOR_BASE_P(X) \
1171 (GPR_P (REGNO (X)) \
1172 || (REGNO (X)) == ARG_POINTER_REGNUM \
1173 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1174 /* Nonzero if X is a hard reg that can be used as an index
1175 or if it is a pseudo reg. */
1176 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1180 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1181 that is a valid memory address for an instruction.
1182 The MODE argument is the machine mode for the MEM expression
1183 that wants to use this address. */
1185 /* local to this file */
1186 #define RTX_OK_FOR_BASE_P(X) \
1187 (REG_P (X) && REG_OK_FOR_BASE_P (X))
1189 /* local to this file */
1190 #define RTX_OK_FOR_OFFSET_P(X) \
1191 (GET_CODE (X) == CONST_INT && INT16_P (INTVAL (X)))
1193 /* local to this file */
1194 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \
1195 (GET_CODE (X) == PLUS \
1196 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
1197 && RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))
1199 /* local to this file */
1200 /* For LO_SUM addresses, do not allow them if the MODE is > 1 word,
1201 since more than one instruction will be required. */
1202 #define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \
1203 (GET_CODE (X) == LO_SUM \
1204 && (MODE != BLKmode && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \
1205 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
1206 && CONSTANT_P (XEXP (X, 1)))
1208 /* local to this file */
1209 /* Memory address that is a push/pop of the stack pointer. */
1210 #define PUSH_POP_P(MODE, X) \
1212 && (GET_CODE (X) == POST_INC \
1213 || GET_CODE (X) == PRE_INC \
1214 || GET_CODE (X) == PRE_DEC))
1216 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1217 { if (RTX_OK_FOR_BASE_P (X)) \
1219 if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \
1221 if (LEGITIMATE_LO_SUM_ADDRESS_P ((MODE), (X))) \
1223 if (PUSH_POP_P ((MODE), (X))) \
1227 /* Try machine-dependent ways of modifying an illegitimate address
1228 to be legitimate. If we find one, return the new, valid address.
1229 This macro is used in only one place: `memory_address' in explow.c.
1231 OLDX is the address as it was before break_out_memory_refs was called.
1232 In some cases it is useful to look at this to decide what needs to be done.
1234 MODE and WIN are passed so that this macro can use
1235 GO_IF_LEGITIMATE_ADDRESS.
1237 It is always safe for this macro to do nothing. It exists to recognize
1238 opportunities to optimize the output.
1240 ??? Is there anything useful we can do here for the M32R? */
1242 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
1244 /* Go to LABEL if ADDR (a legitimate address expression)
1245 has an effect that depends on the machine mode it is used for. */
1246 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1248 if (GET_CODE (ADDR) == PRE_DEC \
1249 || GET_CODE (ADDR) == PRE_INC \
1250 || GET_CODE (ADDR) == POST_INC \
1251 || GET_CODE (ADDR) == LO_SUM) \
1255 /* Condition code usage. */
1257 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1258 return the mode to be used for the comparison. */
1259 #define SELECT_CC_MODE(OP, X, Y) \
1260 ((enum machine_mode)m32r_select_cc_mode ((int)OP, X, Y))
1262 /* Return non-zero if SELECT_CC_MODE will never return MODE for a
1263 floating point inequality comparison. */
1264 #define REVERSIBLE_CC_MODE(MODE) 1 /*???*/
1268 /* ??? I'm quite sure I don't understand enough of the subtleties involved
1269 in choosing the right numbers to use here, but there doesn't seem to be
1270 enough documentation on this. What I've done is define an insn to cost
1271 4 "units" and work from there. COSTS_N_INSNS (N) is defined as (N) * 4 - 2
1272 so that seems reasonable. Some values are supposed to be defined relative
1273 to each other and thus aren't necessarily related to COSTS_N_INSNS. */
1275 /* Compute the cost of computing a constant rtl expression RTX
1276 whose rtx-code is CODE. The body of this macro is a portion
1277 of a switch statement. If the code is computed here,
1278 return it with a return statement. Otherwise, break from the switch. */
1279 /* Small integers are as cheap as registers. 4 byte values can be fetched
1280 as immediate constants - let's give that the cost of an extra insn. */
1281 #define CONST_COSTS(X, CODE, OUTER_CODE) \
1283 if (INT16_P (INTVAL (X))) \
1285 /* fall through */ \
1290 case CONST_DOUBLE : \
1293 split_double (X, &high, &low); \
1294 return 4 * (!INT16_P (INTVAL (high)) \
1295 + !INT16_P (INTVAL (low))); \
1298 /* Compute the cost of an address. */
1299 #define ADDRESS_COST(ADDR) m32r_address_cost (ADDR)
1301 /* Compute extra cost of moving data between one register class
1303 #define REGISTER_MOVE_COST(CLASS1, CLASS2) 2
1305 /* Compute the cost of moving data between registers and memory. */
1306 /* Memory is 3 times as expensive as registers.
1307 ??? Is that the right way to look at it? */
1308 #define MEMORY_MOVE_COST(MODE,CLASS,IN_P) \
1309 (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)
1311 /* The cost of a branch insn. */
1312 /* A value of 2 here causes GCC to avoid using branches in comparisons like
1313 while (a < N && a). Branches aren't that expensive on the M32R so
1314 we define this as 1. Defining it as 2 had a heavy hit in fp-bit.c. */
1315 #define BRANCH_COST 1
1317 /* Provide the costs of a rtl expression. This is in the body of a
1318 switch on CODE. The purpose for the cost of MULT is to encourage
1319 `synth_mult' to find a synthetic multiply when reasonable.
1321 If we need more than 12 insns to do a multiply, then go out-of-line,
1322 since the call overhead will be < 10% of the cost of the multiply. */
1323 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1325 return COSTS_N_INSNS (3); \
1330 return COSTS_N_INSNS (10); \
1332 /* Nonzero if access to memory by bytes is slow and undesirable.
1333 For RISC chips, it means that access to memory by bytes is no
1334 better than access by words when possible, so grab a whole word
1335 and maybe make use of that. */
1336 #define SLOW_BYTE_ACCESS 1
1338 /* Define this macro if it is as good or better to call a constant
1339 function address than to call an address kept in a register. */
1340 #define NO_FUNCTION_CSE
1342 /* Define this macro if it is as good or better for a function to call
1343 itself with an explicit address than to call an address kept in a
1345 #define NO_RECURSIVE_FUNCTION_CSE
1347 /* Enable the register move pass.
1348 This is useful for machines with only 2 address instructions.
1349 It's not currently enabled by default because on the stanford benchmarks
1350 the improvement wasn't significant and in a couple of cases caused a
1351 significant de-optimization. */
1352 /* #define ENABLE_REGMOVE_PASS */
1354 /* A C statement (sans semicolon) to update the integer variable COST based on
1355 the relationship between INSN that is dependent on DEP_INSN through the
1356 dependence LINK. The default is to make no adjustment to COST. This can be
1357 used for example to specify to the scheduler that an output- or
1358 anti-dependence does not incur the same cost as a data-dependence. */
1360 /* #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
1361 (COST) = m32r_adjust_cost (INSN, LINK, DEP_INSN, COST) */
1363 /* A C statement (sans semicolon) to update the integer scheduling
1364 priority `INSN_PRIORITY(INSN)'. Reduce the priority to execute
1365 the INSN earlier, increase the priority to execute INSN later.
1366 Do not define this macro if you do not need to adjust the
1367 scheduling priorities of insns. */
1368 /* #define ADJUST_PRIORITY (INSN) */
1370 /* Macro to determine whether the Haifa scheduler is used. */
1377 /* Indicate how many instructions can be issued at the same time.
1378 This is 1/2 of a lie. The m32r can issue only 1 long insn at
1379 once, but 2. However doing so allows the scheduler to group
1380 the two short insns together. */
1381 #define ISSUE_RATE 2
1383 /* When the `length' insn attribute is used, this macro specifies the
1384 value to be assigned to the address of the first insn in a
1385 function. If not specified, 0 is used. */
1386 #define FIRST_INSN_ADDRESS m32r_first_insn_address ()
1389 /* Section selection. */
1391 #define TEXT_SECTION_ASM_OP "\t.section .text"
1392 #define DATA_SECTION_ASM_OP "\t.section .data"
1393 #define RODATA_SECTION_ASM_OP "\t.section .rodata"
1394 #define BSS_SECTION_ASM_OP "\t.section .bss"
1395 #define SDATA_SECTION_ASM_OP "\t.section .sdata"
1396 #define SBSS_SECTION_ASM_OP "\t.section .sbss"
1397 /* This one is for svr4.h. */
1398 #undef CONST_SECTION_ASM_OP
1399 #define CONST_SECTION_ASM_OP "\t.section .rodata"
1401 /* A list of names for sections other than the standard two, which are
1402 `in_text' and `in_data'. You need not define this macro
1403 on a system with no other sections (that GCC needs to use). */
1404 #undef EXTRA_SECTIONS
1405 #define EXTRA_SECTIONS in_sdata, in_sbss, in_const, in_ctors, in_dtors
1407 /* One or more functions to be defined in "varasm.c". These
1408 functions should do jobs analogous to those of `text_section' and
1409 `data_section', for your additional sections. Do not define this
1410 macro if you do not define `EXTRA_SECTIONS'. */
1411 #undef EXTRA_SECTION_FUNCTIONS
1412 #define EXTRA_SECTION_FUNCTIONS \
1413 CONST_SECTION_FUNCTION \
1414 CTORS_SECTION_FUNCTION \
1415 DTORS_SECTION_FUNCTION \
1416 SDATA_SECTION_FUNCTION \
1417 SBSS_SECTION_FUNCTION
1419 #define SDATA_SECTION_FUNCTION \
1423 if (in_section != in_sdata) \
1425 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
1426 in_section = in_sdata; \
1430 #define SBSS_SECTION_FUNCTION \
1434 if (in_section != in_sbss) \
1436 fprintf (asm_out_file, "%s\n", SBSS_SECTION_ASM_OP); \
1437 in_section = in_sbss; \
1441 /* A C statement or statements to switch to the appropriate section for
1442 output of EXP. You can assume that EXP is either a `VAR_DECL' node
1443 or a constant of some sort. RELOC indicates whether the initial value
1444 of EXP requires link-time relocations. */
1445 extern void m32r_select_section ();
1446 #undef SELECT_SECTION
1447 #define SELECT_SECTION(EXP, RELOC) m32r_select_section ((EXP), (RELOC))
1449 /* A C statement or statements to switch to the appropriate section for
1450 output of RTX in mode MODE. You can assume that RTX
1451 is some kind of constant in RTL. The argument MODE is redundant
1452 except in the case of a `const_int' rtx. Select the section by
1453 calling `text_section' or one of the alternatives for other
1456 Do not define this macro if you put all constants in the read-only
1459 #undef SELECT_RTX_SECTION
1461 /* Define this macro if jump tables (for tablejump insns) should be
1462 output in the text section, along with the assembler instructions.
1463 Otherwise, the readonly data section is used.
1464 This macro is irrelevant if there is no separate readonly data section. */
1465 /*#define JUMP_TABLES_IN_TEXT_SECTION*/
1467 /* Define this macro if references to a symbol must be treated
1468 differently depending on something about the variable or
1469 function named by the symbol (such as what section it is in).
1471 The macro definition, if any, is executed immediately after the
1472 rtl for DECL or other node is created.
1473 The value of the rtl will be a `mem' whose address is a
1476 The usual thing for this macro to do is to store a flag in the
1477 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1478 name string in the `symbol_ref' (if one bit is not enough
1481 #define SDATA_FLAG_CHAR '@'
1482 /* Small objects are recorded with no prefix for space efficiency since
1483 they'll be the most common. This isn't the case if the user passes
1484 -mmodel={medium|large} and one could choose to not mark symbols that
1485 are the default, but that complicates things. */
1486 /*#define SMALL_FLAG_CHAR '#'*/
1487 #define MEDIUM_FLAG_CHAR '%'
1488 #define LARGE_FLAG_CHAR '&'
1490 #define SDATA_NAME_P(NAME) (*(NAME) == SDATA_FLAG_CHAR)
1491 /*#define SMALL_NAME_P(NAME) (*(NAME) == SMALL_FLAG_CHAR)*/
1492 #define SMALL_NAME_P(NAME) (! ENCODED_NAME_P (NAME) && ! LIT_NAME_P (NAME))
1493 #define MEDIUM_NAME_P(NAME) (*(NAME) == MEDIUM_FLAG_CHAR)
1494 #define LARGE_NAME_P(NAME) (*(NAME) == LARGE_FLAG_CHAR)
1495 /* For string literals, etc. */
1496 #define LIT_NAME_P(NAME) ((NAME)[0] == '*' && (NAME)[1] == '.')
1498 #define ENCODED_NAME_P(SYMBOL_NAME) \
1499 (SDATA_NAME_P (SYMBOL_NAME) \
1500 /*|| SMALL_NAME_P (SYMBOL_NAME)*/ \
1501 || MEDIUM_NAME_P (SYMBOL_NAME) \
1502 || LARGE_NAME_P (SYMBOL_NAME))
1504 #define ENCODE_SECTION_INFO(DECL) m32r_encode_section_info (DECL)
1506 /* Decode SYM_NAME and store the real name part in VAR, sans
1507 the characters that encode section info. Define this macro if
1508 ENCODE_SECTION_INFO alters the symbol's name string. */
1509 /* Note that we have to handle symbols like "%*start". */
1510 #define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \
1512 (VAR) = (SYMBOL_NAME) + ENCODED_NAME_P (SYMBOL_NAME); \
1513 (VAR) += *(VAR) == '*'; \
1518 /* The register number of the register used to address a table of static
1519 data addresses in memory. In some cases this register is defined by a
1520 processor's ``application binary interface'' (ABI). When this macro
1521 is defined, RTL is generated for this register once, as with the stack
1522 pointer and frame pointer registers. If this macro is not defined, it
1523 is up to the machine-dependent files to allocate such a register (if
1525 /*#define PIC_OFFSET_TABLE_REGNUM 12*/
1527 /* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is
1528 clobbered by calls. Do not define this macro if PIC_OFFSET_TABLE_REGNUM
1530 /* This register is call-saved on the M32R. */
1531 /*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/
1533 /* By generating position-independent code, when two different programs (A
1534 and B) share a common library (libC.a), the text of the library can be
1535 shared whether or not the library is linked at the same address for both
1536 programs. In some of these environments, position-independent code
1537 requires not only the use of different addressing modes, but also
1538 special code to enable the use of these addressing modes.
1540 The FINALIZE_PIC macro serves as a hook to emit these special
1541 codes once the function is being compiled into assembly code, but not
1542 before. (It is not done before, because in the case of compiling an
1543 inline function, it would lead to multiple PIC prologues being
1544 included in functions which used inline functions and were compiled to
1545 assembly language.) */
1547 /*#define FINALIZE_PIC m32r_finalize_pic ()*/
1549 /* A C expression that is nonzero if X is a legitimate immediate
1550 operand on the target machine when generating position independent code.
1551 You can assume that X satisfies CONSTANT_P, so you need not
1552 check this. You can also assume `flag_pic' is true, so you need not
1553 check it either. You need not define this macro if all constants
1554 (including SYMBOL_REF) can be immediate operands when generating
1555 position independent code. */
1556 /*#define LEGITIMATE_PIC_OPERAND_P(X)*/
1558 /* Control the assembler format that we output. */
1560 /* Output at beginning of assembler file. */
1561 #define ASM_FILE_START(FILE) m32r_asm_file_start (FILE)
1563 /* A C string constant describing how to begin a comment in the target
1564 assembler language. The compiler assumes that the comment will
1565 end at the end of the line. */
1566 #define ASM_COMMENT_START ";"
1568 /* Output to assembler file text saying following lines
1569 may contain character constants, extra white space, comments, etc. */
1570 #define ASM_APP_ON ""
1572 /* Output to assembler file text saying following lines
1573 no longer contain unusual constructs. */
1574 #define ASM_APP_OFF ""
1576 /* This is how to output an assembler line defining a `char' constant. */
1577 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
1579 fprintf (FILE, "\t.byte\t"); \
1580 output_addr_const (FILE, (VALUE)); \
1581 fprintf (FILE, "\n"); \
1584 /* This is how to output an assembler line defining a `short' constant. */
1585 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
1587 fprintf (FILE, "\t.hword\t"); \
1588 output_addr_const (FILE, (VALUE)); \
1589 fprintf (FILE, "\n"); \
1592 /* This is how to output an assembler line defining an `int' constant.
1593 We also handle symbol output here. */
1594 #define ASM_OUTPUT_INT(FILE, VALUE) \
1596 fprintf (FILE, "\t.word\t"); \
1597 output_addr_const (FILE, (VALUE)); \
1598 fprintf (FILE, "\n"); \
1601 /* This is how to output an assembler line defining a `float' constant. */
1602 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
1606 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1607 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1608 fprintf (FILE, "\t.word\t0x%lx %s %s\n", \
1609 t, ASM_COMMENT_START, str); \
1612 /* This is how to output an assembler line defining a `double' constant. */
1613 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
1617 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1618 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1619 fprintf (FILE, "\t.word\t0x%lx %s %s\n\t.word\t0x%lx\n", \
1620 t[0], ASM_COMMENT_START, str, t[1]); \
1623 /* This is how to output an assembler line for a numeric constant byte. */
1624 #define ASM_OUTPUT_BYTE(FILE, VALUE) \
1625 fprintf (FILE, "\t%s\t0x%x\n", ASM_BYTE_OP, (VALUE))
1627 /* The assembler's parentheses characters. */
1628 #define ASM_OPEN_PAREN "("
1629 #define ASM_CLOSE_PAREN ")"
1631 /* This is how to output the definition of a user-level label named NAME,
1632 such as the label on a static function or variable NAME. */
1633 /* On the M32R we need to ensure the next instruction starts on a 32 bit
1634 boundary [the previous insn must either be 2 16 bit insns or 1 32 bit]. */
1635 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1637 assemble_name (FILE, NAME); \
1638 fputs (":\n", FILE); \
1641 /* This is how to output a command to make the user-level label named NAME
1642 defined for reference from other files. */
1643 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1645 fputs ("\t.global\t", FILE); \
1646 assemble_name (FILE, NAME); \
1647 fputs ("\n", FILE); \
1650 /* This is how to output a reference to a user-level label named NAME.
1651 `assemble_name' uses this. */
1652 #undef ASM_OUTPUT_LABELREF
1653 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1656 STRIP_NAME_ENCODING (real_name, (NAME)); \
1657 fprintf (FILE, "%s%s", USER_LABEL_PREFIX, real_name); \
1660 /* CYGNUS LOCAL -- m32rx/meissner */
1661 /* For the m32r if -Os, don't force line number label to begin
1662 at the beginning of the word. */
1664 #undef ASM_OUTPUT_SOURCE_LINE
1665 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
1668 static int sym_lineno = 1; \
1669 fprintf (file, ".stabn 68,0,%d,.LM%d-", \
1670 line, sym_lineno); \
1671 assemble_name (file, \
1672 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));\
1674 (optimize_size) ? "\n\t.debugsym .LM%d\n" : "\n.LM%d:\n", \
1679 /* END CYGNUS LOCAL -- m32rx/meissner */
1681 /* Store in OUTPUT a string (made with alloca) containing
1682 an assembler-name for a local static variable named NAME.
1683 LABELNO is an integer which is different for each call. */
1684 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1686 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
1687 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)); \
1690 /* How to refer to registers in assembler output.
1691 This sequence is indexed by compiler's hard-register-number (see above). */
1692 #define REGISTER_NAMES \
1694 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1695 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", \
1699 /* If defined, a C initializer for an array of structures containing
1700 a name and a register number. This macro defines additional names
1701 for hard registers, thus allowing the `asm' option in declarations
1702 to refer to registers using alternate names. */
1703 #define ADDITIONAL_REGISTER_NAMES \
1705 /*{ "gp", GP_REGNUM },*/ \
1706 { "r13", FRAME_POINTER_REGNUM }, \
1707 { "r14", RETURN_ADDR_REGNUM }, \
1708 { "r15", STACK_POINTER_REGNUM }, \
1711 /* A C expression which evaluates to true if CODE is a valid
1712 punctuation character for use in the `PRINT_OPERAND' macro. */
1713 extern char m32r_punct_chars[];
1714 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1715 m32r_punct_chars[(unsigned char) (CHAR)]
1717 /* Print operand X (an rtx) in assembler syntax to file FILE.
1718 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1719 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1720 #define PRINT_OPERAND(FILE, X, CODE) \
1721 m32r_print_operand (FILE, X, CODE)
1723 /* A C compound statement to output to stdio stream STREAM the
1724 assembler syntax for an instruction operand that is a memory
1725 reference whose address is ADDR. ADDR is an RTL expression.
1727 On some machines, the syntax for a symbolic address depends on
1728 the section that the address refers to. On these machines,
1729 define the macro `ENCODE_SECTION_INFO' to store the information
1730 into the `symbol_ref', and then check for it here. */
1731 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1732 m32r_print_operand_address (FILE, ADDR)
1734 /* If defined, C string expressions to be used for the `%R', `%L',
1735 `%U', and `%I' options of `asm_fprintf' (see `final.c'). These
1736 are useful when a single `md' file must support multiple assembler
1737 formats. In that case, the various `tm.h' files can define these
1738 macros differently. */
1739 #define REGISTER_PREFIX ""
1740 #define LOCAL_LABEL_PREFIX ".L"
1741 #define USER_LABEL_PREFIX ""
1742 #define IMMEDIATE_PREFIX "#"
1744 /* This is how to output an element of a case-vector that is absolute. */
1745 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1748 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1749 fprintf (FILE, "\t.word\t"); \
1750 assemble_name (FILE, label); \
1751 fprintf (FILE, "\n"); \
1754 /* This is how to output an element of a case-vector that is relative. */
1755 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1758 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1759 fprintf (FILE, "\t.word\t"); \
1760 assemble_name (FILE, label); \
1761 fprintf (FILE, "-"); \
1762 ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \
1763 assemble_name (FILE, label); \
1764 fprintf (FILE, ")\n"); \
1767 /* The desired alignment for the location counter at the beginning
1769 /* On the M32R, align loops to 32 byte boundaries (cache line size)
1770 if -malign-loops. */
1771 #define LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0)
1773 /* This is how to output an assembler line
1774 that says to advance the location counter
1775 to a multiple of 2**LOG bytes. */
1776 /* .balign is used to avoid confusion. */
1777 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1778 do { if ((LOG) != 0) fprintf (FILE, "\t.balign %d\n", 1 << (LOG)); } while (0)
1780 /* Like `ASM_OUTPUT_COMMON' except takes the required alignment as a
1781 separate, explicit argument. If you define this macro, it is used in
1782 place of `ASM_OUTPUT_COMMON', and gives you more flexibility in
1783 handling the required alignment of the variable. The alignment is
1784 specified as the number of bits. */
1786 #define SCOMMON_ASM_OP ".scomm"
1788 #undef ASM_OUTPUT_ALIGNED_COMMON
1789 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
1791 if (! TARGET_SDATA_NONE \
1792 && (SIZE) > 0 && (SIZE) <= g_switch_value) \
1793 fprintf ((FILE), "\t%s\t", SCOMMON_ASM_OP); \
1795 fprintf ((FILE), "\t%s\t", COMMON_ASM_OP); \
1796 assemble_name ((FILE), (NAME)); \
1797 fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \
1800 #if 0 /* not needed, delete later */
1801 /* Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a
1802 separate, explicit argument. If you define this macro, it is used in
1803 place of `ASM_OUTPUT_LOCAL', and gives you more flexibility in
1804 handling the required alignment of the variable. The alignment is
1805 specified as the number of bits. */
1807 #undef ASM_OUTPUT_ALIGNED_LOCAL
1808 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
1810 if ((SIZE) > 0 && (SIZE) <= g_switch_value) \
1813 ASM_OUTPUT_ALIGN (FILE, exact_log2 (ALIGN / BITS_PER_UNIT)); \
1814 ASM_OUTPUT_LABEL (FILE, NAME); \
1815 ASM_OUTPUT_SKIP (FILE, SIZE); \
1816 if (!flag_inhibit_size_directive) \
1818 fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
1819 assemble_name (FILE, NAME); \
1820 fprintf (FILE, ",%d\n", SIZE); \
1825 /* This is copied from svr4.h. */ \
1826 fprintf ((FILE), "\t%s\t", LOCAL_ASM_OP); \
1827 assemble_name ((FILE), (NAME)); \
1828 fprintf ((FILE), "\n"); \
1829 ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \
1834 /* Like `ASM_OUTPUT_BSS' except takes the required alignment as a
1835 separate, explicit argument. If you define this macro, it is used in
1836 place of `ASM_OUTPUT_BSS', and gives you more flexibility in
1837 handling the required alignment of the variable. The alignment is
1838 specified as the number of bits.
1840 For the M32R we need sbss support. */
1842 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
1844 ASM_GLOBALIZE_LABEL (FILE, NAME); \
1845 ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \
1848 /* Debugging information. */
1850 /* Generate DBX and DWARF debugging information. */
1851 #define DBX_DEBUGGING_INFO
1852 #define DWARF_DEBUGGING_INFO
1854 /* Prefer STABS (for now). */
1855 #undef PREFERRED_DEBUGGING_TYPE
1856 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
1858 /* How to renumber registers for dbx and gdb. */
1859 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1861 /* Turn off splitting of long stabs. */
1862 #define DBX_CONTIN_LENGTH 0
1864 /* Miscellaneous. */
1866 /* Specify the machine mode that this machine uses
1867 for the index in the tablejump instruction. */
1868 #define CASE_VECTOR_MODE Pmode
1870 /* Define as C expression which evaluates to nonzero if the tablejump
1871 instruction expects the table to contain offsets from the address of the
1873 Do not define this if the table should contain absolute addresses. */
1874 /* It's not clear what PIC will look like or whether we want to use -fpic
1875 for the embedded form currently being talked about. For now require -fpic
1876 to get pc relative switch tables. */
1877 /*#define CASE_VECTOR_PC_RELATIVE 1 */
1879 /* Define if operations between registers always perform the operation
1880 on the full register even if a narrower mode is specified. */
1881 #define WORD_REGISTER_OPERATIONS
1883 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1884 will either zero-extend or sign-extend. The value of this macro should
1885 be the code that says which one of the two operations is implicitly
1886 done, NIL if none. */
1887 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1889 /* Specify the tree operation to be used to convert reals to integers. */
1890 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1892 /* This is the kind of divide that is easiest to do in the general case. */
1893 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1895 /* Max number of bytes we can move from memory to memory
1896 in one reasonably fast instruction. */
1899 /* Define this to be nonzero if shift instructions ignore all but the low-order
1901 #define SHIFT_COUNT_TRUNCATED 1
1903 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1904 is done just by pretending it is already truncated. */
1905 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1907 /* We assume that the store-condition-codes instructions store 0 for false
1908 and some other value for true. This is the value stored for true. */
1909 #define STORE_FLAG_VALUE 1
1911 /* Specify the machine mode that pointers have.
1912 After generation of rtl, the compiler makes no further distinction
1913 between pointers and any other objects of this machine mode. */
1914 /* ??? The M32R doesn't have full 32 bit pointers, but making this PSImode has
1915 it's own problems (you have to add extendpsisi2 and truncsipsi2).
1917 #define Pmode SImode
1919 /* A function address in a call instruction. */
1920 #define FUNCTION_MODE SImode
1922 /* A C expression whose value is nonzero if IDENTIFIER with arguments ARGS
1923 is a valid machine specific attribute for DECL.
1924 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1925 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, IDENTIFIER, ARGS) \
1926 m32r_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
1928 /* A C expression that returns zero if the attributes on TYPE1 and TYPE2 are
1929 incompatible, one if they are compatible, and two if they are
1930 nearly compatible (which causes a warning to be generated). */
1931 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1932 m32r_comp_type_attributes (TYPE1, TYPE2)
1934 /* Give newly defined TYPE some default attributes. */
1935 #define SET_DEFAULT_TYPE_ATTRIBUTES(TYPE) \
1936 m32r_set_default_type_attributes (TYPE)
1938 /* Define the information needed to generate branch and scc insns. This is
1939 stored from the compare operation. Note that we can't use "rtx" here
1940 since it hasn't been defined! */
1941 extern struct rtx_def * m32r_compare_op0;
1942 extern struct rtx_def * m32r_compare_op1;
1944 /* M32R function types. */
1945 enum m32r_function_type
1947 M32R_FUNCTION_UNKNOWN, M32R_FUNCTION_NORMAL, M32R_FUNCTION_INTERRUPT
1949 #define M32R_INTERRUPT_P(TYPE) \
1950 ((TYPE) == M32R_FUNCTION_INTERRUPT)
1952 /* Define this if you have defined special-purpose predicates in the
1953 file `MACHINE.c'. This macro is called within an initializer of an
1954 array of structures. The first field in the structure is the name
1955 of a predicate and the second field is an array of rtl codes. For
1956 each predicate, list all rtl codes that can be in expressions
1957 matched by the predicate. The list should have a trailing comma. */
1959 #define PREDICATE_CODES \
1960 { "conditional_move_operand", { REG, SUBREG, CONST_INT }}, \
1961 { "carry_compare_operand", { EQ, NE }}, \
1962 { "eqne_comparison_operator", { EQ, NE }}, \
1963 { "signed_comparison_operator", { EQ, NE, LT, LE, GT, GE }}, \
1964 { "move_dest_operand", { REG, SUBREG, MEM }}, \
1965 { "move_src_operand", { REG, SUBREG, MEM, CONST_INT, \
1966 CONST_DOUBLE, LABEL_REF, CONST, \
1968 { "move_double_src_operand", { REG, SUBREG, MEM, CONST_INT, \
1970 { "two_insn_const_operand", { CONST_INT }}, \
1971 { "symbolic_operand", { SYMBOL_REF, LABEL_REF, CONST }}, \
1972 { "reg_or_int16_operand", { REG, SUBREG, CONST_INT }}, \
1973 { "reg_or_uint16_operand", { REG, SUBREG, CONST_INT }}, \
1974 { "reg_or_cmp_int16_operand", { REG, SUBREG, CONST_INT }}, \
1975 { "reg_or_zero_operand", { REG, SUBREG, CONST_INT }}, \
1976 { "cmp_int16_operand", { CONST_INT }}, \
1977 { "call_address_operand", { SYMBOL_REF, LABEL_REF, CONST }}, \
1978 { "small_insn_p", { INSN, CALL_INSN, JUMP_INSN }}, \
1979 { "large_insn_p", { INSN, CALL_INSN, JUMP_INSN }},
1981 /* Functions declared in m32r.c */
1983 #if defined (USE_PROTOTYPES) ? USE_PROTOTYPES : defined (__STDC__)
1984 #define PROTO(ARGS) ARGS
1986 #define PROTO(ARGS) ()
1990 #ifdef BUFSIZE /* stdio.h has been included, ok to use FILE * */
1991 #define STDIO_PROTO(ARGS) PROTO(ARGS)
1993 #define STDIO_PROTO(ARGS) ()
1998 #define Tree union tree_node *
2005 #define Rtx struct rtx_def *
2010 extern void sbss_section PROTO((void));
2011 extern void sdata_section PROTO((void));
2012 extern void m32r_init PROTO((void));
2013 extern int m32r_valid_machine_decl_attribute PROTO((Tree, Tree, Tree, Tree));
2014 extern int m32r_comp_type_attributes PROTO((Tree, Tree));
2015 extern void m32r_select_section PROTO((Tree, int));
2016 extern void m32r_encode_section_info PROTO((Tree));
2017 extern void m32r_init_expanders PROTO((void));
2018 extern int call_address_operand PROTO((Rtx, int));
2019 extern int call_operand PROTO((Rtx, int));
2020 extern int symbolic_operand PROTO((Rtx, int));
2021 extern int small_data_operand PROTO((Rtx, int));
2022 extern int addr24_operand PROTO((Rtx, int));
2023 extern int addr32_operand PROTO((Rtx, int));
2024 extern int call26_operand PROTO((Rtx, int));
2025 extern int seth_add3_operand PROTO((Rtx, int));
2026 extern int cmp_int16_operand PROTO((Rtx, int));
2027 extern int uint16_operand PROTO((Rtx, int));
2028 extern int reg_or_int16_operand PROTO((Rtx, int));
2029 extern int reg_or_uint16_operand PROTO((Rtx, int));
2030 extern int reg_or_cmp_nt16_operand PROTO((Rtx, int));
2031 extern int two_insn_const_operand PROTO((Rtx, int));
2032 extern int move_src_operand PROTO((Rtx, int));
2033 extern int move_double_src_operand PROTO((Rtx, int));
2034 extern int move_dest_operand PROTO((Rtx, int));
2035 extern int easy_di_const PROTO((Rtx));
2036 extern int easy_df_const PROTO((Rtx));
2037 extern int eqne_comparison_operator PROTO((Rtx, int));
2038 extern int signed_comparison_operator PROTO((Rtx, int));
2039 extern int memreg_operand PROTO((Rtx, int));
2040 extern int small_insn_p PROTO((Rtx, int));
2041 extern int large_insn_p PROTO((Rtx, int));
2042 extern int m32r_select_cc_mode PROTO((int, Rtx, Rtx));
2043 extern Rtx gen_compare PROTO((int, Rtx, Rtx, int));
2044 extern Rtx gen_split_move_double PROTO((Rtx *));
2045 extern int function_arg_partial_nregs PROTO((CUMULATIVE_ARGS *,
2047 extern void m32r_setup_incoming_varargs PROTO((CUMULATIVE_ARGS *,
2050 extern int m32r_address_code PROTO((Rtx));
2051 extern enum m32r_function_type m32r_compute_function_type
2053 extern unsigned m32r_compute_frame_size PROTO((int));
2054 extern int m32r_first_insn_address PROTO((void));
2055 extern void m32r_expand_prologue PROTO((void));
2056 extern void m32r_output_function_prologue STDIO_PROTO((FILE *, int));
2057 extern void m32r_output_function_epilogue STDIO_PROTO((FILE *, int));
2058 extern void m32r_finalize_pic PROTO((void));
2059 extern void m32r_initialize_trampoline PROTO((Rtx, Rtx, Rtx));
2060 extern void m32r_asm_file_start STDIO_PROTO((FILE *));
2061 extern void m32r_print_operand STDIO_PROTO((FILE *, Rtx, int));
2062 extern void m32r_print_operand_address STDIO_PROTO((FILE *, Rtx));
2063 extern int zero_and_one PROTO((Rtx, Rtx));
2064 extern int conditional_move_operand PROTO((Rtx, int));
2065 extern int carry_compare_operand PROTO((Rtx, int));
2066 extern char *emit_cond_move PROTO((Rtx *, Rtx));
2068 /* Needed by a peephole optimisation. */
2069 #define PRESERVE_DEATH_INFO_REGNO_P(regno) (regno < FIRST_PSEUDO_REGISTER)
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