1 ;; Predicate definitions for IA-32 and x86-64.
2 ;; Copyright (C) 2004 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 2, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING. If not, write to
18 ;; the Free Software Foundation, 59 Temple Place - Suite 330,
19 ;; Boston, MA 02111-1307, USA.
21 ;; Return nonzero if OP is either a i387 or SSE fp register.
22 (define_predicate "any_fp_register_operand"
23 (and (match_code "reg")
24 (match_test "ANY_FP_REGNO_P (REGNO (op))")))
26 ;; Return nonzero if OP is an i387 fp register.
27 (define_predicate "fp_register_operand"
28 (and (match_code "reg")
29 (match_test "FP_REGNO_P (REGNO (op))")))
31 ;; Return nonzero if OP is a non-fp register_operand.
32 (define_predicate "register_and_not_any_fp_reg_operand"
33 (and (match_code "reg")
34 (not (match_test "ANY_FP_REGNO_P (REGNO (op))"))))
36 ;; Return nonzero if OP is a register operand other than an i387 fp register.
37 (define_predicate "register_and_not_fp_reg_operand"
38 (and (match_code "reg")
39 (not (match_test "FP_REGNO_P (REGNO (op))"))))
41 ;; True if the operand is an MMX register.
42 (define_predicate "mmx_reg_operand"
43 (and (match_code "reg")
44 (match_test "MMX_REGNO_P (REGNO (op))")))
46 ;; True if the operand is a Q_REGS class register.
47 (define_predicate "q_regs_operand"
48 (match_operand 0 "register_operand")
50 if (GET_CODE (op) == SUBREG)
52 return ANY_QI_REG_P (op);
55 ;; Return true if op is a NON_Q_REGS class register.
56 (define_predicate "non_q_regs_operand"
57 (match_operand 0 "register_operand")
59 if (GET_CODE (op) == SUBREG)
61 return NON_QI_REG_P (op);
64 ;; Match an SI or HImode register for a zero_extract.
65 (define_special_predicate "ext_register_operand"
66 (match_operand 0 "register_operand")
68 if ((!TARGET_64BIT || GET_MODE (op) != DImode)
69 && GET_MODE (op) != SImode && GET_MODE (op) != HImode)
71 if (GET_CODE (op) == SUBREG)
74 /* Be careful to accept only registers having upper parts. */
75 return REGNO (op) > LAST_VIRTUAL_REGISTER || REGNO (op) < 4;
78 ;; Return true if op is the flags register.
79 (define_predicate "flags_reg_operand"
80 (and (match_code "reg")
81 (match_test "REGNO (op) == FLAGS_REG")))
83 ;; Return 1 if VALUE can be stored in a sign extended immediate field.
84 (define_predicate "x86_64_immediate_operand"
85 (match_code "const_int,symbol_ref,label_ref,const")
88 return immediate_operand (op, mode);
90 switch (GET_CODE (op))
93 /* CONST_DOUBLES never match, since HOST_BITS_PER_WIDE_INT is known
94 to be at least 32 and this all acceptable constants are
95 represented as CONST_INT. */
96 if (HOST_BITS_PER_WIDE_INT == 32)
100 HOST_WIDE_INT val = trunc_int_for_mode (INTVAL (op), DImode);
101 return trunc_int_for_mode (val, SImode) == val;
106 /* For certain code models, the symbolic references are known to fit.
107 in CM_SMALL_PIC model we know it fits if it is local to the shared
108 library. Don't count TLS SYMBOL_REFs here, since they should fit
109 only if inside of UNSPEC handled below. */
110 /* TLS symbols are not constant. */
111 if (tls_symbolic_operand (op, Pmode))
113 return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_KERNEL);
116 /* For certain code models, the code is near as well. */
117 return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM
118 || ix86_cmodel == CM_KERNEL);
121 /* We also may accept the offsetted memory references in certain
123 if (GET_CODE (XEXP (op, 0)) == UNSPEC)
124 switch (XINT (XEXP (op, 0), 1))
126 case UNSPEC_GOTPCREL:
128 case UNSPEC_GOTNTPOFF:
135 if (GET_CODE (XEXP (op, 0)) == PLUS)
137 rtx op1 = XEXP (XEXP (op, 0), 0);
138 rtx op2 = XEXP (XEXP (op, 0), 1);
139 HOST_WIDE_INT offset;
141 if (ix86_cmodel == CM_LARGE)
143 if (GET_CODE (op2) != CONST_INT)
145 offset = trunc_int_for_mode (INTVAL (op2), DImode);
146 switch (GET_CODE (op1))
149 /* For CM_SMALL assume that latest object is 16MB before
150 end of 31bits boundary. We may also accept pretty
151 large negative constants knowing that all objects are
152 in the positive half of address space. */
153 if (ix86_cmodel == CM_SMALL
154 && offset < 16*1024*1024
155 && trunc_int_for_mode (offset, SImode) == offset)
157 /* For CM_KERNEL we know that all object resist in the
158 negative half of 32bits address space. We may not
159 accept negative offsets, since they may be just off
160 and we may accept pretty large positive ones. */
161 if (ix86_cmodel == CM_KERNEL
163 && trunc_int_for_mode (offset, SImode) == offset)
168 /* These conditions are similar to SYMBOL_REF ones, just the
169 constraints for code models differ. */
170 if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
171 && offset < 16*1024*1024
172 && trunc_int_for_mode (offset, SImode) == offset)
174 if (ix86_cmodel == CM_KERNEL
176 && trunc_int_for_mode (offset, SImode) == offset)
181 switch (XINT (op1, 1))
186 && trunc_int_for_mode (offset, SImode) == offset)
204 ;; Return 1 if VALUE can be stored in the zero extended immediate field.
205 (define_predicate "x86_64_zext_immediate_operand"
206 (match_code "const_double,const_int,symbol_ref,label_ref,const")
208 switch (GET_CODE (op))
211 if (HOST_BITS_PER_WIDE_INT == 32)
212 return (GET_MODE (op) == VOIDmode && !CONST_DOUBLE_HIGH (op));
217 if (HOST_BITS_PER_WIDE_INT == 32)
218 return INTVAL (op) >= 0;
220 return !(INTVAL (op) & ~(HOST_WIDE_INT) 0xffffffff);
223 /* For certain code models, the symbolic references are known to fit. */
224 /* TLS symbols are not constant. */
225 if (tls_symbolic_operand (op, Pmode))
227 return ix86_cmodel == CM_SMALL;
230 /* For certain code models, the code is near as well. */
231 return ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM;
234 /* We also may accept the offsetted memory references in certain
236 if (GET_CODE (XEXP (op, 0)) == PLUS)
238 rtx op1 = XEXP (XEXP (op, 0), 0);
239 rtx op2 = XEXP (XEXP (op, 0), 1);
241 if (ix86_cmodel == CM_LARGE)
243 switch (GET_CODE (op1))
246 /* For small code model we may accept pretty large positive
247 offsets, since one bit is available for free. Negative
248 offsets are limited by the size of NULL pointer area
249 specified by the ABI. */
250 if (ix86_cmodel == CM_SMALL
251 && GET_CODE (op2) == CONST_INT
252 && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
253 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
255 /* ??? For the kernel, we may accept adjustment of
256 -0x10000000, since we know that it will just convert
257 negative address space to positive, but perhaps this
258 is not worthwhile. */
262 /* These conditions are similar to SYMBOL_REF ones, just the
263 constraints for code models differ. */
264 if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
265 && GET_CODE (op2) == CONST_INT
266 && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
267 && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
283 ;; Return nonzero if OP is general operand representable on x86_64.
284 (define_predicate "x86_64_general_operand"
285 (if_then_else (match_test "TARGET_64BIT")
286 (ior (match_operand 0 "nonimmediate_operand")
287 (match_operand 0 "x86_64_immediate_operand"))
288 (match_operand 0 "general_operand")))
290 ;; Return nonzero if OP is general operand representable on x86_64
291 ;; as either sign extended or zero extended constant.
292 (define_predicate "x86_64_szext_general_operand"
293 (if_then_else (match_test "TARGET_64BIT")
294 (ior (match_operand 0 "nonimmediate_operand")
295 (ior (match_operand 0 "x86_64_immediate_operand")
296 (match_operand 0 "x86_64_zext_immediate_operand")))
297 (match_operand 0 "general_operand")))
299 ;; Return nonzero if OP is nonmemory operand representable on x86_64.
300 (define_predicate "x86_64_nonmemory_operand"
301 (if_then_else (match_test "TARGET_64BIT")
302 (ior (match_operand 0 "register_operand")
303 (match_operand 0 "x86_64_immediate_operand"))
304 (match_operand 0 "nonmemory_operand")))
306 ;; Return nonzero if OP is nonmemory operand representable on x86_64.
307 (define_predicate "x86_64_szext_nonmemory_operand"
308 (if_then_else (match_test "TARGET_64BIT")
309 (ior (match_operand 0 "register_operand")
310 (ior (match_operand 0 "x86_64_immediate_operand")
311 (match_operand 0 "x86_64_zext_immediate_operand")))
312 (match_operand 0 "nonmemory_operand")))
314 ;; Return nonzero if OP is nonmemory operand acceptable by movabs patterns.
315 (define_predicate "x86_64_movabs_operand"
316 (if_then_else (match_test "!TARGET_64BIT || !flag_pic")
317 (match_operand 0 "nonmemory_operand")
318 (ior (match_operand 0 "register_operand")
319 (and (match_operand 0 "const_double_operand")
320 (match_test "GET_MODE_SIZE (mode) <= 8")))))
322 ;; Return nonzero if OP is CONST_INT >= 1 and <= 31 (a valid operand
323 ;; for shift & compare patterns, as shifting by 0 does not change flags).
324 (define_predicate "const_int_1_31_operand"
325 (and (match_code "const_int")
326 (match_test "INTVAL (op) >= 1 && INTVAL (op) <= 31")))
328 ;; Returns nonzero if OP is either a symbol reference or a sum of a symbol
329 ;; reference and a constant.
330 (define_predicate "symbolic_operand"
331 (match_code "symbol_ref,label_ref,const")
333 switch (GET_CODE (op))
341 if (GET_CODE (op) == SYMBOL_REF
342 || GET_CODE (op) == LABEL_REF
343 || (GET_CODE (op) == UNSPEC
344 && (XINT (op, 1) == UNSPEC_GOT
345 || XINT (op, 1) == UNSPEC_GOTOFF
346 || XINT (op, 1) == UNSPEC_GOTPCREL)))
348 if (GET_CODE (op) != PLUS
349 || GET_CODE (XEXP (op, 1)) != CONST_INT)
353 if (GET_CODE (op) == SYMBOL_REF
354 || GET_CODE (op) == LABEL_REF)
356 /* Only @GOTOFF gets offsets. */
357 if (GET_CODE (op) != UNSPEC
358 || XINT (op, 1) != UNSPEC_GOTOFF)
361 op = XVECEXP (op, 0, 0);
362 if (GET_CODE (op) == SYMBOL_REF
363 || GET_CODE (op) == LABEL_REF)
372 ;; Return true if the operand contains a @GOT or @GOTOFF reference.
373 (define_predicate "pic_symbolic_operand"
379 if (GET_CODE (op) == UNSPEC
380 && XINT (op, 1) == UNSPEC_GOTPCREL)
382 if (GET_CODE (op) == PLUS
383 && GET_CODE (XEXP (op, 0)) == UNSPEC
384 && XINT (XEXP (op, 0), 1) == UNSPEC_GOTPCREL)
389 if (GET_CODE (op) == UNSPEC)
391 if (GET_CODE (op) != PLUS
392 || GET_CODE (XEXP (op, 1)) != CONST_INT)
395 if (GET_CODE (op) == UNSPEC)
401 ;; Return true if OP is a symbolic operand that resolves locally.
402 (define_predicate "local_symbolic_operand"
403 (match_code "const,label_ref,symbol_ref")
405 if (GET_CODE (op) == CONST
406 && GET_CODE (XEXP (op, 0)) == PLUS
407 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT)
408 op = XEXP (XEXP (op, 0), 0);
410 if (GET_CODE (op) == LABEL_REF)
413 if (GET_CODE (op) != SYMBOL_REF)
416 if (SYMBOL_REF_LOCAL_P (op))
419 /* There is, however, a not insubstantial body of code in the rest of
420 the compiler that assumes it can just stick the results of
421 ASM_GENERATE_INTERNAL_LABEL in a symbol_ref and have done. */
422 /* ??? This is a hack. Should update the body of the compiler to
423 always create a DECL an invoke targetm.encode_section_info. */
424 if (strncmp (XSTR (op, 0), internal_label_prefix,
425 internal_label_prefix_len) == 0)
431 ;; Test for various thread-local symbols.
432 (define_predicate "tls_symbolic_operand"
433 (and (match_code "symbol_ref")
434 (match_test "SYMBOL_REF_TLS_MODEL (op) != 0")))
436 (define_predicate "global_dynamic_symbolic_operand"
437 (and (match_code "symbol_ref")
438 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC")))
440 (define_predicate "local_dynamic_symbolic_operand"
441 (and (match_code "symbol_ref")
442 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
444 (define_predicate "initial_exec_symbolic_operand"
445 (and (match_code "symbol_ref")
446 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC")))
448 (define_predicate "local_exec_symbolic_operand"
449 (and (match_code "symbol_ref")
450 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC")))
452 ;; Test for a pc-relative call operand
453 (define_predicate "constant_call_address_operand"
454 (ior (match_code "symbol_ref")
455 (match_operand 0 "local_symbolic_operand")))
457 ;; True for any non-virtual or eliminable register. Used in places where
458 ;; instantiation of such a register may cause the pattern to not be recognized.
459 (define_predicate "register_no_elim_operand"
460 (match_operand 0 "register_operand")
462 if (GET_CODE (op) == SUBREG)
463 op = SUBREG_REG (op);
464 return !(op == arg_pointer_rtx
465 || op == frame_pointer_rtx
466 || (REGNO (op) >= FIRST_PSEUDO_REGISTER
467 && REGNO (op) <= LAST_VIRTUAL_REGISTER));
470 ;; Similarly, but include the stack pointer. This is used to prevent esp
471 ;; from being used as an index reg.
472 (define_predicate "index_register_operand"
473 (match_operand 0 "register_operand")
475 if (GET_CODE (op) == SUBREG)
476 op = SUBREG_REG (op);
477 return !(op == stack_pointer_rtx
478 || op == arg_pointer_rtx
479 || op == frame_pointer_rtx
480 || (REGNO (op) >= FIRST_PSEUDO_REGISTER
481 && REGNO (op) <= LAST_VIRTUAL_REGISTER));
484 ;; Return false if this is any eliminable register. Otherwise general_operand.
485 (define_predicate "general_no_elim_operand"
486 (if_then_else (match_code "reg,subreg")
487 (match_operand 0 "register_no_elim_operand")
488 (match_operand 0 "general_operand")))
490 ;; Return false if this is any eliminable register. Otherwise
491 ;; register_operand or a constant.
492 (define_predicate "nonmemory_no_elim_operand"
493 (ior (match_operand 0 "register_no_elim_operand")
494 (match_operand 0 "immediate_operand")))
496 ;; Test for a valid operand for a call instruction.
497 (define_predicate "call_insn_operand"
498 (ior (match_operand 0 "constant_call_address_operand")
499 (ior (match_operand 0 "register_no_elim_operand")
500 (match_operand 0 "memory_operand"))))
502 ;; Simiarly, but for tail calls, in which we cannot allow memory references.
503 (define_predicate "sibcall_insn_operand"
504 (ior (match_operand 0 "constant_call_address_operand")
505 (match_operand 0 "register_no_elim_operand")))
507 ;; Match exactly zero.
508 (define_predicate "const0_operand"
509 (and (match_code "const_int,const_double,const_vector")
510 (match_test "op == CONST0_RTX (mode)")))
512 ;; Match exactly one.
513 (define_predicate "const1_operand"
514 (and (match_code "const_int")
515 (match_test "op == const1_rtx")))
517 ;; Match 2, 4, or 8. Used for leal multiplicands.
518 (define_predicate "const248_operand"
519 (match_code "const_int")
521 HOST_WIDE_INT i = INTVAL (op);
522 return i == 2 || i == 4 || i == 8;
526 (define_predicate "const_0_to_3_operand"
527 (and (match_code "const_int")
528 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 3")))
531 (define_predicate "const_0_to_7_operand"
532 (and (match_code "const_int")
533 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))
536 (define_predicate "const_0_to_15_operand"
537 (and (match_code "const_int")
538 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 15")))
541 (define_predicate "const_0_to_255_operand"
542 (and (match_code "const_int")
543 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 255")))
545 ;; True if this is a constant appropriate for an increment or decrement.
546 (define_predicate "incdec_operand"
547 (match_code "const_int")
549 /* On Pentium4, the inc and dec operations causes extra dependency on flag
550 registers, since carry flag is not set. */
551 if ((TARGET_PENTIUM4 || TARGET_NOCONA) && !optimize_size)
553 return op == const1_rtx || op == constm1_rtx;
556 ;; True for registers, or 1 or -1. Used to optimize double-word shifts.
557 (define_predicate "reg_or_pm1_operand"
558 (ior (match_operand 0 "register_operand")
559 (and (match_code "const_int")
560 (match_test "op == const1_rtx || op == constm1_rtx"))))
562 ;; True if OP is acceptable as operand of DImode shift expander.
563 (define_predicate "shiftdi_operand"
564 (if_then_else (match_test "TARGET_64BIT")
565 (match_operand 0 "nonimmediate_operand")
566 (match_operand 0 "register_operand")))
568 (define_predicate "ashldi_input_operand"
569 (if_then_else (match_test "TARGET_64BIT")
570 (match_operand 0 "nonimmediate_operand")
571 (match_operand 0 "reg_or_pm1_operand")))
573 ;; Return true if OP is a vector load from the constant pool with just
574 ;; the first element nonzero.
575 (define_predicate "zero_extended_scalar_load_operand"
579 op = maybe_get_pool_constant (op);
582 if (GET_CODE (op) != CONST_VECTOR)
585 (GET_MODE_SIZE (GET_MODE (op)) /
586 GET_MODE_SIZE (GET_MODE_INNER (GET_MODE (op))));
587 for (n_elts--; n_elts > 0; n_elts--)
589 rtx elt = CONST_VECTOR_ELT (op, n_elts);
590 if (elt != CONST0_RTX (GET_MODE_INNER (GET_MODE (op))))
596 ;; Return 1 when OP is operand acceptable for standard SSE move.
597 (define_predicate "vector_move_operand"
598 (ior (match_operand 0 "nonimmediate_operand")
599 (match_operand 0 "const0_operand")))
601 ;; Return true if op if a valid address, and does not contain
602 ;; a segment override.
603 (define_special_predicate "no_seg_address_operand"
604 (match_operand 0 "address_operand")
606 struct ix86_address parts;
607 if (! ix86_decompose_address (op, &parts))
609 return parts.seg == SEG_DEFAULT;
612 ;; Return nonzero if the rtx is known aligned.
613 (define_predicate "aligned_operand"
614 (match_operand 0 "general_operand")
616 struct ix86_address parts;
618 /* Registers and immediate operands are always "aligned". */
619 if (GET_CODE (op) != MEM)
622 /* Don't even try to do any aligned optimizations with volatiles. */
623 if (MEM_VOLATILE_P (op))
627 /* Pushes and pops are only valid on the stack pointer. */
628 if (GET_CODE (op) == PRE_DEC
629 || GET_CODE (op) == POST_INC)
632 /* Decode the address. */
633 if (!ix86_decompose_address (op, &parts))
636 /* Look for some component that isn't known to be aligned. */
639 if (REGNO_POINTER_ALIGN (REGNO (parts.index)) * parts.scale < 32)
644 if (REGNO_POINTER_ALIGN (REGNO (parts.base)) < 32)
649 if (GET_CODE (parts.disp) != CONST_INT
650 || (INTVAL (parts.disp) & 3) != 0)
654 /* Didn't find one -- this must be an aligned address. */
658 ;; Returns 1 if OP is memory operand with a displacement.
659 (define_predicate "memory_displacement_operand"
660 (match_operand 0 "memory_operand")
662 struct ix86_address parts;
663 if (!ix86_decompose_address (XEXP (op, 0), &parts))
665 return parts.disp != NULL_RTX;
668 ;; Returns 1 if OP is memory operand that cannot be represented
669 ;; by the modRM array.
670 (define_predicate "long_memory_operand"
671 (and (match_operand 0 "memory_operand")
672 (match_test "memory_address_length (op) != 0")))
674 ;; Return 1 if OP is a comparison operator that can be issued by fcmov.
675 (define_predicate "fcmov_comparison_operator"
676 (match_operand 0 "comparison_operator")
678 enum machine_mode inmode = GET_MODE (XEXP (op, 0));
679 enum rtx_code code = GET_CODE (op);
681 if (inmode == CCFPmode || inmode == CCFPUmode)
683 enum rtx_code second_code, bypass_code;
684 ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
685 if (bypass_code != UNKNOWN || second_code != UNKNOWN)
687 code = ix86_fp_compare_code_to_integer (code);
689 /* i387 supports just limited amount of conditional codes. */
692 case LTU: case GTU: case LEU: case GEU:
693 if (inmode == CCmode || inmode == CCFPmode || inmode == CCFPUmode)
696 case ORDERED: case UNORDERED:
704 ;; Return 1 if OP is a comparison that can be used in the CMPSS/CMPPS insns.
705 ;; The first set are supported directly; the second set can't be done with
706 ;; full IEEE support, i.e. NaNs.
708 ;; ??? It would seem that we have a lot of uses of this predicate that pass
709 ;; it the wrong mode. We got away with this because the old function didn't
710 ;; check the mode at all. Mirror that for now by calling this a special
713 (define_special_predicate "sse_comparison_operator"
714 (ior (match_code "eq,lt,le,unordered,ne,unge,ungt,ordered")
715 (and (match_code "uneq,unlt,unle,ltgt,ge,gt")
716 (match_code "!TARGET_IEEE_FP"))))
718 ;; Return 1 if OP is a valid comparison operator in valid mode.
719 (define_predicate "ix86_comparison_operator"
720 (match_operand 0 "comparison_operator")
722 enum machine_mode inmode = GET_MODE (XEXP (op, 0));
723 enum rtx_code code = GET_CODE (op);
725 if (inmode == CCFPmode || inmode == CCFPUmode)
727 enum rtx_code second_code, bypass_code;
728 ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
729 return (bypass_code == UNKNOWN && second_code == UNKNOWN);
736 if (inmode == CCmode || inmode == CCGCmode
737 || inmode == CCGOCmode || inmode == CCNOmode)
740 case LTU: case GTU: case LEU: case ORDERED: case UNORDERED: case GEU:
741 if (inmode == CCmode)
745 if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode)
753 ;; Return 1 if OP is a valid comparison operator testing carry flag to be set.
754 (define_predicate "ix86_carry_flag_operator"
755 (match_code "ltu,lt,unlt,gt,ungt,le,unle,ge,unge,ltgt,uneq")
757 enum machine_mode inmode = GET_MODE (XEXP (op, 0));
758 enum rtx_code code = GET_CODE (op);
760 if (GET_CODE (XEXP (op, 0)) != REG
761 || REGNO (XEXP (op, 0)) != FLAGS_REG
762 || XEXP (op, 1) != const0_rtx)
765 if (inmode == CCFPmode || inmode == CCFPUmode)
767 enum rtx_code second_code, bypass_code;
768 ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
769 if (bypass_code != UNKNOWN || second_code != UNKNOWN)
771 code = ix86_fp_compare_code_to_integer (code);
773 else if (inmode != CCmode)
779 ;; Nearly general operand, but accept any const_double, since we wish
780 ;; to be able to drop them into memory rather than have them get pulled
782 (define_predicate "cmp_fp_expander_operand"
783 (ior (match_code "const_double")
784 (match_operand 0 "general_operand")))
786 ;; Return true if this is a valid binary floating-point operation.
787 (define_predicate "binary_fp_operator"
788 (match_code "plus,minus,mult,div"))
790 ;; Return true if this is a multiply operation.
791 (define_predicate "mult_operator"
794 ;; Return true if this is a division operation.
795 (define_predicate "div_operator"
798 ;; Return true for ARITHMETIC_P.
799 (define_predicate "arith_or_logical_operator"
800 (match_code "PLUS,MULT,AND,IOR,XOR,SMIN,SMAX,UMIN,UMAX,COMPARE,MINUS,DIV,
801 MOD,UDIV,UMOD,ASHIFT,ROTATE,ASHIFTRT,LSHIFTRT,ROTATERT"))
803 ;; Return 1 if OP is a binary operator that can be promoted to wider mode.
804 ;; Modern CPUs have same latency for HImode and SImode multiply,
805 ;; but 386 and 486 do HImode multiply faster. */
806 (define_predicate "promotable_binary_operator"
807 (ior (match_code "plus,and,ior,xor,ashift")
808 (and (match_code "mult")
809 (match_test "ix86_tune > PROCESSOR_I486"))))
811 ;; To avoid problems when jump re-emits comparisons like testqi_ext_ccno_0,
812 ;; re-recognize the operand to avoid a copy_to_mode_reg that will fail.
814 ;; ??? It seems likely that this will only work because cmpsi is an
815 ;; expander, and no actual insns use this.
817 (define_predicate "cmpsi_operand_1"
820 return (GET_MODE (op) == SImode
821 && GET_CODE (XEXP (op, 0)) == ZERO_EXTRACT
822 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT
823 && GET_CODE (XEXP (XEXP (op, 0), 2)) == CONST_INT
824 && INTVAL (XEXP (XEXP (op, 0), 1)) == 8
825 && INTVAL (XEXP (XEXP (op, 0), 2)) == 8
826 && GET_CODE (XEXP (op, 1)) == CONST_INT);
829 (define_predicate "cmpsi_operand"
830 (ior (match_operand 0 "nonimmediate_operand")
831 (match_operand 0 "cmpsi_operand_1")))