1 /* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008, 2009, 2010
3 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GCC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
28 #include "c-family/c-common.h"
31 #include "target-def.h"
33 #include "c-family/c-pragma.h"
35 static bool ix86_pragma_target_parse (tree, tree);
36 static void ix86_target_macros_internal
37 (HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit,
38 void (*def_or_undef) (cpp_reader *, const char *));
41 /* Internal function to either define or undef the appropriate system
44 ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
45 enum processor_type arch,
46 enum processor_type tune,
47 enum fpmath_unit fpmath,
48 void (*def_or_undef) (cpp_reader *,
51 /* For some of the k6/pentium varients there weren't seperate ISA bits to
52 identify which tune/arch flag was passed, so figure it out here. */
53 size_t arch_len = strlen (ix86_arch_string);
54 size_t tune_len = strlen (ix86_tune_string);
55 int last_arch_char = ix86_arch_string[arch_len - 1];
56 int last_tune_char = ix86_tune_string[tune_len - 1];
58 /* Built-ins based on -march=. */
64 def_or_undef (parse_in, "__i486");
65 def_or_undef (parse_in, "__i486__");
67 case PROCESSOR_PENTIUM:
68 def_or_undef (parse_in, "__i586");
69 def_or_undef (parse_in, "__i586__");
70 def_or_undef (parse_in, "__pentium");
71 def_or_undef (parse_in, "__pentium__");
72 if (isa_flag & OPTION_MASK_ISA_MMX)
73 def_or_undef (parse_in, "__pentium_mmx__");
75 case PROCESSOR_PENTIUMPRO:
76 def_or_undef (parse_in, "__i686");
77 def_or_undef (parse_in, "__i686__");
78 def_or_undef (parse_in, "__pentiumpro");
79 def_or_undef (parse_in, "__pentiumpro__");
82 def_or_undef (parse_in, "__geode");
83 def_or_undef (parse_in, "__geode__");
86 def_or_undef (parse_in, "__k6");
87 def_or_undef (parse_in, "__k6__");
88 if (last_arch_char == '2')
89 def_or_undef (parse_in, "__k6_2__");
90 else if (last_arch_char == '3')
91 def_or_undef (parse_in, "__k6_3__");
92 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
93 def_or_undef (parse_in, "__k6_3__");
95 case PROCESSOR_ATHLON:
96 def_or_undef (parse_in, "__athlon");
97 def_or_undef (parse_in, "__athlon__");
98 if (isa_flag & OPTION_MASK_ISA_SSE)
99 def_or_undef (parse_in, "__athlon_sse__");
102 def_or_undef (parse_in, "__k8");
103 def_or_undef (parse_in, "__k8__");
105 case PROCESSOR_AMDFAM10:
106 def_or_undef (parse_in, "__amdfam10");
107 def_or_undef (parse_in, "__amdfam10__");
109 case PROCESSOR_BDVER1:
110 def_or_undef (parse_in, "__bdver1");
111 def_or_undef (parse_in, "__bdver1__");
113 case PROCESSOR_BDVER2:
114 def_or_undef (parse_in, "__bdver2");
115 def_or_undef (parse_in, "__bdver2__");
117 case PROCESSOR_BTVER1:
118 def_or_undef (parse_in, "__btver1");
119 def_or_undef (parse_in, "__btver1__");
121 case PROCESSOR_PENTIUM4:
122 def_or_undef (parse_in, "__pentium4");
123 def_or_undef (parse_in, "__pentium4__");
125 case PROCESSOR_NOCONA:
126 def_or_undef (parse_in, "__nocona");
127 def_or_undef (parse_in, "__nocona__");
129 case PROCESSOR_CORE2_32:
130 case PROCESSOR_CORE2_64:
131 def_or_undef (parse_in, "__core2");
132 def_or_undef (parse_in, "__core2__");
134 case PROCESSOR_COREI7_32:
135 case PROCESSOR_COREI7_64:
136 def_or_undef (parse_in, "__corei7");
137 def_or_undef (parse_in, "__corei7__");
140 def_or_undef (parse_in, "__atom");
141 def_or_undef (parse_in, "__atom__");
143 /* use PROCESSOR_max to not set/unset the arch macro. */
146 case PROCESSOR_GENERIC32:
147 case PROCESSOR_GENERIC64:
151 /* Built-ins based on -mtune=. */
155 def_or_undef (parse_in, "__tune_i386__");
158 def_or_undef (parse_in, "__tune_i486__");
160 case PROCESSOR_PENTIUM:
161 def_or_undef (parse_in, "__tune_i586__");
162 def_or_undef (parse_in, "__tune_pentium__");
163 if (last_tune_char == 'x')
164 def_or_undef (parse_in, "__tune_pentium_mmx__");
166 case PROCESSOR_PENTIUMPRO:
167 def_or_undef (parse_in, "__tune_i686__");
168 def_or_undef (parse_in, "__tune_pentiumpro__");
169 switch (last_tune_char)
172 def_or_undef (parse_in, "__tune_pentium3__");
175 def_or_undef (parse_in, "__tune_pentium2__");
179 case PROCESSOR_GEODE:
180 def_or_undef (parse_in, "__tune_geode__");
183 def_or_undef (parse_in, "__tune_k6__");
184 if (last_tune_char == '2')
185 def_or_undef (parse_in, "__tune_k6_2__");
186 else if (last_tune_char == '3')
187 def_or_undef (parse_in, "__tune_k6_3__");
188 else if (isa_flag & OPTION_MASK_ISA_3DNOW)
189 def_or_undef (parse_in, "__tune_k6_3__");
191 case PROCESSOR_ATHLON:
192 def_or_undef (parse_in, "__tune_athlon__");
193 if (isa_flag & OPTION_MASK_ISA_SSE)
194 def_or_undef (parse_in, "__tune_athlon_sse__");
197 def_or_undef (parse_in, "__tune_k8__");
199 case PROCESSOR_AMDFAM10:
200 def_or_undef (parse_in, "__tune_amdfam10__");
202 case PROCESSOR_BDVER1:
203 def_or_undef (parse_in, "__tune_bdver1__");
205 case PROCESSOR_BDVER2:
206 def_or_undef (parse_in, "__tune_bdver2__");
208 case PROCESSOR_BTVER1:
209 def_or_undef (parse_in, "__tune_btver1__");
211 case PROCESSOR_PENTIUM4:
212 def_or_undef (parse_in, "__tune_pentium4__");
214 case PROCESSOR_NOCONA:
215 def_or_undef (parse_in, "__tune_nocona__");
217 case PROCESSOR_CORE2_32:
218 case PROCESSOR_CORE2_64:
219 def_or_undef (parse_in, "__tune_core2__");
221 case PROCESSOR_COREI7_32:
222 case PROCESSOR_COREI7_64:
223 def_or_undef (parse_in, "__tune_corei7__");
226 def_or_undef (parse_in, "__tune_atom__");
228 case PROCESSOR_GENERIC32:
229 case PROCESSOR_GENERIC64:
231 /* use PROCESSOR_max to not set/unset the tune macro. */
236 if (isa_flag & OPTION_MASK_ISA_MMX)
237 def_or_undef (parse_in, "__MMX__");
238 if (isa_flag & OPTION_MASK_ISA_3DNOW)
239 def_or_undef (parse_in, "__3dNOW__");
240 if (isa_flag & OPTION_MASK_ISA_3DNOW_A)
241 def_or_undef (parse_in, "__3dNOW_A__");
242 if (isa_flag & OPTION_MASK_ISA_SSE)
243 def_or_undef (parse_in, "__SSE__");
244 if (isa_flag & OPTION_MASK_ISA_SSE2)
245 def_or_undef (parse_in, "__SSE2__");
246 if (isa_flag & OPTION_MASK_ISA_SSE3)
247 def_or_undef (parse_in, "__SSE3__");
248 if (isa_flag & OPTION_MASK_ISA_SSSE3)
249 def_or_undef (parse_in, "__SSSE3__");
250 if (isa_flag & OPTION_MASK_ISA_SSE4_1)
251 def_or_undef (parse_in, "__SSE4_1__");
252 if (isa_flag & OPTION_MASK_ISA_SSE4_2)
253 def_or_undef (parse_in, "__SSE4_2__");
254 if (isa_flag & OPTION_MASK_ISA_AES)
255 def_or_undef (parse_in, "__AES__");
256 if (isa_flag & OPTION_MASK_ISA_PCLMUL)
257 def_or_undef (parse_in, "__PCLMUL__");
258 if (isa_flag & OPTION_MASK_ISA_AVX)
259 def_or_undef (parse_in, "__AVX__");
260 if (isa_flag & OPTION_MASK_ISA_AVX2)
261 def_or_undef (parse_in, "__AVX2__");
262 if (isa_flag & OPTION_MASK_ISA_FMA)
263 def_or_undef (parse_in, "__FMA__");
264 if (isa_flag & OPTION_MASK_ISA_SSE4A)
265 def_or_undef (parse_in, "__SSE4A__");
266 if (isa_flag & OPTION_MASK_ISA_FMA4)
267 def_or_undef (parse_in, "__FMA4__");
268 if (isa_flag & OPTION_MASK_ISA_XOP)
269 def_or_undef (parse_in, "__XOP__");
270 if (isa_flag & OPTION_MASK_ISA_LWP)
271 def_or_undef (parse_in, "__LWP__");
272 if (isa_flag & OPTION_MASK_ISA_ABM)
273 def_or_undef (parse_in, "__ABM__");
274 if (isa_flag & OPTION_MASK_ISA_BMI)
275 def_or_undef (parse_in, "__BMI__");
276 if (isa_flag & OPTION_MASK_ISA_BMI2)
277 def_or_undef (parse_in, "__BMI2__");
278 if (isa_flag & OPTION_MASK_ISA_LZCNT)
279 def_or_undef (parse_in, "__LZCNT__");
280 if (isa_flag & OPTION_MASK_ISA_TBM)
281 def_or_undef (parse_in, "__TBM__");
282 if (isa_flag & OPTION_MASK_ISA_POPCNT)
283 def_or_undef (parse_in, "__POPCNT__");
284 if (isa_flag & OPTION_MASK_ISA_FSGSBASE)
285 def_or_undef (parse_in, "__FSGSBASE__");
286 if (isa_flag & OPTION_MASK_ISA_RDRND)
287 def_or_undef (parse_in, "__RDRND__");
288 if (isa_flag & OPTION_MASK_ISA_F16C)
289 def_or_undef (parse_in, "__F16C__");
290 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
291 def_or_undef (parse_in, "__SSE_MATH__");
292 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
293 def_or_undef (parse_in, "__SSE2_MATH__");
297 /* Hook to validate the current #pragma GCC target and set the state, and
298 update the macros based on what was changed. If ARGS is NULL, then
299 POP_TARGET is used to reset the options. */
302 ix86_pragma_target_parse (tree args, tree pop_target)
304 tree prev_tree = build_target_option_node ();
306 struct cl_target_option *prev_opt;
307 struct cl_target_option *cur_opt;
308 HOST_WIDE_INT prev_isa;
309 HOST_WIDE_INT cur_isa;
310 HOST_WIDE_INT diff_isa;
311 enum processor_type prev_arch;
312 enum processor_type prev_tune;
313 enum processor_type cur_arch;
314 enum processor_type cur_tune;
318 cur_tree = ((pop_target)
320 : target_option_default_node);
321 cl_target_option_restore (&global_options,
322 TREE_TARGET_OPTION (cur_tree));
326 cur_tree = ix86_valid_target_attribute_tree (args);
331 target_option_current_node = cur_tree;
333 /* Figure out the previous/current isa, arch, tune and the differences. */
334 prev_opt = TREE_TARGET_OPTION (prev_tree);
335 cur_opt = TREE_TARGET_OPTION (cur_tree);
336 prev_isa = prev_opt->x_ix86_isa_flags;
337 cur_isa = cur_opt->x_ix86_isa_flags;
338 diff_isa = (prev_isa ^ cur_isa);
339 prev_arch = (enum processor_type) prev_opt->arch;
340 prev_tune = (enum processor_type) prev_opt->tune;
341 cur_arch = (enum processor_type) cur_opt->arch;
342 cur_tune = (enum processor_type) cur_opt->tune;
344 /* If the same processor is used for both previous and current options, don't
345 change the macros. */
346 if (cur_arch == prev_arch)
347 cur_arch = prev_arch = PROCESSOR_max;
349 if (cur_tune == prev_tune)
350 cur_tune = prev_tune = PROCESSOR_max;
352 /* Undef all of the macros for that are no longer current. */
353 ix86_target_macros_internal (prev_isa & diff_isa,
356 (enum fpmath_unit) prev_opt->x_ix86_fpmath,
359 /* Define all of the macros for new options that were just turned on. */
360 ix86_target_macros_internal (cur_isa & diff_isa,
363 (enum fpmath_unit) cur_opt->x_ix86_fpmath,
369 /* Function to tell the preprocessor about the defines for the current target. */
372 ix86_target_macros (void)
374 /* 32/64-bit won't change with target specific options, so do the assert and
375 builtin_define_std calls here. */
378 cpp_assert (parse_in, "cpu=x86_64");
379 cpp_assert (parse_in, "machine=x86_64");
380 cpp_define (parse_in, "__amd64");
381 cpp_define (parse_in, "__amd64__");
382 cpp_define (parse_in, "__x86_64");
383 cpp_define (parse_in, "__x86_64__");
386 cpp_define (parse_in, "_ILP32");
387 cpp_define (parse_in, "__ILP32__");
392 cpp_assert (parse_in, "cpu=i386");
393 cpp_assert (parse_in, "machine=i386");
394 builtin_define_std ("i386");
397 ix86_target_macros_internal (ix86_isa_flags,
405 /* Register target pragmas. We need to add the hook for parsing #pragma GCC
406 option here rather than in i386.c since it will pull in various preprocessor
407 functions, and those are not present in languages like fortran without a
411 ix86_register_pragmas (void)
413 /* Update pragma hook to allow parsing #pragma GCC target. */
414 targetm.target_option.pragma_parse = ix86_pragma_target_parse;
416 #ifdef REGISTER_SUBTARGET_PRAGMAS
417 REGISTER_SUBTARGET_PRAGMAS ();