1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
28 /* Target CPU builtins. */
29 #define TARGET_CPU_CPP_BUILTINS() \
32 builtin_define_std ("GCC"); \
33 builtin_define_std ("gcc"); \
34 builtin_assert ("machine=i370"); \
35 builtin_assert ("cpu=i370"); \
39 /* Run-time compilation parameters selecting different hardware subsets. */
41 extern int target_flags;
43 /* The sizes of the code and literals on the current page. */
45 extern int mvs_page_code, mvs_page_lit;
47 /* The current page number and the base page number for the function. */
49 extern int mvs_page_num, function_base_page;
51 /* The name of the current function. */
53 extern char *mvs_function_name;
55 /* The length of the function name malloc'd area. */
57 extern int mvs_function_name_length;
59 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
60 these are more than twice as fast as load-op-store.
61 On 3090 don't use this since load-op-store is much faster. */
63 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
65 /* Default target switches */
67 #define TARGET_DEFAULT 1
69 /* Macro to define tables used to set the flags. This is a list in braces
70 of pairs in braces, each pair being { "NAME", VALUE }
71 where VALUE is the bits to set or minus the bits to clear.
72 An empty string NAME is used to identify the default VALUE. */
74 #define TARGET_SWITCHES \
75 { { "char-instructions", 1, N_("Generate char instructions")}, \
76 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
77 { "", TARGET_DEFAULT, 0} }
79 /* To use IBM supplied macro function prologue and epilogue, define the
80 following to 1. Should only be needed if IBM changes the definition
81 of their prologue and epilogue. */
83 #define MACROPROLOGUE 0
84 #define MACROEPILOGUE 0
86 /* Target machine storage layout */
88 /* Define this if most significant bit is lowest numbered in instructions
89 that operate on numbered bit-fields. */
91 #define BITS_BIG_ENDIAN 1
93 /* Define this if most significant byte of a word is the lowest numbered. */
95 #define BYTES_BIG_ENDIAN 1
97 /* Define this if MS word of a multiword is the lowest numbered. */
99 #define WORDS_BIG_ENDIAN 1
101 /* Width of a word, in units (bytes). */
103 #define UNITS_PER_WORD 4
105 /* Allocation boundary (in *bits*) for storing pointers in memory. */
107 #define POINTER_BOUNDARY 32
109 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
111 #define PARM_BOUNDARY 32
113 /* Boundary (in *bits*) on which stack pointer should be aligned. */
115 #define STACK_BOUNDARY 32
117 /* Allocation boundary (in *bits*) for the code of a function. */
119 #define FUNCTION_BOUNDARY 32
121 /* There is no point aligning anything to a rounder boundary than this. */
123 #define BIGGEST_ALIGNMENT 64
125 /* Alignment of field after `int : 0' in a structure. */
127 #define EMPTY_FIELD_BOUNDARY 32
129 /* Define this if move instructions will actually fail to work when given
132 #define STRICT_ALIGNMENT 0
134 /* Define target floating point format. */
136 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
138 /* Define character mapping for cross-compiling. */
139 /* but only define it if really needed, since otherwise it will break builds */
143 #define MAP_CHARACTER(c) ((char)(c))
145 #define MAP_CHARACTER(c) ((char)mvs_map_char (c))
150 /* HLASM requires #pragma map. */
151 #define REGISTER_TARGET_PRAGMAS(PFILE) \
152 cpp_register_pragma (PFILE, 0, "map", i370_pr_map)
153 #endif /* TARGET_HLASM */
155 /* Define maximum length of page minus page escape overhead. */
157 #define MAX_MVS_PAGE_LENGTH 4080
159 /* Define special register allocation order desired.
160 Don't fiddle with this. I did, and I got all sorts of register
161 spill errors when compiling even relatively simple programs...
162 I have no clue why ...
163 E.g. this one is bad:
164 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
167 #define REG_ALLOC_ORDER \
168 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
170 /* Standard register usage. */
172 /* Number of actual hardware registers. The hardware registers are
173 assigned numbers for the compiler from 0 to just below
174 FIRST_PSEUDO_REGISTER.
175 All registers that the compiler knows about must be given numbers,
176 even those that are not normally considered general registers.
177 For the 370, we give the data registers numbers 0-15,
178 and the floating point registers numbers 16-19. */
180 #define FIRST_PSEUDO_REGISTER 20
182 /* Define base and page registers. */
184 #define BASE_REGISTER 3
185 #define PAGE_REGISTER 4
188 /* 1 for registers that have pervasive standard uses and are not available
189 for the register allocator. These are registers that must have fixed,
190 valid values stored in them for the entire length of the subroutine call,
191 and must not in any way be moved around, jiggered with, etc. That is,
192 they must never be clobbered, and, if clobbered, the register allocator
193 will never restore them back.
195 We use five registers in this special way:
196 -- R3 which is used as the base register
197 -- R4 the page origin table pointer used to load R3,
198 -- R11 the arg pointer.
199 -- R12 the TCA pointer
200 -- R13 the stack (DSA) pointer
202 A fifth register is also exceptional: R14 is used in many branch
203 instructions to hold the target of the branch. Technically, this
204 does not qualify R14 as a register with a long-term meaning; it should
205 be enough, theoretically, to note that these instructions clobber
206 R14, and let the compiler deal with that. In practice, however,
207 the "clobber" directive acts as a barrier to optimization, and the
208 optimizer appears to be unable to perform optimizations around branches.
209 Thus, a much better strategy appears to give R14 a pervasive use;
210 this eliminates it from the register pool witout hurting optimization.
212 There are other registers which have special meanings, but its OK
213 for them to get clobbered, since other allocator config below will
214 make sure that they always have the right value. These are for
216 -- R1 the returned structure pointer.
217 -- R10 the static chain reg.
218 -- R15 holds the value a subroutine returns.
220 Notice that it is *almost* safe to mark R11 as available to the allocator.
221 By marking it as a call_used_register, in most cases, the compiler
222 can handle it being clobbered. However, there are a few rare
223 circumstances where the register allocator will allocate r11 and
224 also try to use it as the arg pointer ... thus it must be marked fixed.
225 I think this is a bug, but I can't track it down...
228 #define FIXED_REGISTERS \
229 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
230 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
232 /* 1 for registers not available across function calls. These must include
233 the FIXED_REGISTERS and also any registers that can be used without being
235 The latter must include the registers where values are returned
236 and the register where structure-value addresses are passed.
237 NOTE: all floating registers are undefined across calls.
240 #define CALL_USED_REGISTERS \
241 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
242 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
244 /* Return number of consecutive hard regs needed starting at reg REGNO
245 to hold something of mode MODE.
246 This is ordinarily the length in words of a value of mode MODE
247 but can be less for certain modes in special long registers.
248 Note that DCmode (complex double) needs two regs.
250 #endif /* TARGET_HLASM */
252 /* ================= */
253 #ifdef TARGET_ELF_ABI
254 /* The Linux/ELF ABI uses the same register layout as the
255 * the MVS/OE version, with the following exceptions:
256 * -- r12 (rtca) is not used.
259 #define FIXED_REGISTERS \
260 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
261 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
263 #define CALL_USED_REGISTERS \
264 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
265 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
267 #endif /* TARGET_ELF_ABI */
268 /* ================= */
271 #define HARD_REGNO_NREGS(REGNO, MODE) \
273 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
274 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
276 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
277 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
278 even registers can hold DI. The floating point registers can hold
279 either SF, DF, SC or DC. */
281 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
282 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
283 (((MODE) != DImode) && ((MODE) != DFmode))) \
284 : ((MODE) == SFmode || (MODE) == DFmode) || \
285 (MODE) == SCmode || (MODE) == DCmode)
287 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
288 mode MODE1 and one has mode MODE2.
289 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
290 for any hard reg, then this must be 0 for correct output. */
292 #define MODES_TIEABLE_P(MODE1, MODE2) \
293 (((MODE1) == SFmode || (MODE1) == DFmode) \
294 == ((MODE2) == SFmode || (MODE2) == DFmode))
296 /* Specify the registers used for certain standard purposes.
297 The values of these macros are register numbers. */
299 /* 370 PC isn't overloaded on a register. */
301 /* #define PC_REGNUM */
303 /* Register to use for pushing function arguments. */
305 #define STACK_POINTER_REGNUM 13
307 /* Base register for access to local variables of the function. */
309 #define FRAME_POINTER_REGNUM 13
311 /* Value should be nonzero if functions must have frame pointers.
312 Zero means the frame pointer need not be set up (and parms may be
313 accessed via the stack pointer) in functions that seem suitable.
314 This is computed in `reload', in reload1.c. */
316 #define FRAME_POINTER_REQUIRED 1
318 /* Base register for access to arguments of the function. */
320 #define ARG_POINTER_REGNUM 11
322 /* R10 is register in which static-chain is passed to a function.
323 Static-chaining is done when a nested function references as a global
324 a stack variable of its parent: e.g.
325 int parent_func (int arg) {
326 int x; // x is in parents stack
327 void child_func (void) { x++: } // child references x as global var
332 #define STATIC_CHAIN_REGNUM 10
334 /* R1 is register in which address to store a structure value is passed to
335 a function. This is used only when returning 64-bit long-long in a 32-bit arch
336 and when calling functions that return structs by value. e.g.
337 typedef struct A_s { int a,b,c; } A_t;
338 A_t fun_returns_value (void) {
339 A_t a; a.a=1; a.b=2 a.c=3;
342 In the above, the storage for the return value is in the callers stack, and
343 the R1 points at that mem location.
346 #define STRUCT_VALUE_REGNUM 1
348 /* Define the classes of registers for register constraints in the
349 machine description. Also define ranges of constants.
351 One of the classes must always be named ALL_REGS and include all hard regs.
352 If there is more than one class, another class must be named NO_REGS
353 and contain no registers.
355 The name GENERAL_REGS must be the name of a class (or an alias for
356 another name such as ALL_REGS). This is the class of registers
357 that is allowed by "g" or "r" in a register constraint.
358 Also, registers outside this class are allocated only when
359 instructions express preferences for them.
361 The classes must be numbered in nondecreasing order; that is,
362 a larger-numbered class must never be contained completely
363 in a smaller-numbered class.
365 For any two classes, it is very desirable that there be another
366 class that represents their union. */
370 NO_REGS, ADDR_REGS, DATA_REGS,
371 FP_REGS, ALL_REGS, LIM_REG_CLASSES
374 #define GENERAL_REGS DATA_REGS
375 #define N_REG_CLASSES (int) LIM_REG_CLASSES
377 /* Give names of register classes as strings for dump file. */
379 #define REG_CLASS_NAMES \
380 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
382 /* Define which registers fit in which classes. This is an initializer for
383 a vector of HARD_REG_SET of length N_REG_CLASSES. */
385 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
387 /* The same information, inverted:
388 Return the class number of the smallest class containing
389 reg number REGNO. This could be a conditional expression
390 or could index an array. */
392 #define REGNO_REG_CLASS(REGNO) \
393 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
395 /* The class value for index registers, and the one for base regs. */
397 #define INDEX_REG_CLASS ADDR_REGS
398 #define BASE_REG_CLASS ADDR_REGS
400 /* Get reg_class from a letter such as appears in the machine description. */
402 #define REG_CLASS_FROM_LETTER(C) \
403 ((C) == 'a' ? ADDR_REGS : \
404 ((C) == 'd' ? DATA_REGS : \
405 ((C) == 'f' ? FP_REGS : NO_REGS)))
407 /* The letters I, J, K, L and M in a register constraint string can be used
408 to stand for particular ranges of immediate operands.
409 This macro defines what the ranges are.
410 C is the letter, and VALUE is a constant value.
411 Return 1 if VALUE is in the range specified by C. */
413 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
414 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
415 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
416 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
418 /* Similar, but for floating constants, and defining letters G and H.
419 Here VALUE is the CONST_DOUBLE rtx itself. */
421 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
423 /* see recog.c for details */
424 #define EXTRA_CONSTRAINT(OP,C) \
425 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
426 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
428 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
429 return the class of reg to actually use. In general this is just CLASS;
430 but on some machines in some cases it is preferable to use a more
433 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
434 rare occasions when lots of egisters are spilled, reload() will try
435 to put a const int into r0 and then use r0 as an index register.
438 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
439 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
440 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
441 GET_CODE(X) == LABEL_REF || \
442 GET_CODE(X) == SYMBOL_REF || \
443 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
445 /* Return the maximum number of consecutive registers needed to represent
446 mode MODE in a register of class CLASS.
447 Note that DCmode (complex double) needs two regs.
450 #define CLASS_MAX_NREGS(CLASS, MODE) \
451 ((CLASS) == FP_REGS ? \
452 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
453 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
455 /* Stack layout; function entry, exit and calling. */
457 /* Define this if pushing a word on the stack makes the stack pointer a
459 /* ------------------------------------------------------------------- */
461 /* ================= */
463 /* #define STACK_GROWS_DOWNWARD */
465 /* Define this if the nominal address of the stack frame is at the
466 high-address end of the local variables; that is, each additional local
467 variable allocated goes at a more negative offset in the frame. */
469 /* #define FRAME_GROWS_DOWNWARD */
471 /* Offset within stack frame to start allocating local variables at.
472 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
473 first local allocated. Otherwise, it is the offset to the BEGINNING
474 of the first local allocated. */
476 #define STARTING_FRAME_OFFSET \
477 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
479 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
481 /* If we generate an insn to push BYTES bytes, this says how many the stack
482 pointer really advances by. On the 370, we have no push instruction. */
484 #endif /* TARGET_HLASM */
486 /* ================= */
487 #ifdef TARGET_ELF_ABI
489 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
490 But we want the compiler to generate posistive displacements from the
491 stack pointer, and so we make the frame lie above the stack. */
493 #define STACK_GROWS_DOWNWARD
494 /* #define FRAME_GROWS_DOWNWARD */
496 /* Offset within stack frame to start allocating local variables at.
497 This is the offset to the BEGINNING of the first local allocated. */
499 #define STARTING_FRAME_OFFSET \
500 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
502 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
504 #endif /* TARGET_ELF_ABI */
505 /* ================= */
507 /* #define PUSH_ROUNDING(BYTES) */
509 /* Accumulate the outgoing argument count so we can request the right
510 DSA size and determine stack offset. */
512 #define ACCUMULATE_OUTGOING_ARGS 1
514 /* Define offset from stack pointer, to location where a parm can be
517 #define STACK_POINTER_OFFSET 148
519 /* Offset of first parameter from the argument pointer register value. */
521 #define FIRST_PARM_OFFSET(FNDECL) 0
523 /* 1 if N is a possible register number for function argument passing.
524 On the 370, no registers are used in this way. */
526 #define FUNCTION_ARG_REGNO_P(N) 0
528 /* Define a data type for recording info about an argument list during
529 the scan of that argument list. This data type should hold all
530 necessary information about the function itself and about the args
531 processed so far, enough to enable macros such as FUNCTION_ARG to
532 determine where the next arg should go. */
534 #define CUMULATIVE_ARGS int
536 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
537 a function whose data type is FNTYPE.
538 For a library call, FNTYPE is 0. */
540 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
542 /* Update the data in CUM to advance over an argument of mode MODE and
543 data type TYPE. (TYPE is null for libcalls where that information
544 may not be available.) */
546 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
547 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
549 : (MODE) != BLKmode \
550 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
551 : (int_size_in_bytes (TYPE) + 3) / 4))
553 /* Define where to put the arguments to a function. Value is zero to push
554 the argument on the stack, or a hard register in which to store the
557 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
559 /* For an arg passed partly in registers and partly in memory, this is the
560 number of registers used. For args passed entirely in registers or
561 entirely in memory, zero. */
563 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
565 /* Define if returning from a function call automatically pops the
566 arguments described by the number-of-args field in the call. */
568 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
570 /* The FUNCTION_VALUE macro defines how to find the value returned by a
571 function. VALTYPE is the data type of the value (as a tree).
572 If the precise function being called is known, FUNC is its FUNCTION_DECL;
573 otherwise, FUNC is NULL.
575 On the 370 the return value is in R15 or R16. However,
576 DImode (64-bit ints) scalars need to get returned on the stack,
577 with r15 pointing to the location. To accomplish this, we define
578 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
579 and the DImode scalars.
582 #define RET_REG(MODE) \
583 (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
585 #define FUNCTION_VALUE(VALTYPE, FUNC) \
586 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
588 #define RETURN_IN_MEMORY(VALTYPE) \
589 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
591 /* Define how to find the value returned by a library function assuming
592 the value has mode MODE. */
594 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
596 /* 1 if N is a possible register number for a function value.
597 On the 370 under C/370, R15 and R16 are thus used. */
599 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
601 /* This macro definition sets up a default value for `main' to return. */
603 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
606 /* Output assembler code for a block containing the constant parts of a
607 trampoline, leaving space for the variable parts.
609 On the 370, the trampoline contains these instructions:
613 L STATIC_CHAIN_REGISTER,X
619 I am confused as to why this emitting raw binary, instead of instructions ...
620 see for example, rs6000/rs000.c for an example of a different way to
621 do this ... especially since BASR should probably be substituted for BALR.
624 #define TRAMPOLINE_TEMPLATE(FILE) \
626 assemble_aligned_integer (2, GEN_INT (0x05E0)); \
627 assemble_aligned_integer (2, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
628 assemble_aligned_integer (2, GEN_INT (0xE00A)); \
629 assemble_aligned_integer (2, GEN_INT (0x58F0)); \
630 assemble_aligned_integer (2, GEN_INT (0xE00E)); \
631 assemble_aligned_integer (2, GEN_INT (0x07FF)); \
632 assemble_aligned_integer (2, const0_rtx); \
633 assemble_aligned_integer (2, const0_rtx); \
634 assemble_aligned_integer (2, const0_rtx); \
635 assemble_aligned_integer (2, const0_rtx); \
638 /* Length in units of the trampoline for entering a nested function. */
640 #define TRAMPOLINE_SIZE 20
642 /* Emit RTL insns to initialize the variable parts of a trampoline. */
644 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
646 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
647 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
650 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
651 pointer does not matter (provided there is a frame pointer). */
653 #define EXIT_IGNORE_STACK 1
655 /* Addressing modes, and classification of registers for them. */
657 /* #define HAVE_POST_INCREMENT */
658 /* #define HAVE_POST_DECREMENT */
660 /* #define HAVE_PRE_DECREMENT */
661 /* #define HAVE_PRE_INCREMENT */
663 /* These assume that REGNO is a hard or pseudo reg number. They give
664 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
665 reg currently allocated to a suitable hard reg.
666 These definitions are NOT overridden anywhere. */
668 #define REGNO_OK_FOR_INDEX_P(REGNO) \
669 (((REGNO) > 0 && (REGNO) < 16) \
670 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
672 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
674 #define REGNO_OK_FOR_DATA_P(REGNO) \
675 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
677 #define REGNO_OK_FOR_FP_P(REGNO) \
678 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
680 /* Now macros that check whether X is a register and also,
681 strictly, whether it is in a specified class. */
683 /* 1 if X is a data register. */
685 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
687 /* 1 if X is an fp register. */
689 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
691 /* 1 if X is an address register. */
693 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
695 /* Maximum number of registers that can appear in a valid memory address. */
697 #define MAX_REGS_PER_ADDRESS 2
699 /* Recognize any constant value that is a valid address. */
701 #define CONSTANT_ADDRESS_P(X) \
702 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
703 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
704 || (GET_CODE (X) == CONST \
705 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
706 || (GET_CODE (X) == CONST \
707 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
708 && !SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))))
710 /* Nonzero if the constant value X is a legitimate general operand.
711 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
713 #define LEGITIMATE_CONSTANT_P(X) 1
715 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
716 its validity for a certain class. We have two alternate definitions
717 for each of them. The usual definition accepts all pseudo regs; the
718 other rejects them all. The symbol REG_OK_STRICT causes the latter
719 definition to be used.
721 Most source files want to accept pseudo regs in the hope that they will
722 get allocated to the class that the insn wants them to be in.
723 Some source files that are used after register allocation
724 need to be strict. */
726 #ifndef REG_OK_STRICT
728 /* Nonzero if X is a hard reg that can be used as an index or if it is
731 #define REG_OK_FOR_INDEX_P(X) \
732 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
734 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
737 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
739 #else /* REG_OK_STRICT */
741 /* Nonzero if X is a hard reg that can be used as an index. */
743 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
745 /* Nonzero if X is a hard reg that can be used as a base reg. */
747 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
749 #endif /* REG_OK_STRICT */
751 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
752 valid memory address for an instruction.
753 The MODE argument is the machine mode for the MEM expression
754 that wants to use this address.
756 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
757 except for CONSTANT_ADDRESS_P which is actually machine-independent.
760 #define COUNT_REGS(X, REGS, FAIL) \
762 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
765 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
768 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
770 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
772 if (GET_CODE (X) == PLUS) \
775 rtx x0 = XEXP (X, 0); \
776 rtx x1 = XEXP (X, 1); \
777 if (GET_CODE (x0) == PLUS) \
779 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
780 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
781 COUNT_REGS (x1, regs, FAIL); \
785 else if (GET_CODE (x1) == PLUS) \
787 COUNT_REGS (x0, regs, FAIL); \
788 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
789 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
795 COUNT_REGS (x0, regs, FAIL); \
796 COUNT_REGS (x1, regs, FAIL); \
804 /* The 370 has no mode dependent addresses. */
806 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
808 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
809 Try machine-dependent ways of modifying an illegitimate address
810 to be legitimate. If we find one, return the new, valid address.
811 This macro is used in only one place: `memory_address' in explow.c.
814 (1) It's not obvious that this macro results in better code
815 than its omission does. For historical reasons we leave it in.
817 (2) This macro may be (???) implicated in the accidental promotion
818 or RS operand to RX operands, which bombs out any RS, SI, SS
819 instruction that was expecting a simple address. Note that
820 this occurs fairly rarely ...
822 (3) There is a bug somewhere that causes either r4 to be spilled,
823 or causes r0 to be used as a base register. Changeing the macro
824 below will make the bug move around, but will not make it go away
825 ... Note that this is a rare bug ...
829 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
831 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
832 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
833 copy_to_mode_reg (SImode, XEXP (X, 1))); \
834 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
835 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
836 copy_to_mode_reg (SImode, XEXP (X, 0))); \
837 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
838 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
839 force_operand (XEXP (X, 0), 0)); \
840 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
841 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
842 force_operand (XEXP (X, 1), 0)); \
843 if (memory_address_p (MODE, X)) \
847 /* Specify the machine mode that this machine uses for the index in the
848 tablejump instruction. */
850 #define CASE_VECTOR_MODE SImode
852 /* Define this if the tablejump instruction expects the table to contain
853 offsets from the address of the table.
854 Do not define this if the table should contain absolute addresses. */
856 /* #define CASE_VECTOR_PC_RELATIVE */
858 /* Define this if fixuns_trunc is the same as fix_trunc. */
860 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
862 /* We use "unsigned char" as default. */
864 #define DEFAULT_SIGNED_CHAR 0
866 /* Max number of bytes we can move from memory to memory in one reasonably
871 /* Nonzero if access to memory by bytes is slow and undesirable. */
873 #define SLOW_BYTE_ACCESS 1
875 /* Define if shifts truncate the shift count which implies one can omit
876 a sign-extension or zero-extension of a shift count. */
878 /* #define SHIFT_COUNT_TRUNCATED */
880 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
881 is done just by pretending it is already truncated. */
883 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
885 /* We assume that the store-condition-codes instructions store 0 for false
886 and some other value for true. This is the value stored for true. */
888 /* #define STORE_FLAG_VALUE (-1) */
890 /* When a prototype says `char' or `short', really pass an `int'. */
892 #define PROMOTE_PROTOTYPES 1
894 /* Don't perform CSE on function addresses. */
896 #define NO_FUNCTION_CSE
898 /* Specify the machine mode that pointers have.
899 After generation of rtl, the compiler makes no further distinction
900 between pointers and any other objects of this machine mode. */
904 /* A function address in a call instruction is a byte address (for
905 indexing purposes) so give the MEM rtx a byte's mode. */
907 #define FUNCTION_MODE QImode
909 /* Compute the cost of computing a constant rtl expression RTX whose
910 rtx-code is CODE. The body of this macro is a portion of a switch
911 statement. If the code is computed here, return it with a return
912 statement. Otherwise, break from the switch. */
914 #define CONST_COSTS(RTX, CODE, OUTERCODE) \
916 if ((unsigned) INTVAL (RTX) < 0xfff) return 1; \
924 /* A C statement (sans semicolon) to update the integer variable COST
925 based on the relationship between INSN that is dependent on
926 DEP_INSN through the dependence LINK. The default is to make no
927 adjustment to COST. This can be used for example to specify to
928 the scheduler that an output- or anti-dependence does not incur
929 the same cost as a data-dependence.
931 We will want to use this to indicate that there is a cost associated
932 with the loading, followed by use of base registers ...
933 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
936 /* Tell final.c how to eliminate redundant test instructions. */
938 /* Here we define machine-dependent flags and fields in cc_status
939 (see `conditions.h'). */
941 /* Store in cc_status the expressions that the condition codes will
942 describe after execution of an instruction whose pattern is EXP.
943 Do not alter them if the instruction would not alter the cc's.
945 On the 370, load insns do not alter the cc's. However, in some
946 cases these instructions can make it possibly invalid to use the
947 saved cc's. In those cases we clear out some or all of the saved
948 cc's so they won't be used.
950 Note that only some arith instructions set the CC. These include
951 add, subtract, complement, various shifts. Note that multiply
952 and divide do *not* set set the CC. Therefore, in the code below,
953 don't set the status for MUL, DIV, etc.
955 Note that the bitwise ops set the condition code, but not in a
956 way that we can make use of it. So we treat these as clobbering,
957 rather than setting the CC. These are clobbered in the individual
958 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
961 #define NOTICE_UPDATE_CC(EXP, INSN) \
964 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
965 exp = XVECEXP (exp, 0, 0); \
966 if (GET_CODE (exp) != SET) \
970 if (XEXP (exp, 0) == cc0_rtx) \
972 cc_status.value1 = XEXP (exp, 0); \
973 cc_status.value2 = XEXP (exp, 1); \
974 cc_status.flags = 0; \
978 if (cc_status.value1 \
979 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
980 cc_status.value1 = 0; \
981 if (cc_status.value2 \
982 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
983 cc_status.value2 = 0; \
984 switch (GET_CODE (XEXP (exp, 1))) \
986 case PLUS: case MINUS: case NEG: \
987 case NOT: case ABS: \
988 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
990 /* mult and div don't set any cc codes !! */ \
991 case MULT: /* case UMULT: */ case DIV: case UDIV: \
992 /* and, or and xor set the cc's the wrong way !! */ \
993 case AND: case IOR: case XOR: \
994 /* some shifts set the CC some don't. */ \
995 case ASHIFT: case ASHIFTRT: \
1005 #define CC_STATUS_SET(V1, V2) \
1007 cc_status.flags = 0; \
1008 cc_status.value1 = (V1); \
1009 cc_status.value2 = (V2); \
1010 if (cc_status.value1 \
1011 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
1012 cc_status.value2 = 0; \
1015 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1016 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
1018 /* ------------------------------------------ */
1019 /* Control the assembler format that we output. */
1021 /* Define standard character escape sequences for non-ASCII targets
1024 #ifdef TARGET_EBCDIC
1025 #define TARGET_ESC 39
1026 #define TARGET_BELL 47
1027 #define TARGET_BS 22
1028 #define TARGET_TAB 5
1029 #define TARGET_NEWLINE 21
1030 #define TARGET_VT 11
1031 #define TARGET_FF 12
1032 #define TARGET_CR 13
1035 /* ======================================================== */
1038 #define TEXT_SECTION_ASM_OP "* Program text area"
1039 #define DATA_SECTION_ASM_OP "* Program data area"
1040 #define INIT_SECTION_ASM_OP "* Program initialization area"
1041 #define SHARED_SECTION_ASM_OP "* Program shared data"
1042 #define CTOR_LIST_BEGIN /* NO OP */
1043 #define CTOR_LIST_END /* NO OP */
1044 #define MAX_MVS_LABEL_SIZE 8
1046 /* How to refer to registers in assembler output. This sequence is
1047 indexed by compiler's hard-register-number (see above). */
1049 #define REGISTER_NAMES \
1050 { "0", "1", "2", "3", "4", "5", "6", "7", \
1051 "8", "9", "10", "11", "12", "13", "14", "15", \
1052 "0", "2", "4", "6" \
1055 #define ASM_FILE_START(FILE) \
1056 { fputs ("\tRMODE\tANY\n", FILE); \
1057 fputs ("\tCSECT\n", FILE); }
1059 #define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
1060 #define ASM_COMMENT_START "*"
1061 #define ASM_APP_OFF ""
1062 #define ASM_APP_ON ""
1064 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1065 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1067 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1069 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1070 if (mvs_check_alias (NAME, temp) == 2) \
1072 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1076 /* MVS externals are limited to 8 characters, upper case only.
1077 The '_' is mapped to '@', except for MVS functions, then '#'. */
1080 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1082 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1083 if (!mvs_get_alias (NAME, temp)) \
1084 strcpy (temp, NAME); \
1085 if (!strcmp (temp,"main")) \
1086 strcpy (temp,"gccmain"); \
1087 if (mvs_function_check (temp)) \
1091 for (bp = temp; *bp; bp++) \
1092 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1093 fprintf (FILE, "%s", temp); \
1096 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1097 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1099 /* Generate internal label. Since we can branch here from off page, we
1100 must reload the base register. */
1102 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1104 if (!strcmp (PREFIX,"L")) \
1106 mvs_add_label(NUM); \
1108 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \
1111 /* Generate case label. For HLASM we can change to the data CSECT
1112 and put the vectors out of the code body. The assembler just
1113 concatenates CSECTs with the same name. */
1115 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1116 fprintf (FILE, "\tDS\t0F\n"); \
1117 fprintf (FILE,"\tCSECT\n"); \
1118 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1120 /* Put the CSECT back to the code body */
1122 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1123 assemble_name (FILE, mvs_function_name); \
1124 fputs ("\tCSECT\n", FILE);
1126 /* This is how to output an element of a case-vector that is absolute. */
1128 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1129 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1131 /* This is how to output an element of a case-vector that is relative. */
1133 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1134 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1136 /* This is how to output an insn to push a register on the stack.
1137 It need not be very fast code.
1138 Right now, PUSH & POP are used only when profiling is enabled,
1139 and then, only to push the static chain reg and the function struct
1140 value reg, and only if those are used. Since profiling is not
1141 supported anyway, punt on this. */
1143 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1144 mvs_check_page (FILE, 8, 4); \
1145 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1146 reg_names[REGNO], STACK_POINTER_OFFSET)
1148 /* This is how to output an insn to pop a register from the stack.
1149 It need not be very fast code. */
1151 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1152 mvs_check_page (FILE, 8, 0); \
1153 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1154 reg_names[REGNO], STACK_POINTER_OFFSET)
1156 /* This outputs a text string. The string are chopped up to fit into
1157 an 80 byte record. Also, control and special characters, interpreted
1158 by the IBM assembler, are output numerically. */
1160 #define MVS_ASCII_TEXT_LENGTH 48
1162 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1164 size_t i, limit = (LEN); \
1166 for (j = 0, i = 0; i < limit; j++, i++) \
1169 if (ISCNTRL (c) || c == '&') \
1171 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1172 fprintf (FILE, "'\n"); \
1174 if (c == '&') c = MAP_CHARACTER (c); \
1175 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1179 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1180 fprintf (FILE, "\tDC\tC'"); \
1182 fprintf (FILE, "%c%c", c, c); \
1184 fprintf (FILE, "%c", c); \
1185 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1186 fprintf (FILE, "'\n" ); \
1189 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1190 fprintf (FILE, "'\n"); \
1193 /* This is how to output an assembler line that says to advance the
1194 location counter to a multiple of 2**LOG bytes. */
1196 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1200 fprintf (FILE, "\tDS\t0H\n" ); \
1202 fprintf (FILE, "\tDS\t0F\n" ); \
1205 /* The maximum length of memory that the IBM assembler will allow in one
1208 #define MAX_CHUNK 32767
1210 /* A C statement to output to the stdio stream FILE an assembler
1211 instruction to advance the location counter by SIZE bytes. Those
1212 bytes should be zero when loaded. */
1214 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1217 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1219 if (s > MAX_CHUNK) \
1223 fprintf (FILE, "\tDS\tXL%d\n", k); \
1227 /* A C statement (sans semicolon) to output to the stdio stream
1228 FILE the assembler definition of a common-label named NAME whose
1229 size is SIZE bytes. The variable ROUNDED is the size rounded up
1230 to whatever alignment the caller wants. */
1232 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1234 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1235 if (mvs_check_alias(NAME, temp) == 2) \
1237 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1239 fputs ("\tENTRY\t", FILE); \
1240 assemble_name (FILE, NAME); \
1241 fputs ("\n", FILE); \
1242 fprintf (FILE, "\tDS\t0F\n"); \
1243 ASM_OUTPUT_LABEL (FILE,NAME); \
1244 ASM_OUTPUT_SKIP (FILE,SIZE); \
1247 /* A C statement (sans semicolon) to output to the stdio stream
1248 FILE the assembler definition of a local-common-label named NAME
1249 whose size is SIZE bytes. The variable ROUNDED is the size
1250 rounded up to whatever alignment the caller wants. */
1252 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1254 fprintf (FILE, "\tDS\t0F\n"); \
1255 ASM_OUTPUT_LABEL (FILE,NAME); \
1256 ASM_OUTPUT_SKIP (FILE,SIZE); \
1259 /* Store in OUTPUT a string (made with alloca) containing an
1260 assembler-name for a local static variable named NAME.
1261 LABELNO is an integer which is different for each call. */
1263 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1265 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
1266 sprintf ((OUTPUT), "%s%d", (NAME), (LABELNO)); \
1269 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1270 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1271 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1273 #define PRINT_OPERAND(FILE, XV, CODE) \
1275 switch (GET_CODE (XV)) \
1277 static char curreg[4]; \
1280 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1282 strcpy (curreg, reg_names[REGNO (XV)]); \
1283 fprintf (FILE, "%s", curreg); \
1287 rtx addr = XEXP (XV, 0); \
1290 if (GET_CODE (addr) == PLUS) \
1291 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1293 fprintf (FILE, "0"); \
1295 else if (CODE == 'R') \
1297 if (GET_CODE (addr) == PLUS) \
1298 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1300 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1303 output_address (XEXP (XV, 0)); \
1308 mvs_page_lit += 4; \
1309 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1310 else fprintf (FILE, "=A("); \
1311 output_addr_const (FILE, XV); \
1312 fprintf (FILE, ")"); \
1316 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1317 else if (CODE == 'X') \
1318 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1319 else if (CODE == 'h') \
1320 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1321 else if (CODE == 'H') \
1323 mvs_page_lit += 2; \
1324 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1326 else if (CODE == 'K') \
1328 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1329 mvs_page_lit += 4; \
1330 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1332 else if (CODE == 'W') \
1334 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1335 mvs_page_lit += 8; \
1336 if (0 <= INTVAL (XV)) { \
1337 fprintf (FILE, "=XL8'00000000"); \
1339 fprintf (FILE, "=XL8'FFFFFFFF"); \
1341 fprintf (FILE, "%08X'", INTVAL (XV)); \
1345 mvs_page_lit += 4; \
1346 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1349 case CONST_DOUBLE: \
1350 if (GET_MODE (XV) == DImode) \
1354 mvs_page_lit += 4; \
1355 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1357 else if (CODE == 'L') \
1359 mvs_page_lit += 4; \
1360 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1364 mvs_page_lit += 8; \
1365 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1366 CONST_DOUBLE_HIGH (XV)); \
1372 REAL_VALUE_TYPE rval; \
1373 REAL_VALUE_FROM_CONST_DOUBLE(rval, XV); \
1374 REAL_VALUE_TO_DECIMAL (rval, buf, -1); \
1375 if (GET_MODE (XV) == SFmode) \
1377 mvs_page_lit += 4; \
1378 fprintf (FILE, "=E'%s'", buf); \
1381 if (GET_MODE (XV) == DFmode) \
1383 mvs_page_lit += 8; \
1384 fprintf (FILE, "=D'%s'", buf); \
1386 else /* VOIDmode !?!? strange but true ... */ \
1388 mvs_page_lit += 8; \
1389 fprintf (FILE, "=XL8'%08X%08X'", \
1390 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1395 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1396 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1398 mvs_page_lit += 4; \
1399 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1401 fprintf (FILE, "=V("); \
1402 ASM_OUTPUT_LABELREF (FILE, \
1403 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1404 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1405 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1409 fprintf (FILE, "=A("); \
1410 output_addr_const (FILE, XV); \
1411 fprintf (FILE, ")"); \
1416 mvs_page_lit += 4; \
1417 fprintf (FILE, "=F'"); \
1418 output_addr_const (FILE, XV); \
1419 fprintf (FILE, "'"); \
1427 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1429 rtx breg, xreg, offset, plus; \
1431 switch (GET_CODE (ADDR)) \
1434 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1440 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1442 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1443 breg = XEXP (ADDR, 1); \
1445 offset = XEXP (ADDR, 1); \
1446 plus = XEXP (ADDR, 0); \
1450 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1451 breg = XEXP (ADDR, 0); \
1453 offset = XEXP (ADDR, 0); \
1454 plus = XEXP (ADDR, 1); \
1456 if (GET_CODE (plus) == PLUS) \
1458 if (GET_CODE (XEXP (plus, 0)) == REG) \
1461 xreg = XEXP (plus, 0); \
1463 breg = XEXP (plus, 0); \
1467 offset = XEXP (plus, 0); \
1469 if (GET_CODE (XEXP (plus, 1)) == REG) \
1472 xreg = XEXP (plus, 1); \
1474 breg = XEXP (plus, 1); \
1478 offset = XEXP (plus, 1); \
1481 else if (GET_CODE (plus) == REG) \
1494 if (GET_CODE (offset) == LABEL_REF) \
1495 fprintf (FILE, "L%d", \
1496 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1498 output_addr_const (FILE, offset); \
1501 fprintf (FILE, "0"); \
1503 fprintf (FILE, "(%s,%s)", \
1504 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1506 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1509 mvs_page_lit += 4; \
1510 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1511 else fprintf (FILE, "=A("); \
1512 output_addr_const (FILE, ADDR); \
1513 fprintf (FILE, ")"); \
1518 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1520 if (strlen (NAME) + 1 > mvs_function_name_length) \
1522 if (mvs_function_name) \
1523 free (mvs_function_name); \
1524 mvs_function_name = 0; \
1526 if (!mvs_function_name) \
1528 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1529 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1531 if (!strcmp (NAME, "main")) \
1532 strcpy (mvs_function_name, "gccmain"); \
1534 strcpy (mvs_function_name, NAME); \
1535 fprintf (FILE, "\tDS\t0F\n"); \
1536 assemble_name (FILE, mvs_function_name); \
1537 fputs ("\tRMODE\tANY\n", FILE); \
1538 assemble_name (FILE, mvs_function_name); \
1539 fputs ("\tCSECT\n", FILE); \
1542 /* Output assembler code to FILE to increment profiler label # LABELNO
1543 for profiling a function entry. */
1545 #define FUNCTION_PROFILER(FILE, LABELNO) \
1546 fprintf (FILE, "Error: No profiling available.\n")
1548 #endif /* TARGET_HLASM */
1550 /* ======================================================== */
1552 #ifdef TARGET_ELF_ABI
1554 /* How to refer to registers in assembler output. This sequence is
1555 indexed by compiler's hard-register-number (see above). */
1557 #define REGISTER_NAMES \
1558 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1559 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1560 "f0", "f2", "f4", "f6" \
1563 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1564 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1565 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1567 #define PRINT_OPERAND(FILE, XV, CODE) \
1569 switch (GET_CODE (XV)) \
1571 static char curreg[4]; \
1574 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1576 strcpy (curreg, reg_names[REGNO (XV)]); \
1577 fprintf (FILE, "%s", curreg); \
1581 rtx addr = XEXP (XV, 0); \
1584 if (GET_CODE (addr) == PLUS) \
1585 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1587 fprintf (FILE, "0"); \
1589 else if (CODE == 'R') \
1591 if (GET_CODE (addr) == PLUS) \
1592 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1594 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1597 output_address (XEXP (XV, 0)); \
1602 mvs_page_lit += 4; \
1603 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1604 else fprintf (FILE, "=A("); \
1605 output_addr_const (FILE, XV); \
1606 fprintf (FILE, ")"); \
1610 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1611 else if (CODE == 'X') \
1612 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1613 else if (CODE == 'h') \
1614 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1615 else if (CODE == 'H') \
1617 mvs_page_lit += 2; \
1618 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1620 else if (CODE == 'K') \
1622 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1623 mvs_page_lit += 4; \
1624 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1626 else if (CODE == 'W') \
1628 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1629 mvs_page_lit += 8; \
1630 if (0 <= INTVAL (XV)) { \
1631 fprintf (FILE, "=XL8'00000000"); \
1633 fprintf (FILE, "=XL8'FFFFFFFF"); \
1635 fprintf (FILE, "%08X'", INTVAL (XV)); \
1639 mvs_page_lit += 4; \
1640 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1643 case CONST_DOUBLE: \
1644 if (GET_MODE (XV) == DImode) \
1648 mvs_page_lit += 4; \
1649 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1651 else if (CODE == 'L') \
1653 mvs_page_lit += 4; \
1654 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1658 mvs_page_lit += 8; \
1659 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1660 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1666 REAL_VALUE_TYPE rval; \
1667 REAL_VALUE_FROM_CONST_DOUBLE(rval, XV); \
1668 REAL_VALUE_TO_DECIMAL (rval, buf, -1); \
1669 if (GET_MODE (XV) == SFmode) \
1671 mvs_page_lit += 4; \
1672 fprintf (FILE, "=E'%s'", buf); \
1675 if (GET_MODE (XV) == DFmode) \
1677 mvs_page_lit += 8; \
1678 fprintf (FILE, "=D'%s'", buf); \
1680 else /* VOIDmode !?!? strange but true ... */ \
1682 mvs_page_lit += 8; \
1683 fprintf (FILE, "=XL8'%08X%08X'", \
1684 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1689 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1690 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1692 mvs_page_lit += 4; \
1693 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1695 fprintf (FILE, "=V("); \
1696 ASM_OUTPUT_LABELREF (FILE, \
1697 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1698 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1699 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1703 fprintf (FILE, "=A("); \
1704 output_addr_const (FILE, XV); \
1705 fprintf (FILE, ")"); \
1710 mvs_page_lit += 4; \
1711 fprintf (FILE, "=bogus_bad_F'"); \
1712 output_addr_const (FILE, XV); \
1713 fprintf (FILE, "'"); \
1714 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1715 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1725 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1727 rtx breg, xreg, offset, plus; \
1729 switch (GET_CODE (ADDR)) \
1732 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1738 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1740 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1741 breg = XEXP (ADDR, 1); \
1743 offset = XEXP (ADDR, 1); \
1744 plus = XEXP (ADDR, 0); \
1748 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1749 breg = XEXP (ADDR, 0); \
1751 offset = XEXP (ADDR, 0); \
1752 plus = XEXP (ADDR, 1); \
1754 if (GET_CODE (plus) == PLUS) \
1756 if (GET_CODE (XEXP (plus, 0)) == REG) \
1759 xreg = XEXP (plus, 0); \
1761 breg = XEXP (plus, 0); \
1765 offset = XEXP (plus, 0); \
1767 if (GET_CODE (XEXP (plus, 1)) == REG) \
1770 xreg = XEXP (plus, 1); \
1772 breg = XEXP (plus, 1); \
1776 offset = XEXP (plus, 1); \
1779 else if (GET_CODE (plus) == REG) \
1792 if (GET_CODE (offset) == LABEL_REF) \
1793 fprintf (FILE, "L%d", \
1794 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1796 output_addr_const (FILE, offset); \
1799 fprintf (FILE, "0"); \
1801 fprintf (FILE, "(%s,%s)", \
1802 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1804 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1807 mvs_page_lit += 4; \
1808 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1809 else fprintf (FILE, "=A("); \
1810 output_addr_const (FILE, ADDR); \
1811 fprintf (FILE, ")"); \
1816 /* Output assembler code to FILE to increment profiler label # LABELNO
1817 for profiling a function entry. */
1818 /* Make it a no-op for now, so we can at least compile glibc */
1819 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1820 mvs_check_page (FILE, 24, 4); \
1821 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1822 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1823 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1824 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1825 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1826 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1829 /* Don't bother to output .extern pseudo-ops. They are not needed by
1832 #undef ASM_OUTPUT_EXTERNAL
1834 #define ASM_DOUBLE "\t.double"
1836 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1838 /* Generate internal label. Since we can branch here from off page, we
1839 must reload the base register. Note that internal labels are generated
1840 for loops, goto's and case labels. */
1841 #undef ASM_OUTPUT_INTERNAL_LABEL
1842 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1844 if (!strcmp (PREFIX,"L")) \
1846 mvs_add_label(NUM); \
1848 fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \
1851 /* let config/svr4.h define this ...
1852 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1853 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1856 /* This is how to output an element of a case-vector that is absolute. */
1857 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1858 mvs_check_page (FILE, 4, 0); \
1859 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1861 /* This is how to output an element of a case-vector that is relative. */
1862 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1863 mvs_check_page (FILE, 4, 0); \
1864 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1866 /* Right now, PUSH & POP are used only when profiling is enabled,
1867 and then, only to push the static chain reg and the function struct
1868 value reg, and only if those are used by the function being profiled.
1869 We don't need this for profiling, so punt. */
1870 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1871 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1874 /* Indicate that jump tables go in the text section. This is
1875 necessary when compiling PIC code. */
1876 #define JUMP_TABLES_IN_TEXT_SECTION 1
1878 /* Define macro used to output shift-double opcodes when the shift
1879 count is in %cl. Some assemblers require %cl as an argument;
1882 GAS requires the %cl argument, so override i386/unix.h. */
1884 #undef SHIFT_DOUBLE_OMITS_COUNT
1885 #define SHIFT_DOUBLE_OMITS_COUNT 0
1887 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1888 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1889 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1891 /* Implicit library calls should use memcpy, not bcopy, etc. */
1892 #define TARGET_MEM_FUNCTIONS
1894 /* Output before read-only data. */
1895 #define TEXT_SECTION_ASM_OP "\t.text"
1897 /* Output before writable (initialized) data. */
1898 #define DATA_SECTION_ASM_OP "\t.data"
1900 /* Output before writable (uninitialized) data. */
1901 #define BSS_SECTION_ASM_OP "\t.bss"
1903 /* In the past there was confusion as to what the argument to .align was
1904 in GAS. For the last several years the rule has been this: for a.out
1905 file formats that argument is LOG, and for all other file formats the
1908 However, GAS now has .p2align and .balign pseudo-ops so to remove any
1909 doubt or guess work, and since this file is used for both a.out and other
1910 file formats, we use one of them. */
1912 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1913 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
1915 /* Globalizing directive for a label. */
1916 #define GLOBAL_ASM_OP ".globl "
1918 /* This says how to output an assembler line
1919 to define a global common symbol. */
1921 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1922 ( fputs (".comm ", (FILE)), \
1923 assemble_name ((FILE), (NAME)), \
1924 fprintf ((FILE), ",%u\n", (ROUNDED)))
1926 /* This says how to output an assembler line
1927 to define a local common symbol. */
1929 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1930 ( fputs (".lcomm ", (FILE)), \
1931 assemble_name ((FILE), (NAME)), \
1932 fprintf ((FILE), ",%u\n", (ROUNDED)))
1934 #endif /* TARGET_ELF_ABI */
1935 #endif /* ! GCC_I370_H */