1 /* Definitions of target machine for GNU compiler.
2 Hitachi H8/300 version generating coff
3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1996, 1997, 1998, 1999,
4 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 Contributed by Steve Chamberlain (sac@cygnus.com),
6 Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
28 /* Which CPU to compile for.
29 We use int for CPU_TYPE to avoid lots of casts. */
30 #if 0 /* defined in insn-attr.h, here for documentation */
31 enum attr_cpu { CPU_H8300, CPU_H8300H };
35 /* Various globals defined in h8300.c. */
37 extern const char *h8_push_op, *h8_pop_op, *h8_mov_op;
38 extern const char * const *h8_reg_names;
40 /* Target CPU builtins. */
41 #define TARGET_CPU_CPP_BUILTINS() \
46 builtin_define ("__H8300H__"); \
47 builtin_assert ("cpu=h8300h"); \
48 builtin_assert ("machine=h8300h"); \
49 if (TARGET_NORMAL_MODE) \
51 builtin_define ("__NORMAL_MODE__"); \
54 else if (TARGET_H8300S) \
56 builtin_define ("__H8300S__"); \
57 builtin_assert ("cpu=h8300s"); \
58 builtin_assert ("machine=h8300s"); \
59 if (TARGET_NORMAL_MODE) \
61 builtin_define ("__NORMAL_MODE__"); \
66 builtin_define ("__H8300__"); \
67 builtin_assert ("cpu=h8300"); \
68 builtin_assert ("machine=h8300"); \
73 #define LINK_SPEC "%{mh:-m h8300h} %{ms:-m h8300s}"
75 #define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
77 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
80 /* Basic block reordering is only beneficial on targets with cache \
81 and/or variable-cycle branches where (cycle count taken != \
82 cycle count not taken). */ \
83 flag_reorder_blocks = 0; \
87 /* Print subsidiary information on the compiler version in use. */
89 #define TARGET_VERSION fprintf (stderr, " (Hitachi H8/300)");
91 /* Run-time compilation parameters selecting different hardware subsets. */
93 extern int target_flags;
95 /* Masks for the -m switches. */
96 #define MASK_H8300S 0x00000001
97 #define MASK_MAC 0x00000002
98 #define MASK_INT32 0x00000008
99 #define MASK_ADDRESSES 0x00000040
100 #define MASK_QUICKCALL 0x00000080
101 #define MASK_SLOWBYTE 0x00000100
102 #define MASK_NORMAL_MODE 0x00000200
103 #define MASK_RELAX 0x00000400
104 #define MASK_RTL_DUMP 0x00000800
105 #define MASK_H8300H 0x00001000
106 #define MASK_ALIGN_300 0x00002000
108 /* Macros used in the machine description to test the flags. */
110 /* Make int's 32 bits. */
111 #define TARGET_INT32 (target_flags & MASK_INT32)
113 /* Dump recorded insn lengths into the output file. This helps debug the
115 #define TARGET_ADDRESSES (target_flags & MASK_ADDRESSES)
117 /* Pass the first few arguments in registers. */
118 #define TARGET_QUICKCALL (target_flags & MASK_QUICKCALL)
120 /* Pretend byte accesses are slow. */
121 #define TARGET_SLOWBYTE (target_flags & MASK_SLOWBYTE)
123 /* Dump each assembler insn's rtl into the output file.
124 This is for debugging the compiler only. */
125 #define TARGET_RTL_DUMP (target_flags & MASK_RTL_DUMP)
127 /* Select between the H8/300 and H8/300H CPUs. */
128 #define TARGET_H8300 (! TARGET_H8300H && ! TARGET_H8300S)
129 #define TARGET_H8300H (target_flags & MASK_H8300H)
130 #define TARGET_H8300S (target_flags & MASK_H8300S)
131 #define TARGET_NORMAL_MODE (target_flags & MASK_NORMAL_MODE)
133 /* mac register and relevant instructions are available. */
134 #define TARGET_MAC (target_flags & MASK_MAC)
136 /* Align all values on the H8/300H the same way as the H8/300. Specifically,
137 32 bit and larger values are aligned on 16 bit boundaries.
138 This is all the hardware requires, but the default is 32 bits for the H8/300H.
139 ??? Now watch someone add hardware floating point requiring 32 bit
141 #define TARGET_ALIGN_300 (target_flags & MASK_ALIGN_300)
143 /* Macro to define tables used to set the flags.
144 This is a list in braces of pairs in braces,
145 each pair being { "NAME", VALUE }
146 where VALUE is the bits to set or minus the bits to clear.
147 An empty string NAME is used to identify the default VALUE. */
149 #define TARGET_SWITCHES \
150 { {"s", MASK_H8300S, N_("Generate H8S code")}, \
151 {"no-s", -MASK_H8300S, N_("Do not generate H8S code")}, \
152 {"s2600", MASK_MAC, N_("Generate H8S/2600 code")}, \
153 {"no-s2600", -MASK_MAC, N_("Do not generate H8S/2600 code")}, \
154 {"int32", MASK_INT32, N_("Make integers 32 bits wide")}, \
155 {"addresses", MASK_ADDRESSES, NULL}, \
156 {"quickcall", MASK_QUICKCALL, \
157 N_("Use registers for argument passing")}, \
158 {"no-quickcall", -MASK_QUICKCALL, \
159 N_("Do not use registers for argument passing")}, \
160 {"slowbyte", MASK_SLOWBYTE, \
161 N_("Consider access to byte sized memory slow")}, \
162 {"relax", MASK_RELAX, N_("Enable linker relaxing")}, \
163 {"rtl-dump", MASK_RTL_DUMP, NULL}, \
164 {"h", MASK_H8300H, N_("Generate H8/300H code")}, \
165 {"n", MASK_NORMAL_MODE, N_("Enable the normal mode")}, \
166 {"no-h", -MASK_H8300H, N_("Do not generate H8/300H code")}, \
167 {"align-300", MASK_ALIGN_300, N_("Use H8/300 alignment rules")}, \
168 { "", TARGET_DEFAULT, NULL}}
173 #undef TARGET_NORMAL_MODE
174 /* If compiling libgcc2, make these compile time constants based on what
175 flags are we actually compiling with. */
177 #define TARGET_H8300H 1
179 #define TARGET_H8300H 0
182 #define TARGET_H8300S 1
184 #define TARGET_H8300S 0
186 #ifdef __NORMAL_MODE__
187 #define TARGET_NORMAL_MODE 1
189 #define TARGET_NORMAL_MODE 0
191 #endif /* !IN_LIBGCC2 */
193 /* Do things that must be done once at start up. */
195 #define OVERRIDE_OPTIONS \
198 h8300_init_once (); \
202 /* Default target_flags if no switches specified. */
204 #ifndef TARGET_DEFAULT
205 #define TARGET_DEFAULT (MASK_QUICKCALL)
208 /* Show we can debug even without a frame pointer. */
209 /* #define CAN_DEBUG_WITHOUT_FP */
211 /* Define this if addresses of constant functions
212 shouldn't be put through pseudo regs where they can be cse'd.
213 Desirable on machines where ordinary constants are expensive
214 but a CALL with constant address is cheap.
216 Calls through a register are cheaper than calls to named
217 functions; however, the register pressure this causes makes
218 CSEing of function addresses generally a lose. */
219 #define NO_FUNCTION_CSE
221 /* Target machine storage layout */
223 /* Define this if most significant bit is lowest numbered
224 in instructions that operate on numbered bit-fields.
225 This is not true on the H8/300. */
226 #define BITS_BIG_ENDIAN 0
228 /* Define this if most significant byte of a word is the lowest numbered. */
229 /* That is true on the H8/300. */
230 #define BYTES_BIG_ENDIAN 1
232 /* Define this if most significant word of a multiword number is lowest
234 This is true on an H8/300 (actually we can make it up, but we choose to
236 #define WORDS_BIG_ENDIAN 1
238 #define MAX_BITS_PER_WORD 32
240 /* Width of a word, in units (bytes). */
241 #define UNITS_PER_WORD (TARGET_H8300H || TARGET_H8300S ? 4 : 2)
242 #define MIN_UNITS_PER_WORD 2
244 #define SHORT_TYPE_SIZE 16
245 #define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16)
246 #define LONG_TYPE_SIZE 32
247 #define LONG_LONG_TYPE_SIZE 32
248 #define FLOAT_TYPE_SIZE 32
249 #define DOUBLE_TYPE_SIZE 32
250 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
252 #define MAX_FIXED_MODE_SIZE 32
254 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
255 #define PARM_BOUNDARY (TARGET_H8300H || TARGET_H8300S ? 32 : 16)
257 /* Allocation boundary (in *bits*) for the code of a function. */
258 #define FUNCTION_BOUNDARY 16
260 /* Alignment of field after `int : 0' in a structure. */
261 /* One can argue this should be 32 for -mint32, but since 32 bit ints only
262 need 16 bit alignment, this is left as is so that -mint32 doesn't change
263 structure layouts. */
264 #define EMPTY_FIELD_BOUNDARY 16
266 /* A bit-field declared as `int' forces `int' alignment for the struct. */
267 #define PCC_BITFIELD_TYPE_MATTERS 0
269 /* No data type wants to be aligned rounder than this.
270 32 bit values are aligned as such on the H8/300H and H8S for speed. */
271 #define BIGGEST_ALIGNMENT \
272 (((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16)
274 /* The stack goes in 16/32 bit lumps. */
275 #define STACK_BOUNDARY (TARGET_H8300 ? 16 : 32)
277 /* Define this if move instructions will actually fail to work
278 when given unaligned data. */
279 /* On the H8/300, longs can be aligned on halfword boundaries, but not
281 #define STRICT_ALIGNMENT 1
283 /* Standard register usage. */
285 /* Number of actual hardware registers.
286 The hardware registers are assigned numbers for the compiler
287 from 0 to just below FIRST_PSEUDO_REGISTER.
289 All registers that the compiler knows about must be given numbers,
290 even those that are not normally considered general registers.
292 Reg 9 does not correspond to any hardware register, but instead
293 appears in the RTL as an argument pointer prior to reload, and is
294 eliminated during reloading in favor of either the stack or frame
297 #define FIRST_PSEUDO_REGISTER 11
299 /* 1 for registers that have pervasive standard uses
300 and are not available for the register allocator. */
302 #define FIXED_REGISTERS \
303 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1}
305 /* 1 for registers not available across function calls.
306 These must include the FIXED_REGISTERS and also any
307 registers that can be used without being saved.
308 The latter must include the registers where values are returned
309 and the register where structure-value addresses are passed.
310 Aside from that, you can include as many other registers as you
313 H8 destroys r0,r1,r2,r3. */
315 #define CALL_USED_REGISTERS \
316 { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1 }
318 #define REG_ALLOC_ORDER \
319 { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10}
321 #define CONDITIONAL_REGISTER_USAGE \
324 fixed_regs[MAC_REG] = call_used_regs[MAC_REG] = 1; \
327 /* Return number of consecutive hard regs needed starting at reg REGNO
328 to hold something of mode MODE.
330 This is ordinarily the length in words of a value of mode MODE
331 but can be less for certain modes in special long registers.
333 We pretend the MAC register is 32bits -- we don't have any data
334 types on the H8 series to handle more than 32bits. */
336 #define HARD_REGNO_NREGS(REGNO, MODE) \
337 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
339 /* Value is 1 if hard register REGNO can hold a value of machine-mode
342 H8/300: If an even reg, then anything goes. Otherwise the mode must be QI
344 H8/300H: Anything goes. */
346 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
348 ? ((((REGNO) & 1) == 0) || ((MODE) == HImode) || ((MODE) == QImode)) \
349 : (REGNO) == MAC_REG ? (MODE) == SImode : 1)
351 /* Value is 1 if it is a good idea to tie two pseudo registers
352 when one has mode MODE1 and one has mode MODE2.
353 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
354 for any hard reg, then this must be 0 for correct output. */
355 #define MODES_TIEABLE_P(MODE1, MODE2) \
356 ((MODE1) == (MODE2) \
357 || (((MODE1) == QImode || (MODE1) == HImode \
358 || ((TARGET_H8300H || TARGET_H8300S) && (MODE1) == SImode)) \
359 && ((MODE2) == QImode || (MODE2) == HImode \
360 || ((TARGET_H8300H || TARGET_H8300S) && (MODE2) == SImode))))
362 /* Specify the registers used for certain standard purposes.
363 The values of these macros are register numbers. */
365 /* H8/300 pc is not overloaded on a register. */
367 /*#define PC_REGNUM 15*/
369 /* Register to use for pushing function arguments. */
370 #define STACK_POINTER_REGNUM SP_REG
372 /* Base register for access to local variables of the function. */
373 #define FRAME_POINTER_REGNUM FP_REG
375 /* Value should be nonzero if functions must have frame pointers.
376 Zero means the frame pointer need not be set up (and parms
377 may be accessed via the stack pointer) in functions that seem suitable.
378 This is computed in `reload', in reload1.c. */
379 #define FRAME_POINTER_REQUIRED 0
381 /* Base register for access to arguments of the function. */
382 #define ARG_POINTER_REGNUM AP_REG
384 /* Register in which static-chain is passed to a function. */
385 #define STATIC_CHAIN_REGNUM SC_REG
387 /* Fake register that holds the address on the stack of the
388 current function's return address. */
389 #define RETURN_ADDRESS_POINTER_REGNUM RAP_REG
391 /* A C expression whose value is RTL representing the value of the return
392 address for the frame COUNT steps up from the current frame.
393 FRAMEADDR is already the frame pointer of the COUNT frame, assuming
394 a stack layout with the frame pointer as the first saved register. */
395 #define RETURN_ADDR_RTX(COUNT, FRAME) h8300_return_addr_rtx ((COUNT), (FRAME))
397 /* Define the classes of registers for register constraints in the
398 machine description. Also define ranges of constants.
400 One of the classes must always be named ALL_REGS and include all hard regs.
401 If there is more than one class, another class must be named NO_REGS
402 and contain no registers.
404 The name GENERAL_REGS must be the name of a class (or an alias for
405 another name such as ALL_REGS). This is the class of registers
406 that is allowed by "g" or "r" in a register constraint.
407 Also, registers outside this class are allocated only when
408 instructions express preferences for them.
410 The classes must be numbered in nondecreasing order; that is,
411 a larger-numbered class must never be contained completely
412 in a smaller-numbered class.
414 For any two classes, it is very desirable that there be another
415 class that represents their union. */
418 NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS, LIM_REG_CLASSES
421 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
423 /* Give names of register classes as strings for dump file. */
425 #define REG_CLASS_NAMES \
426 { "NO_REGS", "GENERAL_REGS", "MAC_REGS", "ALL_REGS", "LIM_REGS" }
428 /* Define which registers fit in which classes.
429 This is an initializer for a vector of HARD_REG_SET
430 of length N_REG_CLASSES. */
432 #define REG_CLASS_CONTENTS \
433 { {0}, /* No regs */ \
434 {0x6ff}, /* GENERAL_REGS */ \
435 {0x100}, /* MAC_REGS */ \
436 {0x7ff}, /* ALL_REGS */ \
439 /* The same information, inverted:
440 Return the class number of the smallest class containing
441 reg number REGNO. This could be a conditional expression
442 or could index an array. */
444 #define REGNO_REG_CLASS(REGNO) (REGNO != MAC_REG ? GENERAL_REGS : MAC_REGS)
446 /* The class value for index registers, and the one for base regs. */
448 #define INDEX_REG_CLASS NO_REGS
449 #define BASE_REG_CLASS GENERAL_REGS
451 /* Get reg_class from a letter such as appears in the machine description.
453 'a' is the MAC register. */
455 #define REG_CLASS_FROM_LETTER(C) ((C) == 'a' ? MAC_REGS : NO_REGS)
457 /* The letters I, J, K, L, M, N, O, P in a register constraint string
458 can be used to stand for particular ranges of immediate operands.
459 This macro defines what the ranges are.
460 C is the letter, and VALUE is a constant value.
461 Return 1 if VALUE is in the range specified by C. */
463 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
464 #define CONST_OK_FOR_J(VALUE) (((VALUE) & 0xff) == 0)
465 #define CONST_OK_FOR_L(VALUE) \
466 (TARGET_H8300H || TARGET_H8300S \
467 ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 4 \
468 : (VALUE) == 1 || (VALUE) == 2)
469 #define CONST_OK_FOR_M(VALUE) \
470 ((VALUE) == 1 || (VALUE) == 2)
471 #define CONST_OK_FOR_N(VALUE) \
472 (TARGET_H8300H || TARGET_H8300S \
473 ? (VALUE) == -1 || (VALUE) == -2 || (VALUE) == -4 \
474 : (VALUE) == -1 || (VALUE) == -2)
475 #define CONST_OK_FOR_O(VALUE) \
476 ((VALUE) == -1 || (VALUE) == -2)
478 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
479 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
480 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
481 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
482 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
483 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : \
484 (C) == 'O' ? CONST_OK_FOR_O (VALUE) : \
487 /* Similar, but for floating constants, and defining letters G and H.
488 Here VALUE is the CONST_DOUBLE rtx itself.
490 `G' is a floating-point zero. */
492 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
493 ((C) == 'G' ? (VALUE) == CONST0_RTX (DFmode) \
496 /* Given an rtx X being reloaded into a reg required to be
497 in class CLASS, return the class of reg to actually use.
498 In general this is just CLASS; but on some machines
499 in some cases it is preferable to use a more restrictive class. */
501 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
503 /* Return the maximum number of consecutive registers
504 needed to represent mode MODE in a register of class CLASS. */
506 /* On the H8, this is the size of MODE in words. */
508 #define CLASS_MAX_NREGS(CLASS, MODE) \
509 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
511 /* Any SI register-to-register move may need to be reloaded,
512 so define REGISTER_MOVE_COST to be > 2 so that reload never
515 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
516 (CLASS1 == MAC_REGS || CLASS2 == MAC_REGS ? 6 : 3)
518 /* Stack layout; function entry, exit and calling. */
520 /* Define this if pushing a word on the stack
521 makes the stack pointer a smaller address. */
523 #define STACK_GROWS_DOWNWARD
525 /* Define this if the nominal address of the stack frame
526 is at the high-address end of the local variables;
527 that is, each additional local variable allocated
528 goes at a more negative offset in the frame. */
530 #define FRAME_GROWS_DOWNWARD
532 /* Offset within stack frame to start allocating local variables at.
533 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
534 first local allocated. Otherwise, it is the offset to the BEGINNING
535 of the first local allocated. */
537 #define STARTING_FRAME_OFFSET 0
539 /* If we generate an insn to push BYTES bytes,
540 this says how many the stack pointer really advances by.
542 On the H8/300, @-sp really pushes a byte if you ask it to - but that's
543 dangerous, so we claim that it always pushes a word, then we catch
544 the mov.b rx,@-sp and turn it into a mov.w rx,@-sp on output.
546 On the H8/300H, we simplify TARGET_QUICKCALL by setting this to 4
547 and doing a similar thing. */
549 #define PUSH_ROUNDING(BYTES) \
550 (((BYTES) + PARM_BOUNDARY / 8 - 1) & -PARM_BOUNDARY / 8)
552 /* Offset of first parameter from the argument pointer register value. */
553 /* Is equal to the size of the saved fp + pc, even if an fp isn't
554 saved since the value is used before we know. */
556 #define FIRST_PARM_OFFSET(FNDECL) 0
558 /* Value is the number of bytes of arguments automatically
559 popped when returning from a subroutine call.
560 FUNDECL is the declaration node of the function (as a tree),
561 FUNTYPE is the data type of the function (as a tree),
562 or for a library call it is an identifier node for the subroutine name.
563 SIZE is the number of bytes of arguments passed on the stack.
565 On the H8 the return does not pop anything. */
567 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
569 /* Definitions for register eliminations.
571 This is an array of structures. Each structure initializes one pair
572 of eliminable registers. The "from" register number is given first,
573 followed by "to". Eliminations of the same "from" register are listed
574 in order of preference.
576 We have two registers that can be eliminated on the h8300. First, the
577 frame pointer register can often be eliminated in favor of the stack
578 pointer register. Secondly, the argument pointer register can always be
579 eliminated; it is replaced with either the stack or frame pointer. */
581 #define ELIMINABLE_REGS \
582 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
583 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
584 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},\
585 { RETURN_ADDRESS_POINTER_REGNUM, FRAME_POINTER_REGNUM},\
586 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
588 /* Given FROM and TO register numbers, say whether this elimination is allowed.
589 Frame pointer elimination is automatically handled.
591 For the h8300, if frame pointer elimination is being done, we would like to
592 convert ap and rp into sp, not fp.
594 All other eliminations are valid. */
596 #define CAN_ELIMINATE(FROM, TO) \
597 ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
599 /* Define the offset between two registers, one to be eliminated, and the other
600 its replacement, at the start of a routine. */
602 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
603 ((OFFSET) = h8300_initial_elimination_offset ((FROM), (TO)))
605 /* Define how to find the value returned by a function.
606 VALTYPE is the data type of the value (as a tree).
607 If the precise function being called is known, FUNC is its FUNCTION_DECL;
608 otherwise, FUNC is 0.
610 On the H8 the return value is in R0/R1. */
612 #define FUNCTION_VALUE(VALTYPE, FUNC) \
613 gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
615 /* Define how to find the value returned by a library function
616 assuming the value has mode MODE. */
618 /* On the H8 the return value is in R0/R1. */
620 #define LIBCALL_VALUE(MODE) \
621 gen_rtx_REG (MODE, 0)
623 /* 1 if N is a possible register number for a function value.
624 On the H8, R0 is the only register thus used. */
626 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
628 /* Define this if PCC uses the nonreentrant convention for returning
629 structure and union values. */
631 /*#define PCC_STATIC_STRUCT_RETURN*/
633 /* 1 if N is a possible register number for function argument passing.
634 On the H8, no registers are used in this way. */
636 #define FUNCTION_ARG_REGNO_P(N) (TARGET_QUICKCALL ? N < 3 : 0)
638 /* Register in which address to store a structure value
639 is passed to a function. */
641 #define STRUCT_VALUE 0
643 /* Return true if X should be returned in memory. */
644 #define RETURN_IN_MEMORY(X) \
645 (TYPE_MODE (X) == BLKmode || GET_MODE_SIZE (TYPE_MODE (X)) > 4)
647 /* When defined, the compiler allows registers explicitly used in the
648 rtl to be used as spill registers but prevents the compiler from
649 extending the lifetime of these registers. */
651 #define SMALL_REGISTER_CLASSES 1
653 /* Define a data type for recording info about an argument list
654 during the scan of that argument list. This data type should
655 hold all necessary information about the function itself
656 and about the args processed so far, enough to enable macros
657 such as FUNCTION_ARG to determine where the next arg should go.
659 On the H8/300, this is a two item struct, the first is the number
660 of bytes scanned so far and the second is the rtx of the called
661 library function if any. */
663 #define CUMULATIVE_ARGS struct cum_arg
667 struct rtx_def *libcall;
670 /* Initialize a variable CUM of type CUMULATIVE_ARGS
671 for a call to a function whose data type is FNTYPE.
672 For a library call, FNTYPE is 0.
674 On the H8/300, the offset starts at 0. */
676 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
677 ((CUM).nbytes = 0, (CUM).libcall = LIBNAME)
679 /* Update the data in CUM to advance over an argument
680 of mode MODE and data type TYPE.
681 (TYPE is null for libcalls where that information may not be available.) */
683 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
684 ((CUM).nbytes += ((MODE) != BLKmode \
685 ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD \
686 : (int_size_in_bytes (TYPE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD))
688 /* Define where to put the arguments to a function.
689 Value is zero to push the argument on the stack,
690 or a hard register in which to store the argument.
692 MODE is the argument's machine mode.
693 TYPE is the data type of the argument (as a tree).
694 This is null for libcalls where that information may
696 CUM is a variable of type CUMULATIVE_ARGS which gives info about
697 the preceding args and about the function being called.
698 NAMED is nonzero if this argument is a named parameter
699 (otherwise it is an extra parameter matching an ellipsis). */
701 /* On the H8/300 all normal args are pushed, unless -mquickcall in which
702 case the first 3 arguments are passed in registers.
703 See function `function_arg'. */
705 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
706 function_arg (&CUM, MODE, TYPE, NAMED)
708 /* Output assembler code to FILE to increment profiler label # LABELNO
709 for profiling a function entry. */
711 #define FUNCTION_PROFILER(FILE, LABELNO) \
712 fprintf (FILE, "\t%s\t#LP%d,%s\n\tjsr @mcount\n", \
713 h8_mov_op, (LABELNO), h8_reg_names[0]);
715 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
716 the stack pointer does not matter. The value is tested only in
717 functions that have frame pointers.
718 No definition is equivalent to always zero. */
720 #define EXIT_IGNORE_STACK 0
722 /* We emit the entire trampoline with INITIALIZE_TRAMPOLINE.
723 Depending on the pointer size, we use a different trampoline.
727 1 0000 7903xxxx mov.w #0x1234,r3
728 2 0004 5A00xxxx jmp @0x1234
733 2 0000 7A03xxxxxxxx mov.l #0x12345678,er3
734 3 0006 5Axxxxxx jmp @0x123456
738 /* Length in units of the trampoline for entering a nested function. */
740 #define TRAMPOLINE_SIZE ((TARGET_H8300 || TARGET_NORMAL_MODE) ? 8 : 12)
742 /* Emit RTL insns to build a trampoline.
743 FNADDR is an RTX for the address of the function's pure code.
744 CXT is an RTX for the static chain value for the function. */
746 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
749 if (Pmode == HImode) \
751 emit_move_insn (gen_rtx_MEM (HImode, (TRAMP)), GEN_INT (0x7903)); \
752 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), \
754 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 4)), \
756 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), \
761 rtx tem = gen_reg_rtx (Pmode); \
763 emit_move_insn (gen_rtx_MEM (HImode, (TRAMP)), GEN_INT (0x7a03)); \
764 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), \
766 emit_move_insn (tem, (FNADDR)); \
767 emit_insn (gen_andsi3 (tem, tem, GEN_INT (0x00ffffff))); \
768 emit_insn (gen_iorsi3 (tem, tem, GEN_INT (0x5a000000))); \
769 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), \
775 /* Addressing modes, and classification of registers for them. */
777 #define HAVE_POST_INCREMENT 1
778 #define HAVE_PRE_DECREMENT 1
780 /* Macros to check register numbers against specific register classes. */
782 /* These assume that REGNO is a hard or pseudo reg number.
783 They give nonzero only if REGNO is a hard reg of the suitable class
784 or a pseudo reg currently allocated to a suitable hard reg.
785 Since they use reg_renumber, they are safe only once reg_renumber
786 has been allocated, which happens in local-alloc.c. */
788 #define REGNO_OK_FOR_INDEX_P(regno) 0
790 #define REGNO_OK_FOR_BASE_P(regno) \
791 (((regno) < FIRST_PSEUDO_REGISTER && regno != 8) || reg_renumber[regno] >= 0)
793 /* Maximum number of registers that can appear in a valid memory address. */
795 #define MAX_REGS_PER_ADDRESS 1
797 /* 1 if X is an rtx for a constant that is a valid address. */
799 #define CONSTANT_ADDRESS_P(X) \
800 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
801 || (GET_CODE (X) == CONST_INT \
802 /* We handle signed and unsigned offsets here. */ \
803 && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000) \
804 && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000)) \
805 || (GET_CODE (X) == HIGH || GET_CODE (X) == CONST))
807 /* Nonzero if the constant value X is a legitimate general operand.
808 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
810 #define LEGITIMATE_CONSTANT_P(X) (GET_CODE (X) != CONST_DOUBLE)
812 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
813 and check its validity for a certain class.
814 We have two alternate definitions for each of them.
815 The usual definition accepts all pseudo regs; the other rejects
816 them unless they have been allocated suitable hard regs.
817 The symbol REG_OK_STRICT causes the latter definition to be used.
819 Most source files want to accept pseudo regs in the hope that
820 they will get allocated to the class that the insn wants them to be in.
821 Source files for reload pass need to be strict.
822 After reload, it makes no difference, since pseudo regs have
823 been eliminated by then. */
825 #ifndef REG_OK_STRICT
827 /* Nonzero if X is a hard reg that can be used as an index
828 or if it is a pseudo reg. */
829 #define REG_OK_FOR_INDEX_P(X) 0
830 /* Nonzero if X is a hard reg that can be used as a base reg
831 or if it is a pseudo reg. */
832 /* Don't use REGNO_OK_FOR_BASE_P here because it uses reg_renumber. */
833 #define REG_OK_FOR_BASE_P(X) \
834 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REGNO (X) != 8)
835 #define REG_OK_FOR_INDEX_P_STRICT(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
836 #define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X))
841 /* Nonzero if X is a hard reg that can be used as an index. */
842 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
843 /* Nonzero if X is a hard reg that can be used as a base reg. */
844 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
849 /* Extra constraints. */
851 #define OK_FOR_R(OP) \
852 (GET_CODE (OP) == CONST_INT \
853 ? !h8300_shift_needs_scratch_p (INTVAL (OP), QImode) \
856 #define OK_FOR_S(OP) \
857 (GET_CODE (OP) == CONST_INT \
858 ? !h8300_shift_needs_scratch_p (INTVAL (OP), HImode) \
861 #define OK_FOR_T(OP) \
862 (GET_CODE (OP) == CONST_INT \
863 ? !h8300_shift_needs_scratch_p (INTVAL (OP), SImode) \
866 /* 'U' if valid for a bset destination;
867 i.e. a register, register indirect, or the eightbit memory region
868 (a SYMBOL_REF with an SYMBOL_REF_FLAG set).
870 On the H8S 'U' can also be a 16bit or 32bit absolute. */
871 #define OK_FOR_U(OP) \
872 ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \
873 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
874 && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
875 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \
877 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == CONST \
878 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \
879 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == SYMBOL_REF \
880 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT \
882 || SYMBOL_REF_FLAG (XEXP (XEXP (XEXP (OP, 0), 0), 0)))) \
883 || (GET_CODE (OP) == MEM \
884 && h8300_eightbit_constant_address_p (XEXP (OP, 0))) \
885 || (GET_CODE (OP) == MEM && TARGET_H8300S \
886 && GET_CODE (XEXP (OP, 0)) == CONST_INT))
888 #define EXTRA_CONSTRAINT(OP, C) \
889 ((C) == 'R' ? OK_FOR_R (OP) : \
890 (C) == 'S' ? OK_FOR_S (OP) : \
891 (C) == 'T' ? OK_FOR_T (OP) : \
892 (C) == 'U' ? OK_FOR_U (OP) : \
895 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
896 that is a valid memory address for an instruction.
897 The MODE argument is the machine mode for the MEM expression
898 that wants to use this address.
900 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
901 except for CONSTANT_ADDRESS_P which is actually
904 On the H8/300, a legitimate address has the form
905 REG, REG+CONSTANT_ADDRESS or CONSTANT_ADDRESS. */
907 /* Accept either REG or SUBREG where a register is valid. */
909 #define RTX_OK_FOR_BASE_P(X) \
910 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
911 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
912 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
914 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
915 if (RTX_OK_FOR_BASE_P (X)) goto ADDR; \
916 if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
917 if (GET_CODE (X) == PLUS \
918 && CONSTANT_ADDRESS_P (XEXP (X, 1)) \
919 && RTX_OK_FOR_BASE_P (XEXP (X, 0))) goto ADDR;
921 /* Try machine-dependent ways of modifying an illegitimate address
922 to be legitimate. If we find one, return the new, valid address.
923 This macro is used in only one place: `memory_address' in explow.c.
925 OLDX is the address as it was before break_out_memory_refs was called.
926 In some cases it is useful to look at this to decide what needs to be done.
928 MODE and WIN are passed so that this macro can use
929 GO_IF_LEGITIMATE_ADDRESS.
931 It is always safe for this macro to do nothing. It exists to recognize
932 opportunities to optimize the output.
934 For the H8/300, don't do anything. */
936 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) {}
938 /* Go to LABEL if ADDR (a legitimate address expression)
939 has an effect that depends on the machine mode it is used for.
941 On the H8/300, the predecrement and postincrement address depend thus
942 (the amount of decrement or increment being the length of the operand). */
944 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
945 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL;
947 /* Specify the machine mode that this machine uses
948 for the index in the tablejump instruction. */
949 #define CASE_VECTOR_MODE Pmode
951 /* Define as C expression which evaluates to nonzero if the tablejump
952 instruction expects the table to contain offsets from the address of the
954 Do not define this if the table should contain absolute addresses. */
955 /*#define CASE_VECTOR_PC_RELATIVE 1 */
957 /* Define this as 1 if `char' should by default be signed; else as 0.
959 On the H8/300, sign extension is expensive, so we'll say that chars
961 #define DEFAULT_SIGNED_CHAR 0
963 /* This flag, if defined, says the same insns that convert to a signed fixnum
964 also convert validly to an unsigned one. */
965 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
967 /* Max number of bytes we can move from memory to memory
968 in one reasonably fast instruction. */
969 #define MOVE_MAX (TARGET_H8300H || TARGET_H8300S ? 4 : 2)
970 #define MAX_MOVE_MAX 4
972 /* Nonzero if access to memory by bytes is slow and undesirable. */
973 #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE
975 /* Define if shifts truncate the shift count
976 which implies one can omit a sign-extension or zero-extension
978 /* #define SHIFT_COUNT_TRUNCATED */
980 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
981 is done just by pretending it is already truncated. */
982 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
984 /* Specify the machine mode that pointers have.
985 After generation of rtl, the compiler makes no further distinction
986 between pointers and any other objects of this machine mode. */
988 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? SImode : HImode)
991 We use longs for the H8/300H and the H8S because ints can be 16 or 32.
992 GCC requires SIZE_TYPE to be the same size as pointers. */
994 (TARGET_H8300 || TARGET_NORMAL_MODE ? "unsigned int" : "long unsigned int")
995 #define PTRDIFF_TYPE \
996 (TARGET_H8300 || TARGET_NORMAL_MODE ? "int" : "long int")
998 #define POINTER_SIZE \
999 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? 32 : 16)
1001 #define WCHAR_TYPE "short unsigned int"
1002 #define WCHAR_TYPE_SIZE 16
1003 #define MAX_WCHAR_TYPE_SIZE 16
1005 /* A function address in a call instruction
1006 is a byte address (for indexing purposes)
1007 so give the MEM rtx a byte's mode. */
1008 #define FUNCTION_MODE QImode
1010 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1011 LENGTH += h8300_adjust_insn_length (INSN, LENGTH);
1013 /* Compute the cost of computing a constant rtl expression RTX
1014 whose rtx-code is CODE. The body of this macro is a portion
1015 of a switch statement. If the code is computed here,
1016 return it with a return statement. Otherwise, break from the switch. */
1018 #define DEFAULT_RTX_COSTS(RTX, CODE, OUTER_CODE) \
1019 return (const_costs (RTX, CODE, OUTER_CODE));
1021 #define BRANCH_COST 0
1023 /* We say that MOD and DIV are so cheap because otherwise we'll
1024 generate some really horrible code for division of a power of two. */
1026 /* Provide the costs of a rtl expression. This is in the body of a
1029 #define RTX_COSTS(RTX, CODE, OUTER_CODE) \
1031 return COSTS_N_INSNS (h8300_and_costs (RTX)); \
1040 return COSTS_N_INSNS (h8300_shift_costs (RTX)); \
1043 if (GET_MODE (RTX) == HImode) return 2; \
1046 /* Tell final.c how to eliminate redundant test instructions. */
1048 /* Here we define machine-dependent flags and fields in cc_status
1049 (see `conditions.h'). No extra ones are needed for the h8300. */
1051 /* Store in cc_status the expressions
1052 that the condition codes will describe
1053 after execution of an instruction whose pattern is EXP.
1054 Do not alter them if the instruction would not alter the cc's. */
1056 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc (EXP, INSN)
1058 /* The add insns don't set overflow in a usable way. */
1059 #define CC_OVERFLOW_UNUSABLE 01000
1060 /* The mov,and,or,xor insns don't set carry. That's OK though as the
1061 Z bit is all we need when doing unsigned comparisons on the result of
1062 these insns (since they're always with 0). However, conditions.h has
1063 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
1065 #define CC_NO_CARRY CC_NO_OVERFLOW
1067 /* Control the assembler format that we output. */
1069 /* Output at beginning/end of assembler file. */
1071 #define ASM_FILE_START(FILE) asm_file_start (FILE)
1073 #define ASM_FILE_END(FILE) asm_file_end (FILE)
1075 /* Output to assembler file text saying following lines
1076 may contain character constants, extra white space, comments, etc. */
1078 #define ASM_APP_ON "; #APP\n"
1080 /* Output to assembler file text saying following lines
1081 no longer contain unusual constructs. */
1083 #define ASM_APP_OFF "; #NO_APP\n"
1085 #define FILE_ASM_OP "\t.file\n"
1086 #define IDENT_ASM_OP "\t.ident\t"
1088 /* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */
1089 #define ASM_WORD_OP \
1090 (TARGET_H8300 || TARGET_NORMAL_MODE ? "\t.word\t" : "\t.long\t")
1092 #define TEXT_SECTION_ASM_OP "\t.section .text"
1093 #define DATA_SECTION_ASM_OP "\t.section .data"
1094 #define BSS_SECTION_ASM_OP "\t.section .bss"
1095 #define INIT_SECTION_ASM_OP "\t.section .init"
1096 #define READONLY_DATA_SECTION_ASM_OP "\t.section .rodata"
1098 #undef DO_GLOBAL_CTORS_BODY
1099 #define DO_GLOBAL_CTORS_BODY \
1101 typedef (*pfunc)(); \
1102 extern pfunc __ctors[]; \
1103 extern pfunc __ctors_end[]; \
1105 for (p = __ctors_end; p > __ctors; ) \
1111 #undef DO_GLOBAL_DTORS_BODY
1112 #define DO_GLOBAL_DTORS_BODY \
1114 typedef (*pfunc)(); \
1115 extern pfunc __dtors[]; \
1116 extern pfunc __dtors_end[]; \
1118 for (p = __dtors; p < __dtors_end; p++) \
1124 #define TINY_DATA_NAME_P(NAME) (*(NAME) == '&')
1126 /* How to refer to registers in assembler output.
1127 This sequence is indexed by compiler's hard-register-number (see above). */
1129 #define REGISTER_NAMES \
1130 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "mac", "ap", "rap" }
1132 #define ADDITIONAL_REGISTER_NAMES \
1133 { {"er0", 0}, {"er1", 1}, {"er2", 2}, {"er3", 3}, {"er4", 4}, \
1134 {"er5", 5}, {"er6", 6}, {"er7", 7}, {"r7", 7} }
1136 #define SDB_DEBUGGING_INFO 1
1137 #define SDB_DELIM "\n"
1139 /* Support -gstabs. */
1141 #include "dbxcoff.h"
1143 /* Override definition in dbxcoff.h. */
1144 /* Generate a blank trailing N_SO to mark the end of the .o file, since
1145 we can't depend upon the linker to mark .o file boundaries with
1148 #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END
1149 #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \
1151 "\t.text\n.stabs \"\",%d,0,0,.Letext\n.Letext:\n", N_SO)
1153 /* Switch into a generic section. */
1154 #define TARGET_ASM_NAMED_SECTION h8300_asm_named_section
1156 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1157 asm_fprintf ((FILE), "%U%s", (NAME) + (TINY_DATA_NAME_P (NAME) ? 1 : 0))
1159 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)
1161 /* Globalizing directive for a label. */
1162 #define GLOBAL_ASM_OP "\t.global "
1164 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1165 ASM_OUTPUT_LABEL (FILE, NAME)
1167 /* The prefix to add to user-visible assembler symbols. */
1169 #define USER_LABEL_PREFIX "_"
1171 /* This is how to store into the string LABEL
1172 the symbol_ref name of an internal numbered label where
1173 PREFIX is the class of label and NUM is the number within the class.
1174 This is suitable for output with `assemble_name'.
1176 N.B.: The h8300.md branch_true and branch_false patterns also know
1177 how to generate internal labels. */
1178 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1179 sprintf (LABEL, "*.%s%d", PREFIX, NUM)
1181 /* This is how to output an insn to push a register on the stack.
1182 It need not be very fast code. */
1184 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1185 fprintf (FILE, "\t%s\t%s\n", h8_push_op, h8_reg_names[REGNO])
1187 /* This is how to output an insn to pop a register from the stack.
1188 It need not be very fast code. */
1190 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1191 fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO])
1193 /* This is how to output an element of a case-vector that is absolute. */
1195 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1196 fprintf (FILE, "%s.L%d\n", ASM_WORD_OP, VALUE)
1198 /* This is how to output an element of a case-vector that is relative. */
1200 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1201 fprintf (FILE, "%s.L%d-.L%d\n", ASM_WORD_OP, VALUE, REL)
1203 /* This is how to output an assembler line
1204 that says to advance the location counter
1205 to a multiple of 2**LOG bytes. */
1207 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1209 fprintf (FILE, "\t.align %d\n", (LOG))
1211 /* This is how to output an assembler line
1212 that says to advance the location counter by SIZE bytes. */
1214 #define ASM_OUTPUT_IDENT(FILE, NAME) \
1215 fprintf (FILE, "%s\"%s\"\n", IDENT_ASM_OP, NAME)
1217 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1218 fprintf (FILE, "\t.space %d\n", (SIZE))
1220 /* This says how to output an assembler line
1221 to define a global common symbol. */
1223 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1224 ( fputs ("\t.comm ", (FILE)), \
1225 assemble_name ((FILE), (NAME)), \
1226 fprintf ((FILE), ",%d\n", (SIZE)))
1228 /* This says how to output the assembler to define a global
1229 uninitialized but not common symbol.
1230 Try to use asm_output_bss to implement this macro. */
1232 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
1233 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
1235 /* This says how to output an assembler line
1236 to define a local common symbol. */
1238 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1239 ( fputs ("\t.lcomm ", (FILE)), \
1240 assemble_name ((FILE), (NAME)), \
1241 fprintf ((FILE), ",%d\n", (SIZE)))
1243 #define ASM_PN_FORMAT "%s___%lu"
1245 /* Print an instruction operand X on file FILE.
1246 Look in h8300.c for details. */
1248 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1251 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1253 /* Print a memory operand whose address is X, on file FILE.
1254 This uses a function in h8300.c. */
1256 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1258 /* H8300 specific pragmas. */
1259 #define REGISTER_TARGET_PRAGMAS() \
1262 c_register_pragma (0, "saveall", h8300_pr_saveall); \
1263 c_register_pragma (0, "interrupt", h8300_pr_interrupt); \
1267 #define FINAL_PRESCAN_INSN(insn, operand, nop) \
1268 final_prescan_insn (insn, operand, nop)
1270 /* Define this macro if GNU CC should generate calls to the System V
1271 (and ANSI C) library functions `memcpy' and `memset' rather than
1272 the BSD functions `bcopy' and `bzero'. */
1274 #define TARGET_MEM_FUNCTIONS 1
1276 #define MULHI3_LIBCALL "__mulhi3"
1277 #define DIVHI3_LIBCALL "__divhi3"
1278 #define UDIVHI3_LIBCALL "__udivhi3"
1279 #define MODHI3_LIBCALL "__modhi3"
1280 #define UMODHI3_LIBCALL "__umodhi3"
1282 /* Perform target dependent optabs initialization. */
1284 #define INIT_TARGET_OPTABS \
1287 smul_optab->handlers[(int) HImode].libfunc \
1288 = init_one_libfunc (MULHI3_LIBCALL); \
1289 sdiv_optab->handlers[(int) HImode].libfunc \
1290 = init_one_libfunc (DIVHI3_LIBCALL); \
1291 udiv_optab->handlers[(int) HImode].libfunc \
1292 = init_one_libfunc (UDIVHI3_LIBCALL); \
1293 smod_optab->handlers[(int) HImode].libfunc \
1294 = init_one_libfunc (MODHI3_LIBCALL); \
1295 umod_optab->handlers[(int) HImode].libfunc \
1296 = init_one_libfunc (UMODHI3_LIBCALL); \
1300 #define MOVE_RATIO 3
1302 /* Define the codes that are matched by predicates in h8300.c. */
1304 #define PREDICATE_CODES \
1305 {"single_one_operand", {CONST_INT}}, \
1306 {"single_zero_operand", {CONST_INT}}, \
1307 {"call_insn_operand", {MEM}}, \
1308 {"small_call_insn_operand", {MEM}}, \
1309 {"jump_address_operand", {REG, MEM}}, \
1310 {"two_insn_adds_subs_operand", {CONST_INT}}, \
1311 {"bit_operand", {REG, SUBREG, MEM}}, \
1312 {"bit_memory_operand", {MEM}}, \
1313 {"stack_pointer_operand", {REG}}, \
1314 {"const_int_le_2_operand", {CONST_INT}}, \
1315 {"const_int_le_6_operand", {CONST_INT}}, \
1316 {"const_int_gt_2_operand", {CONST_INT}}, \
1317 {"const_int_ge_8_operand", {CONST_INT}}, \
1318 {"const_int_qi_operand", {CONST_INT}}, \
1319 {"const_int_hi_operand", {CONST_INT}}, \
1320 {"incdec_operand", {CONST_INT}}, \
1321 {"bit_operator", {XOR, AND, IOR}}, \
1322 {"nshift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT}}, \
1323 {"eqne_operator", {EQ, NE}},
1325 #endif /* ! GCC_H8300_H */