1 /* Target macros for the FRV port of GCC.
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by Red Hat Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 2, or (at your
11 option) any later version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 /* Frv general purpose macros. */
27 /* Align an address. */
28 #define ADDR_ALIGN(addr,align) (((addr) + (align) - 1) & ~((align) - 1))
30 /* Return true if a value is inside a range. */
31 #define IN_RANGE_P(VALUE, LOW, HIGH) \
32 ( (((HOST_WIDE_INT)(VALUE)) >= (HOST_WIDE_INT)(LOW)) \
33 && (((HOST_WIDE_INT)(VALUE)) <= ((HOST_WIDE_INT)(HIGH))))
36 /* Driver configuration. */
38 /* A C expression which determines whether the option `-CHAR' takes arguments.
39 The value should be the number of arguments that option takes-zero, for many
42 By default, this macro is defined to handle the standard options properly.
43 You need not define it unless you wish to add additional options which take
47 #undef SWITCH_TAKES_ARG
48 #define SWITCH_TAKES_ARG(CHAR) \
49 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
51 /* A C expression which determines whether the option `-NAME' takes arguments.
52 The value should be the number of arguments that option takes-zero, for many
53 options. This macro rather than `SWITCH_TAKES_ARG' is used for
54 multi-character option names.
56 By default, this macro is defined as `DEFAULT_WORD_SWITCH_TAKES_ARG', which
57 handles the standard options properly. You need not define
58 `WORD_SWITCH_TAKES_ARG' unless you wish to add additional options which take
59 arguments. Any redefinition should call `DEFAULT_WORD_SWITCH_TAKES_ARG' and
60 then check for additional options.
63 #undef WORD_SWITCH_TAKES_ARG
65 /* -fpic and -fPIC used to imply the -mlibrary-pic multilib, but with
66 FDPIC which multilib to use depends on whether FDPIC is in use or
67 not. The trick we use is to introduce -multilib-library-pic as a
68 pseudo-flag that selects the library-pic multilib, and map fpic
69 and fPIC to it only if fdpic is not selected. Also, if fdpic is
70 selected and no PIC/PIE options are present, we imply -fPIE.
71 Otherwise, if -fpic or -fPIC are enabled and we're optimizing for
72 speed, or if we have -On with n>=3, enable inlining of PLTs. As
73 for -mgprel-ro, we want to enable it by default, but not for -fpic or
76 #define DRIVER_SELF_SPECS SUBTARGET_DRIVER_SELF_SPECS \
78 %{!mhard-float:-msoft-float}\
79 %{!mmedia:-mno-media}}\
80 %{!mfdpic:%{fpic|fPIC: -multilib-library-pic}}\
81 %{mfdpic:%{!fpic:%{!fpie:%{!fPIC:%{!fPIE:\
82 %{!fno-pic:%{!fno-pie:%{!fno-PIC:%{!fno-PIE:-fPIE}}}}}}}} \
83 %{!mno-inline-plt:%{O*:%{!O0:%{!Os:%{fpic|fPIC:-minline-plt} \
84 %{!fpic:%{!fPIC:%{!O:%{!O1:%{!O2:-minline-plt}}}}}}}}} \
85 %{!mno-gprel-ro:%{!fpic:%{!fpie:-mgprel-ro}}}} \
87 #ifndef SUBTARGET_DRIVER_SELF_SPECS
88 # define SUBTARGET_DRIVER_SELF_SPECS
91 /* A C string constant that tells the GCC driver program options to pass to
92 the assembler. It can also specify how to translate options you give to GNU
93 CC into options for GCC to pass to the assembler. See the file `sun3.h'
94 for an example of this.
96 Do not define this macro if it does not need to do anything.
101 %{G*} %{v} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \
105 %{mgpr-*} %{mfpr-*} \
106 %{msoft-float} %{mhard-float} \
107 %{mdword} %{mno-dword} \
108 %{mdouble} %{mno-double} \
109 %{mmedia} %{mno-media} \
110 %{mmuladd} %{mno-muladd} \
111 %{mpack} %{mno-pack} \
112 %{mno-fdpic:-mnopic} %{mfdpic} \
113 %{fpic|fpie: -mpic} %{fPIC|fPIE: -mPIC} %{mlibrary-pic}}"
115 /* Another C string constant used much like `LINK_SPEC'. The difference
116 between the two is that `STARTFILE_SPEC' is used at the very beginning of
117 the command given to the linker.
119 If this macro is not defined, a default is provided that loads the standard
120 C startup file from the usual place. See `gcc.c'.
122 Defined in svr4.h. */
123 #undef STARTFILE_SPEC
124 #define STARTFILE_SPEC "crt0%O%s frvbegin%O%s"
126 /* Another C string constant used much like `LINK_SPEC'. The difference
127 between the two is that `ENDFILE_SPEC' is used at the very end of the
128 command given to the linker.
130 Do not define this macro if it does not need to do anything.
132 Defined in svr4.h. */
134 #define ENDFILE_SPEC "frvend%O%s"
137 #define MASK_DEFAULT_FRV \
144 #define MASK_DEFAULT_FR500 \
145 (MASK_MEDIA | MASK_DWORD | MASK_PACK)
147 #define MASK_DEFAULT_FR550 \
148 (MASK_MEDIA | MASK_DWORD | MASK_PACK)
150 #define MASK_DEFAULT_FR450 \
158 #define MASK_DEFAULT_FR400 \
167 #define MASK_DEFAULT_SIMPLE \
168 (MASK_GPR_32 | MASK_SOFT_FLOAT)
170 /* A C string constant that tells the GCC driver program options to pass to
171 `cc1'. It can also specify how to translate options you give to GCC into
172 options for GCC to pass to the `cc1'.
174 Do not define this macro if it does not need to do anything. */
175 /* For ABI compliance, we need to put bss data into the normal data section. */
176 #define CC1_SPEC "%{G*}"
178 /* A C string constant that tells the GCC driver program options to pass to
179 the linker. It can also specify how to translate options you give to GCC
180 into options for GCC to pass to the linker.
182 Do not define this macro if it does not need to do anything.
184 Defined in svr4.h. */
185 /* Override the svr4.h version with one that dispenses without the svr4
186 shared library options, notably -G. */
191 %{mfdpic:-melf32frvfd -z text} \
192 %{static:-dn -Bstatic} \
193 %{shared:-Bdynamic} \
194 %{symbolic:-Bsymbolic} \
199 /* Another C string constant used much like `LINK_SPEC'. The difference
200 between the two is that `LIB_SPEC' is used at the end of the command given
203 If this macro is not defined, a default is provided that loads the standard
204 C library from the usual place. See `gcc.c'.
206 Defined in svr4.h. */
209 #define LIB_SPEC "--start-group -lc -lsim --end-group"
212 #define CPU_TYPE FRV_CPU_FR500
215 /* Run-time target specifications */
217 #define TARGET_CPU_CPP_BUILTINS() \
222 builtin_define ("__frv__"); \
223 builtin_assert ("machine=frv"); \
225 issue_rate = frv_issue_rate (); \
226 if (issue_rate > 1) \
227 builtin_define_with_int_value ("__FRV_VLIW__", issue_rate); \
228 builtin_define_with_int_value ("__FRV_GPR__", NUM_GPRS); \
229 builtin_define_with_int_value ("__FRV_FPR__", NUM_FPRS); \
230 builtin_define_with_int_value ("__FRV_ACC__", NUM_ACCS); \
232 switch (frv_cpu_type) \
234 case FRV_CPU_GENERIC: \
235 builtin_define ("__CPU_GENERIC__"); \
237 case FRV_CPU_FR550: \
238 builtin_define ("__CPU_FR550__"); \
240 case FRV_CPU_FR500: \
241 case FRV_CPU_TOMCAT: \
242 builtin_define ("__CPU_FR500__"); \
244 case FRV_CPU_FR450: \
245 builtin_define ("__CPU_FR450__"); \
247 case FRV_CPU_FR405: \
248 builtin_define ("__CPU_FR405__"); \
250 case FRV_CPU_FR400: \
251 builtin_define ("__CPU_FR400__"); \
253 case FRV_CPU_FR300: \
254 case FRV_CPU_SIMPLE: \
255 builtin_define ("__CPU_FR300__"); \
259 if (TARGET_HARD_FLOAT) \
260 builtin_define ("__FRV_HARD_FLOAT__"); \
262 builtin_define ("__FRV_DWORD__"); \
264 builtin_define ("__FRV_FDPIC__"); \
265 if (flag_leading_underscore > 0) \
266 builtin_define ("__FRV_UNDERSCORE__"); \
271 #define TARGET_HAS_FPRS (TARGET_HARD_FLOAT || TARGET_MEDIA)
273 #define NUM_GPRS (TARGET_GPR_32? 32 : 64)
274 #define NUM_FPRS (!TARGET_HAS_FPRS? 0 : TARGET_FPR_32? 32 : 64)
275 #define NUM_ACCS (!TARGET_MEDIA? 0 : TARGET_ACC_4? 4 : 8)
277 /* X is a valid accumulator number if (X & ACC_MASK) == X. */
281 : frv_cpu_type == FRV_CPU_FR450 ? 11 \
284 /* Macros to identify the blend of media instructions available. Revision 1
285 is the one found on the FR500. Revision 2 includes the changes made for
288 Treat the generic processor as a revision 1 machine for now, for
289 compatibility with earlier releases. */
291 #define TARGET_MEDIA_REV1 \
293 && (frv_cpu_type == FRV_CPU_GENERIC \
294 || frv_cpu_type == FRV_CPU_FR500))
296 #define TARGET_MEDIA_REV2 \
298 && (frv_cpu_type == FRV_CPU_FR400 \
299 || frv_cpu_type == FRV_CPU_FR405 \
300 || frv_cpu_type == FRV_CPU_FR450 \
301 || frv_cpu_type == FRV_CPU_FR550))
303 #define TARGET_MEDIA_FR450 \
304 (frv_cpu_type == FRV_CPU_FR450)
306 #define TARGET_FR500_FR550_BUILTINS \
307 (frv_cpu_type == FRV_CPU_FR500 \
308 || frv_cpu_type == FRV_CPU_FR550)
310 #define TARGET_FR405_BUILTINS \
311 (frv_cpu_type == FRV_CPU_FR405 \
312 || frv_cpu_type == FRV_CPU_FR450)
315 #define HAVE_AS_TLS 0
318 /* This macro is a C statement to print on `stderr' a string describing the
319 particular machine description choice. Every machine description should
320 define `TARGET_VERSION'. For example:
323 #define TARGET_VERSION \
324 fprintf (stderr, " (68k, Motorola syntax)");
326 #define TARGET_VERSION \
327 fprintf (stderr, " (68k, MIT syntax)");
329 #define TARGET_VERSION fprintf (stderr, _(" (frv)"))
331 /* Sometimes certain combinations of command options do not make sense on a
332 particular target machine. You can define a macro `OVERRIDE_OPTIONS' to
333 take account of this. This macro, if defined, is executed once just after
334 all the command options have been parsed.
336 Don't use this macro to turn on various extra optimizations for `-O'. That
337 is what `OPTIMIZATION_OPTIONS' is for. */
339 #define OVERRIDE_OPTIONS frv_override_options ()
341 /* Some machines may desire to change what optimizations are performed for
342 various optimization levels. This macro, if defined, is executed once just
343 after the optimization level is determined and before the remainder of the
344 command options have been parsed. Values set in this macro are used as the
345 default values for the other command line options.
347 LEVEL is the optimization level specified; 2 if `-O2' is specified, 1 if
348 `-O' is specified, and 0 if neither is specified.
350 SIZE is nonzero if `-Os' is specified, 0 otherwise.
352 You should not use this macro to change options that are not
353 machine-specific. These should uniformly selected by the same optimization
354 level on all supported machines. Use this macro to enable machine-specific
357 *Do not examine `write_symbols' in this macro!* The debugging options are
358 *not supposed to alter the generated code. */
359 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) frv_optimization_options (LEVEL, SIZE)
362 /* Define this macro if debugging can be performed even without a frame
363 pointer. If this macro is defined, GCC will turn on the
364 `-fomit-frame-pointer' option whenever `-O' is specified. */
365 /* Frv needs a specific frame layout that includes the frame pointer. */
367 #define CAN_DEBUG_WITHOUT_FP
369 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (TARGET_ALIGN_LABELS ? 3 : 0)
371 /* Small Data Area Support. */
372 /* Maximum size of variables that go in .sdata/.sbss.
373 The -msdata=foo switch also controls how small variables are handled. */
374 #ifndef SDATA_DEFAULT_SIZE
375 #define SDATA_DEFAULT_SIZE 8
381 /* Define this macro to have the value 1 if the most significant bit in a byte
382 has the lowest number; otherwise define it to have the value zero. This
383 means that bit-field instructions count from the most significant bit. If
384 the machine has no bit-field instructions, then this must still be defined,
385 but it doesn't matter which value it is defined to. This macro need not be
388 This macro does not affect the way structure fields are packed into bytes or
389 words; that is controlled by `BYTES_BIG_ENDIAN'. */
390 #define BITS_BIG_ENDIAN 1
392 /* Define this macro to have the value 1 if the most significant byte in a word
393 has the lowest number. This macro need not be a constant. */
394 #define BYTES_BIG_ENDIAN 1
396 /* Define this macro to have the value 1 if, in a multiword object, the most
397 significant word has the lowest number. This applies to both memory
398 locations and registers; GCC fundamentally assumes that the order of
399 words in memory is the same as the order in registers. This macro need not
401 #define WORDS_BIG_ENDIAN 1
403 /* Number of storage units in a word; normally 4. */
404 #define UNITS_PER_WORD 4
406 /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and
407 which has the specified mode and signedness is to be stored in a register.
408 This macro is only called when TYPE is a scalar type.
410 On most RISC machines, which only have operations that operate on a full
411 register, define this macro to set M to `word_mode' if M is an integer mode
412 narrower than `BITS_PER_WORD'. In most cases, only integer modes should be
413 widened because wider-precision floating-point operations are usually more
414 expensive than their narrower counterparts.
416 For most machines, the macro definition does not change UNSIGNEDP. However,
417 some machines, have instructions that preferentially handle either signed or
418 unsigned quantities of certain modes. For example, on the DEC Alpha, 32-bit
419 loads from memory and 32-bit add instructions sign-extend the result to 64
420 bits. On such machines, set UNSIGNEDP according to which kind of extension
423 Do not define this macro if it would never modify MODE. */
424 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
427 if (GET_MODE_CLASS (MODE) == MODE_INT \
428 && GET_MODE_SIZE (MODE) < 4) \
433 /* Normal alignment required for function parameters on the stack, in bits.
434 All stack parameters receive at least this much alignment regardless of data
435 type. On most machines, this is the same as the size of an integer. */
436 #define PARM_BOUNDARY 32
438 /* Define this macro if you wish to preserve a certain alignment for the stack
439 pointer. The definition is a C expression for the desired alignment
442 If `PUSH_ROUNDING' is not defined, the stack will always be aligned to the
443 specified boundary. If `PUSH_ROUNDING' is defined and specifies a less
444 strict alignment than `STACK_BOUNDARY', the stack may be momentarily
445 unaligned while pushing arguments. */
446 #define STACK_BOUNDARY 64
448 /* Alignment required for a function entry point, in bits. */
449 #define FUNCTION_BOUNDARY 128
451 /* Biggest alignment that any data type can require on this machine,
453 #define BIGGEST_ALIGNMENT 64
455 /* @@@ A hack, needed because libobjc wants to use ADJUST_FIELD_ALIGN for
457 #ifdef IN_TARGET_LIBS
458 #define BIGGEST_FIELD_ALIGNMENT 64
460 /* An expression for the alignment of a structure field FIELD if the
461 alignment computed in the usual way is COMPUTED. GCC uses this
462 value instead of the value in `BIGGEST_ALIGNMENT' or
463 `BIGGEST_FIELD_ALIGNMENT', if defined, for structure fields only. */
464 #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
465 frv_adjust_field_align (FIELD, COMPUTED)
468 /* If defined, a C expression to compute the alignment for a static variable.
469 TYPE is the data type, and ALIGN is the alignment that the object
470 would ordinarily have. The value of this macro is used instead of that
471 alignment to align the object.
473 If this macro is not defined, then ALIGN is used.
475 One use of this macro is to increase alignment of medium-size data to make
476 it all fit in fewer cache lines. Another is to cause character arrays to be
477 word-aligned so that `strcpy' calls that copy constants to character arrays
478 can be done inline. */
479 #define DATA_ALIGNMENT(TYPE, ALIGN) \
480 (TREE_CODE (TYPE) == ARRAY_TYPE \
481 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
482 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
484 /* If defined, a C expression to compute the alignment given to a constant that
485 is being placed in memory. CONSTANT is the constant and ALIGN is the
486 alignment that the object would ordinarily have. The value of this macro is
487 used instead of that alignment to align the object.
489 If this macro is not defined, then ALIGN is used.
491 The typical use of this macro is to increase alignment for string constants
492 to be word aligned so that `strcpy' calls that copy constants can be done
494 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
495 (TREE_CODE (EXP) == STRING_CST \
496 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
498 /* Define this macro to be the value 1 if instructions will fail to work if
499 given data not on the nominal alignment. If instructions will merely go
500 slower in that case, define this macro as 0. */
501 #define STRICT_ALIGNMENT 1
503 /* Define this if you wish to imitate the way many other C compilers handle
504 alignment of bitfields and the structures that contain them.
506 The behavior is that the type written for a bit-field (`int', `short', or
507 other integer type) imposes an alignment for the entire structure, as if the
508 structure really did contain an ordinary field of that type. In addition,
509 the bit-field is placed within the structure so that it would fit within such
510 a field, not crossing a boundary for it.
512 Thus, on most machines, a bit-field whose type is written as `int' would not
513 cross a four-byte boundary, and would force four-byte alignment for the
514 whole structure. (The alignment used may not be four bytes; it is
515 controlled by the other alignment parameters.)
517 If the macro is defined, its definition should be a C expression; a nonzero
518 value for the expression enables this behavior.
520 Note that if this macro is not defined, or its value is zero, some bitfields
521 may cross more than one alignment boundary. The compiler can support such
522 references if there are `insv', `extv', and `extzv' insns that can directly
525 The other known way of making bitfields work is to define
526 `STRUCTURE_SIZE_BOUNDARY' as large as `BIGGEST_ALIGNMENT'. Then every
527 structure can be accessed with fullwords.
529 Unless the machine has bit-field instructions or you define
530 `STRUCTURE_SIZE_BOUNDARY' that way, you must define
531 `PCC_BITFIELD_TYPE_MATTERS' to have a nonzero value.
533 If your aim is to make GCC use the same conventions for laying out
534 bitfields as are used by another compiler, here is how to investigate what
535 the other compiler does. Compile and run this program:
553 printf ("Size of foo1 is %d\n",
554 sizeof (struct foo1));
555 printf ("Size of foo2 is %d\n",
556 sizeof (struct foo2));
560 If this prints 2 and 5, then the compiler's behavior is what you would get
561 from `PCC_BITFIELD_TYPE_MATTERS'.
563 Defined in svr4.h. */
564 #define PCC_BITFIELD_TYPE_MATTERS 1
567 /* Layout of Source Language Data Types. */
569 #define CHAR_TYPE_SIZE 8
570 #define SHORT_TYPE_SIZE 16
571 #define INT_TYPE_SIZE 32
572 #define LONG_TYPE_SIZE 32
573 #define LONG_LONG_TYPE_SIZE 64
574 #define FLOAT_TYPE_SIZE 32
575 #define DOUBLE_TYPE_SIZE 64
576 #define LONG_DOUBLE_TYPE_SIZE 64
578 /* An expression whose value is 1 or 0, according to whether the type `char'
579 should be signed or unsigned by default. The user can always override this
580 default with the options `-fsigned-char' and `-funsigned-char'. */
581 #define DEFAULT_SIGNED_CHAR 1
584 /* General purpose registers. */
585 #define GPR_FIRST 0 /* First gpr */
586 #define GPR_LAST (GPR_FIRST + 63) /* Last gpr */
587 #define GPR_R0 GPR_FIRST /* R0, constant 0 */
588 #define GPR_FP (GPR_FIRST + 2) /* Frame pointer */
589 #define GPR_SP (GPR_FIRST + 1) /* Stack pointer */
590 /* small data register */
591 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16)))
592 #define PIC_REGNO (GPR_FIRST + (TARGET_FDPIC?15:17)) /* PIC register. */
593 #define FDPIC_FPTR_REGNO (GPR_FIRST + 14) /* uClinux PIC function pointer register. */
594 #define FDPIC_REGNO (GPR_FIRST + 15) /* uClinux PIC register. */
596 #define OUR_FDPIC_REG get_hard_reg_initial_val (SImode, FDPIC_REGNO)
598 #define FPR_FIRST 64 /* First FP reg */
599 #define FPR_LAST 127 /* Last FP reg */
601 #define GPR_TEMP_NUM frv_condexec_temps /* # gprs to reserve for temps */
603 /* We reserve the last CR and CCR in each category to be used as a reload
604 register to reload the CR/CCR registers. This is a kludge. */
605 #define CC_FIRST 128 /* First ICC/FCC reg */
606 #define CC_LAST 135 /* Last ICC/FCC reg */
607 #define ICC_FIRST (CC_FIRST + 4) /* First ICC reg */
608 #define ICC_LAST (CC_FIRST + 7) /* Last ICC reg */
609 #define ICC_TEMP (CC_FIRST + 7) /* Temporary ICC reg */
610 #define FCC_FIRST (CC_FIRST) /* First FCC reg */
611 #define FCC_LAST (CC_FIRST + 3) /* Last FCC reg */
613 /* Amount to shift a value to locate a ICC or FCC register in the CCR
614 register and shift it to the bottom 4 bits. */
615 #define CC_SHIFT_RIGHT(REGNO) (((REGNO) - CC_FIRST) << 2)
617 /* Mask to isolate a single ICC/FCC value. */
620 /* Masks to isolate the various bits in an ICC field. */
621 #define ICC_MASK_N 0x8 /* negative */
622 #define ICC_MASK_Z 0x4 /* zero */
623 #define ICC_MASK_V 0x2 /* overflow */
624 #define ICC_MASK_C 0x1 /* carry */
626 /* Mask to isolate the N/Z flags in an ICC. */
627 #define ICC_MASK_NZ (ICC_MASK_N | ICC_MASK_Z)
629 /* Mask to isolate the Z/C flags in an ICC. */
630 #define ICC_MASK_ZC (ICC_MASK_Z | ICC_MASK_C)
632 /* Masks to isolate the various bits in a FCC field. */
633 #define FCC_MASK_E 0x8 /* equal */
634 #define FCC_MASK_L 0x4 /* less than */
635 #define FCC_MASK_G 0x2 /* greater than */
636 #define FCC_MASK_U 0x1 /* unordered */
638 /* For CCR registers, the machine wants CR4..CR7 to be used for integer
639 code and CR0..CR3 to be used for floating point. */
640 #define CR_FIRST 136 /* First CCR */
641 #define CR_LAST 143 /* Last CCR */
642 #define CR_NUM (CR_LAST-CR_FIRST+1) /* # of CCRs (8) */
643 #define ICR_FIRST (CR_FIRST + 4) /* First integer CCR */
644 #define ICR_LAST (CR_FIRST + 7) /* Last integer CCR */
645 #define ICR_TEMP ICR_LAST /* Temp integer CCR */
646 #define FCR_FIRST (CR_FIRST + 0) /* First float CCR */
647 #define FCR_LAST (CR_FIRST + 3) /* Last float CCR */
649 /* Amount to shift a value to locate a CR register in the CCCR special purpose
650 register and shift it to the bottom 2 bits. */
651 #define CR_SHIFT_RIGHT(REGNO) (((REGNO) - CR_FIRST) << 1)
653 /* Mask to isolate a single CR value. */
656 #define ACC_FIRST 144 /* First acc register */
657 #define ACC_LAST 155 /* Last acc register */
659 #define ACCG_FIRST 156 /* First accg register */
660 #define ACCG_LAST 167 /* Last accg register */
662 #define AP_FIRST 168 /* fake argument pointer */
664 #define SPR_FIRST 169
666 #define LR_REGNO (SPR_FIRST)
667 #define LCR_REGNO (SPR_FIRST + 1)
668 #define IACC_FIRST (SPR_FIRST + 2)
669 #define IACC_LAST (SPR_FIRST + 3)
671 #define GPR_P(R) IN_RANGE_P (R, GPR_FIRST, GPR_LAST)
672 #define GPR_OR_AP_P(R) (GPR_P (R) || (R) == ARG_POINTER_REGNUM)
673 #define FPR_P(R) IN_RANGE_P (R, FPR_FIRST, FPR_LAST)
674 #define CC_P(R) IN_RANGE_P (R, CC_FIRST, CC_LAST)
675 #define ICC_P(R) IN_RANGE_P (R, ICC_FIRST, ICC_LAST)
676 #define FCC_P(R) IN_RANGE_P (R, FCC_FIRST, FCC_LAST)
677 #define CR_P(R) IN_RANGE_P (R, CR_FIRST, CR_LAST)
678 #define ICR_P(R) IN_RANGE_P (R, ICR_FIRST, ICR_LAST)
679 #define FCR_P(R) IN_RANGE_P (R, FCR_FIRST, FCR_LAST)
680 #define ACC_P(R) IN_RANGE_P (R, ACC_FIRST, ACC_LAST)
681 #define ACCG_P(R) IN_RANGE_P (R, ACCG_FIRST, ACCG_LAST)
682 #define SPR_P(R) IN_RANGE_P (R, SPR_FIRST, SPR_LAST)
684 #define GPR_OR_PSEUDO_P(R) (GPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
685 #define FPR_OR_PSEUDO_P(R) (FPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
686 #define GPR_AP_OR_PSEUDO_P(R) (GPR_OR_AP_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
687 #define CC_OR_PSEUDO_P(R) (CC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
688 #define ICC_OR_PSEUDO_P(R) (ICC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
689 #define FCC_OR_PSEUDO_P(R) (FCC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
690 #define CR_OR_PSEUDO_P(R) (CR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
691 #define ICR_OR_PSEUDO_P(R) (ICR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
692 #define FCR_OR_PSEUDO_P(R) (FCR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
693 #define ACC_OR_PSEUDO_P(R) (ACC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
694 #define ACCG_OR_PSEUDO_P(R) (ACCG_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
696 #define MAX_STACK_IMMEDIATE_OFFSET 2047
699 /* Register Basics. */
701 /* Number of hardware registers known to the compiler. They receive numbers 0
702 through `FIRST_PSEUDO_REGISTER-1'; thus, the first pseudo register's number
703 really is assigned the number `FIRST_PSEUDO_REGISTER'. */
704 #define FIRST_PSEUDO_REGISTER (SPR_LAST + 1)
706 /* The first/last register that can contain the arguments to a function. */
707 #define FIRST_ARG_REGNUM (GPR_FIRST + 8)
708 #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + FRV_NUM_ARG_REGS - 1)
710 /* Registers used by the exception handling functions. These should be
711 registers that are not otherwise used by the calling sequence. */
712 #define FIRST_EH_REGNUM 14
713 #define LAST_EH_REGNUM 15
715 /* Scratch registers used in the prologue, epilogue and thunks.
716 OFFSET_REGNO is for loading constant addends that are too big for a
717 single instruction. TEMP_REGNO is used for transferring SPRs to and from
718 the stack, and various other activities. */
719 #define OFFSET_REGNO 4
722 /* Registers used in the prologue. OLD_SP_REGNO is the old stack pointer,
723 which is sometimes used to set up the frame pointer. */
724 #define OLD_SP_REGNO 6
726 /* Registers used in the epilogue. STACKADJ_REGNO stores the exception
727 handler's stack adjustment. */
728 #define STACKADJ_REGNO 6
730 /* Registers used in thunks. JMP_REGNO is used for loading the target
734 #define EH_RETURN_DATA_REGNO(N) ((N) <= (LAST_EH_REGNUM - FIRST_EH_REGNUM)? \
735 (N) + FIRST_EH_REGNUM : INVALID_REGNUM)
736 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, STACKADJ_REGNO)
737 #define EH_RETURN_HANDLER_RTX RETURN_ADDR_RTX (0, frame_pointer_rtx)
739 #define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNO)
741 /* An initializer that says which registers are used for fixed purposes all
742 throughout the compiled code and are therefore not available for general
743 allocation. These would include the stack pointer, the frame pointer
744 (except on machines where that can be used as a general register when no
745 frame pointer is needed), the program counter on machines where that is
746 considered one of the addressable registers, and any other numbered register
749 This information is expressed as a sequence of numbers, separated by commas
750 and surrounded by braces. The Nth number is 1 if register N is fixed, 0
753 The table initialized from this macro, and the table initialized by the
754 following one, may be overridden at run time either automatically, by the
755 actions of the macro `CONDITIONAL_REGISTER_USAGE', or by the user with the
756 command options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'. */
761 gr3 -- Hidden Parameter
762 gr16 -- Small Data reserved
768 cr3 -- reserved to reload FCC registers.
769 cr7 -- reserved to reload ICC registers. */
770 #define FIXED_REGISTERS \
771 { /* Integer Registers */ \
772 1, 1, 1, 1, 0, 0, 0, 0, /* 000-007, gr0 - gr7 */ \
773 0, 0, 0, 0, 0, 0, 0, 0, /* 008-015, gr8 - gr15 */ \
774 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \
775 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \
776 0, 0, 0, 0, 0, 0, 0, 0, /* 032-039, gr32 - gr39 */ \
777 0, 0, 0, 0, 0, 0, 0, 0, /* 040-040, gr48 - gr47 */ \
778 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \
779 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \
780 /* Float Registers */ \
781 0, 0, 0, 0, 0, 0, 0, 0, /* 064-071, fr0 - fr7 */ \
782 0, 0, 0, 0, 0, 0, 0, 0, /* 072-079, fr8 - fr15 */ \
783 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \
784 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \
785 0, 0, 0, 0, 0, 0, 0, 0, /* 096-103, fr32 - fr39 */ \
786 0, 0, 0, 0, 0, 0, 0, 0, /* 104-111, fr48 - fr47 */ \
787 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \
788 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \
789 /* Condition Code Registers */ \
790 0, 0, 0, 0, /* 128-131, fcc0 - fcc3 */ \
791 0, 0, 0, 1, /* 132-135, icc0 - icc3 */ \
792 /* Conditional execution Registers (CCR) */ \
793 0, 0, 0, 0, 0, 0, 0, 1, /* 136-143, cr0 - cr7 */ \
795 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \
796 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \
797 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \
798 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \
799 /* Other registers */ \
800 1, /* 168, AP - fake arg ptr */ \
801 0, /* 169, LR - Link register*/ \
802 0, /* 170, LCR - Loop count reg*/ \
803 1, 1 /* 171-172, iacc0 */ \
806 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in
807 general) by function calls as well as for fixed registers. This macro
808 therefore identifies the registers that are not available for general
809 allocation of values that must live across function calls.
811 If a register has 0 in `CALL_USED_REGISTERS', the compiler automatically
812 saves it on function entry and restores it on function exit, if the register
813 is used within the function. */
814 #define CALL_USED_REGISTERS \
815 { /* Integer Registers */ \
816 1, 1, 1, 1, 1, 1, 1, 1, /* 000-007, gr0 - gr7 */ \
817 1, 1, 1, 1, 1, 1, 1, 1, /* 008-015, gr8 - gr15 */ \
818 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \
819 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \
820 1, 1, 1, 1, 1, 1, 1, 1, /* 032-039, gr32 - gr39 */ \
821 1, 1, 1, 1, 1, 1, 1, 1, /* 040-040, gr48 - gr47 */ \
822 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \
823 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \
824 /* Float Registers */ \
825 1, 1, 1, 1, 1, 1, 1, 1, /* 064-071, fr0 - fr7 */ \
826 1, 1, 1, 1, 1, 1, 1, 1, /* 072-079, fr8 - fr15 */ \
827 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \
828 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \
829 1, 1, 1, 1, 1, 1, 1, 1, /* 096-103, fr32 - fr39 */ \
830 1, 1, 1, 1, 1, 1, 1, 1, /* 104-111, fr48 - fr47 */ \
831 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \
832 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \
833 /* Condition Code Registers */ \
834 1, 1, 1, 1, /* 128-131, fcc0 - fcc3 */ \
835 1, 1, 1, 1, /* 132-135, icc0 - icc3 */ \
836 /* Conditional execution Registers (CCR) */ \
837 1, 1, 1, 1, 1, 1, 1, 1, /* 136-143, cr0 - cr7 */ \
839 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \
840 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \
841 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \
842 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \
843 /* Other registers */ \
844 1, /* 168, AP - fake arg ptr */ \
845 1, /* 169, LR - Link register*/ \
846 1, /* 170, LCR - Loop count reg */ \
847 1, 1 /* 171-172, iacc0 */ \
850 /* Zero or more C statements that may conditionally modify two variables
851 `fixed_regs' and `call_used_regs' (both of type `char []') after they have
852 been initialized from the two preceding macros.
854 This is necessary in case the fixed or call-clobbered registers depend on
857 You need not define this macro if it has no work to do.
859 If the usage of an entire class of registers depends on the target flags,
860 you may indicate this to GCC by using this macro to modify `fixed_regs' and
861 `call_used_regs' to 1 for each of the registers in the classes which should
862 not be used by GCC. Also define the macro `REG_CLASS_FROM_LETTER' to return
863 `NO_REGS' if it is called with a letter for a class that shouldn't be used.
865 (However, if this class is not included in `GENERAL_REGS' and all of the
866 insn patterns whose constraints permit this class are controlled by target
867 switches, then GCC will automatically avoid using these registers when the
868 target switches are opposed to them.) */
870 #define CONDITIONAL_REGISTER_USAGE frv_conditional_register_usage ()
873 /* Order of allocation of registers. */
875 /* If defined, an initializer for a vector of integers, containing the numbers
876 of hard registers in the order in which GCC should prefer to use them
877 (from most preferred to least).
879 If this macro is not defined, registers are used lowest numbered first (all
882 One use of this macro is on machines where the highest numbered registers
883 must always be saved and the save-multiple-registers instruction supports
884 only sequences of consecutive registers. On such machines, define
885 `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered
886 allocatable register first. */
888 /* On the FRV, allocate GR16 and GR17 after other saved registers so that we
889 have a better chance of allocating 2 registers at a time and can use the
890 double word load/store instructions in the prologue. */
891 #define REG_ALLOC_ORDER \
893 /* volatile registers */ \
894 GPR_FIRST + 4, GPR_FIRST + 5, GPR_FIRST + 6, GPR_FIRST + 7, \
895 GPR_FIRST + 8, GPR_FIRST + 9, GPR_FIRST + 10, GPR_FIRST + 11, \
896 GPR_FIRST + 12, GPR_FIRST + 13, GPR_FIRST + 14, GPR_FIRST + 15, \
897 GPR_FIRST + 32, GPR_FIRST + 33, GPR_FIRST + 34, GPR_FIRST + 35, \
898 GPR_FIRST + 36, GPR_FIRST + 37, GPR_FIRST + 38, GPR_FIRST + 39, \
899 GPR_FIRST + 40, GPR_FIRST + 41, GPR_FIRST + 42, GPR_FIRST + 43, \
900 GPR_FIRST + 44, GPR_FIRST + 45, GPR_FIRST + 46, GPR_FIRST + 47, \
902 FPR_FIRST + 0, FPR_FIRST + 1, FPR_FIRST + 2, FPR_FIRST + 3, \
903 FPR_FIRST + 4, FPR_FIRST + 5, FPR_FIRST + 6, FPR_FIRST + 7, \
904 FPR_FIRST + 8, FPR_FIRST + 9, FPR_FIRST + 10, FPR_FIRST + 11, \
905 FPR_FIRST + 12, FPR_FIRST + 13, FPR_FIRST + 14, FPR_FIRST + 15, \
906 FPR_FIRST + 32, FPR_FIRST + 33, FPR_FIRST + 34, FPR_FIRST + 35, \
907 FPR_FIRST + 36, FPR_FIRST + 37, FPR_FIRST + 38, FPR_FIRST + 39, \
908 FPR_FIRST + 40, FPR_FIRST + 41, FPR_FIRST + 42, FPR_FIRST + 43, \
909 FPR_FIRST + 44, FPR_FIRST + 45, FPR_FIRST + 46, FPR_FIRST + 47, \
911 ICC_FIRST + 0, ICC_FIRST + 1, ICC_FIRST + 2, ICC_FIRST + 3, \
912 FCC_FIRST + 0, FCC_FIRST + 1, FCC_FIRST + 2, FCC_FIRST + 3, \
913 CR_FIRST + 0, CR_FIRST + 1, CR_FIRST + 2, CR_FIRST + 3, \
914 CR_FIRST + 4, CR_FIRST + 5, CR_FIRST + 6, CR_FIRST + 7, \
916 /* saved registers */ \
917 GPR_FIRST + 18, GPR_FIRST + 19, \
918 GPR_FIRST + 20, GPR_FIRST + 21, GPR_FIRST + 22, GPR_FIRST + 23, \
919 GPR_FIRST + 24, GPR_FIRST + 25, GPR_FIRST + 26, GPR_FIRST + 27, \
920 GPR_FIRST + 48, GPR_FIRST + 49, GPR_FIRST + 50, GPR_FIRST + 51, \
921 GPR_FIRST + 52, GPR_FIRST + 53, GPR_FIRST + 54, GPR_FIRST + 55, \
922 GPR_FIRST + 56, GPR_FIRST + 57, GPR_FIRST + 58, GPR_FIRST + 59, \
923 GPR_FIRST + 60, GPR_FIRST + 61, GPR_FIRST + 62, GPR_FIRST + 63, \
924 GPR_FIRST + 16, GPR_FIRST + 17, \
926 FPR_FIRST + 16, FPR_FIRST + 17, FPR_FIRST + 18, FPR_FIRST + 19, \
927 FPR_FIRST + 20, FPR_FIRST + 21, FPR_FIRST + 22, FPR_FIRST + 23, \
928 FPR_FIRST + 24, FPR_FIRST + 25, FPR_FIRST + 26, FPR_FIRST + 27, \
929 FPR_FIRST + 28, FPR_FIRST + 29, FPR_FIRST + 30, FPR_FIRST + 31, \
930 FPR_FIRST + 48, FPR_FIRST + 49, FPR_FIRST + 50, FPR_FIRST + 51, \
931 FPR_FIRST + 52, FPR_FIRST + 53, FPR_FIRST + 54, FPR_FIRST + 55, \
932 FPR_FIRST + 56, FPR_FIRST + 57, FPR_FIRST + 58, FPR_FIRST + 59, \
933 FPR_FIRST + 60, FPR_FIRST + 61, FPR_FIRST + 62, FPR_FIRST + 63, \
935 /* special or fixed registers */ \
936 GPR_FIRST + 0, GPR_FIRST + 1, GPR_FIRST + 2, GPR_FIRST + 3, \
937 GPR_FIRST + 28, GPR_FIRST + 29, GPR_FIRST + 30, GPR_FIRST + 31, \
938 ACC_FIRST + 0, ACC_FIRST + 1, ACC_FIRST + 2, ACC_FIRST + 3, \
939 ACC_FIRST + 4, ACC_FIRST + 5, ACC_FIRST + 6, ACC_FIRST + 7, \
940 ACC_FIRST + 8, ACC_FIRST + 9, ACC_FIRST + 10, ACC_FIRST + 11, \
941 ACCG_FIRST + 0, ACCG_FIRST + 1, ACCG_FIRST + 2, ACCG_FIRST + 3, \
942 ACCG_FIRST + 4, ACCG_FIRST + 5, ACCG_FIRST + 6, ACCG_FIRST + 7, \
943 ACCG_FIRST + 8, ACCG_FIRST + 9, ACCG_FIRST + 10, ACCG_FIRST + 11, \
944 AP_FIRST, LR_REGNO, LCR_REGNO, \
945 IACC_FIRST + 0, IACC_FIRST + 1 \
949 /* How Values Fit in Registers. */
951 /* A C expression for the number of consecutive hard registers, starting at
952 register number REGNO, required to hold a value of mode MODE.
954 On a machine where all registers are exactly one word, a suitable definition
957 #define HARD_REGNO_NREGS(REGNO, MODE) \
958 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \
959 / UNITS_PER_WORD)) */
961 /* On the FRV, make the CC modes take 3 words in the integer registers, so that
962 we can build the appropriate instructions to properly reload the values. */
963 #define HARD_REGNO_NREGS(REGNO, MODE) frv_hard_regno_nregs (REGNO, MODE)
965 /* A C expression that is nonzero if it is permissible to store a value of mode
966 MODE in hard register number REGNO (or in several registers starting with
967 that one). For a machine where all registers are equivalent, a suitable
970 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
972 It is not necessary for this macro to check for the numbers of fixed
973 registers, because the allocation mechanism considers them to be always
976 On some machines, double-precision values must be kept in even/odd register
977 pairs. The way to implement that is to define this macro to reject odd
978 register numbers for such modes.
980 The minimum requirement for a mode to be OK in a register is that the
981 `movMODE' instruction pattern support moves between the register and any
982 other hard register for which the mode is OK; and that moving a value into
983 the register and back out not alter it.
985 Since the same instruction used to move `SImode' will work for all narrower
986 integer modes, it is not necessary on any machine for `HARD_REGNO_MODE_OK'
987 to distinguish between these modes, provided you define patterns `movhi',
988 etc., to take advantage of this. This is useful because of the interaction
989 between `HARD_REGNO_MODE_OK' and `MODES_TIEABLE_P'; it is very desirable for
990 all integer modes to be tieable.
992 Many machines have special registers for floating point arithmetic. Often
993 people assume that floating point machine modes are allowed only in floating
994 point registers. This is not true. Any registers that can hold integers
995 can safely *hold* a floating point machine mode, whether or not floating
996 arithmetic can be done on it in those registers. Integer move instructions
997 can be used to move the values.
999 On some machines, though, the converse is true: fixed-point machine modes
1000 may not go in floating registers. This is true if the floating registers
1001 normalize any value stored in them, because storing a non-floating value
1002 there would garble it. In this case, `HARD_REGNO_MODE_OK' should reject
1003 fixed-point machine modes in floating registers. But if the floating
1004 registers do not automatically normalize, if you can store any bit pattern
1005 in one and retrieve it unchanged without a trap, then any machine mode may
1006 go in a floating register, so you can define this macro to say so.
1008 The primary significance of special floating registers is rather that they
1009 are the registers acceptable in floating point arithmetic instructions.
1010 However, this is of no concern to `HARD_REGNO_MODE_OK'. You handle it by
1011 writing the proper constraints for those instructions.
1013 On some machines, the floating registers are especially slow to access, so
1014 that it is better to store a value in a stack frame than in such a register
1015 if floating point arithmetic is not being done. As long as the floating
1016 registers are not in class `GENERAL_REGS', they will not be used unless some
1017 pattern's constraint asks for one. */
1018 #define HARD_REGNO_MODE_OK(REGNO, MODE) frv_hard_regno_mode_ok (REGNO, MODE)
1020 /* A C expression that is nonzero if it is desirable to choose register
1021 allocation so as to avoid move instructions between a value of mode MODE1
1022 and a value of mode MODE2.
1024 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
1025 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
1027 #define MODES_TIEABLE_P(MODE1, MODE2) (MODE1 == MODE2)
1029 /* Define this macro if the compiler should avoid copies to/from CCmode
1030 registers. You should only define this macro if support fo copying to/from
1031 CCmode is incomplete. */
1032 #define AVOID_CCMODE_COPIES
1035 /* Register Classes. */
1037 /* An enumeral type that must be defined with all the register class names as
1038 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
1039 register class, followed by one more enumeral value, `LIM_REG_CLASSES',
1040 which is not a register class but rather tells how many classes there are.
1042 Each register class has a number, which is the value of casting the class
1043 name to type `int'. The number serves as an index in many of the tables
1077 #define GENERAL_REGS GPR_REGS
1079 /* The number of distinct register classes, defined as follows:
1081 #define N_REG_CLASSES (int) LIM_REG_CLASSES */
1082 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
1084 /* An initializer containing the names of the register classes as C string
1085 constants. These names are used in writing some of the debugging dumps. */
1086 #define REG_CLASS_NAMES { \
1100 "FDPIC_FPTR_REGS", \
1101 "FDPIC_CALL_REGS", \
1116 /* An initializer containing the contents of the register classes, as integers
1117 which are bit masks. The Nth integer specifies the contents of class N.
1118 The way the integer MASK is interpreted is that register R is in the class
1119 if `MASK & (1 << R)' is 1.
1121 When the machine has more than 32 registers, an integer does not suffice.
1122 Then the integers are replaced by sub-initializers, braced groupings
1123 containing several integers. Each sub-initializer must be suitable as an
1124 initializer for the type `HARD_REG_SET' which is defined in
1125 `hard-reg-set.h'. */
1126 #define REG_CLASS_CONTENTS \
1127 { /* gr0-gr31 gr32-gr63 fr0-fr31 fr32-fr-63 cc/ccr/acc ap/spr */ \
1128 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* NO_REGS */\
1129 { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000f0,0x0}, /* ICC_REGS */\
1130 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000000f,0x0}, /* FCC_REGS */\
1131 { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000ff,0x0}, /* CC_REGS */\
1132 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000f000,0x0}, /* ICR_REGS */\
1133 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000f00,0x0}, /* FCR_REGS */\
1134 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000ff00,0x0}, /* CR_REGS */\
1135 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x400}, /* LCR_REGS */\
1136 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x200}, /* LR_REGS */\
1137 { 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR8_REGS */\
1138 { 0x00000200,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR9_REGS */\
1139 { 0x00000300,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR89_REGS */\
1140 { 0x00008000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_REGS */\
1141 { 0x00004000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_FPTR_REGS */\
1142 { 0x0000c000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_CALL_REGS */\
1143 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x1e00}, /* SPR_REGS */\
1144 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* QUAD_ACC */\
1145 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* EVEN_ACC */\
1146 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* ACC_REGS */\
1147 { 0x00000000,0x00000000,0x00000000,0x00000000,0xf0000000,0xff}, /* ACCG_REGS*/\
1148 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* QUAD_FPR */\
1149 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FEVEN_REG*/\
1150 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FPR_REGS */\
1151 { 0x0ffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* QUAD_REGS*/\
1152 { 0xfffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* EVEN_REGS*/\
1153 { 0xffffffff,0xffffffff,0x00000000,0x00000000,0x00000000,0x100}, /* GPR_REGS */\
1154 { 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0x1fff}, /* ALL_REGS */\
1157 /* A C expression whose value is a register class containing hard register
1158 REGNO. In general there is more than one such class; choose a class which
1159 is "minimal", meaning that no smaller class also contains the register. */
1161 extern enum reg_class regno_reg_class[];
1162 #define REGNO_REG_CLASS(REGNO) regno_reg_class [REGNO]
1164 /* A macro whose definition is the name of the class to which a valid base
1165 register must belong. A base register is one used in an address which is
1166 the register value plus a displacement. */
1167 #define BASE_REG_CLASS GPR_REGS
1169 /* A macro whose definition is the name of the class to which a valid index
1170 register must belong. An index register is one used in an address where its
1171 value is either multiplied by a scale factor or added to another register
1172 (as well as added to a displacement). */
1173 #define INDEX_REG_CLASS GPR_REGS
1175 /* A C expression which defines the machine-dependent operand constraint
1176 letters for register classes. If CHAR is such a letter, the value should be
1177 the register class corresponding to it. Otherwise, the value should be
1178 `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS',
1179 will not be passed to this macro; you do not need to handle it.
1181 The following letters are unavailable, due to being used as
1186 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P'
1187 'Q', 'R', 'S', 'T', 'U'
1189 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */
1191 extern enum reg_class reg_class_from_letter[];
1192 #define REG_CLASS_FROM_LETTER(CHAR) reg_class_from_letter [(unsigned char)(CHAR)]
1194 /* A C expression which is nonzero if register number NUM is suitable for use
1195 as a base register in operand addresses. It may be either a suitable hard
1196 register or a pseudo register that has been allocated such a hard register. */
1197 #define REGNO_OK_FOR_BASE_P(NUM) \
1198 ((NUM) < FIRST_PSEUDO_REGISTER \
1200 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM])))
1202 /* A C expression which is nonzero if register number NUM is suitable for use
1203 as an index register in operand addresses. It may be either a suitable hard
1204 register or a pseudo register that has been allocated such a hard register.
1206 The difference between an index register and a base register is that the
1207 index register may be scaled. If an address involves the sum of two
1208 registers, neither one of them scaled, then either one may be labeled the
1209 "base" and the other the "index"; but whichever labeling is used must fit
1210 the machine's constraints of which registers may serve in each capacity.
1211 The compiler will try both labelings, looking for one that is valid, and
1212 will reload one or both registers only if neither labeling works. */
1213 #define REGNO_OK_FOR_INDEX_P(NUM) \
1214 ((NUM) < FIRST_PSEUDO_REGISTER \
1216 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM])))
1218 /* A C expression that places additional restrictions on the register class to
1219 use when it is necessary to copy value X into a register in class CLASS.
1220 The value is a register class; perhaps CLASS, or perhaps another, smaller
1221 class. On many machines, the following definition is safe:
1223 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
1225 Sometimes returning a more restrictive class makes better code. For
1226 example, on the 68000, when X is an integer constant that is in range for a
1227 `moveq' instruction, the value of this macro is always `DATA_REGS' as long
1228 as CLASS includes the data registers. Requiring a data register guarantees
1229 that a `moveq' will be used.
1231 If X is a `const_double', by returning `NO_REGS' you can force X into a
1232 memory constant. This is useful on certain machines where immediate
1233 floating values cannot be loaded into certain kinds of registers.
1235 This declaration must be present. */
1236 #define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS
1238 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
1239 frv_secondary_reload_class (CLASS, MODE, X, TRUE)
1241 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
1242 frv_secondary_reload_class (CLASS, MODE, X, FALSE)
1244 /* A C expression whose value is nonzero if pseudos that have been assigned to
1245 registers of class CLASS would likely be spilled because registers of CLASS
1246 are needed for spill registers.
1248 The default value of this macro returns 1 if CLASS has exactly one register
1249 and zero otherwise. On most machines, this default should be used. Only
1250 define this macro to some other expression if pseudo allocated by
1251 `local-alloc.c' end up in memory because their hard registers were needed
1252 for spill registers. If this macro returns nonzero for those classes, those
1253 pseudos will only be allocated by `global.c', which knows how to reallocate
1254 the pseudo to another register. If there would not be another register
1255 available for reallocation, you should not change the definition of this
1256 macro since the only effect of such a definition would be to slow down
1257 register allocation. */
1258 #define CLASS_LIKELY_SPILLED_P(CLASS) frv_class_likely_spilled_p (CLASS)
1260 /* A C expression for the maximum number of consecutive registers of
1261 class CLASS needed to hold a value of mode MODE.
1263 This is closely related to the macro `HARD_REGNO_NREGS'. In fact, the value
1264 of the macro `CLASS_MAX_NREGS (CLASS, MODE)' should be the maximum value of
1265 `HARD_REGNO_NREGS (REGNO, MODE)' for all REGNO values in the class CLASS.
1267 This macro helps control the handling of multiple-word values in
1270 This declaration is required. */
1271 #define CLASS_MAX_NREGS(CLASS, MODE) frv_class_max_nregs (CLASS, MODE)
1273 #define ZERO_P(x) (x == CONST0_RTX (GET_MODE (x)))
1275 /* 6 bit signed immediate. */
1276 #define CONST_OK_FOR_I(VALUE) IN_RANGE_P(VALUE, -32, 31)
1277 /* 10 bit signed immediate. */
1278 #define CONST_OK_FOR_J(VALUE) IN_RANGE_P(VALUE, -512, 511)
1280 #define CONST_OK_FOR_K(VALUE) 0
1281 /* 16 bit signed immediate. */
1282 #define CONST_OK_FOR_L(VALUE) IN_RANGE_P(VALUE, -32768, 32767)
1283 /* 16 bit unsigned immediate. */
1284 #define CONST_OK_FOR_M(VALUE) IN_RANGE_P (VALUE, 0, 65535)
1285 /* 12 bit signed immediate that is negative. */
1286 #define CONST_OK_FOR_N(VALUE) IN_RANGE_P(VALUE, -2048, -1)
1288 #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0)
1289 /* 12 bit signed immediate that is negative. */
1290 #define CONST_OK_FOR_P(VALUE) IN_RANGE_P(VALUE, 1, 2047)
1292 /* A C expression that defines the machine-dependent operand constraint letters
1293 (`I', `J', `K', .. 'P') that specify particular ranges of integer values.
1294 If C is one of those letters, the expression should check that VALUE, an
1295 integer, is in the appropriate range and return 1 if so, 0 otherwise. If C
1296 is not one of those letters, the value should be 0 regardless of VALUE. */
1297 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1298 ( (C) == 'I' ? CONST_OK_FOR_I (VALUE) \
1299 : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \
1300 : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \
1301 : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \
1302 : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \
1303 : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \
1304 : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \
1305 : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \
1309 /* A C expression that defines the machine-dependent operand constraint letters
1310 (`G', `H') that specify particular ranges of `const_double' values.
1312 If C is one of those letters, the expression should check that VALUE, an RTX
1313 of code `const_double', is in the appropriate range and return 1 if so, 0
1314 otherwise. If C is not one of those letters, the value should be 0
1315 regardless of VALUE.
1317 `const_double' is used for all floating-point constants and for `DImode'
1318 fixed-point constants. A given letter can accept either or both kinds of
1319 values. It can use `GET_MODE' to distinguish between these kinds. */
1321 #define CONST_DOUBLE_OK_FOR_G(VALUE) \
1322 ((GET_MODE (VALUE) == VOIDmode \
1323 && CONST_DOUBLE_LOW (VALUE) == 0 \
1324 && CONST_DOUBLE_HIGH (VALUE) == 0) \
1325 || ((GET_MODE (VALUE) == SFmode \
1326 || GET_MODE (VALUE) == DFmode) \
1327 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))))
1329 #define CONST_DOUBLE_OK_FOR_H(VALUE) 0
1331 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1332 ( (C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) \
1333 : (C) == 'H' ? CONST_DOUBLE_OK_FOR_H (VALUE) \
1336 /* A C expression that defines the optional machine-dependent constraint
1337 letters (`Q', `R', `S', `T', `U') that can be used to segregate specific
1338 types of operands, usually memory references, for the target machine.
1339 Normally this macro will not be defined. If it is required for a particular
1340 target machine, it should return 1 if VALUE corresponds to the operand type
1341 represented by the constraint letter C. If C is not defined as an extra
1342 constraint, the value returned should be 0 regardless of VALUE.
1344 For example, on the ROMP, load instructions cannot have their output in r0
1345 if the memory reference contains a symbolic address. Constraint letter `Q'
1346 is defined as representing a memory address that does *not* contain a
1347 symbolic address. An alternative is specified with a `Q' constraint on the
1348 input and `r' on the output. The next alternative specifies `m' on the
1349 input and a register class that does not include r0 on the output. */
1351 /* 12-bit relocations. */
1352 #define EXTRA_CONSTRAINT_FOR_Q(VALUE) \
1353 (got12_operand (VALUE, GET_MODE (VALUE)))
1355 /* Double word memory ops that take one instruction. */
1356 #define EXTRA_CONSTRAINT_FOR_R(VALUE) \
1357 (dbl_memory_one_insn_operand (VALUE, GET_MODE (VALUE)))
1360 #define EXTRA_CONSTRAINT_FOR_S(VALUE) \
1361 (CONSTANT_P (VALUE) && call_operand (VALUE, VOIDmode))
1363 /* Double word memory ops that take two instructions. */
1364 #define EXTRA_CONSTRAINT_FOR_T(VALUE) \
1365 (dbl_memory_two_insn_operand (VALUE, GET_MODE (VALUE)))
1367 /* Memory operand for conditional execution. */
1368 #define EXTRA_CONSTRAINT_FOR_U(VALUE) \
1369 (condexec_memory_operand (VALUE, GET_MODE (VALUE)))
1371 #define EXTRA_CONSTRAINT(VALUE, C) \
1372 ( (C) == 'Q' ? EXTRA_CONSTRAINT_FOR_Q (VALUE) \
1373 : (C) == 'R' ? EXTRA_CONSTRAINT_FOR_R (VALUE) \
1374 : (C) == 'S' ? EXTRA_CONSTRAINT_FOR_S (VALUE) \
1375 : (C) == 'T' ? EXTRA_CONSTRAINT_FOR_T (VALUE) \
1376 : (C) == 'U' ? EXTRA_CONSTRAINT_FOR_U (VALUE) \
1379 #define CONSTRAINT_LEN(C, STR) \
1380 ((C) == 'D' ? 3 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
1382 #define REG_CLASS_FROM_CONSTRAINT(C, STR) \
1383 (((C) == 'D' && (STR)[1] == '8' && (STR)[2] == '9') ? GR89_REGS : \
1384 ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '9') ? GR9_REGS : \
1385 ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '8') ? GR8_REGS : \
1386 ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '4') ? FDPIC_FPTR_REGS : \
1387 ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '5') ? FDPIC_REGS : \
1388 REG_CLASS_FROM_LETTER ((C)))
1391 /* Basic Stack Layout. */
1393 /* Structure to describe information about a saved range of registers */
1395 typedef struct frv_stack_regs {
1396 const char * name; /* name of the register ranges */
1397 int first; /* first register in the range */
1398 int last; /* last register in the range */
1399 int size_1word; /* # of bytes to be stored via 1 word stores */
1400 int size_2words; /* # of bytes to be stored via 2 word stores */
1401 unsigned char field_p; /* true if the registers are a single SPR */
1402 unsigned char dword_p; /* true if we can do dword stores */
1403 unsigned char special_p; /* true if the regs have a fixed save loc. */
1406 /* Register ranges to look into saving. */
1407 #define STACK_REGS_GPR 0 /* Gprs (normally gr16..gr31, gr48..gr63) */
1408 #define STACK_REGS_FPR 1 /* Fprs (normally fr16..fr31, fr48..fr63) */
1409 #define STACK_REGS_LR 2 /* LR register */
1410 #define STACK_REGS_CC 3 /* CCrs (normally not saved) */
1411 #define STACK_REGS_LCR 5 /* lcr register */
1412 #define STACK_REGS_STDARG 6 /* stdarg registers */
1413 #define STACK_REGS_STRUCT 7 /* structure return (gr3) */
1414 #define STACK_REGS_FP 8 /* FP register */
1415 #define STACK_REGS_MAX 9 /* # of register ranges */
1417 /* Values for save_p field. */
1418 #define REG_SAVE_NO_SAVE 0 /* register not saved */
1419 #define REG_SAVE_1WORD 1 /* save the register */
1420 #define REG_SAVE_2WORDS 2 /* save register and register+1 */
1422 /* Structure used to define the frv stack. */
1424 typedef struct frv_stack {
1425 int total_size; /* total bytes allocated for stack */
1426 int vars_size; /* variable save area size */
1427 int parameter_size; /* outgoing parameter size */
1428 int stdarg_size; /* size of regs needed to be saved for stdarg */
1429 int regs_size; /* size of the saved registers */
1430 int regs_size_1word; /* # of bytes to be stored via 1 word stores */
1431 int regs_size_2words; /* # of bytes to be stored via 2 word stores */
1432 int header_size; /* size of the old FP, struct ret., LR save */
1433 int pretend_size; /* size of pretend args */
1434 int vars_offset; /* offset to save local variables from new SP*/
1435 int regs_offset; /* offset to save registers from new SP */
1436 /* register range information */
1437 frv_stack_regs_t regs[STACK_REGS_MAX];
1438 /* offset to store each register */
1439 int reg_offset[FIRST_PSEUDO_REGISTER];
1440 /* whether to save register (& reg+1) */
1441 unsigned char save_p[FIRST_PSEUDO_REGISTER];
1444 /* Define this macro if pushing a word onto the stack moves the stack pointer
1445 to a smaller address. */
1446 #define STACK_GROWS_DOWNWARD 1
1448 /* Define this macro if the addresses of local variable slots are at negative
1449 offsets from the frame pointer. */
1450 #define FRAME_GROWS_DOWNWARD
1452 /* Offset from the frame pointer to the first local variable slot to be
1455 If `FRAME_GROWS_DOWNWARD', find the next slot's offset by subtracting the
1456 first slot's length from `STARTING_FRAME_OFFSET'. Otherwise, it is found by
1457 adding the length of the first slot to the value `STARTING_FRAME_OFFSET'. */
1458 #define STARTING_FRAME_OFFSET 0
1460 /* Offset from the stack pointer register to the first location at which
1461 outgoing arguments are placed. If not specified, the default value of zero
1462 is used. This is the proper value for most machines.
1464 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first
1465 location at which outgoing arguments are placed. */
1466 #define STACK_POINTER_OFFSET 0
1468 /* Offset from the argument pointer register to the first argument's address.
1469 On some machines it may depend on the data type of the function.
1471 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first
1472 argument's address. */
1473 #define FIRST_PARM_OFFSET(FUNDECL) 0
1475 /* A C expression whose value is RTL representing the address in a stack frame
1476 where the pointer to the caller's frame is stored. Assume that FRAMEADDR is
1477 an RTL expression for the address of the stack frame itself.
1479 If you don't define this macro, the default is to return the value of
1480 FRAMEADDR--that is, the stack frame address is also the address of the stack
1481 word that points to the previous frame. */
1482 #define DYNAMIC_CHAIN_ADDRESS(FRAMEADDR) frv_dynamic_chain_address (FRAMEADDR)
1484 /* A C expression whose value is RTL representing the value of the return
1485 address for the frame COUNT steps up from the current frame, after the
1486 prologue. FRAMEADDR is the frame pointer of the COUNT frame, or the frame
1487 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' is
1490 The value of the expression must always be the correct address when COUNT is
1491 zero, but may be `NULL_RTX' if there is not way to determine the return
1492 address of other frames. */
1493 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) frv_return_addr_rtx (COUNT, FRAMEADDR)
1495 /* This function contains machine specific function data. */
1496 struct machine_function GTY(())
1498 /* True if we have created an rtx that relies on the stack frame. */
1502 #define RETURN_POINTER_REGNUM LR_REGNO
1504 /* A C expression whose value is RTL representing the location of the incoming
1505 return address at the beginning of any function, before the prologue. This
1506 RTL is either a `REG', indicating that the return value is saved in `REG',
1507 or a `MEM' representing a location in the stack.
1509 You only need to define this macro if you want to support call frame
1510 debugging information like that provided by DWARF 2. */
1511 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RETURN_POINTER_REGNUM)
1514 /* Register That Address the Stack Frame. */
1516 /* The register number of the stack pointer register, which must also be a
1517 fixed register according to `FIXED_REGISTERS'. On most machines, the
1518 hardware determines which register this is. */
1519 #define STACK_POINTER_REGNUM (GPR_FIRST + 1)
1521 /* The register number of the frame pointer register, which is used to access
1522 automatic variables in the stack frame. On some machines, the hardware
1523 determines which register this is. On other machines, you can choose any
1524 register you wish for this purpose. */
1525 #define FRAME_POINTER_REGNUM (GPR_FIRST + 2)
1527 /* The register number of the arg pointer register, which is used to access the
1528 function's argument list. On some machines, this is the same as the frame
1529 pointer register. On some machines, the hardware determines which register
1530 this is. On other machines, you can choose any register you wish for this
1531 purpose. If this is not the same register as the frame pointer register,
1532 then you must mark it as a fixed register according to `FIXED_REGISTERS', or
1533 arrange to be able to eliminate it. */
1535 /* On frv this is a fake register that is eliminated in
1536 terms of either the frame pointer or stack pointer. */
1537 #define ARG_POINTER_REGNUM AP_FIRST
1539 /* Register numbers used for passing a function's static chain pointer. If
1540 register windows are used, the register number as seen by the called
1541 function is `STATIC_CHAIN_INCOMING_REGNUM', while the register number as
1542 seen by the calling function is `STATIC_CHAIN_REGNUM'. If these registers
1543 are the same, `STATIC_CHAIN_INCOMING_REGNUM' need not be defined.
1545 The static chain register need not be a fixed register.
1547 If the static chain is passed in memory, these macros should not be defined;
1548 instead, the next two macros should be defined. */
1549 #define STATIC_CHAIN_REGNUM (GPR_FIRST + 7)
1550 #define STATIC_CHAIN_INCOMING_REGNUM (GPR_FIRST + 7)
1553 /* Eliminating the Frame Pointer and the Arg Pointer. */
1555 /* A C expression which is nonzero if a function must have and use a frame
1556 pointer. This expression is evaluated in the reload pass. If its value is
1557 nonzero the function will have a frame pointer.
1559 The expression can in principle examine the current function and decide
1560 according to the facts, but on most machines the constant 0 or the constant
1561 1 suffices. Use 0 when the machine allows code to be generated with no
1562 frame pointer, and doing so saves some time or space. Use 1 when there is
1563 no possible advantage to avoiding a frame pointer.
1565 In certain cases, the compiler does not know how to produce valid code
1566 without a frame pointer. The compiler recognizes those cases and
1567 automatically gives the function a frame pointer regardless of what
1568 `FRAME_POINTER_REQUIRED' says. You don't need to worry about them.
1570 In a function that does not require a frame pointer, the frame pointer
1571 register can be allocated for ordinary usage, unless you mark it as a fixed
1572 register. See `FIXED_REGISTERS' for more information. */
1573 #define FRAME_POINTER_REQUIRED frv_frame_pointer_required ()
1575 /* If defined, this macro specifies a table of register pairs used to eliminate
1576 unneeded registers that point into the stack frame. If it is not defined,
1577 the only elimination attempted by the compiler is to replace references to
1578 the frame pointer with references to the stack pointer.
1580 The definition of this macro is a list of structure initializations, each of
1581 which specifies an original and replacement register.
1583 On some machines, the position of the argument pointer is not known until
1584 the compilation is completed. In such a case, a separate hard register must
1585 be used for the argument pointer. This register can be eliminated by
1586 replacing it with either the frame pointer or the argument pointer,
1587 depending on whether or not the frame pointer has been eliminated.
1589 In this case, you might specify:
1590 #define ELIMINABLE_REGS \
1591 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1592 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1593 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1595 Note that the elimination of the argument pointer with the stack pointer is
1596 specified first since that is the preferred elimination. */
1598 #define ELIMINABLE_REGS \
1600 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1601 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1602 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
1605 /* A C expression that returns nonzero if the compiler is allowed to try to
1606 replace register number FROM with register number TO. This macro need only
1607 be defined if `ELIMINABLE_REGS' is defined, and will usually be the constant
1608 1, since most of the cases preventing register elimination are things that
1609 the compiler already knows about. */
1611 #define CAN_ELIMINATE(FROM, TO) \
1612 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1613 ? ! frame_pointer_needed \
1616 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It specifies the
1617 initial difference between the specified pair of registers. This macro must
1618 be defined if `ELIMINABLE_REGS' is defined. */
1620 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1621 (OFFSET) = frv_initial_elimination_offset (FROM, TO)
1624 /* Passing Function Arguments on the Stack. */
1626 /* If defined, the maximum amount of space required for outgoing arguments will
1627 be computed and placed into the variable
1628 `current_function_outgoing_args_size'. No space will be pushed onto the
1629 stack for each call; instead, the function prologue should increase the
1630 stack frame size by this amount.
1632 Defining both `PUSH_ROUNDING' and `ACCUMULATE_OUTGOING_ARGS' is not
1634 #define ACCUMULATE_OUTGOING_ARGS 1
1636 /* A C expression that should indicate the number of bytes of its own arguments
1637 that a function pops on returning, or 0 if the function pops no arguments
1638 and the caller must therefore pop them all after the function returns.
1640 FUNDECL is a C variable whose value is a tree node that describes the
1641 function in question. Normally it is a node of type `FUNCTION_DECL' that
1642 describes the declaration of the function. From this it is possible to
1643 obtain the DECL_ATTRIBUTES of the function.
1645 FUNTYPE is a C variable whose value is a tree node that describes the
1646 function in question. Normally it is a node of type `FUNCTION_TYPE' that
1647 describes the data type of the function. From this it is possible to obtain
1648 the data types of the value and arguments (if known).
1650 When a call to a library function is being considered, FUNTYPE will contain
1651 an identifier node for the library function. Thus, if you need to
1652 distinguish among various library functions, you can do so by their names.
1653 Note that "library function" in this context means a function used to
1654 perform arithmetic, whose name is known specially in the compiler and was
1655 not mentioned in the C code being compiled.
1657 STACK-SIZE is the number of bytes of arguments passed on the stack. If a
1658 variable number of bytes is passed, it is zero, and argument popping will
1659 always be the responsibility of the calling function.
1661 On the VAX, all functions always pop their arguments, so the definition of
1662 this macro is STACK-SIZE. On the 68000, using the standard calling
1663 convention, no functions pop their arguments, so the value of the macro is
1664 always 0 in this case. But an alternative calling convention is available
1665 in which functions that take a fixed number of arguments pop them but other
1666 functions (such as `printf') pop nothing (the caller pops all). When this
1667 convention is in use, FUNTYPE is examined to determine whether a function
1668 takes a fixed number of arguments. */
1669 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
1672 /* The number of register assigned to holding function arguments. */
1674 #define FRV_NUM_ARG_REGS 6
1676 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1677 frv_function_arg (&CUM, MODE, TYPE, NAMED, FALSE)
1679 /* Define this macro if the target machine has "register windows", so that the
1680 register in which a function sees an arguments is not necessarily the same
1681 as the one in which the caller passed the argument.
1683 For such machines, `FUNCTION_ARG' computes the register in which the caller
1684 passes the value, and `FUNCTION_INCOMING_ARG' should be defined in a similar
1685 fashion to tell the function being called where the arguments will arrive.
1687 If `FUNCTION_INCOMING_ARG' is not defined, `FUNCTION_ARG' serves both
1690 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
1691 frv_function_arg (&CUM, MODE, TYPE, NAMED, TRUE)
1693 /* A C type for declaring a variable that is used as the first argument of
1694 `FUNCTION_ARG' and other related values. For some target machines, the type
1695 `int' suffices and can hold the number of bytes of argument so far.
1697 There is no need to record in `CUMULATIVE_ARGS' anything about the arguments
1698 that have been passed on the stack. The compiler has other variables to
1699 keep track of that. For target machines on which all arguments are passed
1700 on the stack, there is no need to store anything in `CUMULATIVE_ARGS';
1701 however, the data structure must exist and should not be empty, so use
1703 #define CUMULATIVE_ARGS int
1705 /* A C statement (sans semicolon) for initializing the variable CUM for the
1706 state at the beginning of the argument list. The variable has type
1707 `CUMULATIVE_ARGS'. The value of FNTYPE is the tree node for the data type
1708 of the function which will receive the args, or 0 if the args are to a
1709 compiler support library function. The value of INDIRECT is nonzero when
1710 processing an indirect call, for example a call through a function pointer.
1711 The value of INDIRECT is zero for a call to an explicitly named function, a
1712 library function call, or when `INIT_CUMULATIVE_ARGS' is used to find
1713 arguments for the function being compiled.
1715 When processing a call to a compiler support library function, LIBNAME
1716 identifies which one. It is a `symbol_ref' rtx which contains the name of
1717 the function, as a string. LIBNAME is 0 when an ordinary C function call is
1718 being processed. Thus, each time this macro is called, either LIBNAME or
1719 FNTYPE is nonzero, but never both of them at once. */
1721 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
1722 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, FNDECL, FALSE)
1724 /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
1725 arguments for the function being compiled. If this macro is undefined,
1726 `INIT_CUMULATIVE_ARGS' is used instead.
1728 The value passed for LIBNAME is always 0, since library routines with
1729 special calling conventions are never compiled with GCC. The argument
1730 LIBNAME exists for symmetry with `INIT_CUMULATIVE_ARGS'. */
1732 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
1733 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, NULL, TRUE)
1735 /* A C statement (sans semicolon) to update the summarizer variable CUM to
1736 advance past an argument in the argument list. The values MODE, TYPE and
1737 NAMED describe that argument. Once this is done, the variable CUM is
1738 suitable for analyzing the *following* argument with `FUNCTION_ARG', etc.
1740 This macro need not do anything if the argument in question was passed on
1741 the stack. The compiler knows how to track the amount of stack space used
1742 for arguments without any special help. */
1743 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1744 frv_function_arg_advance (&CUM, MODE, TYPE, NAMED)
1746 /* If defined, a C expression that gives the alignment boundary, in bits, of an
1747 argument with the specified mode and type. If it is not defined,
1748 `PARM_BOUNDARY' is used for all arguments. */
1750 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1751 frv_function_arg_boundary (MODE, TYPE)
1753 /* A C expression that is nonzero if REGNO is the number of a hard register in
1754 which function arguments are sometimes passed. This does *not* include
1755 implicit arguments such as the static chain and the structure-value address.
1756 On many machines, no registers can be used for this purpose since all
1757 function arguments are pushed on the stack. */
1758 #define FUNCTION_ARG_REGNO_P(REGNO) \
1759 ((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM))
1762 /* How Scalar Function Values are Returned. */
1764 /* The number of the hard register that is used to return a scalar value from a
1766 #define RETURN_VALUE_REGNUM (GPR_FIRST + 8)
1768 /* A C expression to create an RTX representing the place where a function
1769 returns a value of data type VALTYPE. VALTYPE is a tree node representing a
1770 data type. Write `TYPE_MODE (VALTYPE)' to get the machine mode used to
1771 represent that type. On many machines, only the mode is relevant.
1772 (Actually, on most machines, scalar values are returned in the same place
1773 regardless of mode).
1775 If `TARGET_PROMOTE_FUNCTION_RETURN' is defined to return true, you
1776 must apply the same promotion rules specified in `PROMOTE_MODE' if
1777 VALTYPE is a scalar type.
1779 If the precise function being called is known, FUNC is a tree node
1780 (`FUNCTION_DECL') for it; otherwise, FUNC is a null pointer. This makes it
1781 possible to use a different value-returning convention for specific
1782 functions when all their calls are known.
1784 `FUNCTION_VALUE' is not used for return vales with aggregate data types,
1785 because these are returned in another way. See
1786 `TARGET_STRUCT_VALUE_RTX' and related macros, below. */
1787 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1788 gen_rtx_REG (TYPE_MODE (VALTYPE), RETURN_VALUE_REGNUM)
1790 /* A C expression to create an RTX representing the place where a library
1791 function returns a value of mode MODE.
1793 Note that "library function" in this context means a compiler support
1794 routine, used to perform arithmetic, whose name is known specially by the
1795 compiler and was not mentioned in the C code being compiled.
1797 The definition of `LIBRARY_VALUE' need not be concerned aggregate data
1798 types, because none of the library functions returns such types. */
1799 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RETURN_VALUE_REGNUM)
1801 /* A C expression that is nonzero if REGNO is the number of a hard register in
1802 which the values of called function may come back.
1804 A register whose use for returning values is limited to serving as the
1805 second of a pair (for a value of type `double', say) need not be recognized
1806 by this macro. So for most machines, this definition suffices:
1808 #define FUNCTION_VALUE_REGNO_P(N) ((N) == RETURN)
1810 If the machine has register windows, so that the caller and the called
1811 function use different registers for the return value, this macro should
1812 recognize only the caller's register numbers. */
1813 #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == RETURN_VALUE_REGNUM)
1816 /* How Large Values are Returned. */
1818 /* The number of the register that is used to to pass the structure
1820 #define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3)
1823 /* Function Entry and Exit. */
1825 /* Define this macro as a C expression that is nonzero if the return
1826 instruction or the function epilogue ignores the value of the stack pointer;
1827 in other words, if it is safe to delete an instruction to adjust the stack
1828 pointer before a return from the function.
1830 Note that this macro's value is relevant only for functions for which frame
1831 pointers are maintained. It is never safe to delete a final stack
1832 adjustment in a function that has no frame pointer, and the compiler knows
1833 this regardless of `EXIT_IGNORE_STACK'. */
1834 #define EXIT_IGNORE_STACK 1
1836 /* Generating Code for Profiling. */
1838 /* A C statement or compound statement to output to FILE some assembler code to
1839 call the profiling subroutine `mcount'. Before calling, the assembler code
1840 must load the address of a counter variable into a register where `mcount'
1841 expects to find the address. The name of this variable is `LP' followed by
1842 the number LABELNO, so you would generate the name using `LP%d' in a
1845 The details of how the address should be passed to `mcount' are determined
1846 by your operating system environment, not by GCC. To figure them out,
1847 compile a small program for profiling using the system's installed C
1848 compiler and look at the assembler code that results.
1850 This declaration must be present, but it can be an abort if profiling is
1853 #define FUNCTION_PROFILER(FILE, LABELNO)
1856 /* Implementing the Varargs Macros. */
1858 /* Implement the stdarg/varargs va_start macro. STDARG_P is nonzero if this
1859 is stdarg.h instead of varargs.h. VALIST is the tree of the va_list
1860 variable to initialize. NEXTARG is the machine independent notion of the
1861 'next' argument after the variable arguments. If not defined, a standard
1862 implementation will be defined that works for arguments passed on the stack. */
1864 #define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG) \
1865 (frv_expand_builtin_va_start(VALIST, NEXTARG))
1868 /* Trampolines for Nested Functions. */
1870 /* A C expression for the size in bytes of the trampoline, as an integer. */
1871 #define TRAMPOLINE_SIZE frv_trampoline_size ()
1873 /* Alignment required for trampolines, in bits.
1875 If you don't define this macro, the value of `BIGGEST_ALIGNMENT' is used for
1876 aligning trampolines. */
1877 #define TRAMPOLINE_ALIGNMENT (TARGET_FDPIC ? 64 : 32)
1879 /* A C statement to initialize the variable parts of a trampoline. ADDR is an
1880 RTX for the address of the trampoline; FNADDR is an RTX for the address of
1881 the nested function; STATIC_CHAIN is an RTX for the static chain value that
1882 should be passed to the function when it is called. */
1883 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \
1884 frv_initialize_trampoline (ADDR, FNADDR, STATIC_CHAIN)
1886 /* Define this macro if trampolines need a special subroutine to do their work.
1887 The macro should expand to a series of `asm' statements which will be
1888 compiled with GCC. They go in a library function named
1889 `__transfer_from_trampoline'.
1891 If you need to avoid executing the ordinary prologue code of a compiled C
1892 function when you jump to the subroutine, you can do so by placing a special
1893 label of your own in the assembler code. Use one `asm' statement to
1894 generate an assembler label, and another to make the label global. Then
1895 trampolines can use that label to jump directly to your special assembler
1898 #ifdef __FRV_UNDERSCORE__
1899 #define TRAMPOLINE_TEMPLATE_NAME "___trampoline_template"
1901 #define TRAMPOLINE_TEMPLATE_NAME "__trampoline_template"
1904 #define Twrite _write
1907 #define TRANSFER_FROM_TRAMPOLINE \
1908 extern int Twrite (int, const void *, unsigned); \
1911 __trampoline_setup (short * addr, int size, int fnaddr, int sc) \
1913 extern short __trampoline_template[]; \
1914 short * to = addr; \
1915 short * from = &__trampoline_template[0]; \
1920 Twrite (2, "__trampoline_setup bad size\n", \
1921 sizeof ("__trampoline_setup bad size\n") - 1); \
1926 to[1] = (short)(fnaddr); \
1928 to[3] = (short)(sc); \
1930 to[5] = (short)(fnaddr >> 16); \
1932 to[7] = (short)(sc >> 16); \
1936 for (i = 0; i < 20; i++) \
1937 __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \
1941 "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \
1943 TRAMPOLINE_TEMPLATE_NAME ":\n" \
1944 "\tsetlos #0, gr6\n" /* jump register */ \
1945 "\tsetlos #0, gr7\n" /* static chain */ \
1946 "\tsethi #0, gr6\n" \
1947 "\tsethi #0, gr7\n" \
1948 "\tjmpl @(gr0,gr6)\n");
1950 #define TRANSFER_FROM_TRAMPOLINE \
1951 extern int Twrite (int, const void *, unsigned); \
1954 __trampoline_setup (addr, size, fnaddr, sc) \
1960 extern short __trampoline_template[]; \
1961 short * from = &__trampoline_template[0]; \
1963 short **desc = (short **)addr; \
1964 short * to = addr + 4; \
1968 Twrite (2, "__trampoline_setup bad size\n", \
1969 sizeof ("__trampoline_setup bad size\n") - 1); \
1973 /* Create a function descriptor with the address of the code below
1974 and NULL as the FDPIC value. We don't need the real GOT value
1975 here, since we don't use it, so we use NULL, that is just as
1982 to[1] = (short)(fnaddr); \
1984 to[3] = (short)(sc); \
1986 to[5] = (short)(fnaddr >> 16); \
1988 to[7] = (short)(sc >> 16); \
1991 to[10] = from[10]; \
1992 to[11] = from[11]; \
1994 for (i = 0; i < size; i++) \
1995 __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \
1999 "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \
2001 TRAMPOLINE_TEMPLATE_NAME ":\n" \
2002 "\tsetlos #0, gr6\n" /* Jump register. */ \
2003 "\tsetlos #0, gr7\n" /* Static chain. */ \
2004 "\tsethi #0, gr6\n" \
2005 "\tsethi #0, gr7\n" \
2006 "\tldd @(gr6,gr0),gr14\n" \
2007 "\tjmpl @(gr14,gr0)\n" \
2012 /* Addressing Modes. */
2014 /* A C expression that is 1 if the RTX X is a constant which is a valid
2015 address. On most machines, this can be defined as `CONSTANT_P (X)', but a
2016 few machines are more restrictive in which constant addresses are supported.
2018 `CONSTANT_P' accepts integer-values expressions whose values are not
2019 explicitly known, such as `symbol_ref', `label_ref', and `high' expressions
2020 and `const' arithmetic expressions, in addition to `const_int' and
2021 `const_double' expressions. */
2022 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
2024 /* A number, the maximum number of registers that can appear in a valid memory
2025 address. Note that it is up to you to specify a value equal to the maximum
2026 number that `GO_IF_LEGITIMATE_ADDRESS' would ever accept. */
2027 #define MAX_REGS_PER_ADDRESS 2
2029 /* A C compound statement with a conditional `goto LABEL;' executed if X (an
2030 RTX) is a legitimate memory address on the target machine for a memory
2031 operand of mode MODE.
2033 It usually pays to define several simpler macros to serve as subroutines for
2034 this one. Otherwise it may be too complicated to understand.
2036 This macro must exist in two variants: a strict variant and a non-strict
2037 one. The strict variant is used in the reload pass. It must be defined so
2038 that any pseudo-register that has not been allocated a hard register is
2039 considered a memory reference. In contexts where some kind of register is
2040 required, a pseudo-register with no hard register must be rejected.
2042 The non-strict variant is used in other passes. It must be defined to
2043 accept all pseudo-registers in every context where some kind of register is
2046 Compiler source files that want to use the strict variant of this macro
2047 define the macro `REG_OK_STRICT'. You should use an `#ifdef REG_OK_STRICT'
2048 conditional to define the strict variant in that case and the non-strict
2051 Subroutines to check for acceptable registers for various purposes (one for
2052 base registers, one for index registers, and so on) are typically among the
2053 subroutines used to define `GO_IF_LEGITIMATE_ADDRESS'. Then only these
2054 subroutine macros need have two variants; the higher levels of macros may be
2055 the same whether strict or not.
2057 Normally, constant addresses which are the sum of a `symbol_ref' and an
2058 integer are stored inside a `const' RTX to mark them as constant.
2059 Therefore, there is no need to recognize such sums specifically as
2060 legitimate addresses. Normally you would simply recognize any `const' as
2063 Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle constant sums that
2064 are not marked with `const'. It assumes that a naked `plus' indicates
2065 indexing. If so, then you *must* reject such naked constant sums as
2066 illegitimate addresses, so that none of them will be given to
2067 `PRINT_OPERAND_ADDRESS'.
2069 On some machines, whether a symbolic address is legitimate depends on the
2070 section that the address refers to. On these machines, define the macro
2071 `ENCODE_SECTION_INFO' to store the information into the `symbol_ref', and
2072 then check for it here. When you see a `const', you will have to look
2073 inside it to find the `symbol_ref' in order to determine the section.
2075 The best way to modify the name string is by adding text to the beginning,
2076 with suitable punctuation to prevent any ambiguity. Allocate the new name
2077 in `saveable_obstack'. You will have to modify `ASM_OUTPUT_LABELREF' to
2078 remove and decode the added text and output the name accordingly, and define
2079 `(* targetm.strip_name_encoding)' to access the original name string.
2081 You can check the information stored here into the `symbol_ref' in the
2082 definitions of the macros `GO_IF_LEGITIMATE_ADDRESS' and
2083 `PRINT_OPERAND_ADDRESS'. */
2085 #ifdef REG_OK_STRICT
2086 #define REG_OK_STRICT_P 1
2088 #define REG_OK_STRICT_P 0
2091 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
2094 if (frv_legitimate_address_p (MODE, X, REG_OK_STRICT_P, \
2100 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
2101 use as a base register. For hard registers, it should always accept those
2102 which the hardware permits and reject the others. Whether the macro accepts
2103 or rejects pseudo registers must be controlled by `REG_OK_STRICT' as
2104 described above. This usually requires two variant definitions, of which
2105 `REG_OK_STRICT' controls the one actually used. */
2106 #ifdef REG_OK_STRICT
2107 #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X))
2109 #define REG_OK_FOR_BASE_P(X) GPR_AP_OR_PSEUDO_P (REGNO (X))
2112 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
2113 use as an index register.
2115 The difference between an index register and a base register is that the
2116 index register may be scaled. If an address involves the sum of two
2117 registers, neither one of them scaled, then either one may be labeled the
2118 "base" and the other the "index"; but whichever labeling is used must fit
2119 the machine's constraints of which registers may serve in each capacity.
2120 The compiler will try both labelings, looking for one that is valid, and
2121 will reload one or both registers only if neither labeling works. */
2122 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
2124 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
2126 rtx new_x = frv_legitimize_address (X, OLDX, MODE); \
2134 #define FIND_BASE_TERM frv_find_base_term
2136 /* A C statement or compound statement with a conditional `goto LABEL;'
2137 executed if memory address X (an RTX) can have different meanings depending
2138 on the machine mode of the memory reference it is used for or if the address
2139 is valid for some modes but not others.
2141 Autoincrement and autodecrement addresses typically have mode-dependent
2142 effects because the amount of the increment or decrement is the size of the
2143 operand being addressed. Some machines have other mode-dependent addresses.
2144 Many RISC machines have no mode-dependent addresses.
2146 You may assume that ADDR is a valid address for the machine. */
2147 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
2149 /* A C expression that is nonzero if X is a legitimate constant for an
2150 immediate operand on the target machine. You can assume that X satisfies
2151 `CONSTANT_P', so you need not check this. In fact, `1' is a suitable
2152 definition for this macro on machines where anything `CONSTANT_P' is valid. */
2153 #define LEGITIMATE_CONSTANT_P(X) frv_legitimate_constant_p (X)
2155 /* The load-and-update commands allow pre-modification in addresses.
2156 The index has to be in a register. */
2157 #define HAVE_PRE_MODIFY_REG 1
2160 /* Returns a mode from class `MODE_CC' to be used when comparison operation
2161 code OP is applied to rtx X and Y. For example, on the SPARC,
2162 `SELECT_CC_MODE' is defined as (see *note Jump Patterns::. for a
2163 description of the reason for this definition)
2165 #define SELECT_CC_MODE(OP,X,Y) \
2166 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2167 ? ((OP == EQ || OP == NE) ? CCFPmode : CCFPEmode) \
2168 : ((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS \
2169 || GET_CODE (X) == NEG) \
2170 ? CC_NOOVmode : CCmode))
2172 You need not define this macro if `EXTRA_CC_MODES' is not defined. */
2173 #define SELECT_CC_MODE frv_select_cc_mode
2175 /* A C expression whose value is one if it is always safe to reverse a
2176 comparison whose mode is MODE. If `SELECT_CC_MODE' can ever return MODE for
2177 a floating-point inequality comparison, then `REVERSIBLE_CC_MODE (MODE)'
2180 You need not define this macro if it would always returns zero or if the
2181 floating-point format is anything other than `IEEE_FLOAT_FORMAT'. For
2182 example, here is the definition used on the SPARC, where floating-point
2183 inequality comparisons are always given `CCFPEmode':
2185 #define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode) */
2187 /* On frv, don't consider floating point comparisons to be reversible. In
2188 theory, fp equality comparisons can be reversible. */
2189 #define REVERSIBLE_CC_MODE(MODE) \
2190 ((MODE) == CCmode || (MODE) == CC_UNSmode || (MODE) == CC_NZmode)
2192 /* Frv CCR_MODE's are not reversible. */
2193 #define REVERSE_CONDEXEC_PREDICATES_P(x,y) 0
2196 /* Describing Relative Costs of Operations. */
2198 /* A C expression for the cost of moving data from a register in class FROM to
2199 one in class TO. The classes are expressed using the enumeration values
2200 such as `GENERAL_REGS'. A value of 4 is the default; other values are
2201 interpreted relative to that.
2203 It is not required that the cost always equal 2 when FROM is the same as TO;
2204 on some machines it is expensive to move between registers if they are not
2207 If reload sees an insn consisting of a single `set' between two hard
2208 registers, and if `REGISTER_MOVE_COST' applied to their classes returns a
2209 value of 2, reload does not check to ensure that the constraints of the insn
2210 are met. Setting a cost of other than 2 will allow reload to verify that
2211 the constraints are met. You should do this if the `movM' pattern's
2212 constraints do not allow such copying. */
2213 #define REGISTER_MOVE_COST(MODE, FROM, TO) frv_register_move_cost (FROM, TO)
2215 /* A C expression for the cost of moving data of mode M between a register and
2216 memory. A value of 2 is the default; this cost is relative to those in
2217 `REGISTER_MOVE_COST'.
2219 If moving between registers and memory is more expensive than between two
2220 registers, you should define this macro to express the relative cost. */
2221 #define MEMORY_MOVE_COST(M,C,I) 4
2223 /* A C expression for the cost of a branch instruction. A value of 1 is the
2224 default; other values are interpreted relative to that. */
2225 #define BRANCH_COST frv_branch_cost_int
2227 /* Define this macro as a C expression which is nonzero if accessing less than
2228 a word of memory (i.e. a `char' or a `short') is no faster than accessing a
2229 word of memory, i.e., if such access require more than one instruction or if
2230 there is no difference in cost between byte and (aligned) word loads.
2232 When this macro is not defined, the compiler will access a field by finding
2233 the smallest containing object; when it is defined, a fullword load will be
2234 used if alignment permits. Unless bytes accesses are faster than word
2235 accesses, using word accesses is preferable since it may eliminate
2236 subsequent memory access if subsequent accesses occur to other fields in the
2237 same word of the structure, but to different bytes. */
2238 #define SLOW_BYTE_ACCESS 1
2240 /* Define this macro if it is as good or better to call a constant function
2241 address than to call an address kept in a register. */
2242 #define NO_FUNCTION_CSE
2245 /* Dividing the output into sections. */
2247 /* A C expression whose value is a string containing the assembler operation
2248 that should precede instructions and read-only data. Normally `".text"' is
2250 #define TEXT_SECTION_ASM_OP "\t.text"
2252 /* A C expression whose value is a string containing the assembler operation to
2253 identify the following data as writable initialized data. Normally
2254 `".data"' is right. */
2255 #define DATA_SECTION_ASM_OP "\t.data"
2257 /* If defined, a C expression whose value is a string containing the
2258 assembler operation to identify the following data as
2259 uninitialized global data. If not defined, and neither
2260 `ASM_OUTPUT_BSS' nor `ASM_OUTPUT_ALIGNED_BSS' are defined,
2261 uninitialized global data will be output in the data section if
2262 `-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be
2264 #define BSS_SECTION_ASM_OP "\t.section .bss,\"aw\""
2266 /* Short Data Support */
2267 #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\""
2269 /* On svr4, we *do* have support for the .init and .fini sections, and we
2270 can put stuff in there to be executed before and after `main'. We let
2271 crtstuff.c and other files know this by defining the following symbols.
2272 The definitions say how to change sections to the .init and .fini
2273 sections. This is the same for all known svr4 assemblers.
2275 The standard System V.4 macros will work, but they look ugly in the
2276 assembly output, so redefine them. */
2278 #undef INIT_SECTION_ASM_OP
2279 #undef FINI_SECTION_ASM_OP
2280 #define INIT_SECTION_ASM_OP "\t.section .init,\"ax\""
2281 #define FINI_SECTION_ASM_OP "\t.section .fini,\"ax\""
2283 #undef CTORS_SECTION_ASM_OP
2284 #undef DTORS_SECTION_ASM_OP
2285 #define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"a\""
2286 #define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"a\""
2288 /* A C expression whose value is a string containing the assembler operation to
2289 switch to the fixup section that records all initialized pointers in a -fpic
2290 program so they can be changed program startup time if the program is loaded
2291 at a different address than linked for. */
2292 #define FIXUP_SECTION_ASM_OP "\t.section .rofixup,\"a\""
2294 /* A list of names for sections other than the standard two, which are
2295 `in_text' and `in_data'. You need not define this macro
2296 on a system with no other sections (that GCC needs to use). */
2297 #undef EXTRA_SECTIONS
2298 #define EXTRA_SECTIONS in_sdata, in_const, in_fixup
2300 /* One or more functions to be defined in "varasm.c". These
2301 functions should do jobs analogous to those of `text_section' and
2302 `data_section', for your additional sections. Do not define this
2303 macro if you do not define `EXTRA_SECTIONS'. */
2304 #undef EXTRA_SECTION_FUNCTIONS
2305 #define EXTRA_SECTION_FUNCTIONS \
2306 SDATA_SECTION_FUNCTION \
2307 FIXUP_SECTION_FUNCTION
2309 #define SDATA_SECTION_FUNCTION \
2311 sdata_section (void) \
2313 if (in_section != in_sdata) \
2315 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
2316 in_section = in_sdata; \
2320 #define FIXUP_SECTION_FUNCTION \
2322 fixup_section (void) \
2324 if (in_section != in_fixup) \
2326 fprintf (asm_out_file, "%s\n", FIXUP_SECTION_ASM_OP); \
2327 in_section = in_fixup; \
2331 /* Position Independent Code. */
2333 /* A C expression that is nonzero if X is a legitimate immediate operand on the
2334 target machine when generating position independent code. You can assume
2335 that X satisfies `CONSTANT_P', so you need not check this. You can also
2336 assume FLAG_PIC is true, so you need not check it either. You need not
2337 define this macro if all constants (including `SYMBOL_REF') can be immediate
2338 operands when generating position independent code. */
2339 #define LEGITIMATE_PIC_OPERAND_P(X) \
2340 ( GET_CODE (X) == CONST_INT \
2341 || GET_CODE (X) == CONST_DOUBLE \
2342 || (GET_CODE (X) == HIGH && GET_CODE (XEXP (X, 0)) == CONST_INT) \
2343 || got12_operand (X, VOIDmode)) \
2346 /* The Overall Framework of an Assembler File. */
2348 /* A C string constant describing how to begin a comment in the target
2349 assembler language. The compiler assumes that the comment will end at the
2351 #define ASM_COMMENT_START ";"
2353 /* A C string constant for text to be output before each `asm' statement or
2354 group of consecutive ones. Normally this is `"#APP"', which is a comment
2355 that has no effect on most assemblers but tells the GNU assembler that it
2356 must check the lines that follow for all valid assembler constructs. */
2357 #define ASM_APP_ON "#APP\n"
2359 /* A C string constant for text to be output after each `asm' statement or
2360 group of consecutive ones. Normally this is `"#NO_APP"', which tells the
2361 GNU assembler to resume making the time-saving assumptions that are valid
2362 for ordinary compiler output. */
2363 #define ASM_APP_OFF "#NO_APP\n"
2366 /* Output of Data. */
2368 /* This is how to output a label to dwarf/dwarf2. */
2369 #define ASM_OUTPUT_DWARF_ADDR(STREAM, LABEL) \
2371 fprintf (STREAM, "\t.picptr\t"); \
2372 assemble_name (STREAM, LABEL); \
2376 /* Emit a dtp-relative reference to a TLS variable. */
2378 #define ASM_OUTPUT_DWARF_DTPREL(FILE, SIZE, X) \
2379 frv_output_dwarf_dtprel ((FILE), (SIZE), (X))
2382 /* Whether to emit the gas specific dwarf2 line number support. */
2383 #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DEBUG_LOC)
2385 /* Output of Uninitialized Variables. */
2387 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
2388 assembler definition of a local-common-label named NAME whose size is SIZE
2389 bytes. The variable ROUNDED is the size rounded up to whatever alignment
2392 Use the expression `assemble_name (STREAM, NAME)' to output the name itself;
2393 before and after that, output the additional assembler syntax for defining
2394 the name, and a newline.
2396 This macro controls how the assembler definitions of uninitialized static
2397 variables are output. */
2398 #undef ASM_OUTPUT_LOCAL
2400 /* Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a separate,
2401 explicit argument. If you define this macro, it is used in place of
2402 `ASM_OUTPUT_LOCAL', and gives you more flexibility in handling the required
2403 alignment of the variable. The alignment is specified as the number of
2406 Defined in svr4.h. */
2407 #undef ASM_OUTPUT_ALIGNED_LOCAL
2409 /* This is for final.c, because it is used by ASM_DECLARE_OBJECT_NAME. */
2410 extern int size_directive_output;
2412 /* Like `ASM_OUTPUT_ALIGNED_LOCAL' except that it takes an additional
2413 parameter - the DECL of variable to be output, if there is one.
2414 This macro can be called with DECL == NULL_TREE. If you define
2415 this macro, it is used in place of `ASM_OUTPUT_LOCAL' and
2416 `ASM_OUTPUT_ALIGNED_LOCAL', and gives you more flexibility in
2417 handling the destination of the variable. */
2418 #undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
2419 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
2421 if ((SIZE) > 0 && (SIZE) <= g_switch_value) \
2422 named_section (0, ".sbss", 0); \
2425 ASM_OUTPUT_ALIGN (STREAM, floor_log2 ((ALIGN) / BITS_PER_UNIT)); \
2426 ASM_DECLARE_OBJECT_NAME (STREAM, NAME, DECL); \
2427 ASM_OUTPUT_SKIP (STREAM, (SIZE) ? (SIZE) : 1); \
2431 /* Output and Generation of Labels. */
2433 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
2434 assembler definition of a label named NAME. Use the expression
2435 `assemble_name (STREAM, NAME)' to output the name itself; before and after
2436 that, output the additional assembler syntax for defining the name, and a
2438 #define ASM_OUTPUT_LABEL(STREAM, NAME) \
2440 assemble_name (STREAM, NAME); \
2441 fputs (":\n", STREAM); \
2444 /* Globalizing directive for a label. */
2445 #define GLOBAL_ASM_OP "\t.globl "
2447 /* A C statement to store into the string STRING a label whose name is made
2448 from the string PREFIX and the number NUM.
2450 This string, when output subsequently by `assemble_name', should produce the
2451 output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX
2454 If the string begins with `*', then `assemble_name' will output the rest of
2455 the string unchanged. It is often convenient for
2456 `ASM_GENERATE_INTERNAL_LABEL' to use `*' in this way. If the string doesn't
2457 start with `*', then `ASM_OUTPUT_LABELREF' gets to output the string, and
2458 may change it. (Of course, `ASM_OUTPUT_LABELREF' is also part of your
2459 machine description, so you should know what it does on your machine.)
2461 Defined in svr4.h. */
2462 #undef ASM_GENERATE_INTERNAL_LABEL
2463 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
2465 sprintf (LABEL, "*.%s%ld", PREFIX, (long)NUM); \
2469 /* Macros Controlling Initialization Routines. */
2471 /* If defined, a C string constant for the assembler operation to identify the
2472 following data as initialization code. If not defined, GCC will assume
2473 such a section does not exist. When you are using special sections for
2474 initialization and termination functions, this macro also controls how
2475 `crtstuff.c' and `libgcc2.c' arrange to run the initialization functions.
2477 Defined in svr4.h. */
2478 #undef INIT_SECTION_ASM_OP
2480 /* If defined, `main' will call `__main' despite the presence of
2481 `INIT_SECTION_ASM_OP'. This macro should be defined for systems where the
2482 init section is not actually run automatically, but is still useful for
2483 collecting the lists of constructors and destructors. */
2484 #define INVOKE__main
2486 /* Output of Assembler Instructions. */
2488 /* A C initializer containing the assembler's names for the machine registers,
2489 each one as a C string constant. This is what translates register numbers
2490 in the compiler into assembler language. */
2491 #define REGISTER_NAMES \
2493 "gr0", "sp", "fp", "gr3", "gr4", "gr5", "gr6", "gr7", \
2494 "gr8", "gr9", "gr10", "gr11", "gr12", "gr13", "gr14", "gr15", \
2495 "gr16", "gr17", "gr18", "gr19", "gr20", "gr21", "gr22", "gr23", \
2496 "gr24", "gr25", "gr26", "gr27", "gr28", "gr29", "gr30", "gr31", \
2497 "gr32", "gr33", "gr34", "gr35", "gr36", "gr37", "gr38", "gr39", \
2498 "gr40", "gr41", "gr42", "gr43", "gr44", "gr45", "gr46", "gr47", \
2499 "gr48", "gr49", "gr50", "gr51", "gr52", "gr53", "gr54", "gr55", \
2500 "gr56", "gr57", "gr58", "gr59", "gr60", "gr61", "gr62", "gr63", \
2502 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \
2503 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \
2504 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \
2505 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31", \
2506 "fr32", "fr33", "fr34", "fr35", "fr36", "fr37", "fr38", "fr39", \
2507 "fr40", "fr41", "fr42", "fr43", "fr44", "fr45", "fr46", "fr47", \
2508 "fr48", "fr49", "fr50", "fr51", "fr52", "fr53", "fr54", "fr55", \
2509 "fr56", "fr57", "fr58", "fr59", "fr60", "fr61", "fr62", "fr63", \
2511 "fcc0", "fcc1", "fcc2", "fcc3", "icc0", "icc1", "icc2", "icc3", \
2512 "cc0", "cc1", "cc2", "cc3", "cc4", "cc5", "cc6", "cc7", \
2513 "acc0", "acc1", "acc2", "acc3", "acc4", "acc5", "acc6", "acc7", \
2514 "acc8", "acc9", "acc10", "acc11", \
2515 "accg0","accg1","accg2","accg3","accg4","accg5","accg6","accg7", \
2516 "accg8", "accg9", "accg10", "accg11", \
2517 "ap", "lr", "lcr", "iacc0h", "iacc0l" \
2520 /* Define this macro if you are using an unusual assembler that
2521 requires different names for the machine instructions.
2523 The definition is a C statement or statements which output an
2524 assembler instruction opcode to the stdio stream STREAM. The
2525 macro-operand PTR is a variable of type `char *' which points to
2526 the opcode name in its "internal" form--the form that is written
2527 in the machine description. The definition should output the
2528 opcode name to STREAM, performing any translation you desire, and
2529 increment the variable PTR to point at the end of the opcode so
2530 that it will not be output twice.
2532 In fact, your macro definition may process less than the entire
2533 opcode name, or more than the opcode name; but if you want to
2534 process text that includes `%'-sequences to substitute operands,
2535 you must take care of the substitution yourself. Just be sure to
2536 increment PTR over whatever text should not be output normally.
2538 If you need to look at the operand values, they can be found as the
2539 elements of `recog_operand'.
2541 If the macro definition does nothing, the instruction is output in
2544 #define ASM_OUTPUT_OPCODE(STREAM, PTR)\
2545 (PTR) = frv_asm_output_opcode (STREAM, PTR)
2547 /* If defined, a C statement to be executed just prior to the output
2548 of assembler code for INSN, to modify the extracted operands so
2549 they will be output differently.
2551 Here the argument OPVEC is the vector containing the operands
2552 extracted from INSN, and NOPERANDS is the number of elements of
2553 the vector which contain meaningful data for this insn. The
2554 contents of this vector are what will be used to convert the insn
2555 template into assembler code, so you can change the assembler
2556 output by changing the contents of the vector.
2558 This macro is useful when various assembler syntaxes share a single
2559 file of instruction patterns; by defining this macro differently,
2560 you can cause a large class of instructions to be output
2561 differently (such as with rearranged operands). Naturally,
2562 variations in assembler syntax affecting individual insn patterns
2563 ought to be handled by writing conditional output routines in
2566 If this macro is not defined, it is equivalent to a null statement. */
2568 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)\
2569 frv_final_prescan_insn (INSN, OPVEC, NOPERANDS)
2572 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2573 for an instruction operand X. X is an RTL expression.
2575 CODE is a value that can be used to specify one of several ways of printing
2576 the operand. It is used when identical operands must be printed differently
2577 depending on the context. CODE comes from the `%' specification that was
2578 used to request printing of the operand. If the specification was just
2579 `%DIGIT' then CODE is 0; if the specification was `%LTR DIGIT' then CODE is
2580 the ASCII code for LTR.
2582 If X is a register, this macro should print the register's name. The names
2583 can be found in an array `reg_names' whose type is `char *[]'. `reg_names'
2584 is initialized from `REGISTER_NAMES'.
2586 When the machine description has a specification `%PUNCT' (a `%' followed by
2587 a punctuation character), this macro is called with a null pointer for X and
2588 the punctuation character for CODE. */
2589 #define PRINT_OPERAND(STREAM, X, CODE) frv_print_operand (STREAM, X, CODE)
2591 /* A C expression which evaluates to true if CODE is a valid punctuation
2592 character for use in the `PRINT_OPERAND' macro. If
2593 `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no punctuation
2594 characters (except for the standard one, `%') are used in this way. */
2596 # == hint operand -- always zero for now
2597 @ == small data base register (gr16)
2598 ~ == pic register (gr17)
2599 * == temporary integer CCR register (cr3)
2600 & == temporary integer ICC register (icc3) */
2601 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2602 ((CODE) == '.' || (CODE) == '#' || (CODE) == '@' || (CODE) == '~' \
2603 || (CODE) == '*' || (CODE) == '&')
2605 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2606 for an instruction operand that is a memory reference whose address is X. X
2607 is an RTL expression.
2609 On some machines, the syntax for a symbolic address depends on the section
2610 that the address refers to. On these machines, define the macro
2611 `ENCODE_SECTION_INFO' to store the information into the `symbol_ref', and
2612 then check for it here.
2614 This declaration must be present. */
2615 #define PRINT_OPERAND_ADDRESS(STREAM, X) frv_print_operand_address (STREAM, X)
2617 /* If defined, C string expressions to be used for the `%R', `%L', `%U', and
2618 `%I' options of `asm_fprintf' (see `final.c'). These are useful when a
2619 single `md' file must support multiple assembler formats. In that case, the
2620 various `tm.h' files can define these macros differently.
2622 USER_LABEL_PREFIX is defined in svr4.h. */
2623 #undef USER_LABEL_PREFIX
2624 #define USER_LABEL_PREFIX ""
2625 #define REGISTER_PREFIX ""
2626 #define LOCAL_LABEL_PREFIX "."
2627 #define IMMEDIATE_PREFIX "#"
2630 /* Output of dispatch tables. */
2632 /* This macro should be provided on machines where the addresses in a dispatch
2633 table are relative to the table's own address.
2635 The definition should be a C statement to output to the stdio stream STREAM
2636 an assembler pseudo-instruction to generate a difference between two labels.
2637 VALUE and REL are the numbers of two internal labels. The definitions of
2638 these labels are output using `(*targetm.asm_out.internal_label)', and they must be
2639 printed in the same way here. For example,
2641 fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */
2642 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
2643 fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL)
2645 /* This macro should be provided on machines where the addresses in a dispatch
2648 The definition should be a C statement to output to the stdio stream STREAM
2649 an assembler pseudo-instruction to generate a reference to a label. VALUE
2650 is the number of an internal label whose definition is output using
2651 `(*targetm.asm_out.internal_label)'. For example,
2653 fprintf (STREAM, "\t.word L%d\n", VALUE) */
2654 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
2655 fprintf (STREAM, "\t.word .L%d\n", VALUE)
2657 /* Define this if the label before a jump-table needs to be output specially.
2658 The first three arguments are the same as for `(*targetm.asm_out.internal_label)';
2659 the fourth argument is the jump-table which follows (a `jump_insn'
2660 containing an `addr_vec' or `addr_diff_vec').
2662 This feature is used on system V to output a `swbeg' statement for the
2665 If this macro is not defined, these labels are output with
2666 `(*targetm.asm_out.internal_label)'.
2668 Defined in svr4.h. */
2669 /* When generating embedded PIC or mips16 code we want to put the jump
2670 table in the .text section. In all other cases, we want to put the
2671 jump table in the .rdata section. Unfortunately, we can't use
2672 JUMP_TABLES_IN_TEXT_SECTION, because it is not conditional.
2673 Instead, we use ASM_OUTPUT_CASE_LABEL to switch back to the .text
2674 section if appropriate. */
2676 #undef ASM_OUTPUT_CASE_LABEL
2677 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
2680 function_section (current_function_decl); \
2681 (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM); \
2685 /* Assembler Commands for Exception Regions. */
2687 /* Define this macro to 0 if your target supports DWARF 2 frame unwind
2688 information, but it does not yet work with exception handling. Otherwise,
2689 if your target supports this information (if it defines
2690 `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or
2691 `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1.
2693 If this macro is defined to 1, the DWARF 2 unwinder will be the default
2694 exception handling mechanism; otherwise, setjmp/longjmp will be used by
2697 If this macro is defined to anything, the DWARF 2 unwinder will be used
2698 instead of inline unwinders and __unwind_function in the non-setjmp case. */
2699 #define DWARF2_UNWIND_INFO 1
2701 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO)
2703 /* Assembler Commands for Alignment. */
2705 /* A C statement to output to the stdio stream STREAM an assembler instruction
2706 to advance the location counter by NBYTES bytes. Those bytes should be zero
2707 when loaded. NBYTES will be a C expression of type `int'.
2709 Defined in svr4.h. */
2710 #undef ASM_OUTPUT_SKIP
2711 #define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
2712 fprintf (STREAM, "\t.zero\t%u\n", (int)(NBYTES))
2714 /* A C statement to output to the stdio stream STREAM an assembler command to
2715 advance the location counter to a multiple of 2 to the POWER bytes. POWER
2716 will be a C expression of type `int'. */
2717 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
2718 fprintf ((STREAM), "\t.p2align %d\n", (POWER))
2720 /* Inside the text section, align with unpacked nops rather than zeros. */
2721 #define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, POWER) \
2722 fprintf ((STREAM), "\t.p2alignl %d,0x80880000\n", (POWER))
2724 /* Macros Affecting all Debug Formats. */
2726 /* A C expression that returns the DBX register number for the compiler
2727 register number REGNO. In simple cases, the value of this expression may be
2728 REGNO itself. But sometimes there are some registers that the compiler
2729 knows about and DBX does not, or vice versa. In such cases, some register
2730 may need to have one number in the compiler and another for DBX.
2732 If two registers have consecutive numbers inside GCC, and they can be
2733 used as a pair to hold a multiword value, then they *must* have consecutive
2734 numbers after renumbering with `DBX_REGISTER_NUMBER'. Otherwise, debuggers
2735 will be unable to access such a pair, because they expect register pairs to
2736 be consecutive in their own numbering scheme.
2738 If you find yourself defining `DBX_REGISTER_NUMBER' in way that does not
2739 preserve register pairs, then what you must do instead is redefine the
2740 actual register numbering scheme.
2742 This declaration is required. */
2743 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
2745 /* A C expression that returns the type of debugging output GCC produces
2746 when the user specifies `-g' or `-ggdb'. Define this if you have arranged
2747 for GCC to support more than one format of debugging output. Currently,
2748 the allowable values are `DBX_DEBUG', `SDB_DEBUG', `DWARF_DEBUG',
2749 `DWARF2_DEBUG', and `XCOFF_DEBUG'.
2751 The value of this macro only affects the default debugging output; the user
2752 can always get a specific type of output by using `-gstabs', `-gcoff',
2753 `-gdwarf-1', `-gdwarf-2', or `-gxcoff'.
2755 Defined in svr4.h. */
2756 #undef PREFERRED_DEBUGGING_TYPE
2757 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
2759 /* Miscellaneous Parameters. */
2761 /* Define this if you have defined special-purpose predicates in the file
2762 `MACHINE.c'. This macro is called within an initializer of an array of
2763 structures. The first field in the structure is the name of a predicate and
2764 the second field is an array of rtl codes. For each predicate, list all rtl
2765 codes that can be in expressions matched by the predicate. The list should
2766 have a trailing comma. Here is an example of two entries in the list for a
2767 typical RISC machine:
2769 #define PREDICATE_CODES \
2770 {"gen_reg_rtx_operand", {SUBREG, REG}}, \
2771 {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
2773 Defining this macro does not affect the generated code (however, incorrect
2774 definitions that omit an rtl code that may be matched by the predicate can
2775 cause the compiler to malfunction). Instead, it allows the table built by
2776 `genrecog' to be more compact and efficient, thus speeding up the compiler.
2777 The most important predicates to include in the list specified by this macro
2778 are thoses used in the most insn patterns. */
2779 #define PREDICATE_CODES \
2780 { "integer_register_operand", { REG, SUBREG }}, \
2781 { "frv_load_operand", { REG, SUBREG, MEM }}, \
2782 { "gpr_no_subreg_operand", { REG }}, \
2783 { "gpr_or_fpr_operand", { REG, SUBREG }}, \
2784 { "gpr_or_int12_operand", { REG, SUBREG, CONST_INT }}, \
2785 { "gpr_fpr_or_int12_operand", { REG, SUBREG, CONST_INT }}, \
2786 { "gpr_or_int10_operand", { REG, SUBREG, CONST_INT }}, \
2787 { "gpr_or_int_operand", { REG, SUBREG, CONST_INT }}, \
2788 { "move_source_operand", { REG, SUBREG, CONST_INT, MEM, \
2789 CONST_DOUBLE, CONST, \
2790 SYMBOL_REF, LABEL_REF }}, \
2791 { "move_destination_operand", { REG, SUBREG, MEM }}, \
2792 { "movcc_fp_destination_operand", { REG, SUBREG, MEM }}, \
2793 { "condexec_source_operand", { REG, SUBREG, CONST_INT, MEM, \
2795 { "condexec_dest_operand", { REG, SUBREG, MEM }}, \
2796 { "reg_or_0_operand", { REG, SUBREG, CONST_INT }}, \
2797 { "lr_operand", { REG }}, \
2798 { "gpr_or_memory_operand", { REG, SUBREG, MEM }}, \
2799 { "gpr_or_memory_operand_with_scratch", { REG, SUBREG, MEM }}, \
2800 { "fpr_or_memory_operand", { REG, SUBREG, MEM }}, \
2801 { "int12_operand", { CONST_INT }}, \
2802 { "int_2word_operand", { CONST_INT, CONST_DOUBLE, \
2803 SYMBOL_REF, LABEL_REF, CONST }}, \
2804 { "fdpic_operand", { REG }}, \
2805 { "fdpic_fptr_operand", { REG }}, \
2806 { "ldd_address_operand", { REG, SUBREG, PLUS }}, \
2807 { "got12_operand", { CONST }}, \
2808 { "const_unspec_operand", { CONST }}, \
2809 { "icc_operand", { REG }}, \
2810 { "fcc_operand", { REG }}, \
2811 { "cc_operand", { REG }}, \
2812 { "icr_operand", { REG }}, \
2813 { "fcr_operand", { REG }}, \
2814 { "cr_operand", { REG }}, \
2815 { "fpr_operand", { REG, SUBREG }}, \
2816 { "even_reg_operand", { REG, SUBREG }}, \
2817 { "odd_reg_operand", { REG, SUBREG }}, \
2818 { "even_gpr_operand", { REG, SUBREG }}, \
2819 { "odd_gpr_operand", { REG, SUBREG }}, \
2820 { "quad_fpr_operand", { REG, SUBREG }}, \
2821 { "even_fpr_operand", { REG, SUBREG }}, \
2822 { "odd_fpr_operand", { REG, SUBREG }}, \
2823 { "dbl_memory_one_insn_operand", { MEM }}, \
2824 { "dbl_memory_two_insn_operand", { MEM }}, \
2825 { "call_operand", { REG, SUBREG, CONST_INT, \
2826 CONST, SYMBOL_REF }}, \
2827 { "sibcall_operand", { REG, SUBREG, CONST_INT, \
2829 { "upper_int16_operand", { CONST_INT }}, \
2830 { "uint16_operand", { CONST_INT }}, \
2831 { "symbolic_operand", { SYMBOL_REF, CONST_INT }}, \
2832 { "relational_operator", { EQ, NE, LE, LT, GE, GT, \
2833 LEU, LTU, GEU, GTU }}, \
2834 { "integer_relational_operator", { EQ, NE, LE, LT, GE, GT, \
2835 LEU, LTU, GEU, GTU }}, \
2836 { "float_relational_operator", { EQ, NE, LE, LT, GE, GT }}, \
2837 { "ccr_eqne_operator", { EQ, NE }}, \
2838 { "minmax_operator", { SMIN, SMAX, UMIN, UMAX }}, \
2839 { "condexec_si_binary_operator", { PLUS, MINUS, AND, IOR, XOR, \
2840 ASHIFT, ASHIFTRT, LSHIFTRT }}, \
2841 { "condexec_si_media_operator", { AND, IOR, XOR }}, \
2842 { "condexec_si_divide_operator", { DIV, UDIV }}, \
2843 { "condexec_si_unary_operator", { NOT, NEG }}, \
2844 { "condexec_sf_add_operator", { PLUS, MINUS }}, \
2845 { "condexec_sf_conv_operator", { ABS, NEG }}, \
2846 { "intop_compare_operator", { PLUS, MINUS, AND, IOR, XOR, \
2847 ASHIFT, ASHIFTRT, LSHIFTRT }}, \
2848 { "fpr_or_int6_operand", { REG, SUBREG, CONST_INT }}, \
2849 { "int6_operand", { CONST_INT }}, \
2850 { "int5_operand", { CONST_INT }}, \
2851 { "uint5_operand", { CONST_INT }}, \
2852 { "uint4_operand", { CONST_INT }}, \
2853 { "uint1_operand", { CONST_INT }}, \
2854 { "acc_operand", { REG, SUBREG }}, \
2855 { "even_acc_operand", { REG, SUBREG }}, \
2856 { "quad_acc_operand", { REG, SUBREG }}, \
2857 { "accg_operand", { REG, SUBREG }},
2859 /* An alias for a machine mode name. This is the machine mode that elements of
2860 a jump-table should have. */
2861 #define CASE_VECTOR_MODE SImode
2863 /* Define this macro if operations between registers with integral mode smaller
2864 than a word are always performed on the entire register. Most RISC machines
2865 have this property and most CISC machines do not. */
2866 #define WORD_REGISTER_OPERATIONS
2868 /* Define this macro to be a C expression indicating when insns that read
2869 memory in MODE, an integral mode narrower than a word, set the bits outside
2870 of MODE to be either the sign-extension or the zero-extension of the data
2871 read. Return `SIGN_EXTEND' for values of MODE for which the insn
2872 sign-extends, `ZERO_EXTEND' for which it zero-extends, and `UNKNOWN' for other
2875 This macro is not called with MODE non-integral or with a width greater than
2876 or equal to `BITS_PER_WORD', so you may return any value in this case. Do
2877 not define this macro if it would always return `UNKNOWN'. On machines where
2878 this macro is defined, you will normally define it as the constant
2879 `SIGN_EXTEND' or `ZERO_EXTEND'. */
2880 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
2882 /* Define if loading short immediate values into registers sign extends. */
2883 #define SHORT_IMMEDIATES_SIGN_EXTEND
2885 /* The maximum number of bytes that a single instruction can move quickly from
2886 memory to memory. */
2889 /* A C expression which is nonzero if on this machine it is safe to "convert"
2890 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
2891 than INPREC) by merely operating on it as if it had only OUTPREC bits.
2893 On many machines, this expression can be 1.
2895 When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for modes for
2896 which `MODES_TIEABLE_P' is 0, suboptimal code can result. If this is the
2897 case, making `TRULY_NOOP_TRUNCATION' return 0 in such cases may improve
2899 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2901 /* An alias for the machine mode for pointers. On most machines, define this
2902 to be the integer mode corresponding to the width of a hardware pointer;
2903 `SImode' on 32-bit machine or `DImode' on 64-bit machines. On some machines
2904 you must define this to be one of the partial integer modes, such as
2907 The width of `Pmode' must be at least as large as the value of
2908 `POINTER_SIZE'. If it is not equal, you must define the macro
2909 `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to `Pmode'. */
2910 #define Pmode SImode
2912 /* An alias for the machine mode used for memory references to functions being
2913 called, in `call' RTL expressions. On most machines this should be
2915 #define FUNCTION_MODE QImode
2917 /* Define this macro to handle System V style pragmas: #pragma pack and
2918 #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is
2921 Defined in svr4.h. */
2922 #define HANDLE_SYSV_PRAGMA 1
2924 /* A C expression for the maximum number of instructions to execute via
2925 conditional execution instructions instead of a branch. A value of
2926 BRANCH_COST+1 is the default if the machine does not use
2927 cc0, and 1 if it does use cc0. */
2928 #define MAX_CONDITIONAL_EXECUTE frv_condexec_insns
2930 /* A C expression to modify the code described by the conditional if
2931 information CE_INFO, possibly updating the tests in TRUE_EXPR, and
2932 FALSE_EXPR for converting if-then and if-then-else code to conditional
2933 instructions. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if the
2934 tests cannot be converted. */
2935 #define IFCVT_MODIFY_TESTS(CE_INFO, TRUE_EXPR, FALSE_EXPR) \
2936 frv_ifcvt_modify_tests (CE_INFO, &TRUE_EXPR, &FALSE_EXPR)
2938 /* A C expression to modify the code described by the conditional if
2939 information CE_INFO, for the basic block BB, possibly updating the tests in
2940 TRUE_EXPR, and FALSE_EXPR for converting the && and || parts of if-then or
2941 if-then-else code to conditional instructions. OLD_TRUE and OLD_FALSE are
2942 the previous tests. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if
2943 the tests cannot be converted. */
2944 #define IFCVT_MODIFY_MULTIPLE_TESTS(CE_INFO, BB, TRUE_EXPR, FALSE_EXPR) \
2945 frv_ifcvt_modify_multiple_tests (CE_INFO, BB, &TRUE_EXPR, &FALSE_EXPR)
2947 /* A C expression to modify the code described by the conditional if
2948 information CE_INFO with the new PATTERN in INSN. If PATTERN is a null
2949 pointer after the IFCVT_MODIFY_INSN macro executes, it is assumed that that
2950 insn cannot be converted to be executed conditionally. */
2951 #define IFCVT_MODIFY_INSN(CE_INFO, PATTERN, INSN) \
2952 (PATTERN) = frv_ifcvt_modify_insn (CE_INFO, PATTERN, INSN)
2954 /* A C expression to perform any final machine dependent modifications in
2955 converting code to conditional execution in the code described by the
2956 conditional if information CE_INFO. */
2957 #define IFCVT_MODIFY_FINAL(CE_INFO) frv_ifcvt_modify_final (CE_INFO)
2959 /* A C expression to cancel any machine dependent modifications in converting
2960 code to conditional execution in the code described by the conditional if
2961 information CE_INFO. */
2962 #define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO)
2964 /* Initialize the extra fields provided by IFCVT_EXTRA_FIELDS. */
2965 #define IFCVT_INIT_EXTRA_FIELDS(CE_INFO) frv_ifcvt_init_extra_fields (CE_INFO)
2967 /* The definition of the following macro results in that the 2nd jump
2968 optimization (after the 2nd insn scheduling) is minimal. It is
2969 necessary to define when start cycle marks of insns (TImode is used
2970 for this) is used for VLIW insn packing. Some jump optimizations
2971 make such marks invalid. These marks are corrected for some
2972 (minimal) optimizations. ??? Probably the macro is temporary.
2973 Final solution could making the 2nd jump optimizations before the
2974 2nd instruction scheduling or corrections of the marks for all jump
2975 optimizations. Although some jump optimizations are actually
2976 deoptimizations for VLIW (super-scalar) processors. */
2978 #define MINIMAL_SECOND_JUMP_OPTIMIZATION
2981 /* If the following macro is defined and nonzero and deterministic
2982 finite state automata are used for pipeline hazard recognition, the
2983 code making resource-constrained software pipelining is on. */
2984 #define RCSP_SOFTWARE_PIPELINING 1
2986 /* If the following macro is defined and nonzero and deterministic
2987 finite state automata are used for pipeline hazard recognition, we
2988 will try to exchange insns in queue ready to improve the schedule.
2989 The more macro value, the more tries will be made. */
2990 #define FIRST_CYCLE_MULTIPASS_SCHEDULING 1
2992 /* The following macro is used only when value of
2993 FIRST_CYCLE_MULTIPASS_SCHEDULING is nonzero. The more macro value,
2994 the more tries will be made to choose better schedule. If the
2995 macro value is zero or negative there will be no multi-pass
2997 #define FIRST_CYCLE_MULTIPASS_SCHEDULING_LOOKAHEAD frv_sched_lookahead
3008 FRV_BUILTIN_MADDHSS,
3009 FRV_BUILTIN_MADDHUS,
3010 FRV_BUILTIN_MSUBHSS,
3011 FRV_BUILTIN_MSUBHUS,
3013 FRV_BUILTIN_MQADDHSS,
3014 FRV_BUILTIN_MQADDHUS,
3015 FRV_BUILTIN_MQSUBHSS,
3016 FRV_BUILTIN_MQSUBHUS,
3017 FRV_BUILTIN_MUNPACKH,
3018 FRV_BUILTIN_MDPACKH,
3029 FRV_BUILTIN_MEXPDHW,
3030 FRV_BUILTIN_MEXPDHD,
3033 FRV_BUILTIN_MMULXHS,
3034 FRV_BUILTIN_MMULXHU,
3039 FRV_BUILTIN_MQMULHS,
3040 FRV_BUILTIN_MQMULHU,
3041 FRV_BUILTIN_MQMULXHU,
3042 FRV_BUILTIN_MQMULXHS,
3043 FRV_BUILTIN_MQMACHS,
3044 FRV_BUILTIN_MQMACHU,
3049 FRV_BUILTIN_MQCPXRS,
3050 FRV_BUILTIN_MQCPXRU,
3051 FRV_BUILTIN_MQCPXIS,
3052 FRV_BUILTIN_MQCPXIU,
3056 FRV_BUILTIN_MWTACCG,
3058 FRV_BUILTIN_MRDACCG,
3060 FRV_BUILTIN_MCLRACC,
3061 FRV_BUILTIN_MCLRACCA,
3062 FRV_BUILTIN_MDUNPACKH,
3064 FRV_BUILTIN_MQXMACHS,
3065 FRV_BUILTIN_MQXMACXHS,
3066 FRV_BUILTIN_MQMACXHS,
3067 FRV_BUILTIN_MADDACCS,
3068 FRV_BUILTIN_MSUBACCS,
3069 FRV_BUILTIN_MASACCS,
3070 FRV_BUILTIN_MDADDACCS,
3071 FRV_BUILTIN_MDSUBACCS,
3072 FRV_BUILTIN_MDASACCS,
3074 FRV_BUILTIN_MDROTLI,
3077 FRV_BUILTIN_MDCUTSSI,
3078 FRV_BUILTIN_MQSATHS,
3079 FRV_BUILTIN_MQLCLRHS,
3080 FRV_BUILTIN_MQLMTHS,
3081 FRV_BUILTIN_MQSLLHI,
3082 FRV_BUILTIN_MQSRAHI,
3083 FRV_BUILTIN_MHSETLOS,
3084 FRV_BUILTIN_MHSETLOH,
3085 FRV_BUILTIN_MHSETHIS,
3086 FRV_BUILTIN_MHSETHIH,
3087 FRV_BUILTIN_MHDSETS,
3088 FRV_BUILTIN_MHDSETH,
3091 FRV_BUILTIN_PREFETCH0,
3092 FRV_BUILTIN_PREFETCH,
3100 FRV_BUILTIN_IACCreadll,
3101 FRV_BUILTIN_IACCreadl,
3102 FRV_BUILTIN_IACCsetll,
3103 FRV_BUILTIN_IACCsetl,
3106 #define FRV_BUILTIN_FIRST_NONMEDIA FRV_BUILTIN_SMUL
3108 /* Enable prototypes on the call rtl functions. */
3109 #define MD_CALL_PROTOTYPES 1
3111 extern GTY(()) rtx frv_compare_op0; /* operand save for */
3112 extern GTY(()) rtx frv_compare_op1; /* comparison generation */
3114 #define CPU_UNITS_QUERY 1
3116 #ifdef __FRV_FDPIC__
3117 #define CRT_GET_RFIB_DATA(dbase) \
3118 ({ extern void *_GLOBAL_OFFSET_TABLE_; (dbase) = &_GLOBAL_OFFSET_TABLE_; })
3121 #endif /* __FRV_H__ */