1 /* Target macros for the FRV port of GCC.
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009,
4 Free Software Foundation, Inc.
5 Contributed by Red Hat Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it
10 under the terms of the GNU General Public License as published
11 by the Free Software Foundation; either version 3, or (at your
12 option) any later version.
14 GCC is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
26 /* Frv general purpose macros. */
27 /* Align an address. */
28 #define ADDR_ALIGN(addr,align) (((addr) + (align) - 1) & ~((align) - 1))
30 /* Return true if a value is inside a range. */
31 #define IN_RANGE_P(VALUE, LOW, HIGH) \
32 ( (((HOST_WIDE_INT)(VALUE)) >= (HOST_WIDE_INT)(LOW)) \
33 && (((HOST_WIDE_INT)(VALUE)) <= ((HOST_WIDE_INT)(HIGH))))
36 /* Driver configuration. */
38 /* A C expression which determines whether the option `-CHAR' takes arguments.
39 The value should be the number of arguments that option takes-zero, for many
42 By default, this macro is defined to handle the standard options properly.
43 You need not define it unless you wish to add additional options which take
47 #undef SWITCH_TAKES_ARG
48 #define SWITCH_TAKES_ARG(CHAR) \
49 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
51 /* A C expression which determines whether the option `-NAME' takes arguments.
52 The value should be the number of arguments that option takes-zero, for many
53 options. This macro rather than `SWITCH_TAKES_ARG' is used for
54 multi-character option names.
56 By default, this macro is defined as `DEFAULT_WORD_SWITCH_TAKES_ARG', which
57 handles the standard options properly. You need not define
58 `WORD_SWITCH_TAKES_ARG' unless you wish to add additional options which take
59 arguments. Any redefinition should call `DEFAULT_WORD_SWITCH_TAKES_ARG' and
60 then check for additional options.
63 #undef WORD_SWITCH_TAKES_ARG
65 /* -fpic and -fPIC used to imply the -mlibrary-pic multilib, but with
66 FDPIC which multilib to use depends on whether FDPIC is in use or
67 not. The trick we use is to introduce -multilib-library-pic as a
68 pseudo-flag that selects the library-pic multilib, and map fpic
69 and fPIC to it only if fdpic is not selected. Also, if fdpic is
70 selected and no PIC/PIE options are present, we imply -fPIE.
71 Otherwise, if -fpic or -fPIC are enabled and we're optimizing for
72 speed, or if we have -On with n>=3, enable inlining of PLTs. As
73 for -mgprel-ro, we want to enable it by default, but not for -fpic or
76 #define DRIVER_SELF_SPECS SUBTARGET_DRIVER_SELF_SPECS \
78 %{!mhard-float:-msoft-float}\
79 %{!mmedia:-mno-media}}\
80 %{!mfdpic:%{fpic|fPIC: -multilib-library-pic}}\
81 %{mfdpic:%{!fpic:%{!fpie:%{!fPIC:%{!fPIE:\
82 %{!fno-pic:%{!fno-pie:%{!fno-PIC:%{!fno-PIE:-fPIE}}}}}}}} \
83 %{!mno-inline-plt:%{O*:%{!O0:%{!Os:%{fpic|fPIC:-minline-plt} \
84 %{!fpic:%{!fPIC:%{!O:%{!O1:%{!O2:-minline-plt}}}}}}}}} \
85 %{!mno-gprel-ro:%{!fpic:%{!fpie:-mgprel-ro}}}} \
87 #ifndef SUBTARGET_DRIVER_SELF_SPECS
88 # define SUBTARGET_DRIVER_SELF_SPECS
91 /* A C string constant that tells the GCC driver program options to pass to
92 the assembler. It can also specify how to translate options you give to GNU
93 CC into options for GCC to pass to the assembler. See the file `sun3.h'
94 for an example of this.
96 Do not define this macro if it does not need to do anything.
101 %{G*} %{v} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \
105 %{mgpr-*} %{mfpr-*} \
106 %{msoft-float} %{mhard-float} \
107 %{mdword} %{mno-dword} \
108 %{mdouble} %{mno-double} \
109 %{mmedia} %{mno-media} \
110 %{mmuladd} %{mno-muladd} \
111 %{mpack} %{mno-pack} \
112 %{mno-fdpic:-mnopic} %{mfdpic} \
113 %{fpic|fpie: -mpic} %{fPIC|fPIE: -mPIC} %{mlibrary-pic}}"
115 /* Another C string constant used much like `LINK_SPEC'. The difference
116 between the two is that `STARTFILE_SPEC' is used at the very beginning of
117 the command given to the linker.
119 If this macro is not defined, a default is provided that loads the standard
120 C startup file from the usual place. See `gcc.c'.
122 Defined in svr4.h. */
123 #undef STARTFILE_SPEC
124 #define STARTFILE_SPEC "crt0%O%s frvbegin%O%s"
126 /* Another C string constant used much like `LINK_SPEC'. The difference
127 between the two is that `ENDFILE_SPEC' is used at the very end of the
128 command given to the linker.
130 Do not define this macro if it does not need to do anything.
132 Defined in svr4.h. */
134 #define ENDFILE_SPEC "frvend%O%s"
137 #define MASK_DEFAULT_FRV \
144 #define MASK_DEFAULT_FR500 \
145 (MASK_MEDIA | MASK_DWORD | MASK_PACK)
147 #define MASK_DEFAULT_FR550 \
148 (MASK_MEDIA | MASK_DWORD | MASK_PACK)
150 #define MASK_DEFAULT_FR450 \
158 #define MASK_DEFAULT_FR400 \
167 #define MASK_DEFAULT_SIMPLE \
168 (MASK_GPR_32 | MASK_SOFT_FLOAT)
170 /* A C string constant that tells the GCC driver program options to pass to
171 `cc1'. It can also specify how to translate options you give to GCC into
172 options for GCC to pass to the `cc1'.
174 Do not define this macro if it does not need to do anything. */
175 /* For ABI compliance, we need to put bss data into the normal data section. */
176 #define CC1_SPEC "%{G*}"
178 /* A C string constant that tells the GCC driver program options to pass to
179 the linker. It can also specify how to translate options you give to GCC
180 into options for GCC to pass to the linker.
182 Do not define this macro if it does not need to do anything.
184 Defined in svr4.h. */
185 /* Override the svr4.h version with one that dispenses without the svr4
186 shared library options, notably -G. */
191 %{mfdpic:-melf32frvfd -z text} \
192 %{static:-dn -Bstatic} \
193 %{shared:-Bdynamic} \
194 %{symbolic:-Bsymbolic} \
199 /* Another C string constant used much like `LINK_SPEC'. The difference
200 between the two is that `LIB_SPEC' is used at the end of the command given
203 If this macro is not defined, a default is provided that loads the standard
204 C library from the usual place. See `gcc.c'.
206 Defined in svr4.h. */
209 #define LIB_SPEC "--start-group -lc -lsim --end-group"
212 #define CPU_TYPE FRV_CPU_FR500
215 /* Run-time target specifications */
217 #define TARGET_CPU_CPP_BUILTINS() \
222 builtin_define ("__frv__"); \
223 builtin_assert ("machine=frv"); \
225 issue_rate = frv_issue_rate (); \
226 if (issue_rate > 1) \
227 builtin_define_with_int_value ("__FRV_VLIW__", issue_rate); \
228 builtin_define_with_int_value ("__FRV_GPR__", NUM_GPRS); \
229 builtin_define_with_int_value ("__FRV_FPR__", NUM_FPRS); \
230 builtin_define_with_int_value ("__FRV_ACC__", NUM_ACCS); \
232 switch (frv_cpu_type) \
234 case FRV_CPU_GENERIC: \
235 builtin_define ("__CPU_GENERIC__"); \
237 case FRV_CPU_FR550: \
238 builtin_define ("__CPU_FR550__"); \
240 case FRV_CPU_FR500: \
241 case FRV_CPU_TOMCAT: \
242 builtin_define ("__CPU_FR500__"); \
244 case FRV_CPU_FR450: \
245 builtin_define ("__CPU_FR450__"); \
247 case FRV_CPU_FR405: \
248 builtin_define ("__CPU_FR405__"); \
250 case FRV_CPU_FR400: \
251 builtin_define ("__CPU_FR400__"); \
253 case FRV_CPU_FR300: \
254 case FRV_CPU_SIMPLE: \
255 builtin_define ("__CPU_FR300__"); \
259 if (TARGET_HARD_FLOAT) \
260 builtin_define ("__FRV_HARD_FLOAT__"); \
262 builtin_define ("__FRV_DWORD__"); \
264 builtin_define ("__FRV_FDPIC__"); \
265 if (flag_leading_underscore > 0) \
266 builtin_define ("__FRV_UNDERSCORE__"); \
271 #define TARGET_HAS_FPRS (TARGET_HARD_FLOAT || TARGET_MEDIA)
273 #define NUM_GPRS (TARGET_GPR_32? 32 : 64)
274 #define NUM_FPRS (!TARGET_HAS_FPRS? 0 : TARGET_FPR_32? 32 : 64)
275 #define NUM_ACCS (!TARGET_MEDIA? 0 : TARGET_ACC_4? 4 : 8)
277 /* X is a valid accumulator number if (X & ACC_MASK) == X. */
281 : frv_cpu_type == FRV_CPU_FR450 ? 11 \
284 /* Macros to identify the blend of media instructions available. Revision 1
285 is the one found on the FR500. Revision 2 includes the changes made for
288 Treat the generic processor as a revision 1 machine for now, for
289 compatibility with earlier releases. */
291 #define TARGET_MEDIA_REV1 \
293 && (frv_cpu_type == FRV_CPU_GENERIC \
294 || frv_cpu_type == FRV_CPU_FR500))
296 #define TARGET_MEDIA_REV2 \
298 && (frv_cpu_type == FRV_CPU_FR400 \
299 || frv_cpu_type == FRV_CPU_FR405 \
300 || frv_cpu_type == FRV_CPU_FR450 \
301 || frv_cpu_type == FRV_CPU_FR550))
303 #define TARGET_MEDIA_FR450 \
304 (frv_cpu_type == FRV_CPU_FR450)
306 #define TARGET_FR500_FR550_BUILTINS \
307 (frv_cpu_type == FRV_CPU_FR500 \
308 || frv_cpu_type == FRV_CPU_FR550)
310 #define TARGET_FR405_BUILTINS \
311 (frv_cpu_type == FRV_CPU_FR405 \
312 || frv_cpu_type == FRV_CPU_FR450)
315 #define HAVE_AS_TLS 0
318 /* This macro is a C statement to print on `stderr' a string describing the
319 particular machine description choice. Every machine description should
320 define `TARGET_VERSION'. For example:
323 #define TARGET_VERSION \
324 fprintf (stderr, " (68k, Motorola syntax)");
326 #define TARGET_VERSION \
327 fprintf (stderr, " (68k, MIT syntax)");
329 #define TARGET_VERSION fprintf (stderr, _(" (frv)"))
331 /* Define this macro if debugging can be performed even without a frame
332 pointer. If this macro is defined, GCC will turn on the
333 `-fomit-frame-pointer' option whenever `-O' is specified. */
334 /* Frv needs a specific frame layout that includes the frame pointer. */
336 #define CAN_DEBUG_WITHOUT_FP
338 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (TARGET_ALIGN_LABELS ? 3 : 0)
340 /* Small Data Area Support. */
341 /* Maximum size of variables that go in .sdata/.sbss.
342 The -msdata=foo switch also controls how small variables are handled. */
343 #ifndef SDATA_DEFAULT_SIZE
344 #define SDATA_DEFAULT_SIZE 8
350 /* Define this macro to have the value 1 if the most significant bit in a byte
351 has the lowest number; otherwise define it to have the value zero. This
352 means that bit-field instructions count from the most significant bit. If
353 the machine has no bit-field instructions, then this must still be defined,
354 but it doesn't matter which value it is defined to. This macro need not be
357 This macro does not affect the way structure fields are packed into bytes or
358 words; that is controlled by `BYTES_BIG_ENDIAN'. */
359 #define BITS_BIG_ENDIAN 1
361 /* Define this macro to have the value 1 if the most significant byte in a word
362 has the lowest number. This macro need not be a constant. */
363 #define BYTES_BIG_ENDIAN 1
365 /* Define this macro to have the value 1 if, in a multiword object, the most
366 significant word has the lowest number. This applies to both memory
367 locations and registers; GCC fundamentally assumes that the order of
368 words in memory is the same as the order in registers. This macro need not
370 #define WORDS_BIG_ENDIAN 1
372 /* Number of storage units in a word; normally 4. */
373 #define UNITS_PER_WORD 4
375 /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and
376 which has the specified mode and signedness is to be stored in a register.
377 This macro is only called when TYPE is a scalar type.
379 On most RISC machines, which only have operations that operate on a full
380 register, define this macro to set M to `word_mode' if M is an integer mode
381 narrower than `BITS_PER_WORD'. In most cases, only integer modes should be
382 widened because wider-precision floating-point operations are usually more
383 expensive than their narrower counterparts.
385 For most machines, the macro definition does not change UNSIGNEDP. However,
386 some machines, have instructions that preferentially handle either signed or
387 unsigned quantities of certain modes. For example, on the DEC Alpha, 32-bit
388 loads from memory and 32-bit add instructions sign-extend the result to 64
389 bits. On such machines, set UNSIGNEDP according to which kind of extension
392 Do not define this macro if it would never modify MODE. */
393 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
396 if (GET_MODE_CLASS (MODE) == MODE_INT \
397 && GET_MODE_SIZE (MODE) < 4) \
402 /* Normal alignment required for function parameters on the stack, in bits.
403 All stack parameters receive at least this much alignment regardless of data
404 type. On most machines, this is the same as the size of an integer. */
405 #define PARM_BOUNDARY 32
407 /* Define this macro if you wish to preserve a certain alignment for the stack
408 pointer. The definition is a C expression for the desired alignment
411 If `PUSH_ROUNDING' is not defined, the stack will always be aligned to the
412 specified boundary. If `PUSH_ROUNDING' is defined and specifies a less
413 strict alignment than `STACK_BOUNDARY', the stack may be momentarily
414 unaligned while pushing arguments. */
415 #define STACK_BOUNDARY 64
417 /* Alignment required for a function entry point, in bits. */
418 #define FUNCTION_BOUNDARY 128
420 /* Biggest alignment that any data type can require on this machine,
422 #define BIGGEST_ALIGNMENT 64
424 /* @@@ A hack, needed because libobjc wants to use ADJUST_FIELD_ALIGN for
426 #ifdef IN_TARGET_LIBS
427 #define BIGGEST_FIELD_ALIGNMENT 64
429 /* An expression for the alignment of a structure field FIELD if the
430 alignment computed in the usual way is COMPUTED. GCC uses this
431 value instead of the value in `BIGGEST_ALIGNMENT' or
432 `BIGGEST_FIELD_ALIGNMENT', if defined, for structure fields only. */
433 #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
434 frv_adjust_field_align (FIELD, COMPUTED)
437 /* If defined, a C expression to compute the alignment for a static variable.
438 TYPE is the data type, and ALIGN is the alignment that the object
439 would ordinarily have. The value of this macro is used instead of that
440 alignment to align the object.
442 If this macro is not defined, then ALIGN is used.
444 One use of this macro is to increase alignment of medium-size data to make
445 it all fit in fewer cache lines. Another is to cause character arrays to be
446 word-aligned so that `strcpy' calls that copy constants to character arrays
447 can be done inline. */
448 #define DATA_ALIGNMENT(TYPE, ALIGN) \
449 (TREE_CODE (TYPE) == ARRAY_TYPE \
450 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
451 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
453 /* If defined, a C expression to compute the alignment given to a constant that
454 is being placed in memory. CONSTANT is the constant and ALIGN is the
455 alignment that the object would ordinarily have. The value of this macro is
456 used instead of that alignment to align the object.
458 If this macro is not defined, then ALIGN is used.
460 The typical use of this macro is to increase alignment for string constants
461 to be word aligned so that `strcpy' calls that copy constants can be done
463 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
464 (TREE_CODE (EXP) == STRING_CST \
465 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
467 /* Define this macro to be the value 1 if instructions will fail to work if
468 given data not on the nominal alignment. If instructions will merely go
469 slower in that case, define this macro as 0. */
470 #define STRICT_ALIGNMENT 1
472 /* Define this if you wish to imitate the way many other C compilers handle
473 alignment of bitfields and the structures that contain them.
475 The behavior is that the type written for a bit-field (`int', `short', or
476 other integer type) imposes an alignment for the entire structure, as if the
477 structure really did contain an ordinary field of that type. In addition,
478 the bit-field is placed within the structure so that it would fit within such
479 a field, not crossing a boundary for it.
481 Thus, on most machines, a bit-field whose type is written as `int' would not
482 cross a four-byte boundary, and would force four-byte alignment for the
483 whole structure. (The alignment used may not be four bytes; it is
484 controlled by the other alignment parameters.)
486 If the macro is defined, its definition should be a C expression; a nonzero
487 value for the expression enables this behavior.
489 Note that if this macro is not defined, or its value is zero, some bitfields
490 may cross more than one alignment boundary. The compiler can support such
491 references if there are `insv', `extv', and `extzv' insns that can directly
494 The other known way of making bitfields work is to define
495 `STRUCTURE_SIZE_BOUNDARY' as large as `BIGGEST_ALIGNMENT'. Then every
496 structure can be accessed with fullwords.
498 Unless the machine has bit-field instructions or you define
499 `STRUCTURE_SIZE_BOUNDARY' that way, you must define
500 `PCC_BITFIELD_TYPE_MATTERS' to have a nonzero value.
502 If your aim is to make GCC use the same conventions for laying out
503 bitfields as are used by another compiler, here is how to investigate what
504 the other compiler does. Compile and run this program:
522 printf ("Size of foo1 is %d\n",
523 sizeof (struct foo1));
524 printf ("Size of foo2 is %d\n",
525 sizeof (struct foo2));
529 If this prints 2 and 5, then the compiler's behavior is what you would get
530 from `PCC_BITFIELD_TYPE_MATTERS'.
532 Defined in svr4.h. */
533 #define PCC_BITFIELD_TYPE_MATTERS 1
536 /* Layout of Source Language Data Types. */
538 #define CHAR_TYPE_SIZE 8
539 #define SHORT_TYPE_SIZE 16
540 #define INT_TYPE_SIZE 32
541 #define LONG_TYPE_SIZE 32
542 #define LONG_LONG_TYPE_SIZE 64
543 #define FLOAT_TYPE_SIZE 32
544 #define DOUBLE_TYPE_SIZE 64
545 #define LONG_DOUBLE_TYPE_SIZE 64
547 /* An expression whose value is 1 or 0, according to whether the type `char'
548 should be signed or unsigned by default. The user can always override this
549 default with the options `-fsigned-char' and `-funsigned-char'. */
550 #define DEFAULT_SIGNED_CHAR 1
553 /* General purpose registers. */
554 #define GPR_FIRST 0 /* First gpr */
555 #define GPR_LAST (GPR_FIRST + 63) /* Last gpr */
556 #define GPR_R0 GPR_FIRST /* R0, constant 0 */
557 #define GPR_FP (GPR_FIRST + 2) /* Frame pointer */
558 #define GPR_SP (GPR_FIRST + 1) /* Stack pointer */
559 /* small data register */
560 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16)))
561 #define PIC_REGNO (GPR_FIRST + (TARGET_FDPIC?15:17)) /* PIC register. */
562 #define FDPIC_FPTR_REGNO (GPR_FIRST + 14) /* uClinux PIC function pointer register. */
563 #define FDPIC_REGNO (GPR_FIRST + 15) /* uClinux PIC register. */
565 #define HARD_REGNO_RENAME_OK(from,to) (TARGET_FDPIC ? ((to) != FDPIC_REG) : 1)
567 #define OUR_FDPIC_REG get_hard_reg_initial_val (SImode, FDPIC_REGNO)
569 #define FPR_FIRST 64 /* First FP reg */
570 #define FPR_LAST 127 /* Last FP reg */
572 #define GPR_TEMP_NUM frv_condexec_temps /* # gprs to reserve for temps */
574 /* We reserve the last CR and CCR in each category to be used as a reload
575 register to reload the CR/CCR registers. This is a kludge. */
576 #define CC_FIRST 128 /* First ICC/FCC reg */
577 #define CC_LAST 135 /* Last ICC/FCC reg */
578 #define ICC_FIRST (CC_FIRST + 4) /* First ICC reg */
579 #define ICC_LAST (CC_FIRST + 7) /* Last ICC reg */
580 #define ICC_TEMP (CC_FIRST + 7) /* Temporary ICC reg */
581 #define FCC_FIRST (CC_FIRST) /* First FCC reg */
582 #define FCC_LAST (CC_FIRST + 3) /* Last FCC reg */
584 /* Amount to shift a value to locate a ICC or FCC register in the CCR
585 register and shift it to the bottom 4 bits. */
586 #define CC_SHIFT_RIGHT(REGNO) (((REGNO) - CC_FIRST) << 2)
588 /* Mask to isolate a single ICC/FCC value. */
591 /* Masks to isolate the various bits in an ICC field. */
592 #define ICC_MASK_N 0x8 /* negative */
593 #define ICC_MASK_Z 0x4 /* zero */
594 #define ICC_MASK_V 0x2 /* overflow */
595 #define ICC_MASK_C 0x1 /* carry */
597 /* Mask to isolate the N/Z flags in an ICC. */
598 #define ICC_MASK_NZ (ICC_MASK_N | ICC_MASK_Z)
600 /* Mask to isolate the Z/C flags in an ICC. */
601 #define ICC_MASK_ZC (ICC_MASK_Z | ICC_MASK_C)
603 /* Masks to isolate the various bits in a FCC field. */
604 #define FCC_MASK_E 0x8 /* equal */
605 #define FCC_MASK_L 0x4 /* less than */
606 #define FCC_MASK_G 0x2 /* greater than */
607 #define FCC_MASK_U 0x1 /* unordered */
609 /* For CCR registers, the machine wants CR4..CR7 to be used for integer
610 code and CR0..CR3 to be used for floating point. */
611 #define CR_FIRST 136 /* First CCR */
612 #define CR_LAST 143 /* Last CCR */
613 #define CR_NUM (CR_LAST-CR_FIRST+1) /* # of CCRs (8) */
614 #define ICR_FIRST (CR_FIRST + 4) /* First integer CCR */
615 #define ICR_LAST (CR_FIRST + 7) /* Last integer CCR */
616 #define ICR_TEMP ICR_LAST /* Temp integer CCR */
617 #define FCR_FIRST (CR_FIRST + 0) /* First float CCR */
618 #define FCR_LAST (CR_FIRST + 3) /* Last float CCR */
620 /* Amount to shift a value to locate a CR register in the CCCR special purpose
621 register and shift it to the bottom 2 bits. */
622 #define CR_SHIFT_RIGHT(REGNO) (((REGNO) - CR_FIRST) << 1)
624 /* Mask to isolate a single CR value. */
627 #define ACC_FIRST 144 /* First acc register */
628 #define ACC_LAST 155 /* Last acc register */
630 #define ACCG_FIRST 156 /* First accg register */
631 #define ACCG_LAST 167 /* Last accg register */
633 #define AP_FIRST 168 /* fake argument pointer */
635 #define SPR_FIRST 169
637 #define LR_REGNO (SPR_FIRST)
638 #define LCR_REGNO (SPR_FIRST + 1)
639 #define IACC_FIRST (SPR_FIRST + 2)
640 #define IACC_LAST (SPR_FIRST + 3)
642 #define GPR_P(R) IN_RANGE_P (R, GPR_FIRST, GPR_LAST)
643 #define GPR_OR_AP_P(R) (GPR_P (R) || (R) == ARG_POINTER_REGNUM)
644 #define FPR_P(R) IN_RANGE_P (R, FPR_FIRST, FPR_LAST)
645 #define CC_P(R) IN_RANGE_P (R, CC_FIRST, CC_LAST)
646 #define ICC_P(R) IN_RANGE_P (R, ICC_FIRST, ICC_LAST)
647 #define FCC_P(R) IN_RANGE_P (R, FCC_FIRST, FCC_LAST)
648 #define CR_P(R) IN_RANGE_P (R, CR_FIRST, CR_LAST)
649 #define ICR_P(R) IN_RANGE_P (R, ICR_FIRST, ICR_LAST)
650 #define FCR_P(R) IN_RANGE_P (R, FCR_FIRST, FCR_LAST)
651 #define ACC_P(R) IN_RANGE_P (R, ACC_FIRST, ACC_LAST)
652 #define ACCG_P(R) IN_RANGE_P (R, ACCG_FIRST, ACCG_LAST)
653 #define SPR_P(R) IN_RANGE_P (R, SPR_FIRST, SPR_LAST)
655 #define GPR_OR_PSEUDO_P(R) (GPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
656 #define FPR_OR_PSEUDO_P(R) (FPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
657 #define GPR_AP_OR_PSEUDO_P(R) (GPR_OR_AP_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
658 #define CC_OR_PSEUDO_P(R) (CC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
659 #define ICC_OR_PSEUDO_P(R) (ICC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
660 #define FCC_OR_PSEUDO_P(R) (FCC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
661 #define CR_OR_PSEUDO_P(R) (CR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
662 #define ICR_OR_PSEUDO_P(R) (ICR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
663 #define FCR_OR_PSEUDO_P(R) (FCR_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
664 #define ACC_OR_PSEUDO_P(R) (ACC_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
665 #define ACCG_OR_PSEUDO_P(R) (ACCG_P (R) || (R) >= FIRST_PSEUDO_REGISTER)
667 #define MAX_STACK_IMMEDIATE_OFFSET 2047
670 /* Register Basics. */
672 /* Number of hardware registers known to the compiler. They receive numbers 0
673 through `FIRST_PSEUDO_REGISTER-1'; thus, the first pseudo register's number
674 really is assigned the number `FIRST_PSEUDO_REGISTER'. */
675 #define FIRST_PSEUDO_REGISTER (SPR_LAST + 1)
677 /* The first/last register that can contain the arguments to a function. */
678 #define FIRST_ARG_REGNUM (GPR_FIRST + 8)
679 #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + FRV_NUM_ARG_REGS - 1)
681 /* Registers used by the exception handling functions. These should be
682 registers that are not otherwise used by the calling sequence. */
683 #define FIRST_EH_REGNUM 14
684 #define LAST_EH_REGNUM 15
686 /* Scratch registers used in the prologue, epilogue and thunks.
687 OFFSET_REGNO is for loading constant addends that are too big for a
688 single instruction. TEMP_REGNO is used for transferring SPRs to and from
689 the stack, and various other activities. */
690 #define OFFSET_REGNO 4
693 /* Registers used in the prologue. OLD_SP_REGNO is the old stack pointer,
694 which is sometimes used to set up the frame pointer. */
695 #define OLD_SP_REGNO 6
697 /* Registers used in the epilogue. STACKADJ_REGNO stores the exception
698 handler's stack adjustment. */
699 #define STACKADJ_REGNO 6
701 /* Registers used in thunks. JMP_REGNO is used for loading the target
705 #define EH_RETURN_DATA_REGNO(N) ((N) <= (LAST_EH_REGNUM - FIRST_EH_REGNUM)? \
706 (N) + FIRST_EH_REGNUM : INVALID_REGNUM)
707 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, STACKADJ_REGNO)
708 #define EH_RETURN_HANDLER_RTX RETURN_ADDR_RTX (0, frame_pointer_rtx)
710 #define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNO)
712 /* An initializer that says which registers are used for fixed purposes all
713 throughout the compiled code and are therefore not available for general
714 allocation. These would include the stack pointer, the frame pointer
715 (except on machines where that can be used as a general register when no
716 frame pointer is needed), the program counter on machines where that is
717 considered one of the addressable registers, and any other numbered register
720 This information is expressed as a sequence of numbers, separated by commas
721 and surrounded by braces. The Nth number is 1 if register N is fixed, 0
724 The table initialized from this macro, and the table initialized by the
725 following one, may be overridden at run time either automatically, by the
726 actions of the macro `CONDITIONAL_REGISTER_USAGE', or by the user with the
727 command options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'. */
732 gr3 -- Hidden Parameter
733 gr16 -- Small Data reserved
739 cr3 -- reserved to reload FCC registers.
740 cr7 -- reserved to reload ICC registers. */
741 #define FIXED_REGISTERS \
742 { /* Integer Registers */ \
743 1, 1, 1, 1, 0, 0, 0, 0, /* 000-007, gr0 - gr7 */ \
744 0, 0, 0, 0, 0, 0, 0, 0, /* 008-015, gr8 - gr15 */ \
745 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \
746 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \
747 0, 0, 0, 0, 0, 0, 0, 0, /* 032-039, gr32 - gr39 */ \
748 0, 0, 0, 0, 0, 0, 0, 0, /* 040-040, gr48 - gr47 */ \
749 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \
750 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \
751 /* Float Registers */ \
752 0, 0, 0, 0, 0, 0, 0, 0, /* 064-071, fr0 - fr7 */ \
753 0, 0, 0, 0, 0, 0, 0, 0, /* 072-079, fr8 - fr15 */ \
754 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \
755 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \
756 0, 0, 0, 0, 0, 0, 0, 0, /* 096-103, fr32 - fr39 */ \
757 0, 0, 0, 0, 0, 0, 0, 0, /* 104-111, fr48 - fr47 */ \
758 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \
759 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \
760 /* Condition Code Registers */ \
761 0, 0, 0, 0, /* 128-131, fcc0 - fcc3 */ \
762 0, 0, 0, 1, /* 132-135, icc0 - icc3 */ \
763 /* Conditional execution Registers (CCR) */ \
764 0, 0, 0, 0, 0, 0, 0, 1, /* 136-143, cr0 - cr7 */ \
766 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \
767 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \
768 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \
769 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \
770 /* Other registers */ \
771 1, /* 168, AP - fake arg ptr */ \
772 1, /* 169, LR - Link register*/ \
773 0, /* 170, LCR - Loop count reg*/ \
774 1, 1 /* 171-172, iacc0 */ \
777 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in
778 general) by function calls as well as for fixed registers. This macro
779 therefore identifies the registers that are not available for general
780 allocation of values that must live across function calls.
782 If a register has 0 in `CALL_USED_REGISTERS', the compiler automatically
783 saves it on function entry and restores it on function exit, if the register
784 is used within the function. */
785 #define CALL_USED_REGISTERS \
786 { /* Integer Registers */ \
787 1, 1, 1, 1, 1, 1, 1, 1, /* 000-007, gr0 - gr7 */ \
788 1, 1, 1, 1, 1, 1, 1, 1, /* 008-015, gr8 - gr15 */ \
789 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \
790 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \
791 1, 1, 1, 1, 1, 1, 1, 1, /* 032-039, gr32 - gr39 */ \
792 1, 1, 1, 1, 1, 1, 1, 1, /* 040-040, gr48 - gr47 */ \
793 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \
794 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \
795 /* Float Registers */ \
796 1, 1, 1, 1, 1, 1, 1, 1, /* 064-071, fr0 - fr7 */ \
797 1, 1, 1, 1, 1, 1, 1, 1, /* 072-079, fr8 - fr15 */ \
798 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \
799 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \
800 1, 1, 1, 1, 1, 1, 1, 1, /* 096-103, fr32 - fr39 */ \
801 1, 1, 1, 1, 1, 1, 1, 1, /* 104-111, fr48 - fr47 */ \
802 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \
803 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \
804 /* Condition Code Registers */ \
805 1, 1, 1, 1, /* 128-131, fcc0 - fcc3 */ \
806 1, 1, 1, 1, /* 132-135, icc0 - icc3 */ \
807 /* Conditional execution Registers (CCR) */ \
808 1, 1, 1, 1, 1, 1, 1, 1, /* 136-143, cr0 - cr7 */ \
810 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \
811 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \
812 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \
813 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \
814 /* Other registers */ \
815 1, /* 168, AP - fake arg ptr */ \
816 1, /* 169, LR - Link register*/ \
817 1, /* 170, LCR - Loop count reg */ \
818 1, 1 /* 171-172, iacc0 */ \
821 /* Zero or more C statements that may conditionally modify two variables
822 `fixed_regs' and `call_used_regs' (both of type `char []') after they have
823 been initialized from the two preceding macros.
825 This is necessary in case the fixed or call-clobbered registers depend on
828 You need not define this macro if it has no work to do.
830 If the usage of an entire class of registers depends on the target flags,
831 you may indicate this to GCC by using this macro to modify `fixed_regs' and
832 `call_used_regs' to 1 for each of the registers in the classes which should
833 not be used by GCC. Also define the macro `REG_CLASS_FROM_LETTER' to return
834 `NO_REGS' if it is called with a letter for a class that shouldn't be used.
836 (However, if this class is not included in `GENERAL_REGS' and all of the
837 insn patterns whose constraints permit this class are controlled by target
838 switches, then GCC will automatically avoid using these registers when the
839 target switches are opposed to them.) */
841 #define CONDITIONAL_REGISTER_USAGE frv_conditional_register_usage ()
844 /* Order of allocation of registers. */
846 /* If defined, an initializer for a vector of integers, containing the numbers
847 of hard registers in the order in which GCC should prefer to use them
848 (from most preferred to least).
850 If this macro is not defined, registers are used lowest numbered first (all
853 One use of this macro is on machines where the highest numbered registers
854 must always be saved and the save-multiple-registers instruction supports
855 only sequences of consecutive registers. On such machines, define
856 `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered
857 allocatable register first. */
859 /* On the FRV, allocate GR16 and GR17 after other saved registers so that we
860 have a better chance of allocating 2 registers at a time and can use the
861 double word load/store instructions in the prologue. */
862 #define REG_ALLOC_ORDER \
864 /* volatile registers */ \
865 GPR_FIRST + 4, GPR_FIRST + 5, GPR_FIRST + 6, GPR_FIRST + 7, \
866 GPR_FIRST + 8, GPR_FIRST + 9, GPR_FIRST + 10, GPR_FIRST + 11, \
867 GPR_FIRST + 12, GPR_FIRST + 13, GPR_FIRST + 14, GPR_FIRST + 15, \
868 GPR_FIRST + 32, GPR_FIRST + 33, GPR_FIRST + 34, GPR_FIRST + 35, \
869 GPR_FIRST + 36, GPR_FIRST + 37, GPR_FIRST + 38, GPR_FIRST + 39, \
870 GPR_FIRST + 40, GPR_FIRST + 41, GPR_FIRST + 42, GPR_FIRST + 43, \
871 GPR_FIRST + 44, GPR_FIRST + 45, GPR_FIRST + 46, GPR_FIRST + 47, \
873 FPR_FIRST + 0, FPR_FIRST + 1, FPR_FIRST + 2, FPR_FIRST + 3, \
874 FPR_FIRST + 4, FPR_FIRST + 5, FPR_FIRST + 6, FPR_FIRST + 7, \
875 FPR_FIRST + 8, FPR_FIRST + 9, FPR_FIRST + 10, FPR_FIRST + 11, \
876 FPR_FIRST + 12, FPR_FIRST + 13, FPR_FIRST + 14, FPR_FIRST + 15, \
877 FPR_FIRST + 32, FPR_FIRST + 33, FPR_FIRST + 34, FPR_FIRST + 35, \
878 FPR_FIRST + 36, FPR_FIRST + 37, FPR_FIRST + 38, FPR_FIRST + 39, \
879 FPR_FIRST + 40, FPR_FIRST + 41, FPR_FIRST + 42, FPR_FIRST + 43, \
880 FPR_FIRST + 44, FPR_FIRST + 45, FPR_FIRST + 46, FPR_FIRST + 47, \
882 ICC_FIRST + 0, ICC_FIRST + 1, ICC_FIRST + 2, ICC_FIRST + 3, \
883 FCC_FIRST + 0, FCC_FIRST + 1, FCC_FIRST + 2, FCC_FIRST + 3, \
884 CR_FIRST + 0, CR_FIRST + 1, CR_FIRST + 2, CR_FIRST + 3, \
885 CR_FIRST + 4, CR_FIRST + 5, CR_FIRST + 6, CR_FIRST + 7, \
887 /* saved registers */ \
888 GPR_FIRST + 18, GPR_FIRST + 19, \
889 GPR_FIRST + 20, GPR_FIRST + 21, GPR_FIRST + 22, GPR_FIRST + 23, \
890 GPR_FIRST + 24, GPR_FIRST + 25, GPR_FIRST + 26, GPR_FIRST + 27, \
891 GPR_FIRST + 48, GPR_FIRST + 49, GPR_FIRST + 50, GPR_FIRST + 51, \
892 GPR_FIRST + 52, GPR_FIRST + 53, GPR_FIRST + 54, GPR_FIRST + 55, \
893 GPR_FIRST + 56, GPR_FIRST + 57, GPR_FIRST + 58, GPR_FIRST + 59, \
894 GPR_FIRST + 60, GPR_FIRST + 61, GPR_FIRST + 62, GPR_FIRST + 63, \
895 GPR_FIRST + 16, GPR_FIRST + 17, \
897 FPR_FIRST + 16, FPR_FIRST + 17, FPR_FIRST + 18, FPR_FIRST + 19, \
898 FPR_FIRST + 20, FPR_FIRST + 21, FPR_FIRST + 22, FPR_FIRST + 23, \
899 FPR_FIRST + 24, FPR_FIRST + 25, FPR_FIRST + 26, FPR_FIRST + 27, \
900 FPR_FIRST + 28, FPR_FIRST + 29, FPR_FIRST + 30, FPR_FIRST + 31, \
901 FPR_FIRST + 48, FPR_FIRST + 49, FPR_FIRST + 50, FPR_FIRST + 51, \
902 FPR_FIRST + 52, FPR_FIRST + 53, FPR_FIRST + 54, FPR_FIRST + 55, \
903 FPR_FIRST + 56, FPR_FIRST + 57, FPR_FIRST + 58, FPR_FIRST + 59, \
904 FPR_FIRST + 60, FPR_FIRST + 61, FPR_FIRST + 62, FPR_FIRST + 63, \
906 /* special or fixed registers */ \
907 GPR_FIRST + 0, GPR_FIRST + 1, GPR_FIRST + 2, GPR_FIRST + 3, \
908 GPR_FIRST + 28, GPR_FIRST + 29, GPR_FIRST + 30, GPR_FIRST + 31, \
909 ACC_FIRST + 0, ACC_FIRST + 1, ACC_FIRST + 2, ACC_FIRST + 3, \
910 ACC_FIRST + 4, ACC_FIRST + 5, ACC_FIRST + 6, ACC_FIRST + 7, \
911 ACC_FIRST + 8, ACC_FIRST + 9, ACC_FIRST + 10, ACC_FIRST + 11, \
912 ACCG_FIRST + 0, ACCG_FIRST + 1, ACCG_FIRST + 2, ACCG_FIRST + 3, \
913 ACCG_FIRST + 4, ACCG_FIRST + 5, ACCG_FIRST + 6, ACCG_FIRST + 7, \
914 ACCG_FIRST + 8, ACCG_FIRST + 9, ACCG_FIRST + 10, ACCG_FIRST + 11, \
915 AP_FIRST, LR_REGNO, LCR_REGNO, \
916 IACC_FIRST + 0, IACC_FIRST + 1 \
920 /* How Values Fit in Registers. */
922 /* A C expression for the number of consecutive hard registers, starting at
923 register number REGNO, required to hold a value of mode MODE.
925 On a machine where all registers are exactly one word, a suitable definition
928 #define HARD_REGNO_NREGS(REGNO, MODE) \
929 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \
930 / UNITS_PER_WORD)) */
932 /* On the FRV, make the CC modes take 3 words in the integer registers, so that
933 we can build the appropriate instructions to properly reload the values. */
934 #define HARD_REGNO_NREGS(REGNO, MODE) frv_hard_regno_nregs (REGNO, MODE)
936 /* A C expression that is nonzero if it is permissible to store a value of mode
937 MODE in hard register number REGNO (or in several registers starting with
938 that one). For a machine where all registers are equivalent, a suitable
941 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
943 It is not necessary for this macro to check for the numbers of fixed
944 registers, because the allocation mechanism considers them to be always
947 On some machines, double-precision values must be kept in even/odd register
948 pairs. The way to implement that is to define this macro to reject odd
949 register numbers for such modes.
951 The minimum requirement for a mode to be OK in a register is that the
952 `movMODE' instruction pattern support moves between the register and any
953 other hard register for which the mode is OK; and that moving a value into
954 the register and back out not alter it.
956 Since the same instruction used to move `SImode' will work for all narrower
957 integer modes, it is not necessary on any machine for `HARD_REGNO_MODE_OK'
958 to distinguish between these modes, provided you define patterns `movhi',
959 etc., to take advantage of this. This is useful because of the interaction
960 between `HARD_REGNO_MODE_OK' and `MODES_TIEABLE_P'; it is very desirable for
961 all integer modes to be tieable.
963 Many machines have special registers for floating point arithmetic. Often
964 people assume that floating point machine modes are allowed only in floating
965 point registers. This is not true. Any registers that can hold integers
966 can safely *hold* a floating point machine mode, whether or not floating
967 arithmetic can be done on it in those registers. Integer move instructions
968 can be used to move the values.
970 On some machines, though, the converse is true: fixed-point machine modes
971 may not go in floating registers. This is true if the floating registers
972 normalize any value stored in them, because storing a non-floating value
973 there would garble it. In this case, `HARD_REGNO_MODE_OK' should reject
974 fixed-point machine modes in floating registers. But if the floating
975 registers do not automatically normalize, if you can store any bit pattern
976 in one and retrieve it unchanged without a trap, then any machine mode may
977 go in a floating register, so you can define this macro to say so.
979 The primary significance of special floating registers is rather that they
980 are the registers acceptable in floating point arithmetic instructions.
981 However, this is of no concern to `HARD_REGNO_MODE_OK'. You handle it by
982 writing the proper constraints for those instructions.
984 On some machines, the floating registers are especially slow to access, so
985 that it is better to store a value in a stack frame than in such a register
986 if floating point arithmetic is not being done. As long as the floating
987 registers are not in class `GENERAL_REGS', they will not be used unless some
988 pattern's constraint asks for one. */
989 #define HARD_REGNO_MODE_OK(REGNO, MODE) frv_hard_regno_mode_ok (REGNO, MODE)
991 /* A C expression that is nonzero if it is desirable to choose register
992 allocation so as to avoid move instructions between a value of mode MODE1
993 and a value of mode MODE2.
995 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
996 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
998 #define MODES_TIEABLE_P(MODE1, MODE2) (MODE1 == MODE2)
1000 /* Define this macro if the compiler should avoid copies to/from CCmode
1001 registers. You should only define this macro if support fo copying to/from
1002 CCmode is incomplete. */
1003 #define AVOID_CCMODE_COPIES
1006 /* Register Classes. */
1008 /* An enumeral type that must be defined with all the register class names as
1009 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
1010 register class, followed by one more enumeral value, `LIM_REG_CLASSES',
1011 which is not a register class but rather tells how many classes there are.
1013 Each register class has a number, which is the value of casting the class
1014 name to type `int'. The number serves as an index in many of the tables
1048 #define GENERAL_REGS GPR_REGS
1050 /* The number of distinct register classes, defined as follows:
1052 #define N_REG_CLASSES (int) LIM_REG_CLASSES */
1053 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
1055 /* An initializer containing the names of the register classes as C string
1056 constants. These names are used in writing some of the debugging dumps. */
1057 #define REG_CLASS_NAMES { \
1071 "FDPIC_FPTR_REGS", \
1072 "FDPIC_CALL_REGS", \
1087 /* An initializer containing the contents of the register classes, as integers
1088 which are bit masks. The Nth integer specifies the contents of class N.
1089 The way the integer MASK is interpreted is that register R is in the class
1090 if `MASK & (1 << R)' is 1.
1092 When the machine has more than 32 registers, an integer does not suffice.
1093 Then the integers are replaced by sub-initializers, braced groupings
1094 containing several integers. Each sub-initializer must be suitable as an
1095 initializer for the type `HARD_REG_SET' which is defined in
1096 `hard-reg-set.h'. */
1097 #define REG_CLASS_CONTENTS \
1098 { /* gr0-gr31 gr32-gr63 fr0-fr31 fr32-fr-63 cc/ccr/acc ap/spr */ \
1099 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* NO_REGS */\
1100 { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000f0,0x0}, /* ICC_REGS */\
1101 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000000f,0x0}, /* FCC_REGS */\
1102 { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000ff,0x0}, /* CC_REGS */\
1103 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000f000,0x0}, /* ICR_REGS */\
1104 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000f00,0x0}, /* FCR_REGS */\
1105 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000ff00,0x0}, /* CR_REGS */\
1106 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x400}, /* LCR_REGS */\
1107 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x200}, /* LR_REGS */\
1108 { 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR8_REGS */\
1109 { 0x00000200,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR9_REGS */\
1110 { 0x00000300,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR89_REGS */\
1111 { 0x00008000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_REGS */\
1112 { 0x00004000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_FPTR_REGS */\
1113 { 0x0000c000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_CALL_REGS */\
1114 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x1e00}, /* SPR_REGS */\
1115 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* QUAD_ACC */\
1116 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* EVEN_ACC */\
1117 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* ACC_REGS */\
1118 { 0x00000000,0x00000000,0x00000000,0x00000000,0xf0000000,0xff}, /* ACCG_REGS*/\
1119 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* QUAD_FPR */\
1120 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FEVEN_REG*/\
1121 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FPR_REGS */\
1122 { 0x0ffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* QUAD_REGS*/\
1123 { 0xfffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* EVEN_REGS*/\
1124 { 0xffffffff,0xffffffff,0x00000000,0x00000000,0x00000000,0x100}, /* GPR_REGS */\
1125 { 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0x1fff}, /* ALL_REGS */\
1128 /* The following macro defines cover classes for Integrated Register
1129 Allocator. Cover classes is a set of non-intersected register
1130 classes covering all hard registers used for register allocation
1131 purpose. Any move between two registers of a cover class should be
1132 cheaper than load or store of the registers. The macro value is
1133 array of register classes with LIM_REG_CLASSES used as the end
1136 #define IRA_COVER_CLASSES \
1138 GPR_REGS, FPR_REGS, ACC_REGS, ICR_REGS, FCR_REGS, ICC_REGS, FCC_REGS, \
1139 ACCG_REGS, SPR_REGS, \
1143 /* A C expression whose value is a register class containing hard register
1144 REGNO. In general there is more than one such class; choose a class which
1145 is "minimal", meaning that no smaller class also contains the register. */
1147 extern enum reg_class regno_reg_class[];
1148 #define REGNO_REG_CLASS(REGNO) regno_reg_class [REGNO]
1150 /* A macro whose definition is the name of the class to which a valid base
1151 register must belong. A base register is one used in an address which is
1152 the register value plus a displacement. */
1153 #define BASE_REG_CLASS GPR_REGS
1155 /* A macro whose definition is the name of the class to which a valid index
1156 register must belong. An index register is one used in an address where its
1157 value is either multiplied by a scale factor or added to another register
1158 (as well as added to a displacement). */
1159 #define INDEX_REG_CLASS GPR_REGS
1161 /* A C expression which defines the machine-dependent operand constraint
1162 letters for register classes. If CHAR is such a letter, the value should be
1163 the register class corresponding to it. Otherwise, the value should be
1164 `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS',
1165 will not be passed to this macro; you do not need to handle it.
1167 The following letters are unavailable, due to being used as
1172 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P'
1173 'Q', 'R', 'S', 'T', 'U'
1175 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */
1177 extern enum reg_class reg_class_from_letter[];
1178 #define REG_CLASS_FROM_LETTER(CHAR) reg_class_from_letter [(unsigned char)(CHAR)]
1180 /* A C expression which is nonzero if register number NUM is suitable for use
1181 as a base register in operand addresses. It may be either a suitable hard
1182 register or a pseudo register that has been allocated such a hard register. */
1183 #define REGNO_OK_FOR_BASE_P(NUM) \
1184 ((NUM) < FIRST_PSEUDO_REGISTER \
1186 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM])))
1188 /* A C expression which is nonzero if register number NUM is suitable for use
1189 as an index register in operand addresses. It may be either a suitable hard
1190 register or a pseudo register that has been allocated such a hard register.
1192 The difference between an index register and a base register is that the
1193 index register may be scaled. If an address involves the sum of two
1194 registers, neither one of them scaled, then either one may be labeled the
1195 "base" and the other the "index"; but whichever labeling is used must fit
1196 the machine's constraints of which registers may serve in each capacity.
1197 The compiler will try both labelings, looking for one that is valid, and
1198 will reload one or both registers only if neither labeling works. */
1199 #define REGNO_OK_FOR_INDEX_P(NUM) \
1200 ((NUM) < FIRST_PSEUDO_REGISTER \
1202 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM])))
1204 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
1205 frv_secondary_reload_class (CLASS, MODE, X)
1207 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
1208 frv_secondary_reload_class (CLASS, MODE, X)
1210 /* A C expression for the maximum number of consecutive registers of
1211 class CLASS needed to hold a value of mode MODE.
1213 This is closely related to the macro `HARD_REGNO_NREGS'. In fact, the value
1214 of the macro `CLASS_MAX_NREGS (CLASS, MODE)' should be the maximum value of
1215 `HARD_REGNO_NREGS (REGNO, MODE)' for all REGNO values in the class CLASS.
1217 This macro helps control the handling of multiple-word values in
1220 This declaration is required. */
1221 #define CLASS_MAX_NREGS(CLASS, MODE) frv_class_max_nregs (CLASS, MODE)
1223 #define ZERO_P(x) (x == CONST0_RTX (GET_MODE (x)))
1225 /* 6-bit signed immediate. */
1226 #define CONST_OK_FOR_I(VALUE) IN_RANGE_P(VALUE, -32, 31)
1227 /* 10-bit signed immediate. */
1228 #define CONST_OK_FOR_J(VALUE) IN_RANGE_P(VALUE, -512, 511)
1230 #define CONST_OK_FOR_K(VALUE) 0
1231 /* 16-bit signed immediate. */
1232 #define CONST_OK_FOR_L(VALUE) IN_RANGE_P(VALUE, -32768, 32767)
1233 /* 16-bit unsigned immediate. */
1234 #define CONST_OK_FOR_M(VALUE) IN_RANGE_P (VALUE, 0, 65535)
1235 /* 12-bit signed immediate that is negative. */
1236 #define CONST_OK_FOR_N(VALUE) IN_RANGE_P(VALUE, -2048, -1)
1238 #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0)
1239 /* 12-bit signed immediate that is negative. */
1240 #define CONST_OK_FOR_P(VALUE) IN_RANGE_P(VALUE, 1, 2047)
1242 /* A C expression that defines the machine-dependent operand constraint letters
1243 (`I', `J', `K', .. 'P') that specify particular ranges of integer values.
1244 If C is one of those letters, the expression should check that VALUE, an
1245 integer, is in the appropriate range and return 1 if so, 0 otherwise. If C
1246 is not one of those letters, the value should be 0 regardless of VALUE. */
1247 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1248 ( (C) == 'I' ? CONST_OK_FOR_I (VALUE) \
1249 : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \
1250 : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \
1251 : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \
1252 : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \
1253 : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \
1254 : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \
1255 : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \
1259 /* A C expression that defines the machine-dependent operand constraint letters
1260 (`G', `H') that specify particular ranges of `const_double' values.
1262 If C is one of those letters, the expression should check that VALUE, an RTX
1263 of code `const_double', is in the appropriate range and return 1 if so, 0
1264 otherwise. If C is not one of those letters, the value should be 0
1265 regardless of VALUE.
1267 `const_double' is used for all floating-point constants and for `DImode'
1268 fixed-point constants. A given letter can accept either or both kinds of
1269 values. It can use `GET_MODE' to distinguish between these kinds. */
1271 #define CONST_DOUBLE_OK_FOR_G(VALUE) \
1272 ((GET_MODE (VALUE) == VOIDmode \
1273 && CONST_DOUBLE_LOW (VALUE) == 0 \
1274 && CONST_DOUBLE_HIGH (VALUE) == 0) \
1275 || ((GET_MODE (VALUE) == SFmode \
1276 || GET_MODE (VALUE) == DFmode) \
1277 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))))
1279 #define CONST_DOUBLE_OK_FOR_H(VALUE) 0
1281 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1282 ( (C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) \
1283 : (C) == 'H' ? CONST_DOUBLE_OK_FOR_H (VALUE) \
1286 /* A C expression that defines the optional machine-dependent constraint
1287 letters (`Q', `R', `S', `T', `U') that can be used to segregate specific
1288 types of operands, usually memory references, for the target machine.
1289 Normally this macro will not be defined. If it is required for a particular
1290 target machine, it should return 1 if VALUE corresponds to the operand type
1291 represented by the constraint letter C. If C is not defined as an extra
1292 constraint, the value returned should be 0 regardless of VALUE.
1294 For example, on the ROMP, load instructions cannot have their output in r0
1295 if the memory reference contains a symbolic address. Constraint letter `Q'
1296 is defined as representing a memory address that does *not* contain a
1297 symbolic address. An alternative is specified with a `Q' constraint on the
1298 input and `r' on the output. The next alternative specifies `m' on the
1299 input and a register class that does not include r0 on the output. */
1301 /* 12-bit relocations. */
1302 #define EXTRA_CONSTRAINT_FOR_Q(VALUE) \
1303 (got12_operand (VALUE, GET_MODE (VALUE)))
1305 /* Double word memory ops that take one instruction. */
1306 #define EXTRA_CONSTRAINT_FOR_R(VALUE) \
1307 (dbl_memory_one_insn_operand (VALUE, GET_MODE (VALUE)))
1310 #define EXTRA_CONSTRAINT_FOR_S(VALUE) \
1311 (CONSTANT_P (VALUE) && call_operand (VALUE, VOIDmode))
1313 /* Double word memory ops that take two instructions. */
1314 #define EXTRA_CONSTRAINT_FOR_T(VALUE) \
1315 (dbl_memory_two_insn_operand (VALUE, GET_MODE (VALUE)))
1317 /* Memory operand for conditional execution. */
1318 #define EXTRA_CONSTRAINT_FOR_U(VALUE) \
1319 (condexec_memory_operand (VALUE, GET_MODE (VALUE)))
1321 #define EXTRA_CONSTRAINT(VALUE, C) \
1322 ( (C) == 'Q' ? EXTRA_CONSTRAINT_FOR_Q (VALUE) \
1323 : (C) == 'R' ? EXTRA_CONSTRAINT_FOR_R (VALUE) \
1324 : (C) == 'S' ? EXTRA_CONSTRAINT_FOR_S (VALUE) \
1325 : (C) == 'T' ? EXTRA_CONSTRAINT_FOR_T (VALUE) \
1326 : (C) == 'U' ? EXTRA_CONSTRAINT_FOR_U (VALUE) \
1329 #define EXTRA_MEMORY_CONSTRAINT(C,STR) \
1330 ((C) == 'U' || (C) == 'R' || (C) == 'T')
1332 #define CONSTRAINT_LEN(C, STR) \
1333 ((C) == 'D' ? 3 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
1335 #define REG_CLASS_FROM_CONSTRAINT(C, STR) \
1336 (((C) == 'D' && (STR)[1] == '8' && (STR)[2] == '9') ? GR89_REGS : \
1337 ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '9') ? GR9_REGS : \
1338 ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '8') ? GR8_REGS : \
1339 ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '4') ? FDPIC_FPTR_REGS : \
1340 ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '5') ? FDPIC_REGS : \
1341 REG_CLASS_FROM_LETTER ((C)))
1344 /* Basic Stack Layout. */
1346 /* Structure to describe information about a saved range of registers */
1348 typedef struct frv_stack_regs {
1349 const char * name; /* name of the register ranges */
1350 int first; /* first register in the range */
1351 int last; /* last register in the range */
1352 int size_1word; /* # of bytes to be stored via 1 word stores */
1353 int size_2words; /* # of bytes to be stored via 2 word stores */
1354 unsigned char field_p; /* true if the registers are a single SPR */
1355 unsigned char dword_p; /* true if we can do dword stores */
1356 unsigned char special_p; /* true if the regs have a fixed save loc. */
1359 /* Register ranges to look into saving. */
1360 #define STACK_REGS_GPR 0 /* Gprs (normally gr16..gr31, gr48..gr63) */
1361 #define STACK_REGS_FPR 1 /* Fprs (normally fr16..fr31, fr48..fr63) */
1362 #define STACK_REGS_LR 2 /* LR register */
1363 #define STACK_REGS_CC 3 /* CCrs (normally not saved) */
1364 #define STACK_REGS_LCR 5 /* lcr register */
1365 #define STACK_REGS_STDARG 6 /* stdarg registers */
1366 #define STACK_REGS_STRUCT 7 /* structure return (gr3) */
1367 #define STACK_REGS_FP 8 /* FP register */
1368 #define STACK_REGS_MAX 9 /* # of register ranges */
1370 /* Values for save_p field. */
1371 #define REG_SAVE_NO_SAVE 0 /* register not saved */
1372 #define REG_SAVE_1WORD 1 /* save the register */
1373 #define REG_SAVE_2WORDS 2 /* save register and register+1 */
1375 /* Structure used to define the frv stack. */
1377 typedef struct frv_stack {
1378 int total_size; /* total bytes allocated for stack */
1379 int vars_size; /* variable save area size */
1380 int parameter_size; /* outgoing parameter size */
1381 int stdarg_size; /* size of regs needed to be saved for stdarg */
1382 int regs_size; /* size of the saved registers */
1383 int regs_size_1word; /* # of bytes to be stored via 1 word stores */
1384 int regs_size_2words; /* # of bytes to be stored via 2 word stores */
1385 int header_size; /* size of the old FP, struct ret., LR save */
1386 int pretend_size; /* size of pretend args */
1387 int vars_offset; /* offset to save local variables from new SP*/
1388 int regs_offset; /* offset to save registers from new SP */
1389 /* register range information */
1390 frv_stack_regs_t regs[STACK_REGS_MAX];
1391 /* offset to store each register */
1392 int reg_offset[FIRST_PSEUDO_REGISTER];
1393 /* whether to save register (& reg+1) */
1394 unsigned char save_p[FIRST_PSEUDO_REGISTER];
1397 /* Define this macro if pushing a word onto the stack moves the stack pointer
1398 to a smaller address. */
1399 #define STACK_GROWS_DOWNWARD 1
1401 /* Define this macro to nonzero if the addresses of local variable slots
1402 are at negative offsets from the frame pointer. */
1403 #define FRAME_GROWS_DOWNWARD 1
1405 /* Offset from the frame pointer to the first local variable slot to be
1408 If `FRAME_GROWS_DOWNWARD', find the next slot's offset by subtracting the
1409 first slot's length from `STARTING_FRAME_OFFSET'. Otherwise, it is found by
1410 adding the length of the first slot to the value `STARTING_FRAME_OFFSET'. */
1411 #define STARTING_FRAME_OFFSET 0
1413 /* Offset from the stack pointer register to the first location at which
1414 outgoing arguments are placed. If not specified, the default value of zero
1415 is used. This is the proper value for most machines.
1417 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first
1418 location at which outgoing arguments are placed. */
1419 #define STACK_POINTER_OFFSET 0
1421 /* Offset from the argument pointer register to the first argument's address.
1422 On some machines it may depend on the data type of the function.
1424 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first
1425 argument's address. */
1426 #define FIRST_PARM_OFFSET(FUNDECL) 0
1428 /* A C expression whose value is RTL representing the address in a stack frame
1429 where the pointer to the caller's frame is stored. Assume that FRAMEADDR is
1430 an RTL expression for the address of the stack frame itself.
1432 If you don't define this macro, the default is to return the value of
1433 FRAMEADDR--that is, the stack frame address is also the address of the stack
1434 word that points to the previous frame. */
1435 #define DYNAMIC_CHAIN_ADDRESS(FRAMEADDR) frv_dynamic_chain_address (FRAMEADDR)
1437 /* A C expression whose value is RTL representing the value of the return
1438 address for the frame COUNT steps up from the current frame, after the
1439 prologue. FRAMEADDR is the frame pointer of the COUNT frame, or the frame
1440 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' is
1443 The value of the expression must always be the correct address when COUNT is
1444 zero, but may be `NULL_RTX' if there is not way to determine the return
1445 address of other frames. */
1446 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) frv_return_addr_rtx (COUNT, FRAMEADDR)
1448 #define RETURN_POINTER_REGNUM LR_REGNO
1450 /* A C expression whose value is RTL representing the location of the incoming
1451 return address at the beginning of any function, before the prologue. This
1452 RTL is either a `REG', indicating that the return value is saved in `REG',
1453 or a `MEM' representing a location in the stack.
1455 You only need to define this macro if you want to support call frame
1456 debugging information like that provided by DWARF 2. */
1457 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RETURN_POINTER_REGNUM)
1460 /* Register That Address the Stack Frame. */
1462 /* The register number of the stack pointer register, which must also be a
1463 fixed register according to `FIXED_REGISTERS'. On most machines, the
1464 hardware determines which register this is. */
1465 #define STACK_POINTER_REGNUM (GPR_FIRST + 1)
1467 /* The register number of the frame pointer register, which is used to access
1468 automatic variables in the stack frame. On some machines, the hardware
1469 determines which register this is. On other machines, you can choose any
1470 register you wish for this purpose. */
1471 #define FRAME_POINTER_REGNUM (GPR_FIRST + 2)
1473 /* The register number of the arg pointer register, which is used to access the
1474 function's argument list. On some machines, this is the same as the frame
1475 pointer register. On some machines, the hardware determines which register
1476 this is. On other machines, you can choose any register you wish for this
1477 purpose. If this is not the same register as the frame pointer register,
1478 then you must mark it as a fixed register according to `FIXED_REGISTERS', or
1479 arrange to be able to eliminate it. */
1481 /* On frv this is a fake register that is eliminated in
1482 terms of either the frame pointer or stack pointer. */
1483 #define ARG_POINTER_REGNUM AP_FIRST
1485 /* Register numbers used for passing a function's static chain pointer. If
1486 register windows are used, the register number as seen by the called
1487 function is `STATIC_CHAIN_INCOMING_REGNUM', while the register number as
1488 seen by the calling function is `STATIC_CHAIN_REGNUM'. If these registers
1489 are the same, `STATIC_CHAIN_INCOMING_REGNUM' need not be defined.
1491 The static chain register need not be a fixed register.
1493 If the static chain is passed in memory, these macros should not be defined;
1494 instead, the next two macros should be defined. */
1495 #define STATIC_CHAIN_REGNUM (GPR_FIRST + 7)
1496 #define STATIC_CHAIN_INCOMING_REGNUM (GPR_FIRST + 7)
1499 /* Eliminating the Frame Pointer and the Arg Pointer. */
1501 /* If defined, this macro specifies a table of register pairs used to eliminate
1502 unneeded registers that point into the stack frame. If it is not defined,
1503 the only elimination attempted by the compiler is to replace references to
1504 the frame pointer with references to the stack pointer.
1506 The definition of this macro is a list of structure initializations, each of
1507 which specifies an original and replacement register.
1509 On some machines, the position of the argument pointer is not known until
1510 the compilation is completed. In such a case, a separate hard register must
1511 be used for the argument pointer. This register can be eliminated by
1512 replacing it with either the frame pointer or the argument pointer,
1513 depending on whether or not the frame pointer has been eliminated.
1515 In this case, you might specify:
1516 #define ELIMINABLE_REGS \
1517 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1518 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1519 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1521 Note that the elimination of the argument pointer with the stack pointer is
1522 specified first since that is the preferred elimination. */
1524 #define ELIMINABLE_REGS \
1526 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1527 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1528 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
1531 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It specifies the
1532 initial difference between the specified pair of registers. This macro must
1533 be defined if `ELIMINABLE_REGS' is defined. */
1535 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1536 (OFFSET) = frv_initial_elimination_offset (FROM, TO)
1539 /* Passing Function Arguments on the Stack. */
1541 /* If defined, the maximum amount of space required for outgoing arguments will
1542 be computed and placed into the variable
1543 `crtl->outgoing_args_size'. No space will be pushed onto the
1544 stack for each call; instead, the function prologue should increase the
1545 stack frame size by this amount.
1547 Defining both `PUSH_ROUNDING' and `ACCUMULATE_OUTGOING_ARGS' is not
1549 #define ACCUMULATE_OUTGOING_ARGS 1
1552 /* The number of register assigned to holding function arguments. */
1554 #define FRV_NUM_ARG_REGS 6
1556 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1557 frv_function_arg (&CUM, MODE, TYPE, NAMED, FALSE)
1559 /* Define this macro if the target machine has "register windows", so that the
1560 register in which a function sees an arguments is not necessarily the same
1561 as the one in which the caller passed the argument.
1563 For such machines, `FUNCTION_ARG' computes the register in which the caller
1564 passes the value, and `FUNCTION_INCOMING_ARG' should be defined in a similar
1565 fashion to tell the function being called where the arguments will arrive.
1567 If `FUNCTION_INCOMING_ARG' is not defined, `FUNCTION_ARG' serves both
1570 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
1571 frv_function_arg (&CUM, MODE, TYPE, NAMED, TRUE)
1573 /* A C type for declaring a variable that is used as the first argument of
1574 `FUNCTION_ARG' and other related values. For some target machines, the type
1575 `int' suffices and can hold the number of bytes of argument so far.
1577 There is no need to record in `CUMULATIVE_ARGS' anything about the arguments
1578 that have been passed on the stack. The compiler has other variables to
1579 keep track of that. For target machines on which all arguments are passed
1580 on the stack, there is no need to store anything in `CUMULATIVE_ARGS';
1581 however, the data structure must exist and should not be empty, so use
1583 #define CUMULATIVE_ARGS int
1585 /* A C statement (sans semicolon) for initializing the variable CUM for the
1586 state at the beginning of the argument list. The variable has type
1587 `CUMULATIVE_ARGS'. The value of FNTYPE is the tree node for the data type
1588 of the function which will receive the args, or 0 if the args are to a
1589 compiler support library function. The value of INDIRECT is nonzero when
1590 processing an indirect call, for example a call through a function pointer.
1591 The value of INDIRECT is zero for a call to an explicitly named function, a
1592 library function call, or when `INIT_CUMULATIVE_ARGS' is used to find
1593 arguments for the function being compiled.
1595 When processing a call to a compiler support library function, LIBNAME
1596 identifies which one. It is a `symbol_ref' rtx which contains the name of
1597 the function, as a string. LIBNAME is 0 when an ordinary C function call is
1598 being processed. Thus, each time this macro is called, either LIBNAME or
1599 FNTYPE is nonzero, but never both of them at once. */
1601 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
1602 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, FNDECL, FALSE)
1604 /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
1605 arguments for the function being compiled. If this macro is undefined,
1606 `INIT_CUMULATIVE_ARGS' is used instead.
1608 The value passed for LIBNAME is always 0, since library routines with
1609 special calling conventions are never compiled with GCC. The argument
1610 LIBNAME exists for symmetry with `INIT_CUMULATIVE_ARGS'. */
1612 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
1613 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, NULL, TRUE)
1615 /* A C statement (sans semicolon) to update the summarizer variable CUM to
1616 advance past an argument in the argument list. The values MODE, TYPE and
1617 NAMED describe that argument. Once this is done, the variable CUM is
1618 suitable for analyzing the *following* argument with `FUNCTION_ARG', etc.
1620 This macro need not do anything if the argument in question was passed on
1621 the stack. The compiler knows how to track the amount of stack space used
1622 for arguments without any special help. */
1623 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1624 frv_function_arg_advance (&CUM, MODE, TYPE, NAMED)
1626 /* If defined, a C expression that gives the alignment boundary, in bits, of an
1627 argument with the specified mode and type. If it is not defined,
1628 `PARM_BOUNDARY' is used for all arguments. */
1630 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1631 frv_function_arg_boundary (MODE, TYPE)
1633 /* A C expression that is nonzero if REGNO is the number of a hard register in
1634 which function arguments are sometimes passed. This does *not* include
1635 implicit arguments such as the static chain and the structure-value address.
1636 On many machines, no registers can be used for this purpose since all
1637 function arguments are pushed on the stack. */
1638 #define FUNCTION_ARG_REGNO_P(REGNO) \
1639 ((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM))
1642 /* How Scalar Function Values are Returned. */
1644 /* The number of the hard register that is used to return a scalar value from a
1646 #define RETURN_VALUE_REGNUM (GPR_FIRST + 8)
1648 #define FUNCTION_VALUE_REGNO_P(REGNO) frv_function_value_regno_p (REGNO)
1651 /* How Large Values are Returned. */
1653 /* The number of the register that is used to pass the structure
1655 #define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3)
1658 /* Function Entry and Exit. */
1660 /* Define this macro as a C expression that is nonzero if the return
1661 instruction or the function epilogue ignores the value of the stack pointer;
1662 in other words, if it is safe to delete an instruction to adjust the stack
1663 pointer before a return from the function.
1665 Note that this macro's value is relevant only for functions for which frame
1666 pointers are maintained. It is never safe to delete a final stack
1667 adjustment in a function that has no frame pointer, and the compiler knows
1668 this regardless of `EXIT_IGNORE_STACK'. */
1669 #define EXIT_IGNORE_STACK 1
1671 /* Generating Code for Profiling. */
1673 /* A C statement or compound statement to output to FILE some assembler code to
1674 call the profiling subroutine `mcount'. Before calling, the assembler code
1675 must load the address of a counter variable into a register where `mcount'
1676 expects to find the address. The name of this variable is `LP' followed by
1677 the number LABELNO, so you would generate the name using `LP%d' in a
1680 The details of how the address should be passed to `mcount' are determined
1681 by your operating system environment, not by GCC. To figure them out,
1682 compile a small program for profiling using the system's installed C
1683 compiler and look at the assembler code that results.
1685 This declaration must be present, but it can be an abort if profiling is
1688 #define FUNCTION_PROFILER(FILE, LABELNO)
1690 /* Trampolines for Nested Functions. */
1692 /* A C expression for the size in bytes of the trampoline, as an integer. */
1693 #define TRAMPOLINE_SIZE frv_trampoline_size ()
1695 /* Alignment required for trampolines, in bits.
1697 If you don't define this macro, the value of `BIGGEST_ALIGNMENT' is used for
1698 aligning trampolines. */
1699 #define TRAMPOLINE_ALIGNMENT (TARGET_FDPIC ? 64 : 32)
1701 /* Define this macro if trampolines need a special subroutine to do their work.
1702 The macro should expand to a series of `asm' statements which will be
1703 compiled with GCC. They go in a library function named
1704 `__transfer_from_trampoline'.
1706 If you need to avoid executing the ordinary prologue code of a compiled C
1707 function when you jump to the subroutine, you can do so by placing a special
1708 label of your own in the assembler code. Use one `asm' statement to
1709 generate an assembler label, and another to make the label global. Then
1710 trampolines can use that label to jump directly to your special assembler
1713 #ifdef __FRV_UNDERSCORE__
1714 #define TRAMPOLINE_TEMPLATE_NAME "___trampoline_template"
1716 #define TRAMPOLINE_TEMPLATE_NAME "__trampoline_template"
1719 #define Twrite _write
1722 #define TRANSFER_FROM_TRAMPOLINE \
1723 extern int Twrite (int, const void *, unsigned); \
1726 __trampoline_setup (short * addr, int size, int fnaddr, int sc) \
1728 extern short __trampoline_template[]; \
1729 short * to = addr; \
1730 short * from = &__trampoline_template[0]; \
1735 Twrite (2, "__trampoline_setup bad size\n", \
1736 sizeof ("__trampoline_setup bad size\n") - 1); \
1741 to[1] = (short)(fnaddr); \
1743 to[3] = (short)(sc); \
1745 to[5] = (short)(fnaddr >> 16); \
1747 to[7] = (short)(sc >> 16); \
1751 for (i = 0; i < 20; i++) \
1752 __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \
1756 "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \
1758 TRAMPOLINE_TEMPLATE_NAME ":\n" \
1759 "\tsetlos #0, gr6\n" /* jump register */ \
1760 "\tsetlos #0, gr7\n" /* static chain */ \
1761 "\tsethi #0, gr6\n" \
1762 "\tsethi #0, gr7\n" \
1763 "\tjmpl @(gr0,gr6)\n");
1765 #define TRANSFER_FROM_TRAMPOLINE \
1766 extern int Twrite (int, const void *, unsigned); \
1769 __trampoline_setup (addr, size, fnaddr, sc) \
1775 extern short __trampoline_template[]; \
1776 short * from = &__trampoline_template[0]; \
1778 short **desc = (short **)addr; \
1779 short * to = addr + 4; \
1783 Twrite (2, "__trampoline_setup bad size\n", \
1784 sizeof ("__trampoline_setup bad size\n") - 1); \
1788 /* Create a function descriptor with the address of the code below
1789 and NULL as the FDPIC value. We don't need the real GOT value
1790 here, since we don't use it, so we use NULL, that is just as
1797 to[1] = (short)(fnaddr); \
1799 to[3] = (short)(sc); \
1801 to[5] = (short)(fnaddr >> 16); \
1803 to[7] = (short)(sc >> 16); \
1806 to[10] = from[10]; \
1807 to[11] = from[11]; \
1809 for (i = 0; i < size; i++) \
1810 __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \
1814 "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \
1816 TRAMPOLINE_TEMPLATE_NAME ":\n" \
1817 "\tsetlos #0, gr6\n" /* Jump register. */ \
1818 "\tsetlos #0, gr7\n" /* Static chain. */ \
1819 "\tsethi #0, gr6\n" \
1820 "\tsethi #0, gr7\n" \
1821 "\tldd @(gr6,gr0),gr14\n" \
1822 "\tjmpl @(gr14,gr0)\n" \
1827 /* Addressing Modes. */
1829 /* A number, the maximum number of registers that can appear in a valid memory
1830 address. Note that it is up to you to specify a value equal to the maximum
1831 number that `TARGET_LEGITIMATE_ADDRESS_P' would ever accept. */
1832 #define MAX_REGS_PER_ADDRESS 2
1834 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1835 use as a base register. For hard registers, it should always accept those
1836 which the hardware permits and reject the others. Whether the macro accepts
1837 or rejects pseudo registers must be controlled by `REG_OK_STRICT' as
1838 described above. This usually requires two variant definitions, of which
1839 `REG_OK_STRICT' controls the one actually used. */
1840 #ifdef REG_OK_STRICT
1841 #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X))
1843 #define REG_OK_FOR_BASE_P(X) GPR_AP_OR_PSEUDO_P (REGNO (X))
1846 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1847 use as an index register.
1849 The difference between an index register and a base register is that the
1850 index register may be scaled. If an address involves the sum of two
1851 registers, neither one of them scaled, then either one may be labeled the
1852 "base" and the other the "index"; but whichever labeling is used must fit
1853 the machine's constraints of which registers may serve in each capacity.
1854 The compiler will try both labelings, looking for one that is valid, and
1855 will reload one or both registers only if neither labeling works. */
1856 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
1858 #define FIND_BASE_TERM frv_find_base_term
1860 /* A C expression that is nonzero if X is a legitimate constant for an
1861 immediate operand on the target machine. You can assume that X satisfies
1862 `CONSTANT_P', so you need not check this. In fact, `1' is a suitable
1863 definition for this macro on machines where anything `CONSTANT_P' is valid. */
1864 #define LEGITIMATE_CONSTANT_P(X) frv_legitimate_constant_p (X)
1866 /* The load-and-update commands allow pre-modification in addresses.
1867 The index has to be in a register. */
1868 #define HAVE_PRE_MODIFY_REG 1
1871 /* We define extra CC modes in frv-modes.def so we need a selector. */
1873 #define SELECT_CC_MODE frv_select_cc_mode
1875 /* A C expression whose value is one if it is always safe to reverse a
1876 comparison whose mode is MODE. If `SELECT_CC_MODE' can ever return MODE for
1877 a floating-point inequality comparison, then `REVERSIBLE_CC_MODE (MODE)'
1880 You need not define this macro if it would always returns zero or if the
1881 floating-point format is anything other than `IEEE_FLOAT_FORMAT'. For
1882 example, here is the definition used on the SPARC, where floating-point
1883 inequality comparisons are always given `CCFPEmode':
1885 #define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode) */
1887 /* On frv, don't consider floating point comparisons to be reversible. In
1888 theory, fp equality comparisons can be reversible. */
1889 #define REVERSIBLE_CC_MODE(MODE) \
1890 ((MODE) == CCmode || (MODE) == CC_UNSmode || (MODE) == CC_NZmode)
1892 /* Frv CCR_MODE's are not reversible. */
1893 #define REVERSE_CONDEXEC_PREDICATES_P(x,y) 0
1896 /* Describing Relative Costs of Operations. */
1898 /* A C expression for the cost of a branch instruction. A value of 1 is the
1899 default; other values are interpreted relative to that. */
1900 #define BRANCH_COST(speed_p, predictable_p) frv_branch_cost_int
1902 /* Define this macro as a C expression which is nonzero if accessing less than
1903 a word of memory (i.e. a `char' or a `short') is no faster than accessing a
1904 word of memory, i.e., if such access require more than one instruction or if
1905 there is no difference in cost between byte and (aligned) word loads.
1907 When this macro is not defined, the compiler will access a field by finding
1908 the smallest containing object; when it is defined, a fullword load will be
1909 used if alignment permits. Unless bytes accesses are faster than word
1910 accesses, using word accesses is preferable since it may eliminate
1911 subsequent memory access if subsequent accesses occur to other fields in the
1912 same word of the structure, but to different bytes. */
1913 #define SLOW_BYTE_ACCESS 1
1915 /* Define this macro if it is as good or better to call a constant function
1916 address than to call an address kept in a register. */
1917 #define NO_FUNCTION_CSE
1920 /* Dividing the output into sections. */
1922 /* A C expression whose value is a string containing the assembler operation
1923 that should precede instructions and read-only data. Normally `".text"' is
1925 #define TEXT_SECTION_ASM_OP "\t.text"
1927 /* A C expression whose value is a string containing the assembler operation to
1928 identify the following data as writable initialized data. Normally
1929 `".data"' is right. */
1930 #define DATA_SECTION_ASM_OP "\t.data"
1932 /* If defined, a C expression whose value is a string containing the
1933 assembler operation to identify the following data as
1934 uninitialized global data. If not defined, and neither
1935 `ASM_OUTPUT_BSS' nor `ASM_OUTPUT_ALIGNED_BSS' are defined,
1936 uninitialized global data will be output in the data section if
1937 `-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be
1939 #define BSS_SECTION_ASM_OP "\t.section .bss,\"aw\""
1941 /* Short Data Support */
1942 #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\""
1944 /* On svr4, we *do* have support for the .init and .fini sections, and we
1945 can put stuff in there to be executed before and after `main'. We let
1946 crtstuff.c and other files know this by defining the following symbols.
1947 The definitions say how to change sections to the .init and .fini
1948 sections. This is the same for all known svr4 assemblers.
1950 The standard System V.4 macros will work, but they look ugly in the
1951 assembly output, so redefine them. */
1953 #undef INIT_SECTION_ASM_OP
1954 #undef FINI_SECTION_ASM_OP
1955 #define INIT_SECTION_ASM_OP "\t.section .init,\"ax\""
1956 #define FINI_SECTION_ASM_OP "\t.section .fini,\"ax\""
1958 #undef CTORS_SECTION_ASM_OP
1959 #undef DTORS_SECTION_ASM_OP
1960 #define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"a\""
1961 #define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"a\""
1963 /* A C expression whose value is a string containing the assembler operation to
1964 switch to the fixup section that records all initialized pointers in a -fpic
1965 program so they can be changed program startup time if the program is loaded
1966 at a different address than linked for. */
1967 #define FIXUP_SECTION_ASM_OP "\t.section .rofixup,\"a\""
1969 /* Position Independent Code. */
1971 /* A C expression that is nonzero if X is a legitimate immediate operand on the
1972 target machine when generating position independent code. You can assume
1973 that X satisfies `CONSTANT_P', so you need not check this. You can also
1974 assume FLAG_PIC is true, so you need not check it either. You need not
1975 define this macro if all constants (including `SYMBOL_REF') can be immediate
1976 operands when generating position independent code. */
1977 #define LEGITIMATE_PIC_OPERAND_P(X) \
1978 ( GET_CODE (X) == CONST_INT \
1979 || GET_CODE (X) == CONST_DOUBLE \
1980 || (GET_CODE (X) == HIGH && GET_CODE (XEXP (X, 0)) == CONST_INT) \
1981 || got12_operand (X, VOIDmode)) \
1984 /* The Overall Framework of an Assembler File. */
1986 /* A C string constant describing how to begin a comment in the target
1987 assembler language. The compiler assumes that the comment will end at the
1989 #define ASM_COMMENT_START ";"
1991 /* A C string constant for text to be output before each `asm' statement or
1992 group of consecutive ones. Normally this is `"#APP"', which is a comment
1993 that has no effect on most assemblers but tells the GNU assembler that it
1994 must check the lines that follow for all valid assembler constructs. */
1995 #define ASM_APP_ON "#APP\n"
1997 /* A C string constant for text to be output after each `asm' statement or
1998 group of consecutive ones. Normally this is `"#NO_APP"', which tells the
1999 GNU assembler to resume making the time-saving assumptions that are valid
2000 for ordinary compiler output. */
2001 #define ASM_APP_OFF "#NO_APP\n"
2004 /* Output of Data. */
2006 /* This is how to output a label to dwarf/dwarf2. */
2007 #define ASM_OUTPUT_DWARF_ADDR(STREAM, LABEL) \
2009 fprintf (STREAM, "\t.picptr\t"); \
2010 assemble_name (STREAM, LABEL); \
2013 /* Whether to emit the gas specific dwarf2 line number support. */
2014 #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DEBUG_LOC)
2016 /* Output of Uninitialized Variables. */
2018 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
2019 assembler definition of a local-common-label named NAME whose size is SIZE
2020 bytes. The variable ROUNDED is the size rounded up to whatever alignment
2023 Use the expression `assemble_name (STREAM, NAME)' to output the name itself;
2024 before and after that, output the additional assembler syntax for defining
2025 the name, and a newline.
2027 This macro controls how the assembler definitions of uninitialized static
2028 variables are output. */
2029 #undef ASM_OUTPUT_LOCAL
2031 /* Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a separate,
2032 explicit argument. If you define this macro, it is used in place of
2033 `ASM_OUTPUT_LOCAL', and gives you more flexibility in handling the required
2034 alignment of the variable. The alignment is specified as the number of
2037 Defined in svr4.h. */
2038 #undef ASM_OUTPUT_ALIGNED_LOCAL
2040 /* This is for final.c, because it is used by ASM_DECLARE_OBJECT_NAME. */
2041 extern int size_directive_output;
2043 /* Like `ASM_OUTPUT_ALIGNED_LOCAL' except that it takes an additional
2044 parameter - the DECL of variable to be output, if there is one.
2045 This macro can be called with DECL == NULL_TREE. If you define
2046 this macro, it is used in place of `ASM_OUTPUT_LOCAL' and
2047 `ASM_OUTPUT_ALIGNED_LOCAL', and gives you more flexibility in
2048 handling the destination of the variable. */
2049 #undef ASM_OUTPUT_ALIGNED_DECL_LOCAL
2050 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
2052 if ((SIZE) > 0 && (SIZE) <= (unsigned HOST_WIDE_INT) g_switch_value) \
2053 switch_to_section (get_named_section (NULL, ".sbss", 0)); \
2055 switch_to_section (bss_section); \
2056 ASM_OUTPUT_ALIGN (STREAM, floor_log2 ((ALIGN) / BITS_PER_UNIT)); \
2057 ASM_DECLARE_OBJECT_NAME (STREAM, NAME, DECL); \
2058 ASM_OUTPUT_SKIP (STREAM, (SIZE) ? (SIZE) : 1); \
2062 /* Output and Generation of Labels. */
2064 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
2065 assembler definition of a label named NAME. Use the expression
2066 `assemble_name (STREAM, NAME)' to output the name itself; before and after
2067 that, output the additional assembler syntax for defining the name, and a
2069 #define ASM_OUTPUT_LABEL(STREAM, NAME) \
2071 assemble_name (STREAM, NAME); \
2072 fputs (":\n", STREAM); \
2075 /* Globalizing directive for a label. */
2076 #define GLOBAL_ASM_OP "\t.globl "
2078 /* A C statement to store into the string STRING a label whose name is made
2079 from the string PREFIX and the number NUM.
2081 This string, when output subsequently by `assemble_name', should produce the
2082 output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX
2085 If the string begins with `*', then `assemble_name' will output the rest of
2086 the string unchanged. It is often convenient for
2087 `ASM_GENERATE_INTERNAL_LABEL' to use `*' in this way. If the string doesn't
2088 start with `*', then `ASM_OUTPUT_LABELREF' gets to output the string, and
2089 may change it. (Of course, `ASM_OUTPUT_LABELREF' is also part of your
2090 machine description, so you should know what it does on your machine.)
2092 Defined in svr4.h. */
2093 #undef ASM_GENERATE_INTERNAL_LABEL
2094 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
2096 sprintf (LABEL, "*.%s%ld", PREFIX, (long)NUM); \
2100 /* Macros Controlling Initialization Routines. */
2102 /* If defined, a C string constant for the assembler operation to identify the
2103 following data as initialization code. If not defined, GCC will assume
2104 such a section does not exist. When you are using special sections for
2105 initialization and termination functions, this macro also controls how
2106 `crtstuff.c' and `libgcc2.c' arrange to run the initialization functions.
2108 Defined in svr4.h. */
2109 #undef INIT_SECTION_ASM_OP
2111 /* If defined, `main' will call `__main' despite the presence of
2112 `INIT_SECTION_ASM_OP'. This macro should be defined for systems where the
2113 init section is not actually run automatically, but is still useful for
2114 collecting the lists of constructors and destructors. */
2115 #define INVOKE__main
2117 /* Output of Assembler Instructions. */
2119 /* A C initializer containing the assembler's names for the machine registers,
2120 each one as a C string constant. This is what translates register numbers
2121 in the compiler into assembler language. */
2122 #define REGISTER_NAMES \
2124 "gr0", "sp", "fp", "gr3", "gr4", "gr5", "gr6", "gr7", \
2125 "gr8", "gr9", "gr10", "gr11", "gr12", "gr13", "gr14", "gr15", \
2126 "gr16", "gr17", "gr18", "gr19", "gr20", "gr21", "gr22", "gr23", \
2127 "gr24", "gr25", "gr26", "gr27", "gr28", "gr29", "gr30", "gr31", \
2128 "gr32", "gr33", "gr34", "gr35", "gr36", "gr37", "gr38", "gr39", \
2129 "gr40", "gr41", "gr42", "gr43", "gr44", "gr45", "gr46", "gr47", \
2130 "gr48", "gr49", "gr50", "gr51", "gr52", "gr53", "gr54", "gr55", \
2131 "gr56", "gr57", "gr58", "gr59", "gr60", "gr61", "gr62", "gr63", \
2133 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \
2134 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \
2135 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \
2136 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31", \
2137 "fr32", "fr33", "fr34", "fr35", "fr36", "fr37", "fr38", "fr39", \
2138 "fr40", "fr41", "fr42", "fr43", "fr44", "fr45", "fr46", "fr47", \
2139 "fr48", "fr49", "fr50", "fr51", "fr52", "fr53", "fr54", "fr55", \
2140 "fr56", "fr57", "fr58", "fr59", "fr60", "fr61", "fr62", "fr63", \
2142 "fcc0", "fcc1", "fcc2", "fcc3", "icc0", "icc1", "icc2", "icc3", \
2143 "cc0", "cc1", "cc2", "cc3", "cc4", "cc5", "cc6", "cc7", \
2144 "acc0", "acc1", "acc2", "acc3", "acc4", "acc5", "acc6", "acc7", \
2145 "acc8", "acc9", "acc10", "acc11", \
2146 "accg0","accg1","accg2","accg3","accg4","accg5","accg6","accg7", \
2147 "accg8", "accg9", "accg10", "accg11", \
2148 "ap", "lr", "lcr", "iacc0h", "iacc0l" \
2151 /* Define this macro if you are using an unusual assembler that
2152 requires different names for the machine instructions.
2154 The definition is a C statement or statements which output an
2155 assembler instruction opcode to the stdio stream STREAM. The
2156 macro-operand PTR is a variable of type `char *' which points to
2157 the opcode name in its "internal" form--the form that is written
2158 in the machine description. The definition should output the
2159 opcode name to STREAM, performing any translation you desire, and
2160 increment the variable PTR to point at the end of the opcode so
2161 that it will not be output twice.
2163 In fact, your macro definition may process less than the entire
2164 opcode name, or more than the opcode name; but if you want to
2165 process text that includes `%'-sequences to substitute operands,
2166 you must take care of the substitution yourself. Just be sure to
2167 increment PTR over whatever text should not be output normally.
2169 If you need to look at the operand values, they can be found as the
2170 elements of `recog_operand'.
2172 If the macro definition does nothing, the instruction is output in
2175 #define ASM_OUTPUT_OPCODE(STREAM, PTR)\
2176 (PTR) = frv_asm_output_opcode (STREAM, PTR)
2178 /* If defined, a C statement to be executed just prior to the output
2179 of assembler code for INSN, to modify the extracted operands so
2180 they will be output differently.
2182 Here the argument OPVEC is the vector containing the operands
2183 extracted from INSN, and NOPERANDS is the number of elements of
2184 the vector which contain meaningful data for this insn. The
2185 contents of this vector are what will be used to convert the insn
2186 template into assembler code, so you can change the assembler
2187 output by changing the contents of the vector.
2189 This macro is useful when various assembler syntaxes share a single
2190 file of instruction patterns; by defining this macro differently,
2191 you can cause a large class of instructions to be output
2192 differently (such as with rearranged operands). Naturally,
2193 variations in assembler syntax affecting individual insn patterns
2194 ought to be handled by writing conditional output routines in
2197 If this macro is not defined, it is equivalent to a null statement. */
2199 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)\
2200 frv_final_prescan_insn (INSN, OPVEC, NOPERANDS)
2202 /* If defined, C string expressions to be used for the `%R', `%L', `%U', and
2203 `%I' options of `asm_fprintf' (see `final.c'). These are useful when a
2204 single `md' file must support multiple assembler formats. In that case, the
2205 various `tm.h' files can define these macros differently.
2207 USER_LABEL_PREFIX is defined in svr4.h. */
2208 #undef USER_LABEL_PREFIX
2209 #define USER_LABEL_PREFIX ""
2210 #define REGISTER_PREFIX ""
2211 #define LOCAL_LABEL_PREFIX "."
2212 #define IMMEDIATE_PREFIX "#"
2215 /* Output of dispatch tables. */
2217 /* This macro should be provided on machines where the addresses in a dispatch
2218 table are relative to the table's own address.
2220 The definition should be a C statement to output to the stdio stream STREAM
2221 an assembler pseudo-instruction to generate a difference between two labels.
2222 VALUE and REL are the numbers of two internal labels. The definitions of
2223 these labels are output using `(*targetm.asm_out.internal_label)', and they must be
2224 printed in the same way here. For example,
2226 fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */
2227 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
2228 fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL)
2230 /* This macro should be provided on machines where the addresses in a dispatch
2233 The definition should be a C statement to output to the stdio stream STREAM
2234 an assembler pseudo-instruction to generate a reference to a label. VALUE
2235 is the number of an internal label whose definition is output using
2236 `(*targetm.asm_out.internal_label)'. For example,
2238 fprintf (STREAM, "\t.word L%d\n", VALUE) */
2239 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
2240 fprintf (STREAM, "\t.word .L%d\n", VALUE)
2242 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
2244 /* Assembler Commands for Exception Regions. */
2246 /* Define this macro to 0 if your target supports DWARF 2 frame unwind
2247 information, but it does not yet work with exception handling. Otherwise,
2248 if your target supports this information (if it defines
2249 `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or
2250 `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1.
2252 If this macro is defined to 1, the DWARF 2 unwinder will be the default
2253 exception handling mechanism; otherwise, setjmp/longjmp will be used by
2256 If this macro is defined to anything, the DWARF 2 unwinder will be used
2257 instead of inline unwinders and __unwind_function in the non-setjmp case. */
2258 #define DWARF2_UNWIND_INFO 1
2260 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO)
2262 /* Assembler Commands for Alignment. */
2264 /* A C statement to output to the stdio stream STREAM an assembler instruction
2265 to advance the location counter by NBYTES bytes. Those bytes should be zero
2266 when loaded. NBYTES will be a C expression of type `int'.
2268 Defined in svr4.h. */
2269 #undef ASM_OUTPUT_SKIP
2270 #define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
2271 fprintf (STREAM, "\t.zero\t%u\n", (int)(NBYTES))
2273 /* A C statement to output to the stdio stream STREAM an assembler command to
2274 advance the location counter to a multiple of 2 to the POWER bytes. POWER
2275 will be a C expression of type `int'. */
2276 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
2277 fprintf ((STREAM), "\t.p2align %d\n", (POWER))
2279 /* Inside the text section, align with unpacked nops rather than zeros. */
2280 #define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, POWER) \
2281 fprintf ((STREAM), "\t.p2alignl %d,0x80880000\n", (POWER))
2283 /* Macros Affecting all Debug Formats. */
2285 /* A C expression that returns the DBX register number for the compiler
2286 register number REGNO. In simple cases, the value of this expression may be
2287 REGNO itself. But sometimes there are some registers that the compiler
2288 knows about and DBX does not, or vice versa. In such cases, some register
2289 may need to have one number in the compiler and another for DBX.
2291 If two registers have consecutive numbers inside GCC, and they can be
2292 used as a pair to hold a multiword value, then they *must* have consecutive
2293 numbers after renumbering with `DBX_REGISTER_NUMBER'. Otherwise, debuggers
2294 will be unable to access such a pair, because they expect register pairs to
2295 be consecutive in their own numbering scheme.
2297 If you find yourself defining `DBX_REGISTER_NUMBER' in way that does not
2298 preserve register pairs, then what you must do instead is redefine the
2299 actual register numbering scheme.
2301 This declaration is required. */
2302 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
2304 /* A C expression that returns the type of debugging output GCC produces
2305 when the user specifies `-g' or `-ggdb'. Define this if you have arranged
2306 for GCC to support more than one format of debugging output. Currently,
2307 the allowable values are `DBX_DEBUG', `SDB_DEBUG', `DWARF_DEBUG',
2308 `DWARF2_DEBUG', and `XCOFF_DEBUG'.
2310 The value of this macro only affects the default debugging output; the user
2311 can always get a specific type of output by using `-gstabs', `-gcoff',
2312 `-gdwarf-1', `-gdwarf-2', or `-gxcoff'.
2314 Defined in svr4.h. */
2315 #undef PREFERRED_DEBUGGING_TYPE
2316 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
2318 /* Miscellaneous Parameters. */
2320 /* An alias for a machine mode name. This is the machine mode that elements of
2321 a jump-table should have. */
2322 #define CASE_VECTOR_MODE SImode
2324 /* Define this macro if operations between registers with integral mode smaller
2325 than a word are always performed on the entire register. Most RISC machines
2326 have this property and most CISC machines do not. */
2327 #define WORD_REGISTER_OPERATIONS
2329 /* Define this macro to be a C expression indicating when insns that read
2330 memory in MODE, an integral mode narrower than a word, set the bits outside
2331 of MODE to be either the sign-extension or the zero-extension of the data
2332 read. Return `SIGN_EXTEND' for values of MODE for which the insn
2333 sign-extends, `ZERO_EXTEND' for which it zero-extends, and `UNKNOWN' for other
2336 This macro is not called with MODE non-integral or with a width greater than
2337 or equal to `BITS_PER_WORD', so you may return any value in this case. Do
2338 not define this macro if it would always return `UNKNOWN'. On machines where
2339 this macro is defined, you will normally define it as the constant
2340 `SIGN_EXTEND' or `ZERO_EXTEND'. */
2341 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
2343 /* Define if loading short immediate values into registers sign extends. */
2344 #define SHORT_IMMEDIATES_SIGN_EXTEND
2346 /* The maximum number of bytes that a single instruction can move quickly from
2347 memory to memory. */
2350 /* A C expression which is nonzero if on this machine it is safe to "convert"
2351 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
2352 than INPREC) by merely operating on it as if it had only OUTPREC bits.
2354 On many machines, this expression can be 1.
2356 When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for modes for
2357 which `MODES_TIEABLE_P' is 0, suboptimal code can result. If this is the
2358 case, making `TRULY_NOOP_TRUNCATION' return 0 in such cases may improve
2360 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2362 /* An alias for the machine mode for pointers. On most machines, define this
2363 to be the integer mode corresponding to the width of a hardware pointer;
2364 `SImode' on 32-bit machine or `DImode' on 64-bit machines. On some machines
2365 you must define this to be one of the partial integer modes, such as
2368 The width of `Pmode' must be at least as large as the value of
2369 `POINTER_SIZE'. If it is not equal, you must define the macro
2370 `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to `Pmode'. */
2371 #define Pmode SImode
2373 /* An alias for the machine mode used for memory references to functions being
2374 called, in `call' RTL expressions. On most machines this should be
2376 #define FUNCTION_MODE QImode
2378 /* Define this macro to handle System V style pragmas: #pragma pack and
2379 #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is
2382 Defined in svr4.h. */
2383 #define HANDLE_SYSV_PRAGMA 1
2385 /* A C expression for the maximum number of instructions to execute via
2386 conditional execution instructions instead of a branch. A value of
2387 BRANCH_COST+1 is the default if the machine does not use
2388 cc0, and 1 if it does use cc0. */
2389 #define MAX_CONDITIONAL_EXECUTE frv_condexec_insns
2391 /* A C expression to modify the code described by the conditional if
2392 information CE_INFO, possibly updating the tests in TRUE_EXPR, and
2393 FALSE_EXPR for converting if-then and if-then-else code to conditional
2394 instructions. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if the
2395 tests cannot be converted. */
2396 #define IFCVT_MODIFY_TESTS(CE_INFO, TRUE_EXPR, FALSE_EXPR) \
2397 frv_ifcvt_modify_tests (CE_INFO, &TRUE_EXPR, &FALSE_EXPR)
2399 /* A C expression to modify the code described by the conditional if
2400 information CE_INFO, for the basic block BB, possibly updating the tests in
2401 TRUE_EXPR, and FALSE_EXPR for converting the && and || parts of if-then or
2402 if-then-else code to conditional instructions. OLD_TRUE and OLD_FALSE are
2403 the previous tests. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if
2404 the tests cannot be converted. */
2405 #define IFCVT_MODIFY_MULTIPLE_TESTS(CE_INFO, BB, TRUE_EXPR, FALSE_EXPR) \
2406 frv_ifcvt_modify_multiple_tests (CE_INFO, BB, &TRUE_EXPR, &FALSE_EXPR)
2408 /* A C expression to modify the code described by the conditional if
2409 information CE_INFO with the new PATTERN in INSN. If PATTERN is a null
2410 pointer after the IFCVT_MODIFY_INSN macro executes, it is assumed that that
2411 insn cannot be converted to be executed conditionally. */
2412 #define IFCVT_MODIFY_INSN(CE_INFO, PATTERN, INSN) \
2413 (PATTERN) = frv_ifcvt_modify_insn (CE_INFO, PATTERN, INSN)
2415 /* A C expression to perform any final machine dependent modifications in
2416 converting code to conditional execution in the code described by the
2417 conditional if information CE_INFO. */
2418 #define IFCVT_MODIFY_FINAL(CE_INFO) frv_ifcvt_modify_final (CE_INFO)
2420 /* A C expression to cancel any machine dependent modifications in converting
2421 code to conditional execution in the code described by the conditional if
2422 information CE_INFO. */
2423 #define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO)
2425 /* Initialize the extra fields provided by IFCVT_EXTRA_FIELDS. */
2426 #define IFCVT_INIT_EXTRA_FIELDS(CE_INFO) frv_ifcvt_init_extra_fields (CE_INFO)
2428 /* The definition of the following macro results in that the 2nd jump
2429 optimization (after the 2nd insn scheduling) is minimal. It is
2430 necessary to define when start cycle marks of insns (TImode is used
2431 for this) is used for VLIW insn packing. Some jump optimizations
2432 make such marks invalid. These marks are corrected for some
2433 (minimal) optimizations. ??? Probably the macro is temporary.
2434 Final solution could making the 2nd jump optimizations before the
2435 2nd instruction scheduling or corrections of the marks for all jump
2436 optimizations. Although some jump optimizations are actually
2437 deoptimizations for VLIW (super-scalar) processors. */
2439 #define MINIMAL_SECOND_JUMP_OPTIMIZATION
2442 /* If the following macro is defined and nonzero and deterministic
2443 finite state automata are used for pipeline hazard recognition, we
2444 will try to exchange insns in queue ready to improve the schedule.
2445 The more macro value, the more tries will be made. */
2446 #define FIRST_CYCLE_MULTIPASS_SCHEDULING 1
2448 /* The following macro is used only when value of
2449 FIRST_CYCLE_MULTIPASS_SCHEDULING is nonzero. The more macro value,
2450 the more tries will be made to choose better schedule. If the
2451 macro value is zero or negative there will be no multi-pass
2453 #define FIRST_CYCLE_MULTIPASS_SCHEDULING_LOOKAHEAD frv_sched_lookahead
2464 FRV_BUILTIN_MADDHSS,
2465 FRV_BUILTIN_MADDHUS,
2466 FRV_BUILTIN_MSUBHSS,
2467 FRV_BUILTIN_MSUBHUS,
2469 FRV_BUILTIN_MQADDHSS,
2470 FRV_BUILTIN_MQADDHUS,
2471 FRV_BUILTIN_MQSUBHSS,
2472 FRV_BUILTIN_MQSUBHUS,
2473 FRV_BUILTIN_MUNPACKH,
2474 FRV_BUILTIN_MDPACKH,
2485 FRV_BUILTIN_MEXPDHW,
2486 FRV_BUILTIN_MEXPDHD,
2489 FRV_BUILTIN_MMULXHS,
2490 FRV_BUILTIN_MMULXHU,
2495 FRV_BUILTIN_MQMULHS,
2496 FRV_BUILTIN_MQMULHU,
2497 FRV_BUILTIN_MQMULXHU,
2498 FRV_BUILTIN_MQMULXHS,
2499 FRV_BUILTIN_MQMACHS,
2500 FRV_BUILTIN_MQMACHU,
2505 FRV_BUILTIN_MQCPXRS,
2506 FRV_BUILTIN_MQCPXRU,
2507 FRV_BUILTIN_MQCPXIS,
2508 FRV_BUILTIN_MQCPXIU,
2512 FRV_BUILTIN_MWTACCG,
2514 FRV_BUILTIN_MRDACCG,
2516 FRV_BUILTIN_MCLRACC,
2517 FRV_BUILTIN_MCLRACCA,
2518 FRV_BUILTIN_MDUNPACKH,
2520 FRV_BUILTIN_MQXMACHS,
2521 FRV_BUILTIN_MQXMACXHS,
2522 FRV_BUILTIN_MQMACXHS,
2523 FRV_BUILTIN_MADDACCS,
2524 FRV_BUILTIN_MSUBACCS,
2525 FRV_BUILTIN_MASACCS,
2526 FRV_BUILTIN_MDADDACCS,
2527 FRV_BUILTIN_MDSUBACCS,
2528 FRV_BUILTIN_MDASACCS,
2530 FRV_BUILTIN_MDROTLI,
2533 FRV_BUILTIN_MDCUTSSI,
2534 FRV_BUILTIN_MQSATHS,
2535 FRV_BUILTIN_MQLCLRHS,
2536 FRV_BUILTIN_MQLMTHS,
2537 FRV_BUILTIN_MQSLLHI,
2538 FRV_BUILTIN_MQSRAHI,
2539 FRV_BUILTIN_MHSETLOS,
2540 FRV_BUILTIN_MHSETLOH,
2541 FRV_BUILTIN_MHSETHIS,
2542 FRV_BUILTIN_MHSETHIH,
2543 FRV_BUILTIN_MHDSETS,
2544 FRV_BUILTIN_MHDSETH,
2547 FRV_BUILTIN_PREFETCH0,
2548 FRV_BUILTIN_PREFETCH,
2556 FRV_BUILTIN_IACCreadll,
2557 FRV_BUILTIN_IACCreadl,
2558 FRV_BUILTIN_IACCsetll,
2559 FRV_BUILTIN_IACCsetl,
2566 FRV_BUILTIN_WRITE16,
2567 FRV_BUILTIN_WRITE32,
2570 #define FRV_BUILTIN_FIRST_NONMEDIA FRV_BUILTIN_SMUL
2572 /* Enable prototypes on the call rtl functions. */
2573 #define MD_CALL_PROTOTYPES 1
2575 #define CPU_UNITS_QUERY 1
2577 #ifdef __FRV_FDPIC__
2578 #define CRT_GET_RFIB_DATA(dbase) \
2579 ({ extern void *_GLOBAL_OFFSET_TABLE_; (dbase) = &_GLOBAL_OFFSET_TABLE_; })
2582 #endif /* __FRV_H__ */
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