1 /* Definitions of target machine for GNU compiler, for CRX.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 3, or (at your
11 option) any later version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 /*****************************************************************************/
26 /* CONTROLLING THE DRIVER */
27 /*****************************************************************************/
29 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
30 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
31 %{!fexceptions:-fno-exceptions} \
32 %{!fthreadsafe-statics:-fno-threadsafe-statics}"
35 #define STARTFILE_SPEC "crti.o%s crtbegin.o%s"
38 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
41 #define MATH_LIBRARY ""
43 /*****************************************************************************/
44 /* RUN-TIME TARGET SPECIFICATION */
45 /*****************************************************************************/
47 #ifndef TARGET_CPU_CPP_BUILTINS
48 #define TARGET_CPU_CPP_BUILTINS() \
50 builtin_define("__CRX__"); \
51 builtin_define("__CR__"); \
55 #define TARGET_VERSION fputs (" (CRX/ELF)", stderr);
57 /* Show we can debug even without a frame pointer. */
58 #define CAN_DEBUG_WITHOUT_FP
60 /*****************************************************************************/
62 /*****************************************************************************/
64 #define BITS_BIG_ENDIAN 0
66 #define BYTES_BIG_ENDIAN 0
68 #define WORDS_BIG_ENDIAN 0
70 #define UNITS_PER_WORD 4
72 #define POINTER_SIZE 32
74 #define PARM_BOUNDARY 32
76 #define STACK_BOUNDARY 32
78 #define FUNCTION_BOUNDARY 32
80 #define STRUCTURE_SIZE_BOUNDARY 32
82 #define BIGGEST_ALIGNMENT 32
84 /* In CRX arrays of chars are word-aligned, so strcpy() will be faster. */
85 #define DATA_ALIGNMENT(TYPE, ALIGN) \
86 (TREE_CODE (TYPE) == ARRAY_TYPE && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
87 && (ALIGN) < BITS_PER_WORD \
88 ? (BITS_PER_WORD) : (ALIGN))
90 /* In CRX strings are word-aligned so strcpy from constants will be faster. */
91 #define CONSTANT_ALIGNMENT(CONSTANT, ALIGN) \
92 (TREE_CODE (CONSTANT) == STRING_CST && (ALIGN) < BITS_PER_WORD \
93 ? (BITS_PER_WORD) : (ALIGN))
95 #define STRICT_ALIGNMENT 0
97 #define PCC_BITFIELD_TYPE_MATTERS 1
99 /*****************************************************************************/
100 /* LAYOUT OF SOURCE LANGUAGE DATA TYPES */
101 /*****************************************************************************/
103 #define INT_TYPE_SIZE 32
105 #define SHORT_TYPE_SIZE 16
107 #define LONG_TYPE_SIZE 32
109 #define LONG_LONG_TYPE_SIZE 64
111 #define FLOAT_TYPE_SIZE 32
113 #define DOUBLE_TYPE_SIZE 64
115 #define LONG_DOUBLE_TYPE_SIZE 64
117 #define DEFAULT_SIGNED_CHAR 1
119 #define SIZE_TYPE "unsigned int"
121 #define PTRDIFF_TYPE "int"
123 /*****************************************************************************/
124 /* REGISTER USAGE. */
125 /*****************************************************************************/
127 #define FIRST_PSEUDO_REGISTER 19
129 /* On the CRX, only the stack pointer (r15) is such. */
130 #define FIXED_REGISTERS \
132 /* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 */ \
133 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
134 /* r11 r12 r13 ra sp r16 r17 cc */ \
135 0, 0, 0, 0, 1, 0, 0, 1 \
138 /* On the CRX, calls clobbers r0-r6 (scratch registers), ra (the return address)
139 * and sp - (the stack pointer which is fixed). */
140 #define CALL_USED_REGISTERS \
142 /* r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 */ \
143 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
144 /* r11 r12 r13 ra sp r16 r17 cc */ \
145 0, 0, 0, 1, 1, 1, 1, 1 \
148 #define HARD_REGNO_NREGS(REGNO, MODE) \
149 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
151 /* On the CRX architecture, HILO regs can only hold SI mode. */
152 #define HARD_REGNO_MODE_OK(REGNO, MODE) crx_hard_regno_mode_ok(REGNO, MODE)
154 /* So far no patterns for moving CCMODE data are available */
155 #define AVOID_CCMODE_COPIES
157 /* Interrupt functions can only use registers that have already been saved by
158 * the prologue, even if they would normally be call-clobbered. */
159 #define HARD_REGNO_RENAME_OK(SRC, DEST) \
160 (!crx_interrupt_function_p () || df_regs_ever_live_p (DEST))
162 #define MODES_TIEABLE_P(MODE1, MODE2) 1
176 #define N_REG_CLASSES (int) LIM_REG_CLASSES
178 /* The following macro defines cover classes for Integrated Register
179 Allocator. Cover classes is a set of non-intersected register
180 classes covering all hard registers used for register allocation
181 purpose. Any move between two registers of a cover class should be
182 cheaper than load or store of the registers. The macro value is
183 array of register classes with LIM_REG_CLASSES used as the end
186 #define IRA_COVER_CLASSES \
188 GENERAL_REGS, LIM_REG_CLASSES \
191 #define REG_CLASS_NAMES \
202 #define REG_CLASS_CONTENTS \
204 {0x00000000}, /* NO_REGS */ \
205 {0x00010000}, /* LO_REGS : 16 */ \
206 {0x00020000}, /* HI_REGS : 17 */ \
207 {0x00030000}, /* HILO_REGS : 16, 17 */ \
208 {0x00007fff}, /* NOSP_REGS : 0 - 14 */ \
209 {0x0000ffff}, /* GENERAL_REGS : 0 - 15 */ \
210 {0x0007ffff} /* ALL_REGS : 0 - 18 */ \
213 #define REGNO_REG_CLASS(REGNO) crx_regno_reg_class(REGNO)
215 #define BASE_REG_CLASS GENERAL_REGS
217 #define INDEX_REG_CLASS GENERAL_REGS
219 #define REG_CLASS_FROM_LETTER(C) \
220 ((C) == 'b' ? NOSP_REGS : \
221 (C) == 'l' ? LO_REGS : \
222 (C) == 'h' ? HI_REGS : \
223 (C) == 'k' ? HILO_REGS : \
226 #define REGNO_OK_FOR_BASE_P(REGNO) \
228 || (reg_renumber && (unsigned)reg_renumber[REGNO] < 16))
230 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
232 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
234 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
235 crx_secondary_reload_class (CLASS, MODE, X)
237 #define CLASS_MAX_NREGS(CLASS, MODE) \
238 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD
240 #define SIGNED_INT_FITS_N_BITS(imm, N) \
241 ((((imm) < ((long long)1<<((N)-1))) && ((imm) >= -((long long)1<<((N)-1)))) ? 1 : 0)
243 #define UNSIGNED_INT_FITS_N_BITS(imm, N) \
244 (((imm) < ((long long)1<<(N)) && (imm) >= (long long)0) ? 1 : 0)
246 #define HILO_REGNO_P(regno) \
247 (reg_classes_intersect_p(REGNO_REG_CLASS(regno), HILO_REGS))
249 #define INT_CST4(VALUE) \
250 (((VALUE) >= -1 && (VALUE) <= 4) || (VALUE) == -4 \
251 || (VALUE) == 7 || (VALUE) == 8 || (VALUE) == 16 || (VALUE) == 32 \
252 || (VALUE) == 20 || (VALUE) == 12 || (VALUE) == 48)
254 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
255 /* Legal const for store immediate instructions */ \
256 ((C) == 'I' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 3) : \
257 (C) == 'J' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 4) : \
258 (C) == 'K' ? UNSIGNED_INT_FITS_N_BITS(VALUE, 5) : \
259 (C) == 'L' ? INT_CST4(VALUE) : \
262 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
263 ((C) == 'G' ? crx_const_double_ok (VALUE) : \
266 /*****************************************************************************/
267 /* STACK LAYOUT AND CALLING CONVENTIONS. */
268 /*****************************************************************************/
270 #define STACK_GROWS_DOWNWARD
272 #define STARTING_FRAME_OFFSET 0
274 #define STACK_POINTER_REGNUM 15
276 #define FRAME_POINTER_REGNUM 13
278 #define ARG_POINTER_REGNUM 12
280 #define STATIC_CHAIN_REGNUM 1
282 #define RETURN_ADDRESS_REGNUM 14
284 #define FIRST_PARM_OFFSET(FNDECL) 0
286 #define ELIMINABLE_REGS \
288 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
289 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
290 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
293 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
295 (OFFSET) = crx_initial_elimination_offset ((FROM), (TO)); \
298 /*****************************************************************************/
299 /* PASSING FUNCTION ARGUMENTS */
300 /*****************************************************************************/
302 #define ACCUMULATE_OUTGOING_ARGS (TARGET_NO_PUSH_ARGS)
304 #define PUSH_ARGS (!TARGET_NO_PUSH_ARGS)
306 #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3)
308 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
309 ((rtx) crx_function_arg(&(CUM), (MODE), (TYPE), (NAMED)))
311 #ifndef CUMULATIVE_ARGS
312 struct cumulative_args
317 #define CUMULATIVE_ARGS struct cumulative_args
320 /* On the CRX architecture, Varargs routines should receive their parameters on
323 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
324 crx_init_cumulative_args(&(CUM), (FNTYPE), (LIBNAME))
326 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
327 crx_function_arg_advance(&(CUM), (MODE), (TYPE), (NAMED))
329 #define FUNCTION_ARG_REGNO_P(REGNO) crx_function_arg_regno_p(REGNO)
331 /*****************************************************************************/
332 /* RETURNING FUNCTION VALUE */
333 /*****************************************************************************/
335 /* On the CRX, the return value is in R0 */
337 #define FUNCTION_VALUE(VALTYPE, FUNC) \
338 gen_rtx_REG(TYPE_MODE (VALTYPE), 0)
340 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
342 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
344 #define CRX_STRUCT_VALUE_REGNUM 0
346 /*****************************************************************************/
347 /* GENERATING CODE FOR PROFILING - NOT IMPLEMENTED */
348 /*****************************************************************************/
350 #undef FUNCTION_PROFILER
351 #define FUNCTION_PROFILER(STREAM, LABELNO) \
353 sorry ("Profiler support for CRX"); \
356 /*****************************************************************************/
357 /* TRAMPOLINES FOR NESTED FUNCTIONS - NOT SUPPORTED */
358 /*****************************************************************************/
360 #define TRAMPOLINE_SIZE 32
362 /*****************************************************************************/
363 /* ADDRESSING MODES */
364 /*****************************************************************************/
366 #define CONSTANT_ADDRESS_P(X) \
367 (GET_CODE (X) == LABEL_REF \
368 || GET_CODE (X) == SYMBOL_REF \
369 || GET_CODE (X) == CONST \
370 || GET_CODE (X) == CONST_INT)
372 #define MAX_REGS_PER_ADDRESS 2
374 #define HAVE_POST_INCREMENT 1
375 #define HAVE_POST_DECREMENT 1
376 #define HAVE_POST_MODIFY_DISP 1
377 #define HAVE_POST_MODIFY_REG 0
380 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
381 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
383 #define REG_OK_FOR_BASE_P(X) 1
384 #define REG_OK_FOR_INDEX_P(X) 1
385 #endif /* REG_OK_STRICT */
387 #define LEGITIMATE_CONSTANT_P(X) 1
389 /*****************************************************************************/
390 /* CONDITION CODE STATUS */
391 /*****************************************************************************/
393 /*****************************************************************************/
394 /* RELATIVE COSTS OF OPERATIONS */
395 /*****************************************************************************/
397 #define MEMORY_MOVE_COST(MODE, CLASS, IN) crx_memory_move_cost(MODE, CLASS, IN)
398 /* Moving to processor register flushes pipeline - thus asymmetric */
399 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((TO != GENERAL_REGS) ? 8 : 2)
400 /* Assume best case (branch predicted) */
401 #define BRANCH_COST(speed_p, predictable_p) 2
403 #define SLOW_BYTE_ACCESS 1
405 /*****************************************************************************/
406 /* DIVIDING THE OUTPUT INTO SECTIONS */
407 /*****************************************************************************/
409 #define TEXT_SECTION_ASM_OP "\t.section\t.text"
411 #define DATA_SECTION_ASM_OP "\t.section\t.data"
413 #define BSS_SECTION_ASM_OP "\t.section\t.bss"
415 /*****************************************************************************/
416 /* POSITION INDEPENDENT CODE */
417 /*****************************************************************************/
419 #define PIC_OFFSET_TABLE_REGNUM 12
421 #define LEGITIMATE_PIC_OPERAND_P(X) 1
423 /*****************************************************************************/
424 /* ASSEMBLER FORMAT */
425 /*****************************************************************************/
427 #define GLOBAL_ASM_OP "\t.globl\t"
429 #undef USER_LABEL_PREFIX
430 #define USER_LABEL_PREFIX "_"
432 #undef ASM_OUTPUT_LABELREF
433 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
434 asm_fprintf (STREAM, "%U%s", (*targetm.strip_name_encoding) (NAME));
437 #define ASM_APP_ON "#APP\n"
440 #define ASM_APP_OFF "#NO_APP\n"
442 /*****************************************************************************/
443 /* INSTRUCTION OUTPUT */
444 /*****************************************************************************/
446 #define REGISTER_NAMES \
448 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
449 "r8", "r9", "r10", "r11", "r12", "r13", "ra", "sp", \
453 #define PRINT_OPERAND(STREAM, X, CODE) \
454 crx_print_operand(STREAM, X, CODE)
456 #define PRINT_OPERAND_ADDRESS(STREAM, ADDR) \
457 crx_print_operand_address(STREAM, ADDR)
459 /*****************************************************************************/
460 /* OUTPUT OF DISPATCH TABLES */
461 /*****************************************************************************/
463 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
464 asm_fprintf ((STREAM), "\t.long\t.L%d\n", (VALUE))
466 /*****************************************************************************/
467 /* ALIGNMENT IN ASSEMBLER FILE */
468 /*****************************************************************************/
470 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
471 asm_fprintf ((STREAM), "\t.align\t%d\n", 1 << (POWER))
473 /*****************************************************************************/
474 /* MISCELLANEOUS PARAMETERS */
475 /*****************************************************************************/
477 #define CASE_VECTOR_MODE Pmode
481 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
483 #define STORE_FLAG_VALUE 1
487 #define FUNCTION_MODE QImode
489 #endif /* ! GCC_CRX_H */