1 /* Definitions for GCC. Part of the machine description for CRIS.
2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by Axis Communications. Written by Hans-Peter Nilsson.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
31 #include "insn-config.h"
32 #include "conditions.h"
33 #include "insn-attr.h"
45 #include "target-def.h"
49 /* Usable when we have an amount to add or subtract, and want the
50 optimal size of the insn. */
51 #define ADDITIVE_SIZE_MODIFIER(size) \
52 ((size) <= 63 ? "q" : (size) <= 255 ? "u.b" : (size) <= 65535 ? "u.w" : ".d")
54 #define ASSERT_PLT_UNSPEC(x) \
57 if (XINT (x, 1) != CRIS_UNSPEC_PLT \
58 || (GET_CODE (XVECEXP (x, 0, 0)) != SYMBOL_REF \
59 && GET_CODE (XVECEXP (x, 0, 0)) != LABEL_REF)) \
63 #define LOSE_AND_RETURN(msgid, x) \
66 cris_operand_lossage (msgid, x); \
70 enum cris_retinsn_type
71 { CRIS_RETINSN_UNKNOWN = 0, CRIS_RETINSN_RET, CRIS_RETINSN_JUMP };
73 /* Per-function machine data. */
74 struct machine_function GTY(())
76 int needs_return_address_on_stack;
78 /* This is the number of registers we save in the prologue due to
82 enum cris_retinsn_type return_type;
85 /* This little fix suppresses the 'u' or 's' when '%e' in assembly
87 static char cris_output_insn_is_bound = 0;
89 /* This one suppresses printing out the "rPIC+" in
90 "rPIC+sym:GOTOFF+offset" when doing PIC. For a PLT symbol, it
91 suppresses outputting it as [rPIC+sym:GOTPLT] and outputs similarly
92 just the "sym:GOTOFF" part. */
93 static int cris_pic_sympart_only = 0;
95 /* In code for output macros, this is how we know whether e.g. constant
96 goes in code or in a static initializer. */
97 static int in_code = 0;
99 /* Fix for reg_overlap_mentioned_p. */
100 static int cris_reg_overlap_mentioned_p (rtx, rtx);
102 static void cris_print_base (rtx, FILE *);
104 static void cris_print_index (rtx, FILE *);
106 static void cris_output_addr_const (FILE *, rtx);
108 static struct machine_function * cris_init_machine_status (void);
110 static rtx cris_struct_value_rtx (tree, int);
112 static void cris_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode,
113 tree type, int *, int);
115 static int cris_initial_frame_pointer_offset (void);
117 static int saved_regs_mentioned (rtx);
119 static void cris_operand_lossage (const char *, rtx);
121 static int cris_reg_saved_in_regsave_area (unsigned int, bool);
123 static void cris_asm_output_mi_thunk
124 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
126 static void cris_file_start (void);
127 static void cris_init_libfuncs (void);
129 static bool cris_rtx_costs (rtx, int, int, int *);
130 static int cris_address_cost (rtx);
131 static bool cris_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode,
133 static int cris_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,
135 static tree cris_md_asm_clobbers (tree, tree, tree);
137 static bool cris_handle_option (size_t, const char *, int);
139 /* This is the argument from the "-max-stack-stackframe=" option. */
140 const char *cris_max_stackframe_str;
142 /* This is the argument from the "-march=" option. */
143 const char *cris_cpu_str;
145 /* This is the argument from the "-mtune=" option. */
146 const char *cris_tune_str;
148 /* This is the argument from the "-melinux-stacksize=" option. */
149 const char *cris_elinux_stacksize_str;
151 /* This is the parsed result of the "-max-stack-stackframe=" option. If
152 it (still) is zero, then there was no such option given. */
153 int cris_max_stackframe = 0;
155 /* This is the parsed result of the "-march=" option, if given. */
156 int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION;
158 #undef TARGET_ASM_ALIGNED_HI_OP
159 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
160 #undef TARGET_ASM_ALIGNED_SI_OP
161 #define TARGET_ASM_ALIGNED_SI_OP "\t.dword\t"
162 #undef TARGET_ASM_ALIGNED_DI_OP
163 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
165 /* We need to define these, since the 2byte, 4byte, 8byte op:s are only
166 available in ELF. These "normal" pseudos do not have any alignment
167 constraints or side-effects. */
168 #undef TARGET_ASM_UNALIGNED_HI_OP
169 #define TARGET_ASM_UNALIGNED_HI_OP TARGET_ASM_ALIGNED_HI_OP
171 #undef TARGET_ASM_UNALIGNED_SI_OP
172 #define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP
174 #undef TARGET_ASM_UNALIGNED_DI_OP
175 #define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP
177 #undef TARGET_ASM_OUTPUT_MI_THUNK
178 #define TARGET_ASM_OUTPUT_MI_THUNK cris_asm_output_mi_thunk
179 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
180 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
182 #undef TARGET_ASM_FILE_START
183 #define TARGET_ASM_FILE_START cris_file_start
185 #undef TARGET_INIT_LIBFUNCS
186 #define TARGET_INIT_LIBFUNCS cris_init_libfuncs
188 #undef TARGET_RTX_COSTS
189 #define TARGET_RTX_COSTS cris_rtx_costs
190 #undef TARGET_ADDRESS_COST
191 #define TARGET_ADDRESS_COST cris_address_cost
193 #undef TARGET_PROMOTE_FUNCTION_ARGS
194 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
195 #undef TARGET_STRUCT_VALUE_RTX
196 #define TARGET_STRUCT_VALUE_RTX cris_struct_value_rtx
197 #undef TARGET_SETUP_INCOMING_VARARGS
198 #define TARGET_SETUP_INCOMING_VARARGS cris_setup_incoming_varargs
199 #undef TARGET_PASS_BY_REFERENCE
200 #define TARGET_PASS_BY_REFERENCE cris_pass_by_reference
201 #undef TARGET_ARG_PARTIAL_BYTES
202 #define TARGET_ARG_PARTIAL_BYTES cris_arg_partial_bytes
203 #undef TARGET_MD_ASM_CLOBBERS
204 #define TARGET_MD_ASM_CLOBBERS cris_md_asm_clobbers
205 #undef TARGET_DEFAULT_TARGET_FLAGS
206 #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | CRIS_SUBTARGET_DEFAULT)
207 #undef TARGET_HANDLE_OPTION
208 #define TARGET_HANDLE_OPTION cris_handle_option
210 struct gcc_target targetm = TARGET_INITIALIZER;
212 /* Helper for cris_load_multiple_op and cris_ret_movem_op. */
215 cris_movem_load_rest_p (rtx op, int offs)
217 unsigned int reg_count = XVECLEN (op, 0) - offs;
223 unsigned int regno = 0;
225 /* Perform a quick check so we don't blow up below. FIXME: Adjust for
226 other than (MEM reg). */
228 || GET_CODE (XVECEXP (op, 0, offs)) != SET
229 || GET_CODE (SET_DEST (XVECEXP (op, 0, offs))) != REG
230 || GET_CODE (SET_SRC (XVECEXP (op, 0, offs))) != MEM)
233 /* Check a possible post-inc indicator. */
234 if (GET_CODE (SET_SRC (XVECEXP (op, 0, offs + 1))) == PLUS)
236 rtx reg = XEXP (SET_SRC (XVECEXP (op, 0, offs + 1)), 0);
237 rtx inc = XEXP (SET_SRC (XVECEXP (op, 0, offs + 1)), 1);
243 || !REG_P (SET_DEST (XVECEXP (op, 0, offs + 1)))
244 || REGNO (reg) != REGNO (SET_DEST (XVECEXP (op, 0, offs + 1)))
245 || GET_CODE (inc) != CONST_INT
246 || INTVAL (inc) != (HOST_WIDE_INT) reg_count * 4)
253 /* FIXME: These two only for pre-v32. */
255 regno = reg_count - 1;
257 elt = XVECEXP (op, 0, offs);
258 src_addr = XEXP (SET_SRC (elt), 0);
260 if (GET_CODE (elt) != SET
261 || GET_CODE (SET_DEST (elt)) != REG
262 || GET_MODE (SET_DEST (elt)) != SImode
263 || REGNO (SET_DEST (elt)) != regno
264 || GET_CODE (SET_SRC (elt)) != MEM
265 || GET_MODE (SET_SRC (elt)) != SImode
266 || !memory_address_p (SImode, src_addr))
269 for (setno = 1; i < XVECLEN (op, 0); setno++, i++)
271 rtx elt = XVECEXP (op, 0, i);
274 if (GET_CODE (elt) != SET
275 || GET_CODE (SET_DEST (elt)) != REG
276 || GET_MODE (SET_DEST (elt)) != SImode
277 || REGNO (SET_DEST (elt)) != regno
278 || GET_CODE (SET_SRC (elt)) != MEM
279 || GET_MODE (SET_SRC (elt)) != SImode
280 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
281 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
282 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
283 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != setno * 4)
290 /* Worker function for predicate for the parallel contents in a movem
294 cris_store_multiple_op_p (rtx op)
296 int reg_count = XVECLEN (op, 0);
307 /* Perform a quick check so we don't blow up below. FIXME: Adjust for
308 other than (MEM reg) and (MEM (PLUS reg const)). */
312 elt = XVECEXP (op, 0, 0);
314 if (GET_CODE (elt) != SET)
317 dest = SET_DEST (elt);
319 if (GET_CODE (SET_SRC (elt)) != REG
320 || GET_CODE (dest) != MEM)
323 dest_addr = XEXP (dest, 0);
325 /* Check a possible post-inc indicator. */
326 if (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS)
328 rtx reg = XEXP (SET_SRC (XVECEXP (op, 0, 1)), 0);
329 rtx inc = XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1);
335 || !REG_P (SET_DEST (XVECEXP (op, 0, 1)))
336 || REGNO (reg) != REGNO (SET_DEST (XVECEXP (op, 0, 1)))
337 || GET_CODE (inc) != CONST_INT
338 /* Support increment by number of registers, and by the offset
339 of the destination, if it has the form (MEM (PLUS reg
341 || !((REG_P (dest_addr)
342 && REGNO (dest_addr) == REGNO (reg)
343 && INTVAL (inc) == (HOST_WIDE_INT) reg_count * 4)
344 || (GET_CODE (dest_addr) == PLUS
345 && REG_P (XEXP (dest_addr, 0))
346 && REGNO (XEXP (dest_addr, 0)) == REGNO (reg)
347 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT
348 && INTVAL (XEXP (dest_addr, 1)) == INTVAL (inc))))
356 /* FIXME: These two only for pre-v32. */
358 regno = reg_count - 1;
360 if (GET_CODE (elt) != SET
361 || GET_CODE (SET_SRC (elt)) != REG
362 || GET_MODE (SET_SRC (elt)) != SImode
363 || REGNO (SET_SRC (elt)) != (unsigned int) regno
364 || GET_CODE (SET_DEST (elt)) != MEM
365 || GET_MODE (SET_DEST (elt)) != SImode)
368 if (REG_P (dest_addr))
370 dest_base = dest_addr;
373 else if (GET_CODE (dest_addr) == PLUS
374 && REG_P (XEXP (dest_addr, 0))
375 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
377 dest_base = XEXP (dest_addr, 0);
378 offset = INTVAL (XEXP (dest_addr, 1));
383 for (setno = 1; i < XVECLEN (op, 0); setno++, i++)
385 rtx elt = XVECEXP (op, 0, i);
388 if (GET_CODE (elt) != SET
389 || GET_CODE (SET_SRC (elt)) != REG
390 || GET_MODE (SET_SRC (elt)) != SImode
391 || REGNO (SET_SRC (elt)) != (unsigned int) regno
392 || GET_CODE (SET_DEST (elt)) != MEM
393 || GET_MODE (SET_DEST (elt)) != SImode
394 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
395 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_base)
396 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
397 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != setno * 4 + offset)
404 /* The CONDITIONAL_REGISTER_USAGE worker. */
407 cris_conditional_register_usage (void)
409 /* FIXME: This isn't nice. We should be able to use that register for
410 something else if the PIC table isn't needed. */
412 fixed_regs[PIC_OFFSET_TABLE_REGNUM]
413 = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
415 if (TARGET_HAS_MUL_INSNS)
416 fixed_regs[CRIS_MOF_REGNUM] = 0;
419 /* Return current_function_uses_pic_offset_table. For use in cris.md,
420 since some generated files do not include function.h. */
423 cris_cfun_uses_pic_table (void)
425 return current_function_uses_pic_offset_table;
428 /* Given an rtx, return the text string corresponding to the CODE of X.
429 Intended for use in the assembly language output section of a
435 cris_output_insn_is_bound = 0;
436 switch (GET_CODE (x))
447 /* This function is for retrieving a part of an instruction name for
448 an operator, for immediate output. If that ever happens for
449 MULT, we need to apply TARGET_MUL_BUG in the caller. Make sure
487 /* Used to control the sign/zero-extend character for the 'e' modifier.
489 cris_output_insn_is_bound = 1;
494 return "Unknown operator";
499 /* Emit an error message when we're in an asm, and a fatal error for
500 "normal" insns. Formatted output isn't easily implemented, since we
501 use output_operand_lossage to output the actual message and handle the
502 categorization of the error. */
505 cris_operand_lossage (const char *msgid, rtx op)
508 output_operand_lossage ("%s", msgid);
511 /* Print an index part of an address to file. */
514 cris_print_index (rtx index, FILE *file)
516 rtx inner = XEXP (index, 0);
518 /* Make the index "additive" unless we'll output a negative number, in
519 which case the sign character is free (as in free beer). */
520 if (GET_CODE (index) != CONST_INT || INTVAL (index) >= 0)
524 fprintf (file, "$%s.b", reg_names[REGNO (index)]);
525 else if (CONSTANT_P (index))
526 cris_output_addr_const (file, index);
527 else if (GET_CODE (index) == MULT)
529 fprintf (file, "$%s.",
530 reg_names[REGNO (XEXP (index, 0))]);
532 putc (INTVAL (XEXP (index, 1)) == 2 ? 'w' : 'd', file);
534 else if (GET_CODE (index) == SIGN_EXTEND &&
535 GET_CODE (inner) == MEM)
537 rtx inner_inner = XEXP (inner, 0);
539 if (GET_CODE (inner_inner) == POST_INC)
541 fprintf (file, "[$%s+].",
542 reg_names[REGNO (XEXP (inner_inner, 0))]);
543 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
547 fprintf (file, "[$%s].", reg_names[REGNO (inner_inner)]);
549 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
552 else if (GET_CODE (index) == MEM)
554 if (GET_CODE (inner) == POST_INC)
555 fprintf (file, "[$%s+].d", reg_names[REGNO (XEXP (inner, 0))]);
557 fprintf (file, "[$%s].d", reg_names[REGNO (inner)]);
560 cris_operand_lossage ("unexpected index-type in cris_print_index",
564 /* Print a base rtx of an address to file. */
567 cris_print_base (rtx base, FILE *file)
570 fprintf (file, "$%s", reg_names[REGNO (base)]);
571 else if (GET_CODE (base) == POST_INC)
572 fprintf (file, "$%s+", reg_names[REGNO (XEXP (base, 0))]);
574 cris_operand_lossage ("unexpected base-type in cris_print_base",
578 /* Usable as a guard in expressions. */
581 cris_fatal (char *arg)
583 internal_error (arg);
585 /* We'll never get here; this is just to appease compilers. */
589 /* Return nonzero if REGNO is an ordinary register that *needs* to be
590 saved together with other registers, possibly by a MOVEM instruction,
591 or is saved for target-independent reasons. There may be
592 target-dependent reasons to save the register anyway; this is just a
593 wrapper for a complicated conditional. */
596 cris_reg_saved_in_regsave_area (unsigned int regno, bool got_really_used)
599 (((regs_ever_live[regno]
600 && !call_used_regs[regno])
601 || (regno == PIC_OFFSET_TABLE_REGNUM
603 /* It is saved anyway, if there would be a gap. */
605 && regs_ever_live[regno + 1]
606 && !call_used_regs[regno + 1]))))
607 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
608 && regno != CRIS_SRP_REGNUM)
609 || (current_function_calls_eh_return
610 && (regno == EH_RETURN_DATA_REGNO (0)
611 || regno == EH_RETURN_DATA_REGNO (1)
612 || regno == EH_RETURN_DATA_REGNO (2)
613 || regno == EH_RETURN_DATA_REGNO (3)));
616 /* Return nonzero if there are regs mentioned in the insn that are not all
617 in the call_used regs. This is part of the decision whether an insn
618 can be put in the epilogue. */
621 saved_regs_mentioned (rtx x)
627 /* Mainly stolen from refers_to_regno_p in rtlanal.c. */
635 return !call_used_regs[i];
638 /* If this is a SUBREG of a hard reg, we can see exactly which
639 registers are being modified. Otherwise, handle normally. */
640 i = REGNO (SUBREG_REG (x));
641 return !call_used_regs[i];
647 fmt = GET_RTX_FORMAT (code);
648 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
652 if (saved_regs_mentioned (XEXP (x, i)))
655 else if (fmt[i] == 'E')
658 for (j = XVECLEN (x, i) - 1; j >=0; j--)
659 if (saved_regs_mentioned (XEXP (x, i)))
667 /* The PRINT_OPERAND worker. */
670 cris_print_operand (FILE *file, rtx x, int code)
674 /* Size-strings corresponding to MULT expressions. */
675 static const char *const mults[] = { "BAD:0", ".b", ".w", "BAD:3", ".d" };
677 /* New code entries should just be added to the switch below. If
678 handling is finished, just return. If handling was just a
679 modification of the operand, the modified operand should be put in
680 "operand", and then do a break to let default handling
681 (zero-modifier) output the operand. */
686 /* Print the unsigned supplied integer as if it were signed
687 and < 0, i.e print 255 or 65535 as -1, 254, 65534 as -2, etc. */
688 if (GET_CODE (x) != CONST_INT
689 || ! CONST_OK_FOR_LETTER_P (INTVAL (x), 'O'))
690 LOSE_AND_RETURN ("invalid operand for 'b' modifier", x);
691 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
692 INTVAL (x)| (INTVAL (x) <= 255 ? ~255 : ~65535));
696 /* Print assembler code for operator. */
697 fprintf (file, "%s", cris_op_str (operand));
701 /* Print the operand without the PIC register. */
702 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
703 LOSE_AND_RETURN ("invalid operand for 'v' modifier", x);
704 cris_pic_sympart_only++;
705 cris_output_addr_const (file, x);
706 cris_pic_sympart_only--;
711 /* A movem modifier working on a parallel; output the register
715 if (GET_CODE (x) != PARALLEL)
716 LOSE_AND_RETURN ("invalid operand for 'o' modifier", x);
718 /* The second item can be (set reg (plus reg const)) to denote a
721 = (GET_CODE (SET_SRC (XVECEXP (x, 0, 1))) == PLUS
723 : XVECLEN (x, 0) - 1);
725 fprintf (file, "$%s", reg_names [regno]);
731 /* A similar movem modifier; output the memory operand. */
734 if (GET_CODE (x) != PARALLEL)
735 LOSE_AND_RETURN ("invalid operand for 'O' modifier", x);
737 /* The lowest mem operand is in the first item, but perhaps it
738 needs to be output as postincremented. */
739 addr = GET_CODE (SET_SRC (XVECEXP (x, 0, 0))) == MEM
740 ? XEXP (SET_SRC (XVECEXP (x, 0, 0)), 0)
741 : XEXP (SET_DEST (XVECEXP (x, 0, 0)), 0);
743 /* The second item can be a (set reg (plus reg const)) to denote
745 if (GET_CODE (SET_SRC (XVECEXP (x, 0, 1))) == PLUS)
747 /* It's a post-increment, if the address is a naked (reg). */
749 addr = gen_rtx_POST_INC (SImode, addr);
752 /* Otherwise, it's a side-effect; RN=RN+M. */
753 fprintf (file, "[$%s=$%s%s%d]",
754 reg_names [REGNO (SET_DEST (XVECEXP (x, 0, 1)))],
755 reg_names [REGNO (XEXP (addr, 0))],
756 INTVAL (XEXP (addr, 1)) < 0 ? "" : "+",
757 (int) INTVAL (XEXP (addr, 1)));
761 output_address (addr);
766 /* Print the PIC register. Applied to a GOT-less PIC symbol for
768 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
769 LOSE_AND_RETURN ("invalid operand for 'P' modifier", x);
770 fprintf (file, "$%s", reg_names [PIC_OFFSET_TABLE_REGNUM]);
774 /* Adjust a power of two to its log2. */
775 if (GET_CODE (x) != CONST_INT || exact_log2 (INTVAL (x)) < 0 )
776 LOSE_AND_RETURN ("invalid operand for 'p' modifier", x);
777 fprintf (file, "%d", exact_log2 (INTVAL (x)));
781 /* For an integer, print 'b' or 'w' if <= 255 or <= 65535
782 respectively. This modifier also terminates the inhibiting
783 effects of the 'x' modifier. */
784 cris_output_insn_is_bound = 0;
785 if (GET_MODE (x) == VOIDmode && GET_CODE (x) == CONST_INT)
789 if (INTVAL (x) <= 255)
791 else if (INTVAL (x) <= 65535)
801 /* For a non-integer, print the size of the operand. */
802 putc ((GET_MODE (x) == SImode || GET_MODE (x) == SFmode)
803 ? 'd' : GET_MODE (x) == HImode ? 'w'
804 : GET_MODE (x) == QImode ? 'b'
805 /* If none of the above, emit an erroneous size letter. */
811 /* Const_int: print b for -127 <= x <= 255,
812 w for -32768 <= x <= 65535, else abort. */
813 if (GET_CODE (x) != CONST_INT
814 || INTVAL (x) < -32768 || INTVAL (x) > 65535)
815 LOSE_AND_RETURN ("invalid operand for 'z' modifier", x);
816 putc (INTVAL (x) >= -128 && INTVAL (x) <= 255 ? 'b' : 'w', file);
820 /* Output a 'nop' if there's nothing for the delay slot.
821 This method stolen from the sparc files. */
822 if (dbr_sequence_length () == 0)
823 fputs ("\n\tnop", file);
827 /* Output directive for alignment padded with "nop" insns.
828 Optimizing for size, it's plain 4-byte alignment, otherwise we
829 align the section to a cache-line (32 bytes) and skip at max 2
830 bytes, i.e. we skip if it's the last insn on a cache-line. The
831 latter is faster by a small amount (for two test-programs 99.6%
832 and 99.9%) and larger by a small amount (ditto 100.1% and
833 100.2%). This is supposed to be the simplest yet performance-
834 wise least intrusive way to make sure the immediately following
835 (supposed) muls/mulu insn isn't located at the end of a
839 ? ".p2alignw 2,0x050f\n\t"
840 : ".p2alignw 5,0x050f,2\n\t", file);
844 /* Print high (most significant) part of something. */
845 switch (GET_CODE (operand))
848 /* If we're having 64-bit HOST_WIDE_INTs, the whole (DImode)
849 value is kept here, and so may be other than 0 or -1. */
850 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
851 INTVAL (operand_subword (operand, 1, 0, DImode)));
855 /* High part of a long long constant. */
856 if (GET_MODE (operand) == VOIDmode)
858 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_HIGH (x));
862 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
865 /* Print reg + 1. Check that there's not an attempt to print
866 high-parts of registers like stack-pointer or higher. */
867 if (REGNO (operand) > STACK_POINTER_REGNUM - 2)
868 LOSE_AND_RETURN ("bad register", operand);
869 fprintf (file, "$%s", reg_names[REGNO (operand) + 1]);
873 /* Adjust memory address to high part. */
875 rtx adj_mem = operand;
877 = GET_MODE_BITSIZE (GET_MODE (operand)) / BITS_PER_UNIT;
879 /* Adjust so we can use two SImode in DImode.
880 Calling adj_offsettable_operand will make sure it is an
881 offsettable address. Don't do this for a postincrement
882 though; it should remain as it was. */
883 if (GET_CODE (XEXP (adj_mem, 0)) != POST_INC)
885 = adjust_address (adj_mem, GET_MODE (adj_mem), size / 2);
887 output_address (XEXP (adj_mem, 0));
892 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
896 /* Strip the MEM expression. */
897 operand = XEXP (operand, 0);
901 /* Print 's' if operand is SIGN_EXTEND or 'u' if ZERO_EXTEND unless
902 cris_output_insn_is_bound is nonzero. */
903 if (GET_CODE (operand) != SIGN_EXTEND
904 && GET_CODE (operand) != ZERO_EXTEND
905 && GET_CODE (operand) != CONST_INT)
906 LOSE_AND_RETURN ("invalid operand for 'e' modifier", x);
908 if (cris_output_insn_is_bound)
910 cris_output_insn_is_bound = 0;
914 putc (GET_CODE (operand) == SIGN_EXTEND
915 || (GET_CODE (operand) == CONST_INT && INTVAL (operand) < 0)
920 /* Print the size letter of the inner element. We can do it by
921 calling ourselves with the 's' modifier. */
922 if (GET_CODE (operand) != SIGN_EXTEND && GET_CODE (operand) != ZERO_EXTEND)
923 LOSE_AND_RETURN ("invalid operand for 'm' modifier", x);
924 cris_print_operand (file, XEXP (operand, 0), 's');
928 /* Print the least significant part of operand. */
929 if (GET_CODE (operand) == CONST_DOUBLE)
931 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
934 else if (HOST_BITS_PER_WIDE_INT > 32 && GET_CODE (operand) == CONST_INT)
936 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
937 INTVAL (x) & ((unsigned int) 0x7fffffff * 2 + 1));
940 /* Otherwise the least significant part equals the normal part,
941 so handle it normally. */
945 /* When emitting an add for the high part of a DImode constant, we
946 want to use addq for 0 and adds.w for -1. */
947 if (GET_CODE (operand) != CONST_INT)
948 LOSE_AND_RETURN ("invalid operand for 'A' modifier", x);
949 fprintf (file, INTVAL (operand) < 0 ? "adds.w" : "addq");
953 /* If this is a GOT symbol, print it as :GOT regardless of -fpic. */
954 if (flag_pic && CONSTANT_P (operand) && cris_got_symbol (operand))
956 cris_output_addr_const (file, operand);
957 fprintf (file, ":GOT");
963 /* When emitting an sub for the high part of a DImode constant, we
964 want to use subq for 0 and subs.w for -1. */
965 if (GET_CODE (operand) != CONST_INT)
966 LOSE_AND_RETURN ("invalid operand for 'D' modifier", x);
967 fprintf (file, INTVAL (operand) < 0 ? "subs.w" : "subq");
971 /* Print the operand as the index-part of an address.
972 Easiest way out is to use cris_print_index. */
973 cris_print_index (operand, file);
977 /* Print the size letter for an operand to a MULT, which must be a
978 const_int with a suitable value. */
979 if (GET_CODE (operand) != CONST_INT || INTVAL (operand) > 4)
980 LOSE_AND_RETURN ("invalid operand for 'T' modifier", x);
981 fprintf (file, "%s", mults[INTVAL (operand)]);
985 /* No code, print as usual. */
989 LOSE_AND_RETURN ("invalid operand modifier letter", x);
992 /* Print an operand as without a modifier letter. */
993 switch (GET_CODE (operand))
996 if (REGNO (operand) > 15
997 && REGNO (operand) != CRIS_MOF_REGNUM
998 && REGNO (operand) != CRIS_SRP_REGNUM)
999 internal_error ("internal error: bad register: %d", REGNO (operand));
1000 fprintf (file, "$%s", reg_names[REGNO (operand)]);
1004 output_address (XEXP (operand, 0));
1008 if (GET_MODE (operand) == VOIDmode)
1009 /* A long long constant. */
1010 output_addr_const (file, operand);
1013 /* Only single precision is allowed as plain operands the
1014 moment. FIXME: REAL_VALUE_FROM_CONST_DOUBLE isn't
1019 /* FIXME: Perhaps check overflow of the "single". */
1020 REAL_VALUE_FROM_CONST_DOUBLE (r, operand);
1021 REAL_VALUE_TO_TARGET_SINGLE (r, l);
1023 fprintf (file, "0x%lx", l);
1028 ASSERT_PLT_UNSPEC (operand);
1032 cris_output_addr_const (file, operand);
1038 /* For a (MULT (reg X) const_int) we output "rX.S". */
1039 int i = GET_CODE (XEXP (operand, 1)) == CONST_INT
1040 ? INTVAL (XEXP (operand, 1)) : INTVAL (XEXP (operand, 0));
1041 rtx reg = GET_CODE (XEXP (operand, 1)) == CONST_INT
1042 ? XEXP (operand, 0) : XEXP (operand, 1);
1044 if (GET_CODE (reg) != REG
1045 || (GET_CODE (XEXP (operand, 0)) != CONST_INT
1046 && GET_CODE (XEXP (operand, 1)) != CONST_INT))
1047 LOSE_AND_RETURN ("unexpected multiplicative operand", x);
1049 cris_print_base (reg, file);
1050 fprintf (file, ".%c",
1051 i == 0 || (i == 1 && GET_CODE (operand) == MULT) ? 'b'
1053 : (i == 2 && GET_CODE (operand) == MULT) || i == 1 ? 'w'
1059 /* No need to handle all strange variants, let output_addr_const
1061 if (CONSTANT_P (operand))
1063 cris_output_addr_const (file, operand);
1067 LOSE_AND_RETURN ("unexpected operand", x);
1071 /* The PRINT_OPERAND_ADDRESS worker. */
1074 cris_print_operand_address (FILE *file, rtx x)
1076 /* All these were inside MEM:s so output indirection characters. */
1079 if (CONSTANT_ADDRESS_P (x))
1080 cris_output_addr_const (file, x);
1081 else if (BASE_OR_AUTOINCR_P (x))
1082 cris_print_base (x, file);
1083 else if (GET_CODE (x) == PLUS)
1091 cris_print_base (x1, file);
1092 cris_print_index (x2, file);
1094 else if (BASE_P (x2))
1096 cris_print_base (x2, file);
1097 cris_print_index (x1, file);
1100 LOSE_AND_RETURN ("unrecognized address", x);
1102 else if (GET_CODE (x) == MEM)
1104 /* A DIP. Output more indirection characters. */
1106 cris_print_base (XEXP (x, 0), file);
1110 LOSE_AND_RETURN ("unrecognized address", x);
1115 /* The RETURN_ADDR_RTX worker.
1116 We mark that the return address is used, either by EH or
1117 __builtin_return_address, for use by the function prologue and
1118 epilogue. FIXME: This isn't optimal; we just use the mark in the
1119 prologue and epilogue to say that the return address is to be stored
1120 in the stack frame. We could return SRP for leaf-functions and use the
1121 initial-value machinery. */
1124 cris_return_addr_rtx (int count, rtx frameaddr ATTRIBUTE_UNUSED)
1126 cfun->machine->needs_return_address_on_stack = 1;
1128 /* The return-address is stored just above the saved frame-pointer (if
1129 present). Apparently we can't eliminate from the frame-pointer in
1130 that direction, so use the incoming args (maybe pretended) pointer. */
1132 ? gen_rtx_MEM (Pmode, plus_constant (virtual_incoming_args_rtx, -4))
1136 /* Accessor used in cris.md:return because cfun->machine isn't available
1140 cris_return_address_on_stack (void)
1142 return regs_ever_live[CRIS_SRP_REGNUM]
1143 || cfun->machine->needs_return_address_on_stack;
1146 /* Accessor used in cris.md:return because cfun->machine isn't available
1150 cris_return_address_on_stack_for_return (void)
1152 return cfun->machine->return_type == CRIS_RETINSN_RET ? false
1153 : cris_return_address_on_stack ();
1156 /* This used to be the INITIAL_FRAME_POINTER_OFFSET worker; now only
1157 handles FP -> SP elimination offset. */
1160 cris_initial_frame_pointer_offset (void)
1164 /* Initial offset is 0 if we don't have a frame pointer. */
1166 bool got_really_used = current_function_uses_pic_offset_table;
1168 /* And 4 for each register pushed. */
1169 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1170 if (cris_reg_saved_in_regsave_area (regno, got_really_used))
1173 /* And then, last, we add the locals allocated. */
1174 offs += get_frame_size ();
1176 /* And more; the accumulated args size. */
1177 offs += current_function_outgoing_args_size;
1179 /* Then round it off, in case we use aligned stack. */
1180 if (TARGET_STACK_ALIGN)
1181 offs = TARGET_ALIGN_BY_32 ? (offs + 3) & ~3 : (offs + 1) & ~1;
1186 /* The INITIAL_ELIMINATION_OFFSET worker.
1187 Calculate the difference between imaginary registers such as frame
1188 pointer and the stack pointer. Used to eliminate the frame pointer
1189 and imaginary arg pointer. */
1192 cris_initial_elimination_offset (int fromreg, int toreg)
1195 = cris_initial_frame_pointer_offset ();
1197 /* We should be able to use regs_ever_live and related prologue
1198 information here, or alpha should not as well. */
1199 bool return_address_on_stack = cris_return_address_on_stack ();
1201 /* Here we act as if the frame-pointer were needed. */
1202 int ap_fp_offset = 4 + (return_address_on_stack ? 4 : 0);
1204 if (fromreg == ARG_POINTER_REGNUM
1205 && toreg == FRAME_POINTER_REGNUM)
1206 return ap_fp_offset;
1208 /* Between the frame pointer and the stack are only "normal" stack
1209 variables and saved registers. */
1210 if (fromreg == FRAME_POINTER_REGNUM
1211 && toreg == STACK_POINTER_REGNUM)
1212 return fp_sp_offset;
1214 /* We need to balance out the frame pointer here. */
1215 if (fromreg == ARG_POINTER_REGNUM
1216 && toreg == STACK_POINTER_REGNUM)
1217 return ap_fp_offset + fp_sp_offset - 4;
1222 /* This function looks into the pattern to see how this insn affects
1225 Used when to eliminate test insns before a condition-code user,
1226 such as a "scc" insn or a conditional branch. This includes
1227 checking if the entities that cc was updated by, are changed by the
1230 Currently a jumble of the old peek-inside-the-insn and the newer
1231 check-cc-attribute methods. */
1234 cris_notice_update_cc (rtx exp, rtx insn)
1236 /* Check if user specified "-mcc-init" as a bug-workaround. FIXME:
1237 TARGET_CCINIT does not work; we must set CC_REVERSED as below.
1238 Several testcases will otherwise fail, for example
1239 gcc.c-torture/execute/20000217-1.c -O0 and -O1. */
1246 /* Slowly, we're converting to using attributes to control the setting
1247 of condition-code status. */
1248 switch (get_attr_cc (insn))
1251 /* Even if it is "none", a setting may clobber a previous
1252 cc-value, so check. */
1253 if (GET_CODE (exp) == SET)
1255 if (cc_status.value1
1256 && modified_in_p (cc_status.value1, insn))
1257 cc_status.value1 = 0;
1259 if (cc_status.value2
1260 && modified_in_p (cc_status.value2, insn))
1261 cc_status.value2 = 0;
1270 /* Which means, for:
1275 CC is (reg) and (...) - unless (...) is 0, then CC does not change.
1276 CC_NO_OVERFLOW unless (...) is reg or mem.
1285 (set (reg1) (mem (bdap/biap)))
1286 (set (reg2) (bdap/biap))):
1287 CC is (reg1) and (mem (reg2))
1290 (set (mem (bdap/biap)) (reg1)) [or 0]
1291 (set (reg2) (bdap/biap))):
1294 (where reg and mem includes strict_low_parts variants thereof)
1296 For all others, assume CC is clobbered.
1297 Note that we do not have to care about setting CC_NO_OVERFLOW,
1298 since the overflow flag is set to 0 (i.e. right) for
1299 instructions where it does not have any sane sense, but where
1300 other flags have meanings. (This includes shifts; the carry is
1303 Note that there are other parallel constructs we could match,
1304 but we don't do that yet. */
1306 if (GET_CODE (exp) == SET)
1308 /* FIXME: Check when this happens. It looks like we should
1309 actually do a CC_STATUS_INIT here to be safe. */
1310 if (SET_DEST (exp) == pc_rtx)
1313 /* Record CC0 changes, so we do not have to output multiple
1315 if (SET_DEST (exp) == cc0_rtx)
1317 cc_status.value1 = SET_SRC (exp);
1318 cc_status.value2 = 0;
1320 /* Handle flags for the special btstq on one bit. */
1321 if (GET_CODE (SET_SRC (exp)) == ZERO_EXTRACT
1322 && XEXP (SET_SRC (exp), 1) == const1_rtx)
1324 if (GET_CODE (XEXP (SET_SRC (exp), 0)) == CONST_INT)
1326 cc_status.flags = CC_INVERTED;
1328 /* A one-bit btstq. */
1329 cc_status.flags = CC_Z_IN_NOT_N;
1332 cc_status.flags = 0;
1334 if (GET_CODE (SET_SRC (exp)) == COMPARE)
1336 if (!REG_P (XEXP (SET_SRC (exp), 0))
1337 && XEXP (SET_SRC (exp), 1) != const0_rtx)
1338 /* For some reason gcc will not canonicalize compare
1339 operations, reversing the sign by itself if
1340 operands are in wrong order. */
1341 /* (But NOT inverted; eq is still eq.) */
1342 cc_status.flags = CC_REVERSED;
1344 /* This seems to be overlooked by gcc. FIXME: Check again.
1345 FIXME: Is it really safe? */
1347 = gen_rtx_MINUS (GET_MODE (SET_SRC (exp)),
1348 XEXP (SET_SRC (exp), 0),
1349 XEXP (SET_SRC (exp), 1));
1353 else if (REG_P (SET_DEST (exp))
1354 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
1355 && REG_P (XEXP (SET_DEST (exp), 0))))
1357 /* A register is set; normally CC is set to show that no
1358 test insn is needed. Catch the exceptions. */
1360 /* If not to cc0, then no "set"s in non-natural mode give
1362 if (GET_MODE_SIZE (GET_MODE (SET_DEST (exp))) > UNITS_PER_WORD
1363 || GET_MODE_CLASS (GET_MODE (SET_DEST (exp))) == MODE_FLOAT)
1365 /* ... except add:s and sub:s in DImode. */
1366 if (GET_MODE (SET_DEST (exp)) == DImode
1367 && (GET_CODE (SET_SRC (exp)) == PLUS
1368 || GET_CODE (SET_SRC (exp)) == MINUS))
1370 cc_status.flags = 0;
1371 cc_status.value1 = SET_DEST (exp);
1372 cc_status.value2 = SET_SRC (exp);
1374 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1376 cc_status.value2 = 0;
1378 /* Add and sub may set V, which gets us
1379 unoptimizable results in "gt" and "le" condition
1381 cc_status.flags |= CC_NO_OVERFLOW;
1386 else if (SET_SRC (exp) == const0_rtx)
1388 /* There's no CC0 change when clearing a register or
1389 memory. Just check for overlap. */
1390 if (cc_status.value1
1391 && modified_in_p (cc_status.value1, insn))
1392 cc_status.value1 = 0;
1394 if (cc_status.value2
1395 && modified_in_p (cc_status.value2, insn))
1396 cc_status.value2 = 0;
1402 cc_status.flags = 0;
1403 cc_status.value1 = SET_DEST (exp);
1404 cc_status.value2 = SET_SRC (exp);
1406 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1408 cc_status.value2 = 0;
1410 /* Some operations may set V, which gets us
1411 unoptimizable results in "gt" and "le" condition
1413 if (GET_CODE (SET_SRC (exp)) == PLUS
1414 || GET_CODE (SET_SRC (exp)) == MINUS
1415 || GET_CODE (SET_SRC (exp)) == NEG)
1416 cc_status.flags |= CC_NO_OVERFLOW;
1421 else if (GET_CODE (SET_DEST (exp)) == MEM
1422 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
1423 && GET_CODE (XEXP (SET_DEST (exp), 0)) == MEM))
1425 /* When SET to MEM, then CC is not changed (except for
1427 if (cc_status.value1
1428 && modified_in_p (cc_status.value1, insn))
1429 cc_status.value1 = 0;
1431 if (cc_status.value2
1432 && modified_in_p (cc_status.value2, insn))
1433 cc_status.value2 = 0;
1438 else if (GET_CODE (exp) == PARALLEL)
1440 if (GET_CODE (XVECEXP (exp, 0, 0)) == SET
1441 && GET_CODE (XVECEXP (exp, 0, 1)) == SET
1442 && REG_P (XEXP (XVECEXP (exp, 0, 1), 0)))
1444 if (REG_P (XEXP (XVECEXP (exp, 0, 0), 0))
1445 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 1)) == MEM)
1447 /* For "move.S [rx=ry+o],rz", say CC reflects
1448 value1=rz and value2=[rx] */
1449 cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0);
1451 = replace_equiv_address (XEXP (XVECEXP (exp, 0, 0), 1),
1452 XEXP (XVECEXP (exp, 0, 1), 0));
1453 cc_status.flags = 0;
1455 /* Huh? A side-effect cannot change the destination
1457 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1459 internal_error ("internal error: sideeffect-insn affecting main effect");
1462 else if ((REG_P (XEXP (XVECEXP (exp, 0, 0), 1))
1463 || XEXP (XVECEXP (exp, 0, 0), 1) == const0_rtx)
1464 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 0)) == MEM)
1466 /* For "move.S rz,[rx=ry+o]" and "clear.S [rx=ry+o]",
1467 say flags are not changed, except for overlap. */
1468 if (cc_status.value1
1469 && modified_in_p (cc_status.value1, insn))
1470 cc_status.value1 = 0;
1472 if (cc_status.value2
1473 && modified_in_p (cc_status.value2, insn))
1474 cc_status.value2 = 0;
1483 /* Unknown cc_attr value. */
1490 /* Return != 0 if the return sequence for the current function is short,
1491 like "ret" or "jump [sp+]". Prior to reloading, we can't tell if
1492 registers must be saved, so return 0 then. */
1495 cris_simple_epilogue (void)
1498 unsigned int reglimit = STACK_POINTER_REGNUM;
1499 bool got_really_used = current_function_uses_pic_offset_table;
1501 if (! reload_completed
1502 || frame_pointer_needed
1503 || get_frame_size () != 0
1504 || current_function_pretend_args_size
1505 || current_function_args_size
1506 || current_function_outgoing_args_size
1507 || current_function_calls_eh_return
1509 /* If we're not supposed to emit prologue and epilogue, we must
1510 not emit return-type instructions. */
1511 || !TARGET_PROLOGUE_EPILOGUE)
1514 /* No simple epilogue if there are saved registers. */
1515 for (regno = 0; regno < reglimit; regno++)
1516 if (cris_reg_saved_in_regsave_area (regno, got_really_used))
1522 /* Expand a return insn (just one insn) marked as using SRP or stack
1523 slot depending on parameter ON_STACK. */
1526 cris_expand_return (bool on_stack)
1528 /* FIXME: emit a parallel with a USE for SRP or the stack-slot, to
1529 tell "ret" from "jump [sp+]". Some, but not all, other parts of
1530 GCC expect just (return) to do the right thing when optimizing, so
1531 we do that until they're fixed. Currently, all return insns in a
1532 function must be the same (not really a limiting factor) so we need
1533 to check that it doesn't change half-way through. */
1534 emit_jump_insn (gen_rtx_RETURN (VOIDmode));
1536 if ((cfun->machine->return_type == CRIS_RETINSN_RET && on_stack)
1537 || (cfun->machine->return_type == CRIS_RETINSN_JUMP && !on_stack))
1540 cfun->machine->return_type
1541 = on_stack ? CRIS_RETINSN_JUMP : CRIS_RETINSN_RET;
1544 /* Compute a (partial) cost for rtx X. Return true if the complete
1545 cost has been computed, and false if subexpressions should be
1546 scanned. In either case, *TOTAL contains the cost result. */
1549 cris_rtx_costs (rtx x, int code, int outer_code, int *total)
1555 HOST_WIDE_INT val = INTVAL (x);
1558 else if (val < 32 && val >= -32)
1560 /* Eight or 16 bits are a word and cycle more expensive. */
1561 else if (val <= 32767 && val >= -32768)
1563 /* A 32 bit constant (or very seldom, unsigned 16 bits) costs
1564 another word. FIXME: This isn't linear to 16 bits. */
1576 /* For PIC, we need a prefix (if it isn't already there),
1577 and the PIC register. For a global PIC symbol, we also
1578 need a read of the GOT. */
1581 if (cris_got_symbol (x))
1591 if (x != CONST0_RTX (GET_MODE (x) == VOIDmode ? DImode : GET_MODE (x)))
1594 /* Make 0.0 cheap, else test-insns will not be used. */
1599 /* Identify values that are no powers of two. Powers of 2 are
1600 taken care of already and those values should not be changed. */
1601 if (GET_CODE (XEXP (x, 1)) != CONST_INT
1602 || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
1604 /* If we have a multiply insn, then the cost is between
1605 1 and 2 "fast" instructions. */
1606 if (TARGET_HAS_MUL_INSNS)
1608 *total = COSTS_N_INSNS (1) + COSTS_N_INSNS (1) / 2;
1612 /* Estimate as 4 + 4 * #ofbits. */
1613 *total = COSTS_N_INSNS (132);
1622 if (GET_CODE (XEXP (x, 1)) != CONST_INT
1623 || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
1625 /* Estimate this as 4 + 8 * #of bits. */
1626 *total = COSTS_N_INSNS (260);
1632 if (GET_CODE (XEXP (x, 1)) == CONST_INT
1633 /* Two constants may actually happen before optimization. */
1634 && GET_CODE (XEXP (x, 0)) != CONST_INT
1635 && !CONST_OK_FOR_LETTER_P (INTVAL (XEXP (x, 1)), 'I'))
1637 *total = (rtx_cost (XEXP (x, 0), outer_code) + 2
1638 + 2 * GET_MODE_NUNITS (GET_MODE (XEXP (x, 0))));
1643 case ZERO_EXTEND: case SIGN_EXTEND:
1644 *total = rtx_cost (XEXP (x, 0), outer_code);
1652 /* The ADDRESS_COST worker. */
1655 cris_address_cost (rtx x)
1657 /* The metric to use for the cost-macros is unclear.
1658 The metric used here is (the number of cycles needed) / 2,
1659 where we consider equal a cycle for a word of code and a cycle to
1662 /* The cheapest addressing modes get 0, since nothing extra is needed. */
1663 if (BASE_OR_AUTOINCR_P (x))
1666 /* An indirect mem must be a DIP. This means two bytes extra for code,
1667 and 4 bytes extra for memory read, i.e. (2 + 4) / 2. */
1668 if (GET_CODE (x) == MEM)
1671 /* Assume (2 + 4) / 2 for a single constant; a dword, since it needs
1672 an extra DIP prefix and 4 bytes of constant in most cases.
1673 For PIC and a symbol with a GOT entry, we double the cost since we
1674 add a [rPIC+...] offset. A GOT-less symbol uses a BDAP prefix
1675 equivalent to the DIP prefix for non-PIC, hence the same cost. */
1677 return flag_pic && cris_got_symbol (x) ? 2 * (2 + 4) / 2 : (2 + 4) / 2;
1679 /* Handle BIAP and BDAP prefixes. */
1680 if (GET_CODE (x) == PLUS)
1682 rtx tem1 = XEXP (x, 0);
1683 rtx tem2 = XEXP (x, 1);
1685 /* A BIAP is 2 extra bytes for the prefix insn, nothing more. We
1686 recognize the typical MULT which is always in tem1 because of
1687 insn canonicalization. */
1688 if ((GET_CODE (tem1) == MULT && BIAP_INDEX_P (tem1))
1692 /* A BDAP (quick) is 2 extra bytes. Any constant operand to the
1693 PLUS is always found in tem2. */
1694 if (GET_CODE (tem2) == CONST_INT
1695 && INTVAL (tem2) < 128 && INTVAL (tem2) >= -128)
1698 /* A BDAP -32768 .. 32767 is like BDAP quick, but with 2 extra
1700 if (GET_CODE (tem2) == CONST_INT
1701 && CONST_OK_FOR_LETTER_P (INTVAL (tem2), 'L'))
1704 /* A BDAP with some other constant is 2 bytes extra. */
1705 if (CONSTANT_P (tem2))
1706 return (2 + 2 + 2) / 2;
1708 /* BDAP with something indirect should have a higher cost than
1709 BIAP with register. FIXME: Should it cost like a MEM or more? */
1710 /* Don't need to check it, it's the only one left.
1711 FIXME: There was a REG test missing, perhaps there are others.
1713 return (2 + 2 + 2) / 2;
1716 /* What else? Return a high cost. It matters only for valid
1717 addressing modes. */
1721 /* Check various objections to the side-effect. Used in the test-part
1722 of an anonymous insn describing an insn with a possible side-effect.
1723 Returns nonzero if the implied side-effect is ok.
1726 ops : An array of rtx:es. lreg, rreg, rval,
1727 The variables multop and other_op are indexes into this,
1728 or -1 if they are not applicable.
1729 lreg : The register that gets assigned in the side-effect.
1730 rreg : One register in the side-effect expression
1731 rval : The other register, or an int.
1732 multop : An integer to multiply rval with.
1733 other_op : One of the entities of the main effect,
1734 whose mode we must consider. */
1737 cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
1738 int lreg, int rreg, int rval,
1739 int multop, int other_op)
1741 /* Find what value to multiply with, for rx =ry + rz * n. */
1742 int mult = multop < 0 ? 1 : INTVAL (ops[multop]);
1744 rtx reg_rtx = ops[rreg];
1745 rtx val_rtx = ops[rval];
1747 /* The operands may be swapped. Canonicalize them in reg_rtx and
1748 val_rtx, where reg_rtx always is a reg (for this constraint to
1750 if (! BASE_P (reg_rtx))
1751 reg_rtx = val_rtx, val_rtx = ops[rreg];
1753 /* Don't forget to check that reg_rtx really is a reg. If it isn't,
1754 we have no business. */
1755 if (! BASE_P (reg_rtx))
1758 /* Don't do this when -mno-split. */
1759 if (!TARGET_SIDE_EFFECT_PREFIXES)
1762 /* The mult expression may be hidden in lreg. FIXME: Add more
1763 commentary about that. */
1764 if (GET_CODE (val_rtx) == MULT)
1766 mult = INTVAL (XEXP (val_rtx, 1));
1767 val_rtx = XEXP (val_rtx, 0);
1771 /* First check the "other operand". */
1774 if (GET_MODE_SIZE (GET_MODE (ops[other_op])) > UNITS_PER_WORD)
1777 /* Check if the lvalue register is the same as the "other
1778 operand". If so, the result is undefined and we shouldn't do
1779 this. FIXME: Check again. */
1780 if ((BASE_P (ops[lreg])
1781 && BASE_P (ops[other_op])
1782 && REGNO (ops[lreg]) == REGNO (ops[other_op]))
1783 || rtx_equal_p (ops[other_op], ops[lreg]))
1787 /* Do not accept frame_pointer_rtx as any operand. */
1788 if (ops[lreg] == frame_pointer_rtx || ops[rreg] == frame_pointer_rtx
1789 || ops[rval] == frame_pointer_rtx
1790 || (other_op >= 0 && ops[other_op] == frame_pointer_rtx))
1794 && ! BASE_P (val_rtx))
1797 /* Do not allow rx = rx + n if a normal add or sub with same size
1799 if (rtx_equal_p (ops[lreg], reg_rtx)
1800 && GET_CODE (val_rtx) == CONST_INT
1801 && (INTVAL (val_rtx) <= 63 && INTVAL (val_rtx) >= -63))
1804 /* Check allowed cases, like [r(+)?].[bwd] and const.
1805 A symbol is not allowed with PIC. */
1806 if (CONSTANT_P (val_rtx))
1807 return flag_pic == 0 || cris_symbol (val_rtx) == 0;
1809 if (GET_CODE (val_rtx) == MEM
1810 && BASE_OR_AUTOINCR_P (XEXP (val_rtx, 0)))
1813 if (GET_CODE (val_rtx) == SIGN_EXTEND
1814 && GET_CODE (XEXP (val_rtx, 0)) == MEM
1815 && BASE_OR_AUTOINCR_P (XEXP (XEXP (val_rtx, 0), 0)))
1818 /* If we got here, it's not a valid addressing mode. */
1821 else if (code == MULT
1822 || (code == PLUS && BASE_P (val_rtx)))
1824 /* Do not allow rx = rx + ry.S, since it doesn't give better code. */
1825 if (rtx_equal_p (ops[lreg], reg_rtx)
1826 || (mult == 1 && rtx_equal_p (ops[lreg], val_rtx)))
1829 /* Do not allow bad multiply-values. */
1830 if (mult != 1 && mult != 2 && mult != 4)
1833 /* Only allow r + ... */
1834 if (! BASE_P (reg_rtx))
1837 /* If we got here, all seems ok.
1838 (All checks need to be done above). */
1842 /* If we get here, the caller got its initial tests wrong. */
1843 internal_error ("internal error: cris_side_effect_mode_ok with bad operands");
1846 /* The function reg_overlap_mentioned_p in CVS (still as of 2001-05-16)
1847 does not handle the case where the IN operand is strict_low_part; it
1848 does handle it for X. Test-case in Axis-20010516. This function takes
1849 care of that for THIS port. FIXME: strict_low_part is going away
1853 cris_reg_overlap_mentioned_p (rtx x, rtx in)
1855 /* The function reg_overlap_mentioned now handles when X is
1856 strict_low_part, but not when IN is a STRICT_LOW_PART. */
1857 if (GET_CODE (in) == STRICT_LOW_PART)
1860 return reg_overlap_mentioned_p (x, in);
1863 /* The TARGET_ASM_NAMED_SECTION worker.
1864 We just dispatch to the functions for ELF and a.out. */
1867 cris_target_asm_named_section (const char *name, unsigned int flags,
1871 default_no_named_section (name, flags, decl);
1873 default_elf_asm_named_section (name, flags, decl);
1876 /* The LEGITIMATE_PIC_OPERAND_P worker. */
1879 cris_legitimate_pic_operand (rtx x)
1881 /* The PIC representation of a symbol with a GOT entry will be (for
1882 example; relocations differ):
1883 sym => [rPIC+sym:GOT]
1884 and for a GOT-less symbol it will be (for example, relocation differ):
1885 sym => rPIC+sym:GOTOFF
1886 so only a symbol with a GOT is by itself a valid operand, and it
1887 can't be a sum of a symbol and an offset. */
1888 return ! cris_symbol (x) || cris_got_symbol (x);
1891 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
1897 switch (GET_CODE (x))
1904 if (XINT (x, 1) == CRIS_UNSPEC_GOT || XINT (x, 1) != CRIS_UNSPEC_PLT)
1906 /* A PLT reference. */
1907 ASSERT_PLT_UNSPEC (x);
1911 return cris_symbol (XEXP (x, 0));
1915 return cris_symbol (XEXP (x, 0)) || cris_symbol (XEXP (x, 1));
1922 fatal_insn ("unrecognized supposed constant", x);
1928 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
1929 CONSTANT_P, and the symbol does not need a GOT entry. Also set
1930 current_function_uses_pic_offset_table if we're generating PIC and ever
1931 see something that would need one. */
1934 cris_gotless_symbol (rtx x)
1936 #ifdef ENABLE_CHECKING
1941 switch (GET_CODE (x))
1944 if (XINT (x, 1) == CRIS_UNSPEC_GOT)
1946 if (XINT (x, 1) != CRIS_UNSPEC_PLT)
1948 ASSERT_PLT_UNSPEC (x);
1953 current_function_uses_pic_offset_table = 1;
1954 return SYMBOL_REF_LOCAL_P (x);
1957 /* We don't set current_function_uses_pic_offset_table for
1958 LABEL_REF:s in here, since they are almost always originating
1959 from some branch. The only time it does not come from a label is
1960 when GCC does something like __builtin_setjmp. Then we get the
1961 LABEL_REF from the movsi expander, so we mark it there as a
1966 return cris_gotless_symbol (XEXP (x, 0));
1971 int x0 = cris_gotless_symbol (XEXP (x, 0)) != 0;
1972 int x1 = cris_gotless_symbol (XEXP (x, 1)) != 0;
1974 /* One and only one of them must be a local symbol. Neither must
1975 be some other, more general kind of symbol. */
1978 && ! (x0 == 0 && cris_symbol (XEXP (x, 0)))
1979 && ! (x1 == 0 && cris_symbol (XEXP (x, 1)));
1987 fatal_insn ("unrecognized supposed constant", x);
1993 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
1994 CONSTANT_P, and the symbol needs a GOT entry. */
1997 cris_got_symbol (rtx x)
1999 #ifdef ENABLE_CHECKING
2004 switch (GET_CODE (x))
2007 if (XINT (x, 1) == CRIS_UNSPEC_GOT)
2009 ASSERT_PLT_UNSPEC (x);
2014 current_function_uses_pic_offset_table = 1;
2015 return ! SYMBOL_REF_LOCAL_P (x);
2018 return cris_got_symbol (XEXP (x, 0));
2021 /* A LABEL_REF is never visible as a symbol outside the local
2025 /* Nope, can't access the GOT for "symbol + offset". */
2033 fatal_insn ("unrecognized supposed constant in cris_global_pic_symbol",
2040 /* TARGET_HANDLE_OPTION worker. We just store the values into local
2041 variables here. Checks for correct semantics are in
2042 cris_override_options. */
2045 cris_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED)
2053 + MASK_ALIGN_BY_32);
2056 case OPT_mno_etrax100:
2060 + MASK_ALIGN_BY_32);
2066 |= (MASK_STACK_ALIGN
2069 + MASK_ALIGN_BY_32);
2075 |= (MASK_STACK_ALIGN
2083 &= ~(MASK_STACK_ALIGN
2088 case OPT_max_stackframe_:
2089 case OPT_mmax_stackframe_:
2090 cris_max_stackframe_str = arg;
2099 cris_tune_str = arg;
2106 CRIS_SUBTARGET_HANDLE_OPTION(code, arg, value);
2111 /* The OVERRIDE_OPTIONS worker.
2112 As is the norm, this also parses -mfoo=bar type parameters. */
2115 cris_override_options (void)
2117 if (cris_max_stackframe_str)
2119 cris_max_stackframe = atoi (cris_max_stackframe_str);
2121 /* Do some sanity checking. */
2122 if (cris_max_stackframe < 0 || cris_max_stackframe > 0x20000000)
2123 internal_error ("-max-stackframe=%d is not usable, not between 0 and %d",
2124 cris_max_stackframe, 0x20000000);
2127 /* Let "-metrax4" and "-metrax100" change the cpu version. */
2128 if (TARGET_SVINTO && cris_cpu_version < CRIS_CPU_SVINTO)
2129 cris_cpu_version = CRIS_CPU_SVINTO;
2130 else if (TARGET_ETRAX4_ADD && cris_cpu_version < CRIS_CPU_ETRAX4)
2131 cris_cpu_version = CRIS_CPU_ETRAX4;
2133 /* Parse -march=... and its synonym, the deprecated -mcpu=... */
2137 = (*cris_cpu_str == 'v' ? atoi (cris_cpu_str + 1) : -1);
2139 if (strcmp ("etrax4", cris_cpu_str) == 0)
2140 cris_cpu_version = 3;
2142 if (strcmp ("svinto", cris_cpu_str) == 0
2143 || strcmp ("etrax100", cris_cpu_str) == 0)
2144 cris_cpu_version = 8;
2146 if (strcmp ("ng", cris_cpu_str) == 0
2147 || strcmp ("etrax100lx", cris_cpu_str) == 0)
2148 cris_cpu_version = 10;
2150 if (cris_cpu_version < 0 || cris_cpu_version > 10)
2151 error ("unknown CRIS version specification in -march= or -mcpu= : %s",
2154 /* Set the target flags. */
2155 if (cris_cpu_version >= CRIS_CPU_ETRAX4)
2156 target_flags |= MASK_ETRAX4_ADD;
2158 /* If this is Svinto or higher, align for 32 bit accesses. */
2159 if (cris_cpu_version >= CRIS_CPU_SVINTO)
2161 |= (MASK_SVINTO | MASK_ALIGN_BY_32
2162 | MASK_STACK_ALIGN | MASK_CONST_ALIGN
2165 /* Note that we do not add new flags when it can be completely
2166 described with a macro that uses -mcpu=X. So
2167 TARGET_HAS_MUL_INSNS is (cris_cpu_version >= CRIS_CPU_NG). */
2173 = (*cris_tune_str == 'v' ? atoi (cris_tune_str + 1) : -1);
2175 if (strcmp ("etrax4", cris_tune_str) == 0)
2178 if (strcmp ("svinto", cris_tune_str) == 0
2179 || strcmp ("etrax100", cris_tune_str) == 0)
2182 if (strcmp ("ng", cris_tune_str) == 0
2183 || strcmp ("etrax100lx", cris_tune_str) == 0)
2186 if (cris_tune < 0 || cris_tune > 10)
2187 error ("unknown CRIS cpu version specification in -mtune= : %s",
2190 if (cris_tune >= CRIS_CPU_SVINTO)
2191 /* We have currently nothing more to tune than alignment for
2194 |= (MASK_STACK_ALIGN | MASK_CONST_ALIGN
2195 | MASK_DATA_ALIGN | MASK_ALIGN_BY_32);
2200 /* Use error rather than warning, so invalid use is easily
2201 detectable. Still change to the values we expect, to avoid
2205 error ("-fPIC and -fpic are not supported in this configuration");
2209 /* Turn off function CSE. We need to have the addresses reach the
2210 call expanders to get PLT-marked, as they could otherwise be
2211 compared against zero directly or indirectly. After visiting the
2212 call expanders they will then be cse:ed, as the call expanders
2213 force_reg the addresses, effectively forcing flag_no_function_cse
2215 flag_no_function_cse = 1;
2218 if (write_symbols == DWARF2_DEBUG && ! TARGET_ELF)
2220 warning (0, "that particular -g option is invalid with -maout and -melinux");
2221 write_symbols = DBX_DEBUG;
2224 /* Set the per-function-data initializer. */
2225 init_machine_status = cris_init_machine_status;
2228 /* The TARGET_ASM_OUTPUT_MI_THUNK worker. */
2231 cris_asm_output_mi_thunk (FILE *stream,
2232 tree thunkdecl ATTRIBUTE_UNUSED,
2233 HOST_WIDE_INT delta,
2234 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
2238 fprintf (stream, "\tadd%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
2239 ADDITIVE_SIZE_MODIFIER (delta), delta,
2240 reg_names[CRIS_FIRST_ARG_REG]);
2242 fprintf (stream, "\tsub%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
2243 ADDITIVE_SIZE_MODIFIER (-delta), -delta,
2244 reg_names[CRIS_FIRST_ARG_REG]);
2248 const char *name = XSTR (XEXP (DECL_RTL (funcdecl), 0), 0);
2250 name = (* targetm.strip_name_encoding) (name);
2251 fprintf (stream, "add.d ");
2252 assemble_name (stream, name);
2253 fprintf (stream, "%s,$pc\n", CRIS_PLT_PCOFFSET_SUFFIX);
2257 fprintf (stream, "jump ");
2258 assemble_name (stream, XSTR (XEXP (DECL_RTL (funcdecl), 0), 0));
2259 fprintf (stream, "\n");
2263 /* Boilerplate emitted at start of file.
2265 NO_APP *only at file start* means faster assembly. It also means
2266 comments are not allowed. In some cases comments will be output
2267 for debugging purposes. Make sure they are allowed then.
2269 We want a .file directive only if TARGET_ELF. */
2271 cris_file_start (void)
2273 /* These expressions can vary at run time, so we cannot put
2274 them into TARGET_INITIALIZER. */
2275 targetm.file_start_app_off = !(TARGET_PDEBUG || flag_print_asm_name);
2276 targetm.file_start_file_directive = TARGET_ELF;
2278 default_file_start ();
2281 /* Rename the function calls for integer multiply and divide. */
2283 cris_init_libfuncs (void)
2285 set_optab_libfunc (smul_optab, SImode, "__Mul");
2286 set_optab_libfunc (sdiv_optab, SImode, "__Div");
2287 set_optab_libfunc (udiv_optab, SImode, "__Udiv");
2288 set_optab_libfunc (smod_optab, SImode, "__Mod");
2289 set_optab_libfunc (umod_optab, SImode, "__Umod");
2292 /* The INIT_EXPANDERS worker sets the per-function-data initializer and
2296 cris_init_expanders (void)
2298 /* Nothing here at the moment. */
2301 /* Zero initialization is OK for all current fields. */
2303 static struct machine_function *
2304 cris_init_machine_status (void)
2306 return ggc_alloc_cleared (sizeof (struct machine_function));
2309 /* Split a 2 word move (DI or presumably DF) into component parts.
2310 Originally a copy of gen_split_move_double in m32r.c. */
2313 cris_split_movdx (rtx *operands)
2315 enum machine_mode mode = GET_MODE (operands[0]);
2316 rtx dest = operands[0];
2317 rtx src = operands[1];
2320 /* We used to have to handle (SUBREG (MEM)) here, but that should no
2321 longer happen; after reload there are no SUBREGs any more, and we're
2322 only called after reload. */
2323 if (GET_CODE (dest) == SUBREG || GET_CODE (src) == SUBREG)
2327 if (GET_CODE (dest) == REG)
2329 int dregno = REGNO (dest);
2331 /* Reg-to-reg copy. */
2332 if (GET_CODE (src) == REG)
2334 int sregno = REGNO (src);
2336 int reverse = (dregno == sregno + 1);
2338 /* We normally copy the low-numbered register first. However, if
2339 the first register operand 0 is the same as the second register of
2340 operand 1, we must copy in the opposite order. */
2341 emit_insn (gen_rtx_SET (VOIDmode,
2342 operand_subword (dest, reverse, TRUE, mode),
2343 operand_subword (src, reverse, TRUE, mode)));
2345 emit_insn (gen_rtx_SET (VOIDmode,
2346 operand_subword (dest, !reverse, TRUE, mode),
2347 operand_subword (src, !reverse, TRUE, mode)));
2349 /* Constant-to-reg copy. */
2350 else if (GET_CODE (src) == CONST_INT || GET_CODE (src) == CONST_DOUBLE)
2353 split_double (src, &words[0], &words[1]);
2354 emit_insn (gen_rtx_SET (VOIDmode,
2355 operand_subword (dest, 0, TRUE, mode),
2358 emit_insn (gen_rtx_SET (VOIDmode,
2359 operand_subword (dest, 1, TRUE, mode),
2362 /* Mem-to-reg copy. */
2363 else if (GET_CODE (src) == MEM)
2365 /* If the high-address word is used in the address, we must load it
2366 last. Otherwise, load it first. */
2367 rtx addr = XEXP (src, 0);
2369 = (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
2371 /* The original code implies that we can't do
2372 move.x [rN+],rM move.x [rN],rM+1
2373 when rN is dead, because of REG_NOTES damage. That is
2374 consistent with what I've seen, so don't try it.
2376 We have two different cases here; if the addr is POST_INC,
2377 just pass it through, otherwise add constants. */
2379 if (GET_CODE (addr) == POST_INC)
2381 emit_insn (gen_rtx_SET (VOIDmode,
2382 operand_subword (dest, 0, TRUE, mode),
2383 change_address (src, SImode, addr)));
2384 emit_insn (gen_rtx_SET (VOIDmode,
2385 operand_subword (dest, 1, TRUE, mode),
2386 change_address (src, SImode, addr)));
2390 /* Make sure we don't get any other addresses with
2391 embedded postincrements. They should be stopped in
2392 GO_IF_LEGITIMATE_ADDRESS, but we're here for your
2394 if (side_effects_p (addr))
2395 fatal_insn ("unexpected side-effects in address", addr);
2397 emit_insn (gen_rtx_SET
2399 operand_subword (dest, reverse, TRUE, mode),
2402 plus_constant (addr,
2403 reverse * UNITS_PER_WORD))));
2404 emit_insn (gen_rtx_SET
2406 operand_subword (dest, ! reverse, TRUE, mode),
2409 plus_constant (addr,
2417 /* Reg-to-mem copy or clear mem. */
2418 else if (GET_CODE (dest) == MEM
2419 && (GET_CODE (src) == REG
2420 || src == const0_rtx
2421 || src == CONST0_RTX (DFmode)))
2423 rtx addr = XEXP (dest, 0);
2425 if (GET_CODE (addr) == POST_INC)
2427 emit_insn (gen_rtx_SET (VOIDmode,
2428 change_address (dest, SImode, addr),
2429 operand_subword (src, 0, TRUE, mode)));
2430 emit_insn (gen_rtx_SET (VOIDmode,
2431 change_address (dest, SImode, addr),
2432 operand_subword (src, 1, TRUE, mode)));
2436 /* Make sure we don't get any other addresses with embedded
2437 postincrements. They should be stopped in
2438 GO_IF_LEGITIMATE_ADDRESS, but we're here for your safety. */
2439 if (side_effects_p (addr))
2440 fatal_insn ("unexpected side-effects in address", addr);
2442 emit_insn (gen_rtx_SET
2444 change_address (dest, SImode, addr),
2445 operand_subword (src, 0, TRUE, mode)));
2447 emit_insn (gen_rtx_SET
2449 change_address (dest, SImode,
2450 plus_constant (addr,
2452 operand_subword (src, 1, TRUE, mode)));
2464 /* The expander for the prologue pattern name. */
2467 cris_expand_prologue (void)
2470 int size = get_frame_size ();
2471 /* Shorten the used name for readability. */
2472 int cfoa_size = current_function_outgoing_args_size;
2473 int last_movem_reg = -1;
2476 int return_address_on_stack = cris_return_address_on_stack ();
2477 int got_really_used = current_function_uses_pic_offset_table;
2478 int n_movem_regs = 0;
2479 int pretend = current_function_pretend_args_size;
2481 /* Don't do anything if no prologues or epilogues are wanted. */
2482 if (!TARGET_PROLOGUE_EPILOGUE)
2488 /* Align the size to what's best for the CPU model. */
2489 if (TARGET_STACK_ALIGN)
2490 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
2494 /* See also cris_setup_incoming_varargs where
2495 cfun->machine->stdarg_regs is set. There are other setters of
2496 current_function_pretend_args_size than stdarg handling, like
2497 for an argument passed with parts in R13 and stack. We must
2498 not store R13 into the pretend-area for that case, as GCC does
2499 that itself. "Our" store would be marked as redundant and GCC
2500 will attempt to remove it, which will then be flagged as an
2501 internal error; trying to remove a frame-related insn. */
2502 int stdarg_regs = cfun->machine->stdarg_regs;
2504 framesize += pretend;
2506 for (regno = CRIS_FIRST_ARG_REG + CRIS_MAX_ARGS_IN_REGS - 1;
2508 regno--, pretend -= 4, stdarg_regs--)
2510 insn = emit_insn (gen_rtx_SET (VOIDmode,
2512 plus_constant (stack_pointer_rtx,
2514 /* FIXME: When dwarf2 frame output and unless asynchronous
2515 exceptions, make dwarf2 bundle together all stack
2516 adjustments like it does for registers between stack
2518 RTX_FRAME_RELATED_P (insn) = 1;
2520 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2521 set_mem_alias_set (mem, get_varargs_alias_set ());
2522 insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
2524 /* Note the absence of RTX_FRAME_RELATED_P on the above insn:
2525 the value isn't restored, so we don't want to tell dwarf2
2526 that it's been stored to stack, else EH handling info would
2530 /* For other setters of current_function_pretend_args_size, we
2531 just adjust the stack by leaving the remaining size in
2532 "pretend", handled below. */
2535 /* Save SRP if not a leaf function. */
2536 if (return_address_on_stack)
2538 insn = emit_insn (gen_rtx_SET (VOIDmode,
2540 plus_constant (stack_pointer_rtx,
2543 RTX_FRAME_RELATED_P (insn) = 1;
2545 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2546 set_mem_alias_set (mem, get_frame_alias_set ());
2547 insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM));
2548 RTX_FRAME_RELATED_P (insn) = 1;
2552 /* Set up the frame pointer, if needed. */
2553 if (frame_pointer_needed)
2555 insn = emit_insn (gen_rtx_SET (VOIDmode,
2557 plus_constant (stack_pointer_rtx,
2560 RTX_FRAME_RELATED_P (insn) = 1;
2562 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2563 set_mem_alias_set (mem, get_frame_alias_set ());
2564 insn = emit_move_insn (mem, frame_pointer_rtx);
2565 RTX_FRAME_RELATED_P (insn) = 1;
2567 insn = emit_move_insn (frame_pointer_rtx, stack_pointer_rtx);
2568 RTX_FRAME_RELATED_P (insn) = 1;
2573 /* Between frame-pointer and saved registers lie the area for local
2574 variables. If we get here with "pretended" size remaining, count
2575 it into the general stack size. */
2578 /* Get a contiguous sequence of registers, starting with R0, that need
2580 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2582 if (cris_reg_saved_in_regsave_area (regno, got_really_used))
2586 /* Check if movem may be used for registers so far. */
2587 if (regno == last_movem_reg + 1)
2588 /* Yes, update next expected register. */
2589 last_movem_reg = regno;
2592 /* We cannot use movem for all registers. We have to flush
2593 any movem:ed registers we got so far. */
2594 if (last_movem_reg != -1)
2597 = (n_movem_regs == 1) ? 1 : last_movem_reg + 1;
2599 /* It is a win to use a side-effect assignment for
2600 64 <= size <= 128. But side-effect on movem was
2601 not usable for CRIS v0..3. Also only do it if
2602 side-effects insns are allowed. */
2603 if ((last_movem_reg + 1) * 4 + size >= 64
2604 && (last_movem_reg + 1) * 4 + size <= 128
2605 && (cris_cpu_version >= CRIS_CPU_SVINTO || n_saved == 1)
2606 && TARGET_SIDE_EFFECT_PREFIXES)
2609 = gen_rtx_MEM (SImode,
2610 plus_constant (stack_pointer_rtx,
2611 -(n_saved * 4 + size)));
2612 set_mem_alias_set (mem, get_frame_alias_set ());
2614 = cris_emit_movem_store (mem, GEN_INT (n_saved),
2615 -(n_saved * 4 + size),
2621 = gen_rtx_SET (VOIDmode,
2623 plus_constant (stack_pointer_rtx,
2624 -(n_saved * 4 + size)));
2625 insn = emit_insn (insn);
2626 RTX_FRAME_RELATED_P (insn) = 1;
2628 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2629 set_mem_alias_set (mem, get_frame_alias_set ());
2630 insn = cris_emit_movem_store (mem, GEN_INT (n_saved),
2634 framesize += n_saved * 4 + size;
2635 last_movem_reg = -1;
2639 insn = emit_insn (gen_rtx_SET (VOIDmode,
2641 plus_constant (stack_pointer_rtx,
2643 RTX_FRAME_RELATED_P (insn) = 1;
2645 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2646 set_mem_alias_set (mem, get_frame_alias_set ());
2647 insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
2648 RTX_FRAME_RELATED_P (insn) = 1;
2650 framesize += 4 + size;
2656 /* Check after, if we could movem all registers. This is the normal case. */
2657 if (last_movem_reg != -1)
2660 = (n_movem_regs == 1) ? 1 : last_movem_reg + 1;
2662 /* Side-effect on movem was not usable for CRIS v0..3. Also only
2663 do it if side-effects insns are allowed. */
2664 if ((last_movem_reg + 1) * 4 + size >= 64
2665 && (last_movem_reg + 1) * 4 + size <= 128
2666 && (cris_cpu_version >= CRIS_CPU_SVINTO || n_saved == 1)
2667 && TARGET_SIDE_EFFECT_PREFIXES)
2670 = gen_rtx_MEM (SImode,
2671 plus_constant (stack_pointer_rtx,
2672 -(n_saved * 4 + size)));
2673 set_mem_alias_set (mem, get_frame_alias_set ());
2674 insn = cris_emit_movem_store (mem, GEN_INT (n_saved),
2675 -(n_saved * 4 + size), true);
2680 = gen_rtx_SET (VOIDmode,
2682 plus_constant (stack_pointer_rtx,
2683 -(n_saved * 4 + size)));
2684 insn = emit_insn (insn);
2685 RTX_FRAME_RELATED_P (insn) = 1;
2687 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2688 set_mem_alias_set (mem, get_frame_alias_set ());
2689 insn = cris_emit_movem_store (mem, GEN_INT (n_saved), 0, true);
2692 framesize += n_saved * 4 + size;
2693 /* We have to put outgoing argument space after regs. */
2696 insn = emit_insn (gen_rtx_SET (VOIDmode,
2698 plus_constant (stack_pointer_rtx,
2700 RTX_FRAME_RELATED_P (insn) = 1;
2701 framesize += cfoa_size;
2704 else if ((size + cfoa_size) > 0)
2706 insn = emit_insn (gen_rtx_SET (VOIDmode,
2708 plus_constant (stack_pointer_rtx,
2709 -(cfoa_size + size))));
2710 RTX_FRAME_RELATED_P (insn) = 1;
2711 framesize += size + cfoa_size;
2714 /* Set up the PIC register, if it is used. */
2715 if (got_really_used)
2718 = gen_rtx_UNSPEC (SImode, gen_rtvec (1, const0_rtx), CRIS_UNSPEC_GOT);
2719 emit_move_insn (pic_offset_table_rtx, got);
2721 /* FIXME: This is a cover-up for flow2 messing up; it doesn't
2722 follow exceptional paths and tries to delete the GOT load as
2723 unused, if it isn't used on the non-exceptional paths. Other
2724 ports have similar or other cover-ups, or plain bugs marking
2725 the GOT register load as maybe-dead. To see this, remove the
2726 line below and try libsupc++/vec.cc or a trivial
2727 "static void y (); void x () {try {y ();} catch (...) {}}". */
2728 emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx));
2731 if (cris_max_stackframe && framesize > cris_max_stackframe)
2732 warning (0, "stackframe too big: %d bytes", framesize);
2735 /* The expander for the epilogue pattern. */
2738 cris_expand_epilogue (void)
2741 int size = get_frame_size ();
2742 int last_movem_reg = -1;
2743 int argspace_offset = current_function_outgoing_args_size;
2744 int pretend = current_function_pretend_args_size;
2746 bool return_address_on_stack = cris_return_address_on_stack ();
2747 /* A reference may have been optimized out
2748 (like the abort () in fde_split in unwind-dw2-fde.c, at least 3.2.1)
2749 so check that it's still used. */
2750 int got_really_used = current_function_uses_pic_offset_table;
2751 int n_movem_regs = 0;
2753 if (!TARGET_PROLOGUE_EPILOGUE)
2756 /* Align byte count of stack frame. */
2757 if (TARGET_STACK_ALIGN)
2758 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
2760 /* Check how many saved regs we can movem. They start at r0 and must
2763 regno < FIRST_PSEUDO_REGISTER;
2765 if (cris_reg_saved_in_regsave_area (regno, got_really_used))
2769 if (regno == last_movem_reg + 1)
2770 last_movem_reg = regno;
2775 /* If there was only one register that really needed to be saved
2776 through movem, don't use movem. */
2777 if (n_movem_regs == 1)
2778 last_movem_reg = -1;
2780 /* Now emit "normal" move insns for all regs higher than the movem
2782 for (regno = FIRST_PSEUDO_REGISTER - 1;
2783 regno > last_movem_reg;
2785 if (cris_reg_saved_in_regsave_area (regno, got_really_used))
2787 if (argspace_offset)
2789 /* There is an area for outgoing parameters located before
2790 the saved registers. We have to adjust for that. */
2791 emit_insn (gen_rtx_SET (VOIDmode,
2793 plus_constant (stack_pointer_rtx,
2795 /* Make sure we only do this once. */
2796 argspace_offset = 0;
2799 mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode,
2800 stack_pointer_rtx));
2801 set_mem_alias_set (mem, get_frame_alias_set ());
2802 emit_move_insn (gen_rtx_raw_REG (SImode, regno), mem);
2805 /* If we have any movem-restore, do it now. */
2806 if (last_movem_reg != -1)
2808 if (argspace_offset)
2810 emit_insn (gen_rtx_SET (VOIDmode,
2812 plus_constant (stack_pointer_rtx,
2814 argspace_offset = 0;
2817 mem = gen_rtx_MEM (SImode,
2818 gen_rtx_POST_INC (SImode, stack_pointer_rtx));
2819 set_mem_alias_set (mem, get_frame_alias_set ());
2820 emit_insn (cris_gen_movem_load (mem, GEN_INT (last_movem_reg + 1), 0));
2823 /* If we don't clobber all of the allocated stack area (we've already
2824 deallocated saved registers), GCC might want to schedule loads from
2825 the stack to *after* the stack-pointer restore, which introduces an
2826 interrupt race condition. This happened for the initial-value
2827 SRP-restore for g++.dg/eh/registers1.C (noticed by inspection of
2828 other failure for that test). It also happened for the stack slot
2829 for the return value in (one version of)
2830 linux/fs/dcache.c:__d_lookup, at least with "-O2
2831 -fno-omit-frame-pointer". */
2833 /* Restore frame pointer if necessary. */
2834 if (frame_pointer_needed)
2836 emit_insn (gen_cris_frame_deallocated_barrier ());
2838 emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
2839 mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode,
2840 stack_pointer_rtx));
2841 set_mem_alias_set (mem, get_frame_alias_set ());
2842 emit_move_insn (frame_pointer_rtx, mem);
2844 else if ((size + argspace_offset) != 0)
2846 emit_insn (gen_cris_frame_deallocated_barrier ());
2848 /* If there was no frame-pointer to restore sp from, we must
2849 explicitly deallocate local variables. */
2851 /* Handle space for outgoing parameters that hasn't been handled
2853 size += argspace_offset;
2855 emit_insn (gen_rtx_SET (VOIDmode,
2857 plus_constant (stack_pointer_rtx, size)));
2860 /* If this function has no pushed register parameters
2861 (stdargs/varargs), and if it is not a leaf function, then we have
2862 the return address on the stack. */
2863 if (return_address_on_stack && pretend == 0)
2865 if (current_function_calls_eh_return)
2868 rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
2869 mem = gen_rtx_MEM (SImode,
2870 gen_rtx_POST_INC (SImode,
2871 stack_pointer_rtx));
2872 set_mem_alias_set (mem, get_frame_alias_set ());
2873 emit_move_insn (srpreg, mem);
2875 emit_insn (gen_addsi3 (stack_pointer_rtx,
2877 gen_rtx_raw_REG (SImode,
2878 CRIS_STACKADJ_REG)));
2879 cris_expand_return (false);
2882 cris_expand_return (true);
2887 /* If we pushed some register parameters, then adjust the stack for
2891 /* If SRP is stored on the way, we need to restore it first. */
2892 if (return_address_on_stack)
2895 rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
2896 mem = gen_rtx_MEM (SImode,
2897 gen_rtx_POST_INC (SImode,
2898 stack_pointer_rtx));
2899 set_mem_alias_set (mem, get_frame_alias_set ());
2900 emit_move_insn (srpreg, mem);
2903 emit_insn (gen_rtx_SET (VOIDmode,
2905 plus_constant (stack_pointer_rtx, pretend)));
2908 /* Perform the "physical" unwinding that the EH machinery calculated. */
2909 if (current_function_calls_eh_return)
2910 emit_insn (gen_addsi3 (stack_pointer_rtx,
2912 gen_rtx_raw_REG (SImode,
2913 CRIS_STACKADJ_REG)));
2914 cris_expand_return (false);
2917 /* Worker function for generating movem from mem for load_multiple. */
2920 cris_gen_movem_load (rtx src, rtx nregs_rtx, int nprefix)
2922 int nregs = INTVAL (nregs_rtx);
2926 rtx srcreg = XEXP (src, 0);
2927 unsigned int regno = nregs - 1;
2930 if (GET_CODE (srcreg) == POST_INC)
2931 srcreg = XEXP (srcreg, 0);
2933 if (!REG_P (srcreg))
2936 /* Don't use movem for just one insn. The insns are equivalent except
2937 for the pipeline hazard (on v32); movem does not forward the loaded
2938 registers so there's a three cycles penalty for their use. */
2940 return gen_movsi (gen_rtx_REG (SImode, 0), src);
2942 vec = rtvec_alloc (nprefix + nregs
2943 + (GET_CODE (XEXP (src, 0)) == POST_INC));
2945 if (GET_CODE (XEXP (src, 0)) == POST_INC)
2947 RTVEC_ELT (vec, nprefix + 1)
2948 = gen_rtx_SET (VOIDmode, srcreg, plus_constant (srcreg, nregs * 4));
2952 src = replace_equiv_address (src, srcreg);
2953 RTVEC_ELT (vec, nprefix)
2954 = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regno), src);
2957 for (i = 1; i < nregs; i++, eltno++)
2959 RTVEC_ELT (vec, nprefix + eltno)
2960 = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regno),
2961 adjust_address_nv (src, SImode, i * 4));
2965 return gen_rtx_PARALLEL (VOIDmode, vec);
2968 /* Worker function for generating movem to mem. If FRAME_RELATED, notes
2969 are added that the dwarf2 machinery understands. */
2972 cris_emit_movem_store (rtx dest, rtx nregs_rtx, int increment,
2975 int nregs = INTVAL (nregs_rtx);
2980 rtx destreg = XEXP (dest, 0);
2981 unsigned int regno = nregs - 1;
2984 if (GET_CODE (destreg) == POST_INC)
2985 increment += nregs * 4;
2987 if (GET_CODE (destreg) == POST_INC || GET_CODE (destreg) == PLUS)
2988 destreg = XEXP (destreg, 0);
2990 if (!REG_P (destreg))
2993 /* Don't use movem for just one insn. The insns are equivalent except
2994 for the pipeline hazard (on v32); movem does not forward the loaded
2995 registers so there's a three cycles penalty for use. */
2998 rtx mov = gen_rtx_SET (VOIDmode, dest, gen_rtx_REG (SImode, 0));
3002 insn = emit_insn (mov);
3004 RTX_FRAME_RELATED_P (insn) = 1;
3008 /* If there was a request for a side-effect, create the ordinary
3010 vec = rtvec_alloc (2);
3012 RTVEC_ELT (vec, 0) = mov;
3013 RTVEC_ELT (vec, 1) = gen_rtx_SET (VOIDmode, destreg,
3014 plus_constant (destreg, increment));
3017 RTX_FRAME_RELATED_P (mov) = 1;
3018 RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 1)) = 1;
3023 vec = rtvec_alloc (nregs + (increment != 0 ? 1 : 0));
3025 = gen_rtx_SET (VOIDmode,
3026 replace_equiv_address (dest,
3027 plus_constant (destreg,
3029 gen_rtx_REG (SImode, regno));
3032 /* The dwarf2 info wants this mark on each component in a parallel
3033 that's part of the prologue (though it's optional on the first
3036 RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 0)) = 1;
3041 = gen_rtx_SET (VOIDmode, destreg,
3042 plus_constant (destreg,
3044 ? increment : nregs * 4));
3048 RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 1)) = 1;
3050 /* Don't call adjust_address_nv on a post-incremented address if
3052 if (GET_CODE (XEXP (dest, 0)) == POST_INC)
3053 dest = replace_equiv_address (dest, destreg);
3056 for (i = 1; i < nregs; i++, eltno++)
3058 RTVEC_ELT (vec, eltno)
3059 = gen_rtx_SET (VOIDmode, adjust_address_nv (dest, SImode, i * 4),
3060 gen_rtx_REG (SImode, regno));
3062 RTX_FRAME_RELATED_P (RTVEC_ELT (vec, eltno)) = 1;
3067 insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, vec));
3069 /* Because dwarf2out.c handles the insns in a parallel as a sequence,
3070 we need to keep the stack adjustment separate, after the
3071 MEM-setters. Else the stack-adjustment in the second component of
3072 the parallel would be mishandled; the offsets for the SETs that
3073 follow it would be wrong. We prepare for this by adding a
3074 REG_FRAME_RELATED_EXPR with the MEM-setting parts in a SEQUENCE
3075 followed by the increment. Note that we have FRAME_RELATED_P on
3076 all the SETs, including the original stack adjustment SET in the
3082 rtx seq = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (nregs + 1));
3083 XVECEXP (seq, 0, 0) = XVECEXP (PATTERN (insn), 0, 0);
3084 for (i = 1; i < nregs; i++)
3085 XVECEXP (seq, 0, i) = XVECEXP (PATTERN (insn), 0, i + 1);
3086 XVECEXP (seq, 0, nregs) = XVECEXP (PATTERN (insn), 0, 1);
3088 = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, seq,
3092 RTX_FRAME_RELATED_P (insn) = 1;
3098 /* Use from within code, from e.g. PRINT_OPERAND and
3099 PRINT_OPERAND_ADDRESS. Macros used in output_addr_const need to emit
3100 different things depending on whether code operand or constant is
3104 cris_output_addr_const (FILE *file, rtx x)
3107 output_addr_const (file, x);
3111 /* Worker function for ASM_OUTPUT_SYMBOL_REF. */
3114 cris_asm_output_symbol_ref (FILE *file, rtx x)
3116 if (flag_pic && in_code > 0)
3118 const char *origstr = XSTR (x, 0);
3121 str = (* targetm.strip_name_encoding) (origstr);
3123 if (cris_gotless_symbol (x))
3125 if (! cris_pic_sympart_only)
3126 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3127 assemble_name (file, str);
3128 fprintf (file, ":GOTOFF");
3130 else if (cris_got_symbol (x))
3132 if (cris_pic_sympart_only)
3134 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3135 assemble_name (file, XSTR (x, 0));
3138 fprintf (file, ":GOT16]");
3140 fprintf (file, ":GOT]");
3143 LOSE_AND_RETURN ("unexpected PIC symbol", x);
3146 if (! current_function_uses_pic_offset_table)
3147 output_operand_lossage ("PIC register isn't set up");
3150 assemble_name (file, XSTR (x, 0));
3153 /* Worker function for ASM_OUTPUT_LABEL_REF. */
3156 cris_asm_output_label_ref (FILE *file, char *buf)
3158 if (flag_pic && in_code > 0)
3160 if (! cris_pic_sympart_only)
3161 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3162 assemble_name (file, buf);
3164 fprintf (file, ":GOTOFF");
3167 if (! current_function_uses_pic_offset_table)
3168 internal_error ("emitting PIC operand, but PIC register isn't set up");
3171 assemble_name (file, buf);
3174 /* Worker function for OUTPUT_ADDR_CONST_EXTRA. */
3177 cris_output_addr_const_extra (FILE *file, rtx x)
3179 switch (GET_CODE (x))
3181 const char *origstr;
3185 ASSERT_PLT_UNSPEC (x);
3186 x = XVECEXP (x, 0, 0);
3187 origstr = XSTR (x, 0);
3188 str = (* targetm.strip_name_encoding) (origstr);
3189 if (cris_pic_sympart_only)
3191 assemble_name (file, str);
3192 fprintf (file, ":PLTG");
3196 if (TARGET_AVOID_GOTPLT)
3197 /* We shouldn't get here. */
3200 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3201 assemble_name (file, XSTR (x, 0));
3204 fprintf (file, ":GOTPLT16]");
3206 fprintf (file, ":GOTPLT]");
3215 /* Worker function for TARGET_STRUCT_VALUE_RTX. */
3218 cris_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
3219 int incoming ATTRIBUTE_UNUSED)
3221 return gen_rtx_REG (Pmode, CRIS_STRUCT_VALUE_REGNUM);
3224 /* Worker function for TARGET_SETUP_INCOMING_VARARGS. */
3227 cris_setup_incoming_varargs (CUMULATIVE_ARGS *ca,
3228 enum machine_mode mode ATTRIBUTE_UNUSED,
3229 tree type ATTRIBUTE_UNUSED,
3230 int *pretend_arg_size,
3233 if (ca->regs < CRIS_MAX_ARGS_IN_REGS)
3235 int stdarg_regs = CRIS_MAX_ARGS_IN_REGS - ca->regs;
3236 cfun->machine->stdarg_regs = stdarg_regs;
3237 *pretend_arg_size = stdarg_regs * 4;
3241 fprintf (asm_out_file,
3242 "\n; VA:: ANSI: %d args before, anon @ #%d, %dtime\n",
3243 ca->regs, *pretend_arg_size, second_time);
3246 /* Return true if TYPE must be passed by invisible reference.
3247 For cris, we pass <= 8 bytes by value, others by reference. */
3250 cris_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED,
3251 enum machine_mode mode, tree type,
3252 bool named ATTRIBUTE_UNUSED)
3254 return (targetm.calls.must_pass_in_stack (mode, type)
3255 || CRIS_FUNCTION_ARG_SIZE (mode, type) > 8);
3260 cris_arg_partial_bytes (CUMULATIVE_ARGS *ca, enum machine_mode mode,
3261 tree type, bool named ATTRIBUTE_UNUSED)
3263 if (ca->regs == CRIS_MAX_ARGS_IN_REGS - 1
3264 && !targetm.calls.must_pass_in_stack (mode, type)
3265 && CRIS_FUNCTION_ARG_SIZE (mode, type) > 4
3266 && CRIS_FUNCTION_ARG_SIZE (mode, type) <= 8)
3267 return UNITS_PER_WORD;
3272 /* Worker function for TARGET_MD_ASM_CLOBBERS. */
3275 cris_md_asm_clobbers (tree outputs, tree inputs, tree clobbers)
3277 HARD_REG_SET mof_set;
3280 CLEAR_HARD_REG_SET (mof_set);
3281 SET_HARD_REG_BIT (mof_set, CRIS_MOF_REGNUM);
3283 for (t = outputs; t != NULL; t = TREE_CHAIN (t))
3285 tree val = TREE_VALUE (t);
3287 /* The constraint letter for the singleton register class of MOF
3288 is 'h'. If it's mentioned in the constraints, the asm is
3289 MOF-aware and adding it to the clobbers would cause it to have
3290 impossible constraints. */
3291 if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t))),
3293 || decl_overlaps_hard_reg_set_p (val, mof_set))
3297 for (t = inputs; t != NULL; t = TREE_CHAIN (t))
3299 tree val = TREE_VALUE (t);
3301 if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t))),
3303 || decl_overlaps_hard_reg_set_p (val, mof_set))
3307 return tree_cons (NULL_TREE,
3308 build_string (strlen (reg_names[CRIS_MOF_REGNUM]),
3309 reg_names[CRIS_MOF_REGNUM]),
3314 /* Various small functions to replace macros. Only called from a
3315 debugger. They might collide with gcc functions or system functions,
3316 so only emit them when '#if 1' above. */
3318 enum rtx_code Get_code (rtx);
3323 return GET_CODE (x);
3326 const char *Get_mode (rtx);
3331 return GET_MODE_NAME (GET_MODE (x));
3334 rtx Xexp (rtx, int);
3342 rtx Xvecexp (rtx, int, int);
3345 Xvecexp (rtx x, int n, int m)
3347 return XVECEXP (x, n, m);
3350 int Get_rtx_len (rtx);
3355 return GET_RTX_LENGTH (GET_CODE (x));
3358 /* Use upper-case to distinguish from local variables that are sometimes
3359 called next_insn and prev_insn. */
3361 rtx Next_insn (rtx);
3364 Next_insn (rtx insn)
3366 return NEXT_INSN (insn);
3369 rtx Prev_insn (rtx);
3372 Prev_insn (rtx insn)
3374 return PREV_INSN (insn);
3378 #include "gt-cris.h"
3382 * eval: (c-set-style "gnu")
3383 * indent-tabs-mode: t