1 /* Definitions for GCC. Part of the machine description for CRIS.
2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by Axis Communications. Written by Hans-Peter Nilsson.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
31 #include "insn-config.h"
32 #include "conditions.h"
33 #include "insn-attr.h"
45 #include "target-def.h"
49 /* Usable when we have an amount to add or subtract, and want the
50 optimal size of the insn. */
51 #define ADDITIVE_SIZE_MODIFIER(size) \
52 ((size) <= 63 ? "q" : (size) <= 255 ? "u.b" : (size) <= 65535 ? "u.w" : ".d")
54 #define ASSERT_PLT_UNSPEC(x) \
57 if (XINT (x, 1) != CRIS_UNSPEC_PLT \
58 || (GET_CODE (XVECEXP (x, 0, 0)) != SYMBOL_REF \
59 && GET_CODE (XVECEXP (x, 0, 0)) != LABEL_REF)) \
63 #define LOSE_AND_RETURN(msgid, x) \
66 cris_operand_lossage (msgid, x); \
70 enum cris_retinsn_type
71 { CRIS_RETINSN_UNKNOWN = 0, CRIS_RETINSN_RET, CRIS_RETINSN_JUMP };
73 /* Per-function machine data. */
74 struct machine_function GTY(())
76 int needs_return_address_on_stack;
78 /* This is the number of registers we save in the prologue due to
82 enum cris_retinsn_type return_type;
85 /* This little fix suppresses the 'u' or 's' when '%e' in assembly
87 static char cris_output_insn_is_bound = 0;
89 /* This one suppresses printing out the "rPIC+" in
90 "rPIC+sym:GOTOFF+offset" when doing PIC. For a PLT symbol, it
91 suppresses outputting it as [rPIC+sym:GOTPLT] and outputs similarly
92 just the "sym:GOTOFF" part. */
93 static int cris_pic_sympart_only = 0;
95 /* In code for output macros, this is how we know whether e.g. constant
96 goes in code or in a static initializer. */
97 static int in_code = 0;
99 /* Fix for reg_overlap_mentioned_p. */
100 static int cris_reg_overlap_mentioned_p (rtx, rtx);
102 static void cris_print_base (rtx, FILE *);
104 static void cris_print_index (rtx, FILE *);
106 static void cris_output_addr_const (FILE *, rtx);
108 static struct machine_function * cris_init_machine_status (void);
110 static rtx cris_struct_value_rtx (tree, int);
112 static void cris_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode,
113 tree type, int *, int);
115 static int cris_initial_frame_pointer_offset (void);
117 static int saved_regs_mentioned (rtx);
119 static void cris_operand_lossage (const char *, rtx);
121 static int cris_reg_saved_in_regsave_area (unsigned int, bool);
123 static void cris_asm_output_mi_thunk
124 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
126 static void cris_file_start (void);
127 static void cris_init_libfuncs (void);
129 static bool cris_rtx_costs (rtx, int, int, int *);
130 static int cris_address_cost (rtx);
131 static bool cris_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode,
133 static int cris_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,
135 static tree cris_md_asm_clobbers (tree, tree, tree);
137 static bool cris_handle_option (size_t, const char *, int);
139 /* This is the argument from the "-max-stack-stackframe=" option. */
140 const char *cris_max_stackframe_str;
142 /* This is the argument from the "-march=" option. */
143 const char *cris_cpu_str;
145 /* This is the argument from the "-mtune=" option. */
146 const char *cris_tune_str;
148 /* This is the argument from the "-melinux-stacksize=" option. */
149 const char *cris_elinux_stacksize_str;
151 /* This is the parsed result of the "-max-stack-stackframe=" option. If
152 it (still) is zero, then there was no such option given. */
153 int cris_max_stackframe = 0;
155 /* This is the parsed result of the "-march=" option, if given. */
156 int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION;
158 #undef TARGET_ASM_ALIGNED_HI_OP
159 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
160 #undef TARGET_ASM_ALIGNED_SI_OP
161 #define TARGET_ASM_ALIGNED_SI_OP "\t.dword\t"
162 #undef TARGET_ASM_ALIGNED_DI_OP
163 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
165 /* We need to define these, since the 2byte, 4byte, 8byte op:s are only
166 available in ELF. These "normal" pseudos do not have any alignment
167 constraints or side-effects. */
168 #undef TARGET_ASM_UNALIGNED_HI_OP
169 #define TARGET_ASM_UNALIGNED_HI_OP TARGET_ASM_ALIGNED_HI_OP
171 #undef TARGET_ASM_UNALIGNED_SI_OP
172 #define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP
174 #undef TARGET_ASM_UNALIGNED_DI_OP
175 #define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP
177 #undef TARGET_ASM_OUTPUT_MI_THUNK
178 #define TARGET_ASM_OUTPUT_MI_THUNK cris_asm_output_mi_thunk
179 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
180 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
182 #undef TARGET_ASM_FILE_START
183 #define TARGET_ASM_FILE_START cris_file_start
185 #undef TARGET_INIT_LIBFUNCS
186 #define TARGET_INIT_LIBFUNCS cris_init_libfuncs
188 #undef TARGET_RTX_COSTS
189 #define TARGET_RTX_COSTS cris_rtx_costs
190 #undef TARGET_ADDRESS_COST
191 #define TARGET_ADDRESS_COST cris_address_cost
193 #undef TARGET_PROMOTE_FUNCTION_ARGS
194 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
195 #undef TARGET_STRUCT_VALUE_RTX
196 #define TARGET_STRUCT_VALUE_RTX cris_struct_value_rtx
197 #undef TARGET_SETUP_INCOMING_VARARGS
198 #define TARGET_SETUP_INCOMING_VARARGS cris_setup_incoming_varargs
199 #undef TARGET_PASS_BY_REFERENCE
200 #define TARGET_PASS_BY_REFERENCE cris_pass_by_reference
201 #undef TARGET_ARG_PARTIAL_BYTES
202 #define TARGET_ARG_PARTIAL_BYTES cris_arg_partial_bytes
203 #undef TARGET_MD_ASM_CLOBBERS
204 #define TARGET_MD_ASM_CLOBBERS cris_md_asm_clobbers
205 #undef TARGET_DEFAULT_TARGET_FLAGS
206 #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | CRIS_SUBTARGET_DEFAULT)
207 #undef TARGET_HANDLE_OPTION
208 #define TARGET_HANDLE_OPTION cris_handle_option
210 struct gcc_target targetm = TARGET_INITIALIZER;
212 /* Helper for cris_load_multiple_op and cris_ret_movem_op. */
215 cris_movem_load_rest_p (rtx op, int offs)
217 unsigned int reg_count = XVECLEN (op, 0) - offs;
223 unsigned int regno = 0;
225 /* Perform a quick check so we don't blow up below. FIXME: Adjust for
226 other than (MEM reg). */
228 || GET_CODE (XVECEXP (op, 0, offs)) != SET
229 || GET_CODE (SET_DEST (XVECEXP (op, 0, offs))) != REG
230 || GET_CODE (SET_SRC (XVECEXP (op, 0, offs))) != MEM)
233 /* Check a possible post-inc indicator. */
234 if (GET_CODE (SET_SRC (XVECEXP (op, 0, offs + 1))) == PLUS)
236 rtx reg = XEXP (SET_SRC (XVECEXP (op, 0, offs + 1)), 0);
237 rtx inc = XEXP (SET_SRC (XVECEXP (op, 0, offs + 1)), 1);
243 || !REG_P (SET_DEST (XVECEXP (op, 0, offs + 1)))
244 || REGNO (reg) != REGNO (SET_DEST (XVECEXP (op, 0, offs + 1)))
245 || GET_CODE (inc) != CONST_INT
246 || INTVAL (inc) != (HOST_WIDE_INT) reg_count * 4)
253 /* FIXME: These two only for pre-v32. */
255 regno = reg_count - 1;
257 elt = XVECEXP (op, 0, offs);
258 src_addr = XEXP (SET_SRC (elt), 0);
260 if (GET_CODE (elt) != SET
261 || GET_CODE (SET_DEST (elt)) != REG
262 || GET_MODE (SET_DEST (elt)) != SImode
263 || REGNO (SET_DEST (elt)) != regno
264 || GET_CODE (SET_SRC (elt)) != MEM
265 || GET_MODE (SET_SRC (elt)) != SImode
266 || !memory_address_p (SImode, src_addr))
269 for (setno = 1; i < XVECLEN (op, 0); setno++, i++)
271 rtx elt = XVECEXP (op, 0, i);
274 if (GET_CODE (elt) != SET
275 || GET_CODE (SET_DEST (elt)) != REG
276 || GET_MODE (SET_DEST (elt)) != SImode
277 || REGNO (SET_DEST (elt)) != regno
278 || GET_CODE (SET_SRC (elt)) != MEM
279 || GET_MODE (SET_SRC (elt)) != SImode
280 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
281 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
282 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
283 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != setno * 4)
290 /* Worker function for predicate for the parallel contents in a movem
294 cris_store_multiple_op_p (rtx op)
296 int reg_count = XVECLEN (op, 0);
307 /* Perform a quick check so we don't blow up below. FIXME: Adjust for
308 other than (MEM reg) and (MEM (PLUS reg const)). */
312 elt = XVECEXP (op, 0, 0);
314 if (GET_CODE (elt) != SET)
317 dest = SET_DEST (elt);
319 if (GET_CODE (SET_SRC (elt)) != REG
320 || GET_CODE (dest) != MEM)
323 dest_addr = XEXP (dest, 0);
325 /* Check a possible post-inc indicator. */
326 if (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS)
328 rtx reg = XEXP (SET_SRC (XVECEXP (op, 0, 1)), 0);
329 rtx inc = XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1);
335 || !REG_P (SET_DEST (XVECEXP (op, 0, 1)))
336 || REGNO (reg) != REGNO (SET_DEST (XVECEXP (op, 0, 1)))
337 || GET_CODE (inc) != CONST_INT
338 /* Support increment by number of registers, and by the offset
339 of the destination, if it has the form (MEM (PLUS reg
341 || !((REG_P (dest_addr)
342 && REGNO (dest_addr) == REGNO (reg)
343 && INTVAL (inc) == (HOST_WIDE_INT) reg_count * 4)
344 || (GET_CODE (dest_addr) == PLUS
345 && REG_P (XEXP (dest_addr, 0))
346 && REGNO (XEXP (dest_addr, 0)) == REGNO (reg)
347 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT
348 && INTVAL (XEXP (dest_addr, 1)) == INTVAL (inc))))
356 /* FIXME: These two only for pre-v32. */
358 regno = reg_count - 1;
360 if (GET_CODE (elt) != SET
361 || GET_CODE (SET_SRC (elt)) != REG
362 || GET_MODE (SET_SRC (elt)) != SImode
363 || REGNO (SET_SRC (elt)) != (unsigned int) regno
364 || GET_CODE (SET_DEST (elt)) != MEM
365 || GET_MODE (SET_DEST (elt)) != SImode)
368 if (REG_P (dest_addr))
370 dest_base = dest_addr;
373 else if (GET_CODE (dest_addr) == PLUS
374 && REG_P (XEXP (dest_addr, 0))
375 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
377 dest_base = XEXP (dest_addr, 0);
378 offset = INTVAL (XEXP (dest_addr, 1));
383 for (setno = 1; i < XVECLEN (op, 0); setno++, i++)
385 rtx elt = XVECEXP (op, 0, i);
388 if (GET_CODE (elt) != SET
389 || GET_CODE (SET_SRC (elt)) != REG
390 || GET_MODE (SET_SRC (elt)) != SImode
391 || REGNO (SET_SRC (elt)) != (unsigned int) regno
392 || GET_CODE (SET_DEST (elt)) != MEM
393 || GET_MODE (SET_DEST (elt)) != SImode
394 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
395 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_base)
396 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
397 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != setno * 4 + offset)
404 /* The CONDITIONAL_REGISTER_USAGE worker. */
407 cris_conditional_register_usage (void)
409 /* FIXME: This isn't nice. We should be able to use that register for
410 something else if the PIC table isn't needed. */
412 fixed_regs[PIC_OFFSET_TABLE_REGNUM]
413 = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
415 if (TARGET_HAS_MUL_INSNS)
416 fixed_regs[CRIS_MOF_REGNUM] = 0;
419 /* Return current_function_uses_pic_offset_table. For use in cris.md,
420 since some generated files do not include function.h. */
423 cris_cfun_uses_pic_table (void)
425 return current_function_uses_pic_offset_table;
428 /* Given an rtx, return the text string corresponding to the CODE of X.
429 Intended for use in the assembly language output section of a
435 cris_output_insn_is_bound = 0;
436 switch (GET_CODE (x))
447 /* This function is for retrieving a part of an instruction name for
448 an operator, for immediate output. If that ever happens for
449 MULT, we need to apply TARGET_MUL_BUG in the caller. Make sure
487 /* Used to control the sign/zero-extend character for the 'e' modifier.
489 cris_output_insn_is_bound = 1;
494 return "Unknown operator";
499 /* Emit an error message when we're in an asm, and a fatal error for
500 "normal" insns. Formatted output isn't easily implemented, since we
501 use output_operand_lossage to output the actual message and handle the
502 categorization of the error. */
505 cris_operand_lossage (const char *msgid, rtx op)
508 output_operand_lossage ("%s", msgid);
511 /* Print an index part of an address to file. */
514 cris_print_index (rtx index, FILE *file)
516 rtx inner = XEXP (index, 0);
518 /* Make the index "additive" unless we'll output a negative number, in
519 which case the sign character is free (as in free beer). */
520 if (GET_CODE (index) != CONST_INT || INTVAL (index) >= 0)
524 fprintf (file, "$%s.b", reg_names[REGNO (index)]);
525 else if (CONSTANT_P (index))
526 cris_output_addr_const (file, index);
527 else if (GET_CODE (index) == MULT)
529 fprintf (file, "$%s.",
530 reg_names[REGNO (XEXP (index, 0))]);
532 putc (INTVAL (XEXP (index, 1)) == 2 ? 'w' : 'd', file);
534 else if (GET_CODE (index) == SIGN_EXTEND &&
535 GET_CODE (inner) == MEM)
537 rtx inner_inner = XEXP (inner, 0);
539 if (GET_CODE (inner_inner) == POST_INC)
541 fprintf (file, "[$%s+].",
542 reg_names[REGNO (XEXP (inner_inner, 0))]);
543 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
547 fprintf (file, "[$%s].", reg_names[REGNO (inner_inner)]);
549 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
552 else if (GET_CODE (index) == MEM)
554 if (GET_CODE (inner) == POST_INC)
555 fprintf (file, "[$%s+].d", reg_names[REGNO (XEXP (inner, 0))]);
557 fprintf (file, "[$%s].d", reg_names[REGNO (inner)]);
560 cris_operand_lossage ("unexpected index-type in cris_print_index",
564 /* Print a base rtx of an address to file. */
567 cris_print_base (rtx base, FILE *file)
570 fprintf (file, "$%s", reg_names[REGNO (base)]);
571 else if (GET_CODE (base) == POST_INC)
572 fprintf (file, "$%s+", reg_names[REGNO (XEXP (base, 0))]);
574 cris_operand_lossage ("unexpected base-type in cris_print_base",
578 /* Usable as a guard in expressions. */
581 cris_fatal (char *arg)
583 internal_error (arg);
585 /* We'll never get here; this is just to appease compilers. */
589 /* Return nonzero if REGNO is an ordinary register that *needs* to be
590 saved together with other registers, possibly by a MOVEM instruction,
591 or is saved for target-independent reasons. There may be
592 target-dependent reasons to save the register anyway; this is just a
593 wrapper for a complicated conditional. */
596 cris_reg_saved_in_regsave_area (unsigned int regno, bool got_really_used)
599 (((regs_ever_live[regno]
600 && !call_used_regs[regno])
601 || (regno == PIC_OFFSET_TABLE_REGNUM
603 /* It is saved anyway, if there would be a gap. */
605 && regs_ever_live[regno + 1]
606 && !call_used_regs[regno + 1]))))
607 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
608 && regno != CRIS_SRP_REGNUM)
609 || (current_function_calls_eh_return
610 && (regno == EH_RETURN_DATA_REGNO (0)
611 || regno == EH_RETURN_DATA_REGNO (1)
612 || regno == EH_RETURN_DATA_REGNO (2)
613 || regno == EH_RETURN_DATA_REGNO (3)));
616 /* Return nonzero if there are regs mentioned in the insn that are not all
617 in the call_used regs. This is part of the decision whether an insn
618 can be put in the epilogue. */
621 saved_regs_mentioned (rtx x)
627 /* Mainly stolen from refers_to_regno_p in rtlanal.c. */
635 return !call_used_regs[i];
638 /* If this is a SUBREG of a hard reg, we can see exactly which
639 registers are being modified. Otherwise, handle normally. */
640 i = REGNO (SUBREG_REG (x));
641 return !call_used_regs[i];
647 fmt = GET_RTX_FORMAT (code);
648 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
652 if (saved_regs_mentioned (XEXP (x, i)))
655 else if (fmt[i] == 'E')
658 for (j = XVECLEN (x, i) - 1; j >=0; j--)
659 if (saved_regs_mentioned (XEXP (x, i)))
667 /* The PRINT_OPERAND worker. */
670 cris_print_operand (FILE *file, rtx x, int code)
674 /* Size-strings corresponding to MULT expressions. */
675 static const char *const mults[] = { "BAD:0", ".b", ".w", "BAD:3", ".d" };
677 /* New code entries should just be added to the switch below. If
678 handling is finished, just return. If handling was just a
679 modification of the operand, the modified operand should be put in
680 "operand", and then do a break to let default handling
681 (zero-modifier) output the operand. */
686 /* Print the unsigned supplied integer as if it were signed
687 and < 0, i.e print 255 or 65535 as -1, 254, 65534 as -2, etc. */
688 if (GET_CODE (x) != CONST_INT
689 || ! CONST_OK_FOR_LETTER_P (INTVAL (x), 'O'))
690 LOSE_AND_RETURN ("invalid operand for 'b' modifier", x);
691 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
692 INTVAL (x)| (INTVAL (x) <= 255 ? ~255 : ~65535));
696 /* Print assembler code for operator. */
697 fprintf (file, "%s", cris_op_str (operand));
701 /* Print the operand without the PIC register. */
702 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
703 LOSE_AND_RETURN ("invalid operand for 'v' modifier", x);
704 cris_pic_sympart_only++;
705 cris_output_addr_const (file, x);
706 cris_pic_sympart_only--;
711 /* A movem modifier working on a parallel; output the register
715 if (GET_CODE (x) != PARALLEL)
716 LOSE_AND_RETURN ("invalid operand for 'o' modifier", x);
718 /* The second item can be (set reg (plus reg const)) to denote a
721 = (GET_CODE (SET_SRC (XVECEXP (x, 0, 1))) == PLUS
723 : XVECLEN (x, 0) - 1);
725 fprintf (file, "$%s", reg_names [regno]);
731 /* A similar movem modifier; output the memory operand. */
734 if (GET_CODE (x) != PARALLEL)
735 LOSE_AND_RETURN ("invalid operand for 'O' modifier", x);
737 /* The lowest mem operand is in the first item, but perhaps it
738 needs to be output as postincremented. */
739 addr = GET_CODE (SET_SRC (XVECEXP (x, 0, 0))) == MEM
740 ? XEXP (SET_SRC (XVECEXP (x, 0, 0)), 0)
741 : XEXP (SET_DEST (XVECEXP (x, 0, 0)), 0);
743 /* The second item can be a (set reg (plus reg const)) to denote
745 if (GET_CODE (SET_SRC (XVECEXP (x, 0, 1))) == PLUS)
747 /* It's a post-increment, if the address is a naked (reg). */
749 addr = gen_rtx_POST_INC (SImode, addr);
752 /* Otherwise, it's a side-effect; RN=RN+M. */
753 fprintf (file, "[$%s=$%s%s%d]",
754 reg_names [REGNO (SET_DEST (XVECEXP (x, 0, 1)))],
755 reg_names [REGNO (XEXP (addr, 0))],
756 INTVAL (XEXP (addr, 1)) < 0 ? "" : "+",
757 (int) INTVAL (XEXP (addr, 1)));
761 output_address (addr);
766 /* Print the PIC register. Applied to a GOT-less PIC symbol for
768 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
769 LOSE_AND_RETURN ("invalid operand for 'P' modifier", x);
770 fprintf (file, "$%s", reg_names [PIC_OFFSET_TABLE_REGNUM]);
774 /* Adjust a power of two to its log2. */
775 if (GET_CODE (x) != CONST_INT || exact_log2 (INTVAL (x)) < 0 )
776 LOSE_AND_RETURN ("invalid operand for 'p' modifier", x);
777 fprintf (file, "%d", exact_log2 (INTVAL (x)));
781 /* For an integer, print 'b' or 'w' if <= 255 or <= 65535
782 respectively. This modifier also terminates the inhibiting
783 effects of the 'x' modifier. */
784 cris_output_insn_is_bound = 0;
785 if (GET_MODE (x) == VOIDmode && GET_CODE (x) == CONST_INT)
789 if (INTVAL (x) <= 255)
791 else if (INTVAL (x) <= 65535)
801 /* For a non-integer, print the size of the operand. */
802 putc ((GET_MODE (x) == SImode || GET_MODE (x) == SFmode)
803 ? 'd' : GET_MODE (x) == HImode ? 'w'
804 : GET_MODE (x) == QImode ? 'b'
805 /* If none of the above, emit an erroneous size letter. */
811 /* Const_int: print b for -127 <= x <= 255,
812 w for -32768 <= x <= 65535, else abort. */
813 if (GET_CODE (x) != CONST_INT
814 || INTVAL (x) < -32768 || INTVAL (x) > 65535)
815 LOSE_AND_RETURN ("invalid operand for 'z' modifier", x);
816 putc (INTVAL (x) >= -128 && INTVAL (x) <= 255 ? 'b' : 'w', file);
820 /* Output a 'nop' if there's nothing for the delay slot.
821 This method stolen from the sparc files. */
822 if (dbr_sequence_length () == 0)
823 fputs ("\n\tnop", file);
827 /* Output directive for alignment padded with "nop" insns.
828 Optimizing for size, it's plain 4-byte alignment, otherwise we
829 align the section to a cache-line (32 bytes) and skip at max 2
830 bytes, i.e. we skip if it's the last insn on a cache-line. The
831 latter is faster by a small amount (for two test-programs 99.6%
832 and 99.9%) and larger by a small amount (ditto 100.1% and
833 100.2%). This is supposed to be the simplest yet performance-
834 wise least intrusive way to make sure the immediately following
835 (supposed) muls/mulu insn isn't located at the end of a
839 ? ".p2alignw 2,0x050f\n\t"
840 : ".p2alignw 5,0x050f,2\n\t", file);
844 /* Print high (most significant) part of something. */
845 switch (GET_CODE (operand))
848 if (HOST_BITS_PER_WIDE_INT == 32)
849 /* Sign-extension from a normal int to a long long. */
850 fprintf (file, INTVAL (operand) < 0 ? "-1" : "0");
852 fprintf (file, "0x%x", (unsigned int)(INTVAL (x) >> 31 >> 1));
856 /* High part of a long long constant. */
857 if (GET_MODE (operand) == VOIDmode)
859 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_HIGH (x));
863 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
866 /* Print reg + 1. Check that there's not an attempt to print
867 high-parts of registers like stack-pointer or higher. */
868 if (REGNO (operand) > STACK_POINTER_REGNUM - 2)
869 LOSE_AND_RETURN ("bad register", operand);
870 fprintf (file, "$%s", reg_names[REGNO (operand) + 1]);
874 /* Adjust memory address to high part. */
876 rtx adj_mem = operand;
878 = GET_MODE_BITSIZE (GET_MODE (operand)) / BITS_PER_UNIT;
880 /* Adjust so we can use two SImode in DImode.
881 Calling adj_offsettable_operand will make sure it is an
882 offsettable address. Don't do this for a postincrement
883 though; it should remain as it was. */
884 if (GET_CODE (XEXP (adj_mem, 0)) != POST_INC)
886 = adjust_address (adj_mem, GET_MODE (adj_mem), size / 2);
888 output_address (XEXP (adj_mem, 0));
893 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
897 /* Strip the MEM expression. */
898 operand = XEXP (operand, 0);
902 /* Print 's' if operand is SIGN_EXTEND or 'u' if ZERO_EXTEND unless
903 cris_output_insn_is_bound is nonzero. */
904 if (GET_CODE (operand) != SIGN_EXTEND
905 && GET_CODE (operand) != ZERO_EXTEND
906 && GET_CODE (operand) != CONST_INT)
907 LOSE_AND_RETURN ("invalid operand for 'e' modifier", x);
909 if (cris_output_insn_is_bound)
911 cris_output_insn_is_bound = 0;
915 putc (GET_CODE (operand) == SIGN_EXTEND
916 || (GET_CODE (operand) == CONST_INT && INTVAL (operand) < 0)
921 /* Print the size letter of the inner element. We can do it by
922 calling ourselves with the 's' modifier. */
923 if (GET_CODE (operand) != SIGN_EXTEND && GET_CODE (operand) != ZERO_EXTEND)
924 LOSE_AND_RETURN ("invalid operand for 'm' modifier", x);
925 cris_print_operand (file, XEXP (operand, 0), 's');
929 /* Print the least significant part of operand. */
930 if (GET_CODE (operand) == CONST_DOUBLE)
932 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
935 else if (HOST_BITS_PER_WIDE_INT > 32 && GET_CODE (operand) == CONST_INT)
937 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
938 INTVAL (x) & ((unsigned int) 0x7fffffff * 2 + 1));
941 /* Otherwise the least significant part equals the normal part,
942 so handle it normally. */
946 /* When emitting an add for the high part of a DImode constant, we
947 want to use addq for 0 and adds.w for -1. */
948 if (GET_CODE (operand) != CONST_INT)
949 LOSE_AND_RETURN ("invalid operand for 'A' modifier", x);
950 fprintf (file, INTVAL (operand) < 0 ? "adds.w" : "addq");
954 /* If this is a GOT symbol, print it as :GOT regardless of -fpic. */
955 if (flag_pic && CONSTANT_P (operand) && cris_got_symbol (operand))
957 cris_output_addr_const (file, operand);
958 fprintf (file, ":GOT");
964 /* When emitting an sub for the high part of a DImode constant, we
965 want to use subq for 0 and subs.w for -1. */
966 if (GET_CODE (operand) != CONST_INT)
967 LOSE_AND_RETURN ("invalid operand for 'D' modifier", x);
968 fprintf (file, INTVAL (operand) < 0 ? "subs.w" : "subq");
972 /* Print the operand as the index-part of an address.
973 Easiest way out is to use cris_print_index. */
974 cris_print_index (operand, file);
978 /* Print the size letter for an operand to a MULT, which must be a
979 const_int with a suitable value. */
980 if (GET_CODE (operand) != CONST_INT || INTVAL (operand) > 4)
981 LOSE_AND_RETURN ("invalid operand for 'T' modifier", x);
982 fprintf (file, "%s", mults[INTVAL (operand)]);
986 /* No code, print as usual. */
990 LOSE_AND_RETURN ("invalid operand modifier letter", x);
993 /* Print an operand as without a modifier letter. */
994 switch (GET_CODE (operand))
997 if (REGNO (operand) > 15
998 && REGNO (operand) != CRIS_MOF_REGNUM
999 && REGNO (operand) != CRIS_SRP_REGNUM)
1000 internal_error ("internal error: bad register: %d", REGNO (operand));
1001 fprintf (file, "$%s", reg_names[REGNO (operand)]);
1005 output_address (XEXP (operand, 0));
1009 if (GET_MODE (operand) == VOIDmode)
1010 /* A long long constant. */
1011 output_addr_const (file, operand);
1014 /* Only single precision is allowed as plain operands the
1015 moment. FIXME: REAL_VALUE_FROM_CONST_DOUBLE isn't
1020 /* FIXME: Perhaps check overflow of the "single". */
1021 REAL_VALUE_FROM_CONST_DOUBLE (r, operand);
1022 REAL_VALUE_TO_TARGET_SINGLE (r, l);
1024 fprintf (file, "0x%lx", l);
1029 ASSERT_PLT_UNSPEC (operand);
1033 cris_output_addr_const (file, operand);
1039 /* For a (MULT (reg X) const_int) we output "rX.S". */
1040 int i = GET_CODE (XEXP (operand, 1)) == CONST_INT
1041 ? INTVAL (XEXP (operand, 1)) : INTVAL (XEXP (operand, 0));
1042 rtx reg = GET_CODE (XEXP (operand, 1)) == CONST_INT
1043 ? XEXP (operand, 0) : XEXP (operand, 1);
1045 if (GET_CODE (reg) != REG
1046 || (GET_CODE (XEXP (operand, 0)) != CONST_INT
1047 && GET_CODE (XEXP (operand, 1)) != CONST_INT))
1048 LOSE_AND_RETURN ("unexpected multiplicative operand", x);
1050 cris_print_base (reg, file);
1051 fprintf (file, ".%c",
1052 i == 0 || (i == 1 && GET_CODE (operand) == MULT) ? 'b'
1054 : (i == 2 && GET_CODE (operand) == MULT) || i == 1 ? 'w'
1060 /* No need to handle all strange variants, let output_addr_const
1062 if (CONSTANT_P (operand))
1064 cris_output_addr_const (file, operand);
1068 LOSE_AND_RETURN ("unexpected operand", x);
1072 /* The PRINT_OPERAND_ADDRESS worker. */
1075 cris_print_operand_address (FILE *file, rtx x)
1077 /* All these were inside MEM:s so output indirection characters. */
1080 if (CONSTANT_ADDRESS_P (x))
1081 cris_output_addr_const (file, x);
1082 else if (BASE_OR_AUTOINCR_P (x))
1083 cris_print_base (x, file);
1084 else if (GET_CODE (x) == PLUS)
1092 cris_print_base (x1, file);
1093 cris_print_index (x2, file);
1095 else if (BASE_P (x2))
1097 cris_print_base (x2, file);
1098 cris_print_index (x1, file);
1101 LOSE_AND_RETURN ("unrecognized address", x);
1103 else if (GET_CODE (x) == MEM)
1105 /* A DIP. Output more indirection characters. */
1107 cris_print_base (XEXP (x, 0), file);
1111 LOSE_AND_RETURN ("unrecognized address", x);
1116 /* The RETURN_ADDR_RTX worker.
1117 We mark that the return address is used, either by EH or
1118 __builtin_return_address, for use by the function prologue and
1119 epilogue. FIXME: This isn't optimal; we just use the mark in the
1120 prologue and epilogue to say that the return address is to be stored
1121 in the stack frame. We could return SRP for leaf-functions and use the
1122 initial-value machinery. */
1125 cris_return_addr_rtx (int count, rtx frameaddr ATTRIBUTE_UNUSED)
1127 cfun->machine->needs_return_address_on_stack = 1;
1129 /* The return-address is stored just above the saved frame-pointer (if
1130 present). Apparently we can't eliminate from the frame-pointer in
1131 that direction, so use the incoming args (maybe pretended) pointer. */
1133 ? gen_rtx_MEM (Pmode, plus_constant (virtual_incoming_args_rtx, -4))
1137 /* Accessor used in cris.md:return because cfun->machine isn't available
1141 cris_return_address_on_stack (void)
1143 return regs_ever_live[CRIS_SRP_REGNUM]
1144 || cfun->machine->needs_return_address_on_stack;
1147 /* Accessor used in cris.md:return because cfun->machine isn't available
1151 cris_return_address_on_stack_for_return (void)
1153 return cfun->machine->return_type == CRIS_RETINSN_RET ? false
1154 : cris_return_address_on_stack ();
1157 /* This used to be the INITIAL_FRAME_POINTER_OFFSET worker; now only
1158 handles FP -> SP elimination offset. */
1161 cris_initial_frame_pointer_offset (void)
1165 /* Initial offset is 0 if we don't have a frame pointer. */
1167 bool got_really_used = current_function_uses_pic_offset_table;
1169 /* And 4 for each register pushed. */
1170 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1171 if (cris_reg_saved_in_regsave_area (regno, got_really_used))
1174 /* And then, last, we add the locals allocated. */
1175 offs += get_frame_size ();
1177 /* And more; the accumulated args size. */
1178 offs += current_function_outgoing_args_size;
1180 /* Then round it off, in case we use aligned stack. */
1181 if (TARGET_STACK_ALIGN)
1182 offs = TARGET_ALIGN_BY_32 ? (offs + 3) & ~3 : (offs + 1) & ~1;
1187 /* The INITIAL_ELIMINATION_OFFSET worker.
1188 Calculate the difference between imaginary registers such as frame
1189 pointer and the stack pointer. Used to eliminate the frame pointer
1190 and imaginary arg pointer. */
1193 cris_initial_elimination_offset (int fromreg, int toreg)
1196 = cris_initial_frame_pointer_offset ();
1198 /* We should be able to use regs_ever_live and related prologue
1199 information here, or alpha should not as well. */
1200 bool return_address_on_stack = cris_return_address_on_stack ();
1202 /* Here we act as if the frame-pointer were needed. */
1203 int ap_fp_offset = 4 + (return_address_on_stack ? 4 : 0);
1205 if (fromreg == ARG_POINTER_REGNUM
1206 && toreg == FRAME_POINTER_REGNUM)
1207 return ap_fp_offset;
1209 /* Between the frame pointer and the stack are only "normal" stack
1210 variables and saved registers. */
1211 if (fromreg == FRAME_POINTER_REGNUM
1212 && toreg == STACK_POINTER_REGNUM)
1213 return fp_sp_offset;
1215 /* We need to balance out the frame pointer here. */
1216 if (fromreg == ARG_POINTER_REGNUM
1217 && toreg == STACK_POINTER_REGNUM)
1218 return ap_fp_offset + fp_sp_offset - 4;
1223 /* This function looks into the pattern to see how this insn affects
1226 Used when to eliminate test insns before a condition-code user,
1227 such as a "scc" insn or a conditional branch. This includes
1228 checking if the entities that cc was updated by, are changed by the
1231 Currently a jumble of the old peek-inside-the-insn and the newer
1232 check-cc-attribute methods. */
1235 cris_notice_update_cc (rtx exp, rtx insn)
1237 /* Check if user specified "-mcc-init" as a bug-workaround. FIXME:
1238 TARGET_CCINIT does not work; we must set CC_REVERSED as below.
1239 Several testcases will otherwise fail, for example
1240 gcc.c-torture/execute/20000217-1.c -O0 and -O1. */
1247 /* Slowly, we're converting to using attributes to control the setting
1248 of condition-code status. */
1249 switch (get_attr_cc (insn))
1252 /* Even if it is "none", a setting may clobber a previous
1253 cc-value, so check. */
1254 if (GET_CODE (exp) == SET)
1256 if (cc_status.value1
1257 && modified_in_p (cc_status.value1, insn))
1258 cc_status.value1 = 0;
1260 if (cc_status.value2
1261 && modified_in_p (cc_status.value2, insn))
1262 cc_status.value2 = 0;
1271 /* Which means, for:
1276 CC is (reg) and (...) - unless (...) is 0, then CC does not change.
1277 CC_NO_OVERFLOW unless (...) is reg or mem.
1286 (set (reg1) (mem (bdap/biap)))
1287 (set (reg2) (bdap/biap))):
1288 CC is (reg1) and (mem (reg2))
1291 (set (mem (bdap/biap)) (reg1)) [or 0]
1292 (set (reg2) (bdap/biap))):
1295 (where reg and mem includes strict_low_parts variants thereof)
1297 For all others, assume CC is clobbered.
1298 Note that we do not have to care about setting CC_NO_OVERFLOW,
1299 since the overflow flag is set to 0 (i.e. right) for
1300 instructions where it does not have any sane sense, but where
1301 other flags have meanings. (This includes shifts; the carry is
1304 Note that there are other parallel constructs we could match,
1305 but we don't do that yet. */
1307 if (GET_CODE (exp) == SET)
1309 /* FIXME: Check when this happens. It looks like we should
1310 actually do a CC_STATUS_INIT here to be safe. */
1311 if (SET_DEST (exp) == pc_rtx)
1314 /* Record CC0 changes, so we do not have to output multiple
1316 if (SET_DEST (exp) == cc0_rtx)
1318 cc_status.value1 = SET_SRC (exp);
1319 cc_status.value2 = 0;
1321 /* Handle flags for the special btstq on one bit. */
1322 if (GET_CODE (SET_SRC (exp)) == ZERO_EXTRACT
1323 && XEXP (SET_SRC (exp), 1) == const1_rtx)
1325 if (GET_CODE (XEXP (SET_SRC (exp), 0)) == CONST_INT)
1327 cc_status.flags = CC_INVERTED;
1329 /* A one-bit btstq. */
1330 cc_status.flags = CC_Z_IN_NOT_N;
1333 cc_status.flags = 0;
1335 if (GET_CODE (SET_SRC (exp)) == COMPARE)
1337 if (!REG_P (XEXP (SET_SRC (exp), 0))
1338 && XEXP (SET_SRC (exp), 1) != const0_rtx)
1339 /* For some reason gcc will not canonicalize compare
1340 operations, reversing the sign by itself if
1341 operands are in wrong order. */
1342 /* (But NOT inverted; eq is still eq.) */
1343 cc_status.flags = CC_REVERSED;
1345 /* This seems to be overlooked by gcc. FIXME: Check again.
1346 FIXME: Is it really safe? */
1348 = gen_rtx_MINUS (GET_MODE (SET_SRC (exp)),
1349 XEXP (SET_SRC (exp), 0),
1350 XEXP (SET_SRC (exp), 1));
1354 else if (REG_P (SET_DEST (exp))
1355 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
1356 && REG_P (XEXP (SET_DEST (exp), 0))))
1358 /* A register is set; normally CC is set to show that no
1359 test insn is needed. Catch the exceptions. */
1361 /* If not to cc0, then no "set"s in non-natural mode give
1363 if (GET_MODE_SIZE (GET_MODE (SET_DEST (exp))) > UNITS_PER_WORD
1364 || GET_MODE_CLASS (GET_MODE (SET_DEST (exp))) == MODE_FLOAT)
1366 /* ... except add:s and sub:s in DImode. */
1367 if (GET_MODE (SET_DEST (exp)) == DImode
1368 && (GET_CODE (SET_SRC (exp)) == PLUS
1369 || GET_CODE (SET_SRC (exp)) == MINUS))
1371 cc_status.flags = 0;
1372 cc_status.value1 = SET_DEST (exp);
1373 cc_status.value2 = SET_SRC (exp);
1375 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1377 cc_status.value2 = 0;
1379 /* Add and sub may set V, which gets us
1380 unoptimizable results in "gt" and "le" condition
1382 cc_status.flags |= CC_NO_OVERFLOW;
1387 else if (SET_SRC (exp) == const0_rtx)
1389 /* There's no CC0 change when clearing a register or
1390 memory. Just check for overlap. */
1391 if (cc_status.value1
1392 && modified_in_p (cc_status.value1, insn))
1393 cc_status.value1 = 0;
1395 if (cc_status.value2
1396 && modified_in_p (cc_status.value2, insn))
1397 cc_status.value2 = 0;
1403 cc_status.flags = 0;
1404 cc_status.value1 = SET_DEST (exp);
1405 cc_status.value2 = SET_SRC (exp);
1407 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1409 cc_status.value2 = 0;
1411 /* Some operations may set V, which gets us
1412 unoptimizable results in "gt" and "le" condition
1414 if (GET_CODE (SET_SRC (exp)) == PLUS
1415 || GET_CODE (SET_SRC (exp)) == MINUS
1416 || GET_CODE (SET_SRC (exp)) == NEG)
1417 cc_status.flags |= CC_NO_OVERFLOW;
1422 else if (GET_CODE (SET_DEST (exp)) == MEM
1423 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
1424 && GET_CODE (XEXP (SET_DEST (exp), 0)) == MEM))
1426 /* When SET to MEM, then CC is not changed (except for
1428 if (cc_status.value1
1429 && modified_in_p (cc_status.value1, insn))
1430 cc_status.value1 = 0;
1432 if (cc_status.value2
1433 && modified_in_p (cc_status.value2, insn))
1434 cc_status.value2 = 0;
1439 else if (GET_CODE (exp) == PARALLEL)
1441 if (GET_CODE (XVECEXP (exp, 0, 0)) == SET
1442 && GET_CODE (XVECEXP (exp, 0, 1)) == SET
1443 && REG_P (XEXP (XVECEXP (exp, 0, 1), 0)))
1445 if (REG_P (XEXP (XVECEXP (exp, 0, 0), 0))
1446 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 1)) == MEM)
1448 /* For "move.S [rx=ry+o],rz", say CC reflects
1449 value1=rz and value2=[rx] */
1450 cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0);
1452 = replace_equiv_address (XEXP (XVECEXP (exp, 0, 0), 1),
1453 XEXP (XVECEXP (exp, 0, 1), 0));
1454 cc_status.flags = 0;
1456 /* Huh? A side-effect cannot change the destination
1458 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1460 internal_error ("internal error: sideeffect-insn affecting main effect");
1463 else if ((REG_P (XEXP (XVECEXP (exp, 0, 0), 1))
1464 || XEXP (XVECEXP (exp, 0, 0), 1) == const0_rtx)
1465 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 0)) == MEM)
1467 /* For "move.S rz,[rx=ry+o]" and "clear.S [rx=ry+o]",
1468 say flags are not changed, except for overlap. */
1469 if (cc_status.value1
1470 && modified_in_p (cc_status.value1, insn))
1471 cc_status.value1 = 0;
1473 if (cc_status.value2
1474 && modified_in_p (cc_status.value2, insn))
1475 cc_status.value2 = 0;
1484 /* Unknown cc_attr value. */
1491 /* Return != 0 if the return sequence for the current function is short,
1492 like "ret" or "jump [sp+]". Prior to reloading, we can't tell if
1493 registers must be saved, so return 0 then. */
1496 cris_simple_epilogue (void)
1499 unsigned int reglimit = STACK_POINTER_REGNUM;
1500 bool got_really_used = current_function_uses_pic_offset_table;
1502 if (! reload_completed
1503 || frame_pointer_needed
1504 || get_frame_size () != 0
1505 || current_function_pretend_args_size
1506 || current_function_args_size
1507 || current_function_outgoing_args_size
1508 || current_function_calls_eh_return
1510 /* If we're not supposed to emit prologue and epilogue, we must
1511 not emit return-type instructions. */
1512 || !TARGET_PROLOGUE_EPILOGUE)
1515 /* No simple epilogue if there are saved registers. */
1516 for (regno = 0; regno < reglimit; regno++)
1517 if (cris_reg_saved_in_regsave_area (regno, got_really_used))
1523 /* Expand a return insn (just one insn) marked as using SRP or stack
1524 slot depending on parameter ON_STACK. */
1527 cris_expand_return (bool on_stack)
1529 /* FIXME: emit a parallel with a USE for SRP or the stack-slot, to
1530 tell "ret" from "jump [sp+]". Some, but not all, other parts of
1531 GCC expect just (return) to do the right thing when optimizing, so
1532 we do that until they're fixed. Currently, all return insns in a
1533 function must be the same (not really a limiting factor) so we need
1534 to check that it doesn't change half-way through. */
1535 emit_jump_insn (gen_rtx_RETURN (VOIDmode));
1537 if ((cfun->machine->return_type == CRIS_RETINSN_RET && on_stack)
1538 || (cfun->machine->return_type == CRIS_RETINSN_JUMP && !on_stack))
1541 cfun->machine->return_type
1542 = on_stack ? CRIS_RETINSN_JUMP : CRIS_RETINSN_RET;
1545 /* Compute a (partial) cost for rtx X. Return true if the complete
1546 cost has been computed, and false if subexpressions should be
1547 scanned. In either case, *TOTAL contains the cost result. */
1550 cris_rtx_costs (rtx x, int code, int outer_code, int *total)
1556 HOST_WIDE_INT val = INTVAL (x);
1559 else if (val < 32 && val >= -32)
1561 /* Eight or 16 bits are a word and cycle more expensive. */
1562 else if (val <= 32767 && val >= -32768)
1564 /* A 32 bit constant (or very seldom, unsigned 16 bits) costs
1565 another word. FIXME: This isn't linear to 16 bits. */
1577 /* For PIC, we need a prefix (if it isn't already there),
1578 and the PIC register. For a global PIC symbol, we also
1579 need a read of the GOT. */
1582 if (cris_got_symbol (x))
1592 if (x != CONST0_RTX (GET_MODE (x) == VOIDmode ? DImode : GET_MODE (x)))
1595 /* Make 0.0 cheap, else test-insns will not be used. */
1600 /* Identify values that are no powers of two. Powers of 2 are
1601 taken care of already and those values should not be changed. */
1602 if (GET_CODE (XEXP (x, 1)) != CONST_INT
1603 || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
1605 /* If we have a multiply insn, then the cost is between
1606 1 and 2 "fast" instructions. */
1607 if (TARGET_HAS_MUL_INSNS)
1609 *total = COSTS_N_INSNS (1) + COSTS_N_INSNS (1) / 2;
1613 /* Estimate as 4 + 4 * #ofbits. */
1614 *total = COSTS_N_INSNS (132);
1623 if (GET_CODE (XEXP (x, 1)) != CONST_INT
1624 || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
1626 /* Estimate this as 4 + 8 * #of bits. */
1627 *total = COSTS_N_INSNS (260);
1633 if (GET_CODE (XEXP (x, 1)) == CONST_INT
1634 /* Two constants may actually happen before optimization. */
1635 && GET_CODE (XEXP (x, 0)) != CONST_INT
1636 && !CONST_OK_FOR_LETTER_P (INTVAL (XEXP (x, 1)), 'I'))
1638 *total = (rtx_cost (XEXP (x, 0), outer_code) + 2
1639 + 2 * GET_MODE_NUNITS (GET_MODE (XEXP (x, 0))));
1644 case ZERO_EXTEND: case SIGN_EXTEND:
1645 *total = rtx_cost (XEXP (x, 0), outer_code);
1653 /* The ADDRESS_COST worker. */
1656 cris_address_cost (rtx x)
1658 /* The metric to use for the cost-macros is unclear.
1659 The metric used here is (the number of cycles needed) / 2,
1660 where we consider equal a cycle for a word of code and a cycle to
1663 /* The cheapest addressing modes get 0, since nothing extra is needed. */
1664 if (BASE_OR_AUTOINCR_P (x))
1667 /* An indirect mem must be a DIP. This means two bytes extra for code,
1668 and 4 bytes extra for memory read, i.e. (2 + 4) / 2. */
1669 if (GET_CODE (x) == MEM)
1672 /* Assume (2 + 4) / 2 for a single constant; a dword, since it needs
1673 an extra DIP prefix and 4 bytes of constant in most cases.
1674 For PIC and a symbol with a GOT entry, we double the cost since we
1675 add a [rPIC+...] offset. A GOT-less symbol uses a BDAP prefix
1676 equivalent to the DIP prefix for non-PIC, hence the same cost. */
1678 return flag_pic && cris_got_symbol (x) ? 2 * (2 + 4) / 2 : (2 + 4) / 2;
1680 /* Handle BIAP and BDAP prefixes. */
1681 if (GET_CODE (x) == PLUS)
1683 rtx tem1 = XEXP (x, 0);
1684 rtx tem2 = XEXP (x, 1);
1686 /* A BIAP is 2 extra bytes for the prefix insn, nothing more. We
1687 recognize the typical MULT which is always in tem1 because of
1688 insn canonicalization. */
1689 if ((GET_CODE (tem1) == MULT && BIAP_INDEX_P (tem1))
1693 /* A BDAP (quick) is 2 extra bytes. Any constant operand to the
1694 PLUS is always found in tem2. */
1695 if (GET_CODE (tem2) == CONST_INT
1696 && INTVAL (tem2) < 128 && INTVAL (tem2) >= -128)
1699 /* A BDAP -32768 .. 32767 is like BDAP quick, but with 2 extra
1701 if (GET_CODE (tem2) == CONST_INT
1702 && CONST_OK_FOR_LETTER_P (INTVAL (tem2), 'L'))
1705 /* A BDAP with some other constant is 2 bytes extra. */
1706 if (CONSTANT_P (tem2))
1707 return (2 + 2 + 2) / 2;
1709 /* BDAP with something indirect should have a higher cost than
1710 BIAP with register. FIXME: Should it cost like a MEM or more? */
1711 /* Don't need to check it, it's the only one left.
1712 FIXME: There was a REG test missing, perhaps there are others.
1714 return (2 + 2 + 2) / 2;
1717 /* What else? Return a high cost. It matters only for valid
1718 addressing modes. */
1722 /* Check various objections to the side-effect. Used in the test-part
1723 of an anonymous insn describing an insn with a possible side-effect.
1724 Returns nonzero if the implied side-effect is ok.
1727 ops : An array of rtx:es. lreg, rreg, rval,
1728 The variables multop and other_op are indexes into this,
1729 or -1 if they are not applicable.
1730 lreg : The register that gets assigned in the side-effect.
1731 rreg : One register in the side-effect expression
1732 rval : The other register, or an int.
1733 multop : An integer to multiply rval with.
1734 other_op : One of the entities of the main effect,
1735 whose mode we must consider. */
1738 cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
1739 int lreg, int rreg, int rval,
1740 int multop, int other_op)
1742 /* Find what value to multiply with, for rx =ry + rz * n. */
1743 int mult = multop < 0 ? 1 : INTVAL (ops[multop]);
1745 rtx reg_rtx = ops[rreg];
1746 rtx val_rtx = ops[rval];
1748 /* The operands may be swapped. Canonicalize them in reg_rtx and
1749 val_rtx, where reg_rtx always is a reg (for this constraint to
1751 if (! BASE_P (reg_rtx))
1752 reg_rtx = val_rtx, val_rtx = ops[rreg];
1754 /* Don't forget to check that reg_rtx really is a reg. If it isn't,
1755 we have no business. */
1756 if (! BASE_P (reg_rtx))
1759 /* Don't do this when -mno-split. */
1760 if (!TARGET_SIDE_EFFECT_PREFIXES)
1763 /* The mult expression may be hidden in lreg. FIXME: Add more
1764 commentary about that. */
1765 if (GET_CODE (val_rtx) == MULT)
1767 mult = INTVAL (XEXP (val_rtx, 1));
1768 val_rtx = XEXP (val_rtx, 0);
1772 /* First check the "other operand". */
1775 if (GET_MODE_SIZE (GET_MODE (ops[other_op])) > UNITS_PER_WORD)
1778 /* Check if the lvalue register is the same as the "other
1779 operand". If so, the result is undefined and we shouldn't do
1780 this. FIXME: Check again. */
1781 if ((BASE_P (ops[lreg])
1782 && BASE_P (ops[other_op])
1783 && REGNO (ops[lreg]) == REGNO (ops[other_op]))
1784 || rtx_equal_p (ops[other_op], ops[lreg]))
1788 /* Do not accept frame_pointer_rtx as any operand. */
1789 if (ops[lreg] == frame_pointer_rtx || ops[rreg] == frame_pointer_rtx
1790 || ops[rval] == frame_pointer_rtx
1791 || (other_op >= 0 && ops[other_op] == frame_pointer_rtx))
1795 && ! BASE_P (val_rtx))
1798 /* Do not allow rx = rx + n if a normal add or sub with same size
1800 if (rtx_equal_p (ops[lreg], reg_rtx)
1801 && GET_CODE (val_rtx) == CONST_INT
1802 && (INTVAL (val_rtx) <= 63 && INTVAL (val_rtx) >= -63))
1805 /* Check allowed cases, like [r(+)?].[bwd] and const.
1806 A symbol is not allowed with PIC. */
1807 if (CONSTANT_P (val_rtx))
1808 return flag_pic == 0 || cris_symbol (val_rtx) == 0;
1810 if (GET_CODE (val_rtx) == MEM
1811 && BASE_OR_AUTOINCR_P (XEXP (val_rtx, 0)))
1814 if (GET_CODE (val_rtx) == SIGN_EXTEND
1815 && GET_CODE (XEXP (val_rtx, 0)) == MEM
1816 && BASE_OR_AUTOINCR_P (XEXP (XEXP (val_rtx, 0), 0)))
1819 /* If we got here, it's not a valid addressing mode. */
1822 else if (code == MULT
1823 || (code == PLUS && BASE_P (val_rtx)))
1825 /* Do not allow rx = rx + ry.S, since it doesn't give better code. */
1826 if (rtx_equal_p (ops[lreg], reg_rtx)
1827 || (mult == 1 && rtx_equal_p (ops[lreg], val_rtx)))
1830 /* Do not allow bad multiply-values. */
1831 if (mult != 1 && mult != 2 && mult != 4)
1834 /* Only allow r + ... */
1835 if (! BASE_P (reg_rtx))
1838 /* If we got here, all seems ok.
1839 (All checks need to be done above). */
1843 /* If we get here, the caller got its initial tests wrong. */
1844 internal_error ("internal error: cris_side_effect_mode_ok with bad operands");
1847 /* The function reg_overlap_mentioned_p in CVS (still as of 2001-05-16)
1848 does not handle the case where the IN operand is strict_low_part; it
1849 does handle it for X. Test-case in Axis-20010516. This function takes
1850 care of that for THIS port. FIXME: strict_low_part is going away
1854 cris_reg_overlap_mentioned_p (rtx x, rtx in)
1856 /* The function reg_overlap_mentioned now handles when X is
1857 strict_low_part, but not when IN is a STRICT_LOW_PART. */
1858 if (GET_CODE (in) == STRICT_LOW_PART)
1861 return reg_overlap_mentioned_p (x, in);
1864 /* The TARGET_ASM_NAMED_SECTION worker.
1865 We just dispatch to the functions for ELF and a.out. */
1868 cris_target_asm_named_section (const char *name, unsigned int flags,
1872 default_no_named_section (name, flags, decl);
1874 default_elf_asm_named_section (name, flags, decl);
1877 /* The LEGITIMATE_PIC_OPERAND_P worker. */
1880 cris_legitimate_pic_operand (rtx x)
1882 /* The PIC representation of a symbol with a GOT entry will be (for
1883 example; relocations differ):
1884 sym => [rPIC+sym:GOT]
1885 and for a GOT-less symbol it will be (for example, relocation differ):
1886 sym => rPIC+sym:GOTOFF
1887 so only a symbol with a GOT is by itself a valid operand, and it
1888 can't be a sum of a symbol and an offset. */
1889 return ! cris_symbol (x) || cris_got_symbol (x);
1892 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
1898 switch (GET_CODE (x))
1905 if (XINT (x, 1) == CRIS_UNSPEC_GOT || XINT (x, 1) != CRIS_UNSPEC_PLT)
1907 /* A PLT reference. */
1908 ASSERT_PLT_UNSPEC (x);
1912 return cris_symbol (XEXP (x, 0));
1916 return cris_symbol (XEXP (x, 0)) || cris_symbol (XEXP (x, 1));
1923 fatal_insn ("unrecognized supposed constant", x);
1929 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
1930 CONSTANT_P, and the symbol does not need a GOT entry. Also set
1931 current_function_uses_pic_offset_table if we're generating PIC and ever
1932 see something that would need one. */
1935 cris_gotless_symbol (rtx x)
1937 #ifdef ENABLE_CHECKING
1942 switch (GET_CODE (x))
1945 if (XINT (x, 1) == CRIS_UNSPEC_GOT)
1947 if (XINT (x, 1) != CRIS_UNSPEC_PLT)
1949 ASSERT_PLT_UNSPEC (x);
1954 current_function_uses_pic_offset_table = 1;
1955 return SYMBOL_REF_LOCAL_P (x);
1958 /* We don't set current_function_uses_pic_offset_table for
1959 LABEL_REF:s in here, since they are almost always originating
1960 from some branch. The only time it does not come from a label is
1961 when GCC does something like __builtin_setjmp. Then we get the
1962 LABEL_REF from the movsi expander, so we mark it there as a
1967 return cris_gotless_symbol (XEXP (x, 0));
1972 int x0 = cris_gotless_symbol (XEXP (x, 0)) != 0;
1973 int x1 = cris_gotless_symbol (XEXP (x, 1)) != 0;
1975 /* One and only one of them must be a local symbol. Neither must
1976 be some other, more general kind of symbol. */
1979 && ! (x0 == 0 && cris_symbol (XEXP (x, 0)))
1980 && ! (x1 == 0 && cris_symbol (XEXP (x, 1)));
1988 fatal_insn ("unrecognized supposed constant", x);
1994 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
1995 CONSTANT_P, and the symbol needs a GOT entry. */
1998 cris_got_symbol (rtx x)
2000 #ifdef ENABLE_CHECKING
2005 switch (GET_CODE (x))
2008 if (XINT (x, 1) == CRIS_UNSPEC_GOT)
2010 ASSERT_PLT_UNSPEC (x);
2015 current_function_uses_pic_offset_table = 1;
2016 return ! SYMBOL_REF_LOCAL_P (x);
2019 return cris_got_symbol (XEXP (x, 0));
2022 /* A LABEL_REF is never visible as a symbol outside the local
2026 /* Nope, can't access the GOT for "symbol + offset". */
2034 fatal_insn ("unrecognized supposed constant in cris_global_pic_symbol",
2041 /* TARGET_HANDLE_OPTION worker. We just store the values into local
2042 variables here. Checks for correct semantics are in
2043 cris_override_options. */
2046 cris_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED)
2054 + MASK_ALIGN_BY_32);
2057 case OPT_mno_etrax100:
2061 + MASK_ALIGN_BY_32);
2067 |= (MASK_STACK_ALIGN
2070 + MASK_ALIGN_BY_32);
2076 |= (MASK_STACK_ALIGN
2084 &= ~(MASK_STACK_ALIGN
2089 case OPT_max_stackframe_:
2090 case OPT_mmax_stackframe_:
2091 cris_max_stackframe_str = arg;
2100 cris_tune_str = arg;
2107 CRIS_SUBTARGET_HANDLE_OPTION(code, arg, value);
2112 /* The OVERRIDE_OPTIONS worker.
2113 As is the norm, this also parses -mfoo=bar type parameters. */
2116 cris_override_options (void)
2118 if (cris_max_stackframe_str)
2120 cris_max_stackframe = atoi (cris_max_stackframe_str);
2122 /* Do some sanity checking. */
2123 if (cris_max_stackframe < 0 || cris_max_stackframe > 0x20000000)
2124 internal_error ("-max-stackframe=%d is not usable, not between 0 and %d",
2125 cris_max_stackframe, 0x20000000);
2128 /* Let "-metrax4" and "-metrax100" change the cpu version. */
2129 if (TARGET_SVINTO && cris_cpu_version < CRIS_CPU_SVINTO)
2130 cris_cpu_version = CRIS_CPU_SVINTO;
2131 else if (TARGET_ETRAX4_ADD && cris_cpu_version < CRIS_CPU_ETRAX4)
2132 cris_cpu_version = CRIS_CPU_ETRAX4;
2134 /* Parse -march=... and its synonym, the deprecated -mcpu=... */
2138 = (*cris_cpu_str == 'v' ? atoi (cris_cpu_str + 1) : -1);
2140 if (strcmp ("etrax4", cris_cpu_str) == 0)
2141 cris_cpu_version = 3;
2143 if (strcmp ("svinto", cris_cpu_str) == 0
2144 || strcmp ("etrax100", cris_cpu_str) == 0)
2145 cris_cpu_version = 8;
2147 if (strcmp ("ng", cris_cpu_str) == 0
2148 || strcmp ("etrax100lx", cris_cpu_str) == 0)
2149 cris_cpu_version = 10;
2151 if (cris_cpu_version < 0 || cris_cpu_version > 10)
2152 error ("unknown CRIS version specification in -march= or -mcpu= : %s",
2155 /* Set the target flags. */
2156 if (cris_cpu_version >= CRIS_CPU_ETRAX4)
2157 target_flags |= MASK_ETRAX4_ADD;
2159 /* If this is Svinto or higher, align for 32 bit accesses. */
2160 if (cris_cpu_version >= CRIS_CPU_SVINTO)
2162 |= (MASK_SVINTO | MASK_ALIGN_BY_32
2163 | MASK_STACK_ALIGN | MASK_CONST_ALIGN
2166 /* Note that we do not add new flags when it can be completely
2167 described with a macro that uses -mcpu=X. So
2168 TARGET_HAS_MUL_INSNS is (cris_cpu_version >= CRIS_CPU_NG). */
2174 = (*cris_tune_str == 'v' ? atoi (cris_tune_str + 1) : -1);
2176 if (strcmp ("etrax4", cris_tune_str) == 0)
2179 if (strcmp ("svinto", cris_tune_str) == 0
2180 || strcmp ("etrax100", cris_tune_str) == 0)
2183 if (strcmp ("ng", cris_tune_str) == 0
2184 || strcmp ("etrax100lx", cris_tune_str) == 0)
2187 if (cris_tune < 0 || cris_tune > 10)
2188 error ("unknown CRIS cpu version specification in -mtune= : %s",
2191 if (cris_tune >= CRIS_CPU_SVINTO)
2192 /* We have currently nothing more to tune than alignment for
2195 |= (MASK_STACK_ALIGN | MASK_CONST_ALIGN
2196 | MASK_DATA_ALIGN | MASK_ALIGN_BY_32);
2201 /* Use error rather than warning, so invalid use is easily
2202 detectable. Still change to the values we expect, to avoid
2206 error ("-fPIC and -fpic are not supported in this configuration");
2210 /* Turn off function CSE. We need to have the addresses reach the
2211 call expanders to get PLT-marked, as they could otherwise be
2212 compared against zero directly or indirectly. After visiting the
2213 call expanders they will then be cse:ed, as the call expanders
2214 force_reg the addresses, effectively forcing flag_no_function_cse
2216 flag_no_function_cse = 1;
2219 if (write_symbols == DWARF2_DEBUG && ! TARGET_ELF)
2221 warning (0, "that particular -g option is invalid with -maout and -melinux");
2222 write_symbols = DBX_DEBUG;
2225 /* Set the per-function-data initializer. */
2226 init_machine_status = cris_init_machine_status;
2229 /* The TARGET_ASM_OUTPUT_MI_THUNK worker. */
2232 cris_asm_output_mi_thunk (FILE *stream,
2233 tree thunkdecl ATTRIBUTE_UNUSED,
2234 HOST_WIDE_INT delta,
2235 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
2239 fprintf (stream, "\tadd%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
2240 ADDITIVE_SIZE_MODIFIER (delta), delta,
2241 reg_names[CRIS_FIRST_ARG_REG]);
2243 fprintf (stream, "\tsub%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
2244 ADDITIVE_SIZE_MODIFIER (-delta), -delta,
2245 reg_names[CRIS_FIRST_ARG_REG]);
2249 const char *name = XSTR (XEXP (DECL_RTL (funcdecl), 0), 0);
2251 name = (* targetm.strip_name_encoding) (name);
2252 fprintf (stream, "add.d ");
2253 assemble_name (stream, name);
2254 fprintf (stream, "%s,$pc\n", CRIS_PLT_PCOFFSET_SUFFIX);
2258 fprintf (stream, "jump ");
2259 assemble_name (stream, XSTR (XEXP (DECL_RTL (funcdecl), 0), 0));
2260 fprintf (stream, "\n");
2264 /* Boilerplate emitted at start of file.
2266 NO_APP *only at file start* means faster assembly. It also means
2267 comments are not allowed. In some cases comments will be output
2268 for debugging purposes. Make sure they are allowed then.
2270 We want a .file directive only if TARGET_ELF. */
2272 cris_file_start (void)
2274 /* These expressions can vary at run time, so we cannot put
2275 them into TARGET_INITIALIZER. */
2276 targetm.file_start_app_off = !(TARGET_PDEBUG || flag_print_asm_name);
2277 targetm.file_start_file_directive = TARGET_ELF;
2279 default_file_start ();
2282 /* Rename the function calls for integer multiply and divide. */
2284 cris_init_libfuncs (void)
2286 set_optab_libfunc (smul_optab, SImode, "__Mul");
2287 set_optab_libfunc (sdiv_optab, SImode, "__Div");
2288 set_optab_libfunc (udiv_optab, SImode, "__Udiv");
2289 set_optab_libfunc (smod_optab, SImode, "__Mod");
2290 set_optab_libfunc (umod_optab, SImode, "__Umod");
2293 /* The INIT_EXPANDERS worker sets the per-function-data initializer and
2297 cris_init_expanders (void)
2299 /* Nothing here at the moment. */
2302 /* Zero initialization is OK for all current fields. */
2304 static struct machine_function *
2305 cris_init_machine_status (void)
2307 return ggc_alloc_cleared (sizeof (struct machine_function));
2310 /* Split a 2 word move (DI or presumably DF) into component parts.
2311 Originally a copy of gen_split_move_double in m32r.c. */
2314 cris_split_movdx (rtx *operands)
2316 enum machine_mode mode = GET_MODE (operands[0]);
2317 rtx dest = operands[0];
2318 rtx src = operands[1];
2321 /* We used to have to handle (SUBREG (MEM)) here, but that should no
2322 longer happen; after reload there are no SUBREGs any more, and we're
2323 only called after reload. */
2324 if (GET_CODE (dest) == SUBREG || GET_CODE (src) == SUBREG)
2328 if (GET_CODE (dest) == REG)
2330 int dregno = REGNO (dest);
2332 /* Reg-to-reg copy. */
2333 if (GET_CODE (src) == REG)
2335 int sregno = REGNO (src);
2337 int reverse = (dregno == sregno + 1);
2339 /* We normally copy the low-numbered register first. However, if
2340 the first register operand 0 is the same as the second register of
2341 operand 1, we must copy in the opposite order. */
2342 emit_insn (gen_rtx_SET (VOIDmode,
2343 operand_subword (dest, reverse, TRUE, mode),
2344 operand_subword (src, reverse, TRUE, mode)));
2346 emit_insn (gen_rtx_SET (VOIDmode,
2347 operand_subword (dest, !reverse, TRUE, mode),
2348 operand_subword (src, !reverse, TRUE, mode)));
2350 /* Constant-to-reg copy. */
2351 else if (GET_CODE (src) == CONST_INT || GET_CODE (src) == CONST_DOUBLE)
2354 split_double (src, &words[0], &words[1]);
2355 emit_insn (gen_rtx_SET (VOIDmode,
2356 operand_subword (dest, 0, TRUE, mode),
2359 emit_insn (gen_rtx_SET (VOIDmode,
2360 operand_subword (dest, 1, TRUE, mode),
2363 /* Mem-to-reg copy. */
2364 else if (GET_CODE (src) == MEM)
2366 /* If the high-address word is used in the address, we must load it
2367 last. Otherwise, load it first. */
2368 rtx addr = XEXP (src, 0);
2370 = (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
2372 /* The original code implies that we can't do
2373 move.x [rN+],rM move.x [rN],rM+1
2374 when rN is dead, because of REG_NOTES damage. That is
2375 consistent with what I've seen, so don't try it.
2377 We have two different cases here; if the addr is POST_INC,
2378 just pass it through, otherwise add constants. */
2380 if (GET_CODE (addr) == POST_INC)
2382 emit_insn (gen_rtx_SET (VOIDmode,
2383 operand_subword (dest, 0, TRUE, mode),
2384 change_address (src, SImode, addr)));
2385 emit_insn (gen_rtx_SET (VOIDmode,
2386 operand_subword (dest, 1, TRUE, mode),
2387 change_address (src, SImode, addr)));
2391 /* Make sure we don't get any other addresses with
2392 embedded postincrements. They should be stopped in
2393 GO_IF_LEGITIMATE_ADDRESS, but we're here for your
2395 if (side_effects_p (addr))
2396 fatal_insn ("unexpected side-effects in address", addr);
2398 emit_insn (gen_rtx_SET
2400 operand_subword (dest, reverse, TRUE, mode),
2403 plus_constant (addr,
2404 reverse * UNITS_PER_WORD))));
2405 emit_insn (gen_rtx_SET
2407 operand_subword (dest, ! reverse, TRUE, mode),
2410 plus_constant (addr,
2418 /* Reg-to-mem copy or clear mem. */
2419 else if (GET_CODE (dest) == MEM
2420 && (GET_CODE (src) == REG
2421 || src == const0_rtx
2422 || src == CONST0_RTX (DFmode)))
2424 rtx addr = XEXP (dest, 0);
2426 if (GET_CODE (addr) == POST_INC)
2428 emit_insn (gen_rtx_SET (VOIDmode,
2429 change_address (dest, SImode, addr),
2430 operand_subword (src, 0, TRUE, mode)));
2431 emit_insn (gen_rtx_SET (VOIDmode,
2432 change_address (dest, SImode, addr),
2433 operand_subword (src, 1, TRUE, mode)));
2437 /* Make sure we don't get any other addresses with embedded
2438 postincrements. They should be stopped in
2439 GO_IF_LEGITIMATE_ADDRESS, but we're here for your safety. */
2440 if (side_effects_p (addr))
2441 fatal_insn ("unexpected side-effects in address", addr);
2443 emit_insn (gen_rtx_SET
2445 change_address (dest, SImode, addr),
2446 operand_subword (src, 0, TRUE, mode)));
2448 emit_insn (gen_rtx_SET
2450 change_address (dest, SImode,
2451 plus_constant (addr,
2453 operand_subword (src, 1, TRUE, mode)));
2465 /* The expander for the prologue pattern name. */
2468 cris_expand_prologue (void)
2471 int size = get_frame_size ();
2472 /* Shorten the used name for readability. */
2473 int cfoa_size = current_function_outgoing_args_size;
2474 int last_movem_reg = -1;
2477 int return_address_on_stack = cris_return_address_on_stack ();
2478 int got_really_used = current_function_uses_pic_offset_table;
2479 int n_movem_regs = 0;
2480 int pretend = current_function_pretend_args_size;
2482 /* Don't do anything if no prologues or epilogues are wanted. */
2483 if (!TARGET_PROLOGUE_EPILOGUE)
2489 /* Align the size to what's best for the CPU model. */
2490 if (TARGET_STACK_ALIGN)
2491 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
2495 /* See also cris_setup_incoming_varargs where
2496 cfun->machine->stdarg_regs is set. There are other setters of
2497 current_function_pretend_args_size than stdarg handling, like
2498 for an argument passed with parts in R13 and stack. We must
2499 not store R13 into the pretend-area for that case, as GCC does
2500 that itself. "Our" store would be marked as redundant and GCC
2501 will attempt to remove it, which will then be flagged as an
2502 internal error; trying to remove a frame-related insn. */
2503 int stdarg_regs = cfun->machine->stdarg_regs;
2505 framesize += pretend;
2507 for (regno = CRIS_FIRST_ARG_REG + CRIS_MAX_ARGS_IN_REGS - 1;
2509 regno--, pretend -= 4, stdarg_regs--)
2511 insn = emit_insn (gen_rtx_SET (VOIDmode,
2513 plus_constant (stack_pointer_rtx,
2515 /* FIXME: When dwarf2 frame output and unless asynchronous
2516 exceptions, make dwarf2 bundle together all stack
2517 adjustments like it does for registers between stack
2519 RTX_FRAME_RELATED_P (insn) = 1;
2521 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2522 set_mem_alias_set (mem, get_varargs_alias_set ());
2523 insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
2525 /* Note the absence of RTX_FRAME_RELATED_P on the above insn:
2526 the value isn't restored, so we don't want to tell dwarf2
2527 that it's been stored to stack, else EH handling info would
2531 /* For other setters of current_function_pretend_args_size, we
2532 just adjust the stack by leaving the remaining size in
2533 "pretend", handled below. */
2536 /* Save SRP if not a leaf function. */
2537 if (return_address_on_stack)
2539 insn = emit_insn (gen_rtx_SET (VOIDmode,
2541 plus_constant (stack_pointer_rtx,
2544 RTX_FRAME_RELATED_P (insn) = 1;
2546 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2547 set_mem_alias_set (mem, get_frame_alias_set ());
2548 insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM));
2549 RTX_FRAME_RELATED_P (insn) = 1;
2553 /* Set up the frame pointer, if needed. */
2554 if (frame_pointer_needed)
2556 insn = emit_insn (gen_rtx_SET (VOIDmode,
2558 plus_constant (stack_pointer_rtx,
2561 RTX_FRAME_RELATED_P (insn) = 1;
2563 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2564 set_mem_alias_set (mem, get_frame_alias_set ());
2565 insn = emit_move_insn (mem, frame_pointer_rtx);
2566 RTX_FRAME_RELATED_P (insn) = 1;
2568 insn = emit_move_insn (frame_pointer_rtx, stack_pointer_rtx);
2569 RTX_FRAME_RELATED_P (insn) = 1;
2574 /* Between frame-pointer and saved registers lie the area for local
2575 variables. If we get here with "pretended" size remaining, count
2576 it into the general stack size. */
2579 /* Get a contiguous sequence of registers, starting with R0, that need
2581 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2583 if (cris_reg_saved_in_regsave_area (regno, got_really_used))
2587 /* Check if movem may be used for registers so far. */
2588 if (regno == last_movem_reg + 1)
2589 /* Yes, update next expected register. */
2590 last_movem_reg = regno;
2593 /* We cannot use movem for all registers. We have to flush
2594 any movem:ed registers we got so far. */
2595 if (last_movem_reg != -1)
2598 = (n_movem_regs == 1) ? 1 : last_movem_reg + 1;
2600 /* It is a win to use a side-effect assignment for
2601 64 <= size <= 128. But side-effect on movem was
2602 not usable for CRIS v0..3. Also only do it if
2603 side-effects insns are allowed. */
2604 if ((last_movem_reg + 1) * 4 + size >= 64
2605 && (last_movem_reg + 1) * 4 + size <= 128
2606 && (cris_cpu_version >= CRIS_CPU_SVINTO || n_saved == 1)
2607 && TARGET_SIDE_EFFECT_PREFIXES)
2610 = gen_rtx_MEM (SImode,
2611 plus_constant (stack_pointer_rtx,
2612 -(n_saved * 4 + size)));
2613 set_mem_alias_set (mem, get_frame_alias_set ());
2615 = cris_emit_movem_store (mem, GEN_INT (n_saved),
2616 -(n_saved * 4 + size),
2622 = gen_rtx_SET (VOIDmode,
2624 plus_constant (stack_pointer_rtx,
2625 -(n_saved * 4 + size)));
2626 insn = emit_insn (insn);
2627 RTX_FRAME_RELATED_P (insn) = 1;
2629 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2630 set_mem_alias_set (mem, get_frame_alias_set ());
2631 insn = cris_emit_movem_store (mem, GEN_INT (n_saved),
2635 framesize += n_saved * 4 + size;
2636 last_movem_reg = -1;
2640 insn = emit_insn (gen_rtx_SET (VOIDmode,
2642 plus_constant (stack_pointer_rtx,
2644 RTX_FRAME_RELATED_P (insn) = 1;
2646 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2647 set_mem_alias_set (mem, get_frame_alias_set ());
2648 insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
2649 RTX_FRAME_RELATED_P (insn) = 1;
2651 framesize += 4 + size;
2657 /* Check after, if we could movem all registers. This is the normal case. */
2658 if (last_movem_reg != -1)
2661 = (n_movem_regs == 1) ? 1 : last_movem_reg + 1;
2663 /* Side-effect on movem was not usable for CRIS v0..3. Also only
2664 do it if side-effects insns are allowed. */
2665 if ((last_movem_reg + 1) * 4 + size >= 64
2666 && (last_movem_reg + 1) * 4 + size <= 128
2667 && (cris_cpu_version >= CRIS_CPU_SVINTO || n_saved == 1)
2668 && TARGET_SIDE_EFFECT_PREFIXES)
2671 = gen_rtx_MEM (SImode,
2672 plus_constant (stack_pointer_rtx,
2673 -(n_saved * 4 + size)));
2674 set_mem_alias_set (mem, get_frame_alias_set ());
2675 insn = cris_emit_movem_store (mem, GEN_INT (n_saved),
2676 -(n_saved * 4 + size), true);
2681 = gen_rtx_SET (VOIDmode,
2683 plus_constant (stack_pointer_rtx,
2684 -(n_saved * 4 + size)));
2685 insn = emit_insn (insn);
2686 RTX_FRAME_RELATED_P (insn) = 1;
2688 mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
2689 set_mem_alias_set (mem, get_frame_alias_set ());
2690 insn = cris_emit_movem_store (mem, GEN_INT (n_saved), 0, true);
2693 framesize += n_saved * 4 + size;
2694 /* We have to put outgoing argument space after regs. */
2697 insn = emit_insn (gen_rtx_SET (VOIDmode,
2699 plus_constant (stack_pointer_rtx,
2701 RTX_FRAME_RELATED_P (insn) = 1;
2702 framesize += cfoa_size;
2705 else if ((size + cfoa_size) > 0)
2707 insn = emit_insn (gen_rtx_SET (VOIDmode,
2709 plus_constant (stack_pointer_rtx,
2710 -(cfoa_size + size))));
2711 RTX_FRAME_RELATED_P (insn) = 1;
2712 framesize += size + cfoa_size;
2715 /* Set up the PIC register, if it is used. */
2716 if (got_really_used)
2719 = gen_rtx_UNSPEC (SImode, gen_rtvec (1, const0_rtx), CRIS_UNSPEC_GOT);
2720 emit_move_insn (pic_offset_table_rtx, got);
2722 /* FIXME: This is a cover-up for flow2 messing up; it doesn't
2723 follow exceptional paths and tries to delete the GOT load as
2724 unused, if it isn't used on the non-exceptional paths. Other
2725 ports have similar or other cover-ups, or plain bugs marking
2726 the GOT register load as maybe-dead. To see this, remove the
2727 line below and try libsupc++/vec.cc or a trivial
2728 "static void y (); void x () {try {y ();} catch (...) {}}". */
2729 emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx));
2732 if (cris_max_stackframe && framesize > cris_max_stackframe)
2733 warning (0, "stackframe too big: %d bytes", framesize);
2736 /* The expander for the epilogue pattern. */
2739 cris_expand_epilogue (void)
2742 int size = get_frame_size ();
2743 int last_movem_reg = -1;
2744 int argspace_offset = current_function_outgoing_args_size;
2745 int pretend = current_function_pretend_args_size;
2747 bool return_address_on_stack = cris_return_address_on_stack ();
2748 /* A reference may have been optimized out
2749 (like the abort () in fde_split in unwind-dw2-fde.c, at least 3.2.1)
2750 so check that it's still used. */
2751 int got_really_used = current_function_uses_pic_offset_table;
2752 int n_movem_regs = 0;
2754 if (!TARGET_PROLOGUE_EPILOGUE)
2757 /* Align byte count of stack frame. */
2758 if (TARGET_STACK_ALIGN)
2759 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
2761 /* Check how many saved regs we can movem. They start at r0 and must
2764 regno < FIRST_PSEUDO_REGISTER;
2766 if (cris_reg_saved_in_regsave_area (regno, got_really_used))
2770 if (regno == last_movem_reg + 1)
2771 last_movem_reg = regno;
2776 /* If there was only one register that really needed to be saved
2777 through movem, don't use movem. */
2778 if (n_movem_regs == 1)
2779 last_movem_reg = -1;
2781 /* Now emit "normal" move insns for all regs higher than the movem
2783 for (regno = FIRST_PSEUDO_REGISTER - 1;
2784 regno > last_movem_reg;
2786 if (cris_reg_saved_in_regsave_area (regno, got_really_used))
2788 if (argspace_offset)
2790 /* There is an area for outgoing parameters located before
2791 the saved registers. We have to adjust for that. */
2792 emit_insn (gen_rtx_SET (VOIDmode,
2794 plus_constant (stack_pointer_rtx,
2796 /* Make sure we only do this once. */
2797 argspace_offset = 0;
2800 mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode,
2801 stack_pointer_rtx));
2802 set_mem_alias_set (mem, get_frame_alias_set ());
2803 emit_move_insn (gen_rtx_raw_REG (SImode, regno), mem);
2806 /* If we have any movem-restore, do it now. */
2807 if (last_movem_reg != -1)
2809 if (argspace_offset)
2811 emit_insn (gen_rtx_SET (VOIDmode,
2813 plus_constant (stack_pointer_rtx,
2815 argspace_offset = 0;
2818 mem = gen_rtx_MEM (SImode,
2819 gen_rtx_POST_INC (SImode, stack_pointer_rtx));
2820 set_mem_alias_set (mem, get_frame_alias_set ());
2821 emit_insn (cris_gen_movem_load (mem, GEN_INT (last_movem_reg + 1), 0));
2824 /* If we don't clobber all of the allocated stack area (we've already
2825 deallocated saved registers), GCC might want to schedule loads from
2826 the stack to *after* the stack-pointer restore, which introduces an
2827 interrupt race condition. This happened for the initial-value
2828 SRP-restore for g++.dg/eh/registers1.C (noticed by inspection of
2829 other failure for that test). It also happened for the stack slot
2830 for the return value in (one version of)
2831 linux/fs/dcache.c:__d_lookup, at least with "-O2
2832 -fno-omit-frame-pointer". */
2834 /* Restore frame pointer if necessary. */
2835 if (frame_pointer_needed)
2837 emit_insn (gen_cris_frame_deallocated_barrier ());
2839 emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
2840 mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode,
2841 stack_pointer_rtx));
2842 set_mem_alias_set (mem, get_frame_alias_set ());
2843 emit_move_insn (frame_pointer_rtx, mem);
2845 else if ((size + argspace_offset) != 0)
2847 emit_insn (gen_cris_frame_deallocated_barrier ());
2849 /* If there was no frame-pointer to restore sp from, we must
2850 explicitly deallocate local variables. */
2852 /* Handle space for outgoing parameters that hasn't been handled
2854 size += argspace_offset;
2856 emit_insn (gen_rtx_SET (VOIDmode,
2858 plus_constant (stack_pointer_rtx, size)));
2861 /* If this function has no pushed register parameters
2862 (stdargs/varargs), and if it is not a leaf function, then we have
2863 the return address on the stack. */
2864 if (return_address_on_stack && pretend == 0)
2866 if (current_function_calls_eh_return)
2869 rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
2870 mem = gen_rtx_MEM (SImode,
2871 gen_rtx_POST_INC (SImode,
2872 stack_pointer_rtx));
2873 set_mem_alias_set (mem, get_frame_alias_set ());
2874 emit_move_insn (srpreg, mem);
2876 emit_insn (gen_addsi3 (stack_pointer_rtx,
2878 gen_rtx_raw_REG (SImode,
2879 CRIS_STACKADJ_REG)));
2880 cris_expand_return (false);
2883 cris_expand_return (true);
2888 /* If we pushed some register parameters, then adjust the stack for
2892 /* If SRP is stored on the way, we need to restore it first. */
2893 if (return_address_on_stack)
2896 rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
2897 mem = gen_rtx_MEM (SImode,
2898 gen_rtx_POST_INC (SImode,
2899 stack_pointer_rtx));
2900 set_mem_alias_set (mem, get_frame_alias_set ());
2901 emit_move_insn (srpreg, mem);
2904 emit_insn (gen_rtx_SET (VOIDmode,
2906 plus_constant (stack_pointer_rtx, pretend)));
2909 /* Perform the "physical" unwinding that the EH machinery calculated. */
2910 if (current_function_calls_eh_return)
2911 emit_insn (gen_addsi3 (stack_pointer_rtx,
2913 gen_rtx_raw_REG (SImode,
2914 CRIS_STACKADJ_REG)));
2915 cris_expand_return (false);
2918 /* Worker function for generating movem from mem for load_multiple. */
2921 cris_gen_movem_load (rtx src, rtx nregs_rtx, int nprefix)
2923 int nregs = INTVAL (nregs_rtx);
2927 rtx srcreg = XEXP (src, 0);
2928 unsigned int regno = nregs - 1;
2931 if (GET_CODE (srcreg) == POST_INC)
2932 srcreg = XEXP (srcreg, 0);
2934 if (!REG_P (srcreg))
2937 /* Don't use movem for just one insn. The insns are equivalent except
2938 for the pipeline hazard (on v32); movem does not forward the loaded
2939 registers so there's a three cycles penalty for their use. */
2941 return gen_movsi (gen_rtx_REG (SImode, 0), src);
2943 vec = rtvec_alloc (nprefix + nregs
2944 + (GET_CODE (XEXP (src, 0)) == POST_INC));
2946 if (GET_CODE (XEXP (src, 0)) == POST_INC)
2948 RTVEC_ELT (vec, nprefix + 1)
2949 = gen_rtx_SET (VOIDmode, srcreg, plus_constant (srcreg, nregs * 4));
2953 src = replace_equiv_address (src, srcreg);
2954 RTVEC_ELT (vec, nprefix)
2955 = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regno), src);
2958 for (i = 1; i < nregs; i++, eltno++)
2960 RTVEC_ELT (vec, nprefix + eltno)
2961 = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regno),
2962 adjust_address_nv (src, SImode, i * 4));
2966 return gen_rtx_PARALLEL (VOIDmode, vec);
2969 /* Worker function for generating movem to mem. If FRAME_RELATED, notes
2970 are added that the dwarf2 machinery understands. */
2973 cris_emit_movem_store (rtx dest, rtx nregs_rtx, int increment,
2976 int nregs = INTVAL (nregs_rtx);
2981 rtx destreg = XEXP (dest, 0);
2982 unsigned int regno = nregs - 1;
2985 if (GET_CODE (destreg) == POST_INC)
2986 increment += nregs * 4;
2988 if (GET_CODE (destreg) == POST_INC || GET_CODE (destreg) == PLUS)
2989 destreg = XEXP (destreg, 0);
2991 if (!REG_P (destreg))
2994 /* Don't use movem for just one insn. The insns are equivalent except
2995 for the pipeline hazard (on v32); movem does not forward the loaded
2996 registers so there's a three cycles penalty for use. */
2999 rtx mov = gen_rtx_SET (VOIDmode, dest, gen_rtx_REG (SImode, 0));
3003 insn = emit_insn (mov);
3005 RTX_FRAME_RELATED_P (insn) = 1;
3009 /* If there was a request for a side-effect, create the ordinary
3011 vec = rtvec_alloc (2);
3013 RTVEC_ELT (vec, 0) = mov;
3014 RTVEC_ELT (vec, 1) = gen_rtx_SET (VOIDmode, destreg,
3015 plus_constant (destreg, increment));
3018 RTX_FRAME_RELATED_P (mov) = 1;
3019 RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 1)) = 1;
3024 vec = rtvec_alloc (nregs + (increment != 0 ? 1 : 0));
3026 = gen_rtx_SET (VOIDmode,
3027 replace_equiv_address (dest,
3028 plus_constant (destreg,
3030 gen_rtx_REG (SImode, regno));
3033 /* The dwarf2 info wants this mark on each component in a parallel
3034 that's part of the prologue (though it's optional on the first
3037 RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 0)) = 1;
3042 = gen_rtx_SET (VOIDmode, destreg,
3043 plus_constant (destreg,
3045 ? increment : nregs * 4));
3049 RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 1)) = 1;
3051 /* Don't call adjust_address_nv on a post-incremented address if
3053 if (GET_CODE (XEXP (dest, 0)) == POST_INC)
3054 dest = replace_equiv_address (dest, destreg);
3057 for (i = 1; i < nregs; i++, eltno++)
3059 RTVEC_ELT (vec, eltno)
3060 = gen_rtx_SET (VOIDmode, adjust_address_nv (dest, SImode, i * 4),
3061 gen_rtx_REG (SImode, regno));
3063 RTX_FRAME_RELATED_P (RTVEC_ELT (vec, eltno)) = 1;
3068 insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, vec));
3070 /* Because dwarf2out.c handles the insns in a parallel as a sequence,
3071 we need to keep the stack adjustment separate, after the
3072 MEM-setters. Else the stack-adjustment in the second component of
3073 the parallel would be mishandled; the offsets for the SETs that
3074 follow it would be wrong. We prepare for this by adding a
3075 REG_FRAME_RELATED_EXPR with the MEM-setting parts in a SEQUENCE
3076 followed by the increment. Note that we have FRAME_RELATED_P on
3077 all the SETs, including the original stack adjustment SET in the
3083 rtx seq = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (nregs + 1));
3084 XVECEXP (seq, 0, 0) = XVECEXP (PATTERN (insn), 0, 0);
3085 for (i = 1; i < nregs; i++)
3086 XVECEXP (seq, 0, i) = XVECEXP (PATTERN (insn), 0, i + 1);
3087 XVECEXP (seq, 0, nregs) = XVECEXP (PATTERN (insn), 0, 1);
3089 = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, seq,
3093 RTX_FRAME_RELATED_P (insn) = 1;
3099 /* Use from within code, from e.g. PRINT_OPERAND and
3100 PRINT_OPERAND_ADDRESS. Macros used in output_addr_const need to emit
3101 different things depending on whether code operand or constant is
3105 cris_output_addr_const (FILE *file, rtx x)
3108 output_addr_const (file, x);
3112 /* Worker function for ASM_OUTPUT_SYMBOL_REF. */
3115 cris_asm_output_symbol_ref (FILE *file, rtx x)
3117 if (flag_pic && in_code > 0)
3119 const char *origstr = XSTR (x, 0);
3122 str = (* targetm.strip_name_encoding) (origstr);
3124 if (cris_gotless_symbol (x))
3126 if (! cris_pic_sympart_only)
3127 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3128 assemble_name (file, str);
3129 fprintf (file, ":GOTOFF");
3131 else if (cris_got_symbol (x))
3133 if (cris_pic_sympart_only)
3135 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3136 assemble_name (file, XSTR (x, 0));
3139 fprintf (file, ":GOT16]");
3141 fprintf (file, ":GOT]");
3144 LOSE_AND_RETURN ("unexpected PIC symbol", x);
3147 if (! current_function_uses_pic_offset_table)
3148 output_operand_lossage ("PIC register isn't set up");
3151 assemble_name (file, XSTR (x, 0));
3154 /* Worker function for ASM_OUTPUT_LABEL_REF. */
3157 cris_asm_output_label_ref (FILE *file, char *buf)
3159 if (flag_pic && in_code > 0)
3161 if (! cris_pic_sympart_only)
3162 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3163 assemble_name (file, buf);
3165 fprintf (file, ":GOTOFF");
3168 if (! current_function_uses_pic_offset_table)
3169 internal_error ("emitting PIC operand, but PIC register isn't set up");
3172 assemble_name (file, buf);
3175 /* Worker function for OUTPUT_ADDR_CONST_EXTRA. */
3178 cris_output_addr_const_extra (FILE *file, rtx x)
3180 switch (GET_CODE (x))
3182 const char *origstr;
3186 ASSERT_PLT_UNSPEC (x);
3187 x = XVECEXP (x, 0, 0);
3188 origstr = XSTR (x, 0);
3189 str = (* targetm.strip_name_encoding) (origstr);
3190 if (cris_pic_sympart_only)
3192 assemble_name (file, str);
3193 fprintf (file, ":PLTG");
3197 if (TARGET_AVOID_GOTPLT)
3198 /* We shouldn't get here. */
3201 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3202 assemble_name (file, XSTR (x, 0));
3205 fprintf (file, ":GOTPLT16]");
3207 fprintf (file, ":GOTPLT]");
3216 /* Worker function for TARGET_STRUCT_VALUE_RTX. */
3219 cris_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
3220 int incoming ATTRIBUTE_UNUSED)
3222 return gen_rtx_REG (Pmode, CRIS_STRUCT_VALUE_REGNUM);
3225 /* Worker function for TARGET_SETUP_INCOMING_VARARGS. */
3228 cris_setup_incoming_varargs (CUMULATIVE_ARGS *ca,
3229 enum machine_mode mode ATTRIBUTE_UNUSED,
3230 tree type ATTRIBUTE_UNUSED,
3231 int *pretend_arg_size,
3234 if (ca->regs < CRIS_MAX_ARGS_IN_REGS)
3236 int stdarg_regs = CRIS_MAX_ARGS_IN_REGS - ca->regs;
3237 cfun->machine->stdarg_regs = stdarg_regs;
3238 *pretend_arg_size = stdarg_regs * 4;
3242 fprintf (asm_out_file,
3243 "\n; VA:: ANSI: %d args before, anon @ #%d, %dtime\n",
3244 ca->regs, *pretend_arg_size, second_time);
3247 /* Return true if TYPE must be passed by invisible reference.
3248 For cris, we pass <= 8 bytes by value, others by reference. */
3251 cris_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED,
3252 enum machine_mode mode, tree type,
3253 bool named ATTRIBUTE_UNUSED)
3255 return (targetm.calls.must_pass_in_stack (mode, type)
3256 || CRIS_FUNCTION_ARG_SIZE (mode, type) > 8);
3261 cris_arg_partial_bytes (CUMULATIVE_ARGS *ca, enum machine_mode mode,
3262 tree type, bool named ATTRIBUTE_UNUSED)
3264 if (ca->regs == CRIS_MAX_ARGS_IN_REGS - 1
3265 && !targetm.calls.must_pass_in_stack (mode, type)
3266 && CRIS_FUNCTION_ARG_SIZE (mode, type) > 4
3267 && CRIS_FUNCTION_ARG_SIZE (mode, type) <= 8)
3268 return UNITS_PER_WORD;
3273 /* Worker function for TARGET_MD_ASM_CLOBBERS. */
3276 cris_md_asm_clobbers (tree outputs, tree inputs, tree clobbers)
3278 HARD_REG_SET mof_set;
3281 CLEAR_HARD_REG_SET (mof_set);
3282 SET_HARD_REG_BIT (mof_set, CRIS_MOF_REGNUM);
3284 for (t = outputs; t != NULL; t = TREE_CHAIN (t))
3286 tree val = TREE_VALUE (t);
3288 /* The constraint letter for the singleton register class of MOF
3289 is 'h'. If it's mentioned in the constraints, the asm is
3290 MOF-aware and adding it to the clobbers would cause it to have
3291 impossible constraints. */
3292 if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t))),
3294 || decl_overlaps_hard_reg_set_p (val, mof_set))
3298 for (t = inputs; t != NULL; t = TREE_CHAIN (t))
3300 tree val = TREE_VALUE (t);
3302 if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t))),
3304 || decl_overlaps_hard_reg_set_p (val, mof_set))
3308 return tree_cons (NULL_TREE,
3309 build_string (strlen (reg_names[CRIS_MOF_REGNUM]),
3310 reg_names[CRIS_MOF_REGNUM]),
3315 /* Various small functions to replace macros. Only called from a
3316 debugger. They might collide with gcc functions or system functions,
3317 so only emit them when '#if 1' above. */
3319 enum rtx_code Get_code (rtx);
3324 return GET_CODE (x);
3327 const char *Get_mode (rtx);
3332 return GET_MODE_NAME (GET_MODE (x));
3335 rtx Xexp (rtx, int);
3343 rtx Xvecexp (rtx, int, int);
3346 Xvecexp (rtx x, int n, int m)
3348 return XVECEXP (x, n, m);
3351 int Get_rtx_len (rtx);
3356 return GET_RTX_LENGTH (GET_CODE (x));
3359 /* Use upper-case to distinguish from local variables that are sometimes
3360 called next_insn and prev_insn. */
3362 rtx Next_insn (rtx);
3365 Next_insn (rtx insn)
3367 return NEXT_INSN (insn);
3370 rtx Prev_insn (rtx);
3373 Prev_insn (rtx insn)
3375 return PREV_INSN (insn);
3379 #include "gt-cris.h"
3383 * eval: (c-set-style "gnu")
3384 * indent-tabs-mode: t